CIRCUIT ANALYSIS
AND DESIGN
Fawwaz T. Ulaby, Michel M. Maharbiz,
& Cynthia M. Furse
Book companion website:
CAD : cad.eecs.umich.edu
CIRCUIT ANALYSIS
AND DESIGN
Fawwaz T. Ulaby
The University of Michigan
Michel M. Maharbiz
The University of California, Berkeley
Cynthia M. Furse
The University of Utah
Copyright  2018 Fawwaz T. Ulaby, Michel M. Maharbiz, Cynthia M. Furse
This book is published by Michigan Publishing under an agreement with the authors.
It is made available free of charge in electronic form to any student or instructor
interested in the subject matter.
Published in the United States of America by Michigan Publishing.
Manufactured in the United States of America
ISBN 978-1-60785-483-8 (hardcover)
ISBN 978-1-60785-484-5 (electronic)
The free ECE Textbook initiative is sponsored by the ECE Department
at the University of Michigan.
To an academic, writing a book is an endeavor of love.
We dedicate this book to Jean, Anissa, and Katie.
Brief Contents
Chapter 1 Circuit Terminology
1
50
Chapter 12 Circuit Analysis by
Laplace Transform
630
674
Chapter 2
Resistive Circuits
Chapter 3
Analysis Techniques
115
Chapter 13 Fourier Analysis
Technique
Chapter 4
Operational Amplifiers
183
Appendix A Symbols, Quantities,
and Units
727
Chapter 5
RC and RL First-Order
Circuits
248
Appendix B Solving Simultaneous
Equations
729
Chapter 6
RLC Circuits
330
Appendix C Overview of Multisim
733
Chapter 7
ac Analysis
385
Appendix D Mathematical Formulas
736
Chapter 8
ac Power
459
Appendix E MATLAB® and
MathScript®
738
Chapter 9
Frequency Response of
Circuits and Filters
500
Appendix F myDAQ Quick Reference 743
Guide
Chapter 10 Three-Phase Circuits
566
Appendix G Answers to Selected
Problems
761
Chapter 11 Magnetically Coupled
Circuits
601
Index
767
Contents
Preface
TB5
2-7
Light-Emitting Diodes (LEDs)
Introducing Multisim
90
94
Chapter 1 Circuit Terminology
1
Summary
100
Overview
Historical Timeline
Units, Dimensions, and Notation
Micro- and Nanotechnology
Circuit Representation
Electric Charge and Current
Voltage and Power
Voltage: How Big Is Big?
Circuit Elements
Summary
Problems
2
4
9
10
15
20
25
30
35
41
42
Problems
101
1-1
1-2
TB1
1-3
1-4
1-5
TB2
1-6
Chapter 2 Resistive Circuits
2-1
TB3
2-2
2-3
TB4
2-4
2-5
2-6
Overview
Ohm’s Law
Superconductivity
Kirchhoff’s Law
Equivalent Circuits
Resistive Sensors
Wye–Delta (Y–�) Transformation
The Wheatstone Bridge
Application Note: Linear versus
Nonlinear i–υ Relationships
50
51
51
57
60
67
70
80
84
86
Chapter 3 Analysis Techniques
115
Overview
116
3-1
Linear Circuits
116
3-2
Node-Voltage Method
117
3-3
Mesh-Current Method
123
TB6
Measurement of Electrical Properties of
Sea Ice
By-Inspection Methods
126
133
TB7
3-6
Linear Circuits and Source
Superposition
Integrated Circuit Fabrication Process
Thévenin and Norton Equivalent Circuits
136
140
3-7
Comparison of Analysis Methods
151
3-8
Maximum Power Transfer
151
TB8
3-9
Digital and Analog
Application Note: Bipolar Junction
Transistor (BJT)
Nodal Analysis with Multisim
154
158
Summary
164
Problems
165
3-4
3-5
3-10
129
161
“book” — 2015/5/4 — 6:53 — page x — #10
Chapter 4
Operational Amplifiers
Overview
183
Chapter 6
Overview
331
Initial and Final Conditions
331
6-2
Introducing the Series RLC Circuit
334
TB15
6-3
Micromechanical Sensors and Actuators
Series RLC Overdamped Response
(α > ω0 )
Series RLC Critically Damped Response
(α = ω0 )
Series RLC Underdamped Response
(α < ω0 )
Summary of the Series RLC Circuit
Response
The Parallel RLC Circuit
337
341
RFID Tags and Antenna Design
General Solution for Any Second-Order
Circuit with dc Sources
Neural Simulation and Recording
Multisim Analysis of Circuit Response
356
359
Summary
373
Problems
374
4-1
Op-Amp Characteristics
184
TB9
4-2
Display Technologies
Negative Feedback
190
195
4-3
Ideal Op-Amp Model
196
4-4
Inverting Amplifier
198
4-5
Inverting Summing Amplifier
200
TB10
4-6
Computer Memory Circuits
Difference Amplifier
203
206
6-5
4-7
Voltage Follower/Buffer
208
6-6
4-8
Op-Amp Signal-Processing Circuits
209
4-9
Instrumentation Amplifier
214
4-10
Digital-to-Analog Converters (DAC)
216
4-11
219
TB11
4-12
The MOSFET as a Voltage-Controlled
Current Source
Circuit Simulation Software
Application Note: Neural Probes
4-13
Multisim Analysis
230
Summary
235
Problems
236
Chapter 5
5-1
RC and RL First-Order
Circuits
248
Overview
249
Nonperiodic Waveforms
250
330
6-1
184
225
229
RLC Circuits
6-4
6-7
TB16
6-8
TB17
6-9
Chapter 7
ac Analysis
346
348
349
353
363
369
385
Overview
386
7-1
Sinusoidal Signals
386
7-2
Review of Complex Algebra
389
TB18
7-3
Touchscreens and Active Digitizers
Phasor Domain
393
396
7-4
Phasor-Domain Analysis
400
7-5
Impedance Transformations
403
7-6
Equivalent Circuits
410
7-7
Phasor Diagrams
413
7-8
Phase-Shift Circuits
416
7-9
Phasor-Domain Analysis Techniques
420
TB19
7-10
Crystal Oscillators
ac Op-Amp Circuits
423
429
7-11
Op-Amp Phase Shifter
431
7-12
Application Note: Power-Supply Circuits
432
7-13
Multisim Analysis of ac Circuits
437
5-2
Capacitors
258
TB12
5-3
Supercapacitors
Inductors
265
269
5-4
Response of the RC Circuit
275
5-5
Response of the RL Circuit
287
TB13
5-6
Hard Disk Drives (HDD)
RC Op-Amp Circuits
293
295
TB14
5-7
Capacitive Sensors
Application Note: Parasitic Capacitance
and Computer Processing Speed
Analyzing Circuit Response with
Multisim
Summary
301
305
313
Summary
443
Problems
314
Problems
444
5-8
310
Chapter 8 ac Power
8-1
459
Overview
460
Periodic Waveforms
460
8-2
Average Power
463
TB20
8-3
The Electromagnetic Spectrum
Complex Power
465
467
8-4
The Power Factor
472
8-5
Maximum Power Transfer
476
TB21
8-6
Seeing without Light
Measuring Power With Multisim
477
482
Summary
485
Problems
486
Chapter 9 Frequency Response of
Circuits and Filters
500
10-5
Power in Balanced Three-Phase
Networks
582
TB26
Inside a Power Generating Station
586
10-6
Power-Factor Compensation
588
10-7
Power Measurement in Three-Phase
Circuits
591
Summary
595
Problems
596
Chapter 11 Magnetically Coupled
Circuits
601
Overview
602
11-1
Magnetic Coupling
602
TB27
Magnetic Resonance Imaging (MRI)
608
11-2
Transformers
611
11-3
Energy Considerations
615
Overview
501
9-1
The Transfer Function
501
9-2
Scaling
507
11-4
Ideal Transformers
617
TB22
9-3
Noise-Cancellation Headphones
Bode Plots
509
512
11-5
Three-Phase Transformers
619
Summary
622
9-4
Passive Filters
522
Problems
623
9-5
Filter Order
530
TB23
9-6
Spectral and Spatial Filtering
Active Filters
533
536
9-7
Cascaded Active Filters
538
TB24
Electrical Engineering and the
Audiophile
Application Note: Modulation and the
Superheterodyne Receiver
Spectral Response with Multisim
544
Summary
Problems
9-8
9-9
Chapter 12 Circuit Analysis by
Laplace Transform
630
Overview
631
12-1
Unit Impulse Function
631
547
12-2
The Laplace Transform Technique
633
550
TB28
3-D TV
637
555
12-3
Properties of the Laplace Transform
639
556
12-4
Circuit Analysis Procedure
641
12-5
Partial Fraction Expansion
644
566
TB29
Mapping the Entire World in 3-D
648
Overview
567
12-6
s-Domain Circuit Element Models
652
Balanced Three-Phase Generators
568
12-7
s-Domain Circuit Analysis
655
10-2
Source-Load Configurations
572
12-8
Y-Y Configuration
574
Multisim Analysis of Circuits Driven by
Nontrivial Inputs
662
10-3
10-4
Balanced Networks
576
Summary
665
TB25
Minaturized Energy Harvesting
577
Problems
665
Chapter 10 Three-Phase Circuits
10-1
Chapter 13
13-1
13-2
TB30
13-3
13-4
TB31
13-5
TB32
13-6
13-7
13-8
13-9
Fourier Analysis
Technique
674
Overview
Fourier Series Analysis Technique
675
675
Fourier Series Representation
Bandwidth, Data Rate, and
Communication
Circuit Applications
Average Power
677
688
Synthetic Biology
Fourier Transform
Brain-Machine Interfaces (BMI)
Fourier Transform Pairs
Fourier versus Laplace
Circuit Analysis with Fourier Transform
Multisim: Mixed-Signal Circuits and the
Sigma-Delta Modulator
Summary
Problems
695
697
702
704
710
711
713
690
693
717
718
Appendix A Symbols, Quantities,
and Units
727
Appendix B Solving Simultaneous
Equations
729
Appendix C Overview of Multisim
733
Appendix D Mathematical Formulas
736
Appendix E MATLAB® and
MathScript®
738
Appendix F myDAQ Quick Reference 743
Guide
Appendix G Answers to Selected
Problems
761
Index
767
List of Technology Briefs
TB1
TB2
TB3
TB4
TB5
TB6
TB7
TB8
TB9
TB10
TB11
TB12
TB13
TB14
TB15
TB16
TB17
Micro- and Nanotechnology
Voltage: How Big Is Big?
Superconductivity
Resistive Sensors
Light-Emitting Diodes (LEDs)
Measurement of Electrical
Properties of Sea Ice
Integrated Circuit Fabrication
Process
Digital and Analog
Display Technologies
Computer Memory Circuits
Circuit Simulation Software
Supercapacitors
Hard Disk Drives (HDD)
Capacitive Sensors
Micromechanical Sensors and
Actuators
RFID Tags and Antenna Design
Neural Simulation and Recording
10
30
57
70
90
126
136
154
190
203
225
265
293
301
337
356
363
TB18 Touchscreens and Active
Digitizers
TB19 Crystal Oscillators
TB20 The Electromagnetic Spectrum
TB21 Seeing without Light
TB22 Noise-Cancellation Headphones
TB23 Spectral and Spatial Filtering
TB24 Electrical Engineering and the
Audiophile
TB25 Minaturized Energy Harvesting
TB26 Inside a Power Generating Station
TB27 Magnetic Resonance Imaging
(MRI)
TB28 3-D TV
TB29 Mapping the Entire World in 3-D
TB30 Bandwidth, Data Rate, and
Communication
TB31 Synthetic Biology
TB32 Brain-Machine Interfaces (BMI)
393
423
465
477
509
533
544
577
586
608
637
648
688
695
702
Preface
Welcome to Circuit Analysis and Design.
As the foundational course in the majority of electrical and
computer engineering curricula, an electric circuits course
should serve four vital objectives:
(1) It should introduce the fundamental principles of circuit
analysis and equip the student with the skills necessary to
analyze any planar, linear circuit, including those driven by
dc or ac sources, or by more complicated waveforms such as
pulses and exponentials.
(2) It should start the student on the journey of circuit
design.
(3) It should guide the student into the seemingly magical
world of domain transformations—such as the Laplace and
Fourier transforms, not only as circuit analysis tools, but also
as mathematical languages that are “spoken” by many fields
of science and engineering.
(4) It should expand the student’s technical horizon by
introducing him/her to some of the many allied fields of
science and technology.
This book aims to accomplish exactly those objectives.
Among its distinctive features are:
Technology Briefs: The book contains 32 Technology
Briefs, each providing an overview of a topic that every
electrical and computer engineering professional should
become familiar with. Electronic displays, data storage
media, sensors and actuators, supercapacitors, and 3-D imaging are typical of the topics shared with the reader. The
Briefs are presented at a technical level intended to introduce
the student to how the concepts in the chapter are applied in
real-world applications and to interest the reader in pursuing
the subject further on his/her own. Technology Briefs cover
applications in circuits, medicine, the physical world, optics,
signals and systems, and more.
Application Notes: Most chapters include a section focused
on how certain devices or circuits might be used in practical
applications. Examples include power supplies, CMOS
inverters in computer processors, signal modulators, and
several others.
Multisim and MathScript: Multisim is a SPICE circuit
simulator available from National Instruments (see
cad.eecs.umich.edu for details). Multisim is highlighted
through many end-of-chapter demonstrations. The student
is strongly encouraged to take advantage of this rich
resource. The Math-Script software can perform matrix
inversion and many other calculations, much like the
MathWorks, Inc. MATLAB® software.
myDAQ: The myDAQ board does not come with this
e-book, but it can be purchased directly from National
Instruments.
The myDAQ is a convenient, portable measurement tool
that turns a PC into a basic electrical engineering lab with a
DVM, analog and digital power supplies, function generator,
oscilloscope, Bode plot analyzer, and diode analyzer. A
written myDAQ tutorial is available in Appendix F and
online video tutorials are available at http://www.ni.com/mydaq.
The book contains 53 integrative end-of-chapter problems,
each intended to be solved analytically, by Multisim using
software simulation, and by constructing the circuit and
measuring its currents and voltages using myDAQ. The
three-way complementary approach is an exceedingly
valuable learning experience.
Acknowledgments
A science or engineering textbook is the product of an
integrated effort by many professionals. Invariably, the authors
receive far more of the credit than they deserve, for if it were
not for the creative talents of so many others, the book would
never have been possible, much less a success. We are indebted
to many students and colleagues, most notably the following
individuals:
Richard Carnes: For his meticulous typing of the manuscript,
careful drafting of its figures, and overall stewardship of the
project. Richard imparted the same combination of precision
and passion to the manuscript as he always does when playing
Chopin on the piano.
Joe Steinmeyer: For testing the Multisim problems contained in the text and single-handedly developing all of the Multisim modules on the DVD-ROMs. Shortly thereafter, Joe
went to MIT at which he completed a Ph.D. in electrical
engineering.
Professor Ed Doering: For developing a comprehensive
tutorial that includes 36 circuit problems, each of which
is solved analytically, with Multisim, and with myDAQ.
In addition, he created instructive video tutorials on how
to use a variety of computer-based instruments, including
the multimeter, oscilloscope, waveform generator, and Bode
analyzer.
Nathan Sawicki: For developing a tutorial (Appendix F) on
myDAQ and how to build circuits using it.
Rose Anderson: For developing an elegant cover design and
a printable InDesign version of the book.
For their reviews of the overall manuscript and for offering
many constructive criticisms, we are grateful to Professors
Fred Terry and Jamie Phillips of the University of Michigan,
Keith Holbert of Arizona State University, Ahmad Safaai-Jazi
of Virginia Polytechnic Institute and State University, Robin
Strickland of the University of Arizona, and Frank Merat of
Case Western Reserve University. The manuscript was also
scrutinized by a highly discerning group of University of
Michigan graduate students: Mike Benson, Fikadu Dagefu,
Scott Rudolph, and Jane Whitcomb. Multisim sections were
reviewed by Peter Ledochowitsch.
Many of the 818 end-of-chapter problems were solved and
checked by students from the University of Michigan and
the University of California at Berkeley. They include Holly
Chiang, David Hiskens, Tonmoy Monsoor, Zachary Hargeaves, James Dunn, Christopher Lo, Chris Buonocore, and
Randolf Tjandra. We thank them for their contributions.
We enjoyed writing this book, and we hope you enjoy
learning from it.
Fawwaz Ulaby, Michel Maharbiz, and Cynthia Furse
Photo Credits
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CHAPTER
C H A P T E R
1
1
Circuit Terminology
Contents
1-1
1-2
TB1
1-3
1-4
1-5
TB2
1-6
Overview, 2
Historical Timeline, 4
Units, Dimensions, and Notation, 9
Micro- and Nanotechnology, 10
Circuit Representation, 15
Electric Charge and Current, 20
Voltage and Power, 25
Voltage: How Big Is Big? 30
Circuit Elements, 35
Summary, 41
Problems, 42
Objectives
Learn to:
Differentiate between active and passive devices;
analysis and synthesis; device, circuit, and system;
and dc and ac.
Point to important milestones in the history of
electrical and computer engineering.
Relate electric charge to current; voltage to
energy; power to current and voltage; and apply
the passive sign convention.
Describe the properties of dependent and
independent sources.
Describe the operation of SPST and SPDT
switches.
The iPhone is a perfect example of an integrated electronic
architecture composed of a large number of interconnected
circuits. Learning a new language starts with the alphabet.
This chapter introduces the terms and conventions used in the
language of electronics.
2
CHAPTER 1
CIRCUIT TERMINOLOGY
Overview
Electrical engineering is an exciting field through which we
interface with the world using electrical signals. In this chapter
you will learn about the basis of electrical engineering—voltage
and current—where they come from, what they mean, and how
to measure them. The chapter provides you the nomenclature
and symbols to draw and represent electric circuits.You will also
learn your first circuit analysis tool, Ohm’s law, which describes
the relationship between voltage, current, and resistance. In
the first section of this chapter, enjoy electrical engineering’s
innovative past, and in the micro-nano Technology Brief,
imagine the things you could do with it in the future. As
you explore this chapter and start to pick up the tools you
need in your engineering career, imagine an application that
particularly interests you, and how these concepts and ideas
apply to that application.
Figure 1-1: Cell phone.
Cell-Phone Circuit Architecture
Electronic circuits are contained in just about every gadget we
use in daily living. In fact, electronic sensors, computers, and
displays are at the operational heart of most major industries,
from agricultural production and transportation to healthcare
and entertainment. The ubiquitous cell phone (Fig. 1-1), which
has become practically indispensable, is a perfect example of
an integrated electronic architecture made up of a large number
of interconnected circuits. It includes a two-way antenna (for
transmission and reception), a diplexer (which facilitates the
simultaneous transmission and reception through the antenna),
a microprocessor for computing and control, and circuits with
many other types of functions (Fig. 1-2). Factors such as
compatibility among the various circuits and proper electrical
connections between them are critically important to the overall
operation and integrity of the cell phone.
Usually, we approach electronic analysis and design through
a hierarchical arrangement where we refer to the overall entity
as a system, its subsystems as circuits, and the individual
circuit elements as devices or components. Thus, we may
regard the cell phone as a system (which is part of a much
larger communication system); its audio-frequency amplifier,
for example, as a circuit, and the resistors, integrated circuits
(ICs), and other constituents of the amplifier as devices. In
actuality, an IC is a fairly complex circuit in its own right,
but its input/output functionality is such that usually it can be
represented by a relatively simple equivalent circuit, thereby
allowing us to treat it like a device. Generally, we refer to
devices that do not require an external power source in order to
operate as passive devices; these include resistors, capacitors,
and inductors. In contrast, an active device (such as a transistor
or an IC) cannot function without a power source.
This book is about electric circuits. A student once asked:
“What is the difference between an electric circuit and an
electronic circuit? Are they the same or different?” Strictly
speaking, both refer to the flow of electric charge carried
by electrons, but historically, the term “electric” preceded
“electronic,” and over time the two terms have come to signify
different things:
An electric circuit is one composed of passive devices,
in addition to voltage and current sources, and possibly
some types of switches. In contrast, the term electronic
has become synonymous with transistors and other active
devices. The study of electric circuits usually precedes and sets the stage
for the study of electronic circuits, and even though a course on
electric circuits usually does not deal with the internal operation
of an active device, it does incorporate active devices in circuit
examples by representing them in terms of equivalent circuits.
An electric circuit, as defined by Webster’s English
Dictionary, is a “complete or partial path over which current
may flow.” The path may be confined to a physical structure
(such as a metal wire connecting two components), or it may
be an unbounded channel carrying electrons through it. An
example of the latter is when a lightning bolt strikes the
ground, creating an electric current between a highly charged
atmospheric cloud and the earth’s surface.
3
Human Interface,
Dialing, Memory
Battery Power Control
Microprocessor
Control
In
Out
Analog-to-Digital
and
Digital-to-Analog
Converters
Transmitter
Transmit
Receive
Speech,
Video, Data
Receiver
Antenna
Diplexer
Figure 1-2: Basic cell-phone block diagram. Each block consists of multiple circuits that together provide the required functionality.
Electrical engineering design is about how we use and control
voltages and currents to do the things we want to do. To interface
with the real world, sensors are the electrical tools that convert
real world inputs—like heat, sound, light, pressure, user inputs
like button presses or touch screen, motion, etc.—into voltages
and currents. We then manipulate these input voltages and
currents using various circuits. We may amplify them if they are
too small, switch them on or off, change their frequency (filter,
oscillate, modulate them), or convert them into a digital signal
a computer circuit can further analyze. In the end, we want to
have an output voltage or current we can use to interface back to
the real world—turn on a light, buzzer, alarm, motor/actuator,
or control a cell phone, car airplane, robot, medical device,
etc. Electrical engineers design both the input/output (I/O)
systems as well as the control and actuation circuits, and often
the software and algorithms as well. Electrical engineering is
about “what you can do to a voltage” and how to use it to do
something important in the real world.
The study of electric circuits consists of two complementary
tasks: analysis and synthesis (Fig. 1-3). Through analysis, we
develop an understanding of “how” a given circuit works. If
we think of a circuit as having an input—a stimulus—and an
output—a response, the tools we use in circuit analysis allow
us to mathematically relate the output response to the input
stimulus, enabling us to analytically and graphically “observe”
the behavior of the output as we vary the relevant parameters of
the input. An example might be a specific amplifier circuit,
in which case the objective of circuit analysis might be to
establish how the output voltage varies as a function of the
input voltage over the full operational range of the amplifier
parameters. By analyzing the operation of each circuit in a
system containing multiple circuits, we can characterize the
operation of the overall system.
As a process, synthesis is the reverse of analysis. In
engineering, we tend to use the term design as a synonym
for synthesis. The design process usually starts by defining
the operational specifications that a gadget or system should
meet, and then we work backwards (relative to the analysis
process) to develop circuits that will satisfy those specifications.
In analysis, we are dealing with a single circuit with a specific
set of operational characteristics. We may employ different
analysis tools and techniques, but the circuit is unique, and
so are its operational characteristics. That is not necessarily
the case for synthesis; the design process may lead to multiple
Analysis vs. Synthesis
Circuit
Circuit
Analysis
Synthesis
(Design)
Functionality
Specs
Figure 1-3: The functionality of a circuit is discerned by
applying the tools of circuit analysis. The reverse process,
namely the realization of a circuit whose functionality meets
a set of specifications, is called circuit synthesis or design.
4
CHAPTER 1
circuit realizations—each one of which exhibits or satisfies the
desired specifications.
Given the complementary natures of analysis and synthesis,
it stands to reason that developing proficiency with the tools
of circuit analysis is a necessary prerequisite to becoming a
successful design engineer. This textbook is intended to provide
you with a solid foundation of the primary set of tools and
mathematical techniques commonly used to analyze both direct
current (dc) and alternating current (ac) circuits, as well as
circuits driven by pulses and other types of waveforms. A dc
circuit is one in which voltage and current sources are constant
as a function of time, whereas in ac circuits, sources vary
sinusoidally with time. Even though this is not a book on circuit
design, design problems occasionally are introduced into the
discussion as a way to illustrate how the analysis and synthesis
processes complement each other.
Concept Question 1-1: What are the differences between
a device, a circuit, and a system? (See
)
CIRCUIT TERMINOLOGY
demonstrated in 1945, but computers did not become available
for business applications until the late 1960s and for personal
use until the introduction of Apple I in 1976. Over the past 20
years, not only have computer and communication technologies
expanded at a truly impressive rate (see Technology Brief 1),
but more importantly, it is the seamless integration of the two
technologies that has made so many business and personal
applications possible.
Generating a comprehensive chronology of the events and
discoveries that have led to today’s technologies is beyond the
scope of this book, but ignoring the subject altogether would
be a disservice to both the reader and the subject of electric
circuits. The abbreviated chronology presented on the next few
pages represents our compromise solution.
Chronology: Major Discoveries, Inventions, and
Developments in Electrical and Computer
Engineering
ca. 1100 BC Abacus: the earliest known calculating device.
Concept Question 1-2: What is the difference between
analysis and synthesis? (See
1-1
)
Historical Timeline
We live today in the age of electronics. No field of science or
technology has had as profound an influence in shaping the
operational infrastructure of modern society as has the field
of electronics. Our computers and communication systems are
at the nexus of every major industry. Even though no single
event marks the beginning of a discipline, electrical engineering
became a recognized profession sometime in the late 1800s (see
chronology). Alexander Graham Bell invented the telephone
(1876); Thomas Edison perfected his incandescent light bulb
(1880) and built an electrical distribution system in a small
area in New York City; Heinrich Hertz generated radio waves
(1887); and Guglielmo Marconi demonstrated radio telegraphy
(1901). The next 50 years witnessed numerous developments,
including radio communication, TV broadcasting, and radar for
civilian and military applications—all supported by electronic
circuitry that relied entirely on vacuum tubes. The invention of
the transistor in 1947 and the development of the integrated
circuit (IC) shortly thereafter (1958) transformed the field of
electronics by setting it on an exponentially changing course
towards “smaller, faster, and cheaper.”
Computer engineering is a relatively young discipline.
The first all-electronic computer, the ENIAC, was built and
ca. 900 BC Magnetite: According to legend, a shepherd in northern Greece,
Magnus, experienced a pull on the iron nails in his sandals by the black
rock he was standing on. The rock later became known as magnetite [a
form of iron with permanent magnetism].
ca. 600 BC Static electricity: Greek philosopher Thales described how amber,
after being rubbed with cat fur, can pick up feathers.
1600
Electric: The term was coined by William Gilbert (English) after the
Greek word for amber (elektron). He observed that a compass needle
points north to south, indicating the Earth acts as a bar magnet.
1614
Logarithm: developed by John Napier (Scottish).
1642
First adding machine: built by Blaise Pascal (French) using multiple
dials.
1-1
HISTORICAL TIMELINE
1733
Electric charge: Charles François du Fay (French) discovers that
charges are of two forms and that like charges repel and unlike charges
attract.
1745
Capacitor: Pieter van Musschenbroek (Dutch) invented the Leyden jar,
the first electrical capacitor.
1800
First electric battery: developed by Alessandro Volta (Italian).
1827
Ohm’s law: formulated by Georg Simon Ohm (German), relating electric
potential to current and resistance.
1827
Inductance: introduced by Joseph Henry (American), who built one
of the earliest electric motors. He also assisted Samuel Morse in the
development of the telegraph.
1837
Telegraph: concept patented by Samuel Morse (American), who used
a code of dots and dashes to represent letters and numbers.
5
1876
Telephone: invented by Alexander Graham Bell (Scottish-American):
the rotary dial became available in 1890, and by 1900, telephone systems
were installed in many communities.
1879
Incandescent light bulb: demonstrated byThomas Edison (American),
and in 1880, his power distribution system provided dc power to 59
customers in New York City.
1887
Radiowaves: Heinrich Hertz (German) built a system that could
generate electromagnetic waves (at radio frequencies) and detect them.
Courtesy of John Jenkins (sparkmuseum.com)
1843
1888
ac motor: invented by Nikola Tesla (Croatian-American).
1893
Magnetic sound recorder: invented by Valdemar Poulsen (Danish)
using steel wire as recording medium.
Computer algorithm: original concept and plan attributed to Ada Byron
Lovelace (British), the daughter of poet Lord Byron. The “Ada” software
language was developed in 1979 by the U.S. Department of Defense in
her honor.
6
1895
1896
CHAPTER 1
X-rays: discovered by Wilhelm Röntgen (German). One of his first
X-ray images was of the bones in his wife’s hands. [1901 Nobel prize
in physics.]
CIRCUIT TERMINOLOGY
1917
Superheterodyne and frequency modulation (FM): invented by Edwin
Howard Armstrong (American), providing superior sound quality of
radio transmissions over AM radio.
1920
Commercial radio broadcasting: Westinghouse Corporation established radio station KDKA in Pittsburgh, Pennsylvania.
1923
Television: invented by Vladimir Zworykin (Russian-American). In
1926, John Baird (Scottish) transmitted TV images over telephone wires
from London to Glasgow. Regular TV broadcasting began in Germany
(1935), England (1936), and the United States (1939).
1926
Transatlantic telephone service established between London and New
York.
1930
Analog computer: developed by Vannevar Bush (American) for solving
differential equations.
1935
Anti-glare glass: developed by Katharine Blodgett by transferring thin
monomolecular coatings to glass.
Radio wireless transmission: patented by Guglielmo Marconi
(Italian). In 1901, he demonstrated radio telegraphy across the Atlantic
Ocean. [1909 Nobel prize in physics, shared with Karl Braun (German).]
1897
Cathode ray tube (CRT): invented by Karl Braun (German). [1909 Nobel
prize, shared with Marconi.]
1897
Electron: discovered by Joseph John Thomson (English), who also
measured its charge-to-mass ratio. [1906 Nobel prize in physics.]
1902
Amplitude modulation: invented by Reginald Fessenden (American)
for telephone transmission. In 1906, he introduced AM radio broadcasting
of speech and music on Christmas Eve.
1904
Diode vacuum tube: patented by John Fleming (British).
1907
Triode tube amplifier: developed by Lee De Forest (American) for
wireless telegraphy, setting the stage for long-distance phone service,
radio, and television.
1-1
HISTORICAL TIMELINE
1935
Radar: invented by Robert Watson-Watt (Scottish).
1944
Computer compiler: One of the earliest compilers was designed by
Grace Hopper for Harvard’s Mark I computer. She retired as a rear
admiral in the U.S. Navy in 1986.
7
1954
First AM transistor radio: introduced by Texas Instruments.
Courtesy of Dr. Steve Reyer
1945
1947
1955
Optical fiber: demonstrated by Narinder Kapany (Indian-American) as
a low-loss, light-transmission medium.
1956
FORTRAN: developed by John Backus (American), the first major
programming language.
1958
Laser: concept developed by Charles Townes and Arthur Schawlow
(both Americans). [Townes shared 1964 Nobel prize in physics with
Aleksandr Prokhorov and Nicolay Bazov (both Soviets).] In 1960
Theodore Maiman (American) built the first working model of a laser.
1958
Modem: developed by Bell Labs.
1958
Integrated circuit (IC): Jack Kilby (American) built the first IC on
germanium, and independently, Robert Noyce (American) built the first
IC on silicon.
1960
Echo: The first passive communication satellite was launched and
successfully reflected radio signals back to Earth. In 1962, the first
communication satellite, Telstar, was placed in geosynchronous orbit.
ENIAC: The first all-electronic computer was developed by John
Mauchly and J. Presper Eckert (both American).
Transistor: invented by William Shockley, Walter Brattain, and John
Bardeen (all Americans) at Bell Labs. [1956 Nobel prize in physics.]
1948
Modern communication: Claude Shannon (American) published his
Mathematical Theory of Communication, which formed the foundation of
information theory, coding, cryptography, and other related fields.
1950
Floppy disk: invented by Yoshiro Nakama (Japanese) as a magnetic
medium for storing data.
8
1960
CHAPTER 1
Microcomputer: introduced by Digital Equipment Corporation as the
PDP-1, which was followed with the PDP-8 in 1965.
CIRCUIT TERMINOLOGY
1969
ARPANET: established by the U.S. Department of Defense, which later
evolved into the Internet.
1970
CD-ROM: patented by James Russell (American), as the first system
capable of digital-to-optical recording and playback.
1971
Pocket calculator: introduced by Texas Instruments.
Courtesy of Texas Instruments
1961
Thick-film resistor: one of 28 electronic devices patented by Otis
Boykin (African-American).
1971
Intel 4004 four-bit microprocessor: capable of executing 60,000
operations per second.
1972
Computerized axial tomography scanner (CAT scan: developed
by Godfrey Hounsfield (British) and Alan Cormack (South African–
American) as a diagnostic tool. [1979 Nobel Prize in physiology or
medicine.]
1976
Laser printer: introduced by IBM.
1976
Apple I: sold by Apple Computer in kit form, followed by the fully
assembled Apple II in 1977, and the Macintosh in 1984.
1979
First cellular telephone network: built in Japan:
1962
MOSFET: invented by Steven Hofstein and Frederic Heiman (both
American), which became the workhorse of computer microprocessors.
• 1983 cellular phone networks started in the United States.
1964
IBM’s 360 mainframe: became the standard computer for major
businesses.
• 1995 cell phones became widely available.
1965
BASIC computer language: developed by John Kemeny and Thomas
Kurtz (both American).
1965
Programmable digital computer: developed by Konrad Zuse (German) using binary arithmetic and electric relays.
1968
Word processor: demonstrated by Douglas Engelbart (American),
followed by the mouse pointing device and the use of a Windows-like
operating system.
• 1990 electronic beepers became common.
1980
MS-DOS computer disk operating system: introduced by Microsoft:
Windows marketed in 1985.
1981
PC: introduced by IBM.
1984
Internet became operational worldwide.
1988
First transatlantic optical fiber cable: installed between the U.S. and
Europe.
1988
Touchpad: invented by George Gerpheide (American).
1989
World Wide Web: invented by Tim Berners-Lee (British) by introducing
a networking hypertext system.
1996
Hotmail: launched by Sabeer Bhatia (Indian-American) and Jack Smith
(American) as the first webmail service.
1-2
1997
UNITS, DIMENSIONS, AND NOTATION
Palm Pilot: became widely available.
9
Table 1-1: Fundamental and electrical SI units.
Dimension
Unit
Symbol
Fundamental:
Length
Mass
Time
Electric charge
Temperature
Amount of substance
Luminous intensity
meter
kilogram
second
coulomb
kelvin
mole
candela
m
kg
s
C
K
mol
cd
ampere
volt
ohm
farad
henry
watt
hertz
A
V
�
F
H
W
Hz
Electrical:
2007
White LED: invented by Shuji Nakamura (Japanese) in the 1990s. It
promises to replace Edison’s lightbulb in most lighting applications.
2007
iPhone: released by Apple.
2009
Cloud computing: went mainstream.
2011
Humans vs. supercomputer: IBM’s Watson supercomputer beat the top
two human contestants of Jeopardy! for a $1M prize.
2011
Text messages: 8 × 1012 (8 trillion) text messages sent worldwide.
2014
Mobile subscribers: Approximately 96% of the world population is a
mobile phone subscriber (7 billion people).
Concept Question 1-3: What do you consider to be the
most important electrical engineering milestone that is
missing from this historical timeline? (See
)
1-2
Units, Dimensions, and Notation
The standard system used in today’s scientific literature to
express the units of physical quantities is the International
System of Units (SI), abbreviated after its French name Système
Internationale. Time is a fundamental dimension, and the
second is the unit by which it is expressed relative to a specific
reference standard. The SI configuration is based on the seven
fundamental dimensions listed in Table 1-1, and their units
are called fundamental SI units. All other dimensions, such as
velocity, force, current, and voltage, are regarded as secondary
because their units are based on and can be expressed in terms
of the seven fundamental units. For example, electric current
is measured in amps, which is an abbreviation for coulombs/
second. Appendix A provides a list of the quantities used in this
book, together with their symbols and units.
Current
Voltage
Resistance
Capacitance
Inductance
Power
Frequency
In science and engineering, a set of prefixes commonly
are used to denote multiples and submultiples of units. These
prefixes, ranging in value between 10−18 and 1018 , are listed in
Table 1-2. An electric current of 3 × 10−6 A, for example, may
be written as 3 μA. The physical quantities we discuss in this
book (such as voltage and current) may be constant in time or
may vary with time.
Table 1-2: Multiple and submultiple prefixes.
Prefix
Symbol
exa
peta
tera
giga
mega
kilo
E
P
T
G
M
k
1018
1015
1012
109
106
103
Magnitude
milli
micro
nano
pico
femto
atto
m
μ
n
p
f
a
10−3
10−6
10−9
10−12
10−15
10−18
10
TECHNOLOGY BRIEF 1: MICRO- AND NANOTECHNOLOGY
Technology Brief 1
Micro- and Nanotechnology
Scale of Things
Our ability as humans to shape and control the
environment around us has improved steadily over time,
most dramatically in the past 100 years. The degree of
control is reflected in the scale (size) at which objects can
be constructed, which is governed by the tools available
for constructing them. This refers to the construction of
both very large and very small objects. Early tools—such
as flint, stone, and metal hunting gear—were on the order
of tens of centimeters. Over time, we were able to build
ever-smaller and ever-larger tools. The world’s largest
antenna* is the radio telescope at the Arecibo observatory
in Puerto Rico (Fig. TF1-1). The dish is 305 m (1000 ft) in
diameter and 50 m deep and covers nearly 20 acres. It is
built from nearly 40,000 perforated 1 m × 2 m aluminum
plates. On the other end of the size spectrum, some of
the smallest antennas today are nanocrescent antennas
that are under 100 nm long. These are built by sputtering
aluminum against glass beads and then removing the
beads to expose crescent-shaped antennas (Fig. TF1-2).
Miniaturization continues to move forward: the first
hydraulic valves, for example, were a few meters in
length (ca. 400 BCE); the first toilet valve was tens of
* http://www.naic.edu/general/
Figure TF1-2: Nano-crescent antenna for use in the
ultraviolet range (320 nm to 370 nm wavelength). (Credit:
Miguel Rodriguez.)
centimeters in size (ca. 1596); and by comparison, the
largest dimension in a modern microfluidic valve used in
biomedical analysis-chips is less than 100 μm!
The chart in Fig. TF1-3 displays examples of manmade
and natural things whose dimensions fall in the range
between 0.1 nm (10−10 m) and 1 cm, which encompasses
both micrometer (1 μm = 10−6 m) and nanometer
(1 nm = 10−9 m) ranges. Microtechnology, which
refers to our ability to manipulate matter at a precision
of 1 μm or better, became possible in the 1960s,
ushering in an electronics revolution that led to the
realization of the laptop computer and the ubiquitous
cell phone. It then took another 30 years to improve the
manufacturing precision down to the nanometer scale
(nanotechnology), promising the development of new
materials and devices with applications in electronics,
medicine, energy, and construction.
Moore’s Law
Figure TF1-1: Arecibo radio telescope.
With the invention of the semiconductor transistor in
1947 and the subsequent development of the integrated
circuit in 1959, it became possible to build thousands
(now trillions) of electronic components onto a single
substrate or chip. The 4004 microprocessor chip
(ca. 1971) had 2250 transistors and could execute 60,000
instructions per second; each transistor had a “gate”
on the order of 10 μm (10−5 m). In comparison, the
2006 Intel Core had 151 million transistors with each
transistor gate measuring 65 nm (6.5 × 10−8 m); it could
TECHNOLOGY BRIEF 1: MICRO- AND NANOTECHNOLOGY
11
The Scale of Things – Nanometers and More
Things Natural
Things Manmade
10-2 m
Ant
~ 5 mm
Dust mite
Red blood cells
(~7-8 μm)
10-4 m
0.1 mm
100 μm
10-5 m
0.01 mm
10 μm
1,000 nanometers =
1 micrometer (μm)
MicroElectroMechanical
(MEMS) devices
10 -100 μm wide
O
Pollen grain
Red blood cells
P
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
S
S
S
S
S
S
S
S
Zone plate x-ray “lens”
Outer ring spacing ~35 nm
Visible
10-6 m
The Challenge
1,000,000 nanometers =
1 millimeter (mm)
Infrared
Fly ash
~ 10-20 μm
Microworld
200 μm
Human hair
~ 60-120 μm wide
Head of a pin
1-2 mm
Microwave
10-3 m
1 cm
10 mm
~10 nm diameter
ATP synthase
Ultraviolet
Nanoworld
10-7 m
10-8 m
Fabricate and combine
nanoscale building
blocks to make useful
devices, e.g., a
photosynthetic reaction
center with integral
semiconductor storage.
0.1 μm
100 nm
0.01 μm
10 nm
10-9 m
Self-assembled,
Nature-inspired structure
Many 10s of nm
Nanotube electrode
Soft x-ray
1 nanometer (nm)
DNA
~2-1/2 nm diameter
Atoms of silicon
spacing 0.078 nm
10-10 m
0.1 nm
Quantum corral of 48 iron atoms on copper surface
positioned one at a time with an STM tip
Corral diameter 14 nm
Carbon
buckyball
~1 nm
diameter
Carbon nanotube
~1.3 nm diameter
Office of Basic Energy Sciences
Office of Science, U.S. DOE
Version 05-26-06, pmd
FigureTF1-3: The scale of natural and man-made objects, sized from nanometers to centimeters. (Courtesy of U.S. Department
of Energy.)
perform 27 billion instructions per second. The 2011
Intel Core i7 “Gulftown” processors have 1.17 billion
transistors and can perform ∼ 150 billion instructions per
second. In recent years, the extreme miniaturization of
transistors (the smallest transistor gate in an i7 Core is
∼ 32 nanometers wide!) has led to a number of design
innovations and trade-offs at the processor level, as
devices begin to approach the physical limits of classic
semiconductor devices. Among these, the difficulty of
dissipating the heat generated by a billion transistors
has led to the emergence of multicore processors;
these devices distribute the work (and heat) between
more than one processor operating simultaneously on
the same chip (2 processors on the same chip are
called a dual core, 4 processors are called a quad
core, etc.). This type of architecture requires additional
components to manage computation between processors
and has led to the development of new software
paradigms to deal with the parallelism inherent in such
devices.
12
TECHNOLOGY BRIEF 1: MICRO- AND NANOTECHNOLOGY
Transistors/Chip
1010
8-Core Xeon
2.3 x 109
Dual-Core Itanium 2
109
Itanium 2
Itanium
108
Pentium 4
Pentium III
107
Pentium II
Pentium II
386
106
286
8086
105
6000
8008
4004
Intel CPUs
104
8000
1970
1975
1980
1985
1990
1995
2000
2005
103
2011
Figure TF1-4: Moore’s Law predicts that the number of transistors per processor doubles every two years.
Moore’s Law and Scaling
In 1965, Gordon Moore, co-founder of Intel, predicted that
the number of transistors in the minimum-cost processor
would double every two years (initially, he had guessed
they would double every year). Amazingly, this prediction
has proven true of semiconductor processors for 40 years,
as demonstrated by Fig. TF1-4.
In order to understand Moore’s Law, we have to
understand the basics of how transistors are used
in computers. Computers carry all of their information
(numbers, letters, sounds, etc.) in coded strings of
electrical signals that are either “on” or “off.” Each “on”
or “off” signal is called a bit, and 8 bits in a row are called
a byte. Two bytes are a word, and (when representing
numbers) they provide 16-bit precision. Four bytes give
32-bit precision. These bits can be added, subtracted,
moved around, etc., by switching each bit individually on
or off, so a computer processor can be thought of as a big
network of (trillions of) switches. Transistors are the basic
switches in computers. We will learn more about them
in Chapter 3, but for now, the important thing to know is
that they can act as very tiny, very fast, very low power
switches. Trillions of transistors are built directly onto a
single silicon wafer (read more about how in Technology
Brief 7), producing very-large-scale integrated (VLSI)
circuits or chips. Transistors are characterized by their
feature size, which is the smallest line width that can
be drawn in that VLSI manufacturing process. Larger
transistors are used for handling more current (such as
in the power distribution system for the chip). Smaller
transistors are used where speed and efficiency are
critical. The 22 nm processes available today can make
lines and features ∼22 nm in dimension. They produce
transistors that are about 100 nm on a side, switched
on and off over 100 billion times a second (it would
take you over 2000 years to flip a light switch that many
times),† and can do about 751 billion operations per watt.‡
Even smaller, 5 nm transistors are expected to become
commercially viable by 2020. The VLSI design engineer
uses computer-aided design (CAD) tools to design
chips by combining transistors into larger subsystems
(such as logic gates that add/multiply/etc.), choosing the
smallest, fastest transistors that can be used for every
part of the circuit.
The following questions then arise: How small can we
go? What is the fundamental limit to shrinking down the
size of a transistor? As we ponder this, we immediately
observe that we likely cannot make a transistor smaller
than the diameter of one silicon or metal atom (i.e., ∼0.2
to 0.8 nm). But is there a limit prior to this? Well, as
we shrink transistors down to the point that they are
† http://download.intel.com/newsroom/kits/22nm/pdfs/22nm Fun Facts.pdf
‡ https://newsroom.intel.com/servlet/JiveServlet/previewBody/2834-102-
1-5130/Intel%20at%20VLSI%20Fact%20Sheet.pdf
CPU power density (W/cm2)
TECHNOLOGY BRIEF 1: MICRO- AND NANOTECHNOLOGY
100
AMD
Intel
Power PC
Multicores
Power dissipation
10
Single cores
1
1990 1994 1998 2002 2006 2010
Year
Surface area
Heat flux
13
Light Bulb
Integrated Circuit
100 W
50 W
106 cm2
(bulb surface area)
1.5 cm2 (die area)
0.9 W/cm2
33.3 W/cm2
Figure TF1-5: (a) Heat power density generated by consumer processors (From "Energy Dissipation and Transport in
Nanoscale Devices" by E. Pop, Nano Research, V3, 2010, (b) heat generation by a light bulb and a typical processor.
made of just one or a few atomic layers (∼1 to 5 nm),
we run into issues related to the stochastic nature of
quantum physics. At these scales, the random motion
of electrons between both physical space and energy
levels becomes significant with respect to the size of
the transistor, and we start to get spurious or random
signals in the circuit.There are even more subtle problems
related to the statistics of yield. If a certain piece of
a transistor contained only 10 atoms, a deviation of
just one atom in the device (to a 9-atom or an 11atom transistor) represents a huge change in the device
properties! This would make it increasingly difficult to
economically fabricate chips with hundreds of millions
of transistors. Additionally, there is an interesting issue
of heat generation: Like any dissipative device, each
transistor gives off a small amount of heat. But when
you add up the heat produced by more than 1 billion
transistors, you get a very large number! Figure TF1-5
compares the power density (due to heat) produced by
different processors over time. The heat generated by
single core processors increased exponentially until the
mid-2000s when power densities began approaching 100
W/cm2 (in comparison, a nuclear reactor produces about
200 W/cm2 !). The inability to practically dissipate that
much heat led, in part, to the development of multicore
processors and a leveling off of heat generation for
consumer processors.
None of these issues are insurmountable. Challenges
simply spur creative people to come up with innovative
solutions. Many of these problems will be solved,
and in the process, provide engineers (like you)
with jobs and opportunities. But, more importantly,
the minimum feature size of a processor is not
the end goal of innovation: it is the means to it.
Innovation seeks simply to make increasingly powerful
computation, not smaller feature sizes. Hence, the
move towards multicore processors. By sharing the
workload among various processors (called distributed
computing) we increase processor performance while
using less energy, generating less heat, and without
needing to run at warp speed. So it seems, as we
approach ever-smaller features, we simply will creatively
transition into new physical technologies and also new
computational techniques. As Gordon Moore himself
said, “It will not be like we hit a brick wall and
stop.”
Scaling Trends and Nanotechnology
It is an observable fact that each generation of tools
enables the construction of an even newer, smaller,
more powerful generation of tools. This is true not just
of mechanical devices, but electronic ones as well.
Today’s high-power processors could not have been
designed, much less tested, without the use of previous
processors that were employed to draw and simulate the
next generation. Two observations can be made in this
regard. First, we now have the technology to build tools
14
TECHNOLOGY BRIEF 1: MICRO- AND NANOTECHNOLOGY
Figure TF1-6: Time plot of computer processing power in MIPS per $1000. (From “When will computer hardware match the
human brain?” by Hans Moravec, Journal of Transhumanism, Vol. 1, 1998.)
to manipulate the environment at atomic resolution. At
least one generation of micro-scale techniques (ranging
from microelectromechanical systems—or MEMS—
to micro-chemical devices) has been developed that,
while useful in themselves, are also enabling the
construction of newer, nano-scale devices. These newer
devices range from 5 nm transistors to femtoliter (10−15 )
microfluidic devices that can manipulate single protein
molecules. At these scales, the lines between mechanics,
electronics, and chemistry begin to blur! It is to these
ever-increasing interdisciplinary innovations that the term
nanotechnology rightfully belongs. Second, the rate
at which these innovations are occurring seems to be
increasing exponentially! (Consider Fig. TF1-6 and note
that the y axis is logarithmic and the plots are very
close to straight lines.) Keeping up with rapidly changing
technology is one of the exciting and challenging
aspects of an engineering career. Electrical engineers
use the Institute of Electrical and Electronic Engineers
(IEEE) to find professional publications, workshops, and
conferences to provide lifelong learning opportunities to
stay current and creative (see IEEE.org).
1-3
CIRCUIT REPRESENTATION
15
As a general rule, we use:
• A lowercase letter, such as i for current, to represent
the general case:
i
may or may not be time-varying
• A lowercase letter followed with (t) to emphasize
time:
i(t)
is a time-varying quantity
• An uppercase letter if the quantity is not timevarying; thus:
I
is of constant value (dc quantity)
• A letter printed in boldface to denote that:
I
has a specific meaning, such as a vector, a
matrix, the phasor counterpart of i(t), or the Laplace
or Fourier transform of i(t)
Exercise 1-1: Convert the following quantities to
scientific notation: (a) 52 mV, (b) 0.3 MV, (c) 136 nA,
and (d) 0.05 Gbits/s.
Answer: (a) 5.2 × 10−2 V, (b) 3 × 105 V,
(c) 1.36 × 10−7 A, and (d) 5 × 107 bits/s. (See
)
Exercise 1-2: Convert the following quantities to a prefix
format such that the number preceding the prefix is
between 1 and 999: (a) 8.32 × 107 Hz, (b) 1.67 × 10−8 m,
(c) 9.79 × 10−16 g, (d) 4.48 × 1013V, and (e) 762 bits/s.
Answer: (a) 83.2 MHz, (b) 16.7 nm, (c) 979 ag,
(d) 44.8 TV, and (e) 762 bits/s. (See
)
Exercise 1-3: Simplify the following operations into
a single number, expressed in prefix format: (a)
A = 10 μV + 2.3 mV, (b) B = 4THz − 230 GHz, (c)
C = 3 mm/60 μm.
Answer: (a) A = 2.31 mV, (b) B = 3.77 THz, (c)
C = 50. (See
)
1-3 Circuit Representation
When we design circuits, we first think of what we want the
circuit to do (its functional block diagram), then we design
circuits to do this (a circuit diagram). We then select and lay
out the components in the circuit (PCB layout) and build it. Let’s
consider a capacitive-touch sensor such as the touch screen on
the iphone. The circuit includes a flat conducting plate, two ICs,
), and several resistors and capacitors. When
one diode (
the plate is touched by a finger, the capacitance introduced
by the finger causes the output voltage to rise above a preset
threshold, signifying the fact that the plate has been touched.
The voltage rise can then be used to trigger a follow-up circuit
such as a light-emitting diode (LED). Figure 1-4 contains four
parts: (a) a block diagram of a circuit designed as a capacitortouch-sensor, (b) a circuit diagram representing the circuit’s
electrical configuration, (c) the circuit’s printed-circuit-board
(PCB) layout, and (d) a photograph of the circuit with all of its
components.
The PCB layout shown in part (c) of Fig. 1-4 displays
the intended locations of the circuit elements and the printed
conducting lines needed to connect the elements to each other.
These lines are used in lieu of wires. The diagram in part (b)
is the symbolic representation of the physical circuit. In this
particular representation the resistors are drawn as rectangular
boxes instead of the more familiar symbol
. Designing
the PCB layout and the circuit’s physical architecture is an
important step in the production process, but it is outside the
scope of this book. Our prime interest is to help the reader
understand how circuits work, and to use that understanding to
design circuits to perform functions of interest. Accordingly,
circuit diagrams will be regarded as true representations of the
many circuits and systems we discuss in this and the following
chapters.
1-3.1 Circuit Elements
Table 1-3 provides a partial list of the symbols used in this book
to represent circuit elements in circuit diagrams.
By way of an example, the diagram in Fig. 1-5 contains the
following elements:
• A 12 V ac source, denoted by the symbol
~+− .An ac source
varies sinusoidally with time (such as a 60 Hz wall outlet).
+
• A 6 V dc source, denoted by the symbol _
is constant in time (such as a battery).
• Six resistors, all denoted by the symbol
• One capacitor, denoted by the symbol
• One inductor, denoted by the symbol
. A dc source
16
CHAPTER 1
CIRCUIT TERMINOLOGY
LED
Sensor
Sensor
Volt: 0
Volt: 1.5 V
(a) Block diagram
(b) Circuit diagram
5 V power supply to be connected here
Metal plate Capacitor IC Diode Resistor
Output voltage
(c) Printed circuit board (PCB)
(d) Actual circuit
Figure 1-4: (a) Block diagram, (b) circuit diagram, (c) printed-circuit-board (PCB) layout, (d) photograph of a touch-sensor circuit.
• An important integrated circuit known as an operational
amplifier (or op amp for short), denoted by a triangular
symbol (the internal circuit of the op amp is not shown).
1-3.2
Circuit Architecture
The vocabulary commonly used to describe the architecture of
an electric circuit includes a number of important terms. Short,
but precise, definitions follow.
• Node: electrical conductor(s) or wires that connect two
or more circuit elements. The node is not just a point, but
includes the entire set of wires between two or more circuit
elements. Nodes are color-coded in Fig. 1-5. For example,
node N1 is red, N2 is green, and N3 is orange. The dot at N1
is typically used to emphasize that the wires are actually
connected together. All conductors in a node always have
the same voltage.
• Ordinary node: an electrical connection point that
connects only two elements, such as all the yellow nodes
in Fig. 1-5.
• Extraordinary node: node connected to three or more
elements. Figure 1-5 contains four extraordinary nodes,
denoted N1 through N4 , of which N4 has been selected as
a reference voltage node, often referred to as the ground
node. When two points with no element between them are
connected by a conducting wire, they are regarded as the
1-3
CIRCUIT REPRESENTATION
Ordinary node
17
~
υ1 = 12 cos (377t) V +
ac source −
+
υ2 = 6 V
dc source _
R4
Extraordinary Capacitor
Branch containing R1
node
C
R1
R3
N1
N2
+
_
Op amp
Conducting
wire
R2
Inductor
R5
L
Loop 1
N4
Loop 2
N3
R6
N4
Ground
Same node
Figure 1-5: Diagram representing a circuit that contains dc and ac sources, passive elements (six resistors, one capacitor, and one inductor),
and one active element (operational amplifier). Ordinary nodes are in yellow, extraordinary nodes in other colors, and the ground node in
black.
same node. Hence, all of the black wires together located
at the bottom of the circuit in Fig. 1-5 make up node N4 .
• Branch: the trace between two consecutive nodes
containing one and only one element between them.
I
+ V1 _
Battery
+
• Path: any continuous sequence of branches, provided that
no one node is encountered more than once. The path
between nodes N1 and N2 consists of two branches, one
containing R3 and another containing C.
+ V2 _
_
(a) Series circuit
I1
+ V _
• Loop: a closed path in which the start and end node is one
and the same. Figure 1-5 contains several loops, of which
two are shown explicitly.
I2
• Mesh: a loop that encloses no other loop. In Fig. 1-5,
Loop 1 is a mesh, but Loop 2 is not.
• In series: path in which elements share the same current.
As you move along a series path you encounter only
ordinary nodes. Elements on these paths are in series. In
Fig. 1-6(a), the two light bulbs are in series because the
same current flows through both of them. Also, in Fig. 1-5,
the two sources and R1 are all in series, as are R2 and L,
and R3 and C.
+ V _
Battery
+
_
(b) Parallel circuit
Figure 1-6: Two light bulbs connected (a) in series and (b) in
parallel.
18
CHAPTER 1
Table 1-3: Symbols for common circuit elements.
A
Table 1-4: Circuit terminology.
Node: An electrical connection between two or more
elements.
A
or
CIRCUIT TERMINOLOGY
Conductor Two conductors Two conductors
(wire)
electrically joined
not joined
at node A
electrically
Ordinary node: An electrical connection node that
connects to only two elements.
Extraordinary node: An electrical connection node that
connects to three or more elements.
Branch: Trace between two consecutive nodes with only
one element between them.
Fixed-value
resistor
Variable resistor
10 V
Inductor
+
_
10 V dc
battery
Loop: Closed path with the same start and end node.
Independent loop: Loop containing one or more branches
not contained in any other independent loop.
12 V ac
source
Mesh: Loop that encloses no other loops.
In series: Elements that share the same current. They have
only ordinary nodes between them.
+
_
6 A current
source
Switch
Volts
VΩ
Transistor
υs
Dependent
voltage source
Operational
amplifier
Amps
I
A
com
Voltmeter
In parallel: Elements that share the same voltage. They
share two extraordinary nodes.
A summary of circuit terminology is given in Table 1-4.
Example 1-1: In Series and In Parallel
Ammeter
(a) For the circuit in Fig. 1-7(a):
is
Dependent
current source
Path: Continuous sequence of branches with no node
encountered more than once.
Extraordinary path: Path between two adjacent extraordinary nodes.
~+−
12 V
6A
+
<
Capacitor
(1) Which current is the same as I2 ?
Light-emitting
diode (LED)
(2) Under what circumstance would I1 = I2 ?
(b) For the circuit in Fig. 1-7(b):
(1) Which node voltages are at the same voltage as
node 4?
• In parallel: path in which elements share the same voltage,
which means they share the same pair of nodes. In
Fig. 1-6(b), the two bulbs are in parallel because they share
the same battery voltage across them. In Fig. 1-5 the series
combination (υ1 − υ2 − R1 ) is in parallel with the series
combination (R2 − L).
(2) Which node voltages are the same as the ground
voltage?
(c) Which elements, or combinations of elements, in the
circuits of Fig. 1-7 are connected in series and which are
connected in parallel?
1-3
CIRCUIT REPRESENTATION
I2
1Ω
I1
12 V
I5
+
+
_
4Ω
I3
1V
+_
+
6Ω
19
In parallel: 4 � resistor and combination 2. (Call this
combination 4.)
8Ω
+
+
_
5V
I4
Circuit in Fig. 1-7(b):
(a)
In series: none.
V4
V2 V1
V3
2Ω
4Ω
+
_
V6
6V
2Ω
V5
4Ω
V7
(b)
Figure 1-7: Circuits for Example 1-1.
Solution: (a) Two currents are the same if they flow in the
same branch and in the same direction. Hence:
(1) I2 = I4 .
(2) I1 = I2 only if I3 + I5
Also, combination 3, combination 4, and the 1 V source
are all in series.
= 0.
(b) Two nodes are electrically the same if the only connection
between them is a short circuit. Hence:
(1) V1 = V2 = V3 = V4 = V6 , relative to the ground node.
Hence, all five nodes are electrically the same.
(2) Nodes V5 and V7 are the same as the ground node.
(c) Two or more elements are connected electrically in series
if the same current flows through all of them, and they are
connected in parallel if they share the same nodes.
Circuit in Fig. 1-7(a):
In series: 8 � resistor and 5 V voltage source (call it
combination 1).
In series: 1 � resistor and 12 V voltage source (call it
combination 2).
In parallel: 6 � resistor and combination 1. (Call this
combination 3.)
In parallel: all five elements.
1-3.3
Planar Circuits
A circuit is planar if it is possible to draw it on a twodimensional plane without having any two of its branches
cross over or under one another (Fig. 1-8). If such a crossing is unavoidable, then the circuit is nonplanar.
This concept becomes particularly important when we construct
circuit boards (see Fig. 1-4) or layers on an integrated circuit.
To clarify what we mean, we start by examining the circuit
in Fig. 1-8(a). An initial examination of the circuit topology
might suggest that the circuit is nonplanar because the branches
containing resistors R3 and R4 appear to cross one another
without having physical contact between them (absence of a
solid dot at crossover point). However, if we redraw the branch
containing R4 on the outside, as shown in configuration (b) of
Fig. 1-8, we would then conclude that the circuit is planar after
all, and that is so because it is possible to draw it in a single
plane without crossovers. In contrast, the circuit in Fig. 1-8(c) is
indeed nonplanar because no matter how we might try to redraw
it, it will always include at least one crossover of branches.
Circuits in this book will be presumed to be planar. Concept Question 1-4: What is the difference between
the symbol for a dc voltage source and that for an ac
source? (See
)
Concept Question 1-5: What differentiates an extraordinary node from an ordinary node? A loop from a mesh?
(See
)
20
CHAPTER 1
CIRCUIT TERMINOLOGY
1-4 Electric Charge and Current
R1
Not a connection
R3
υ0
1-4.1
+
+
-_
At the atomic scale, all matter contains a mixture of neutrons,
positively charged protons, and negatively charged electrons.
The nature of the force induced by electric charge was
established by the French scientist Charles Augustin de
Coulomb (1736–1806) during the latter part of the 18th century.
This was followed by a series of experiments on electricity
and magnetism over the next 100 years, culminating in J. J.
Thompson’s discovery of the electron in 1897. Through these
and more recent investigations, we can ascribe to electric charge
the following fundamental properties:
R2
R4
R5
(a) Original circuit
R1
R3
+
+
-_
υ0
1. Charge can be either positive or negative.
R2
2. The fundamental (smallest) quantity of charge is that
of a single electron or proton. Its magnitude usually
is denoted by the letter e.
R5
3. According to the law of conservation of charge, the
(net) charge in a closed region can neither be created
nor destroyed.
R4
4. Two like charges repel one another, whereas two
charges of opposite polarity attract.
(b) Redrawn
R1
R3
υ0
+
+
-_
The unit for charge is the coulomb (C) and the magnitude of e
is
R2
R4
R5
R6
R8
Charge
R9
R7
(c) Nonplanar circuit
Figure 1-8: The branches containing R3 and R4 in (a) appear to
cross over one another, but redrawing the circuit as in (b) avoids
the crossover, thereby demonstrating that the circuit is planar.
e = 1.6 × 10−19
(C).
(1.1)
The symbol commonly used to represent charge is q. The charge
of a single proton is qp = e, and that of an electron, which is
equal in magnitude but opposite in polarity, is qe = −e. It is
important to note that the term charge implies “net charge,”
which is equal to the combined charge of all protons present
in any given region of space minus the combined charge of all
electrons in that region. Hence, charge is always an integral
multiple of e.
The actions by charges attracting or repelling each other
are responsible for the movement of charge from one
location to another, thereby constituting an electric current.
Consider the simple circuit in Fig. 1-9 depicting a battery of
voltage V connected across a resistor R using metal wires. The
arrangement gives rise to an electric current I given by Ohm’s
law (which is discussed in more detail in Chapter 2):
Concept Question 1-6: Color-code all of the nodes in
Fig. 1-8(b), using Fig. 1-5 as a model. (See
)
I=
V
.
R
(1.2)
1-4
ELECTRIC CHARGE AND CURRENT
21
t=0
Expanded view of wire
e-
e-
8V
+
_
Wire
Switch
i
100 Ω
60 m
Atom
Electron
Figure 1-10: After closing the switch, it takes only 0.2 μs to
observe a current in the resistor.
+
V _
I
R
e-
Figure 1-9: The current flowing in the wire is due to electron
transport through a drift process, as illustrated by the magnified
structure of the wire.
As shown in Fig. 1-9:
The current flows from the positive (+) terminal of
the battery to its negative (−) terminal, along the path
external to the battery. Through chemical or other means, the battery generates a supply
of electrons at its negatively labeled terminal by ionizing some
of the molecules of its constituent material. A convenient model
for characterizing the functionality of a battery is to regard the
internal path between its terminals as unavailable for the flow
of charge, forcing the electrons to flow from the (−) terminal,
through the external path, and towards the (+) terminal to
achieve neutrality. It is important to note that:
The direction of electric current I is defined to be
the same as the direction of flow that positive charges
would follow, which is opposite to the direction of flow
of electrons e− . Even though we talk about electrons flowing through the wires
and the resistor, in reality the process is a drift movement
rather than free-flow. The wire material consists of atoms
with loosely attached electrons. The positive polarity of the
(+) terminal exerts an attractive force on the electrons of the
hitherto neutral atoms adjacent to that terminal, causing some
of the loosely attached electrons to detach and jump to the (+)
terminal. The atoms that have lost those electrons now become
positively charged (ionized), thereby attracting electrons from
their neighbors and compelling them to detach from their hosts
and to attach themselves to the ionized atoms instead. This
process continues throughout the wire segment (between the
(+) battery terminal and the resistor), into the longitudinal path
of the resistor, and finally through the wire segment between
the resistor and the (−) terminal. The net result is that the
(−) terminal loses an electron and the (+) terminal gains one,
making it appear as if the very same electron that left the (−)
terminal actually flowed through the wires and the resistor and
finally appeared at the (+) terminal. It is as if the path itself
were not involved in the electron transfer, which is not the case.
The process of sequential migration of electrons from one
atom to the next is called electron drift, and it is this process
that gives rise to the flow of conduction current through a
circuit. To illustrate how important this process is in terms of
the electronic transmission of information, let us examine the
elementary transmission experiment represented by the circuit
shown in Fig. 1-10. The circuit consists of an 8-volt battery
and a switch on one end, a resistor on the other end, and a
60 m long two-wire transmission line in between. The wires
are made of copper, and they have a circular cross section with
a 2 mm diameter.After closing the switch, a current starts to flow
through the circuit. It is instructive to compare two velocities
associated with the consequence of closing the switch, namely
the actual (physical) drift velocity of the electrons inside the
copper wires and the transmission velocity (of the information
announcing that the switch has been closed) between the battery
and the resistor. For the specified parameters of the circuit
shown in Fig. 1-10, the electron drift velocity—which is the
actual physical velocity of the electrons along the wire—can
be calculated readily and shown to be on the order of only
10−4 m/s. Hence, it would take about 1 million seconds (∼ 10
days) for an electron to physically travel over a distance of
120 m. In contrast, the time delay between closing the switch at
the sending end and observing a response at the receiving end
(in the form of current flow through the resistor) is extremely
22
CHAPTER 1
Wire
Direction of
electron flow
Cross section
−
−
−
−
−
−
−
−
Electron
=
−5 A
Circuit
(a)
(b)
Figure 1-12: A current of 5 A flowing “downward” is the same
as −5 A flowing “upward” through the wire.
i
Current direction
Figure 1-11: Direction of (positive) current flow through a
conductor is opposite that of electrons.
short (≈ 0.2 μs). This is because the transmission velocity is
on the order of the velocity of light c = 3 × 108 m/s. Thus:
The rate at which information can be transmitted
electronically using conducting wires is about 12 orders
of magnitude faster than the actual transport velocity of
the electrons flowing through those wires! This fact is at the heart of what makes electronic communication
systems viable.
1-4.2
5A
Circuit
CIRCUIT TERMINOLOGY
The circuit segment denoted with an arrow in Fig. 1-12(a)
signifies that a current of 5 A is flowing through that wire
segment in the direction of the arrow. The same information
about the current magnitude and direction may be displayed as
in Fig. 1-12(b), where the arrow points in the opposite direction
and the current is expressed as −5 A.
When a battery is connected to a circuit, the resultant current
that flows through it usually is constant in time (Fig. 1-13(a))—
at least over the time duration of interest—in which case we
refer to it as a direct current or dc for short. In contrast, the
currents flowing in household systems (as well as in many
I
i(t)
dc
Current
ac
t
t
Moving charge gives rise to current.
Electric current is defined as the time rate of transfer
of electric charge across a specified cross section. For the wire segment depicted in Fig. 1-11, the current i flowing
through it is equal to the amount of charge dq that crosses the
wire’s cross section over an infinitesimal time duration dt, given
as
i=
dq
dt
(A),
(1.3)
(a)
(b)
i(t)
i(t)
Rising
Decaying
t
t
(c)
(d)
i(t)
Damped oscillatory
and the unit for current is the ampere (A). In general, both
positive and negative charges may flow across the hypothetical
interface, and the flow may occur in both directions.
By convention, the direction of i is defined to be the
direction of the net flow of (net) charge (positive minus
negative). t
(e)
Figure 1-13: Graphical illustrations of various types of current
variations with time.
1-4
ELECTRIC CHARGE AND CURRENT
23
electrical systems) are called alternating currents or simply ac,
because they vary sinusoidally with time (Fig. 1-13(b)). Other
time variations also may occur in circuits, such as exponential
rises and decays (Fig. 1-13(c) and (d)), exponentially damped
oscillations (Fig. 1-13(e)), and many others.
i(t)
6A
Current
t
As a reminder, we use uppercase letters, such as V
and I , to denote dc quantities (with no time variation), and
lowercase letters, such as υ and i, to denote the general
case, which may be either dc or ac. (a)
q(t)
Even though in the overwhelming majority of cases the
current flowing through a material is dominated by the
movement of electrons (as opposed to positively charged ions),
it is advisable to start thinking of the current in terms of positive
charge, primarily to avoid having to keep track of the fact that
current direction is defined to be in opposition to the direction
of flow of negative charges.
30 C
Charge
t
(b)
Example 1-2: Charge Transfer
In terms of the current i(t) flowing past a reference cross section
in a wire:
(a) Develop an expression for the cumulative charge q(t) that
has been transferred past that cross section up to time t. Apply
the result to the exponential current displayed in Fig. 1-14(a),
which is given by
0
for t < 0,
i(t) =
(1.4)
6e−0.2t A for t ≥ 0.
Figure 1-14: The current i(t) displayed in (a) generates the
cumulative charge q(t) displayed in (b).
where q(−∞) represents the charge that was transferred
through the wire “at the beginning of time.” We choose −∞
as a reference limit in the integration, because it allows us to
set q(−∞) = 0, implying that no charge had been transferred
prior to that point in time. Hence, Eq. (1.5) becomes
(b) Develop an expression for the net charge �Q(t1 , t2 ) that
flowed through the cross section between times t1 and t2 , and
then compute �Q for t1 = 1 s and t2 = 2 s.
Solution: (a) We start by rewriting Eq. (1.3) in the form:
dq = i dt.
Then by integrating both sides over the limits −∞ to t, we have
t
−∞
dq =
t
i dt,
which yields
q(t) − q(−∞) =
−∞
i dt,
(1.5)
i dt
(C).
(1.6)
−∞
For i(t) as given by Eq. (1.4), i(t) = 0 for t < 0. Upon changing
the lower integration limit to zero and inserting the expression
for i(t) in Eq. (1.6), the integration leads to
q(t) =
−∞
t
q(t) =
t
t
0
6e−0.2t dt =
−6 −0.2t t
e
= 30[1 − e−0.2t ] C.
0
0.2
A plot of q(t) versus t is displayed in Fig. 1-14(b). The
cumulative charge that would transfer after a long period of time
is obtained by setting t = +∞, which yields q(+∞) = 30 C.
(b) The cumulative charge that has flowed through the cross
section up to time t1 is q(t1 ), and a similar definition applies
24
CHAPTER 1
to q(t2 ). Hence, the net charge that flowed through the cross
section over the time interval between t1 and t2 is
�Q(t1 , t2 ) = q(t2 ) − q(t1 ) =
t2
−∞
i dt −
t1
−∞
i dt =
t2
CIRCUIT TERMINOLOGY
be verified either by graphing q(t) or by taking the second
derivative of q(t) and evaluating it at t = 10 s and at t = ∞).
At t = 10 s,
i dt.
q(10) = 5 × 10e−0.1×10 = 50e−1 = 18.4 C.
t1
For t1 = 1 s, t2 = 2 s, and i(t) as given by Eq. (1.4),
�Q(1, 2) =
2
1
6e−0.2t dt =
2
6e−0.2t −0.2 1
= −30(e−0.4 − e−0.2 ) = 4.45 C.
Concept Question 1-7: What are the four fundamental
properties of electric charge? (See
)
Concept Question 1-8: Is the direction of electric current
in a wire defined to be the same as or opposite to the
direction of flow of electrons? (See
)
Example 1-3: Current
The charge flowing past a certain location in a wire is given by
0
for t < 0,
q(t) =
5te−0.1t C for t ≥ 0.
Determine (a) the current at t = 0 and (b) the instant at which
q(t) is a maximum and the corresponding value of q.
Solution: (a) Application of Eq. (1.3) yields
i=
dq
d
= (5te−0.1t ) = 5e−0.1t − 0.5te−0.1t
dt
dt
= (5 − 0.5t)e−0.1t A.
Concept Question 1-9: How does electron drift lead to
the conduction of electric current? (See
)
Exercise 1-4: If the current flowing through a given
resistor in a circuit is given by i(t) = 5[1 − e−2t ] A for
t ≥ 0, determine the total amount of charge that passed
through the resistor between t = 0 and t = 0.2 s.
Answer: �Q(0, 0.2) = 0.18 C. (See
)
Exercise 1-5: If q(t) has the waveform shown
in Fig. E1.5, determine the corresponding current
waveform.
q(t)
Setting t = 0 in the expression gives i(0) = 5 A.
Note that i �= 0, even though q(t) = 0 at t = 0.
2C
(b) To determine the value of t at which q(t) is a maximum,
we find dq/dt and then set it equal to zero:
1
2
3
4
5
6
7
8
6
7
8
Answer:
which is satisfied when
i(t)
or
t = 10 s,
2A
as well as when
e
−0.1t
=0
t (s)
Figure E1.5
dq
= (5 − 0.5t)e−0.1t = 0,
dt
5 − 0.5t = 0
C3
or
t = ∞.
The first value (t = 10 s) corresponds to a maximum and the
second value (t = ∞) corresponds to a minimum (which can
1
−2 A
(See
C3
)
2
3
4
5
t (s)
1-5 VOLTAGE AND POWER
25
1-5 Voltage and Power
1-5.1 Voltage
The two primary quantities used in circuit analysis are electrical
current and voltage. Current is associated with the movement
(flow) of electric charge and voltage is associated with the
displacement or concentration of that charge. Before we offer
a formal definition for voltage, let us consider a water analogy.
Suppose we were to take a very small (differential) amount of
water of mass dm from ground level at elevation z = b and
raise it (pump it up) to an elevation z = a to fill a water tank,
as depicted in Fig. 1-15(a). Doing so requires the expenditure
of kinetic energy dw, which is gained by mass dm in the form
of gravitational potential energy. [Were we to open a valve to
allow the water to flow back down (under the force of gravity),
the water would expend its potential energy by converting it into
kinetic energy as it flows downward.] At height a, mass dm has
potential energy dw relative to the ground surface. Accordingly,
we can define a “gravitational voltage” Vab as
Vab
dw
=
.
dm
z=a
h
z=b
(a) Raising water from ground level at b to height a
e
(1.7a)
Thus, Vab is a measure of the potential energy change dw, per
differential mass dm, between heights a and b.
Next, we consider the electrical voltage associated with
the electrical force of attraction between charges of opposite
polarity. Let us examine the energy implications of polarizing
a hitherto neutral material, thereby establishing opposite
electrical polarities on its two ends. Suppose we have a piece of
material (such as a resistor) to which we connect two short wires
and label their end points a and b, as shown in Fig. 1-15(b). At
each point, we have two small metal plates, the combination of
which constitutes a capacitor. Starting out with an electrically
neutral structure, assume that we are able to detach an electron
from one of the atoms at point a and move it to point b. Moving
a negative charge from the (remaining) positively charged
atom against the attraction force between them requires the
expenditure of a certain amount of energy. Voltage is a measure
of this expenditure of energy relative to the amount of charge
involved, and it always involves two spatial locations:
Voltage often is denoted υab to emphasize the fact that
it is the voltage difference between points a and b. The two points may be two locations in a circuit or any two
points in space.
Against this background, we now offer the following formal
definition for voltage:
e
_
a
+ +
_
υab
e
_
_ _
b
(b) Moving charge from a to b
Figure 1-15: Moving charge dq through the material in (b) is
analogous to raising mass dm in (a).
The voltage υab between location a and location b is
the ratio of dw to dq, where dw is the energy in joules
(J) required to move (positive) charge dq from b to a (or
negative charge from a to b). That is,
υab =
dw
,
dq
(1.7b)
and the unit for voltage is the volt (V), named after the inventor
of the first battery, Alessandro Volta (1745–1827). Voltage also
is called potential difference. In terms of that terminology, if
υab has a positive value, it means that point a is at a potential
higher than that of point b. Accordingly, points a and b in
Fig. 1-15(b) are denoted with (+) and (−) signs, respectively.
If υab = 5 V, we often use the terminology: “The voltage rise
from b to a is 5 V,” or “The voltage drop from a to b is 5 V.”
26
CHAPTER 1
a
12 V
Circuit
a
=
−12 V
Circuit
b
(a)
b
V3 = 12 V
Node 3
12 V
R1
CIRCUIT TERMINOLOGY
V1 = 6 V
Node 1
+
_
Node 4
Figure 1-16: In (a), with the (+) designation at node a,
V4 = 0
Vab = 12 V. In (b), with the (+) designation at node b,
Vba = −12 V, which is equivalent to Vab = 12 V. [That is,
Vab = −Vba .]
Ground
Let us look again at the water and circuit analogies in
Fig. 1-15. We originally considered only a very localized
potential difference as we pumped the water up into the tank.
But its total potential energy (the ability to create water pressure
in your shower!) is different if this tank is on a hill or in a valley.
In order to design a water system for a city, we have to define
some location to be the real “ground” point from which all
other heights are measured. For convenience, this is typically
the lowest elevation in the terrain.
Similarly, for the electrical system we originally considered
only a very localized potential difference as we moved electric
charge from one plate of the capacitor to the other. But the
potential of such a capacitor (the ability to turn on a light bulb)
depends not only on how much energy it has, but also on how
and where it is connected in the rest of the circuit. In order to
design an electrical system, we have to define some location to
be the real “ground” location from which all other voltages are
calculated. For convenience, this is typically the lowest voltage
in the system. For mobile systems, this is usually the chassis
or metal structure (called chassis ground), and for buildings
and fixed systems, this is typically the Earth ground (usually
physical rods or poles are buried in the dirt near the structure).
Since by definition voltage is not an absolute quantity but
rather the difference in electric potential between two locations,
it is often convenient to select a reference point in the circuit,
V2 = 4 V
Node 2
R4
R3
(b)
Just as 5 A of current flowing from a to b in a circuit
conveys the same information as −5 A flowing in the opposite
direction, a similar analogy applies to voltage. Thus, the two
representations in Fig. 1-16 convey the same information with
regard to the voltage between terminals a and b. Also, the terms
dc and ac defined earlier for current apply to voltage as well.
A constant voltage is called a dc voltage and a sinusoidally
time-varying voltage is called an ac voltage.
R2
Voltage reference (ground)
(a) Ground = Node 4
V3 = 6 V
Node 3
12 V
+
_
R1
V1 = 0
Voltage reference
R2
Node 1
R3
V2 = −2 V
Node 2
R4
Node 4
V4 = −6 V
(b) Ground = Node 1
Figure 1-17: Ground is any point in the circuit selected to serve
as a reference point for all points in the circuit.
label it ground, and then define the voltage at any point in the
circuit with respect to that ground point. Thus, when we say that
the voltage V1 at node 1 in Fig. 1-17(a) is 6 V, we mean that the
potential difference between node 1 and the ground reference
point (node 4) is 6 V, which is equivalent to having assigned
the ground node a voltage of zero. Also, since V1 = 6 V and
V2 = 4 V, it follows that
V12 = V1 − V2 = 6 − 4 = 2 V.
The voltage at node 3 is V3 = 12 V, relative to node 4. This is
because nodes 3 and 4 are separated by a 12 V voltage source
with its (+) terminal next to node 3 and (−) terminal next to
node 4.
Had we chosen a node other than node 4 as our ground node,
node voltages V1 to V4 would have had entirely different values
(see Example 1-4). The takeaway message is:
1-5 VOLTAGE AND POWER
27
Node voltages are defined relative to a specific
reference (ground) node whose voltage is assigned a
voltage of zero. If a different node is selected as ground,
the values of the node voltages may change to reflect the
fact that the reference node has changed. Voltage difference is defined between any two nodes. It is
often denoted with two subscripts, as in V12 = V1 − V2 , where
V1 and V2 are the voltages at nodes 1 and 2, with both defined
to a common reference (ground).
Volts
Voltmeter
+
Vs _
In Fig. 1-17(a), node 4 was selected as the ground node.
Suppose node 1 is selected as the ground node instead, as shown
in Fig. 1-17(b). Use the information in Fig. 1-17(a) to determine
node voltages V2 to V4 when defined relative to V1 at node 1.
Solution: In the circuit of Fig. 1-17(a), V2 is 2 V lower
in level than V1 (4 V compared to 6 V). Hence, in the new
configuration in Fig. 1-17(b), V2 will still be 2 V lower
than V1 , and since V1 = 0, it follows that V2 = −2 V. Similarly,
V3 = 6 V and V4 = −6 V.
To summarize:
=
=
=
=
node 4 = ground
6V
4V
12 V
0V
1
2
R
I
Ammeter
(a) Voltmeter and ammeter connections
Example 1-4: Node Voltages
V1
V2
V3
V4
Amps
V12
node 1 = ground
0
−2 V
6V
−6 V
When a circuit is constructed in a laboratory, the chassis
often is used as the common ground point—in which case it
is called chassis ground. As discussed later in Section 10-1,
in a household electrical network, outlets are connected to
three wires—one of which is called Earth ground because it is
connected to the physical ground next to the house.
Node Va
Vs
+
_
R1
Node Vb
R2
Measures
Vab
Measures Va
(relative to
ground)
(b) Voltmeters connected to measure voltage difference
Vab and node voltage Va (relative to ground)
Figure 1-18: An ideal voltmeter measures the voltage
difference between two points (such as nodes 1 and 2 in (a))
without interfering with the circuit (i.e., no current runs through
the voltmeter). Similarly, an ideal ammeter measures the current
magnitude and direction with no voltage drop across itself. In (b),
one voltmeter is used to measure voltage difference Vab and
another to measure node voltage Va . Note the polarity of the
meters. The red leads are connected to the + terminals of the
voltages or currents, and the black leads are connected to the −
terminals of the voltages or currents. For the voltmeter, the red
port on the left is (+) and the black port in the center is (−), and
for the ammeter the red port on the right is the (+).
Measuring voltage and current
The voltmeter is the standard instrument used to measure the
voltage difference between two points in a circuit. To measure
V12 in the circuit of Fig. 1-18, we connect the (+) red terminal
of the voltmeter to terminal 1 and the (−) black terminal to
terminal 2 in parallel with V12 . To measure a node voltage,
we connect the (+) red terminal to the node and the (−) black
terminal to the ground node. Connecting the voltmeter to the
circuit does not require any changes to the circuit, and in the
ideal case, the presence of the voltmeter has no effect on any of
the voltages and currents associated with the circuit. In reality,
the voltmeter has to extract some current from the circuit in
order to perform the voltage measurement, but the voltmeter is
designed such that the amount of extracted current is so small
as to have a negligible effect on the circuit.
To measure the current flowing through a wire, it is necessary
to insert an ammeter in series in that path, as illustrated by
Fig. 1-18(a). The ammeter is connected so that positive current
28
CHAPTER 1
I12 = 0
Open circuit
1
V
+
_
2
R1
V34 = 0
Short circuit
3
4
R2
t = t0
CIRCUIT TERMINOLOGY
SPST switches
t = t0
Switch initially open,
then closes at t = t0
Switch initially closed,
then opens at t = t0
(a)
1
Figure 1-19: Open circuit between terminals 1 and 2, and short
circuit between terminals 3 and 4.
SPDT switch
2
flows from the (+) red lead to the (−) black lead. The voltage
drop across an ideal ammeter is zero.
(b) Switch initially connected to terminal 1,
then moved to terminal 2 at t = t0
Open and short circuits
An open circuit refers to the condition of path
discontinuity (infinite resistance) between two points. No
current can flow through an open circuit, regardless of the
voltage across it. The path between terminals 1 and 2 in Fig. 1-19 is an open
circuit.
In contrast, a short circuit constitutes the condition of
complete path continuity (with zero electrical resistance)
between two points, such as between terminals 3 and 4 in
Fig. 1-19. No voltage drop occurs across a short circuit, regardless
of the magnitude of the current flowing through it. Switches
Switches come in many varieties, depending on the intended
function. They can be manual (such as an ordinary household
light switch) or electrically controlled by a voltage or current
(such as a circuit breaker). The simple ON/OFF switch depicted
in Fig. 1-20(a) is known as a single-pole single-throw (SPST)
switch. The ON (closed) position acts like a short circuit,
allowing current to flow while extracting no voltage drop across
the switch’s terminals; the OFF (open) position acts like an
open circuit. The specific time t = t0 denoted below or above
the switch (Fig. 1-20(a)) refers to the time t0 at which it opens
or closes.
t = t0
Figure 1-20: (a) Single-pole single-throw (SPST) and
(b) single-pole double-throw (SPDT) switches.
If the purpose of the switch is to combine two switching
functions so as to connect a common terminal to either of
two other terminals, then we need to use the single-pole
double-throw (SPDT) switch illustrated in Fig. 1-20(b). Before
t = t0 , the common terminal is connected to terminal 1; then at
t = t0 , that connection ceases (becomes open), and it is replaced
with a connection between the common terminal and terminal 2.
1-5.2
Power
The circuit shown in Fig. 1-21(a) consists of a battery and a
light bulb connected by an SPST switch in the open position.
No current flows through the open circuit, but the battery
has a voltage Vbat across it, due to the excess positive and
negative charges it has at its two terminals. After the switch
is closed at t = 5 s, as indicated in Fig. 1-21(b), a current I
will flow through the circuit along the indicated direction. The
battery’s excess positive charges flow from its positive terminal
downward through the light bulb towards the battery’s negative
terminal, and (since current direction is defined to coincide with
the direction of flow of positive charge) the current direction is
as indicated in the figure.
The consequences of current flow through the circuit are: (1)
The battery acts as a supplier of power and (2) The light bulb
acts as a recipient of power, which gets absorbed by its filament,
causing it to heat up and glow, resulting in the conversion of
electrical power into light and heat.
1-5 VOLTAGE AND POWER
29
Passive Sign Convention
Switch open
i
+
Vbat _
p>0
p<0
(a)
+
Vbat _
Device
p = υi
power delivered to device
power supplied by device
Note that i direction is defined as entering
(+) side of υ.
I
Switch closes at t = 5 s
υ
Figure 1-22: Passive sign convention.
+
Vbulb
or simply
_
p = υi
(b)
(W).
(1.9)
Consistent with the passive sign convention:
Figure 1-21: Current flow through a resistor (light-bulb
filament) after closing the switch.
A power supply, such as a battery, offers a voltage rise
across it as we follow the current from the terminal at
which it enters (denoted with a (−) sign) to the terminal
from which it leaves (denoted with a (+) sign). In contrast,
a power recipient (such as a light bulb) exhibits a voltage
drop across its corresponding terminals. This set of
assignments of voltage polarities relative to the direction
of current flow for devices generating power versus those
consuming power is known as the passive sign convention
(Fig. 1-22). We will adhere to it throughout the book. Our next task is to establish an expression for the power p
delivered to or received by an electrical device. By definition,
power is the time rate of change of energy,
dw
p=
dt
(W),
(1.8)
and its unit is the watt (W), named after the Scottish engineer
and inventor James Watt (1736–1819), who is credited with the
development of the steam engine from an embryonic stage into
a viable and efficient source of power. Using Eqs. (1.3) and
(1.7b), we can rewrite Eq. (1.8) as
p=
dw dq
dw
=
·
dt
dq dt
The power delivered to a device is equal to the voltage
across it multiplied by the current entering through its (+)
voltage terminal. For example, a 100 W light bulb in a 120 V household electrical
system draws 0.83 A of current.
If the algebraic value of p is negative, then the device is a
supplier of energy. For an isolated electric circuit composed of
multiple elements, the law of conservation of power requires
that the algebraic sum of power for the entire circuit be always
zero. That is, for a circuit with n elements,
n
k=1
pk = 0,
(1.10)
which means that the total power supplied by the circuit always
must equal the total power absorbed by it.
Power supplies are sometimes assigned ratings to describe
their capacities to deliver energy. A battery may be rated as
having an output capacity of 200 ampere-hours (Ah) at 9 volts,
which means that it can deliver a current I over a period of
time T (measured in hours) such that I T = 200 Ah, and it
can do so while maintaining a voltage of 9 V. Alternatively, its
output capacity may be expressed as 1.8 kilowatt-hours (kWh),
which represents the total amount of energy it can supply,
namely W = V I T (with T in hours).
30
Technology Brief 2
Voltage: How Big Is Big?
Electrical voltage plays a central role in all of our electrical
circuits, our bodies, and many other effects seen in the
natural world. Table TT2-1 gives some perspective on
really little and really big voltages.
Big Voltages: Lightning
Lightning begins with clouds and the water cycle.
Storm clouds have tremendous amounts of turbulent air
(updrafts and downdrafts). This results in a thunderhead,
a cumulonimbus cloud that has the typical vertical shape
we all associate with a storm coming on. These clouds
can build quite suddenly from otherwise mild skies, thus
bringing on the classic afternoon thunderstorm. Freezing
and collisions of the water particles in the cloud break
some of the electrons away from the particles, making the
storm clouds positively charged at the top and negatively
charged at the bottom (Fig. TF2-1). This creates a voltage
TECHNOLOGY BRIEF 2: VOLTAGE: HOW BIG IS BIG?
Table TT2-1: A wide range of voltage levels.
Bird standing on a power line
(foot to foot)
Neuron action potential
Cardiac action potential
AA battery
TTL digital logic gates
Residential electricity (US)
High voltage lines
Static electricity
Lightning
10 mV
55 mV
100 mV
1.5 V
5V
110 V / 220 V
110 kV +
20 to 25 kV
1 billion volts
difference, similar to a battery, with values around a billion
volts!
Like a battery, these charges cannot just travel through
the air, because air is a good insulator. Normally, a
wire or other metal conductor would be needed in
order to carry the current from a battery. Not so with
lightning. The separation of charges (voltage difference)
creates an electric field. When the electric field is high
Figure TF2-1: Turbulent air causes negative charges to build up on the bottom of cumulonimbus clouds, separated from the
positive charges on the top. The negative charges attract positive charges from the Earth, which move to the top of tall objects.
A lightning strike can occur between the negative cloud and positive Earth charges.
TECHNOLOGY BRIEF 2: VOLTAGE: HOW BIG IS BIG?
enough (around 3 MV/m), the air breaks down and partially
ionizes. This means it changes from an insulator (that
cannot conduct electricity) to a conductor (that can).
The air breakdown creates ozone, and the “fresh
air” smell associated with lightning storms. The path
of ionized air is called a step leader. The negative
charges on the bottom of the cloud begin drawing
positive charge towards the Earth’s surface. The positive
charges are pulled as close to the negative cloud
charges as possible. They concentrate on the tops
of things that are tall, like trees, golfers, farmers on
their tractors, and hikers in the mountains. These
positive charges create streamers, reaching towards
the negative cloud charges. When a positive streamer
and a negative step leader meet, they can form a
complete path (like a wire) for lightning to travel from
the cloud to the ground (other types of lightning follow
a slightly different process). Silently, the lightning strike
occurs.
But the ionized air is only a partial conductor. When the
current of lightning passes through the resistive air, the
air heats up and expands so much and so quickly that
it causes a shock wave that produces a sound wave to
radiate away from the strike path. That’s thunder.
What should you do if a lightning storm approaches?
First, go indoors if you can, and stay away from water lines
and electrical appliances. Unplug sensitive electronics.
Lightning may strike the building, but the currents will pass
through the walls or the electrical system, to ground. If you
are outdoors, avoid high places, move off the ridges and
into draws and lowlands.
Also stay away from high, pointy things (such as tall
trees, flag poles, and raised golf clubs). Objects that are
pointy will concentrate the charge (and create a stronger
streamer) than things that are smooth and rounded.
Lightning rods use this principle to protect buildings and
structures. The lightning rod produces a much stronger
streamer than the rest of the building, so it is more
likely to be struck. The current from the lightning bolt can
then (hopefully safely) go down the cable to a ground
rod buried under the building. Figure TF2-2 shows an
example on the old rock church at Sleepy Hollow. Every
chimney and the weather vane on the steeple has a
separate lightning rod and cable. People and animals
also make good lightning rods. We are about 2/3 salt
water, which is a pretty good conductor, and we are tall
and pointy, similar to a lightning rod. Thus, people (and
other animals) are very capable of sending up positive
streamers that attract negative step leaders. Consider
your profile if you are golfing, hiking, horseback riding,
31
Figure TF2-2: Lightning rod and grounding cable on Old
Rock Church at Sleepy Hollow, New York. The lightning
rod attracts the strike by concentrating charges at its tip.
The cable shunts the current to ground, carrying it on the
outside of the (rock) church, rather than on the inside
where materials (wood, plaster, etc.) are more flammable.
The cable is large enough in diameter to carry the current
without burning, although it will still be hot to the touch after
a lightning strike.
riding on a tractor or mower. In all cases, you are the
tallest thing around. Golfers and farmers on tractors have
some of the highest incidences of lightning strikes. So,
avoid being a lightning rod. Avoid being the tallest thing
around.
32
TECHNOLOGY BRIEF 2: VOLTAGE: HOW BIG IS BIG?
Figure TF2-3: Radial, dendritic pattern of scorched grass caused by lightning strike of golf course pin flag. [From National
Geographic, Colton, 1950.]
The most common cause of lightning injury is not
a direct strike, but the ground current. When lightning
strikes, it brings negative charges from the cloud down
to the positively charged Earth. It then spreads those
charges until all of the negative lightning charges are
combined with positive Earth charges. Some of the
charge spreads over the surface of the ground. (See for
example the pattern on the ground by the golf flag in
Fig.TF2-3.) Some current also penetrates deeper into the
Earth. The charges spreading on the surface of the Earth
are called ground currents, and they are real currents that
can cause injury.
Electrical Safety
Electrical safety is a function of the current that goes
through your body. From Ohm’s Law we know that
I = V /R, so the current depends on the voltage and
resistance. The voltage depends on the source (see
Table TT2-1). The resistance depends on how you
connect to the voltage source—did you touch it with a dry
finger, a sweaty shoulder, or were you walking across a
wet field when lightning produced a ground current? Were
you wearing rubber soled tennis shoes or golf shoes with
metal cleats?
The minimum current a human can feel (the threshold
of sensation) depends on the frequency and whether
the current is ac, dc, or pulsed. Most people can feel
5 mA at dc or 1 mA at household 60 Hz ac. This
is generally considered benign, although most people
are not comfortable with the sensation. You will feel
a mildly painful current if you briefly touch a 9 V
battery to your tongue. A more dangerous condition
occurs around 10 mA when the muscles lock up and
cannot release an electrified object. This is the “let go
threshold” and is a criterion in electrical regulations
for shock hazard. Additional risk is associated with
sensitive organs, particularly those that are controlled
by electrical signals such as the heart and brain. As
little as 10 μV applied directly to the heart can cause
fibrillation. Typical voltages used to deliberately pace
the heart with internal defibrillators or pace makers are
−100 to 35 mV. You might have noticed a change
in units from current to voltage in this description.
Some disciplines use voltage, others use current,
mainly due to what they find easiest to measure. We
know they are related via Ohm’s law, although more
information is always needed to define the resistance
and the specific conditions under which it is assumed,
calculated, or measured. The ANSI/IEEE Standard 801986 uses 1 k� for the body resistance. Adding dry
shoes and standing on dry ground, the total resistance
is 5–10 k�.
Current flow requires two contact points (a node
where the current enters the body and a node where it
leaves). The resistance R is made up of a combination
of series and parallel resistances between these two
nodes. For example, in the case of lightning-induced
ground current, the current will typically enter one foot,
“book” — 2015/5/4 — 6:55 — page 33 — #33
TECHNOLOGY BRIEF 2: VOLTAGE: HOW BIG IS BIG?
33
Current Ibody
A
l
Vstrike = 100 kV
10 kV
9
Current Iground
8
7
Voltage =
6
5
4
r
Vstrike
1
2
4
3
πr 3
Figure TF2-4: Current path from a lightning strike.
travel through the body, and exit through the other foot.
The total resistance will be the sum of resistance from
one shoe (Rshoe ), the series and parallel resistances
as the current travels through the body to the other
foot (Rbody ), and the resistance of the other shoe
(Rshoe ). The total resistance R = Rshoe + Rbody + Rshoe
(see Fig. TF2-4). There is another resistance here too,
the resistance through the ground, which is parallel
to R, and it is controlled by soil type and moisture
content.
The resistance between the source of the current
and the body is often called the contact resistance
(in this case, it is Rshoe ). In applications where you
want to maximize the current in the body or other
object (such as reading the voltages from the heart with
an electromyogram (EMG)), you want to minimize the
contact resistance. This is often done by using large,
conducting electrodes to connect to the body, and placing
conductive gels between the electrode and the body. In
applications where you want to minimize the current in the
body (such as protection from electric shock), you want
to maximize the contact resistance. This can be done by
minimizing the surface area of the body in contact with
the current source and making sure the contact area
is dry and insulating (for instance wearing rubber-soled
shoes).
Electrical engineers protect people, buildings, circuits,
etc., in several ways. Preventing contact between the
source and a person or animal can be done with locked
buildings and fences, warning signs, and insulators as
simple as rubber handles on tools and fiberglass (rather
than aluminum) ladders. Circuit protection devices such
as circuit breakers and fuses limit the current by tripping
(opening the circuit up) if the current exceeds their
maximum rating. In circuit breakers, a bimetal junction
heats up when current passes through the element.
One metal heats up faster than the other, bending/
breaking away and disconnecting the circuit. Fuses
use a thin metal filament that burns away when its
current rating is exceeded, opening the circuit. Current
limiting resistors in series with other circuit elements
such as potentiometers prevent the resistance from
going to zero, thereby preventing large currents. Current
limiting devices are effective within moderate ranges
of voltage, but very high voltages such as lightning
can simply “jump the gaps” even when the circuit is
opened up. Rather than trying to simply “stop” the current,
protection from very high currents typically relies on
shunting the current away from more sensitive circuits,
sending it straight to ground. The lightning rod/cable
system is one example of this. The cable is a short
circuit straight to ground and is sized large enough to
carry these very large currents without melting. Other
lightning protection circuits use bypass capacitors or
various types of filters in parallel with the circuit being
protected.
34
CHAPTER 1
Example 1-5: Conservation of Power
For each of the two circuits shown in Fig. 1-23, determine how
much power is being delivered to each device and whether it is
a power supplier or recipient.
CIRCUIT TERMINOLOGY
0.2 A
12 V
Solution: (a) For the circuit in Fig. 1-23(a), the current
entering the (+) terminal of the device is 0.2 A. Hence, the
power P (where we use an uppercase letter because both the
current and voltage are dc) is:
+
_
Device
12 V
(a)
P = V I = 12 × 0.2 = 2.4 W,
and since P > 0, the device is a recipient of power. As we
know, the law of conservation of power requires that if the
device receives 2.4 W of power, then the battery has to deliver
exactly that same amount of power. For the battery, the current
entering its (+) terminal is −0.2 A (because 0.2 A of current is
shown leaving that terminal), so according to the passive sign
convention, the power that would be absorbed by the battery
(had it been a passive device) is
Device 1
18 V
12 V
+
_
6V
(b) For device 1 in Fig. 1-23(b), the current entering its (+)
terminal is 3 A. Hence,
P1 = V1 I1 = 18 × 3 = 54 W,
and the device is a power recipient.
For device 2,
Device 2
(b)
Pbat = 12(−0.2) = −2.4 W.
The fact that Pbat is negative is confirmation that the battery
is indeed a supplier of power.
3A
Figure 1-23: Circuits for Example 1-5.
Example 1-6: Energy Consumption
A resistor connected to a 100 V dc power supply was consuming
20 W of power until the switch was turned off, after which the
voltage decayed exponentially to zero. If t = 0 is defined as the
time at which the switch was turned to the off position and if
the subsequent voltage variation is given by
υ(t) = 100e−2t V
for t ≥ 0
P2 = V2 I2 = (−6) × 3 = −18 W,
(where t is in seconds), determine the total amount of energy
consumed by the resistor after the switch was turned off.
and the device is a supplier of power (because P2 is negative).
By way of confirmation, the power associated with the battery
is
Solution: Before t = 0, the current flowing through the
resistor was I = P /V = 20/100 = 0.2 A. Hence, the resistance R of the resistor is
Pbat = 12(−3) = −36 W,
thereby satisfying the law of conservation of power, which
requires the net power of the overall circuit to be exactly zero.
R=
100
V
=
= 500 �,
I
0.2
and the current variation after the switch was turned off is
i(t) =
υ(t)
= 0.2e−2t A
R
for t ≥ 0.
1-6
CIRCUIT ELEMENTS
35
The instantaneous power is
p(t) = υ(t) · i(t) = (100e−2t )(0.2e−2t ) = 20e−4t W.
We note that the power decays at a rate (e−4t ) much faster
than the rate for current and voltage (e−2t ). The total energy
dissipated in the resistor after engaging the switch is obtained
by integrating p(t) from t = 0 to infinity (the integral equation
form of Eq. (1.8)), namely
W =
∞
0
p(t) dt =
∞
0
20e−4t dt = −
20 −4t ∞
e = 5 J.
0
4
Concept Question 1-10: Explain how node voltage
relates to voltage difference. To what do the (+) and (−)
leads of the voltmeter connect to in each case?
(See
)
Exercise 1-6: If a positive current is flowing through a
resistor from its terminal a to its terminal b, is υab positive
or negative?
Answer: υab > 0. (See
C3
)
Exercise 1-7: A certain device has a voltage difference
of 5 V across it. If 2 A of current is flowing through it
from its (−) voltage terminal to its (+) terminal, is the
device a power supplier or a power recipient, and how
much energy does it supply or receive in 1 hour?
Answer: P = V I = 5(−2) = −10 W. Hence, the
device is a power supplier. Since p(t) = (not timeC)
varying), |W | = |P | �t = 36 kJ. (See
Exercise 1-8: A car radio draws 0.5 A of dc current when
connected to a 12 V battery. How long does it take for the
radio to consume 1.44 kJ?
Answer: 4 minutes. (See
1-6
)
Circuit Elements
Electronic circuits used in functional systems employ a wide
range of circuit elements, including transistors and integrated
circuits. The operation of most electronic circuits and devices—
no matter how complex—can be modeled (represented) in
terms of an equivalent circuit composed of basic elements
with idealized characteristics. The equivalent circuit offers a
circuit behavior that closely resembles the behavior of the actual
electronic circuit or device over a certain range of specified
conditions, such as the range of input signal level or output
load resistance. The set of basic elements commonly used in
circuit analysis include voltage and current sources; passive
elements (which include resistors, capacitors, and inductors);
and various types of switches. The basic attributes of switches
were covered in Section 1-5.1. The nomenclature and current–
voltage relationships associated with the other two groups are
the subject of this section.
1-6.1
i–υ Relationship
The relationship between the current flowing through a device
and the voltage across it defines the fundamental operation of
that device. As was stated earlier, Ohm’s law states that the
current i entering into the (+) terminal of the voltage υ across
a resistor is given by
υ
i=
.
R
This is called the i–υ relationship for the resistor. We note
that the resistor exhibits a linear i–υ relationship, meaning
that i and υ always vary in a proportional manner, as shown
in Fig. 1-24(a), so long as R remains constant. A circuit
composed exclusively of elements with linear i–υ responses
is called a linear circuit. The linearity property of a circuit
is an underlying requirement for the various circuit analysis
techniques presented in this and future chapters. Diodes
and transistors exhibit nonlinear i–υ relationships. To apply
the analysis techniques specific to linear circuits to circuits
containing nonlinear devices, we can represent those devices in
terms of linear subcircuits that contain dependent sources. The
concept of a dependent source and how it is used is introduced
in Section 1-6.4.
1-6.2
Independent Voltage Source
An ideal, independent voltage source provides a specified
voltage across its terminals, independent of the type of load
or circuit connected to it (so long as it is not a short circuit).
Hence, for a voltage source with a specified voltage Vs , its i–υ
relationship is given by
υ = Vs
for any i �= ∞.
The i–υ profile of an ideal voltage source is a vertical line, as
illustrated in Fig. 1-24(b).
36
CHAPTER 1
i
υ
i= R
CIRCUIT TERMINOLOGY
Rs
Resistor
1
Slope = R
υs
+
_
RL
υ
Realistic voltage source
Load
(a) Realistic voltage source connected to load RL
(a)
i
Is
υ = Vs
Ideal voltage source
Vs
i = Is
Ideal current source
υ
(b)
Rs
RL
Realistic current source
Load
(b) Realistic current source connected to load RL
Figure 1-25: (a) A realistic voltage source has a nonzero series
resistance Rs , which can be replaced with a short circuit if Rs
is much smaller than the load resistance RL . (b) A realistic
current source has a nonzero parallel resistance Rs , which can
be replaced with an open circuit if Rs RL .
υs
VCVS
υs = αυx
is
Slope = α
υx
(c)
Figure 1-24: i–υ relationships for (a) an ideal resistor, (b) ideal,
independent current and voltage sources, and (c) a dependent,
voltage-controlled voltage source (VCVS).
The circuit symbol used for independent sources is a
circle, as shown in Table 1-5, although for dc voltage
sources the traditional “battery” symbol is used as well. A
household electrical outlet connected through an electrical
power-distribution network to a hydroelectric- or nuclearpower generating station provides continuous power at an
approximately constant voltage level. Hence, it may be
classified appropriately as an independent voltage source. On a
shorter time scale, a flashlight’s 9-volt battery may be regarded
as an independent voltage source, but only until its stored charge
has been used up by the light bulb. Thus, strictly speaking, a
battery is a storage device (not a generator), but we tend to treat
it as a generator so long as it acts like a constant voltage source.
In reality, no sources can provide the performance
specifications ascribed to ideal sources. If a 5 V voltage source
is connected across a short circuit, for example, we run into
a serious problem of ambiguity. From the standpoint of the
source, the voltage is 5 V, but by definition, the voltage
across the short circuit is zero. How can it be both zero and
5 V simultaneously? The answer resides in the fact that our
description of the ideal voltage source breaks down in this
situation. Most often, in such cases, the circuit malfunctions as
well. Short-circuiting a battery will draw more current than the
battery is intended to provide, thereby overheating it, damaging
it, and possibly causing a fire or explosion.
A more realistic model for a voltage source includes an
internal series resistor, as shown in Fig. 1-25(a). A real voltage source (which may have an elaborate
circuit configuration) behaves like a combination of an
equivalent, ideal voltage source υs in series with an equivalent
resistance Rs . Usually, the voltage source is designed such that
its series resistance Rs is much smaller than the resistance values
of the types of loads it is intended to energize. Under such a
condition, Rs becomes inconsequential and can be ignored, in
which case the realistic voltage source behaves approximately
the same as an ideal voltage source.
1-6
CIRCUIT ELEMENTS
37
Table 1-5: Voltage and current sources.
Independent Sources
Ideal Voltage Source
Vs
+
-
Vs
or
Battery
+
+_
−
Realistic Voltage Source
Rs
υs
dc source
+
+_
−
Realistic Current Source
is
is
dc source
+
+
-_
Any source
Any source*
Ideal Current Source
Is
υs
Any source
Rs
Any source
Dependent Sources
Voltage-Controlled Voltage Source (VCVS)
+
υs = αυx
Current-Controlled Voltage Source (CCVS)
+
υs = rix
Voltage-Controlled Current Source (VCCS)
is = gυx
Current-Controlled Current Source (CCCS)
is = βix
Note: α, g, r, and β are constants; υx and ix are a specific voltage and a specific current elsewhere in the
circuit. ∗ Lowercase υ and i represent voltage and current sources that may or may not be time-varying,
whereas uppercase V and I denote dc sources.
1-6.3 Independent Current Source
Based on our common experience with stand-alone chemical
batteries used in cars, flashlights, and other systems, we readily
accept the notion of an electric circuit acting like a voltage
source by providing at its output terminals a specified voltage
level Vs . By contrast, there is no such thing as a “current battery,”
one that provides a constant current to flow through the load
connected to its terminals. Nevertheless, we can build an electric
circuit that behaves like a current source. An ideal, independent
current source provides a specified current flowing through it,
regardless of the voltage across it (except when connected to
an open circuit). Its i–υ relationship is
i = Is
for any υs �= ∞.
38
CHAPTER 1
The i–υ profile of an ideal current source is a horizontal line,
as shown in Fig. 1-24(b). A current source may be built from a
voltage source with a current limiter, so long as the voltage
source can supply the desired current independently of the
attached load.
In the same way that a realistic voltage source consists of
an ideal voltage source in series with a resistor Rs , a realistic
current source consists of an ideal current source is in parallel
with a resistor Rs (Fig. 1-25(b)). In a well-designed current
source, Rs is very large, thereby extracting from the current
source a very small fraction in comparison to the current that
flows into the load.
to determine VL at (a) room temperature (20 ◦ C) and (b) in
Antarctica at −40 ◦ C.
Solution: (a) From the plot in Fig. 1-26(b), Rs ≈ 0.15 � at
T = 20 ◦ C. Hence,
VL =
Vs
+
_
Rs
AA battery
(a) Battery circuit
VL =
RL
+
_
VL
Load
Battery resistance Rs (Ω)
Rs
1.0
0.8
0.6
0.4
0.2
T (˚C)
0
20
40
−20
Temperature (˚C)
(b) Temperature profile of Rs of AA battery
0
−40
Figure 1-26: Circuit and temperature profile of battery’s Rs of
Example 1-7.
10
0.15 + 10
× 1.5 = 1.4778 V,
which is within 1.5% of Vs = 1.5 V.
(b) At T = −40 ◦ C, Rs = 0.9 �. Hence,
Example 1-7: AA Battery
The circuit shown in Fig. 1-26(a) represents an AA battery, with
voltage Vs and internal resistance Rs , connected to a light bulb
represented by a load resistance RL = 10 �. If Vs = 1.5 V and
independent of ambient temperature, and Rs is as profiled in
Fig. 1-26(b), use the voltage division equation (which will be
derived later in Chapter 2) given by
RL
Vs
VL =
Rs + R L
CIRCUIT TERMINOLOGY
10
0.9 + 10
× 1.5 = 1.376 V.
In this case, ignoring Rs altogether would lead to an error
of about 8%. At low temperatures, batteries are less efficient
and often cease to provide the desired voltage and current, as
anyone whose car battery has “died” on a cold winter day has
discovered.
1-6.4
Dependent Sources
As alluded to in the opening paragraph of Section 1-6, we often
use equivalent circuits to model the behavior of transistors and
other electronic devices. The ability to represent complicated
devices by equivalent circuits composed of basic elements
greatly facilitates not only the circuit analysis process but
the design process as well. Such circuit models incorporate
the relationships between various parts of the device through
the use of a set of artificial sources known as dependent
sources. The voltage level of a dependent voltage source is
defined in terms of a specific voltage or current elsewhere in
the circuit. An example of circuit equivalence is illustrated
in Fig. 1-27. In part (a) of the figure, we have a Model 741
operational amplifier (op amp), denoted by the triangular
circuit symbol, used in a simple amplifier circuit intended to
provide a voltage amplification factor of −2; that is, the output
voltage υ0 = −2υs , where υs is the input signal voltage. The op
amp, which we will examine later in Chapter 4, is an electronic
device with a complex architecture composed of transistors,
resistors, capacitors, and diodes, but in practice, its circuit
behavior can be represented by a rather simple circuit consisting
of two resistors (input resistor Ri and output resistor Ro ) and a
dependent voltage source, as shown in Fig. 1-27(b). The voltage
υ2 on the right-hand side of the circuit in Fig. 1-27(b) is given
by υ2 = Aυi , where A is a very large constant (> 104 ) and υi
1-6
CIRCUIT ELEMENTS
39
30 kΩ
30 kΩ
15 kΩ
υs
+
_
15 kΩ
_
741
+
Op amp
υo
υs
+
_
(a) Op-amp circuit
Ro = 75 Ω
Op-amp
equivalent
υi
Ri = 3 MΩ
+
_ υ2 = Aυi
υo
(b) Equivalent circuit with dependent voltage source
Figure 1-27: An operational amplifier is a complex device, but its circuit behavior can be represented in terms of a simple equivalent
circuit that includes a dependent voltage source.
is the voltage across the resistor Ri located on the left-hand
side of the equivalent circuit. In this case, the magnitude of
υ2 always depends on the magnitude of υi , which depends in
turn on the input signal voltage υs and on the values chosen for
some of the resistors in the circuit. Since the controlling quantity
υi is a voltage, υ2 is called a voltage-controlled voltage source
(VCVS). Had the controlling quantity been a current source, the
dependent source would have been called a current-controlled
voltage source (CCVS) instead. A parallel analogy exists for
voltage-controlled and current-controlled current sources.
The characteristic symbol for a dependent source is the
diamond (Table 1-5). Proportionality constant α in Table 1-5 relates voltage to
voltage. Hence, it is dimensionless, as is β, since it relates
current to current. Constants g and r have units of (A/V)
and (V/A), respectively. Because dependent sources are
characterized by linear relationships, so are their i–υ profiles.
An example is shown in Fig. 1-24(c) for the VCVS.
5Ω
10 V
+
_
2Ω
+
_
I1
V1 = 4I1
Figure 1-28: Circuit for Example 1-8.
The 10 V dc voltage is connected across the 2 � resistor.
Hence, the current I1 along the designated direction is
I1 =
10
= 5 A.
2
Consequently,
V1 = 4I1 = 4 × 5 = 20 V.
Example 1-9: Switches
Example 1-8: Dependent Source
Find the magnitude of the voltage V1 of the dependent source
in Fig. 1-28. What type of source is it?
Solution: Since V1 depends on current I1 , it is a currentcontrolled voltage source with a coefficient of 4 V/A.
The circuit in Fig. 1-29 contains one SPDT switch that changes
position at t = 0, one SPST switch that opens at t = 0, and one
SPST switch that closes at t = 5 s. Generate circuit diagrams
that include only those elements that have current flowing
through them for (a) t < 0, (b) 0 ≤ t < 5 s, and (c) t ≥ 5 s.
Solution: See Fig. 1-30.
40
CHAPTER 1
R1
V0
+
Concept Question 1-11: What is the difference between
R6
R7
an SPST switch and an SPDT switch? (See
t=0
SPDT
−
CIRCUIT TERMINOLOGY
R2
SPST
SPST
t=5s
t=0
R5
)
R3
R4
Concept Question 1-12: What is the difference between
an independent voltage source and a dependent voltage
source? Is a dependent voltage source a real source of
power? (See
)
Figure 1-29: Circuit for Example 1-9.
R1
Concept Question 1-13: What is an “equivalent-circuit”
model? How is it used? (See
V0
+
−
R6
R2
Exercise 1-9: Find Ix from the diagram in Fig. E1.9.
R7
2Ω
+ V1
(a) t < 0
+
−
5Ω
R3
R4
R7
(b) 0 < t < 5 s
+
−
Ix =
Figure E1.9
Answer: Ix = 2.5 A. (See
)
I
SPDT
t=0
R3
R6
V1
4
Exercise 1-10: In the circuit of Fig. E1.10, find I at (a)
t < 0 and (b) t > 0.
R1
V0
_
5A
R1
V0
)
R5
R7
(c) t > 5 s
Figure 1-30: Solutions for circuit in Fig. 1-29.
12 V
+
_
3Ω
R4
4Ω
Figure E1.10
Answer: (a) I = 4 A, (b) I = 3 A. (See
)
SUMMARY
41
Summary
Concepts
• Active devices (such as transistors and ICs) require an
external power source to operate; in contrast, passive
devices (resistors, capacitors, and inductors) do not.
• Analysis and synthesis (design) are complementary
processes.
• Current is related to charge by i = dq/dt; voltage
between locations a and b is υab = dw/dq, where dw
is the work (energy) required to move dq from b to a;
and power p = υi.
• Passive sign convention assigns i direction as entering
Mathematical and Physical Models
Ohm’s law
the (+) side of υ; if p > 0, the device is recipient
(consumer) of power, and if p < 0, it is a supplier of
power.
• Node voltage refers to the voltage difference between
the node and ground by selecting Vground = 0.
• Independent voltage and current sources are real
sources of energy; dependent sources are artificial
representations used in modeling the nonlinear behavior
of active devices (transistors and integrated circuits) in
terms of an equivalent linear circuit.
Passive sign convention
Current
i = dq/dt
Direction of i = direction of flow of (+) charge
Charge transfer
q(t) =
�Q = q(t2 ) − q(t1 ) =
t2
t
p>0
p<0
i dt
ac
active device
Alexander Graham Bell
all-electronic computer
alternating current
ampere-hours
analysis
basic elements
branch
chassis ground
circuit
circuit diagram
conduction current
cumulative charge
Device
p = υi
power delivered to device
power supplied by device
Note that i direction is defined as entering
(+) side of υ.
−∞
i dt
Energy
t1
Voltage = potential energy difference per unit charge
Important Terms
υ
i
i = υ/R
w=
∞
p(t) dt
0
Provide definitions or explain the meaning of the following terms:
current-controlled
voltage source
dc
dependent voltage source
dependent source
design
device
dimension
direct current
drift
drift velocity
Earth ground
electric circuit
electric current
electron drift
electronic
electronic circuit
equivalent circuit
equivalent, ideal
voltage source
equivalent resistance
external
extraordinary node
functional block diagram
fundamental dimension
fundamental SI unit
ground
Guglielmo Marconi
42
CHAPTER 1
CIRCUIT TERMINOLOGY
Important Terms (continued)
Heinrich Hertz
i–υ relationship
ideal, independent
current source
ideal, independent
voltage source
in parallel
in series
input/output
integrated circuit
International System of Units
ionized
kilowatt-hours
law of conservation of power
linear circuit
linear i–υ relationship
loop
mesh
net charge
nonplanar
Ohm’s law
op amp
open circuit
operational amplifier
ordinary node
passive device
passive sign convention
path
PCB layout
planar
potential difference
prefix
printed circuit board
printed conducting lines
real voltage source
PROBLEMS
realistic current source
response
secondary dimension
short circuit
single-pole single-throw
single-pole double-throw
stimulus
synthesis
system
Thomas Edison
transistor
transmission velocity
unit
voltage-controlled
voltage source
voltage drop
voltage rise
1.3 Convert:
Sections 1-2 to 1-4: Dimensions, Charge, and Current
1.1 Use appropriate multiple and submultiple prefixes to
express the following quantities:
(a) 3,620 watts (W)
*(b) 0.000004 amps (A)
(a) 16.3 m to mm
(b) 16.3 m to km
*(c) 4 × 10−6 μF (microfarad) to pF (picofarad)
(d) 2.3 ns to μs
(e) 3.6 × 107 V to MV
(f) 0.03 mA (milliamp) to μA
(c) 5.2 × 10−6 ohms (�)
1.4 Convert:
(e) 0.02 meters (m)
(b) 3 hours to μseconds
(f) 32 × 105 volts (V)
(d) 173 nm to m
*(d) 3.9 × 1011 volts (V)
1.2 Use appropriate multiple and submultiple prefixes to
express the following quantities:
(a) 4.71 × 10−8 seconds (s)
(a) 4.2 m to μm
(c) 4.2 m to km
(e) 173 nm to μm
(f) 12 pF (picofarad) to F (farad)
(b) 10.3 × 108 watts (W)
1.5 For the circuit in Fig. P1.5:
(c) 0.00000000321 amps (A)
(a) Identify and label all distinct nodes.
(d) 0.1 meters (m)
(b) Which of those nodes are extraordinary nodes?
(e) 8,760,000 volts (V)
(c) Identify all combinations of 2 or more circuit elements that
are connected in series.
(f)
∗
3.16 × 10−16
hertz (Hz)
Answer(s) available in Appendix G.
(d) Identify pairs of circuit elements that are connected in
parallel.
PROBLEMS
43
1Ω
+
16 V _
1.8 For the circuit in Fig. P1.8:
3Ω
(a) Identify and label all distinct nodes.
4Ω
2Ω
5Ω
Figure P1.5: Circuit for Problem 1.5.
1.6
(b) Which of those nodes are extraordinary nodes?
(c) Identify all combinations of 2 or more circuit elements that
are connected in series.
(d) Identify pairs of circuit elements that are connected in
parallel.
For the circuit in Fig. P1.6:
(a) Identify and label all distinct nodes.
+
12 V _
(b) Which of those nodes are extraordinary nodes?
(d) Identify pairs of circuit elements that are connected in
parallel.
+
12 V _
10 Ω
5Ω
30 Ω
15 Ω
20 Ω
Figure P1.8: Circuit for Problem 1.8.
4Ω
+
_ 8V
2Ω
40 Ω
60 Ω
(c) Identify all combinations of 2 or more circuit elements that
are connected in series.
4Ω
25 Ω
1.9 For the circuit in Fig. P1.9:
(a) Identify and label all distinct nodes.
(b) Which of those nodes are extraordinary nodes?
Figure P1.6: Circuit for Problem 1.6.
1.7
(c) Identify all combinations of 2 or more circuit elements that
are connected in series.
(d) Identify pairs of circuit elements that are connected in
parallel.
For the circuit in Fig. P1.7:
(a) Identify and label all distinct nodes.
(b) Which of those nodes are extraordinary nodes?
4A
(c) Identify all combinations of 2 or more circuit elements that
are connected in series.
(d) Identify pairs of circuit elements that are connected in
parallel.
1Ω
0.1 Ω
0.3 Ω
3Ω
2Ω
6Ω
2Ω
+
_ 48 V
4Ω
Figure P1.9: Circuit for Problem 1.9.
1Ω
+
4V _
1.10 For the circuit in Fig. P1.10:
0.2 Ω
0.4 Ω
(a) Identify and label all distinct nodes.
(b) Which of those nodes are extraordinary nodes?
Figure P1.7: Circuit for Problem 1.7.
(c) Identify all combinations of 2 or more circuit elements that
are connected in series.
44
CHAPTER 1
(d) Identify pairs of circuit elements that are connected in
parallel.
12 V
+ 10 Ω
4Ω
_
32 Ω
16 Ω
CIRCUIT TERMINOLOGY
(a) q(t) = 3.6t mC
(b) q(t) = 5 sin(377t) μC
*(c) q(t) = 0.3[1 − e−0.4t ] pC
8Ω
6Ω
Figure P1.10: Circuit for Problem 1.10.
1.11 For the circuit in Fig. P1.11:
(a) Identify and label all distinct nodes.
(b) Which of those nodes are extraordinary nodes?
(c) Identify all combinations of 2 or more circuit elements that
are connected in series.
(d) Identify pairs of circuit elements that are connected in
parallel.
(d) q(t) = 0.2t sin(120π t) nC
1.15 Determine the current i(t) flowing through a certain
device if the cumulative charge that has flowed through it up to
time t is given by
(a) q(t) = −0.45t 3 μC
(b) q(t) = 12 sin2 (800π t) mC
(c) q(t) = −3.2 sin(377t) cos(377t) pC
*(d) q(t) = 1.7t[1 − e−1.2t ] nC
1.16 Determine the net charge �Q that flowed through a
resistor over the specified time interval for each of the following
currents:
(a) i(t) = 0.36 A, from t = 0 to t = 3 s
*(b) i(t) = [40t + 8] mA, from t = 1 s to t = 12 s
(c) i(t) = 5 sin(4π t) nA, from t = 0 to t = 0.05 s
(d) i(t) = 12e−0.3t mA, from t = 0 to t = ∞
1Ω
3Ω
4Ω
20 V
_
(a) i(t) = [3t + 6t 3 ] mA, from t = 0 to t = 4 s
*(b) i(t) = 4 sin(40π t) cos(40π t)
t = 0.05 s
+
5Ω
2Ω
1.17 Determine the net charge �Q that flowed through a
certain device over the specified time intervals for each of the
following currents:
6Ω
Figure P1.11: Circuit for Problem 1.11.
1.12 The total charge contained in a certain region of space
is −1 C. If that region contains only electrons, how many does
it contain?
*1.13 A certain cross section lies in the x–y plane. If 3 × 1020
electrons go through the cross section in the z direction in 4
seconds, and simultaneously 1.5 × 1020 protons go through
the same cross section in the negative z direction, what is the
magnitude and direction of the current flowing through the cross
section?
1.14 Determine the current i(t) flowing through a resistor if
the cumulative charge that has flowed through it up to time t is
given by
μA,
from
t =0
to
(c) i(t) = [4e−t − 3e−2t ] A, from t = 0 to t = ∞
(d) i(t) = 12e−3t cos(40π t) nA, from t = 0 to t = 0.05 s
1.18 If the current flowing through a wire is given by
i(t) = 3e−0.1t mA, how many electrons pass through the wire’s
cross section over the time interval from t = 0 to t = 0.3 ms?
1.19 The cumulative charge in mC that entered a certain
device is given by
⎧
⎪
⎨0
q(t) = 5t
⎪
⎩
60 − t
for t < 0,
for 0 ≤ t ≤ 10 s,
for 10 s ≤ t ≤ 60 s
(a) Plot q(t) versus t from t = 0 to t = 60 s.
(b) Plot the corresponding current i(t) entering the device.
*1.20 A steady flow resulted in 3 × 1015 electrons entering a
device in 0.1 ms. What is the current?
PROBLEMS
45
1.21 Given that the current in (mA) flowing through a wire is
given by:
⎧
⎪
for t < 0
⎨0
i(t) = 6t
for 0 ≤ t ≤ 5 s
⎪
⎩ −0.6(t−5)
for t ≥ 5 s,
30e
(a) Sketch i(t) versus t.
(b) Sketch q(t) versus t.
1.22 The plot in Fig. P1.22 displays the cumulative amount
of charge q(t) that has entered a certain device up to time t.
What is the current at
(a) t = 1 s
*(b) t = 3 s
(c) t = 6 s
1.24 The plot in Fig. P1.24 displays the cumulative charge
q(t) that has entered a certain device up to time t. Sketch a plot
of the corresponding current i(t).
q
20 C
0
1
2
3
4
t (s)
5
−20 C
Figure P1.24: q(t) for Problem 1.24.
q(t)
Sections 1-5 and 1-6: Voltage, Power, and Circuit Elements
4C
0
2s
4s
6s
t
8s
−4 C
*(a) What is the voltage at node V2?
(b) What is the voltage difference V32 = V3 − V2 ?
(c) What are the voltages at nodes 1, 3, 4, and 5 if node 2 is
selected as the ground node instead of node 1?
Figure P1.22: q(t) for Problem 1.22.
1.23 The plot in Fig. P1.23 displays the cumulative amount
of charge q(t) that has exited a certain device up to time t. What
is the current at
*(a) t = 2 s
(b) t = 6 s
(c) t = 12 s
q(t)
V4 = 10 V
R2
V3 = 32 V
R4
V5 = 20 V
R3
R1
+
_
V2
R5
48 V
V1 = 0
4C
Figure P1.25: Circuit for Problem 1.25.
4e−0.2(t−8)
2C
0
1.25 In the circuit of Fig. P1.25, node V1 was selected as the
ground node.
1.26 In the circuit of Fig. P1.26, node V1 was selected as the
ground node.
4s
8s
Figure P1.23: q(t) for Problem 1.23.
t
*(a) What is the voltage difference across R6 ?
(b) What are the voltages at nodes 1, 3, and 4 if node 2 is
selected as the ground node instead of node 1?
46
CHAPTER 1
V3 = 6 V
+6 V_
2A
6
10
_V
+
3A
R5
V4 = 12 V
+4 V_
4
4A
5
7
V
6_
R3
3
+
+
_
1A
24 V 1
_
+
V2 = 4 V
V_
V1 = 0
+
8
R1
R4
20 V
5A
R2
+
_
+
_ 12 V
2
R6
10 V
CIRCUIT TERMINOLOGY
2A
Figure P1.28: Circuit for Problem 1.28.
Figure P1.26: Circuit for Problem 1.26.
1.27 For each of the eight devices in the circuit of Fig. P1.27,
determine whether the device is a supplier or a recipient of
power and how much power it is supplying or receiving.
+6 V_
2
4A
+
_
1 16 V
1A
2A
1A
+
_
10 V 3
4
_ 7V+
8
i(t) = 0.1 cos(4π t) A.
Determine:
5
6
+ 12 V _
1.31 The voltage across and current through a certain device
are given by
υ(t) = 5 cos(4π t) V,
+4 V_
+8 V_
(b) How much energy in joules is contained in the battery?
(c) What is the battery’s rating in ampere-hours?
3A
_
9V 7
+
Figure P1.27: Circuit for Problem 1.27.
*(a) The instantaneous power p(t) at t = 0 and t = 0.25 s.
(b) The average power pav , defined as the average value of
p(t) over a full time period of the cosine function (0 to
0.5 s).
1.32 The voltage across and current through a certain device
are given by
υ(t) = 100(1 − e−0.2t ) V,
i(t) = 30e−0.2t mA.
Determine:
1.28 For each of the seven devices in the circuit of Fig. P1.28,
determine whether the device is a supplier or a recipient of
power and how much power it is supplying or receiving.
*1.29 An electric oven operates at 120 V. If its power rating is
0.6 kW, what amount of current does it draw, and how much
energy does it consume in 12 minutes of operation?
1.30 A 9 V flashlight battery has a rating of 1.8 kWh. If
the bulb draws a current of 100 mA when lit; determine the
following:
(a) For how long will the flashlight provide illumination?
(a) The instantaneous power p(t) at t = 0 and t = 3 s.
(b) The cumulative energy delivered to the device from t = 0
to t = ∞.
1.33 The voltage across a device and the current through it
are shown graphically in Fig. P1.33. Sketch the corresponding
power delivered to the device and calculate the energy absorbed
by it.
1.34 The voltage across a device and the current through it
are shown graphically in Fig. P1.34. Sketch the corresponding
power delivered to the device and calculate the energy absorbed
by it.
PROBLEMS
47
i(t)
i(t)
10 A
10 A
5A
0
υ(t)
1s
2s
t
1s
3s
4s
3s
4s
t
υ(t)
5V
0
0
5V
1s
2s
t
0
1s
t
2s
Figure P1.33: i(t) and υ(t) of the device in Problem 1.33.
−5 V
Figure P1.35: i(t) and υ(t) of the device in Problem 1.35.
i(t)
10 A
0
υ(t)
5
1s
2s
t
1
1s
2s
4
P4 = ?
5V
0
2
t
3
7
6
Figure P1.37: Circuit for Problem 1.37.
Figure P1.34: i(t) and υ(t) of the device in Problem 1.34.
1.35 The voltage across a device and the current through it
are shown graphically in Fig. P1.35. Sketch the corresponding
power delivered to the device and calculate the energy absorbed
by it.
*1.36 After t = 0, the current entering the positive terminal of
a flashlight bulb is given by
i(t) = 2(1 − e
−10t
)
(A),
and the voltage across the bulb is υ(t) = 12e−10t (V).
Determine the maximum power level delivered to the flashlight.
1.37 Apply the law of conservation of power to determine
the amount of power delivered to device 4 in the circuit of
Fig. P1.37, given that that the amounts of power delivered to
the other devices are: p1 = −100 W, p2 = 30 W, p3 = 22 W,
p5 = 67 W, p6 = −201 W, and p7 = 120 W.
*1.38 Determine Vy in the circuit of Fig. P1.38.
1.39 Determine V , the voltage of the dependent voltage
source in the circuit of Fig. P1.39.
*1.40 Determine Vz in the circuit of Fig. P1.40.
1.41 Determine Ix in the circuit of Fig. P1.41.
48
CHAPTER 1
5Ω
1.2 A
12 V
1.42 For the circuit in Fig. P1.42, generate circuit diagrams
that include only those elements that have current flowing
through them for
I = 0.1Vx
+ Vx _
+
+
_
10 Ω
2Ω
V
_y
(a) t < 0
(b) 0 < t < 2 s
(c) t > 2 s
Figure P1.38: Circuit for Problem 1.38.
R1
V = 2Ix
_
10 Ω
+
V0
20 Ω
10 V
Ix
+
_
t=0
R2
+
_
R3
R4
t=2s
R5
+
_
5Ω
CIRCUIT TERMINOLOGY
R6
15 V
Figure P1.42: Circuit for Problem 1.42.
30 Ω
Figure P1.39: Circuit for Problem 1.39.
Vx
+
2.5 A
2Ω
Iy = 0.1Vx
(a) t < 0
4Ω
2Ω
+
Vz 5 Ω
_
1.43 For the circuit in Fig. P1.43, generate circuit diagrams
that include only those elements that have current flowing
through them for
(b) 0 < t < 2 s
+
_
19 V
(c) t > 2 s
Figure P1.40: Circuit for Problem 1.40.
2Ω
R1
6V
V1
4Ω
+ V1 _
6A
2Ω
Ix =
Figure P1.41: Circuit for Problem 1.41.
V1
2
+
_
+
V2 _
SPST
t=0
R3
SPDT
t=2s
R2
1
2 R
5
t=0
R6
SPST
Figure P1.43: Circuit for Problem 1.43.
R4
PROBLEMS
49
1.44 The switch in the circuit of Fig. P1.44 closes at t = 0.
Which elements are in series and which are in parallel at (a)
t < 0 and (b) t > 0?
R1
+
_
υs
3
1
R2
2
R3
t=0
R5
Figure P1.44: Circuit for Problem 1.44.
R4
4
R6
Potpourri Questions
1.45 What aspect of electrical engineering particularly
interests you? Check out http://spectrum.ieee.org/ to learn
more.
1.46 Will the prediction of Moore’s Law continue to hold true
indefinitely? If not, why not?
1.47 Provide a definition of what the term “nanotechnology”
means to you.
1.48 What is the typical voltage level associated with
lightning? With a bird standing on a power line (foot to foot)?
2
2
CHAPTER
C H A P T E R
Resistive Circuits
Contents
2-1
TB3
2-2
2-3
TB4
2-4
2-5
2-6
TB5
2-7
Overview, 51
Ohm’s Law, 51
Superconductivity, 57
Kirchhoff’s Laws, 60
Equivalent Circuits, 67
Resistive Sensors, 70
Wye–Delta (Y–�) Transformation, 80
The Wheatstone Bridge, 84
Application Note: Linear versus
Nonlinear i–υ Relationships, 86
Light-Emitting Diodes (LEDs), 90
Introducing Multisim, 94
Summary, 100
Problems, 101
Objectives
Learn to:
Apply Ohm’s law and explain the basic properties
of piezoresistivity and superconductivity.
State Kirchhoff’s current and voltage laws; apply
them to resistive circuits.
Define circuit equivalency, combine resistors in
series and in parallel, and apply voltage and
current division.
Apply source transformation between voltage and
current sources and Y–� circuits.
Describe the operation of the Wheatstone-bridge
circuit and how it is used to measure small
deviations.
Use Multisim and myDAQ to analyze simple
circuits.
Microfabricated pressure sensor
The basic laws of circuit theory are used to develop
fluency in analyzing resistive circuits and characterizing their
performance.
2-1
OHM’S LAW
51
Overview
Table 2-1: Conductivity and resistivity of some common
materials at 20 ◦ C.
The study of any field of inquiry starts with nomenclature:
defining the terms specific to that field. That is exactly what
we did in the preceding chapter. We introduced and defined
electric current, voltage, power, open and closed circuits, and
dependent and independent voltage and current sources, among
others. Now, we are ready to acquire our first set of circuitanalysis tools, which will enable us to analyze a variety of
different types of circuits. We limit our discussion to resistive
circuits, namely those circuits containing only sources and
resistors. (In future chapters, we will extend these tools to
circuits containing capacitors, inductors, and other elements.)
Our new toolbox includes three simple, yet powerful laws—
Ohm’s law and Kirchhoff’s voltage and current laws—and
several circuit simplification and transformation techniques.
You will learn how to divide the voltage (using voltage dividers)
and current (using current dividers), how to combine resistors
in series and parallel combinations, how to analyze resistive
sensors using Wheatstone bridges, how to use diodes to control
the direction of a current, plus how to use a light-emitting diode
(LED) as a visual output, warning light, etc. You will also learn
how to use Multisim to simulate and analyze your circuits,
and how to build a circuit on a circuit board and measure its
properties using your computer via the NI myDAQ.
2-1
Ohm’s Law
The conductivity σ of a material is a measure of how
easily electrons can drift through the material when an
external voltage is applied across it. Resistivity (ρ) is the
inverse (1/σ ) of conductivity. Materials are classified as conductors (primarily metals),
semiconductors, or dielectrics (insulators) according to the
magnitudes of their conductivities. Tabulated values of σ
expressed in units of siemens per meter (S/m) are given in
Table 2-1 for a select group of materials. The siemen is the
inverse of the ohm, S = 1/�, and the inverse of σ is called the
resistivity ρ,
ρ=
1
σ
(�-m),
(2.1)
which is a measure of how well a material impedes the flow of
current through it. The conductivity of most metals is on the
order of 107 S/m, which is 17 or more orders of magnitude
Material
Conductors
Silver
Copper
Gold
Aluminum
Iron
Mercury (liquid)
Semiconductors
Carbon (graphite)
Pure germanium
Pure silicon
Insulators
Paper
Glass
Teflon
Porcelain
Mica
Polystyrene
Fused quartz
Common materials
Distilled water
Drinking water
Sea water
Graphite
Rubber
Biological tissues
Blood
Muscle
Fat
Conductivity σ
(S/m)
Resistivity ρ
(�-m)
6.17 × 107
5.81 × 107
4.10 × 107
3.82 × 107
1.03 × 107
1.04 × 106
1.62 × 10−8
1.72 × 10−8
2.44 × 10−8
2.62 × 10−8
9.71 × 10−8
9.58 × 10−7
7.14 × 104
2.13
4.35 × 10−4
1.40 × 10−5
0.47
2.30 × 103
∼ 10−10
∼ 10−12
∼ 3.3 × 10−13
∼ 10−14
∼ 10−15
∼ 10−16
∼ 10−17
∼ 1010
∼ 1012
∼ 3 × 1012
∼ 1014
∼ 1015
∼ 1016
∼ 1017
5.5 × 10−6
∼ 5 × 10−3
4.8
1.4 × 10−5
1 × 10−13
1.8 × 105
∼ 200
0.2
71.4 × 103
1 × 1013
∼ 1.5
∼ 1.5
∼ 0.1
∼ 0.67
∼ 0.67
10
greater than the conductivity of typical insulators. Common
semiconductors, such as silicon and germanium, fall in the inbetween range on the conductivity scale.
The values of σ and ρ given in Table 2-1 are specific
to room temperature at 20 ◦ C. In general, the conductivity
of a metal increases with decreasing temperature. At
very low temperatures (in the neighborhood of absolute
zero), some conductors become superconductors, because
their conductivities become practically infinite and their
corresponding resistivities approach zero. To learn more about
superconductivity, refer to Technology Brief 3.
52
CHAPTER 2
Table 2-2: Diameter d of wires, according to the American
l
Wire Gauge (AWG) system.
σ
R=
A
l
σA
Figure 2-1: Longitudinal resistor of conductivity σ , length �,
and cross-sectional area A.
2-1.1
Resistance
The resistance R of a device incorporates two factors:
(a) the inherent bulk property of its material to conduct
(or impede) current, represented by the conductivity σ (or
resistivity ρ), and (b) the shape and size of the device. For a longitudinal resistor (Fig. 2-1), R is given by
R=
RESISTIVE CIRCUITS
�
�
=ρ
σA
A
(�),
(2.2)
where � is the length of the device and A is its cross-sectional
area. In addition to its direct dependence on the resistivity ρ, R is
directly proportional to �, which is the length of the path that
the current has to flow through, and inversely proportional to A,
because the larger A is, the more electrons can drift through the
material.
Every element of an electric circuit has a certain resistance
associated with it. This even includes the wires used to connect
devices to each other, but we usually treat them like zeroresistance segments because their resistances are so much
smaller than the resistances of the other devices in the circuit. To
illustrate with an example, let us consider a 10 cm long segment
of one of the wire sizes commonly found in circuit boards, such
as the AWG-18 copper wire. According to Table 2-2, which
lists the diameter d for various wire sizes as specified by the
American Wire Gauge (AWG) system, the AWG-18 wire has a
diameter d = 1 mm. Using the values specified for � and d and
the value for ρ of copper given in Table 2-1, we have
�
0.1
�
R=ρ =ρ
= 1.72 × 10−8 ×
2
A
π(d/2)
π(0.5 × 10−3 )2
= 2.2 × 10−3 � = 2.2 m�.
AWG Size Designation
Diameter d (mm)
0
2
4
6
10
14
18
20
8.3
6.5
5.2
4.1
2.6
1.6
1.0
0.8
Thus, R of a 10 cm long AWG-18 copper wire is on the
order of milliohms. If the wire segment connects to circuit
elements with resistances of ohms or larger, ignoring the
resistance of the wire would have no significant impact
on the overall behavior of the circuit. The preceding justification should be treated with some
degree of caution. While it is true that a piece of wire
may be treated like a short circuit in the majority of circuit
configurations, there are certain situations for which such an
assumption may not be valid. One obvious example is when
the wire is very long, as in the case of a kilometers long
electric power-transmission cable. Another is when very thin
wires or channels with micron-size diameters are used in
microfabricated circuits.
Resistive elements used in electronic circuits are fabricated in
many different sizes and shapes to suit the intended application
and requisite circuit architecture. Discrete resistors usually are
cylindrical in shape and made of a carbon composite. Hybrid
and miniaturized circuits use film-shaped metal or carbon
resistors. In integrated circuits, resistive elements are fabricated
through a diffusion process (see Technology Brief 7).
Figure 2-2 displays photographs of three types of resistors,
amongst which the tubular-shaped resistor is the most familiar.
Resistors are generally marked with a banded color code to
denote the resistor’s specifications:
(a) 4-Band color code: b1
b2
b4
b5
Note that a wider spacing exists between b4 and b5 than between
the earlier bands. The resistor value is given by
R = (b1 b2 ) × 10b4 ± b5 ,
with the values of b1 , b2 , b4 , and b5 specified by the color code
shown in Fig. 2-2. For example,
= 25 × 100 ± 10% = 25 ± 10% �.
2-1
OHM’S LAW
53
Rotatable-shaft potentiometer
Rotating dial
Resistive
material
Screw-top potentiometer
1
4 1 2 k ± 1% 5 ppm /˚C
1
Rmax
2
3
Movable
wiper R
13
3
R23
Potentiometer resistor
25 Ω, 10%
5 bands
62 MΩ, 5%
6 bands
500 kΩ, 0.25%, 15 ppm
Silver
Gold
b1
Black
2
4 bands
0
b2
0
b3
0
Potentiometer
b4
0.01
10%
0.1
5%
b5
1
Brown
1
1
1
10
1%
b6
100 ppm
Red
2
2
2
100
2%
50 ppm
Orange
3
3
3
1K
15 ppm
Yellow
4
4
4
10K
25 ppm
Green
5
5
5
100K
0.5%
Blue
6
6
6
1M
0.25%
10 ppm
Purple
7
7
7
10M
0.1%
5 ppm
Gray
8
8
8
White
9
1st digit
Multiplier Tolerance Temperature
9
9
× 10b4
coefficient
2nd digit 3rd digit # of zeros
ppm /˚C
4-, 5-, and 6-band color code system
Figure 2-2: Various types of resistors. Tubular-shaped resistors usually are color-coded by 4-, 5-, or 6-band systems.
(b) 5-Band color code: b1
b2
b3
b4
In this case
R = (b1 b2 b3 ) × 10b4 ± b5 .
b5
(c) 6-Band color code: b1
b2
b3
b4
b5
b6
This code adds one more piece of information in the form
of b6 which denotes the temperature coefficient of the resistor,
measured in parts-per-million/ ◦ C.
54
CHAPTER 2
Table 2-3: Common resistor terminology.
Thermistor
Piezoresistor
Light-dependent R (LDR)
Rheostat
Potentiometer
R sensitive to temperature
R sensitive to pressure
R sensitive to light intensity
2-terminal variable resistor
3-terminal variable resistor
For some metal oxides, the resistivity ρ exhibits a strong
sensitivity to temperature. A resistor manufactured of such
materials is called a thermistor (Table 2-3), and it is used
for temperature measurement, temperature compensation, and
related applications. Another interesting type of resistor is the
piezoresistor, which is used as a pressure sensor in many
household appliances, automotive systems, and biomedical
devices. More coverage on resistive sensors is available in
Technology Brief 4.
Certain applications, such as volume adjustment on a radio,
may call for the use of a resistor with variable resistance. The
rheostat and the potentiometer are two standard types of variable
resistors in common use. The rheostat [Fig. 2-3(a)] is a twoterminal device with one of its terminals connected to one end of
a resistive track and the other terminal connected to a movable
wiper. Movement of the wiper across the resistive track, through
rotation of a shaft, can change the resistance between the
two terminals from (theoretically) zero resistance to the full
resistance value of the track. Thus, if the total resistance of the
track is Rmax , the rheostat can provide any resistance between
zero and Rmax .
Terminal 1
Movable
wiper
1
R
Rmax
Terminal 2
(a) Rheostat
Rmax
Movable
wiper R
13
3
R23
2
(b) Potentiometer
Figure 2-3: (a) A rheostat is used to set the resistance between
terminals 1 and 2 at any value between zero and Rmax ; (b) the
wiper in a potentiometer divides the resistance Rmax among R13
and R23 .
RESISTIVE CIRCUITS
The potentiometer is a three-terminal device. Terminals 1
and 2 in Fig. 2-3(b) are connected to the two ends of the
track (with total resistance Rmax ) and terminal 3 is connected
to a movable wiper. When terminal 3 is at the end next to
terminal 1, the resistance between terminals 1 and 3 is zero
and that between terminals 2 and 3 is Rmax . Moving terminal 3
away from terminal 1 increases the resistance between terminals
1 and 3 and decreases the resistance between terminals 2 and 3.
A potentiometer can be used as a rheostat by connecting to only
terminals 1 and 3.
2-1.2
i–υ Characteristics of Ideal Resistor
Based on the results of his experiments on the nature of
conduction in circuits, German physicist Georg Simon Ohm
(1787–1854) formulated in 1826 the i–υ relationship for a
resistor, which has become known as Ohm’s law. He discovered
that the voltage υ across a resistor is directly proportional to
the current i flowing through it, namely
υ = iR,
(2.3)
with the resistance R being the proportionality factor.
In compliance with the passive sign convention, current
enters a resistor at the “+” side of the voltage across it.
υa
+
υab = υa − υb
R
i
i=
υa − υb
R
_
υb
An ideal linear resistor is one whose resistance R is constant
and independent of the magnitude of the current flowing through
it, in which case its i–υ response is a straight line (Fig. 2-4(a)).
In practice, the i–υ response of a real linear resistor is indeed
approximately linear, as illustrated in Fig. 2-4(b), so long as i
remains within the linear region defined by −imax to imax . The
slope of the curve is the resistance R. Outside this range, the
response deviates from the straight-line model. When we use
Ohm’s law as expressed by Eq. (2.3), we tacitly assume that the
resistor is being used in its linear range of operation.
Some resistive devices exhibit highly nonlinear i–υ
characteristics. These include diode elements and light-bulb
filaments, among others. Unless noted otherwise, the common
use of the term resistor in circuit analysis and design usually
refers to the linear resistor exclusively.
2-1
OHM’S LAW
55
i
2 mA
R1
+
V1 _
R = 0.5 kΩ
R=0
1 mA
i
R = 1 kΩ
R=∞
0.5 V
1V
+
υ_
R2
R3
I
A
(a) Same current flows through all elements
R
R4
υ
+
V2 _
(a) Ideal resistor
R5
V
com
i
(b) Same voltage exists across R4 and R5
imax
Figure 2-5: In-series and in-parallel connections.
υ
−imax
Current-limiting devices, such as fuses and circuit breakers, are
used to protect against dangerous overloading of circuits.
Linear region
(b) Real resistor
2-1.3 In-Series and In-Parallel Connections
Figure 2-4: i–υ responses of ideal and real resistors.
The flow of current in a resistor leads to power dissipation
in the form of heat (or the combination of heat and light in the
case of a light bulb’s filament). Using Eq. (2.3) in Eq. (1.9)
provides the following expression for the power p dissipated in
a resistor:
p = iυ = i 2 R =
υ2
R
(W).
(2.4)
Recall from Chapter 1 that two or more elements are considered
to be connected in series if the same current flows through all
of them. This is indeed the case for voltage source V1 and the
resistors shown in Fig. 2-5(a). For two or more elements to be
in parallel, they have to share the same voltage, which is the
case for R4 and R5 in Fig. 2-5(b).
Example 2-1: Series Connection Resistances for a dc
Motor
The power rating of a resistor defines the maximum
continuous power level that the resistor can dissipate
without getting damaged. Excessive heat can cause
melting, smoke, and even fire. A 12 V car battery is connected via a 6 m long, twin-wire cable
to a dc motor that drives the wiper blade on the rear window.
The cable is copper AWG-10 and the motor exhibits to the rest
of the circuit an equivalent resistance Rm = 2 . Determine:
(a) the resistance of the cable and (b) the fraction of the power
contributed by the battery that gets delivered to the motor.
For electric circuits with a fixed voltage (such as a 120 V for
a house), the power rating refers to the maximum current limit.
Solution: The circuit described in the problem statement is
represented by Fig. 2-6.
56
CHAPTER 2
Wire (6 m long)
Rtop
+
12 V _
Rm (motor
resistance)
Wire Rbottom
Car battery
i
υs(t)
Same as positive terminal of υs(t)
i1
+
_
RESISTIVE CIRCUITS
R1 1 kΩ
i2
R2
500 Ω
i3
R3 250 Ω
Rc = resistance of both wires
Same as negative terminal of υs(t)
Figure 2-6: Circuit for Example 2-1.
Figure 2-7: Circuit for Example 2-2.
(a) We need to include both the top wire and the bottom wire,
as each represents a resistor through which the current flows,
and therefore contributes to the resistive losses of the circuit.
With � = 12 m (total for twin wires), ρ = 1.72 × 10−8 �-m
for copper, A = π(d/2)2 , and d = 2.6 mm for AWG-10, the
cable resistance Rc is
Rc = ρ
�
12
= 0.04 �.
= 1.72 × 10−8 ×
A
π(1.3 × 10−3 )2
(b) The total resistance in the circuit is equal to the sum of
the cable and motor resistances. [In a later section, we will learn
that the resistance of two resistors connected in series is simply
equal to the sum of their resistances.] Hence,
R = Rc + Rm = 0.04 + 2 = 2.04 �.
Consequently, the current flowing through the circuit is
I=
12
V
=
= 5.88 A,
R
2.04
and the power contributed by the battery P and the power
delivered to the motor Pm are:
P = I V = 5.88 × 12 = 70.56 W
and
Pm = I 2 Rm = (5.88)2 × 2 = 69.15 W,
and the fraction of P delivered to the load (motor) is
Fraction =
69.15
Pm
=
= 0.98 or 98 percent.
P
70.56
Thus, 2 percent of the power is dissipated in the cable.
Concept Question 2-1: If the terminals of the battery
in Fig. 2-6 were corroded, how would that change the
problem and the results? (See
)
Example 2-2: Parallel Loads
Three loads—a 1 k� light bulb, a 500 � computer, and a 250 �
TV, each represented by a resistor, are connected in parallel to a
household ac voltage source as shown in Fig. 2-7. The source is
cosinusoidal in time at a frequency of 60 Hz and its amplitude
is 170 V. Hence, it can be described as
υs (t) = 170 cos(2π × 60t) = 170 cos(377t) V.
Determine the currents supplied by the source to the three loads.
Solution: All three loads share the same positive terminal
(node) of υs (t) on one end and the same negative terminal (node)
on the other. Consequently, application of Ohm’s law leads to
υs (t)
170
= 3 cos(377t) = 0.17 cos(377t) A,
R1
10
υs (t)
170
cos(377t) = 0.34 cos(377t) A,
i2 (t) =
=
R2
500
υs (t)
170
i3 (t) =
cos(377t) = 0.68 cos(377t) A.
=
R3
250
i1 (t) =
As we see in the next section, the current i supplied by the
source is the sum of the three load currents,
i(t) = i1 + i2 + i3 = 1.19 cos(377t) A.
Concept Question 2-2: How does the magnitude of the
conductivity of a metal, such as copper, compare with that
of a typical insulator, such as mica? (See
)
Concept Question 2-3: What is piezoresistivity, and how
is it used? (See
)
TECHNOLOGY BRIEF 3: SUPERCONDUCTIVITY
57
Technology Brief 3
Superconductivity
When an electric voltage is applied across two points in a
conductor, such as copper or silver, current flows between
them. The relationship between the voltage difference V
and the current I is given by Ohm’s law, V = IR, where R
is the resistance of the conducting material between the
two points. It is helpful to visualize the electric current
as a fluid of electrons flowing through a dense forest
of sturdy metal atoms, called the lattice. Under the
influence of the electric field (induced by the applied
voltage), the electrons can attain very high instantaneous
velocities, but their overall forward progress is impeded
by the frequent collisions with the lattice atoms. Every
time an electron collides and bounces off an atom, some
of that electron’s kinetic energy is transferred to the
atom, causing the atom to vibrate—which heats up the
material—and causing the electron to slow down. The
resistance R is a measure of how much of an obstacle the
resistor poses to the flow of current, as well as a measure
of how much heat it generates for a given current. The
power dissipated in R is I 2R if I is a dc current, and it is
Figure TF3-1: The Meissner effect, or strong diamagnetism, seen between a high-temperature superconductor
and a rare earth magnet. (Courtesy of Pacific Northwest
National Laboratory.)
1
2
I 2R if the current is ac with an amplitude I .
Can a conductor ever have zero resistance? The
answer is most definitely yes! In 1911, the Dutch physicist
Heike Kamerlingh Onnes developed a refrigeration
technique so powerful that it could cool helium down
low enough to condense it into liquid form at 4.2 K
(0 kelvin = −273 ◦C). Into his new liquid helium
container, he immersed (among other things) mercury;
he soon discovered that the resistance of a solid piece
of mercury at 4.2 K was zero! The phenomenon, which
was completely unexpected and not predicted by
classical physics, was coined superconductivity.
According to quantum physics, many materials
experience an abrupt change in behavior (called a
phase transition) when cooled below a certain critical
temperature TC.
Superconductors have some amazing properties. The
current in a superconductor can persist with no external
voltage applied. Even more interesting, currents have
been observed to persist in superconductors for many
years without decaying. When a magnet is brought close
to the surface of a superconductor, the currents induced
by the magnetic field are mirrored exactly by the
superconductor
(because
the
superconductor’s
resistance is zero), and consequently the magnet is
repelled (Fig. TF3-1). This property has been used to
demonstrate magnetic levitation and is the basis of some
super-fast maglev trains (Fig. TF3-2) that are being
Figure TF3-2: Maglev train. (Courtesy of Central Japan
Railway Company.)
used around the world. The same phenomenon is used
in the Magnetic Resonance Imaging (MRI) machines
that hospitals use to perform 3-D scans of organs and
tissues (Fig. TF3-3) and in Superconducting Quantum
Interference Devices (SQUIDs) to examine brain activity
at high resolution.
58
TECHNOLOGY BRIEF 3: SUPERCONDUCTIVITY
Figure TF3-3: Magnetic Resonance Imaging machine. (Courtesy GE Healthcare.)
Superconductivity is one of the last frontiers in solidstate physics (see Table TT3-1). Even though the physics
of low-temperature superconductors (like mercury, lead,
niobium nitride, and others) is now fairly well understood,
a different class of high-temperature superconductors
still defies complete theoretical explanation. This class
of materials was discovered in 1986 when Alex Müller
and Georg Bednorz, at IBM Research Laboratory
in Switzerland, created a ceramic compound that
superconducted at 30 K. This discovery was followed
by the discovery of other ceramics with even higher
TC values; the now-famous YBCO ceramic discovered
at the University of Alabama-Huntsville (1987) has
a TC of 92 K, and the world record holder is a
group of mercury-cuprate compounds with a TC of
138 K (1993). New superconducting materials and
conditions are still being found; carbon nanotubes,
for example, were recently shown to have a TC of
15 K (Hong Kong University, 2001). Are there highertemperature superconductors? What theory will explain
this higher-temperature phenomenon? Can so-called
room-temperature superconductors exist? For engineers
(like you) the challenges are just beginning: How can
these materials be made into useful circuits, devices, and
machines? What new designs will emerge? The race is
on!
Table TT3-1: Critical temperatures.
Critical Temperature Tc [K]
Material
Type
138
138
92
HgBa2 Ca2 Cu3 Ox
Bi2 Sr2 Ca2 Cu3 O10 (BSCCO)
YBa2 Cu3 O7 (YBCO)
Copper-oxide superconductors
55
41
26
SmFeAs
CeFeAs
LaFeAs
Iron-based superconductors
18
10
9.2
4.2
Nb3 Sn
NbTi
Nb
Hg (mercury)
Metallic low-temperature
superconductors
OHM’S LAW
59
2-1.4
Concept Question 2-4: What is meant by the linear
region of a resistor? Is it related to its power rating?
(See
)
A resistor is a bidirectional device, meaning that current
can flow through it in either direction. This is because it is
constructed of the same material along the dimension between
its two terminals. In contrast, a diode allows current to flow
in only one direction. It is built of two sections of different
semiconductor materials, denoted p and n in Fig. 2-8(a). The
p-type material has excess positive charges and the n-type
material has excess negative charges. When connected to a
voltage source, the diode acts like a resistor in one direction,
but like an open circuit in the other. Specifically:
(a) Reverse bias: If the voltage VD applied across the diode is
negative (relative to its own terminals), as shown in Fig. 2-8(b),
no current flows through it, which is equivalent to having infinite
resistance. That is, the diode behaves like an open circuit.
(b) Forward bias: If the voltage VD is positive, as in
Fig. 2-8(c), current will flow through the diode, but the
relationship between I and VD is not a constant. For a
Exercise 2-1: A cylindrical resistor made of carbon has
a power rating of 2 W. If its length is 10 cm and its
circular cross section has a diameter of 1 mm, what is
the maximum current that can flow through the resistor
without damaging it?
)
Exercise 2-2: A rectangular bar made of aluminum has
a current of 3 A flowing through it along its length. If its
length is 2.5 m and its square cross section has 1 cm sides,
how much power is dissipated in the bar at 20 ◦C?
Answer: 5.9 mW. (See
Anode
)
+
VD
_
p
_
+
I=0
+
VD _
No conduction,
diode like open circuit
(b) Reverse-biased diode
n
I > 0 if VD ≥ VF
Diode like nonlinear resistor
(c) Forward-biased diode
Red
Amber
Forward current
I (mA)
Cathode
+
_
Green
Blue
Answer: 1.06 A. (See
i–υ Characteristics of LEDs
Yellow
2-1
50
(a) Diode
40
(d) i-υ plots for LEDs
30
LED ON
20
+
_VF
RD
(e) LED equivalent circuit
LED OFF
10
0
0
1
1.6 2
VF
(red)
3 3.3
4
VF
(green)
5
VD
Figure 2-8: p-n junction diode (a) configuration, (b) reverse biased, (c) forward biased, (d) typical i-υ plots for LEDs, and (e) LED
equivalent circuit.
60
CHAPTER 2
resistor, VD /I = R and R is a constant, but for a diode the
relationship between VD and I is more complicated. However,
its i–υ relationship can be approximated by
I = aVD2
G=
Exercise 2-3: A certain type of diode exhibits a nonlinear
relationship between υ—the voltage across it—and i—
the current entering into its (+) voltage terminal. Over its
operational voltage range (0 to 1 V), the current is given
by
for 0 ≤ υ ≤ 1 V.
Answer: R =
2
,
υ
R
∞
200 �
20 �
4�
2�
(See
)
1
R
(S),
(2.5)
and its unit is �−1 , which is called the siemen (S, or sometimes
called “mho”). In terms of G, Ohm’s law can be rewritten in
the form
υ
i=
= Gυ,
(2.6)
R
and the expression for power becomes
p = iυ = Gυ 2
(W).
(2.7)
Since G = 1/R, what is the point in dealing with both G
and R? The answer is: convenience. In some circuit solutions it
is easier to work with R for all resistors in the circuit, whereas
in other circuit configurations (especially those in parallel) it
may be easier to work with conductances instead.
2-2 Kirchhoff’s Laws
Circuit theory—encompassing both analysis and synthesis—
is built upon a foundation comprised of a small number of
fundamental laws. Among the cornerstones are Kirchhoff’s
current and voltage laws. Kirchhoff’s laws, which constitute
the subject of this section, were introduced by the German
physicist Gustav Robert Kirchhoff (1824–1887) in 1847, some
21 years after a fellow German, Georg Simon Ohm, developed
his famous law.
2-2.1
Determine how the diode’s effective resistance varies
with υ and calculate its value at υ = 0, 0.01 V, 0.1 V,
0.5 V, and 1 V.
υ
0
0.01 V
0.1 V
0.5 V
1V
Conductance
The reciprocal of resistance is called conductance,
(VD > 0),
where a is a constant that depends on the semiconductor
material used to build the LED.
A light-emitting diode is a special kind of diode in that it emits
light if I exceeds a certain threshold. Figure 2-8(d) displays
plots of I versus VD for five LEDs of different colors. The
color of light emitted by an LED depends on the semiconductor
compounds from which it is constructed. The voltage at which
the diode becomes approximately linear is the forward bias
voltage VF , and it becomes part of the diode model shown in
Fig. 2-8(e). For the typical family of LEDs shown in Fig. 2-8(d),
the current I has to exceed 20 mA in order for the LED to fully
light up. This current threshold has a corresponding voltage
threshold called the forward voltage VF . Below this threshold,
the diode conducts little or no current and is considered “OFF”
(although it does generate a small amount of light). For the red
LED, for example, VF = 1.6 V, and the current flowing through
the LED at that voltage is exactly 20 mA. Higher values of VF
are required to cause the LEDs of the other colors to emit light.
When we analyze a circuit containing an LED, the LED can
be modeled as an ideal diode with a voltage drop of VF in series
with a small internal resistance RD , as shown in Fig. 2-8(e).
We can determine the approximate LED resistance RD from
the slope of the linear section (above VF ) of the i–υ curve in
Fig. 2-8(d); i.e., RD ≈ �VD /�I .
i = 0.5υ 2
2-1.5
RESISTIVE CIRCUITS
Kirchhoff’s Current Law (KCL)
As defined earlier, a node is a connection point for two or
more branches. As such, it is not a real circuit element, and
therefore it cannot generate, store, or consume electric charge.
This assertion, which follows from the law of conservation
of charge, forms the basis of Kirchhoff’s current law (KCL),
which states that:
The algebraic sum of the currents entering a node must
always be zero. 2-2
KIRCHHOFF’S LAWS
61
which states that:
i2 i
3
i1
The total current entering a node must be equal to the
total current leaving it. i4
How do we know which way a current is flowing in a circuit?
Often, we do not. So, we guess by assigning a direction to each
current, and then applying Kirchhoff’s laws to compute the
currents. If the value for a particular current is a positive number,
then our guess was correct, but if it is a negative number, then
the direction of the current is opposite the one we assigned it.
Figure 2-9: Currents at a node.
Mathematically, KCL can be expressed by the compact form:
N
n=1
in = 0
(KCL),
(2.8)
Example 2-3: KCL Equations
Write the KCL equations at nodes 1 through 5 in the circuit of
Fig. 2-10.
Solution:
At node 1:
At node 2:
At node 3:
At node 4:
At node 5:
where N is the total number of branches connected to the node,
and in is the nth current.
+” sign
A common convention is to assign a positive “+
−”
to a current if it is entering the node and a negative “−
sign if it is leaving it. −I1 − I3 + I5 = 0
I1 − I2 + 2 = 0
−2 − I4 + I6 = 0
−5 − I5 − I6 = 0
I3 + I4 + I2 + 5 = 0
For the node in Fig. 2-9, the sum of currents entering the node
is
R1
(2.9)
Alternatively, the sum of currents leaving a node is
zero, in which case we assign a “+” to a current leaving
the node and a “−” to a current entering it. Either convention is equally valid so long as it is applied
consistently to all currents entering and leaving the node.
By moving i2 and i3 to the right-hand side of Eq. (2.9), we
obtain the alternative form of KCL, namely
i1 + i4 = i2 + i3 ,
(2.10)
V1
I1
1
I5
I2
2A
R2
+_
where currents i1 and i4 were assigned positive signs because
they are labeled in the figure as entering the node, and i2 and i3
were assigned negative signs because they are leaving the node.
+
i1 − i2 − i3 + i4 = 0,
2
R3
I3
I4
R4
5
3
I6
R5
5A
R6
4
Figure 2-10: Circuit for Example 2-3.
62
CHAPTER 2
Example 2-4: Applying KCL
The algebraic sum of the voltages around a closed loop
must always be zero. If V4 , the voltage across the 4 � resistor in Fig. 2-11, is 8 V,
determine I1 and I2 .
1Ω
1
I1
N
n=1
+
_ V
4
2
This statement defines Kirchhoff’s voltage law (KVL). In
equation form, KVL is given by
2Ω
3Ω
10 A
RESISTIVE CIRCUITS
+_ 10 V
−
+
4Ω
I2
Figure 2-11: Circuit for Example 2-4.
(KVL),
υn = 0
(2.11)
where N is the total number of branches in the loop and υn is
the nth voltage across the nth branch. Application of Eq. (2.11)
requires the specification of a sign convention to use with it. Of
those used in circuit analysis, the sign convention we chose to
use in this book consists of two steps.
Sign Convention
I2 = −
V4
8
= − = −2 A.
4
4
Thus, the true direction of the current flowing through the 4 �
resistor is opposite of that of I2 .
Using the KCL convention that defines a current as positive
if it is leaving a node and negative if it is entering it, at node 2:
• Add up the voltages in a systematic clockwise
movement around the loop.
• Assign a positive sign to the voltage across an
element if the (+) side of that voltage is encountered
first, and assign a negative sign if the (−) side is
encountered first.
Hence, for the loop in Fig. 2-12, starting at the negative terminal
of the 4 V voltage source, application of Eq. (2.11) yields
−4 + V1 − V2 − 6 + V3 − V4 = 0.
10 − I1 + I2 = 0,
I1 = 10 + I2 = 10 − 2 = 8 A.
2-2.2
_
R1
4V
-
R2
V1
+
Kirchhoff’s Voltage Law (KVL)
The voltage across an element represents the amount of energy
expended in moving positive charge from the negative terminal
to the positive terminal, thereby establishing a potential energy
difference between those terminals. The law of conservation
of energy mandates that if we move electric charge around a
closed loop, starting and ending at exactly the same location,
the net gain or loss of energy must be zero. Since voltage is a
surrogate for potential energy:
6V
_
_ V +
2
which leads to
(2.12)
+
Solution: The designated direction of I2 is such that it enters
the negative (−) terminal of V4 , whereas according to Ohm’s
law, the current should enter through the positive (+) terminal
of the voltage across a resistor. Hence, in the present case, we
should include a negative sign in the relationship between I2
and V4 , namely
R3
+
_
+ V4 _
R4
Figure 2-12: One-loop circuit.
+
V3
_
2-2
KIRCHHOFF’S LAWS
63
Table 2-4: Equally valid, multiple statements of
Kirchhoff’s Current Law (KCL) and Kirchhoff’s Voltage
Law (KVL).
⎧
•
⎪
⎪
⎪
⎪
⎪
⎪
⎪
⎪
⎨•
KCL
⎪
⎪
⎪
⎪
⎪
⎪
•
⎪
⎪
⎩
Sum of all currents entering a node = 0
[i = “+” if entering; i = “−” if leaving]
Sum of all currents leaving a node = 0
[i = “+” if leaving; i = “−” if entering]
Total of currents entering = Total of currents
leaving
Solution: For the specified direction of I , we designate
voltages V1 , V2 , and V3 across the three resistors, as shown in
Fig. 2-13(b). In each case, the positive polarity of the voltage
across a resistor is placed at the terminal at which the current
enters the resistor.
Starting at the negative terminal of the 12 V voltage source
and moving clockwise around the loop, KVL gives
−12 + V1 + V2 + V3 = 0.
By Ohm’s law, V1 = 10I , V2 = 20I , and V3 = 30I . Hence,
⎧
•
⎪
⎪
⎪
⎨
Sum of voltages around closed loop = 0
[υ = “+” if + side encountered first
KVL
⎪
in clockwise direction]
⎪
⎪
⎩
• Total voltage rise = Total voltage drop
−12 + 10I + 20I + 30I = 0,
which leads to
60I = 12,
or
I=
An alternative statement of KVL is that the total voltage
rise around a closed loop must equal the total voltage drop
around the loop. Recalling that a voltage rise is realized by moving from the (−)
voltage terminal to the (+) terminal across the element, and
voltage drop is the converse of that, the clockwise movement
around the loop in Fig. 2-12 gives
4 + V2 + 6 + V4 = V1 + V3 ,
12
= 0.2 A.
60
I
20 Ω
10 Ω
12 V
+
_
30 Ω
(2.13)
(a) Circuit for Example 2-5
which mathematically conveys the same information contained
in Eq. (2.12).
Table 2-4 provides a summary of KCL and KVL statements.
I
Concept Question 2-5: Explain why KCL is (in essence)
a statement of the law of conservation of charge.
(See
)
12 V
Concept Question 2-6: Explain why KVL is a statement
of conservation of energy. What sign convention is used
with KVL? (See
)
+
_
V1 = 10I
V2 = 20I
10 Ω
20 Ω
+
_
+
_
30 Ω
+
_V3 = 30I
(b) After labeling voltages across resistors
Example 2-5: Applying KVL
Determine the value of current I in the circuit of Fig. 2-13(a).
Figure 2-13: Circuit for Example 2-5 before and after labeling
voltages across the three resistors with polarities consistent with
Ohm’s law.
64
R1
KCL/KVL Solution Recipe
• Use KCL, KVL, and Ohm’s law to develop as
many independent equations as the number of
unknowns (N).
V0
(a) Write as many KVL loop equations as you can,
picking up at least one additional circuit element
for each loop. Let M be the number of such loop
equations. Exclude loops that go through current
sources.
• Cast the standard-form equations in matrix form, as
in Eqs. (B.19) and (B.20) of Appendix B.
RESISTIVE CIRCUITS
R2
R4
+
_
R3
R5
I0
(a) Original circuit
I1
(b) Write (N −M) KCL equations, making sure each
node picks up an additional current.
• Write the equations in standard form (see Eq. (B.2)
in Appendix B).
CHAPTER 2
R1
R2
Va
I3
R4
I2
V0
+
_
I4
R5
R3
Loop 1
Vb
I0
Loop 2
• Apply matrix inversion to compute the values of the
circuit unknowns (Appendix B).
(b)
Example 2-6: Matrix Inversion of KVL/KCL Equations
For the circuit in Fig. 2-14(a): (a) identify all N unknown
branch currents and assign them preliminary directions, (b)
develop M KVL loop equations through all possible elements
(while excluding loops containing current sources), (c) develop
(N − M) KCL node equations, (d) arrange the equations in
matrix form, (e) solve by matrix reduction to find the unknown
branch currents, (f) determine the power dissipated in R5 , and
(g) find the voltages of all extraordinary nodes relative to the
negative terminal of the voltage source. The element values
are: V0 = 10 V, I0 = 0.8 A, R1 = 2 , R2 = 3 , R3 = 5 ,
R4 = 10 , and R5 = 2.5 .
Solution:
Figure 2-14: Circuit for Example 2-6.
(b) KVL equations
The circuit contains two independent loops that do not contain
the current source I0 . The associated KVL equations are:
−V0 + I1R1 + I1R2 + I2R3 = 0
−I2 R3 + I3 R4 + I4 R5 = 0
(Loop 1),
(Loop 2).
Alternatively, we can replace either of the two loop equations
with the KVL equation for the perimeter loop that includes both
of them, namely the loop that starts at the ground node, then
goes clockwise through V0 , R1 , R2 , R4 , and R5 , and back to the
ground node. Either approach leads to the same final result.
(c) KCL equations
(a) Identify unknown currents
Excluding the branch containing I0 (since we know that the
current in that branch is I0 = 0.8 A), we have 4 unknown
branch currents, which we denote I1 to I4 in Fig. 2-14(b). Also,
with the negative terminal of the voltage source denoted as the
voltage reference (ground), we have two extraordinary nodes,
with designated voltages Va and Vb .
We have two extraordinary nodes (in addition to the ground
node). We designate their voltages as shown in Fig. 2-14(b).
With current defined as positive when entering a node, their
KCL equations are
I1 − I2 − I3 = 0
I3 − I4 + I0 = 0
(Node a),
(Node b).
2-2
KIRCHHOFF’S LAWS
65
(d) Arrange equations in matrix form
6Ω
⎡
⎤
⎤⎡ ⎤ ⎡
(R1 + R2 ) R3 0 0
V0
I1
⎢
⎢ ⎥ ⎢
⎥
0
−R3 R4 R5 ⎥
⎢
⎥ ⎢I2 ⎥ = ⎢ 0 ⎥ .
⎣
1
−1 −1 0 ⎦ ⎣I3 ⎦ ⎣ 0 ⎦
−I0
0
0
1 −1
I4
A
I
B
This is in the form
2Ω
+
3Ω
b
(a) Given circuit
(e) Matrix inversion
6Ω
After replacing the sources and resistors with their specified
numerical values, matrix reduction, per MATLAB, MathScript,
or the procedure outlined in Appendix B-2, leads to
I3 = 0.2 A,
I2 = 0.9 A,
I4 = 1 A.
(f) Power in R5
P = I42 R5 = 12 × 2.5 = 2.5 W.
V3 = 6I3
L2
I2
Node 1
I1
2Ω
I2
_ V1 = 2I2
Node 2
_
+
V2 = 4I2
V4 = 3I1
+
I1
+
_
L1
+
_
12 V
I3
4Ω
a
_
+
3Ω
24 V
b
(b) After assigning currents at nodes 1 and 2
Va = I2 R3 = 0.9 × 5 = 4.5 V,
Vb = I4 R5 = 1 × 2.5 = 2.5 V.
6Ω
_ 6V
+
1A
1A 2Ω
Example 2-7: Two-Source Circuit
Solution: The circuit contains two independent loops and
two extraordinary nodes, which we label node 1 and node 2
in Fig. 2-15(b). At extraordinary node 1, we assign currents
I1 , I2 , and I3 . Their directions are chosen arbitrarily; for I1 ,
for example, if the solution yields a positive value, then the
direction we assigned it is indeed the correct direction, and if
the solution yields a negative value, then its true direction is the
opposite of what we had assigned it.
Once the directions of I1 to I3 are specified at node 1,
continuity of current automatically specifies their directions at
node 2, as shown in Fig. 2-15(b). Since we have 3 unknowns
(I1 , I2 , and I3 ), we need N = 3 equations.
_
+
I3
(g) Node voltages
Determine Vab in the circuit of Fig. 2-15(a).
24 V
_
AI = B.
I1 = 1.1 A,
+
_
Vab
+
_
12 V
4Ω
a
Node 1
2A
_
+
_
6V
3Ω
12 V
+
_
2V+
4Ω
a
+
_
4V
Node 2
+
Vab
+
_
_
b
(c) After completing solution
Figure 2-15: Circuit for Example 2-7.
24 V
66
CHAPTER 2
In terms of the labeled voltages, application of KVL around
the two loops gives
RESISTIVE CIRCUITS
voltage rise of 6 V, and from node 1 to node b is a third voltage
rise of 2 V. Hence
−12 + V4 + V1 + V2 + 24 = 0,
(KVL for Loop 1)
(2.14a)
Vab = 12 + 6 + 2 = 20 V.
V3 − V2 − V1 = 0.
(KVL for Loop 2)
(2.14b)
Alternatively, we can calculate Vab by moving from node b to
node a counterclockwise through node 2. In that case
Using Ohm’s law for the four resistors, the two KVL equations
become
−12 + 3I1 + 2I2 + 4I2 + 24 = 0,
(KVL for Loop 1)
(2.15a)
6I3 − 4I2 − 2I2 = 0.
(KVL for Loop 2)
(2.15b)
The two simultaneous equations contain three unknowns,
namely I1 to I3 . A third equation is supplied by KCL at node 1
or node 2:
I1 = I2 + I3 .
(KCL @ node 1 or 2)
(2.16)
Vab = 24 − 4 = 20 V,
which is identical to the earlier result.
Example 2-8: Circuit with Dependent Source
The circuit in Fig. 2-16 includes a current-dependent voltage
source. Apply KVL and KCL to determine the amount of power
consumed by the 12 � resistor.
Solution: We start by assigning currents I2 and I3 at node 1,
and using those currents to designate the voltages across the
three resistors. Note that in all cases, the designated (+) side of
Equations (2.15a), (2.15b), and (2.16) constitute 3 equations in
3 unknowns. We can solve for I1 to I3 either by the substitution
method or by matrix inversion (Appendix B). To apply the latter,
we need to cast the three equations in standard form:
3I1 + 6I2
= −12,
I1
4Ω
20 V
12 Ω
+
_
8Ω
_
+
8I1
_
+
8I1
−6I2 + 6I3 = 0,
I1 − I2 − I3 = 0.
(a) Given circuit
In matrix form:
⎡
⎤⎡ ⎤ ⎡
⎤
3 6 0
I1
−12
⎣0 −6 6 ⎦ ⎣I2 ⎦ = ⎣ 0 ⎦ .
1 −1 −1
I3
0
+
Matrix inversion, as outlined in Appendix B, leads to
I1 = −2 A,
I2 = −1 A,
I3 = −1 A.
Hence, the true directions of the three currents are exactly
opposite those we supposed , and so are the polarities of the
voltages across the resistors. Incorporating both the calculated
magnitudes and signs of I1 to I3 leads to the diagram shown
in Fig. 2-15(c). To calculate Vab , we start at node b and move
clockwise towards node a in loop 1, while keeping track of
voltage rises and drops. From node b to the (+) terminal of the
12 V source is a voltage rise of 12 V, from there to node 1 is a
I1
4Ω
20 V
_
4I1
Node 1 I3
I2
+
_
+
_
8I2
12 Ω
+
_
12I3
8Ω
L1
L2
Node 2
(b) After assigning currents at node 1
Figure 2-16: Circuit for Example 2-8.
2-3
EQUIVALENT CIRCUITS
67
the voltage corresponds to the terminal at which the current is
entering.
For loops 1 and 2, KVL gives
Exercise 2-5: Apply KCL and KVL to find I1 and I2 in
Fig. E2.5.
4 Ω I2
(KVL for Loop 1)
−20 + 4I1 + 8I2 = 0,
(KVL for Loop 2)
−8I2 + 12I3 − 8I1 = 0.
Note that there is another loop in the circuit, namely the
perimeter loop around the whole circuit, but if we write a
KVL equation for that loop, it would not provide an equation
independent of the other loop equations because it would not
include any circuit element not already included in loops L1
and L2 .
At node 1, KCL states that
I1 = I2 + I3 .
I1
+
_
20 V
2Ω
4A
Figure E2.5
Answer: I1 = 6 A, I2 = 2 A. (See
)
Exercise 2-6: Determine Ix in the circuit of Fig. E2.6.
4A
The combination of the three equations in unknowns I1 , I2 ,
and I3 leads to the solution
2Ω
25
A,
7
5
I2 = A,
7
20
I3 =
A.
7
I1 =
Ix
4Ω
2Ω
_
+
8Ω
2Ix
Figure E2.6
Hence, the power dissipated in the 12 � resistor is
P = I32 R =
20
7
2
Answer: Ix = 1.33 A. (See
× 12 = 97.96 W.
2-3 Equivalent Circuits
Exercise 2-4: If I1 = 3 A in Fig. E2.4, what is I2 ?
4Ω
10 V
+
_
I2
I1
2Ω
2A
Figure E2.4
Answer: I2 = −1 A. (See
)
)
Even though Kirchhoff’s current and voltage laws can be used
to write down the requisite number of node and loop equations
that are necessary to solve for all of the voltages and currents
in a circuit, it is often easier to determine a certain unknown
voltage or current by first simplifying the other parts of the
circuit. The simplification process involves the use of circuit
equivalence, wherein a circuit segment connected between two
nodes (such as the original circuit segment connected between
nodes 1 and 2 in Fig. 2-17) is replaced with another, simpler,
circuit whose behavior is such that the voltage difference
(υ1 − υ2 ) between the two nodes—as well as the currents
entering into them (or exiting from them)—remain unchanged.
That is:
68
CHAPTER 2 RESISTIVE CIRCUITS
Circuit Equivalence
Original
circuit
segment
i1
υ1
i2
1
υ2
Combining In-Series Resistors
is
Rest of
the circuit
υs
2
1
+
+
_
2
R1
R2
υ1
υ2
υ5
υ4
R5
R4
υ3
R3
(a) Original circuit
Equivalent
circuit
i1
υ1
i2
1
υ2
is
Rest of
the circuit
υs
2
1
+
+
_
Equivalent circuit
Figure 2-17: Circuit equivalence requires that the equivalent
circuit exhibit the same i–υ characteristic as the original circuit.
Req
2
(b) Req = R1 + R2 + R3 + R4 + R5
Two circuits connected between a pair of nodes are
considered to be equivalent—as seen by the rest of the
circuit—if they exhibit identical i–υ characteristics at
those nodes. To the rest of the circuit, the original and equivalent circuit
segments appear identical. The equivalent-circuit technique
can be applied on the source side of a circuit, as well as on
the load side.
We now will examine several types of equivalent circuits
and then provide an overall summary at the conclusion of this
section.
2-3.1 Resistors in Series
Consider the single-loop circuit of Fig. 2-18(a) in which a
voltage source υs is connected in series with five resistors. The
KVL equation is given by
−υs + R1 is + R2 is + R3 is + R4 is + R5 is = 0,
(2.17)
which can be rewritten as
υs = R1 is + R2 is + R3 is + R4 is + R5 is
= (R1 + R2 + R3 + R4 + R5 )is = Req is ,
From the standpoint of the source voltage υs and the current is
it supplies, the circuit in Fig. 2-18(a) is equivalent to that in
Fig. 2-18(b). That is,
υs
is =
.
(2.20)
Req
Multiple resistors connected in series (experiencing the
same current) can be combined into a single equivalent
resistor Req whose resistance is equal to the sum of all of
their individual resistances. Mathematically,
Req =
N
Ri
(resistors in series),
(2.21)
i=1
where N is the total number of resistors in the group.
(2.18)
where Req is an equivalent resistor whose resistance is equal
to the sum of the five in-series resistances,
Req = R1 + R2 + R3 + R4 + R5 .
Figure 2-18: In a single-loop circuit, Req is equal to the sum
of the resistors.
(2.19)
Voltage division
For resistor R2 in Fig. 2-18(a), the voltage across it is given by
R2
υ2 = R2 is =
υs .
(2.22a)
Req
2-3
EQUIVALENT CIRCUITS
69
Similar expressions apply to the other resistors, wherein the
voltage across a resistor is equal to υs multiplied by the ratio
of its own resistance to the sum total Req . Thus, the single-loop
circuit, in effect, divides the source voltage among the series
resistors.
The voltage across any individual resistor Ri in a series
circuit is a proportionate fraction (Ri /Req ) of the voltage
across the entire group
υi =
Ri
Req
(voltage division).
υs
(2.22b)
Example 2-9: The Voltage Divider
supply a secondary load circuit a specific voltage υ2 that is
smaller than the available source voltage υs . In other words, the
goal is to scale υs down to υ2 . If υs = 100 V, choose appropriate
values for R1 and R2 so that υ2 = 60 V.
Solution: In view of Eq. (2.22a), application of the voltagedivision property gives
υ2 =
υs
(a)
υ2 =
R2
R1 + R 2
Load
circuit
R2
υ2
60
=
=
= 0.6,
R1 + R 2
υs
100
3Ω
2Ω
+
4V
_
10 V
R1 = 2 �
2-3.2
υs
+
+
6V
_
υs .
and
R2 = 3 �.
Note that the circuit in Fig. 2-19(b) will provide approximately
the indicated voltages to a load circuit, so long as the resistance
of the load circuit is very large compared with the resistance
of R2 . Otherwise, the load circuit would draw current, thereby
“loading down” the source circuit and changing V2 .
+
υ2
_
which can be satisfied through an infinite combination of
choices of R1 and R2 . Hence, we arbitrarily choose
R1
R2
R2
R1 + R 2
To obtain the desired division, we require
The term voltage divider is used commonly in reference to a
circuit of the type shown in Fig. 2-19, whose purpose is to
+
_
+
Sources in Series
Figure 2-20 contains a single-loop circuit composed of a
voltage source, a resistor, and two current sources, all connected
in series. One of the current sources indicates that the current
flowing through it is 4 A in magnitude and clockwise in
direction, while the other current source indicates that the
6V
_
+
_
R
+
4V
_
_
V0
+
_
6A
4A
(b) Voltage divider is equivalent to subdividing
a battery into two separate batteries
Figure 2-19: Voltage dividers are important tools in circuit
analysis and design.
Figure 2-20: Unrealizable circuit; two current sources with
different magnitudes or directions cannot be connected in series.
70
TECHNOLOGY BRIEF 4: RESISTIVE SENSORS
Technology Brief 4
Resistive Sensors
Resistive sensors can convert many physical parameters
in our environment into a resistance that varies with
temperature, light, pressure, moisture, chemical composition, sound, or other inputs. This variable resistance will
then change the voltage or current in a circuit, which
can be further manipulated in an electrical system to
produce a desired output (turning on a warning light
or buzzer, adjusting a valve, or otherwise control the
pressure/light/heat/sound automatically). When a system
measures a parameter (e.g., temperature) in order to
control that parameter, the process is called a feedback
loop. Sensors are a very important part of a feedback
system.
So how do resistive sensors work? The resistance R
of a semiconductor accounts for the reduction in the
electrons’ velocities due to collisions with the much larger
atoms of the conducting material (see Technology Brief 3).
The question is:What happens to R if we disturb the atoms
of the conductor by applying an external, nonelectrical
stimulus, such as heating or cooling it, stretching or
compressing it, or shining light on it? Through proper
choice of materials, we can modulate (change) the
magnitude of R in response to such external stimuli.
Piezoresistive Sensors (Pressure, Bending,
Force, etc.)
In 1856, Lord Kelvin discovered that applying a mechanical load on a bar of metal changed its resistance.
Over the next 150 years, both theoretical and practical
advances made it possible to describe the physics behind
this effect in both conductors and semiconductors. The
phenomenon is referred to as the piezoresistive effect
(Fig. TF4-1) and is used in many practical devices
to convert a mechanical signal into an electrical one.
Such sensors (Fig. TF4-2) are called strain gauges.
Piezoresistive sensors are used in a wide variety
of consumer applications, including writing styluses
for tablets (some high-precision styluses are resistive
and others are capacitive—which we will learn about
in Chapter 5), robot toy “skins” that sense force,
microscale gas-pressure sensors, and micromachined
accelerometers that sense acceleration. They all use
piezoresistors in electrical circuits to generate a signal
from a mechanical stimulus.
R (Ω)
STRETCHING
F
F
F
F
COMPRESSION
FORCE (N)
F=0
R=ρ
l
A
Figure TF4-1: Piezoresistance varies with applied force.
The word “piezein” means “to press” in Greek.
In its simplest form, a resistance change R occurs
when a mechanical pressure P (N/m2 ) is applied along
the axis of the resistor (Fig. TF4-1)
R = R0 αP,
where R0 is the unstressed resistance and α is known as
the piezoresistive coefficient (m2 /N).The piezoresistive
coefficient is a material property, and for crystalline
materials (such as silicon), the piezoresistive coefficient
also varies depending on the direction of the applied
pressure (relative to the crystal planes of the material).
When the horizontal and vertical components are different
the material is called anisotropic. The total resistance of
a piezoresistor under stress is therefore given by
R = R0 + R = R0 (1 + αP).
The pressure P, which usually is called the mechanical
stress or mechanical load, is equal to F/A, where F
is the force acting on the piezoresistor and A is the
cross-sectional area it is acting on. The sign of P is
defined as positive for a stretching force and negative for
a compressive force. The piezoresistive coefficient α
usually has a negative value, so the product αP leads to
a decrease in R for compression and an increase for
stretching.
Thermistor Sensors
Changes in temperature also can lead to changes in
the resistance of a piece of conductor or semiconductor;
TECHNOLOGY BRIEF 4: RESISTIVE SENSORS
71
(a)
(b)
(c)
Figure TF4-2: A microfabricated pressure sensor utilizing piezoresistors as sensors. (a) A thin diaphragm (blue) is suspended
over a depression etched into a glass substrate (grey). Serpentine piezoresistors (yellow) are patterned onto the membrane.
(b) Differences in pressure between the ambient and the gas in the depression will move the membrane. When this happens,
the resistors stretch (or compress), changing their resistance as explained in the text. (c) A false color scanning electron
micrograph of an actual microfabricated pressure sensor. Note the piezoresistors (yellow) patterned along the four sides of
the diaphragm and the white, 100 μm scale bar. (Courtesy of Khalil Najafi, University of Michigan.)
when used as a sensor, such an element is called a
thermistor. As a simple approximation, the change in
resistance can be modeled as
R = k T,
where T is the temperature change (in degrees C)
and k is the first-order temperature coefficient of
resistance (/◦ C). Thermistors are classified according
to whether k is negative or positive (i.e., if an increase in
temperature decreases or increases the resistance). This
approximation works only for small temperature changes;
for larger swings, higher-order terms must be included
in the equation. Resistors used in electrical circuits that
are not intended to be used as sensors are manufactured
from materials with the lowest k possible, since circuit
designers do not want their resistors changing during
operation. In contrast, materials with high values of k
are desirable for sensing temperature variations. Care
must be taken, however, to incorporate into the sensor
response the self-heating effect that occurs due to having
a current passing through the resistor itself (as in the flow
sensor shown in Fig. TF4-3).
Thermistors are used routinely in modern thermostats,
cell phones, automotive and industrial applications,
weather monitoring, and battery-pack chargers (to
prevent batteries from overheating). Thermistors also
have found niche applications (Fig. TF4-3) in lowtemperature sensing and as fuse replacements (for
thermistors with large, positive k values). In the case
of current-limiting fuse replacements, a large enough
current self-heats the thermistor, and the resistance
increases. There is a threshold current above which
the thermistor cannot be cooled off by its environment;
as it continues to get hotter, the resistance continues
to increase, which in turn, causes even more selfheating. This “runaway” effect rapidly shuts current off
almost entirely. Thermistors are specified based on their
linear range where resistance varies linearly with the
temperature, and a wide variety of options are available.
Moisture and Chemical Sensors
Resistive sensors can also be built with two electrodes
measuring the material between them. A simple moisture
72
TECHNOLOGY BRIEF 4: RESISTIVE SENSORS
Figure TF4-3: This micromachined anemometer (flow meter) is a thermistor that measures fluid velocity. The resistor (red)
serves as both a heater and a thermistor. During operation, a voltage across the resistor produces a current (I = V /R) which
heats the resistor (recall the heat power, P = V ∗ I ). As fluid flows by the resistor (blue), the flow draws away heat. Since
increasing the flow increases the cooling of the resistor and temperature changes the resistance, the flow can be inferred from
the thermistor. (Courtesy of Khalil Najafi, University of Michigan.)
sensor you can build yourself consists of two electrodes
with an absorbing material between them (Fig. TF4-4).
Just draw two thick pencil (graphite) lines on paper, clip
to them with alligator clips, and measure the resistance
with your myDAQ. Then drip water between the two lines,
so that it makes contact between them. The resistance
will immediately drop in magnitude.
In a similar approach, resistive sensors can sometimes
be used to determine chemical composition of a liquid
material. The resistivity of the material depends strongly
on the number of dissolved or loose ions in the material
(see Table 2-1). Deionized water has high resistivity,
drinking water has moderate resistivity, and sea water has
low resistivity. Placing two electrodes into a container of
fluid, or running fluid over two electrodes in a microfluidic
system can be used to measure the resistivity of the material and hence its chemical composition.This is often used
as a simple way to monitor the purity of drinking water.
Graphite
Drip water
Alligator clips
Figure TF4-4: Increased ions (from dissolved solids, for example) increase the conductivity (reduce resistivity), which can be
measured by an ohmmeter.
2-3
EQUIVALENT CIRCUITS
73
current is 6 A in magnitude and counterclockwise in direction.
Continuity of current flow mandates that the current flowing
through the loop be exactly the same in both magnitude and
direction at every location over the full extent of the loop.
So our dilemma is: Is the current 4 A, 6 A, or the difference
between the two? It is none of those guesses. The true answer
is that the circuit is unrealizable, meaning that it is not possible
to construct a circuit with two current sources of different
magnitudes or different directions that are connected in series.
The problem with the circuit of Fig. 2-20 has to do with our
representation of ideal current sources. As was stated in Section
1-6.2 and described in Table 1-5, a real current source can be
modeled as the parallel combination of an ideal current source
and a shunt resistor Rs . Usually, Rs is very large, so very
little current flows through it in comparison with the current
flowing through the other part of the circuit, in which case it
can be deleted without much consequence. In the present case,
however, had such shunt resistors been included in the circuit
of Fig. 2-20, the dilemma would not have arisen. The lesson
we should learn from this discussion is that when we idealize
current sources by deleting their parallel resistors, we should
never connect them in series in circuit diagrams.
υ2
+_
R1
R2
-
+
_
υ1
_
+
Node 1
υ3
Node 2
RL
(a)
υeq
+
_
Req
Node 1
Node 2
RL
Ideal current sources cannot be added in series. (b) υeq = υ1 − υ2 + υ3
Whereas current sources cannot be connected in series, voltage
sources can. In fact, it follows from KVL that from the
standpoint of an external load resistor RL connected between
nodes 1 and 2, the circuit in Fig. 2-21(a) can be simplified into
the equivalent circuit of Fig. 2-21(b) with
υeq = υ1 − υ2 + υ3
(2.23)
Req = R1 + R2 .
(2.24)
and
Thus:
Multiple voltage sources connected in series can be
combined into an equivalent voltage source whose voltage
is equal to the algebraic sum of the voltages of the
individual sources. Req = R1 + R2
Figure 2-21: In-series voltage sources can be added together
algebraically.
2-3.3
Resistors and Sources in Parallel
When multiple resistors are connected in series, they all share
the same current, but each has its own individual voltage across
it. The converse is true for multiple resistors connected in
parallel: the three resistors in Fig. 2-22(a) experience the same
voltage across all of them, namely υs , but each carries its own
individual current. The current supplied by the source is divided
among the branches containing the three resistors. Thus,
is = i1 + i2 + i3 .
(2.25)
Application of Ohm’s law provides
i1 =
υs
,
R1
i2 =
υs
,
R2
and
i3 =
υs
,
R3
(2.26)
which when used in Eq. (2.25) leads to
is =
υs
υs
υs
+
+
.
R1
R2
R3
(2.27)
74
CHAPTER 2
1
This result can be generalized to any N resistors connected in
parallel
is
i1
υs
i2
i3
N
+
_
R1
R2
1
1
=
Req
Ri
R3
Multiple resistors connected in parallel divide the input
current among them. For R2 in Fig. 2-22(a),
is
υs
i2 =
=
R2
+
_
Req
(b)
1
1
1
+
+
R1
R2
R3
−1
i2 =
Req
R2
is
Req =
Figure 2-22: Voltage source connected to a parallel
combination of three resistors.
We wish to replace the parallel combination of the three resistors
with a single equivalent resistor Req , as depicted in Fig. 2-22(b),
such that the current is remains unchanged. For the equivalent
circuit,
υs
.
(2.28)
is =
Req
If the two circuits in Fig. 2-22 are to function the same, as
regards the source, then is as given by Eq. (2.27) for the
original circuit should be equal to the expression for is given
by Eq. (2.28) for the equivalent circuit. Thus,
υs
υs
υs
υs
=
+
+
,
Req
R1
R2
R3
(2.29)
Req
R2
(2.32)
is .
(2.30)
R 1 R2
.
R1 + R 2
(2.33)
As a short-hand notation, we will sometimes denote
such a parallel combination R1 � R2 . We also denote the
series combination of R1 and R2 as (R1 + R2 ). As was noted earlier in Section 2-1.5, the inverse of the resistance R is the conductance G; G = 1/R. For N conductances
1
Current Division
is
2
1
i2
i1
R1
i1 =
from which we conclude that
1
1
1
1
=
+
+
.
Req
R1
R2
R3
By extension, for a current divider composed of N in-parallel
resistors, the current flowing through Ri is a proportionate
fraction (Req /Ri ) of the input current.
It is useful to note that the equivalent resistance for a parallel
combination of two resistors R1 and R2 (Fig. 2-23) is given by
2
Req =
(2.31)
Current division
(a) Original circuit
1
(resistors in parallel).
i=1
2
υs
RESISTIVE CIRCUITS
R2
R2
R1 + R 2
R1R2
Req = R + R
1
2
2
is
i2 =
R1
R1 + R 2
is
Figure 2-23: Equivalent circuit for two resistors in parallel.
2-3
EQUIVALENT CIRCUITS
75
can be combined when connected in series, but they cannot
be connected in parallel, unless they have identical voltages
(Fig. 2-24). Two current sources can be combined when
connected in parallel (as illustrated by Fig. 2-25), but they
cannot be connected in series.
+
+
+
V1
V2
V3
_
_
Example 2-10: Current Division Using Conductance
_
For the circuit in Fig. 2-26:
(a) Relate I3 to I0 and resistances R1 to R3 .
Figure 2-24: This is an unrealizable circuit unless all
voltage sources have identical voltages and polarities; that is,
V1 = V2 = V3 .
connected in parallel, Eq. (2.31) assumes the form of a linear
sum
Geq =
N
(conductances in parallel).
Gi
(2.34)
i=1
R1
R2
I2
R3
2
Req
1
1
1
+
+
R1
R2
R3
I3
Req
=
R2 R3 + R1 R3 + R1 R2
R 1 R2 R3
−1
R1 R2 R3
R 2 R3 + R 1 R3 + R 1 R2
.
Req
R3
I0 =
R 1 R2
R 2 R 3 + R 1 R3 + R 1 R2
I0 .
(b) Rewriting the expressions for I3 and Req in terms of
conductances gives
G3
I3 =
I0,
Geq
with
1
=
Req
1
1
1
+
+
R1
R2
R3
= G1 + G2 + G3 .
Ieq
R2 R3
= R2 � R3 =
R2 + R 3
I3
I0
R1
R2
Ieq = I1 − I2 + I3
Figure 2-25: Adding current sources connected in parallel.
Hence,
Geq =
R1
−1
=
I3 =
Node 2
1
Req =
Node 3
3
I1
2
Solution: (a) Application of the expressions given in
Fig. 2-22 leads to
Req
I3 =
I0 ,
R3
with
Two resistors always can be combined together, whether
they are connected in series (sharing the same current) or
in parallel (sharing the same voltage). Two voltage sources
1
(b) Relate I3 to I0 and conductances G1 to G3 , where
Gi = 1/Ri .
Figure 2-26: Circuit of Example 2-10.
R3
76
CHAPTER 2
Hence,
I3 =
G3
G1 + G 2 + G 3
RESISTIVE CIRCUITS
(b) Circuit of Fig. 2-27(b): Circuit is realizable.
From the standpoint of the two voltage sources to the left of
nodes CD,
I0 .
Current division using conductances assumes the same functional form as voltage division using resistances (Eq. (2.22b)).
Example 2-11: Realizable and Unrealizable Circuits
Given that the voltage difference between any two nodes
in a circuit has to be unique (cannot have multiple values
simultaneously), and that the current in any given branch also
is unique, determine which of the three circuits in Fig. 2-27 are
realizable and which are unrealizable.
Solution: (a) Circuit of Fig. 2-27(a): Circuit is not
realizable.
From the perspective of the ideal voltage source Vs , the
voltage difference between nodes A and B is Vs , but according
to the dependent source the voltage is 2Vs .
VCD = V1 + V2 = 20 − 5 = 15 V.
Also connected across nodes CD is voltage source V3 , but its
voltage is exactly 15 V. Two voltage sources can be connected
in parallel if they have the same voltage.
(c) Circuit of Fig. 2-27(c): Circuit is realizable.
KCL at node E requires that the sum of the three currents
entering the node be zero. Hence,
3 + 2Ix − Ix = 0,
which leads to
Ix = −3 A.
This means that the direction of Ix is upwards and the dependent
current source has a downward-moving current of 6 A.
Example 2-12: Equivalent-Circuit Solution
A
Vs
+
_
10 Ω
+
_
2Vs
20 Ω V3
+
_
15 V
B
(a)
V2
+_
V1
+
_
C
20 V 5 V
Use the equivalent-resistance approach to determine V2 , I1 , I2 ,
and I3 in the circuit of Fig. 2-28(a).
Solution: In the circuit of Fig. 2-28(a), the part of the circuit
connected to the voltage source is equivalent to a resistor Req
= R1 + [(R3 R4) (R2 + R5)]. Hence, our first step is to
combine the 2 and 4 in-series resistances into a 6 resistance and to combine the two 6 in-parallel resistances
into a 3 resistance (by applying Eq. (2.33)). The
simplifications lead to the circuit in Fig. 2-28(b). Next, we
calculate the parallel combination of the 3 and 6 resistors,
(3 6), again using Eq. (2.33), to get (3 × 6)/(3 + 6) = 18/9
= 2 . The new equivalent circuit is displayed in Fig. 2-28(c),
from which we deduce that
D
I1 =
(b)
and
E
V2 = 2I1 = 2 × 2 = 4 V.
Ix
3A
30 Ω
(c)
Figure 2-27: Circuits of Example 2-11.
24
= 2A
10 + 2
2Ix
Returning to Fig. 2-28(b), we apply Ohm’s law to find I2 and I3 .
I2 =
V2
4
= = 1.33 A,
3
3
I3 =
V2
4
= = 0.67 A.
6
6
and
2-3
EQUIVALENT CIRCUITS
V1 10 Ω
1
24 V
I1
V2
2
R1
77
I2
R2
+
+
-_
R3
Concept Question 2-8: What is a voltage divider and
2Ω
R4
6Ω
6Ω
I3
R5
4Ω
(a)
V1 10 Ω
1
R1
+
24 V +
-_
a conductance G? (See
1
I2
3Ω
I3
10 V
6Ω
Combining 3 Ω and
6 Ω in parallel
V1 10 Ω
1
+
+
-_
R1
I1
)
+
_
I
2
2
2
2
V2
2
2Ω
1
1
1
1
1
1
1
1
Figure E2.7
Answer: I = 5 A. (See
(b)
24 V
Concept Question 2-9: What is the i–υ relationship for
V2
2
)
Exercise 2-7: Apply resistance combining to simplify the
circuit of Fig. E2.7 in order to find I . All resistor values
are in ohms.
Combine R3 and
R4 in parallel
I1
what is a current divider? (See
2-3.4
)
Source Transformation
We now will demonstrate how a realistic voltage source
composed of an ideal voltage source in series with a resistor can
be exchanged for a realistic current source composed of an ideal
current source in parallel with a shunt resistor, or vice versa.
The two circuits are shown in parts (a) and (b) of Fig. 2-29.
Exchanging the one source for the other requires that they be
equivalent—from the vantage point of the external circuit.
(c)
A voltage-source circuit and a current-source circuit are
considered equivalent and interchangeable if they deliver
the same input current i and voltage υ12 to the external
circuit. Figure 2-28: Example 2-12. (a) Original circuit, (b) after
combining R3 and R4 in parallel and combining R2 and R5
in series, and (c) after combining the 3 � and 6 � resistances in
parallel.
For the voltage-source circuit, application of KVL gives
−υs + iR1 + υ12 = 0,
(2.35)
from which we obtain the following expression for i:
Concept Question 2-7: What conditions must be satisfied
in order for two circuits to be considered equivalent?
(See
)
i=
υs
υ12
−
.
R1
R1
(2.36)
78
CHAPTER 2
In summary:
Source Transformation
i
R1
υs
1
+
+
-_
A voltage source υs in series with a source resistance Rs
is equivalent to the combination of a current source is =
υs /Rs , in parallel with a shunt resistance Rs . The direction
of the equivalent current source is the same as the direction
from (−) to (+) terminals of the voltage source. υ12
External
circuit
678
2
Voltage source
(a)
is
i
1
iR2
is
R2
RESISTIVE CIRCUITS
This equivalence is called source transformation because it
allows us to replace a realistic voltage source with a realistic
current source, or vice versa.
A summary of in-series and in-parallel equivalent circuits
involving sources and resistors is available in Table 2-5.
External
circuit
υ12
Example 2-13: Source Transformation
Determine the current I in the circuit of Fig. 2-30(a).
678
2
Current source
is = υs /R1
R2 = R1
Solution: It is best to avoid transformations that would
involve the 3 � resistor with the unknown current I . Hence, we
will apply multiple source-transformation steps, moving from
the left end of the circuit towards the 3 � resistor.
(b)
Figure 2-29: Realistic voltage and current sources connected
to an external circuit. Equivalence requires that is = υs /R1 and
R2 = R1 .
Step 1: Current to voltage transformation allows us to convert
the combination (Is1 , Rs1 ) to a voltage source
Vs1 = Is1 Rs1 = 16 × 2 = 32 V,
in series with Rs1 .
Application of KCL to the current-source circuit gives
i = is − iR2
υ12
= is −
,
R2
Step 2: Combining Rs1 in series with the 6 � resistor results in
(2.37)
where we used Ohm’s law to relate iR2 to υ12 . Equivalence of
Eqs. (2.36) and (2.37) is satisfied for all values of i and υ12 if
and only if:
Rs2 = 2 + 6 = 8 �.
Hence, the new input source becomes (Vs1 , Rs2 ).
Step 3: Convert (Vs1 , Rs2 ) back into a current source
R1 = R2
(2.38a)
υs
.
R1
(2.38b)
and
is =
Is2 = Vs1 /Rs2 = 32/8 = 4 A,
in parallel with Rs2 .
Step 4: Combine Rs2 = 8 � in parallel with the other 8 �
resistor (8 � 8) to obtain an equivalent resistance Rs3 = 4 �.
2-3
EQUIVALENT CIRCUITS
79
Table 2-5: Equivalent circuits.
Circuit
Equivalent
1
R1
Series
R1
R1 + R2
R2
2
c
R2
Y
R3
3
Parallel
R1
(R1 || R2)
G1 =
R1R2
R1 + R2
(G1 || G2)
G1 + G 2
1
R1
1
G2 =
R2
+
_
Series
R2
+
_
Rb
υ1
+
_
υ2
υ1 + υ2
R2 =
i2
i1 + i2
R3 =
Ra =
Rb =
Rs
+
_
is =
υs
Source
transformation
Step 5: Convert again to a voltage source
υs
Rs
Rc =
Rs
Ra
∆
Rb Rc
Ra + Rb + Rc
Ra Rc
Ra + Rb + Rc
Ra Rb
Ra + Rb + Rc
R1 R2 + R2 R3 + R1 R 3
R1
R1 R2 + R2 R3 + R1 R 3
R2
R1 R2 + R2 R3 + R1 R 3
R3
For Ra = Rb = Rc
For R1 = R2 = R3
R1 = R2 = R3 = Ra / 3
Ra = Rb = Rc = 3R1
For the single loop realized in the final step,
Vs2 = Is2 Rs3 = 4 × 4 = 16 V,
in series with Rs3 .
2
3
R1 =
Parallel i1
Rc
1
I=
Vs2
16
=
= 2 A.
4+1+3
8
80
CHAPTER 2
6Ω
Solution:
1Ω
I=?
Is1 = 16 A
Rs1 = 2 Ω
Step 2
(series R)
+
Vs1 = 32 V +
-_
Rs = 8 Ω
678
8Ω
3Ω
Step 1 (source
transformation)
2
2Ω
1Ω
6Ω
I
Rs1
8Ω
3Ω
Step 1: Convert the 2 A current source in parallel with the 20 �
resistor into a 40 V voltage source in series with a 20 � resistor.
Step 2: Combine the two in-series 20 � and 40 � resistances
into a 60 � resistance, and combine the 40 V and 16 V sources
into a single 24 V source.
Step 3: Convert each voltage source (together with its in-series
resistance) into a current source with a resistance in parallel.
Step 4: Combine the two in-parallel resistances and the two
in-parallel current sources.
Step 5: For RL = 10 �, current division yields
I=
Step 3 (source
transformation)
1Ω
Rs2 = 8 Ω
8Ω
3Ω
Step 4 (parallel R)
Vab = 10I = 20 V.
Exercise 2-8: Apply source transformation to the circuit
in Fig. E2.8 to find I .
Answer: I = 4 A. (See
I
I
Rs3 = 4 Ω
4Ω
Vs2 = 16 V
+
12 V
+
_
4Ω
3Ω
10 A
3Ω
Step 5 (source
transformation)
1Ω
+
-_
)
6Ω
1Ω
Is2 = 4 A
20
× 3 = 2 A,
10 + 20
and the associated voltage across RL is
I
I s2 = 4 A
RESISTIVE CIRCUITS
I
3Ω
Figure 2-30: Example 2-13 circuit evolution.
Example 2-14: Finding Vab
While keeping the load resistor RL in the top circuit of Fig. 2-31
intact, apply source transformations until the circuit simplifies
to a current divider, then determine Vab for RL = 10 �.
Figure E2.8
2-4 Wye–Delta (Y–�) Transformation
In principle, it always is possible to simplify the behavior of
a resistive circuit when measured across any two nodes—no
matter how complex its topology—down to a simple equivalent
circuit composed of an equivalent voltage source in series with
an equivalent resistor. The preceding sections offered us tools
for combining resistors together whenever they are connected in
series or in parallel, as well as for combining in-series voltage
sources and in-parallel current sources. Sometimes, however,
we may encounter circuit topologies that cannot be simplified
using those tools because their resistors are connected neither in
series nor in parallel. A case in point is the circuit in Fig. 2-32,
in which no two resistors share the same current or voltage. This
2-4 WYE–DELTA (Y–�) TRANSFORMATION
102 V
+_
a
16 V
30 Ω
RL
+
_
81
3A
b
20 Ω
40 Ω
2A
20 Ω
Step 1 (source transformation)
102 V
+_
a
16 V
a
30 Ω
RL
+
_
+
_
40 Ω
I
a
24 V
_
b
3.4 A
40 V
30 Ω
30 Ω
a
RL
b
60 Ω
RL
_
+
+ Vab
Step 4 (parallel I and R)
b
20 Ω
Step 2 (series V and R)
102 V
+_
RL
b
Step 3
(2 source transformations)
60 Ω
0.4 A
Figure 2-31: Circuit evolution for Example 2-14.
R0
1
R2
R1
V0
+
_
section introduces a new circuit-simplification tool—known as
the Wye–Delta (Y–�) transformation—for dealing specifically
with such a circuit arrangement.
R3
3
R4
4
R5
2
Figure 2-32: No two resistors of this circuit share the same
current (connected in series) or voltage (connected in parallel).
To that end, let us start by considering the Y and � circuit
segments shown in Fig. 2-33(a) and (b), respectively. Let us
assume that the same external circuit is connected to the Y and
� circuits at nodes 1, 2, and 3. Our task is to develop a set of
transformation relations between the resistor set (R1 , R2 , R3 )
of the Y circuit and the resistor set (Ra , Rb , Rc ) of the � circuit
that will allow us to replace the Y circuit with the � circuit
(or vice versa) without affecting the terminal characteristics
(currents and voltages) at nodes 1, 2, and 3. That is, from the
standpoint of the external circuit, the Y and � circuits should
behave equivalently.
The standard procedure employed in deriving the transformation relations is to (a) set one node as an open circuit (i.e.,
82
CHAPTER 2
1
2
R1
c
Rc
1
2
R2
Rb
R3
3
Y circuit
(a)
Figure 2-33: Y–� equivalent circuits.
not connected to an external circuit), (b) derive an expression
for the resistance between the other two nodes (as if a voltage
source were connected between them) of theY circuit, (c) follow
the same procedure for the � circuit, and then (d) equate the
expressions obtained in steps (b) and (c). For example, with
node 3 open-circuited, theY circuit reduces to just two in-series
resistors R1 and R2 , in which case the resistance between nodes
1 and 2 is simply
(Y-circuit).
(2.39)
Repeating the procedure for the � circuit (again with node 3
not connected to the external circuit) leads to a configuration
between nodes 1 and 2 consisting of Rc in parallel with the
series combination of Ra and Rb . Hence,
R12 =
Rc (Ra + Rb )
Ra + R b + R c
(�-circuit).
(2.40)
Upon equating the expressions for R12 given by Eqs. (2.39) and
(2.40), we have
R1 + R2 =
� →Y Transformation
Solution of the preceding set of equations provides the
following expressions for R1 , R2 , and R3 :
Ra
3
Δ circuit
(b)
R12 = R1 + R2
2-4.1
Rc (Ra + Rb )
.
Ra + R b + R c
(2.41a)
R1 =
Rb Rc
Ra + R b + R c
(2.42a)
R2 =
R a Rc
Ra + R b + R c
(2.42b)
R3 =
Ra Rb
Ra + R b + R c
(2.42c)
Note the symmetry associated with the form of these
expressions:
R1 of the Y circuit, which is connected to node 1, is
given by an expression (Eq. (2.42a)) whose numerator is
the product of the two resistors connected to node 1 in the
� circuit, namely Rb and Rc . The same form of symmetry
applies to R2 and R3 . The transformation represented by the three parts of
Eq. (2.42) enables us to replace the � circuit with a Y circuit
without having any impact on the external circuit.
2-4.2 Y→ � Transformation
When applied in the reverse direction, from Y to �, the
associated transformation relations are given by the following
expressions.
Ra =
R1 R2 + R2 R3 + R1 R3
R1
(2.43a)
Rb =
R1 R2 + R2 R3 + R1 R3
R2
(2.43b)
Rc =
R1 R2 + R2 R3 + R1 R3
R3
(2.43c)
When applied to the other two combinations of nodes, the
foregoing procedure leads to:
and
RESISTIVE CIRCUITS
Ra (Rb + Rc )
R2 + R3 =
Ra + R b + R c
Rb (Ra + Rc )
.
R 1 + R3 =
Ra + R b + R c
(2.41b)
(2.41c)
2-4 WYE–DELTA (Y–�) TRANSFORMATION
83
For this transformation, the symmetry is as follows:
Ra of the � circuit, which is connected between nodes
2 and 3, is given by an expression (Eq. (2.43a)) whose
denominator is R1 , the resistor connected to node 1 of
the Y circuit. This form of symmetry also applies to Rb
and Rc . When we started our examination of theY–� transformation,
we referred to Fig. 2-32. Returning to that figure, we note
that the circuit contains two obvious � circuits, namely
R1 –R2 –R3 and R3 –R5 –R4 , as well as two not-so-obvious Y
circuits: R1 –R3 –R4 and R2 –R3 –R5 . To demonstrate that those
two combinations are indeed Y circuits, we have redrawn
the circuit in the form shown in Fig. 2-34(a) where we
stretched nodes 1 and 2 from single points into two horizontal
lines. Electrically, we did not change the circuit whatsoever.
Figure 2-34(b) depicts another rendition of the same circuit.
In this case, the Y circuit given by R1 –R3 –R4 resembles a
sideways T rather than aY, and the � circuit given by R1 –R3 –R2
resembles a �. Hence, it is not surprising that the Y–�
transformation is oftentimes called the T–� transformation. It
is instructive to note that the shape in which a circuit is drawn
is irrelevant electrically; what does matter is how the branches
are connected to the nodes.
2-4.3
Balanced Circuits
If the resistors of the � circuit are all equal, the circuit is said to
be balanced (because the three resistors will have equal voltages
across them and equal currents through them), as a result of
which the Y circuit will also be balanced and will have equal
resistors given by
R1 = R2 = R3 =
R0
1
1
V0
+
3
R3
R4
R5
+
+
-_
Ra = Rb = Rc = 3R1 (if R1 = R2 = R3 ).
(2.44b)
Example 2-15: Applying Y– Transformation
2
(a)
V0
(2.44a)
and conversely
4
2
R0
(if Ra = Rb = Rc ),
R2
R1
+
-_
Ra
3
1
1
R1
R2
R3
3
Simplify the circuit in Fig. 2-35(a) by applying the Y–�
transformation so as to determine the current I .
Solution: Noting the symmetry rules associated with the
transformation, the � circuit connected to nodes 1, 3, and 4
can be replaced with a Y circuit, as shown in Fig. 2-35(b), with
resistances
R4
R5
and
2
2
(b)
Figure 2-34: Redrawing the circuit of Fig. 2-32 to resemble
(a) Y and (b) T and � subcircuits.
24 × 36
= 12 �,
24 + 36 + 12
24 × 12
R2 =
= 4 �,
24 + 36 + 12
R1 =
4
R3 =
36 × 12
= 6 �.
24 + 36 + 12
Next, we add the 4 � and 20 � resistors in series, obtaining 24 �
for the right branch of the trapezoid. Similarly, the left branch
combines into 12 � and the two in-parallel branches reduce to
a resistance equal to (24 × 12)/(24 + 12) = 8 �. When added
84
CHAPTER 2
I
5Ω
Concept Question 2-10: When is theY–� transformation
1
36 Ω
100 V
+
+
_-
6Ω
Original circuit
(a)
used? Describe the inherent symmetry between the
resistance values of the Y circuit and those of the �
circuit. (See
)
24 Ω
12 Ω
3
RESISTIVE CIRCUITS
4
Concept Question 2-11: How are the elements of a
balanced Y circuit related to those of its equivalent �
circuit? (See
)
20 Ω
2
Exercise 2-9: For each of the circuits shown in Fig. E2.9,
determine the equivalent resistance between terminals
(a, b).
I
5Ω
1
a
Req
R1 = 12 Ω
+
R3 = 6 Ω
+
_
(b)
After ∆
10 Ω
(a)
R2 = 4 Ω
3
4
6Ω
10 Ω
b
c
100 V
10 Ω
20 Ω
a
10 Ω
Req
10 Ω
10 Ω
b
Y transformation 2
(b)
Figure E2.9
Answer: (a) Req = 15 �, (b) Req = 0. (See
I
100 V
(c)
+
+
_
25 Ω
Final circuit
Figure 2-35: Example 2-15 circuit evolution.
to the 5 � and 12 � in-series resistances, this leads to the final
circuit in Fig. 2-35(c). Hence,
I=
100
= 4 A.
25
)
2-5 The Wheatstone Bridge
Developed initially by Samuel Christie (1784–1865) in
1833 as an accurate ohmmeter for measuring resistance,
the Wheatstone bridge subsequently was popularized by Sir
Charles Wheatstone (1802–1875), who used it in a variety of
practical applications. Today, the Wheatstone-bridge circuit is
integral to numerous sensing devices, including strain gauges,
force and torque sensors, and inertial gyros. The reader is
referred to Technology Brief 3 for an illustrative example.
The Wheatstone-bridge circuit shown in Fig. 2-36 consists of
four resistors: two fixed resistors (R1 and R2 ) of known values,
2-5 THE WHEATSTONE BRIDGE
85
V0
V0
R1
V0
+
−
V1
R2
Ia
Ra
R3
R
V0
V2
Ammeter
+
−
R
Vout
V1
R
Rx
Vout ≈
Figure 2-36: Wheatstone-bridge circuit containing an
adjustable variable resistor R3 and an unknown resistor Rx .
When R3 is adjusted to make Ia = 0, Rx is determined from
Rx = (R2 /R1 )R3 .
V2
R + ΔR
Flexible
resistor
V0
4
�R
R
Figure 2-37: Circuit for Wheatstone-bridge sensor.
from which we have
an adjustable resistor R3 whose value also is known, and a
resistor Rx of unknown resistance. A dc voltage source V0 is
connected between the top node and ground, and an ammeter is
connected between nodes 1 and 2. The standard procedure for
determining Rx starts by adjusting R3 so as to make Ia = 0.
The absence of current flow between nodes 1 and 2,
called the balanced condition, implies that V1 = V2 . From voltage division, V1 = R3 V0 /(R1 + R3 ),
V2 = Rx V0 /(R2 + Rx ). Hence,
Rx V0
R3 V0
=
.
R1 + R 3
R2 + R x
and
(2.45)
A balanced bridge also implies that the voltages across R1
and R2 are equal,
R 2 V0
R1 V0
=
.
R1 + R 3
R2 + R x
Dividing Eq. (2.45) by Eq. (2.46) leads to
R3
Rx
=
,
R1
R2
(2.46)
Rx =
R2
R1
R3
(balanced condition).
(2.47)
Example 2-16: Wheatstone-Bridge Sensor
A special version of the Wheatstone bridge (Fig. 2-37) is
configured specifically for measuring small deviations from
a reference condition. An example of a reference condition
might be a highway bridge with no load on it. A strain gauge
employing a high-sensitivity flexible resistor can measure the
small deflection in the bridge surface caused by the weight
(force) of a car or truck when present on it. As the force deflects
the surface of the bridge to which the resistor is attached, the
resistor stretches in length, causing its resistance to increase
from a nominal value R (under no stress) to R + �R. The other
three resistors in the Wheatstone-bridge circuit are all identical
and equal to R. Thus, when no vehicles are present on the bridge,
the circuit is in the balanced condition.
Develop an approximate expression for Vout (the output
voltage between nodes 1 and 2) for �R/R � 1.
Solution: Voltage division gives
V1 =
V0
V0 R
=
R+R
2
86
CHAPTER 2
and
RESISTIVE CIRCUITS
I
V0 (R + �R)
V0 (R + �R)
=
.
V2 =
R + (R + �R)
2R + �R
I0
Current source I0
Resistor R
Hence,
V0 (R + �R) V0
−
2R + �R
2
2V0 (R + �R) − V0 (2R + �R)
=
2(2R + �R)
V0 �R
V0 �R
=
=
.
4R + 2 �R
4R(1 + �R/2R)
1
slope =
R
Vout = V2 − V1 =
Since �R/R � 1, ignoring the second term in the denominator
would incur negligible error. Such an approximation leads to
Vout
V0
≈
4
�R
R
(2.48)
,
providing a simple linear relationship between the change in
resistance �R and the output voltage Vout .
Concept Question 2-12: What is a Wheatstone bridge
used for? (See
)
Concept Question 2-13: What is the balanced condition
in a Wheatstone bridge? (See
)
Answer: 10−6 or 1 part in a million. (See
)
2-6 Application Note: Linear versus
Nonlinear i–υ Relationships
Ideal resistors and voltage and current sources are all considered
linear elements; the relationship between the current and the
voltage across any one of them is described by a straight line.
The i–υ relationships plotted in Fig. 2-38 for the current source,
the voltage source, and the resistor have slopes of 0, ∞, and
1/R, respectively.
V0
V
Figure 2-38: I –V relationships for a resistor R, an ideal voltage
source V0 , and an ideal current source I0 .
2-6.1 The Fuse: A Simple Nonlinear Element
Many very useful circuit elements do not have linear i–υ
relationships. Consider Fig. 2-39(a). A realistic voltage source
is connected to a load RL at terminals (a, b). Note that the
resistance value of the source resistor Rs is much smaller than
that of the load (1 � versus 1 k�). It is typical of a well-designed
voltage source to have a small source resistor so as to minimize
the voltage drop across it. The switch simulates an accidental
short circuit. Application of KVL to the loop in Fig. 2-39(a)
(with the switch in the open position) leads to
Is =
Exercise 2-10: If in the sensor circuit of Fig. 2-37,
V0 = 4 V and the smallest value of Vout that can be
measured reliably is 1 μV, what is the corresponding
accuracy with which (�R/R) can be measured?
Voltage source V0
Vs
100
=
≈ 0.1 A
Rs + R L
1 + 1000
(switch open).
If, accidentally, a short circuit were to be introduced across
terminal (a, b), which is represented schematically by the
closing of the SPST switch, the current Is will flow entirely
through the short circuit, resulting in
Is =
Vs
= 100 A!
Rs
(switch closed).
This is a very large current. Many household wires would begin
to overheat and melt off their insulation at such high currents.
It is precisely for this reason that the fuse (and later, the
breaker) came into heavy use in power-distribution circuits
[Fig. 2-39(b)]. The i–υ curve for a fuse, shown in [Fig. 2-39(c)],
is decidedly nonlinear: Above a certain current level, the fuse
will cease to allow more current to pass through it, acting like
a current limiter. The physical device contains a small metal
wire that is designed to melt away at a specific current level
2-6 APPLICATION NOTE: LINEAR VERSUS NONLINEAR I –υ RELATIONSHIPS
Is
+
_
Rs = 1 Ω
Vs = 100 V
ID
a
Accidental
short circuit
RL = 1 kΩ
Load
b
(a) Accidental short circuit represented by a switch
+
_
Rs
If
Vs = 100 V
Fuse
Vf
Anode (p-type)
VF
VD
RD
Cathode (n-type)
Source
Is
87
(a) Diode symbol
(b) Realistic diode model
ID
a
RL
Accidental
short circuit
Knee voltage = 0
VD
b Load
(b) Fuse to protect voltage source
Source with fuse
(c) i−υ of an ideal diode
ID
If
slope = 1/RD
Real diode response
Overcurrent limit
Vf
(d) i−υ of a real diode
(c) i−υ characteristic for a fuse prior to opening
Figure 2-39: Use of a fuse to protect a voltage source.
(called its overcurrent), thereby becoming an open circuit and
preventing large currents from flowing through the circuit. Note
that Fig. 2-39(b) does not explain the fuse’s time-dependent
behavior; it describes the fuse’s behavior only until the moment
at which the current exceeds the overcurrent. After that, the fuse
just looks like an open circuit.
Fuses also are rated for several other important characteristics
such as how fast they can respond. Ultra-fast fuses can trip
in milli- to micro-seconds. Another important attribute is the
maximum voltage it can sustain across its terminals. Note that in
Fig. 2-39(b), once the fuse assumes the role of an open circuit,
the voltage across it becomes Vs . If this voltage is too high,
arcing and sparks might develop between the terminals (we
know from physics that a large-enough voltage in air will break
down the air molecules, causing them to conduct and generate a
bright spark). Clearly, that is an important rating factor to keep
in mind when selecting a fuse.
VD
VF
ID
Approximate
practical
diode response
VD
Forward voltage VF
(e) Approximate diode response
Figure 2-40: pn-junction diode schematic symbol and i–υ
characteristics.
2-6.2 The Diode: A Solid-State Nonlinear
Element
The diode is a mainstay of solid-state circuits. Its circuit
schematic symbol is shown in Fig. 2-40(a) with VD as the
voltage across the diode, defined such that the (+) side is
at the anode terminal of the diode and the (−) side at its
88
cathode terminal. There are many types of diodes, including the
basic pn-junction diode, the Zener and Schottky diodes, and
the ubiquitous light-emitting diode (LED) used in consumer
electronics. A brief introduction of the LED was made earlier
in Section 2-1.4, and a more detailed overview of its operation
is provided in Technology Brief 5. For the present, we will limit
our discussion to the pn-junction diode, commonly referred
to simply as the diode. The pn diode consists of a p-type
semiconductor placed in contact with an n-type semiconductor,
thereby forming a junction. The p-type material is so named
because the impurities that have been added to its bulk material
result in a crystalline structure in which the available charged
carriers are predominantly positive charges. The opposite is true
for the n-type material; different types of impurities are added to
the bulk material, as a result of which the predominant carriers
are negative charges (electrons). In the absence of a voltage
across the diode, the two sets of carriers diffuse away from each
other at the edge of the junction, generating an associated builtin potential barrier (voltage), called the forward-bias voltage
or offset voltage VF .
The main use of the diode is as a one-way valve for current.
Figure 2-40(c) displays the i–υ relationship for an ideal diode,
which conveys the following behavior:
Current can flow through the diode from the (+)
terminal to the (−) terminal unimpeded, regardless of its
magnitude, but it cannot flow in the opposite direction. In other words, an ideal diode looks like a short circuit for
positive values of VD and like an open circuit for negative values
of VD . These two states are called forward bias and reverse
bias, respectively. When a positive-bias voltage exceeding VF
is applied to the diode, the potential barrier is counteracted,
allowing the flow of current from p to n (which includes positive
charges flowing in that direction as well as negative charges
flowing in the opposite direction). On the other hand, if a
negative-bias voltage is applied to the diode, it adds to the
potential barrier, further restricting the flow of charges across
the barrier and resulting in no current flow from n to p.
The voltage level at which the diode switches from reverse
bias to forward bias is called the knee voltage or forward-bias
voltage. For the ideal diode, VF = 0 and the knee is at
VD = 0, which means that the forward-bias segment of its i–υ
characteristic is aligned perfectly along the ID axis, as shown
in Fig. 2-40(c).
Real diodes differ from the ideal diode model in two
important respects: (1) the knee in the curve is not at VD = 0,
and (2) the diode does not behave exactly like a perfect short
circuit when in forward bias nor like a perfect open circuit
CHAPTER 2
RESISTIVE CIRCUITS
when in reverse bias. Figure 2-40(d) shows a realistic diode
i–υ curve. Note how nonlinear a real diode really is! For many
electrical engineering applications, however, the nonlinearities
are not so important, and the approximate ideal-like diode
model shown in Fig. 2-40(e) is quite sufficient. The only
difference between the ideal diode model of Fig. 2-40(c) and
the approximate diode model of Fig. 2-40(e) is that in the latter
the transition from reverse to forward bias occurs at a non-zero,
positive value of VD , namely the forward-bias voltage VF . For
a silicon pn-junction diode, a typical value of VF is 0.7 V and a
realistic model is shown in Fig. 2-40(b). A typical value of RD
is 10–20 �. We always should remember that VF is a property
of the diode itself, not of the circuit it is a part of.
Example 2-17: Diode Circuit
The circuit in Fig. 2-41 contains a diode with VF = 0.7 V.
Determine ID , assuming RD to be negligibly small.
Solution: Initially, we do not know whether the diode is
forward biased or reverse biased. We will first assume it is
forward biased in order to compute ID . Then, if it turns out
that ID is positive, our assumption will have been validated,
but if ID is negative, we will conclude that the diode is reverse
biased and no current flows through the circuit.
Application of KVL around the loop gives
−Vs + ID R + VD = 0.
If the diode is forward biased, VD = 0.7 V, which leads to
ID =
Vs − VD
5 − 0.7
=
= 43 mA.
R
100
The positive sign of ID confirms our assumption that the diode
is indeed forward biased.
As an interesting aside, one could use this circuit to control the
current through a light-emitting diode (LED). As explained in
Technology Brief 5, the amount of light emitted by an LED (i.e.,
how bright it appears) is proportional directly to the current ID
passing through it when it is forward biased. By using the circuit
VR
Vs = 5 V
+
_
ID
R = 100 Ω
Figure 2-41: Diode circuit of Example 2-17.
VD
2-6 APPLICATION NOTE: LINEAR VERSUS NONLINEAR I –υ RELATIONSHIPS
in Fig. 2-41 and choosing an appropriate value for R, we can
build a circuit that forward biases an LED and controls its
brightness.
Example 2-18: Square-Wave Waveform
The circuit in Fig. 2-42 contains two diodes, both with
VF = 0.7 V. The waveform of the voltage source consists of
a single cycle of a square wave. Generate plots for i1 (t) and
i2 (t). Ignore RD for both diodes.
Solution: Again, we will use the diode model of
Fig. 2-40(b). From the analysis of Example 2-17, we
υa
+
_
υs(t)
i1
+
_
D1
R1
53 Ω
_
+
R2
concluded that if the voltage across a series combination of
a diode and a resistor exceeds VF of the diode (with the +
polarity of the voltage coinciding with the + side of the diode),
current will flow through the series combination, but if the
voltage is negative, no current will flow through the diode.
For the first half of the source voltage cycle, υa , the voltage
across the series combination (D1 , R1 ) is positive at 6 V. Hence,
i1 (t) =
υa − 0.7
6 − 0.7
=
= 0.1 A
R1
53
106 Ω
i2 (t) = 0
i2 (t) =
for 1 ≤ t ≤ 2 s,
6 − 0.7
6 − 0.7
= 0.05A
=
R2
106
for 1 ≤ t ≤ 2 s.
The combined results are displayed in Fig. 2-42(c).
υs (t)
Concept Question 2-14: What is the overcurrent of a
6V
fuse? (See
t (s)
2
1
)
Concept Question 2-15: Why does a pn-junction diode
have a non-zero forward-bias voltage VF? (See
−6 V
(b) Source voltage waveform
i1(t)
1
2
I
3 kΩ
12 V
i2(t)
0.05 A
)
Exercise 2-11: Determine I in the two circuits of
Fig. E2.11. Assume VF = 0.7 V for all diodes.
2 kΩ
0.1 A
for 0 ≤ t ≤ 1 s.
The opposite behavior occurs during the second half of the cycle
of υs (t), diode D2 will conduct current through it, but diode D1
will not. Hence,
i1 (t) = 0
(a) Diode circuit
for 0 ≤ t ≤ 1 s.
But for series combination (D2 , R2 ), no current will flow
through diode D2 because the polarity of υa is opposite of that
of the diode. Hence,
i2
D2
89
I
2 kΩ
3 kΩ
12 V
t (s)
(c) Current waveforms
Figure 2-42: Diode circuit and waveforms of Example 2-18.
(a)
(b)
Figure E2.11
Answer: (a) I = 2.12 mA, (b) I = 0. (See
)
90
TECHNOLOGY BRIEF 5: LIGHT-EMITTING DIODES (LEDS)
Technology Brief 5
Light-Emitting Diodes (LEDs)
Longer
leg
Lens
Light
Anode
How LEDs Are Made
LEDs are a specific type of the much larger family
of semiconductor diodes, whose basic behavior we
discussed earlier in Section 2-6. When a voltage is
applied in the forward-biased direction across an LED,
current flows and photons are emitted (Fig. TF5-1). This
occurs because as electrons surge through the diode
material, they recombine with charge carriers in the
material and release energy in the form of photons
(quanta of light). The energy of the emitted photon (and
hence the wavelength/color) depends on the type of
material used to make the diode. For example, a diode
made of indium gallium aluminum phosphide (InGaAlP)
emits red light, while a diode made from gallium nitride
(GaN) emits bluish light. Extensive research over many
decades has yielded materials that can emit photons
at practically any wavelength from the infrared through
ultraviolet (Fig. TF5-2). Various “tricks” have also been
employed to modify the emitted light after emission. To
make white light diodes, for example, certain blue light
diodes can be coated with crystal powders which convert
the blue light into a broad-spectrum “white” light. Other
coatings such as quantum dots are still the subject
of today’s research. In a traditional package, the LED
transmits light in a hemispherical pattern, but numerous
other light-focused packaging methods are available that
can focus the light in virtually any way imaginable. LEDs
can be focused using highly reflective coatings to intensify
their light for higher power applications.
Metal
leads
Cathode
Light-emitting
semiconductor
diode
Figure TF5-1: Basic configuration of an LED.
In addition to semiconductor LEDs, a newer class of
devices called organic light emitting diodes (OLEDs)
are the subject of intense research efforts. OLEDs operate
in a manner that is analogous to conventional LEDs,
but are made from organic molecules (often polymers).
Because OLEDs are lighter weight than conventional
LEDs and can be made to be flexible, they have
the potential to revolutionize handheld and lightweight
displays, such as those used in phones, PDAs and flexible
screens. Imagine a flexible contact lens that could allow
you to see a heads-up display or augmented reality!
LED Advantages
LEDs have several major attributes that have made them
a key element of many applications. First, they can be
ide
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min
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min
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hid
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Intensity
Material
composition
Epoxy
case
350
400
UV
450
500
550
600
650
Wavelength (nm)
700
750
800
850
900
950
Infrared
Figure TF5-2: Emission spectra of LEDs made of different material composites.
1000
TECHNOLOGY BRIEF 5: LIGHT-EMITTING DIODES (LEDS)
91
FigureTF5-4: LED eyelashes can be worn in many colors,
and can be made to turn on or off with a tip of the head.
(Credit: Soomi Park.)
Figure TF5-3: LED-lit building.
produced in a wide variety of wavelengths from infrared
through ultraviolet. Targeted or broad spectra can also
be produced, making them applicable to virtually any
optical application. Second, they are energy efficient.
An incandescent lightbulb uses 80% of its energy
for heat and 20% to produce light. LEDs use only
about 20% of their energy for heat and 80% for light.
This also makes them cool, requiring less energy to
remove the excess heat. Third, they are manufactured
in a huge array of colors, sizes, shapes, designs,
and more. They are affordable (not yet less expensive
than incandescent bulbs in the initial purchase price,
but definitely less expensive over the lifetime of the
bulb). Fourth, they last longer (often > 100k hours) than
incandescent bulbs, which is particularly important in
hard-to-reach applications. Fifth, they can be integrated
directly into semiconductor circuits, printed circuit boards,
and light-focusing packages. Various combinations of
these advantages are key to the following broad range
of applications of LEDs.
LEDs for Lighting
In an era where energy efficiency matters financially,
environmentally, and practically, LEDs have become a
popular mainstay in home and office lighting, street
lighting and consumer products from home appliances
and toys to high-efficiency tail lights for cars and
flashlights. Of growing importance is the replacement of
traditional incandescent bulbs with LEDs in homes and
buildings (Fig. TF5-3), because of their energy efficiency.
But lighting is more than just enabling us to see at night.
LEDs can be used in horticulture to efficiently target ideal
wavelengths for plant growth, and exposing produce to
certain wavelengths of light can help it ripen on demand,
or can extend its ripened shelf life. UV LEDS are being
explored to enhance development of polyphenol, which
are believed to have antioxidant qualities, in growth of
green, leafy vegetables. LEDs provide high visibility bike
lights, safety vests, tennis shoes, and more. They are
also used artistically for decoration and advertising on
buildings and signs, woven into clothes often augmented
by plastic fiber optic threads (e.g., Philips Research
Lumalive textiles), or even worn with LED eyelashes (see
Fig. TF5-4)!
LEDs for Medical Applications
LEDs are used for a variety of medical applications. One
particularly important application is the pulse oximeter
(Fig. TF5-5), which measures blood oxygen level and
pulse rate. Oxygenated blood absorbs light at 660 nm
(red light), whereas deoxygenated blood absorbs light at
940 nm (infrared). Pulse oximeters use two LEDs, one at
660 nm and another at 940 nm, which are arranged to
transmit through a translucent section of the body such
as the finger or ear lobe. Two associated light collecting
sensors are placed on the opposite side to measure the
amount of each wavelength that is transmitted through the
body. The ratio of the red and infrared light indicates how
much oxygen is in the blood. To ensure that the received
light signals are actually from the blood, the measurement
is made over several seconds (several pulses), focusing
in on the pulsing blood rather than the static surrounding
tissues.
92
TECHNOLOGY BRIEF 5: LIGHT-EMITTING DIODES (LEDS)
Figure TF5-5: Pulse oximeter used to measure blood
oxygen content.
LEDs are also used to treat many superficial (skin)
conditions. Red light in the range of 600–950 nm can be
used to treat acne, rosacea, and wrinkles. The red light
works by stimulating the mitochondria in the skin to make
older cells behave like younger cells. Blue-light therapy
in the 405–420 nm range is used for acne treatments
and “anti-aging” skin therapies because of its ability to
stimulate collagen in the skin. Green to yellow light (532–
595 nm) can reduce skin redness (rosacea). Combining
LED light sources with topical drug treatments that are
photoactivated may be used to treat a variety of skin
conditions including skin cancer and pre-cancer.
LEDs are also used extensively in dentistry. Blue
LEDs can be used to cure (harden) polymer composite
materials used for fillings. The rate at which the filling
material cures is proportional to the power carried by the
LED light, so high power LEDs are used to speed up the
curing process.
Ultraviolet (UV) LEDs
The UV range provides a wealth of applications, and
low-cost high-power UV LEDs are enabling many of
these applications. Inks (printing), adhesives and coatings
are often cured with LEDs in the UV range (primarily
395 nm, 385 nm or 365 nm). UV LED flashlights are
used to detect fraudulent identification (at the airport, for
example) and currency. UV-LEDs are used extensively
in forensic analysis and drug discovery. In the lower
UV spectral range (100–280 nm) LEDs sterilize air
and water by breaking up the DNA and RNA of
Figure TF5-6: Large LED display.
microorganisms and preventing their reproduction. For
example, 275 nm is believed to be the most effective
wavelength for eradicating pathogens such as E-coli in
water. LEDs in this range are also used for spectroscopic
and fluorescence measurements and for chemical and
biological detectors.
LED Displays
LEDs, with their wide range of colors, efficiency, low cost,
flexibility, low profile and light weight, are ideal for both
handheld displays and much larger displays (such as
billboards and signage, as shown in Fig. TF5-6). Some
LED displays use edge lighting where LEDs shine light
across the screen (allowing the display to be thinner
than traditional screens but not improving picture quality).
Others use RGB LEDs.These LEDs use a common anode
but have separate cathodes for red, green and blue LEDs
(making the composite a 4-pin LED). They can be made
to generate light with almost any color, depending on the
voltages applied across the combination of RGB pins.
This greatly enhances picture color. RGB LEDs can also
be dimmed independently and instantly (giving a more
dynamic picture, especially great “black” levels for dark
scenes). The flexibility and bendability of OLEDs promise
new, creative options for the next generation of TVs and
smart phones—can you imagine rolling your TV up like a
poster and carrying it with you anywhere? Or wearing it?
Or . . . ?
2-6 APPLICATION NOTE: LINEAR VERSUS NONLINEAR I –υ RELATIONSHIPS
Mechanical load
P (N/m2)
No load
Δx
R
R + ΔR
Figure 2-43: The resistance of a piezoresistor changes when
mechanical stress is applied.
2-6.3
Piezoresistor Circuit
According to Technology Brief 4, if we apply a force on
a resistor along its axis (Fig. 2-43), the resistance changes
from R0 , which is the resistance with no stress (pressure)
applied, to R as
R = R0 + �R,
(2.49)
�R = R0 αP,
(2.50)
93
of such a sensor. As a reference, a finger can apply about 50 N
of force across an area of 1 cm2 (10−4 m2 ), which is equivalent
to a pressure P = 5 × 105 N/m2 . If the piezoresistor is made of
silicon with α = −1 × 10−9 m2 /N and if the dc source in the
Wheatstone bridge is V0 = 1 V, Eq. (2.51) yields the result that
Vout = −125 μV, which is not impossible to measure but quite
small nevertheless. How then are such pressure sensors used?
The answer is simple: We need a mechanism to amplify the
signal. We can do so electronically by feeding Vout into a highgain amplifier, or we can amplify the mechanical pressure itself
before applying it to the piezoresistor. The latter approach can
be realized by constructing the piezoresistor into a cantilever
structure, as shown in Fig. 2-44 (a cantilever is a fancy name
for a “diving board” with one end fixed and the other free).
Deflection of the cantilever tip induces stress at the base of
the cantilever near the attachment point. If properly designed,
the cantilever—which usually is made of silicon or metal—can
amplify the applied stress by several orders of magnitude, as
we see in the following example.
Example 2-19: A Realistic Piezoresistor Sensor
and the deviation �R is given by
where α is a property of the material that the resistor is made
of and is called its piezoresistive coefficient, and P is the
mechanical stress applied to the resistor. The unit for P is
newtons/m2 (N/m2 ) and the unit for α is the inverse of that.
Compression decreases the length of the resistor and increases
its cross section, so in view of Eq. (2.2), which states that the
resistance of a longitudinal resistor is given by R = ρ�/A, the
consequence of a compressive force—namely reduction in �
and increase in A—leads to a reduction in the magnitude of R.
When a force F is applied on the tip of a cantilever of
width W , thickness H , and length L (as shown in Fig. 2-44)
the corresponding stress exerted on the piezoresistor attached
to the cantilever base is given by
P=
FL
.
WH2
(2.52)
Determine the output voltage of a Wheatstone-bridge circuit if
F = 50 N, V0 = 1 V, the piezoresistor is made of silicon, and
the cantilever dimensions are W = 0.5 cm, H = 0.5 mm, and
L = 1 cm.
Solution: Combining Eqs. (2.51) and (2.52) gives
Hence, for compression, �R is negative, requiring that
α in Eq. (2.50) be defined as a negative quantity. If a piezoresistor is integrated into a Wheatstone-bridge
circuit (as in Fig. 2-37), such that all three other resistors are
given by R0 , the expression for the voltage output given by
Eq. (2.48) becomes
V0 �R
V0
Vout =
=
αP.
(2.51)
4
R0
4
Since V0 and α are both constants, the linear relationship
between the applied stress P and the output voltage Vout makes
the piezoresistor a natural sensor for detecting or measuring
mechanical stress. However, we should examine the sensitivity
V0
FL
α·
4
WH2
1
50 × 10−2
= × (−1 × 10−9 ) ×
−3
4
(5 × 10 ) × (5 × 10−4 )2
Vout =
= −0.1 V.
The integrated piezoresistor–cantilever arrangement generates an output voltage whose magnitude is on the order of 800
times greater than that generated by pressing on the resistor
directly!
Concept Question 2-16: Does compression along the
current direction increase or decrease the resistance?
Why? (See
)
94
CHAPTER 2
RESISTIVE CIRCUITS
Piezoresistor
Rest position
P
Force F
W
H
L
Deflected position
Figure 2-44: A cantilever structure with integrated piezoresistor at the base.
Concept Question 2-17: Why are piezoresistors placed
In this section, you will learn how to:
at the base of cantilevers and other deflecting structures?
(See
)
• Set up and analyze a simple dc circuit in Multisim.
Exercise 2-12: What would the output voltage associated
with the circuit of Example 2-19 change to, if the
cantilever thickness is reduced by a factor of 2?
Answer: Vout = −0.4 V. (See
)
2-7 Introducing Multisim
Multisim 13 is the latest edition of National Instrument’s SPICE
simulator software. SPICE, originally short for Simulation
Program with Integrated Circuit Emphasis, was developed
by Larry Nagel at the University of California, Berkeley,
in the early 1970s. It since has inspired and been used in
many academic and commercial software packages to simulate
analog, digital, and mixed-signal circuits. Modern SPICE
simulators like Multisim are indispensable in integrated circuit
design; ICs are so complex that they cannot be built and
tested on a breadboard ahead of production (see Technology
Brief 7). With SPICE, you can draw a circuit from a library of
components, specify how the components are connected, and
ask the program to solve for all voltages and currents at any
point in time. Modern SPICE packages like Multisim include
very intuitive graphic user interface (GUI) tools that make both
circuit design and analysis very easy. Multisim allows the user
to simulate a laboratory experience on his/her computer ahead
of actually working with real components.
• Use the Measurement Probe tool to quickly solve for
voltages and currents.
• Use the Analysis tools for more comprehensive solutions.
We will return to these concepts and learn to apply many
other analysis tools throughout the book. Appendix C provides
an introduction to the Multisim Tutorial available on the book
website http://c3.eecs.umich.edu/. The Tutorial is a useful
reference if you have never used Multisim before. When
defining menu selections starting from the main window, the
format Menu → Sub-Menu1 → Sub-Menu2 will be used.
2-7.1 Drawing the Circuit
After installing and running Multisim, you will be presented
with the basic user interface window, also referred to as the
circuit window or the schematic capture window (see Multisim
Tutorial on the book website). Here, we will draw our circuits
much as if we were drawing them on paper.
Placing resistors in the circuit
Components in Multisim are organized into a hierarchy
going in a descending general order from Database →
Group → Family → Component. Every component that
you use in Multisim will fit into this hierarchy somewhere.
Place → Component opens the Select a Component
window. (Ctrl-W is the shortcut key for the placecomponent command. Multisim has many shortcut keys,
2-7
INTRODUCING MULTISIM
95
Figure 2-45: Multisim screen for selecting and placing a resistor.
and it will be worthwhile for you to learn some of the basic
ones to improve your efficiency in creating and testing
circuits.)
Choose Database: Master Database and Group: Basic
in the pulldown menus.
Now select Family: RESISTOR.
You should see a long list of resistor values under
Component and the schematic symbol for a resistor
(Fig. 2-45). Note that the Family menu contains other
components like inductors, capacitors, potentiometers,
and many more. We will use these in later chapters.
Scroll down and select a 1k value (the units are in ohms)
and then click OK. You should see a resistor in the capture
window. Before clicking in the window, Ctrl-R allows you
to rotate the resistor in the window. Rotate the resistor
such that it is vertical and then click anywhere on the
window to place it. Repeat this operation; this time place a
vertical 100-ohm resistor directly below the first one (as in
Fig. 2-46). How to connect them together will be described
shortly. Once you are finished placing components, click
Close to return to the schematic capture window.
Note that the components have symbolic names (R1 and
R2) and values displayed next to them (1k and 100).
Also, by double-clicking on a specific component, you can
access many details of the component model and its values.
For now, it is sufficient to know that the Resistance value
can be altered at any time through the Value menu.
Placing an independent voltage source
Just as you did with the resistors, open up the Select a
Component window.
Choose Database: Master Database and Group:
Sources in the pulldown menus.
Select Family: POWER SOURCES.
Under Component select DC POWER and click OK.
Place the part somewhere to the left of the two resistors
(Fig. 2-46).
Once placed, close the component window, then doubleclick on component V1. Under the Value tab, change the
Voltage to 10 V. Click OK.
Wiring components together
Place → Wire allows you to use your mouse to
wire components together with click-and-drag motions
(Ctrl-Q is the shortcut key for the wire command). You
96
CHAPTER 2
RESISTIVE CIRCUITS
Simulation toolbar
Probe 1 display
1
Node 1
Component
name
Node 2
2
Component
value
Probe 1 display
0
Form wire corner
by clicking here
as you drag wire
Ground
Finish dragging wire
to R2 to complete circuit
Figure 2-47: Executing a simulation.
2-7.2
Figure 2-46: Adding a voltage source and completing the
circuit.
can also enable the wire tool automatically by moving the
cursor very close to a component node; you should see the
mouse pointer change into a black circle with a cross-hair.
Click on one of the nodes of the dc source with the wire tool
activated (you should see the mouse pointer change from
a black cross to a black circle with a cross hair when you
hover it over a node). Additional clicks anywhere in the
schematic window will make corners in the wire. Doubleclicking will terminate the wire. Additionally, when not
already dragging a wire, double-clicking on any blank spot
of the schematic will generate a wire based at the origin
of clicking.
Wire the components as shown in Fig. 2-46. Add
a GROUND reference point as shown in Fig. 2-47.
The Ground can be found in the Component list of
POWER SOURCES. We now have a resistive divider.
Solving the Circuit
In Multisim, there are two broad ways in which to solve a
circuit. The first, called Interactive Simulation, allows you to
utilize virtual instruments (such as ohmmeters, oscilloscopes,
and function generators) to measure aspects of a circuit in a
time-based environment. It is best to think of the Interactive
Simulation as a simulated “in-lab” experience. Just as in
real life, time proceeds in the Interactive Simulation as you
analyze the circuit (although the rate at which time proceeds
is heavily dependent on your computer’s processor speed and
the resolution of the simulation). The Interactive Simulation is
started using the F5 key, the
button, or the
toggle
switch. The simulation is paused using the F6 key, the
button, or the
button. The simulation is terminated using
either the
button or the
toggle switch.
The other main way in which to solve a circuit in Multisim
is through Analyses. These simulations display their outputs
not in instruments, but rather in the Grapher window (which
2-7
INTRODUCING MULTISIM
may produce tables in some instances). These simulations are
run for controlled amounts of time or over controlled sweeps of
specific variables or other aspects of the circuit. For example, a
dc sweep simulates the values of a specified voltage or current
in the circuit over a defined range of dc input values.
Each of the methods described has its own advantages and
disadvantages, and in fact, both varieties can perform many
of the same simulations, albeit with different advantages. The
choice of method to be used for a given circuit really comes
down to your preferences, which will be formed as you gain
more experience with Multisim.
For the circuit in Fig. 2-47, we wish to solve for the voltages
at every node and the currents running through every branch.
As you will often see in Multisim, the solution can be obtained
using either the Interactive Simulation or through one of the
Analyses. We will demonstrate both approaches.
97
must be stopped, not just paused, in order for the DC Operating
Point Analysis mode to work.] Under the Output tab, select
the two node voltages and the branch current in the Variables in
Circuit window. Make sure the Variables in Circuit pull-down
menu is set to All Variables. Once selected, click Add and they
will appear in the Selected variables for analysis window.
Once you have selected all of the variables for which you
want solutions, simply click Simulate. Multisim then solves
the entire circuit and opens a window showing the values of the
selected voltages and currents (Fig. 2-48).
2-7.3
Dependent Sources
Interactive simulation
Multisim provides both defined dependent sources (voltagecontrolled current, current-controlled current, etc.) and a
generic dependent source whose definition can be entered as
a mathematical equation. We will use this second type in the
following example.
Selecting Simulate → Instruments → Measurement Probe
allows you to drag and place a measurement probe onto any
node in the circuit. (Note that the Instruments menu contains
many common types of equipment used in an electronics
laboratory.) The Measurement Probe constantly reports both
the current running through the branch to which it is assigned
and the voltage at that node. Place two probes into the circuit
as shown in Fig. 2-47. When placed, by default, the probes
should be pointing in the direction shown in Fig. 2-47. If they
are not, you can reverse a probe’s direction by right-clicking on
it and pressing Reverse Probe Direction. Once the probes are
in place, you must run the simulation using the commands for
Interactive Simulations.
As expected, the current running through both wires is the
same since the circuit has only one loop.
Step 1: The dependent sources are established as follows:
Place → Component opens the Select a Component
window.
Choose Database: Master Database and Group: Sources
in the pulldown menus.
Select
Family:
CONTROLLED VOLTAGE
or
CONTROLLED CURRENT.
Under Component, select ABM VOLTAGE or
ABM CURRENT and click OK.
The value of ABM sources (which stands for Analog
Behavioral Modeling) can be set directly with mathematical
expressions using any variables in the circuit. For information
on the variable nomenclature, which may be somewhat
confusing, see the Multisim Tutorial on the book website.
I=
10
V1
=
= 9.09 mA.
R1 + R 2
1000 + 100
The voltage at node 1 is 10 V, as defined by the source.
Application of voltage division (Fig. 2-19) gives
V2 =
R2
R1 + R 2
V1 =
100
10 = 0.909 V.
1100
DC operating point analysis
The circuit also can be solved using Simulate → Analyses →
DC Operating Point. This method is more convenient than the
Interactive Simulation when solving circuits with many nodes.
After opening this window, you can specify which voltages and
currents you want solved. [The Interactive Simulation mode
Step 2: Using what you learned in Section 2-7.1, draw the
circuit shown in Fig. 2-49 (including the probe at node 2).
Step 3: Double-click the ABM CURRENT source. Under
the value tab, enter: 3*V(2). The expression V(2) refers to
the voltage at node 2. This effectively defines this source as
a voltage-controlled current source. Note that when making the
circuit, if the node numbering in your circuit differs from that in
the example (e.g., if nodes 1 and 2 are switched), then take care
to keep track of the differences so that you will use the proper
node voltage when writing the equation. To edit or change node
labels, double-click any wire to open the Net Window. Under
Net name enter the label you like for that node.
To write the expression for I1 next to the current source, go to
Place → Text, and then type in the expression at a location near
98
CHAPTER 2
RESISTIVE CIRCUITS
Node V1
1
Voltage @ node V1
Voltage @ node V2
Current through node V1
V(1)
V(2)
Node V2
2
I(v1)
0
Figure 2-48: Solution window.
Referencing currents in arbitrary branches
Figure 2-49: Creating a dependent source.
the current source. [Ctrl-T is the shortcut key for the place-text
command.]
Now let us analyze the circuit using the DC Operating Point
Analysis. Our goal is to solve for the voltages at every node
and the current running through each branch. Remove the probe
from the circuit if you still have it in there by clicking on it so
it is highlighted and pressing the Delete key.
To perform a DC operating point analysis, just as we did
earlier in Section 2-7.2, go to Simulate → Analyses → DC
Operating Point and transfer all available variables into the
Selected variables for analysis window. You should notice
that the only variables available are V(1), V(2), and I(v1); if
Probe 1 is still connected to your circuit, you should also see
I(Probe 1) and V(Probe 1). Where are the other currents, such
as the current flowing through R1, the current through R2,
or even the current coming out of the dependent source? In
Multisim and most SPICE software in general, you can only
measure/manipulate currents through a Voltage Source (there
are some exceptions, but we will ignore them for now). This
is why the current through V1, denoted I(v1), is available but
the currents through the other components are not. A simple
2-7
INTRODUCING MULTISIM
trick, however, to obtain these currents is to add a 0 V dc source
into the branches where you want to measure current. Do this
to your circuit, so that it ends up looking like that shown in
Fig. 2-50.
99
Concept Question 2-19: How do you obtain and
visualize the circuit solution? (See
)
Exercise 2-13: The circuit in Fig. E2.13 is called a
resistive bridge. How does Vx = (V3 − V2 ) vary with the
value of potentiometer R1 ?
1
3
2
0
Figure 2-50: Circuit from Fig. 2-49 adapted to read out the
currents through R1, R2, and the dependent source.
Figure E2.13
Answer: (See
You will notice that there are new nodes in the circuit now,
but since V2, V3, and V4 are 0 V sources, V(3) = V(4) = V(1)
and V(5) = V(2).
Go back to the DC Operating Point Analysis window and
under the Variables in Circuit window there should now be four
currents [I(v1), I(v2), I(v3), and I(v4)] and the five voltages.
Highlight all four currents as well as V(1) and V(2) and click
Add and then click OK. This will bring up the Grapher window
with the results of the analysis.
Note that when we analyze the currents through the branches,
the current through a voltage source is defined as going into the
positive terminal. For example, in source V1, this corresponds
to the current flowing from Node 1 into V1 and then out of V1
to Node 0.
Concept Question 2-18: In Multisim, how are
components placed and wired into circuits? (See
)
)
Exercise 2-14: Simulate the circuit shown in Fig. E2.14
and solve it for the voltage across R3 . The magnitude of
the dependent current source is V1 /100.
1
V1
12 V
2
0
R2
100 Ω
10 Ω
ABM ABM_CURRENT
Figure E2.14
Answer: (See
)
R1
4
3
R3 1 Ω
100
CHAPTER 2
RESISTIVE CIRCUITS
Summary
Concepts
• As described by Ohm’s law, the i–υ relationship of a
resistor is linear over a specific range (−imax to +imax );
however, R may vary with temperature (thermistors),
pressure (piezoresistors), and light intensity (LDR).
• Kirchhoff’s current and voltage laws form the
foundation of circuit analysis and synthesis.
• Two circuits are considered equivalent if they exhibit
identical i–υ characteristics relative to an external
circuit.
• Source transformation allows us to represent a real
voltage source by an equivalent real current source, and
vice versa.
Mathematical and Physical Models
Linear resistor
• A Y circuit configuration can be transformed into a �
configuration, and vice versa.
• The Wheatstone bridge is a circuit used to measure
resistance, as well as to detect small deviations (from a
reference condition), as in strain gauges and other types
of sensors.
• Nonlinear resistive elements include the light bulb, the
fuse, the diode, and the light-emitting diode (LED).
• Multisim is a software simulation program capable of
simulating electric circuits and analyzing their behavior.
• A diode is a one-way valve for current. An LED is a
diode that also emits light.
Voltage division
R = ρ�/A
p = i2R
υs
N
Kirchhoff current law (KCL)
n=1
in = current entering node n
R2 +
_ υ2 =
in = 0
υn = voltage across branch n
N
n=1
vn = 0
i1 =
is
R1
R2
i2 =
Resistor combinations
In parallel
Req =
1
=
Req
or Geq =
N
Ri
i=1
N
i=1
N
υs
υs
Current division
Kirchhoff voltage law (KVL)
In series
R1
R1 + R2
R2
R1 + R2
R1 +
_ υ1 =
+
_
1
Ri
Gi
R2
R1 + R2
R1
R1 + R2
G1
is
Geq
G2
is
is =
Geq
is =
Source transformation
Rs
+
υs _
is =
υs
Rs
Rs
Y–� transformation
Table 2-5
Wheatstone bridge (Fig. 2-37)
υout ≈
i=1
V0
4
�R
R
PROBLEMS
Important Terms
American Wire Gauge
ammeter
Analyses
balanced
balanced condition
basic user interface
breaker
circuit equivalence
circuit window
conductance
conductivity
conductor
current divider
dielectric
diode
equivalent resistor
forward bias
101
Provide definitions or explain the meaning of the following terms:
forward-bias voltage
forward voltage
fuse
Grapher
i–υ response
ideal diode
impede
in series
Interactive Simulation
Kirchhoff’s current law (KCL)
Kirchhoff’s voltage law (KVL)
knee voltage
law of conservation of charge
law of conservation of energy
light-emitting diode
linear region
linear resistor
resistive circuit
resistivity
reverse bias
rheostat
schematic capture window
semiconductor
siemen
source transformation
superconductor
SPICE
thermistor
variable resistance
voltage divider
Wye–Delta (Y–�)
transformation
mechanical stress
Multisim
n-type
negative
NI myDAQ
offset voltage
Ohm’s law
one-way valve
overcurrent
p-type
piezoresistive coefficient
piezoresistor
pn-junction diode
positive
potentiometer
power rating
resistance
PROBLEMS
z
2 mm
Section 2-1: Ohm’s Law
*2.1 An AWG-14 copper wire has a resistance of 17.1 � at
20 ◦ C. How long is it?
2.2 A 3 km long AWG-6 metallic wire has a resistance of
approximately 6 � at 20 ◦ C. What material is it made of?
2.3 A thin-film resistor made of germanium is 2 mm in length
and its rectangular cross section is 0.2 mm × 1 mm, as shown
in Fig. P2.3. Determine the resistance that an ohmmeter would
measure if connected across its:
(a) Top and bottom surfaces
y
0.2 mm
1 mm
x
Figure P2.3: Film resistor of Problem 2.3.
Carbon
l
Hollow
2a 2b
*(b) Front and back surfaces
(c) Right and left surfaces
2.4 A resistor of length � consists of a hollow cylinder of
radius a surrounded by a layer of carbon that extends from
r = a to r = b, as shown in Fig. P2.4.
(a) Develop an expression for the resistance R.
(b) Calculate R at 20 ◦ C for a = 2 cm, b = 3 cm and
� = 10 cm.
∗
Answer(s) available in Appendix G.
Figure P2.4: Carbon resistor for Problem 2.4.
2.5 A standard model used to describe the variation of
resistance with temperature T is given by
R = R0 (1 + αT ),
where R is the resistance at temperature T (measured
in ◦ C), R0 is the resistance at T = 0 ◦ C, and α is a
102
CHAPTER 2
temperature coefficient. For copper, α = 4 × 10−3 ◦ C−1 . At
what temperature is the resistance greater than R0 by 1 percent?
2.6 A light bulb has a filament whose resistance is
characterized by a temperature coefficient α = 6 × 10−3 ◦ C−1
(see resistance model given in Problem 2.5). The bulb is
connected to a 100 V household voltage source via a switch.
After turning on the switch, the temperature of the filament
increases rapidly from the initial room temperature of 20 ◦ C
to an operating temperature of 1800 ◦ C. When it reaches its
operating temperature, it consumes 80 W of power.
Ia
80 mA
4 cm
10 cm
7.5 cm
10 cm
2.5 cm
6 cm
Ib
(a) Determine the filament resistance at 1800 ◦ C.
(b) Determine the filament resistance at room temperature.
(c) Determine the current that the filament draws at room
temperature and also at 1800 ◦ C.
(d) If the filament deteriorates when the current through it
approaches 10A, is the damage done to the filament greater
when it is first turned on or later when it arrives at its
operating temperature?
*2.7 A 110 V heating element in a stove can boil a standardsize pot of water in 1.2 minutes, consuming a total of 136 kJ
of energy. Determine the resistance of the heating element and
the current flowing through it.
RESISTIVE CIRCUITS
Figure P2.9: Circuit for Problem 2.9.
5Ω
12 V
2.8 A certain copper wire has a resistance R characterized by
the model given in Problem 2.5 with α = 4 × 10−3 ◦ C−1 . If
R = 60 � at 20 ◦ C and the wire is used in a circuit that cannot
tolerate an increase in the magnitude of R by more than 10
percent over its value at 20 ◦ C, what would be the highest
temperature at which the circuit can be operated within its
tolerance limits?
+
_
6Ω
10 Ω
5Ω
4Ω
6Ω
5Ω
5Ω
Figure P2.10: Circuit for Problem 2.10.
Section 2-2: Kirchhoff’s Laws
2.10
I0
12 V
_
+
2.9 The circuit shown in Fig. P2.9 includes two identical
potentiometers with per-length resistance of 20 �/cm.
Determine Ia and Ib .
*2.11 Select the value of R in the circuit of Fig. P2.11 so that
VL = 9 V.
2.12 A high-voltage direct-current generating station delivers
10 MW of power at 250 kV to a city, as depicted in Fig. P2.12.
The city is represented by resistance RL and each of the two
wires of the transmission line between the generating station
and the city is represented by resistance RTL . The distance
between the two locations is 2000 km and the transmission
lines are made of 10 cm diameter copper wire. Determine (a)
how much power is consumed by the transmission line and (b)
R
3I0
Determine VL in the circuit of Fig. P2.10.
+
500 Ω
6 mA
_ VL
+
500 Ω
Figure P2.11: Circuit for Problem 2.11.
V
_L
PROBLEMS
103
what fraction of the power generated by the generating station
is used by the city.
RTL
V0
+
_
*2.15 Determine Ix in the circuit of Fig. P2.15.
12 V
RL
(city)
Ix
5Ω
+
+
_
1A
2Ω
Figure P2.15: Circuit for Problem 2.15.
RTL
Station
2000 km
2.16 Determine currents I1 to I4 in the circuit of Fig. P2.16.
Figure P2.12: Diagram for Problem 2.12.
4A
1Ω
2.13 Determine the current I in the circuit of Fig. P2.13 given
that I0 = 0.
3Ω
24 V
I
1Ω
1Ω
+
+
_
2Ω
I2
4Ω
1V
+_
+
+
+
_
6Ω
5V
I4
Figure P2.16: Circuit for Problem 2.16.
I0 = 0
1Ω
1Ω
Figure P2.13: Circuit for Problem 2.13.
2.14
12 V
I1
+
+
_
I3
8Ω
*2.17 Determine currents I1 to I4 in the circuit of Fig. P2.17.
I1
I2
2Ω
4Ω
6A
I3
I4
2Ω
4Ω
Determine currents I1 to I3 in the circuit of Fig. P2.14.
Figure P2.17: Circuit for Problem 2.17.
1A
2Ω
18 V
+
+
_
2.18 Determine the amount of power dissipated in the 3 k�
resistor in the circuit of Fig. P2.18.
3A
I1
I2
12 Ω
8Ω
4Ω
I3
Figure P2.14: Circuit for Problem 2.14.
7Ω
10 mA
+
V0
_
2 kΩ
3 kΩ
Figure P2.18: Circuit for Problem 2.18.
10−3V0
104
CHAPTER 2
*2.19
Determine Ix and Iy in the circuit of Fig. P2.19.
2Ω
10 V
Ix
6Ω
+
_
+
V1
_
0.2 A
Iy
_
+
4Ω
RESISTIVE CIRCUITS
2Ω
V1
4
2Ω
4Ix
Figure P2.23: Circuit for Problem 2.23.
Figure P2.19: Circuit for Problem 2.19.
2.20
2.24 Given that in the circuit of Fig. P2.24, I1 = 4 A,
I2 = 1A, and I3 = 1A, determine node voltages V1 , V2 , and V3 .
Find Vab in the circuit of Fig. P2.20.
2Ω
a
2Ω
+
_
+
Vab
_
6V
I2
2Ω
12 V
+
_
b
I1
+
40 V _
1 Ω V1
R1 = 18 Ω
6Ω
V2
6Ω
V3
6Ω
18 Ω
I3
Figure P2.20: Circuit for Problem 2.20.
Figure P2.24: Circuit for Problem 2.24.
Find I1 to I3 in the circuit of Fig. P2.21.
3 kΩ I1
+
_ 16 V
I3
I2
4 kΩ
*2.25 After assigning node V4 in the circuit of Fig. P2.25 as
the ground node, determine node voltages V1 , V2 , and V3 .
8V
_
+
2.21
2 kΩ
+
_ 12 V
3A
12 V
_
+
Figure P2.21: Circuit for Problem 2.21.
3Ω
V1
V2
6Ω
2.22
6Ω
Find I in the circuit of Fig. P2.22.
1A
I
10 V
+
_
2I
3Ω
V4
V3
6Ω
1A
Figure P2.25: Circuit for Problems 2.25 and 2.26.
+_
3Ω
Figure P2.22: Circuit for Problem 2.22.
2.26 After assigning node V1 in the circuit of Fig. P2.25 as
the ground node, determine node voltages V2 , V3 , and V4 .
*2.23 Determine the amount of power supplied by the
independent current source in the circuit of Fig. P2.23.
2.27 In the circuit of Fig. P2.27, I1 = 42/81 A,
I2 = 42/81 A, and I3 = 24/81 A. Determine node voltages
V2 , V3 , and V4 after assigning node V1 as the ground node.
PROBLEMS
105
V2
6Ω
I2
6Ω
V1
6V
_
+
9Ω
6Ω
V4
6V
_
9Ω
I1
+
V3
2.31 Find I0 in the circuit of Fig. P2.31.
I3
9Ω
I0
18 A
4Ω
12 Ω
6Ω
3Ω
Figure P2.27: Circuit for Problem 2.27.
Figure P2.31: Circuit for Problem 2.31.
2.28 The independent source in Fig. P2.28 supplies 48 W of
power. Determine I2 .
2.32 For the circuit in Fig. P2.32, find Ix for t < 0 and t > 0.
I1
+
12 V _
I3
R
Ix
I2
R
0.25I1
R
t=0 1
2Ω
+
_ 15 V 2 Ω
4Ω
2
3Ω
4Ω
4Ω
R
Figure P2.32: Circuit with SPDT switch for Problem 2.32.
Figure P2.28: Circuit for Problem 2.28.
Section 2-3: Equivalent Circuits
*2.29 Given that I1 = 1 A in the circuit of Fig. P2.29,
determine I0 .
2.33 Determine Req at terminals (a, b) in the circuit of
Fig. P2.33.
I1 = 1 A
I0
1Ω
2Ω
4Ω
8Ω
16 Ω
a
Req
4Ω
32 Ω
16 Ω
8Ω
8Ω
b
Figure P2.29: Circuit for Problem 2.29.
Figure P2.33: Circuit for Problem 2.33.
2.30 What should R be in the circuit of Fig. P2.30 so that
Req = 4 �?
a
Req
b
*2.34 Select R in the circuit of Fig. P2.34 so that VL = 5 V.
1Ω
6Ω
2Ω
5Ω
Figure P2.30: Circuit for Problem 2.30.
R
5 mA
R
5 kΩ
1 kΩ
2 kΩ
Figure P2.34: Circuit for Problem 2.34.
+
VL
_
106
CHAPTER 2
2.35
If R = 12 � in the circuit of Fig. P2.35, find I .
R
R
R
20 V
_
4Ω
+
R
2.39 Find Req at terminals (c, d) in the circuit of Fig. P2.38.
2.40 Simplify the circuit to the right of terminals (a, b) in
Fig. P2.40 to find Req , and then determine the amount of power
supplied by the voltage source. All resistances are in ohms.
R
a
I
25 V
R
R
RESISTIVE CIRCUITS
R
+
_
Req
3
5
8
4
8
6
12
6
12
b
Figure P2.40: Circuit for Problem 2.40.
Figure P2.35: Circuit for Problem 2.35.
2.41 For the circuit in Fig. P2.41, determine Req at
*2.36 Use resistance reduction and source transformation to
find Vx in the circuit of Fig. P2.36. All resistance values are in
ohms.
+ Vx _
4
16
16
10 A
12
4
6
(b) Terminals (a, c)
(c) Terminals (a, d)
(d) Terminals (a, f )
16
16
e
Figure P2.36: Circuit for Problem 2.36.
2.37
*(a) Terminals (a, b)
Determine A if Vout /Vs = 9 in the circuit of Fig. P2.37.
2Ω
2Ω
d
2Ω
2Ω
c
3Ω
Vs
+
_
12 Ω
I1
12 Ω
3Ω
AI1
+
6 Ω Vout
_
Figure P2.37: Circuit for Problem 2.37.
*2.38
a
b
f
2Ω
2Ω
2Ω
2Ω
2Ω
2Ω
a
b
Figure P2.41: Circuit for Problem 2.41.
2.42 Find Req for the circuit in Fig. P2.42. All resistances are
in ohms.
For the circuit in Fig. P2.38, find Req at terminals (a, b).
5Ω
3Ω
6Ω
3Ω
5Ω
6Ω
5Ω
Figure P2.38: Circuit for Problems 2.38 and 2.39.
5
c
d
Req
10
10
5
10
10
10
Figure P2.42: Circuit for Problem 2.42.
PROBLEMS
107
2.43 Apply voltage and current division to determine V0 in
the circuit of Fig. P2.43 given that Vout = 0.2 V.
3A
6Ω
4Ω
8Ω
4Ω
+
_ V0
4Ω
2A
+_
30 V
4Ω
3Ω
I
2Ω
2Ω
2Ω
1Ω
+
Vout = 0.2 V
_
Figure P2.46: Circuit for Problem 2.46.
2.47 Determine currents I1 to I4 in the circuit of Fig. P2.47.
Figure P2.43: Circuit for Problem 2.43.
12 Ω
I1
6Ω
I2
I3
3Ω
I4
6Ω
*2.44 Apply source transformations and resistance reductions
to simplify the circuit to the left of nodes (a, b) in Fig. P2.44
into a single voltage source and a resistor. Then, determine I .
3A
10 Ω
5A
a
12 Ω
2Ω
+
_
12 V
I
4Ω
Figure P2.47: Circuit for Problems 2.47 and 2.48.
2.48 Replace the 12 V source in the circuit of Fig. P2.47 with a
4 A current source pointing upwards. Then, determine currents
I1 to I4 .
b
Figure P2.44: Circuit for Problem 2.44.
*2.49 Determine current I in the circuit of Fig. P2.49.
2.45 Determine the open-circuit voltage Voc across terminals
(a, b) in Fig. P2.45.
10 Ω
40 Ω
25 Ω
I
30 V
+
_
5Ω
3Ω
6Ω
2A
+
a
Voc
_
b
Figure P2.45: Circuit for Problem 2.45.
2.46 Use circuit transformations to determine I in the circuit
of Fig. P2.46.
5Ω
30 Ω
60 Ω
+
_
50 V
10 Ω
Figure P2.49: Circuit for Problem 2.49.
10 Ω
108
CHAPTER 2
RESISTIVE CIRCUITS
2.50 Determine the equivalent resistance Req at terminals
(a, b) in the circuit of Fig. P2.50.
4Ω
2Ω
2A
_
V
a
+
2A
5Ω
4Ω
5Ω
a
Req
4Ω
2.5 A
4Ω
5A
2Ω
4Ω
b
Figure P2.52: Circuit for Problem 2.52.
6Ω
Sections 2-4 and 2-5: Y– and Wheatstone Bridge
Figure P2.50: Circuit for Problem 2.50.
2.53 Convert the circuit in Fig. P2.53(a) from a � to a Y
configuration.
Determine current I in the circuit of Fig. P2.51.
*2.51
a
3Ω
+
_
2 kΩ
5 mA
2 mA
d
b
8Ω
4Ω
d
(b)
2.54 Convert the circuit in Fig. P2.53(b) from a T to a �
configuration.
*2.55 Find the power supplied by the generator in Fig. P2.55.
R1 = 18 Ω
1 kΩ
2.52
2Ω
Figure P2.53: Circuit for Problems 2.53 and 2.54.
6 mA
I
c
(a)
2 kΩ
2 kΩ
a
1Ω
b
16 V
c
6Ω
_
+
1Ω
8V
20 V
+
_
6Ω
6Ω
6Ω
18 Ω
Figure P2.51: Circuit for Problem 2.51.
Figure P2.55: Circuit for Problems 2.55 and 2.56.
Determine voltage Va in the circuit of Fig. P2.52.
2.56 Repeat Problem 2.55 after replacing R1 with a short
circuit.
PROBLEMS
2.57
109
Find I in the circuit of Fig. P2.57.
2.62 Find Req at terminals (a, b) in Fig. P2.62 if
(a) Terminal c is connected to terminal d by a short circuit
(b) Terminal e is connected to terminal f by a short circuit
(c) Terminal c is connected to terminal e by a short circuit
All resistance values are in ohms.
9Ω
6Ω
6Ω
9Ω
6Ω
3V
_
3V
_
9Ω
I
d
3
+
+
Figure P2.57: Circuit for Problem 2.57.
2.58 Find the power supplied by the voltage source in
Fig. P2.58.
4V
_
+
3Ω
6Ω
Figure P2.58: Circuit for Problems 2.58 and 2.59.
*2.59 Repeat Problem 2.58 after replacing R with a short
circuit.
2.60 Find I in the circuit of Fig. P2.60. All resistances are in
ohms.
I
12 V
2
+
+
_
4
2
2
2
Figure P2.60: Circuit for Problem 2.60.
*2.61
18 Ω
6Ω
6Ω
3
a b
3
f
3
6Ω
1Ω
9Ω
18 Ω
Figure P2.61: Circuit for Problem 2.61.
2.63 For the Wheatstone-bridge circuit of Fig. 2-36, solve the
following problems.
*(a) If R1 = 1 �, R2 = 2 �, and Rx = 3 �, to what value
should R3 be adjusted so as to achieve a balanced
condition?
(b) If V0 = 6 V, Ra = 0.1 �, and Rx were then to deviate by a
small amount to Rx = 3.01 �, what would be the reading
on the ammeter?
2.64 If V0 = 10 V in the Wheatstone-bridge circuit of
Fig. 2-37 and the minimum voltage Vout that a voltmeter can
read is 1 mV, what is the smallest resistance fraction (�R/R)
that can be measured by the circuit?
2.65 Suppose the cantilever system shown in Fig. 2-44 is used
in the Wheatstone-bridge sensor of Fig. 2-37 with V0 = 2 V,
α = −1 × 10−9 m2 /N, L = 0.5 cm, W = 0.2 cm, and
H = 0.2 mm. If the measured voltage is Vout = −2 V, what
is the force applied to the cantilever?
*2.66 A touch sensor based on a piezoresistor built into
a micromechanical cantilever made of silicon is connected
in a Wheatstone-bridge configuration with a V0 = 1 V. If
L = 1.44 cm and W = 1 cm, what should the thickness H be
so that the touch sensor registers a voltage magnitude of 10 mV
when the touch pressure is 10 N?
Find Req for the circuit in Fig. P2.61.
18 Ω
Req
Figure P2.62: Circuit for Problem 2.62.
R=6Ω
1
3
c
3Ω
6Ω
e
3
Req
Section 2-6: i–υ Relationships
*2.67 Determine I1 and I2 in the circuit of Fig. P2.67. Assume
VF = 0.7 V for both diodes.
110
CHAPTER 2
53 Ω
6V
I1
I2
73 Ω
53 Ω
i1
RESISTIVE CIRCUITS
i2
+
_
υs(t)
146 Ω
+
_
Figure P2.67: Circuit for Problem 2.67.
2.68 Determine V1 in the circuit of Fig. P2.68. Assume
VF = 0.7 V for all diodes.
(a)
υs(t)
50 Ω
9V
+
100 Ω
+
_
8V
V_1
25 Ω
t (s)
4
2
Figure P2.68: Circuit for Problem 2.68.
−8 V
2.69 If the voltage source in the circuit of Fig. P2.69 generates
a single square wave with an amplitude of 2 V, generate a plot
for vout for the same time period.
(b) Square wave
υs(t)
υs(t)
+
_
100 Ω
+
_
8V
υout
2
υs(t)
4
t (s)
2V
T
t
−8 V
(c) Triangular wave
−2 V
Figure P2.70: Circuit and waveforms for Problems 2.70 and
Figure P2.69: Circuit and voltage waveform for Problem 2.69.
2.70 If the voltage source in the circuit of Fig. P2.70(a)
generates the single square waveform shown in Fig. P2.70(b),
generate plots for i1 (t) and i2 (t).
2.71.
2.71 If the voltage source in the circuit of Fig. P2.70(a) generates the single triangular waveform shown in Fig. P2.70(c),
generate plots for i1 (t) and i2 (t).
PROBLEMS
111
2.72 The circuit shown in Fig. P2.72 is used to control a red
LED. The LED is designed to turn on when the resistance R of
the rheostat is 50 � or lower. Use the information contained in
Fig. 2-8(d) to determine the value of the constant resistor R0 .
2.75 Use DC Operating Point Analysis in Multisim to solve
for all six labeled resistor currents in the circuit of Fig. P2.75.
1Ω
I
+
5V _
R0
R
I2
I1
+
_VF
RD
1Ω
+_
I3
1A
Red LED
1Ω
1Ω
+_
I5
2.73 Use the DC Operating Point Analysis in Multisim to
solve for voltage Vout in the circuit of Fig. P2.73. Solve for
Vout by hand and compare with the value generated by
)
Multisim. See the solution for Exercise 2.14 (on
for how to incorporate circuit variables into algebraic
expressions.
10 Ω
10 Ω
15 Ω
25 Ω
+
Vout
10 kΩ
R1
10 Ω
+
_ 15 V
R3
I
R2
15 Ω
30 Ω
1.5I
_
Figure P2.76: Circuit for Problem 2.76.
2.74 Find the ratio Vout /Vin for the circuit in Fig. P2.74 using
DC Operating Point Analysis in Multisim. See the Multisim
Tutorial included on the book website on how to reference
currents in ABM sources [you should not just type in I(V1)].
Iin
2.76 Find the voltages across R1 , R2 , and R3 in the circuit
of Fig. P2.76 using the DC Operating Point Analysis tool in
Multisim.
V1
Figure P2.73: Circuit for Problem 2.73.
+
Vin _
1Ω
Figure P2.75: Circuit for Problem 2.75.
Section 2-7: Multisim
+
2.5 V _
I6
3V
1Ω
Figure P2.72: Circuit for Problem 2.72.
I4
2V
1 kΩ
+
100Iin
Vout
_
Figure P2.74: Circuit for Problem 2.74.
1 kΩ
2.77 Find the equivalent resistance looking into the terminals
of the circuit in Fig. P2.77 using a test voltage source and current
probes in the Interactive Simulation in Multisim. Compare the
answer you get to what you obtain from series and parallel
combining of resistors carried out by hand.
Potpourri Questions
2.78 What is a superconducting material and what happens
when its physical temperature is below or above its critical
temperature? How is superconductivity used in practice?
2.79 What is a piezoresistor? How is it used? Resistors are
also used as chemical sensors. Explain how.
2.80 What determines the color of the light emitted by an
LED? Why are LEDs economical to use?
112
CHAPTER 2
RESISTIVE CIRCUITS
Figure P2.77: Circuit for Problem 2.77.
Integrative Problems: Analytical / Multisim / myDAQ
(a) a-b with the other terminals unconnected,
To master the material in this chapter, solve the following problems using three complementary approaches: (a) analytically,
(b) with Multisim, and (c) by constructing the circuit and using
the myDAQ interface unit to measure quantities of interest via
your computer. [myDAQ tutorials and videos are available in
Appendix F and on
.]
(b) a-d with the other terminals unconnected,
m2.1 Kirchhoff’s Laws: Determine currents I1 to I3 and the
voltage V1 in the circuit of Fig. m2.1 with component values
Isrc = 1.8 mA, Vsrc = 9.0 V, R1 = 2.2 k�, R2 = 3.3 k�, and
R3 = 1.0 k�.
Vsrc
R1
I1
R2
I2
(d) a-d with a wire connecting terminals b and c.
Use these component values: R1 = 10 k�,
R3 = 15 k�, R4 = 47 k�, and R5 = 22 k�.
a
R1
R2
R3
R2 = 33 k�,
b
R5
+
_
c
_
Isrc
(c) b-c with a wire connecting terminals a and d, and
V1
+
R4
d
Figure m2.2 Circuit for Problem m2.2.
R3
I3
Figure m2.1 Circuit for Problem m2.1.
m2.2 Equivalent Resistance: Find the equivalent resistance
between the following terminal pairs in the circuit of Fig. m2.2
under the stated conditions:
m2.3 Current and Voltage Dividers: Apply the concepts
of voltage dividers, current dividers, and equivalent resistance
to find the currents I1 to I3 and the voltages V1 to V3 in the
circuit of Fig. m2.3. Use these component values: Vsrc = 12 V,
R1 = 1.0 k�, R2 = 10 k�, R3 = 1.5 k�, R4 = 2.2 k�,
R5 = 4.7 k�, and R6 = 3.3 k�.
PROBLEMS
113
R4
I1
R1
R3
33 kΩ
+
_
R3
Vsrc
+
+
_
V1
_
R6
+ V3
I2
R2
V1
15 V
R1
1 kΩ
46 kΩ
R2
2.2 kΩ
R5
R6
100 kΩ
3.3 kΩ
+
V2 R4
R5
_
Figure m2.5 Circuit for Problem m2.5.
I3
m2.6 Multiple Sources: To create multiple sources,use the
AO 0 and AO 1 ports simultaneously for the myDAQ portion of
this problem. Use the Arbitrary waveform generator to create
the 3 V and 5 V sources.
_
Figure m2.3 Circuit for Problem m2.3.
m2.4 Wye-Delta Transformation: Find (a) the currents I1
and I2 in the circuit of Fig. m2.4 and (b) the power delivered
by each of the two voltage sources. Use these component
values: V1 = 15 V, V2 = 15 V, R1 = 3.3 k�, R2 = 1.5 k�,
R3 = 4.7 k�, R4 = 5.6 k�, R5 = 1.0 k�, and R6 = 2.2 k�.
(a) Find currents I1 and I2 in the circuit of Fig. m2.6.
For the myDAQ portion, make sure to measure current
correctly or you could blow the myDAQ’s fuse.
(b) Find the voltage drop across the 47 k� resistor.
R2
47 kΩ
R3
R2
R1
R5
I1
+
_
R4
V1
_
+
I1
R6
V2
_
+
R1
R5
R3 10 kΩ
V1
3V
22 kΩ
1 kΩ
+
_
I2
V2
5V
R4
10 kΩ
Figure m2.6 Circuit for Problem m2.6.
I2
Figure m2.4 Circuit for Problem m2.4.
m2.5 Kirchoff’s Laws and Equivalent Resistance: In the
circuit of Fig. m2.5:
m2.7 Current Source: This problem is relatively straightforward to solve by hand and with Multisim. However, to create
the myDAQ version of the circuit in Fig. m2.7, you will need to
use an LM371 Regulator with a 100 � connected between Vout
and Vadj . For more information, consult Appendix F or look up
the specification of the LM371-LZ regulator.
(a) Find the voltage drop across the 46 k� resistor.
(a) Determine the voltage drop across each 1 k� resistor.
(b) What is the equivalent resistance seen by the 15 V source?
(b) Determine the current through the 3.3 k� resistor.
114
CHAPTER 2
m2.8 Equivalent Resistance: Determine the equivalent
resistance of the circuit in Fig. m2.8 as seen at terminals (1, 2).
R2
I1
12.5 mA
R1
1 kΩ
3.3 kΩ
RESISTIVE CIRCUITS
R3
1 kΩ
R1
Figure m2.7 Circuit for Problem m2.7.
33 kΩ
R2
1 kΩ
1
R3
46 kΩ R5 1 kΩ
R4
R6 10 kΩ
2.2 kΩ
Figure m2.8 Circuit for Problem m2.8.
2
3
3
CHAPTER
C H A P T E R
Analysis Techniques
Contents
3-1
3-2
3-3
TB6
3-4
3-5
TB7
3-6
3-7
3-8
TB8
3-9
3-10
Overview, 116
Linear Circuits, 116
Node-Voltage Method, 117
Mesh-Current Method, 123
Measurement of Electrical Properties
of Sea Ice, 126
By-Inspection Methods, 129
Linear Circuits and Source Superposition, 133
Integrated Circuit Fabrication Process, 136
Thévenin and Norton Equivalent Circuits, 140
Comparison of Analysis Methods, 151
Maximum Power Transfer, 151
Digital and Analog, 154
Application Note: Bipolar Junction
Transistor (BJT), 158
Nodal Analysis with Multisim, 161
Summary, 164
Problems, 165
RB
B IB
C
+
IC
VBB
VBE
βIB
RC
VCC
VCE
_
E
Transistor equivalent circuit
The basic laws of Chapter 2 are used in the present chapter
to develop standard solution methods that can be applied to
analyze any linear circuit, no matter how complex.
Objectives
Learn to:
Apply the node-voltage and mesh-current methods to analyze an electric circuit of any
configuration, so long as it is linear and planar.
Apply the by-inspection methods to circuits that
satisfy certain conditions.
Use the source-superposition method to evaluate
the sensitivity of a circuit to the various sources
in the circuit.
Determine the Thévenin and Norton equivalent
circuits of any input circuit and use them to
evaluate the response of an external load (or an
output circuit) to the input circuit.
Establish the conditions for maximum transfer of
current, voltage, and power from an input circuit
to an external load.
Learn the basic properties of the bipolar junction
transistor.
116
CHAPTER 3 ANALYSIS TECHNIQUES
Overview
3-1.2
By applying the circuit-analysis skills we developed in the
preceding chapter, we now extend our capability further so we
may tackle any linear, planar circuit—no matter how complex.
Node-voltage and mesh-current equations will be cast into a
systematic structure in Sections 3-2 through 3-4, so we may take
advantage of standard methods for solving linear, simultaneous
equations, either by the use of determinants and matrices
(Appendix B) or the execution of computer simulation packages
such as MATLAB or MathScript (Appendix E). The nodal
and mesh analysis techniques are followed with treatments
of two special tools: the source superposition method and
the Thévenin/Norton equivalent-circuit method. These methods
allow us to break any complex electrical system into smaller,
manageable subcircuits for analysis. With these tools, you are
ready to analyze pretty much any circuit you may encounter
for the rest of your career. We will also introduce you to
semiconductor manufacturing and the relationships between
analog and digital signals.
If current i1 can give rise to voltage υ1 = Ri1 , and another
current i2 can give rise to voltage υ2 = Ri2 , then the
simultaneous presence of both currents gives rise to
3-1 Linear Circuits
(3.1)
A circuit element, or an entire circuit, is nonlinear if its i–υ
relationship is not linear. The LED (Section 2-1.4) is an example
of a nonlinear device.
3-1.1
υ = R(i1 + i2 ) = Ri1 + Ri2 = υ1 + υ2 .
(3.2)
Thus, the output (υ) due to the two inputs (i1 and i2 ) is equal
to the sum of the two outputs (υ1 and υ2 ) had each input been
introduced separately. This is a statement of the superposition
principle (also known as the additivity property). We will use
this principle in Section 3-5 to simplify our analysis for circuits
containing multiple sources.
3-1.3
Linear and Nonlinear Elements
Linear elements
By virtue of its linear i–υ relationship, the resistor is an obvious
candidate for the list of linear circuit elements, which includes:
A circuit is a system with inputs and outputs; its inputs are
the independent voltage and current sources that energize the
circuit, and its outputs are all of the currents flowing through
and voltages across all of the passive elements of the circuit.
By passive element, we mean that it does not generate energy
of its own. A resistor is a perfect example of a passive element.
By comparison, an active element requires an external power
supply in order to function. Examples of active elements include
transistors (such as the BJT described in Section 3-9) and
operational amplifiers (Chapter 4).
A linear circuit is a circuit composed entirely of independent
sources and linear elements. An element is linear if it is passive
and exhibits a linear i–υ relationship. For a resistor R, for
example,
υ = Ri.
Superposition Principle
Homogeneity Property
If i through resistor R is increased by a factor K, so will υ. This
proportional increase of i and υ by the same factor is called the
homogeneity (or scaling) property of a linear element.
• Resistors
• Capacitors
• Inductors
• Linear dependent sources
The i–υ relationship for a capacitor, which we will learn more
about in Chapter 5, is given by
i=C
dυ
.
dt
(3.3a)
If we multiply both sides by a factor K, we get
Ki = KC
dυ
d
=C
(Kυ).
dt
dt
(3.3b)
Hence, increasing υ by a factor K leads to an increase in i
by the same factor, which implies that the d/dt differentiation
operator has no bearing on the homogeneity property linking i
to υ. The time derivative does not impact the additivity property
either.
3-2
Vs
NODE-VOLTAGE METHOD
+
_
I1
R1
R2
117
R3
+
_
Va = 5I1
Figure 3-1: Circuit with dependent source Va = 5I1 .
(2) However, it is often possible to replace nonlinear elements
with equivalent circuits containing linear elements, including
dependent sources, and then use them to obtain approximate,
but fairly accurate results, provided certain conditions are
satisfied. Examples of equivalent circuits will be presented in
Section 3-8 for the bipolar junction transistor (BJT) and in
Chapter 4 for the operational amplifier and the CMOS transistor.
3-1.4 Advantages of Linear Circuits
Since the capacitor is a passive element and obeys
both the homogeneity and additivity (superposition)
properties, it is classified as a linear circuit element.
A similar argument applies to the inductor, for which
υ = L di/dt. Next we consider dependent sources, which were first
introduced in Section 1-6.4. Dependent sources are artificial
sources (because they do not generate energy of their own) used
in equivalent linear circuits intended to model the approximate
behavior of nonlinear circuits and elements like transistors and
operational amplifiers. Let us consider the simple circuit shown
in Fig. 3-1, which includes an independent voltage source
Vs and a dependent voltage source Va . The magnitude of Va
depends on I1 , which, in turn, depends on the real source Vs . If
Vs = 0, no currents would flow in the circuit, so I1 would be
zero, and so would Va .
Hence, dependent source Va is a passive element, and
since it is also directly proportional to I1 (raised to first
order), Va is classified as a linear element. The same is
true for a dependent voltage source whose magnitude
is linearly related to a voltage elsewhere in the circuit
(instead of to a current), as well as for dependent current
sources that depend linearly on a voltage or current
elsewhere in the circuit. Nonlinear elements
The circuit analysis techniques developed in this book apply
primarily to linear circuits, and yet many devices—such as
diodes, transistors, and integrated circuits—exhibit nonlinear
i–υ relationships. Consequently:
(1) The analysis techniques do not directly apply to circuits
containing such nonlinear elements.
The linearity properties of a linear circuit allow us to use certain
analysis techniques that would be otherwise not applicable
had the circuit contained one or more nonlinear elements
(unless they can be adequately represented by equivalent
linear circuits). Through the application of such analysis
techniques, which include the Thévenin and superposition
methods presented later in Sections 3-5 and 3-6, we can simplify
the analysis (and design) of a complex circuit considerably.
3-2 Node-Voltage Method
3-2.1
General Procedure
According to Kirchhoff’s current law (KCL), the algebraic sum
of all currents entering any node in an electric circuit is equal to
zero. Built on that principle, the node-voltage analysis method
provides a systematic and efficient procedure for determining
all of the currents and voltages in a circuit. This determination is
realized through the solution of a system of linear, simultaneous
equations in which the unknown variables are the voltages at the
extraordinary nodes in the circuit. As a reminder, in Section 1-3
we defined an extraordinary node as a node connected to three
or more elements. For a circuit containing nex extraordinary
nodes, implementation of the node-voltage method consists of
three basic steps:
Solution Procedure: Node Voltage
Step 1: Identify all extraordinary nodes, select one of
them as a reference node (ground), and then assign node
voltages to the remaining (nex − 1) extraordinary nodes.
Step 2: At each of the (nex − 1) extraordinary nodes,
apply the form of KCL requiring the sum of all currents
leaving a node to be zero (see KCL template).
Step 3: Solve the (nex − 1) independent simultaneous
equations to determine the unknown node voltages (see
Appendix B).
118
CHAPTER 3 ANALYSIS TECHNIQUES
KCL Template
V1
R1
I1
V0
I3
R3
I2
R2
R2
V3
R3
+
_
V0
R4
R1
R5
I0
I0
V2
(a)
υ = V0
V0 − V2
V0 − V3
V0 − V1
+
+
− I0 = 0
R1
R2
R3
Once the node voltages have been determined, all currents
through branches and voltages across elements can be
calculated readily.
Example 3-1: Circuit with Two Sources
For the circuit in Fig. 3-2, (a) identify all extraordinary nodes
and select one of them as the ground node, (b) develop
node-voltage equations at the remaining extraordinary nodes,
(c) solve for the node voltages, and then (d) calculate the
power consumed by R5 . The element values are V0 = 10 V,
I0 = 0.8 A, R1 = 5 �, R2 = 2 �, R3 = 3 �, R4 = 10 �,
and R5 = 2.5 �.
Solution:
(a) Identify extraordinary nodes and assign node voltages
The circuit has three extraordinary nodes, labeled as shown in
Fig. 3-2(b). Node 3 is selected as the ground node and its voltage
is labeled V3 = 0. Nodes 1 and 2 are assigned (unknown)
voltages V1 and V2 , with both defined relative to V3 = 0.
(b) Apply KCL at nodes 1 and 2
At each non-ground extraordinary node, we designate currents
and we choose their directions as leaving the node. We realize
that I3 = −I4 , for example, but for the sake of consistency we
treat each node the same by designating a current leaving it
through every branch connected to it.
Original circuit
I2
R2 + R3
+
_
V0
I4
I6
V2
R4
I1
I5
R1
R5
V3 = 0
υ=0
(b)
I3
V1
I0
υ=0
Circuit with designated node voltages
Figure 3-2: Circuit for Example 3-1.
Node 1:
I1 + I2 + I3 = 0.
(3.4)
Unless we already know the value of a current (such as I0
entering node V2 ), we should express it in terms of the node
voltages connected to the branch through which it is flowing.
We do so by applying Ohm’s law, while reminding ourselves
that the convention we adopted for the current direction is that
it flows through a resistor from the (+) voltage terminal to the
(−) terminal. Hence:
The current leaving a node is equal to the voltage at that
node, minus the voltage at the node to which the current
is going, and divided by the resistance.
υa
+
R
i=
υa − υb
R
_
υb
3-2
NODE-VOLTAGE METHOD
119
(c) Solve simultaneous equations
Consequently, I1 flowing through R1 is given by
I1 =
V1 − 0
V1
=
.
R1
R1
(3.5a)
Similarly,
V1 − V2
.
I3 =
R4
(3.5b)
The voltage across the in-series resistances (R2 + R3 ) is
(V1 − V0 ), where V0 is the node voltage at the positive terminal
of the voltage source. Hence, I2 is given by
I2 =
V 1 − V0
.
R2 + R3
(3.5c)
Inserting Eqs. (3.5a) through (3.5c) into Eq. (3.4) gives
V1 − V0
V1 − V2
V1
+
+
=0
R1
R2 + R 3
R4
As a prelude to solving Eqs. (3.6) and (3.7) to determine the
unknown voltages V1 to V3 , we need to reorganize them into a
standard system of equations as
1
1
1
+
+
R1
R2 + R 3
R4
and
−
(node 1 Voltage Eq.).
(3.6)
or equivalently,
where we incorporated the fact that I6 = −I0 , as required by
the current source.
We note that by designating all current directions at a node
as leaving that node:
The node-voltage expression for any node (such as node
1 or node 2) always has V of that node preceded with a
plus (+) sign. Also, the node voltages of the other nodes
are preceded with negative (−) signs. Thus, V1 in Eq. (3.6)—which is specific to node 1—has a
positive sign wherever it appears in that equation, whereas
V2 and V3 always have negative signs if they appear in that
equation. Conversely, in the node-2 equation given by Eq. (3.7),
V2 is always preceded by a (+) sign and V1 is preceded by a
(−) sign.
V1 +
V2 =
1
1
+
R4
R5
V2 = I0 .
V0
,
R2 + R 3
(3.8a)
(3.8b)
a11 V1 + a12 V2 = b1 ,
(3.9a)
a21 V1 + a22 V2 = b2 ,
(3.9b)
1
1
1
+
+
R1
R2 + R 3
R4
=
1
1
1
+
+
= 0.5,
5 2 + 3 10
1
1
=−
= −0.1,
R4
10
1
=−
= −0.1,
R4
1
1
1
1
=
=
+
+
= 0.5,
R4
R5
10 2.5
a12 = −
a21
(node 2 Voltage Eq.), (3.7)
with
a11 =
I4 + I5 + I6 = 0,
1
R4
1
R4
V1 −
These are equivalent to
and
Node 2:
V2
V2 − V1
+
− I0 = 0
R4
R5
a22
b1 =
and
V0
10
=
= 2,
R2 + R 3
2+3
b2 = I0 = 0.8.
Inserting these values in Eq. (3.9) gives
0.5V1 − 0.1V2 = 2,
−0.1V1 + 0.5V2 = 0.8.
The system of two equations is now amenable for solution by
Cramer’s rule or matrix inversion (as illustrated in Appendix B)
either manually or by using MATLAB or MathScript software
(Appendix E). The solution leads to
V1 = 4.5 V,
V2 = 2.5 V.
120
CHAPTER 3 ANALYSIS TECHNIQUES
(d) Determine power in R5
4Ω
The current flowing through R5 in Fig. 3-2(b) is
+
_
V2
2.5
= 1 A,
=
I5 =
R5
2.5
6Ω
I
3Ω
5.3 V
Ix = 2I
12 Ω
and the power dissipated in R5 is
P = I52 R5 = (1)2 × 2.5 = 2.5 W.
(a) Original circuit
Concept Question 3-1: The node-voltage method relies
on the application of Kirchhoff’s current law. Explain.
(See
)
5.3 V 4 Ω
+
_
Concept Question 3-2: Why does a circuit with nex
5.3 V
I1
V1
I3
6Ω
I2
I
3Ω
I4
V2
I6
I5
12 Ω
Ix = 2I
extraordinary nodes require only (nex − 1) node-voltage
equations to analyze it? (See
)
Exercise 3-1: Apply nodal analysis to determine the
current I in the circuit of Fig. E3.1.
(b) Circuit with designated node voltages
I
6Ω
Figure 3-3: Example 3-2.
10 Ω
4Ω
24 V
1Ω
+
_
Figure E3.1
Answer: I = 2 A. (See
3-2.2
)
Circuits Containing Dependent Sources
When a circuit contains dependent sources, the node-voltage
analysis method remains applicable, as does the solution
procedure outlined in the preceding subsection. However,
each dependent source defines a relationship between its own
magnitude and some current or voltage elsewhere in the circuit,
and that relationship needs to be incorporated into the solution.
Example 3-2: Dependent Current Source
The circuit of Fig. 3-3 contains a current-controlled current
source (CCCS) whose magnitude Ix is governed by the current
flowing through the 6 � resistor in the direction shown.
Determine Ix .
Solution: Following the standard procedure outlined earlier,
we start by selecting a ground node and assigning node voltages
to the other extraordinary nodes in the circuit, as shown in
Fig. 3-3(b). We also designate currents with their directions
out of the nodes for all branches connected to nodes 1 and 2.
Next, we write down the node-voltage equations for nodes 1
and 2 as
V1 − 5.3 V1
V1 − V2
+
+
=0
4
3
6
(node 1),
V2 − V1
V2
+
− Ix = 0
6
12
(node 2).
and
In the equation for node 1, the three terms represent I1 to I3 ,
each expressed as a voltage difference divided by a resistance.
The same is true for node 2 except that I6 is replaced with (−Ix ).
We have three unknowns (V1 , V2 , and Ix ), but only two
equations, so we need to express Ix in terms of the unknown
variables, V1 and V2 . The dependent source Ix is given in terms
of I , which in turn is dependent on the voltage difference
3-2
NODE-VOLTAGE METHOD
121
R1
Quasisupernode
Supernode A
R2
V2
+
_
20 V
+
V1
10 V
_
Supernode B
R4
V3
R3
R5
R7
V4
+
_ 16 V
R6
V5
Figure 3-4: Circuit containing two supernodes and one quasi-supernode.
3-2.3
between V1 and V2 . That is,
(V1 − V2 )
V1 − V2
Ix = 2I = 2
=
.
6
3
This is effectively Ohm’s law for Ix . Upon substituting this
expression for Ix into the second of the node-voltage equations
and rearranging its terms, we end up with
(node 1)
9V1 − 2V2 = 15.9
and
(node 2).
−6V1 + 7V2 = 0
Simultaneous solution of the two equations gives V1 = 2.18 V
and V2 = 1.87 V. Hence,
Ix =
V1 − V2
2.18 − 1.87
=
= 0.1 A.
3
3
Exercise 3-2: Apply nodal analysis to find Va in the circuit
of Fig. E3.2.
Supernodes
Occasionally, a circuit may contain a solitary voltage source
nestled between two extraordinary nodes, with no other
elements in series with it between those nodes. Such an
arrangement is called a supernode. Examples of supernodes
are shown in Fig. 3-4. Formally:
A supernode is the combination of two extraordinary
nodes (excluding the reference node) between which a
voltage source exists. The voltage source may be of the
independent or dependent type, and the voltage source
may include elements in parallel with it (such as R6 in
parallel with the 16-V source of supernode B in Fig. 3-4)
but not in series with it. If one of the two nodes of a
supernode is a reference (ground) node, it is called a
quasi-supernode. 20 Ω
+ Va
9V
_
10 Ω
+
_
Va
2
+
_
Figure E3.2
Answer: Va = 5 V. (See
)
40 Ω
For a quasi-supernode, the only relevant information we need is
that the voltage of the non-reference node is equal to the voltage
magnitude of the voltage source. Thus, V1 = 20 V in Fig. 3-4.
The complication caused by a supernode is that we can
no longer apply Ohm’s law to define the current through a
resistor between two extraordinary nodes, because we now have
a voltage source between the two nodes instead of a resistor.
Hence, we need to treat the supernode in a special way.
To explain the properties of a supernode and how we use
it, let us analyze supernode A, all on its own. In Fig. 3-5(a),
122
CHAPTER 3 ANALYSIS TECHNIQUES
10 V
_+
−
I3
I4
+
V2
I2
I6
V3
4V
I5
R3
2Ω
I1 V1
I2
R5
+
_
4V
4Ω
I4
V2
I3
8Ω
2A
Supernode A
(a)
I1
V2
Figure 3-6: Circuit for Example 3-3.
I6
V3
I2
I5
R3
R5
which is a much simpler equation than the typical node-voltage
equation.
Supernode Attributes
(1) At a supernode, Kirchhoff’s current law (KCL) can
be applied to the combination of the two nodes as if
they are a single node, but the two nodes retain their
own identities.
I1 + I2 + I5 + I6 = 0 (KCL)
(b)
_
V3
+
V2
V3 − V2 = 10 V (KVL)
Figure 3-5: A supernode composed of nodes V2 and V3 can
be represented as a single node, in terms of summing currents
flowing out of them, plus an auxiliary equation that defines the
voltage difference between V3 and V2 .
we show currents I1 to I3 leaving node 2 and currents I4 to I6
leaving node 3. KCL requires that
and
Supernode
18 V
_+
−
+
I1
I 1 + I2 + I3 = 0
(node V2 ),
(3.10a)
I4 + I5 + I6 = 0
(node V3 ).
(3.10b)
Adding the two equations together and recognizing that
I3 = −I4 leads to
I1 + I2 + I5 + I6 = 0
(supernode A),
(3.11)
which constitutes the four currents leaving supernode A. The
implication of Eq. (3.11) is that we can treat nodes 2 and 3 as a
combined single node, connected by a dashed line (Fig. 3-5(b)),
but we also should acknowledge the fact that
V3 − V2 = 10 V
(supernode A auxiliary equation),
(2) Kirchhoff’s voltage law (KVL) is used to express the
voltage difference between the two nodes in terms
of the voltage of the source between them. This
provides the supernode auxiliary equation.
(3) If a supernode contains a resistor in parallel with the
voltage source, the resistor exercises no influence
on the currents and voltages in the other parts of the
circuit, and therefore, it may be ignored altogether.
(4) For a quasi-supernode, the node-voltage of the nonreference node is equal to the voltage magnitude of
the source.
In the circuit of Fig. 3-4, the voltage difference between nodes
4 and 5 is specified by the 16 V source, regardless of the value
of R6 (so long as R6 is not a short circuit).
Example 3-3: Circuit with a Supernode
Use the supernode concept to solve for the node voltages in
Fig. 3-6.
Solution: The combination of nodes 1 and 2 constitutes a
supernode, with an associated node-voltage equation given by
I1 + I2 + I3 + I4 = 0
3-3
MESH-CURRENT METHOD
123
or, equivalently,
R1
V1 − 4 V1
V2
+
+
− 2 = 0,
2
4
8
V0
which may be simplified to
6V1 + V2 = 32.
+
_
Ia
Ic
R2
Ib
I1
R3
I2
Figure 3-7: Circuit containing two meshes with mesh currents
Additionally, the supernode KVL equation is
I1 and I2 .
V2 − V1 = 18.
Simultaneous solution of the two equations yields
V1 = 2 V,
V2 = 20 V.
Concept Question 3-3: What impact does the presence
of a dependent source have on the implementation of the
node-voltage method? (See
)
Concept Question 3-4: What is a supernode? How is it
treated in nodal analysis? (See
)
Exercise 3-3: Apply the supernode concept to determine
I in the circuit of Fig. E3.3.
_
2A
10 Ω
2Ω
4Ω
4Ω
+
_ 20 V
Figure E3.3
Answer: I = 0.5 A. (See
Ia = I1 .
On the other hand, if an element is shared by two meshes, as
is the case for R3 , the true branch current through it is the
combination of the two branch currents:
Ib = I1 − I2 .
12 V
+
I
mesh currents I1 and I2 . A mesh current may be thought of
as the current flowing through the branches of that mesh, with
no regard for the currents in neighboring meshes. That does
not mean, however, that the mesh current is the same as the
actual currents flowing through the elements of that mesh. For
an element that belongs to only one mesh, such as R1 in Fig. 3-7,
the current through it is indeed identical to the current in mesh 1.
That is,
)
3-3
Mesh-Current Method
3-3.1
General Procedure
A mesh was defined in Section 1-3 as a loop that encloses no
other loop. The current associated with a mesh is called its
mesh current. The circuit in Fig. 3-7 contains two meshes with
Current I1 is assigned a positive sign because its direction
through R3 is the same as that of Ib , but I2 is assigned a
negative sign because it flows “upward” through R3 . The meshcurrent analysis method is based on the application of KVL to
all of the meshes in the circuit. The solution procedure, which
is analogous with that discussed earlier in Section 3-2 for the
node-voltage method, consists of the following steps:
Solution Procedure: Mesh Current
Step 1: Identify all meshes and assign each of them an
unknown mesh current. For convenience, define all mesh
currents to be clockwise in direction.
Step 2: Apply Kirchhoff’s voltage law (KVL) to each
mesh.
Step 3: Solve the resultant simultaneous equations to
determine the mesh currents (see Appendix B).
124
CHAPTER 3 ANALYSIS TECHNIQUES
For the circuit in Fig. 3-7, application of KVL to mesh 1, starting
at the bottom left-hand corner and moving clockwise around the
loop, gives
(mesh 1),
−V0 + I1 R1 + (I1 − I2 )R3 = 0
(3.12)
where for each term we assigned a (+) or (−) sign to it
depending on which of its voltage terminals is encountered first.
Also, for a resistor, current flows into the (+) terminal of the
voltage across it. For mesh 2,
(I2 − I1 )R3 + I2 R2 = 0
(mesh 2).
R1
V0
I2 R3
=
V0
(mesh 1),
Sum of resistances
Resistance shared
in mesh 1
by meshes 1 and 2
+ sign
− sign
Voltage source
in mesh 1
(3.14a)
R3 I1
+
(R2 + R3) I2 = 0
I4
R4
R5
I3
R3
R6
Figure 3-8: Circuit for Example 3-4.
Solution: (a) Applying the symmetry pattern inherent in the
structure of the mesh-current equations, we have
(R1 + R2 + R5 )I1 − R2 I2 − R5 I3 = V0
and
−
I1
I2
(3.13)
The two simultaneous equations can be rearranged by collecting
coefficients of I1 and I2 as
(R1 + R3) I1 −
+
_
R2
(mesh 2).
Resistance shared Sum of resistances
by meshes 1 and 2
in mesh 2
− sign
+ sign
(3.14b)
Note the built-in symmetry reflected by the structure of
Eqs. (3.14a and b). For mesh 1, the coefficient of I1 in
Eq. (3.14a) is the sum of all of the resistors contained in
mesh 1, and the coefficient of I2 contains the resistor that mesh 1
shares with mesh 2. Furthermore, the coefficients of I1 and I2
have opposite signs. The same pattern applies for mesh 2 in
Eq. (3.14b); the coefficient of I2 contains all of the resistors of
mesh 2, and the coefficient of I1 contains the resistor shared by
the two meshes. The magnitude of the voltage source in mesh 1
(namely, V0 ) appears on the right-hand side of Eq. (3.14a), with
its polarity defined as positive if I1 flows through it from its
negative to positive terminals. This structural pattern allows us
to write the mesh-current equations directly, as discussed in
more detail later in Section 3-4.
Example 3-4: Circuit with Three Meshes
Use mesh analysis to (a) obtain mesh-current equations for
the circuit in Fig. 3-8 and then (b) determine the current
in R4 , given that V0 = 18 V, R1 = 6 �, R2 = R3 = 2 �, and
R4 = R5 = R6 = 4 �.
−R2 I1 + (R2 + R3 + R4 )I2 − R4 I3 = 0
(mesh 1),
(3.15a)
(mesh 2),
(3.15b)
and
−R5 I1 − R4 I2 + (R4 + R5 + R6 )I3 = 0
(mesh 3).
(3.15c)
We note that in Eq. (3.15a) the coefficient of I1 is positive
and is composed of the sum of all resistors in mesh 1 and
the coefficients of I2 and I3 are negative and include the
resistors that meshes 2 and 3 share with mesh 1, respectively.
An equivalent pattern pertains to Eqs. (3.15b and c).
If the mesh contains a voltage source, its magnitude appears
on the right-hand side of the mesh equation and it is assigned
a positive sign if it is a voltage rise when moving clockwise
around the mesh. It is assigned a negative sign if it is a voltage
drop. In the case of mesh 1 in the circuit of Fig. 3-8, V0 is a
voltage rise, so it appears on the right-hand side of Eq. (3.15a)
with a positive sign.
(b) For the specified values of V0 and the six resistors, the
three parts of Eq. (3.15) become
12I1 − 2I2 − 4I3 = 18,
−2I1 + 8I2 − 4I3 = 0,
−4I1 − 4I2 + 12I3 = 0,
and solution of the simultaneous equations leads to
I1 = 2 A,
I2 = 1 A,
I3 = 1 A.
3-3
MESH-CURRENT METHOD
125
The current through R4 is
Ix = 4V1
I4 = I3 − I2 = 1 − 1 = 0.
Given that the circuit is a Wheatstone bridge (Section 2-5)
operated under the balanced condition (R2 R6 = R3 R5 ), the
result I4 = 0 is exactly what we should have expected.
Exercise 3-4: Apply mesh analysis to determine I in the
circuit of Fig. E3.4.
I3
1Ω
10 V
+
_
I1
1Ω
+
_ 2Ω
V1
I2
3Ω
4Ω
I=?
12 V
+
_
3A
4Ω
Figure 3-9: Mesh-current solution for a circuit containing a
dependent source (Example 3-5).
Hence,
I3 = 4V1 = 8(I1 − I2 ).
Figure E3.4
Answer: I = 0. (See
After inserting Eq. (3.17) into Eqs. (3.16a and b) and collecting
terms in I1 and I2 , we end up with
)
−5I1 + 6I2 = 10,
3-3.2 Circuit with Dependent Sources
The presence of a dependent source in a circuit does not alter the
basic procedure of the mesh-current method, but it requires the
addition of a supplemental equation expressing the relationship
between the dependent source and the other parts of the circuit.
−10I1 + 14I2 = 0.
Solution of this pair of simultaneous equations gives
I1 = −14 A,
Ix = 8(I1 − I2 ) = 8(−14 + 10) = −32 A.
Use mesh-current analysis to determine the magnitude of the
dependent source Ix in Fig. 3-9.
Solution: For the meshes with mesh currents I1 and I2 ,
and
−2I1 + (2 + 1 + 3)I2 − I3 = 0
(mesh 1),
(mesh 2).
The voltage V1 across the 2 � resistor is given by
V1 = 2(I1 − I2 ).
Exercise 3-5: Determine the current I in the circuit of
Fig. E3.5.
(3.16a)
4Ω
(3.16b)
For mesh 3, we do not need to write a mesh-current equation,
because I3 is specified by the current source as
I3 = Ix = 4V1 .
I2 = −10 A.
Hence,
Example 3-5: Dependent Current Source
(1 + 2)I1 − 2I2 − I3 = 10
(3.17)
60 V
6Ω
I
I1
+
_
20 Ω
Figure E3.5
Answer: I = 1.5 A. (See
)
I1
2
126
TECHNOLOGY BRIEF 6: MEASUREMENT OF ELECTRICAL PROPERTIES OF SEA ICE
Technology Brief 6
Measurement of Electrical
Properties of Sea Ice
Climate change is often first measured by the decrease
of our polar ice caps. This sea ice is a unique and vibrant
type of ice; the fresh water freezes first, leaving pockets of
more and more briny (salty) water, that eventually freezes
only when the temperature gets below its eutectic point
around −21 ◦ C. A combination of gravity and freeze-thaw
cycles elongates these tiny brine pockets (initially sub-mm
in size), and many of them start linking together to form
fluidic channels (which eventually expand to become a
full centimeter or more in diameter), from the top of the
ice all the way through one or two meters of ice to the
sea below the ice pack (Fig. TF6-1). In this columnar
type of sea ice, which is prevalent in the Arctic, there
is a critical brine volume fraction of about 5%, called
the percolation threshold, above which there are largescale connected channels or pathways through which
fluid can flow, and below which the sea ice is effectively
impermeable. For a typical bulk sea-ice salinity of 5 parts
per thousand, this brine volume fraction corresponds to a
critical temperature of about −5 ◦ C. This on-off switch for
fluid flow is known as the rule of fives.The brine channels
can moderate the formation of melt ponds (Fig. TF6-2) by
quickly draining them and returning the ice to its more
reflective white coloring.
This brine percolation threshold has been quantified
through measurements of the electrical resistivity of
the ice, as well as X-ray computed tomography and
measurements of the fluid permeability. Salty brine
pockets are very conductive, and the surrounding ice is a
near insulator. As the brine pockets join into channels, the
overall conductivity of the ice increases substantially by
providing a conducting path for current in pretty much the
same way it provides a path for the water to percolate
(drain) through. Conductivity, then, is highly correlated
with the percolation threshold and can be used to help
us study melt-pond formation.
The electrical properties of the ice are measured by
drilling out a 9 cm cylindrical core of ice, measuring
its resistance using a model very similar to that seen
in Fig. 2-1. Stainless steel nails are driven into the ice
core (drilling holes for them first, to avoid cracking the
core) to make the electrical connection to the ice. But
this method has a problem. It is very hard to get a
consistent electrical connection between the nail and
the ice. This contact resistance is very much a part of
the circuit, and it varies with each connection. A circuit
model of this resistance measurement is shown below.
The total resistance is the series combination of the two
(variable) contact resistances and the resistance of the
Figure TF6-1: X-ray CT images (approximately 1 cm across) of the brine microstructure of sea ice. The brine volume fraction is 5.7%,
and the temperature is −8 ◦ C. Channels are beginning to form but are not fully connected yet. (From Golden et al., Geophys. Res. Letters,
2007.)
TECHNOLOGY BRIEF 6: MEASUREMENT OF ELECTRICAL PROPERTIES OF SEA ICE
127
Ammeter
Rcontact
Voltmeter
Rsea ice
Rcontact
Rsubject =
Voltmeter indication
Ammeter indication
Figure TF6-4: 4-wire measurement circuit.
Figure TF6-2: As ice melts, the liquid water collects in
depressions on the surface and deepens them, forming these
melt ponds in the Arctic. These fresh water ponds are separated
from the salty sea below and around it, until breaks in the ice
merge the two.
ice. Without being able to better control the contact
resistance, Rsea ice cannot be accurately measured.
To solve this problem, rather than doing a simple
2-wire resistance measurement as shown in Fig. TF6-3,
a 4-wire measurement system can be used as shown
in Fig. TF6-4. This system employs both an ammeter
and a voltmeter (which are combined into the single
yellow AEMC resistance meter shown in Fig. TF6-5). Two
wires are used to connect the ammeter in series with the
resistances, and two are used to connect the voltmeter
in parallel with Rsea ice (hence, 4 wires). We do not need
to know the driving voltage or the contact resistances in
order to accurately measure Rsea ice with this method.
Rcontact
Ohmmeter
Rsea ice
Rcontact
Ohmmeter indicates Rcontact + Rsea ice + Rcontact
FigureTF6-3: Simple 2-wire resistance measurement circuit.
FigureTF6-5: University of Utah mathematics Ph.D. student
Christian Sampson measures the electrical conductivity of a seaice core during the Sea Ice Physics and Ecosystem eXperiment
in 2012. Electrical clamps are attached to nails inserted along
c Wendy Pyper/Australian Antarctic
the length of the ice core. (
Division.)
128
CHAPTER 3 ANALYSIS TECHNIQUES
3-3.3
Supermeshes
mesh currents, namely
Two adjoining meshes that share a current source
constitute a supermesh. The current source may be of
the independent or dependent type, and it may include a
resistor in series with it, but not in parallel. The presence of a supermesh in a circuit, such as the one shown
in Fig. 3-10(a), simplifies the solution by (a) combining the
two mesh-current equations into one and (b) adding a simpler,
auxiliary equation that relates the current of the source to the
mesh currents of the two meshes.
In Fig. 3-10(b), the current source of the supermesh has been
removed (as has the series resistor R4 ) and replaced with a
dashed line. The dashed line is a reminder to relate I0 to the
R1
Supermesh
I2
R2
V0
+
_
I0
R4
I1
R5
I3
R3
R6
(a) Two adjoining meshes sharing a current source
constitute a supermesh.
I0 = I2 − I3
V0
+
_
I2
R3
I1
R5
I3
Supermesh
(b) Meshes 2 and 3 can be combined into a
single supermesh equation, plus an auxiliary
equation I0 = I2 − I3.
Figure 3-10: Concept of a supermesh.
R6
(3.18)
The mesh-current equations for mesh 1 and the joint
combination of meshes 2 and 3 are
(R1 + R2 + R5 )I1 − R2 I2 − R5 I3 = V0
(mesh 1),
(3.19)
and
−(R2 + R5 )I1 + (R2 + R3 )I2 + (R5 + R6 )I3 = 0
(supermesh).
(3.20)
The two mesh-current equations, together with the auxiliary
equation given by Eq. (3.18), are sufficient to solve for the
three mesh currents.
It is instructive to note that the series resistor R4 played no
role in the solution. This is because the current through it is
specified by I0 , regardless of the magnitude of R4 (so long as it
is not an open circuit).
Example 3-6: Circuit with a Supermesh
For the circuit in Fig. 3-11(a), determine (a) the mesh currents
and (b) the power supplied by each of the two sources.
Solution: (a) Meshes 3 and 4 share a current source, thereby
forming a supermesh. Figure 3-11(b) shows the circuit redrawn
such that meshes 3 and 4 can be combined into a single
supermesh equation. Consequently, the mesh-current equations
for mesh 1, mesh 2, and supermesh 3 and 4 respectively, are
(10 + 2 + 4)I1 − 2I2 − 4I3 = 6
(mesh 1), (3.21a)
−2I1 + (2 + 2 + 2)I2 − 2I4 = 0
(mesh 2), (3.21b)
−4I1 − 2I2 + 4I3 + (2 + 4)I4 = 0
(supermesh).
(3.21c)
R1
R2
(auxiliary eq.).
and
The auxiliary equation associated with the current source is
given by
I4 − I3 = 3
(auxiliary equation).
(3.22)
Inserting Eq. (3.22) to eliminate I4 in Eqs. (3.21b and c) leads
to
16I1 − 2I2 − 4I3 = 6,
−2I1 + 6I2 − 2I3 = 6,
−4I1 − 2I2 + 10I3 = −18.
3-4
BY-INSPECTION METHODS
129
(b) Since I1 = 0, the power supplied by the 6 V source is
10 Ω
2Ω
P1 = 6I1 = 0.
2Ω
I2
To calculate the power supplied by the 3 A current source, we
need to know the voltage V1 across it, which is also the voltage
across the 4 � resistor given as
2Ω
I1
6V
+
_
+
V1
_
I4
I3
3A
4Ω
48
12
=
V.
V1 = 4(I1 − I3 ) = 4 0 − −
7
7
4Ω
Hence,
P2 = 3V1 = 3 ×
Thus, all of the power is supplied by the 3 A source alone
and is dissipated in the circuit resistances, except for the 10 �
resistance (because the current through it is I1 = 0).
(a) Original circuit
10 Ω
2Ω
Concept Question 3-5: How does the presence of
a dependent source in the circuit influence the
implementation procedure of the mesh-current method?
(See
)
2Ω
I2
2Ω
I1
6V
48
= 20.6 W.
7
Concept Question 3-6: What is a supermesh, and how is
+
_
I3
+
V1
_
4Ω
it used in mesh analysis? (See
I4
3A
4Ω
)
Exercise 3-6: Apply mesh analysis to determine I in the
circuit of Fig. E3.6.
I
3Ω
Supermesh
2Ω
4A
3A
5Ω
(b) Meshes 3 and 4 constitute a supermesh
Figure 3-11: Using the supermesh concept to simplify solution
of the circuit in Example 3-6.
Solution of the three simultaneous equations gives
3
I2 = A,
I1 = 0,
7
12
9
I4 = A.
I3 = − A,
7
7
Figure E3.6
Answer: I = −0.7 A. (See
)
3-4 By-Inspection Methods
The node-voltage and mesh-current methods can be used
to analyze any planar circuit, including those containing
dependent sources. The solution process relies on the
130
CHAPTER 3 ANALYSIS TECHNIQUES
application of KCL and KVL to generate the requisite number
of equations necessary to solve for the unknown currents and
voltages.
R2
Ia
For circuits that contain only independent sources,
their KCL and KVL equations exhibit standard patterns,
allowing us to write them down by direct inspection of
the circuit. The method of nodal analysis by inspection
is easy to implement, but it requires that all sources
in the circuit be independent current sources. Similarly,
mesh analysis by inspection requires that all sources be
independent voltage sources. V1
R1
Ia
V1
G1
Even though it is common practice to characterize the i–υ
relationship of a resistor in terms of its resistance R, it is more
convenient in some cases to work in terms of its conductance
G = 1/R and to apply the form of Ohm’s law given by
V
= GV .
R
V2
G3
Ib
(b) Circuit in terms of conductances
Figure 3-12: Application of the nodal-analysis by-inspection
The node-voltage by-inspection method is one such case.
We shortly will demonstrate the method for the general case
of a circuit composed of n (nonreference) extraordinary nodes.
As noted earlier, applicability of the method is limited to circuits
with independent current sources. By way of introducing the
method, let us consider the simple circuit of Fig. 3-12(a), whose
resistances have been relabeled in terms of conductances in
Fig. 3-12(b). In a circuit diagram, the value next to the symbol
of a resistor may be designated in ohms (�) or siemens (S), with
the former referring to the value of its resistance R and the latter
referring to the value of its conductance G. Both designations
convey the same information about the resistor.
The circuit has two extraordinary nodes. According to the
node-voltage by-inspection method, the circuit is characterized
by two node-voltage equations given by
G11 V1 + G12 V2 = It1 ,
Ib
G2
Nodal Analysis by Inspection
I=
R3
(a) Original circuit
If a circuit contains a mixture of independent current and
voltage sources, implementation of the by-inspection methods
will require a prerequisite step in which current sources are
converted to voltage sources, or vice versa, so as to secure the
requirement that all sources exclusively are current sources or
voltage sources. The conversion process can be realized with the
help of the source-transformation technique of Section 2-3.4.
3-4.1
V2
(3.23a)
method is facilitated by replacing resistors with conductances.
and
G21 V1 + G22 V2 = It2 ,
(3.23b)
where
G11 and G22 = sum of all conductances connected to nodes
1 and 2, respectively
G12 = G21 = negative of the sum of all conductances
connected between nodes 1 and 2
It1 and It2 = total of all independent current sources entering
nodes 1 and 2, respectively (a negative sign applies to a
current source leaving a node).
3-4
BY-INSPECTION METHODS
131
Application of these definitions to Fig. 3-12(b) gives
4A
G11 = G1 + G2 ,
G22 = G2 + G3 ,
V3
G12 = G21 = −G2 ,
It1 = −Ia ,
and
10 Ω
(0.1 S)
It2 = Ia + Ib .
Hence,
V1
(G1 + G2 )V1 − G2 V2 = −Ia
and
(3.24a)
2A
−G2 V1 + (G2 + G3 )V2 = Ia + Ib .
V4
20 Ω
(0.05 S)
10 Ω
(0.1 S)
V2
5Ω
(0.2 S)
1Ω
(1 S)
2Ω
(0.5 S)
3A
(3.24b)
It is a straightforward task to ascertain that Eqs. (3.24a and b)
are indeed the correct node-voltage equations for the circuit in
Fig. 3-12(b).
Figure 3-13: Circuit for Example 3-7.
Generalizing to the n-node case, the node-voltage
equations can be cast in matrix form as
⎡
G11
⎢ G21
⎢
⎢ ..
⎣ .
Gn1
G12
G22
···
···
Gn2
···
and abbreviated as
⎤⎡ ⎤ ⎡ ⎤
G1n
V1
I t1
⎢ V2 ⎥ ⎢ It2 ⎥
G2n ⎥
⎥⎢ ⎥ ⎢ ⎥
⎥ ⎢ .. ⎥ = ⎢ .. ⎥ , (3.25)
⎦⎣ . ⎦ ⎣ . ⎦
Gnn
Vn
GV = It ,
Itn
(3.26)
where G is the conductance matrix of the circuit, V is an
unknown voltage vector representing the node voltages,
and It is the source vector. The elements of these matrices
are defined as
Gkk = sum of all conductances connected to node k
Gk� = G�k = negative of conductance(s) connecting
nodes k and �, with k � = � (Gk� = 0 if no
conductance connects nodes k and � directly)
Vk = voltage at node k
Itk = total of current sources entering node k (a negative
sign applies to a current source leaving the node).
Solution of Eq. (3.26) for the elements of vector V can
be obtained through matrix inversion (Appendix B) or the
application of MATLAB or MathScript (Appendix E).
Example 3-7: Four-Node Circuit
Obtain the node-voltage matrix equation for the circuit in
Fig. 3-13 by inspection.
Solution: At node 1,
G11 =
1 1
1
+ +
= 1.3 S.
1 5 10
Similarly, at nodes 2, 3, and 4,
1 1
1
+ +
= 0.8 S,
5 2 10
1
1
=
+
= 0.15 S,
10 20
G22 =
G33
and
G44 =
1
1
+
= 0.15 S.
10 20
132
CHAPTER 3 ANALYSIS TECHNIQUES
The off-diagonal elements of the matrix are
G14 = G41
1
= −0.2 S,
5
1
=−
= −0.1 S,
10
= 0,
G24 = G42
1
= −0.1 S,
=−
10
Exercise 3-7: Apply the node-analysis by-inspection
method to generate the node-voltage matrix for the circuit
in Fig. E3.7.
G12 = G21 = −
G13 = G31
V1
4A
2Ω
G23 = G32 = 0,
and
G34 = G43
V2
3Ω
3A
5Ω
Figure E3.7
Answer:
�
1
=−
= −0.05 S.
20
(See
5
6
− 13
)
− 13
8
15
��
� � �
V1
4
=
.
V2
−3
The total currents entering nodes 1 to 4 are
3-4.2
It1 = 2 A,
It2 = 3 A,
It3 = 4 A,
and
Mesh Analysis by Inspection
By analogy with the node-voltage by-inspection method,
for a circuit containing only independent voltage sources,
its n mesh-current equations can be cast in matrix form
as
It4 = −4 A.
Hence, the node-voltage matrix equation is given by
⎡
1.3
⎢ −0.2
⎢
⎣ −0.1
0
−0.2
0.8
0
−0.1
−0.1
0
0.15
−0.05
⎤
⎤⎡ ⎤ ⎡
2
0
V1
⎥
⎢ ⎥ ⎢
−0.1 ⎥
⎥ ⎢ V2 ⎥ = ⎢ 3 ⎥ ,
−0.05 ⎦ ⎣ V3 ⎦ ⎣ 4 ⎦
V4
−4
0.15
RI = Vt ,
where R is the resistance matrix of the circuit, I is a
vector representing the unknown mesh currents, and V is
the source vector. Equation (3.27) is an abbreviation for
⎡
R11
⎢ R21
⎢
⎢ ..
⎣ .
Rn1
where
Solution by matrix inversion or MATLAB or MathScript
software gives
V1 = 3.73 V,
V2 = 2.54 V,
V3 = 23.43 V,
V4 = −17.16 V.
(3.27)
R12
R22
···
···
Rn2
···
⎤⎡ ⎤ ⎡ ⎤
R1n
I1
Vt1
⎢ I2 ⎥ ⎢ Vt2 ⎥
R2n ⎥
⎥⎢ ⎥ ⎢ ⎥
⎥ ⎢ .. ⎥ = ⎢ .. ⎥ , (3.28)
⎦⎣ . ⎦ ⎣ . ⎦
Rnn
In
Vtn
Rkk = sum of all resistances in mesh k,
Rk� = R�k = negative of the sum of all resistances shared
between meshes k and � (with k �= �) (Rk� = 0 if
meshes k and � do not share a resistor).
Ik = current of mesh k
Vtk = total of all independent voltage sources in mesh k,
with positive assigned to a voltage rise when
moving around the mesh in a clockwise direction.
3-5
LINEAR CIRCUITS AND SOURCE SUPERPOSITION
2Ω
3Ω
I2
4Ω
133
Concept Question 3-8: If the circuit contains a mixture
of real voltage and current sources, what step should be
taken to prepare the circuit for application of one of the
two by-inspection methods? (See
)
5Ω
6V
+
_
I1
Exercise 3-8: Use the by-inspection method to generate
the mesh-current matrix for the circuit in Fig. E3.8.
6Ω
4V
+_
I3
+
_
12 Ω
7Ω
5Ω
10 Ω
+
4V _
I1
Figure 3-14: Three-mesh circuit of Example 3-8.
_
+
8V
2V
I3
20 Ω
I2
6Ω
Figure E3.8
Example 3-8: Three-Mesh Circuit
Answer:
⎡
Obtain the mesh-current matrix equation for the circuit in
Fig. 3-14, by inspection.
Solution: Application of the definitions for the elements of
the matrix R and vector Vt leads to
⎡
⎤⎡ ⎤
(2 + 3 + 6)
−3
−6
I1
⎣
⎦ ⎣ I2 ⎦
−3
(3 + 4 + 5)
−5
I3
−6
−5
(5 + 6 + 7)
⎡
⎤
6−4
= ⎣ 0 ⎦,
4
which simplifies to
⎡
11 −3
⎣ −3 12
−6 −5
⎡ ⎤
2
−6
I1
−5 ⎦ ⎣ I2 ⎦ = ⎣ 0 ⎦ .
I3
4
18
⎤⎡
⎤
Solution of the matrix equation gives I1 = 0.55 A, I2 = 0.35 A,
and I3 = 0.50 A.
Concept Question 3-7: Are the by-inspection methods
applicable to (a) circuits containing a mixture of
independent voltage and current sources or (b) circuits
containing a mixture of independent and dependent
voltage sources? (See
)
(See
15
⎣ −10
0
)
−10
36
−20
⎤⎡ ⎤ ⎡
⎤
0
I1
12
−20 ⎦ ⎣ I2 ⎦ = ⎣ −8 ⎦
32
−2
I3
3-5 Linear Circuits and Source
Superposition
A system is said to be linear if its output response is
directly proportional to the excitation at its input. In the case of a resistive circuit, the input excitation consists of
the combination of all independent voltage and current sources
in the circuit, and the output response consists of the set of
all voltages across all passive elements in the circuit (namely,
the resistors), or all currents through them. As noted in Section
3-1, circuits with ideal elements (including those containing
capacitors and inductors) satisfy the linearity property, and
therefore qualify as linear systems. A linear system obeys
the superposition principle (Section 3-1.2), which for a linear
circuit translates into:
134
CHAPTER 3 ANALYSIS TECHNIQUES
If a circuit contains more than one independent source,
the voltage (or current) response of any element in the
circuit is equal to the algebraic sum (superposition) of
the individual responses associated with the individual
independent sources, as if each had been acting alone. Thus, for a circuit with n independent voltage or current sources
labeled as sources 1 to n, the voltage υ across a given passive
circuit element is given by
υ = υ 1 + υ 2 + · · · + υn ,
(3.29)
Example 3-9: Circuit Analysis by Source Superposition
(a) Use source superposition to determine the current I in
the circuit of Fig. 3-15. (b) Determine the amount of power
dissipated in the 10 � resistor due to each source acting alone
and due to both sources acting simultaneously.
Solution: (a) The circuit contains two sources, I0 and V0 . We
start by transforming the circuit into the sum of two new circuits
(one with I0 alone and another with V0 alone), as shown in parts
(b) and (c) of Fig. 3-15, respectively. The current through R2 due
to I0 alone is labeled I1 , and that due to V0 alone is labeled I2 .
where υk is the response when all sources have been set to zero,
except for source k. A similar expression applies to the current i
through the circuit,
i = i1 + i2 + · · · + in .
I
R2 = 10 Ω
(3.30)
I0 = 6 A
The superposition principle can be used to find υ (or i) by
executing the following steps:
Solution Procedure: Source Superposition
I1
Step 2: Apply node-voltage, mesh-current, or any other
convenient analysis technique to solve for the response υ1
due to source 1 acting alone.
I0 = 6 A
(b)
Step 4: Use Eq. (3.29) to determine the total response υ.
Alternatively, the procedure can be used to find currents
i1 to in and then to add them up algebraically to find the
total current i using Eq. (3.30).
Because it entails solving a circuit multiple times, the sourcesuperposition method may not seem attractive, particularly for
analyzing circuits with many sources. However, it is a useful
tool in both analysis and design for evaluating the sensitivity
of a response (such as the current in a load resistor) to specific
sources in the circuit.
Whereas the source-superposition method is applicable
for calculating voltage and current, it is not applicable for
power (see Example 3-9). V0 = 45 V
+
+
-_
(a) Original circuit
Step 1: Set all independent sources equal to zero (by
replacing voltage sources with short circuits and current
sources with open circuits), except for source 1.
Step 3: Repeat the process for sources 2 through n,
calculating in each case the response due to that one
source acting alone.
R1 = 5 Ω
R2 = 10 Ω
R1 = 5 Ω
Source I0 alone generates I1
[Eliminating a voltage source = replacing it
with short circuit]
I2
R2 = 10 Ω
R1 = 5 Ω
(c)
V0 = 45 V
+
+
-_
Source V0 alone generates I2
[Eliminating a current source = replacing it
with open circuit]
Figure 3-15: Application of the source-superposition method
to the circuit of Example 3-9.
3-5
LINEAR CIRCUITS AND SOURCE SUPERPOSITION
135
Circuit with current source alone
Setting V0 = 0 means replacing the voltage source with a short
circuit, as shown in Fig. 3-15(b). By current division,
R1
5
I0 =
6 = 2 A.
I1 =
R1 + R 2
5 + 10
2Ω
9Ω
+
6V _
+
_
2V
2Vx
6Ω
+
Vx
−
Circuit with voltage source alone
Setting I0 = 0 means replacing the current source with an open
circuit, as shown in Fig. 3-15(c). Application of KVL leads to
−45
V0
=
= −3 A.
I2 = −
R1 + R 2
5 + 10
Hence,
I = I1 + I2 = 2 − 3 = −1 A.
(a) Original circuit
Vx1
2Ω
9Ω
+
6V _
2Vx1
6Ω
+
Vx1
−
(b) The amounts of power dissipated in the 10 resistor due
to I1 alone, I2 alone, and the total current I are, respectively;
P1 = I12 R = 22 × 10 = 40 W,
and
(b) The 6 V source acting alone generates voltage Vx1
P2 = I22 R = (−3)2 × 10 = 90 W,
9Ω
P = I 2 R = 12 × 10 = 10 W.
Note that P = P1 + P2 , because the linearity property does not
apply to power.
Example 3-10: Superposition for Dependent-Source
Circuit
Apply the superposition principle to the circuit shown in
Fig. 3-16(a) to determine Vx .
Solution: The circuit in Fig. 3-16(a) contains two independent voltage sources. Our task is to determine voltage Vx across
the 6 resistor. The superposition method allows us to represent
the original circuit by two new circuits, one containing the 6 V
source while excluding the 2 V source, and another with the
opposite arrangement. The first circuit generates Vx1 across the
6 resistor and the second circuit generates Vx2 . The unknown
voltage Vx is the sum of the two.
2V
Vx1 − 6 Vx1
Vx
+
− 2Vx1 + 1 = 0,
2
9
6
which leads to
Vx1 = −2.45 V.
+
_
2Vx2
6Ω
+
Vx2
−
(c) The 2 V source acting alone generates voltage Vx2
Figure 3-16: Application of superposition to the circuit of
Example 3-10.
Circuit with 2 V source alone
At node Vx2 in the circuit of Fig. 3-16(c), KCL gives
Vx2
Vx
Vx − 2
+ 2
− 2Vx2 + 2 = 0,
2
9
6
Circuit with 6 V source alone
At node Vx1 in the circuit of Fig. 3-16(b), KCL gives
Vx2
2Ω
which leads to
Vx2 = −0.18 V.
Hence,
Vx = Vx1 + Vx2 = −2.45 − 0.18 = −2.63 V.
136
TECHNOLOGY BRIEF 7: INTEGRATED CIRCUIT FABRICATION PROCESS
Technology Brief 7
Integrated Circuit Fabrication
Process
Do you ever wonder how the processor in your computer
was actually fabricated? How is it that engineers can put
hundreds of millions of transistors into one device that
measures only a few centimeters on a side (and with so
few errors) so the devices actually function as expected?
Devices such as modern computer processors and
semiconductor memories fall into a class known as
integrated circuits (IC). They are so named because
all of the components in the circuit (and their “wires”)
are fabricated simultaneously (integrated) onto a circuit
during the manufacturing process. This is in contrast to
circuits where each component is fabricated separately
and then soldered or wired together onto a common board
(such as those you probably build in your lab classes).
Integrated circuits were first demonstrated independently
by Jack Kilby at Texas Instruments and Robert Noyce
at Fairchild Semiconductor in the late 1950s. Once
developed, the ability to easily manufacture components
and their connections with good quality control meant
that circuits with thousands (then millions, then billions)
of components could be designed and built reliably.
Figure TF7-1: A single 4-inch silicon wafer. Note the wafer’s
mirror-like surface. (Courtesy of Veljko Milanovic.)
Semiconductor Processing Basics
All mainstream semiconductor integrated-circuit processes start with a thin slice of silicon, known as a
substrate or wafer.This wafer is circular and ranges from
4 to 18 inches in diameter and is approximately 1 mm thick
(hence its name). Each wafer is cut from a single crystal
of the element silicon and polished to its final thickness
with atomic smoothness (Fig.TF7-1). Most circuit designs
(like your processor) fit into a few square centimeters of
silicon area; each self-contained area is known as a die.
After fabrication, the wafer is cut to produce independent,
rectangular dies often known as chips, which are then
packaged with plastic covers and metal pins or other
external connections to produce the final component you
buy at the store.
A specific sequence or process of chemical and
mechanical modifications is performed on certain areas of
the wafer. Although complex processes employ a variety
of techniques, a basic IC process will employ one of the
following three modifications to the wafer:
• Implantation: Atoms or molecules are driven into
(implanted in) the silicon wafer, changing its electronic properties (Fig. TF7-2(a)).
• Deposition: Materials such as metals, insulators,
or semiconductors are deposited in thin layers (like
spray painting) onto the wafer (Fig. TF7-2(b)).
• Etching: Material is removed from the wafer
through chemical reactions or mechanical motion
(Fig. TF7-2(c)).
Lithography
When building an IC, we need to perform different
modifications to different areas of the wafer. We may
want to etch some areas and add metal to others, for
example. The method by which we define which areas
will be modified is known as lithography.
TECHNOLOGY BRIEF 7: INTEGRATED CIRCUIT FABRICATION PROCESS
(a) Implantation: High-energy ions are
driven into the silicon. Most become
lodged in the first few nanometers,
with decreasing concentration away
from the surface. In this example,
boron (an electron donor) is implanted
into a silicon substrate to make a p-type
material.
(b) Deposition: Atoms (or molecules)
impact the surface but do not have the
energy required to penetrate the
surface. They accumulate on the
surface in thin films. In this example,
aluminum is deposited in a conductive
film onto the silicon.
137
(a) Etching: Chemical, mechanical,
or high-energy plasma methods are
used to remove silicon (or other
material) from the surface. In this
example, silicon is etched away from
the substrate.
Figure TF7-2: Cross-section of basic fabrication processes. The dashed line in each drawing indicates the original surface of
the wafer.
Lithography has evolved much over the last 40 years
and will continue to do so. Modern lithography employs all
of the basic principles described below, but uses complex
computation, specialized materials, and optical devices
to achieve the very high resolutions required to reach
modern feature sizes.
At its heart, lithography is simply a stencil process. In
an old-fashioned stencil process, when a plastic sheet
with cut-out letters or numbers is laid on a flat surface
and painted, the cutout areas will be painted and the rest
will be masked. Once the stencil is removed, the design
left behind consists of only the painted areas with clean
edges and a uniform surface. The total surface area of
the IC depends on the number and complexity of the
circuit elements on the IC, and on the minimum feature
size, which is 10 nm (10−8 m) today. With that in mind,
consider Fig. TF7-3. Given a flat wafer, we first apply
a thin coating of liquid polymer known as photoresist
(PR). This layer usually is several hundred nanometers
thick and is applied by placing a drop in the center of
the wafer and then spinning the wafer very fast (1000 to
5000 rpm) so that the drop spreads out evenly over the
surface. Once coated, the PR is heated (usually between
60 to 100 ◦ C) in a process known as baking; this allows
the PR to solidify slightly to a plastic-like consistency. This
layer is then exposed to ultraviolet (UV) light, the bonds
that hold the PR molecules together are “chopped” up; this
makes it easy to wash away the UV-exposed areas (some
varieties of PR behave in exactly the opposite manner:
UV light makes the PR very strong or cross-linked, but
we will ignore that technique here). In lithography, UV
light is focused through a glass plate with patterns on it;
this is known as exposure. These patterns act as a “light
stencil” for the PR.Wherever UV light hits the PR, that area
subsequently can be washed away in a process called
development. After development, the PR film remains
behind with holes in the exposed and washed areas.
How is this helpful? Let’s look at how the modifications
presented earlier can be masked with PR to produce
patterned effects (Fig. TF7-4). In each case, we
first use lithography to pattern areas onto the wafer
(Fig. TF7-4(a)) then we perform one of our three
138
TECHNOLOGY BRIEF 7: INTEGRATED CIRCUIT FABRICATION PROCESS
Dispense
Spin and Bake
Expose
Develop
Figure TF7-3: Basic lithography steps.
processes (Fig. TF7-4(b)), and finally, we use a strong
solvent such as acetone (nail polish remover) to
completely wash away the PR (Fig. TF7-4(c)). The PR
allows us to implant, deposit, or etch only in defined areas.
Fabricating a Diode
In Section 2-6, we discussed the functional performance
of the diode as a circuit component. Here, we will
examine briefly how a diode is fabricated. Similar but
more complex multi-step processes are used to make
transistors and integrated circuits. Conceptually, the
simplest diode is made from two slabs of silicon—
each implanted with different atoms—pressed together
such that they share a boundary (Fig. TF7-5). The
n and p areas are pieces of silicon that have been
implanted with atoms (known as impurities) that change
the number of electrons capable of flowing freely through
the silicon. This changes the semiconducting properties
of the silicon and creates an electrically active boundary
Lithography
Implantation
p or n type
silicon area
Deposition
Metal film
Etch
Etched recess
silicon substrate
Figure TF7-4: Lithography used to pattern implantation areas, deposit metal features, and etch areas.
TECHNOLOGY BRIEF 7: INTEGRATED CIRCUIT FABRICATION PROCESS
p-type
silicon
139
n-type
silicon
metal
metal
Figure TF7-5: The basic diode (top) circuit symbol and
(bottom) conceptual depiction of the physical structure.
n-type implant
a
Lithography + etch oxide
f
Grow oxide
Remove PR
b
g
Lithography + etch oxide
Metal deposition
c
h
Remove PR
Lithography + etch metal
d
i
p-type implant
e
Complete diode
j
Metal
Metal
Figure TF7-6: A simple pn-junction diode fabrication
process.
Figure TF7-7: Colorized scanning electron-microscope
cross section of a 64-bit high-performance microprocessor
chip built in IBM’s 90 nm Server-Class CMOS technology.
Note that several metal interconnect levels are used
(metal lines are orange, insulator is green); the transistors
lie below this metal on the silicon wafer itself (dark
blue). (Courtesy of International Business Machines
Corporation.)
(called a junction) between the n and the p areas of
silicon. If a forward-biased voltage is applied, it is as if
the p charges move towards the n side, allowing current to
flow, even though no actual p or n atoms move in the diode.
When both the n and p pieces of silicon are connected to
metal wires, this two-terminal device exhibits the diode
i–υ curve shown in Fig. 2-40(c).
Figure TF7-6 shows the process for making a single
diode. Only one step needs further definition: oxidation.
During oxidation, the silicon wafer is heated to > 1000 ◦ C
in an oxygen atmosphere. At this temperature, the oxygen
atoms and the silicon react and form a layer of SiO2 on
the surface (this layer is often called an oxide layer). SiO2
is a type of glass and is used as an insulator.
Wires are made by depositing metal layers on top of
the device; these are called interconnects. Modern ICs
have 6 to 7 such interconnect layers (Fig. TF7-7). These
layers are used to make electrical connections between
all of the various components in the IC in the same way
that macroscopic wires are used to link components on a
breadboard.
140
CHAPTER 3 ANALYSIS TECHNIQUES
Concept Question 3-9: Explain why the linearity
property of electric circuits is an underlying requirement
for the application of the source-superposition method.
(See
)
Concept Question 3-10: How is the superposition
method used as a sensitivity tool in circuit analysis and
design? (See
)
Concept Question 3-11: Is the source-superposition
method applicable to power? In other words, if source 1
alone supplies power P1 to a certain device and source 2
alone supplies power P2 to the same device, will the two
sources acting simultaneously supply power P1 + P2 to
the device? (See
)
Exercise 3-9: Apply the source-superposition method to
determine the current I in the circuit of Fig. E3.9.
3Ω
I
4A
2Ω
3A
5Ω
Figure E3.9
Answer: I = 2.3 A. (See
)
Exercise 3-10: Apply source superposition to deter-
mine Vout in the circuit of Fig. E3.10.
3Ω
3A
2Ω
4A
1Ω
+
Vout
−
Figure E3.10
Answer: Vout = −1 V. (See
)
3-6 Thévenin and Norton Equivalent
Circuits
As depicted by the block diagram shown in Fig. 3-17,
a generic cell-phone circuit consists of several individual
circuits, including amplifiers, oscillators, analog-to-digital
(A/D) and digital-to-analog (D/A) converters, an antenna,
a diplexer that allows the antenna to be used for both
transmission and reception, a microprocessor, and other
auxiliary circuits. Many of these circuits are quite complex
and may contain a large number of active and passive
elements, in both discrete and integrated form. So the
question one might ask is: How does an engineer approach
an analysis or design task involving such a complex
architecture?
Dealing with the entire circuit all at once would be next to
impossible, not only because of its daunting complexity, but also
because the individual circuits call for engineers with different
specializations.
Fortunately, we have a straightforward answer to the
question, namely that each circuit gets modeled as a “black
box,” or block, with specified input and output (I/O)
terminal characteristics allowing the engineer working with
a particular circuit to treat the other circuits connected
to it in terms of only those (I/O) characteristics without
much regard to the details of their internal architectures.
For an amplifier, for example, its overall specifications
might include voltage gain and frequency bandwidth, among
other attributes, but its terminal characteristics refer to
how it would “appear” from the perspective of other
circuits.
Conversely, from the amplifier’s perspective, other circuits
are specified in terms of how they appear to the amplifier.
Figure 3-18 illustrates the concept from the perspective of
the radio-frequency (RF) low-noise amplifier in the receive
channel of the cell-phone circuit. The combination of the
antenna and diplexer (including the input signal picked up
by the antenna) is represented at the input side of the
amplifier by an equivalent circuit composed of a voltage
source υs in series with an impedance Zs . Impedance (which
we shall introduce in a later chapter) is the ac-equivalent of
resistance in dc circuits. At the output side of the amplifier,
the mixer (whose function is to shift the center frequency
of the input signal from 834 MHz down to 70 MHz) is
represented by a load impedance ZL . Thus, the output terminal
characteristics of the antenna/diplexer combination become
the input source to the amplifier, and the input impedance
of the mixer becomes the load to which the amplifier is
connected.
Isolating the amplifier, while keeping it in the context of
its input and output neighbors, facilitates both the analysis
and design processes. 3-6 THÉVENIN AND NORTON EQUIVALENT CIRCUITS
RF = Radio Frequency
IF = Intermediate Frequency
LO = Local Oscillator
RF Power
Mixer = Frequency Up- or
Amp
Down-Converter
RF Filter
Transmit Path
Antenna
Transmitted Signal
141
Human Interface,
Dialing, Memory
Battery Power Control
Mixer
(Speech,
video, data)
In Out
Microprocessor
Control
IF Amp
Modulator
LO
~
~
IF Amp
LO
D/A and A/D
Converters
and
Filters
Demodulator
Received Signal
Diplexer/Filter
Receive Path
Antenna and
Propagation
RF Low Mixer
Noise Amp
IF Filter
RF Front-End
IF Block
Back-End
Baseband
Figure 3-17: Cell-phone block diagram.
3-6.1
Input and Output Resistances
Example 1: Household wiring
Our homes are powered by some kind of electrical generation
plant (coal-powered, hydroelectric, etc.) that produces high
voltage, which is run to our city on high-voltage transmission
lines, split into smaller voltages at various substations, and
eventually delivered to the breakers or fuse boxes of our homes
(Chapter 10). This is a rather complex system with many parts,
so we prefer not to analyze the entire system every time we
consider a change in a household electrical circuit. We can
represent the entire power distribution system as a voltage
source (in this case, 110 V) in series with a small source
resistance Rs that represents the losses in the transmission lines
and connections, as shown in the simplified block diagram in
Fig. 3-19. Even though the source is ac, we will treat it as if it
were a dc source with Vs = 110 V.
Source impedance
Zs
υs
+
_
+
υin
Zin
RF
low-noise
amplifier
Zout
_
Input equivalent circuit
+
υout
ZL
_
Amplifier circuit
Mixer
input
impedance
Load equivalent
circuit
Figure 3-18: Input and output circuits as seen from the perspective of a radio-frequency amplifier circuit.
142
CHAPTER 3 ANALYSIS TECHNIQUES
Lamp
Breaker
box
Power plant
Fan
(a) Electrical system
I
+
Vs _
110 V
Rs
Rfan
Rlamp
DVM
(b) Equivalent circuit
Figure 3-19: (a) Power distribution system driving a fan and a lamp in a house, and (b) block diagram of the source (power distribution
system), fan, lamp, and a voltmeter measuring the voltage in the outlet.
Every device we plug in (such as the fan and lamp) is in
parallel with the power source block. The lamp is just a switch
and a light bulb, which we might even simplify further by
ignoring the switch and assuming it is always on, thus giving us
very simply a resistor Rlamp in the block diagram in Fig. 3-19(b).
The fan, on the other hand, is a little more complicated because
it includes a motor and a switch that controls various speeds, but
we can still represent it by a parallel resistor Rfan . If Vs = 110 V,
Rs = 10 �, and Rfan = Rlamp = 100 �, what is the current
drawn from the source?
The parallel combination of Rfan and Rlamp is
R� = Rfan � Rlamp = 100 � 100 = 50 �.
The total resistance connected to Vs is the series sum of R�
and Rs :
Rtotal = R� + Rs = 50 + 10 = 60 �.
Hence, by Ohm’s law,
I=
110
Vs
=
= 1.83 A.
Rtotal
60
What is the voltage across the fan and lamp?
Application of voltage division gives
Vfan = Vlamp = Vs
R�
110 × 50
=
= 91.67 V.
Rtotal
60
This is measurably less than the 110 V of Vs . The voltage
reduction is called loading the circuit, and it occurs when
the series source input resistance and the load resistance
(Rfan � Rlamp ) are on the same order of magnitude, or if the
source resistance is larger than the load resistance. If too many
appliances are plugged into the outlet, all of their resistances
combine in parallel, thereby reducing the total load resistance,
drawing more current, and loading down the circuit (reducing
the voltage across the devices). Eventually, the devices will no
longer function properly (if the voltage gets too low) or the
circuit breaker creates an open circuit if the current gets too
high.
This example illustrates the concept of input and output
resistances and why they matter. The input resistance is what
is seen looking into a block “from the left,” and the output
resistance is what is seen looking in “from the right.” For the
3-6 THÉVENIN AND NORTON EQUIVALENT CIRCUITS
voltage source, we do not really have an input resistance, and
its output resistance is Rs . For the fan and lamp, the input and
output resistances are both Rfan and Rlamp , respectively. If we
have a small output resistance looking into (connected to) a
large input resistance of a load (such as the fan/lamp circuit),
the load will not draw down the voltage (load the circuit) very
much. In fact, if the input resistance of the load is high enough,
we can even ignore it in the analysis of the circuit because the
voltage across it is essentially the same as the source voltage.
On the other hand, if the output and input resistances are similar
in magnitude, the load will indeed draw down the voltage (and
load the circuit). The load clearly has an impact on the circuit,
and we cannot ignore it in the analysis of how the circuit works.
And if the output resistance of the source is larger than the input
resistance of the load, the voltage of the load will be significantly
reduced (loaded).
Example 2: Voltmeter
Voltmeters are deliberately designed with high input resistance
(≥ 2 M) so that they do not affect the circuit being measured.
Consider, for example, measuring the voltage (or resistance)
across the fan/lamp circuit in Fig. 3-19(b). The resistance of
the fan and lamp in parallel is 50 . If the voltmeter (DVM)
has an input resistance of 2 M, the fan/lamp/DVM circuit has
a total resistance of 49.999 , a change of less than 0.01%.
Another way to think of this is that the DVM will draw very
little current through it, because of its high input resistance. If
the DVM is used to measure resistance instead of voltage, its
input resistance also is high, and would have minimal effect on
the circuit being measured. In contrast, the input resistance of
an ammeter is very small (about 1 μ), much smaller than the
fan/lamp combination.
Summary: What have we learned from these examples?
• Input resistance (looking toward the load) and output
resistance (looking toward the source) are important
parameters of the circuit.
• If the input resistance of the load is very high compared
with the output resistance of the rest of the circuit (such
as the case with the voltmeter), that part of the circuit
(the load) can basically be ignored when we analyze the
other parts of the circuit. In fact, this means that these
blocks can be designed and analyzed individually. We call
them independent, uncoupled, or decoupled. Being able
143
to design and analyze blocks of a circuit individually is
such a powerful concept that we often deliberately build
circuits to have high input resistance. Circuits with high
input resistance draw minimal current.
• If the input resistance of the load is low (or similar)
compared with the output resistance of the input circuit,
significant current is drawn into the load circuit. This may
load the source circuit and reduce the voltage at the load.
Also, the circuits can no longer be analyzed individually;
they are coupled and must be analyzed together.
3-6.2 Thévenin’s Theorem
Our ability to develop equivalent-circuit representations is made possible (in part) by a pair of theorems
of fundamental significance known as Thévenin’s and
Norton’s theorems. Most electrical systems are quite complex, so that each
subsystem (such as the filter, demodulator, amplifier, etc., in
Fig. 3-17) is designed independently, and often by different
engineers and even by different companies. We established in
the preceding subsection that in order to design subsystems
independently, it is necessary that each has a high input
resistance. This is often not feasible, however, so we need
another approach to designing cascaded circuits and then
combining them together into a larger system. The Thévenin
and Norton concepts described in this section help us do that.
They are very powerful techniques used extensively in electrical
engineering design. In practice, the system engineering team
determines what blocks are needed for the system, lays out the
block diagram, and specifies the input voltages and currents,
and input and output resistances for each block of the circuit.
Design teams then create circuits for each block, and test
them independently using the input and output resistances/
voltages/currents for their neighboring subsystems in the test
protocol. The integration team puts the subsystems together,
often with the mechanical parts of the system as well, and then
tests the overall system as an integrated unit to ensure that its
performance meets the design specifications.
In the 1880s, a French engineer named Léon Thévenin
introduced the concept known today as Thévenin’s theorem,
which asserts:
144
CHAPTER 3 ANALYSIS TECHNIQUES
A linear circuit can be represented at its output terminals
by an equivalent circuit consisting of a series combination
of a voltage source υTh and a resistor RTh , where υTh is the
open-circuit voltage at those terminals (no load) and RTh
is the equivalent resistance between the same terminals
when all independent sources in the circuit have been
deactivated. RTh is the output resistance of the Thévenin
circuit. a
+
Actual
circuit
υoc
−
b
(a) Measuring υoc on actual circuit
RTh
A pictorial representation of Thévenin’s theorem is shown in
Fig. 3-20, where the actual circuit in part (a) has been replaced
with the Thévenin equivalent circuit in part (b). The implication
of this model is that when the circuit is connected to a load
resistor RL , the current iL running through it will be identical
for both the actual circuit and the equivalent circuit. This
equivalence holds true for any value of RL , from zero (short
circuit) to ∞ (open circuit). Thus, from the standpoint of the
load, the two circuits are indistinguishable.
Even though the present discussion pertains to dc currents,
the Thévenin concept extends to ac circuits as well. We will
revisit the concept in a future chapter for circuits containing
capacitors and inductors.
3-6.3
Finding υTh
Thévenin equivalency means that from the standpoint of the
load RL , the two circuits in Fig. 3-20 are indistinguishable. For
a
Actual
circuit
RL
b
Load
(a) Original circuit
RTh
υTh
iL
a
iL
+
_
b
(b)
υTh
'
Thevenin
equivalent
Figure 3-20: A circuit can be represented in terms of a Thévenin
equivalent comprising a voltage source υTh in series with a
resistance RTh .
_
a
+
+
_
υTh
−
+
_
b
(b) Measuring υTh of equivalent circuit
Figure 3-21: Equivalency means that υTh of the Thévenin
equivalent circuit is equal to the open-circuit voltage for the
actual circuit.
any value we assign to RL , both circuits generate the same iL .
Hence, if we disconnect RL altogether from both circuits and
then measure the voltage across terminals (a, b), we should
measure the same voltage. The scenario is depicted in Fig. 3-21.
In part (a), a voltmeter would measure the open-circuit voltage
υoc of the actual circuit, and in part (b) the voltmeter would
measure υTh (since there is no voltage drop across RTh ). We
are effectively measuring the output voltage of our blackbox.
Equivalency requires that
υTh (of Thévenin equivalent) = υoc (of actual circuit).
(3.31)
The procedure is equally valid for circuits with or without
dependent sources. For a circuit with no independent sources,
υTh = 0.
3-6.4
RL
+
Finding RTh —Short-Circuit Method
Multiple methods are available for finding the Thévenin
resistance RTh . We start with the short-circuit method. From
Fig. 3-20(b),
υTh
iL =
.
(3.32)
RTh + RL
If RL = 0 (short-circuit load), we call iL the short-circuit
current isc , which would be given by
isc =
υTh
.
RTh
(3.33)
3-6 THÉVENIN AND NORTON EQUIVALENT CIRCUITS
Open-Circuit / Short-Circuit Method
a
Actual
circuit
+
υoc
−
+
_
Volts
145
Example 3-11: Open Circuit / Short Circuit Method
The input circuit to the left of terminals (a, b) in Fig. 3-23(a)
is connected to a variable load resistor RL . Determine (a)
the Thévenin equivalent of the circuit to the left of terminals
(a, b) and (b) use it to find the value of RL that will cause the
magnitude of the current through it to be 0.5 A.
b
(a) υTh = υoc
6Ω
isc
Actual
circuit
Amps
24 V
a
2Ω
IL
+
_
12 Ω
RL
7A
b
(b) RTh = υoc /isc
(a) Original circuit
Figure 3-22: Thévenin voltage is equal to the open-circuit
voltage and Thévenin resistance is equal to the ratio of υoc
to isc , where isc is the short-circuit current between the output
terminals.
Vc
6Ω
24 V
a
2Ω
+
+
_
12 Ω
Voc = VTh
7A
_
b
(b) Replacing RL with open circuit
By analyzing the circuit configuration in Fig. 3-22(b) to find isc
or, measuring isc with an ammeter, we can apply Eq. (3.33) to
find RTh ,
RTh
υTh
=
.
isc
(3.34)
The only potential problem with this type of measurement is that
when short-circuiting the source circuit, the current threshold
of the ammeter may be exceeded (if the output resistance of the
source circuit is very small).
This method is applicable to any circuit with at least one
independent source, regardless of whether or not it contains
dependent sources.
Vc
6Ω
24 V
a
2Ω
Isc
+
_
12 Ω
7A
b
(c) Replacing RL with short circuit
RTh = 6 Ω
VTh = 12 V
a
IL
_
+
RL
b
'
(d) Thevenin
equivalent circuit
Figure 3-23: Applying open circuit/short circuit method to find
the Thévenin equivalent for the circuit of Example 3-10.
146
CHAPTER 3 ANALYSIS TECHNIQUES
Solution: (a) With RL replaced with an open circuit in
Fig. 3-23(b), VTh is the open-circuit voltage between terminals
(a, b). Since no current flows through the 2 � resistor, VTh = Vc
at node c. The node-voltage equation at node c is
Vc − 24 Vc
+
+ 7 = 0,
6
12
Exercise 3-11: Determine the Thévenin-equivalent
circuit at terminals (a, b) in Fig. E3.11.
3Ω
4A
2Ω
which leads to Vc = −12 V. Hence,
VTh = −12 V.
Next, we replace RL with a short circuit (Fig. 3-23(c)) and
repeat the process to find Vc� :
V�
Vc� − 24 Vc�
+
+ 7 + c = 0,
6
12
2
whose solution gives Vc� = −4 V, and
Vc�
2
4
=−
2
= −2 A.
Isc =
Hence,
VTh
Isc
−12
=
−2
RTh =
= 6 �,
and the Thévenin equivalent circuit is shown in Fig. 3-23(d).
(b) In view of Fig. 3-23(d), for IL to be 0.5 A, it is necessary
that
IL =
12
6 + RL
= 0.5 A
or
RL = 18 �.
a
3A
Figure E3.11
5Ω
b
Answer: VTh = −3.5 V, Isc = −1.4 A, RTh = 2.5 �.
(See
3-6.5
)
Finding RTh —Equivalent Resistance
Method
If the circuit does not contain dependent sources, RTh can
be determined by deactivating all sources (replacing voltage
sources with short circuits and current sources with open
circuits) and then simplifying the circuit down to a single
equivalent resistance between its output terminals, as portrayed
by Fig. 3-24. In that case,
RTh = Req .
(3.35)
This method does not apply to circuits that contain dependent
sources.
Example 3-12: Thévenin Resistance
Find RTh at terminals (a, b) for the circuit in Fig. 3-25(a).
Solution: Since the circuit has no dependent sources, we
can apply the equivalent-resistance method. We start by
Equivalent-Resistance Method
Circuit with
all independent
sources deactivated
Req = RTh
Figure 3-24: For a circuit that does not contain dependent
sources, RTh can be determined by deactivating all sources
(replacing voltage sources with short circuits and current sources
with open circuits) and then simplifying the circuit down to a
single resistance Req .
3-6 THÉVENIN AND NORTON EQUIVALENT CIRCUITS
147
resultant 60 � with the 30 � resistance in parallel, we obtain
16 V
_
RTh = 20 �.
+
50 Ω
(a) Original circuit
4A
50 Ω
a
30 Ω
Exercise 3-12: Find the Thévenin equivalent of the circuit
to the left of terminals (a, b) in Fig. E3.12, and then
determine the current I .
b
35 Ω
5Ω
5Ω
20 V
50 Ω
(b) After deactivating
sources
+
_
I
b
1Ω
5A
2Ω
Figure E3.12
Answer:
30 Ω
3Ω
b
2V
25 Ω
35 Ω
a
a
(See
a
30 Ω
b
a
(d) Final RTh
3Ω
50 Ω
35 Ω
(c) After combining
the two 50 Ω
resistors in parallel
0.6 Ω
RTh = 20 Ω
b
Figure 3-25: After deactivation of sources, systematic
simplification leads to RTh (Example 3-12).
deactivating all of the sources (as shown in Fig. 3-25(b)) where
we replaced the voltage source with a short circuit and the
current source with an open circuit. After (a) combining the two
50 � resistors in parallel, (b) combining their 25 � combination
in series with the 35 � resistance, and (c) finally combining the
3-6.6
+
_
a
I
b
1Ω
I = 0.5 A.
)
Finding RTh —External-Source Method
The equivalent-resistance method described previously does
not apply to circuits containing dependent sources. Hence, an
alternative variation is called for. Independent sources again
are deactivated (but dependent sources are left alone) and an
external voltage source υex is introduced to excite the circuit,
as shown in Fig. 3-26. After analyzing the circuit to determine
the current iex , RTh is found by applying
RTh =
υex
.
iex
(3.36)
Since iex is caused by υex , it is directly proportional to it.
Hence, we may choose any value for υex , such as υex = 1 V, as
long as we use the same value both in Fig. 3-26 when analyzing
the circuit to find iex and in applying Eq. (3.36) to compute RTh .
Example 3-13: Circuit with Dependent Source
Find the Thévenin equivalent circuit at terminals (a, b) for the
circuit in Fig. 3-27(a) by applying the combination of opencircuit-voltage and external-source methods.
148
CHAPTER 3 ANALYSIS TECHNIQUES
External-Source Method
Circuit with only
independent
sources deactivated
+
_
6Ω
iex
υex
+
Ix
+
33 V _
a
4Ω
2Ω
Vab = VTh
I1
+
-_ 3Ix
−
+
_
RTh
(a) Solving for VTh
iex
υex
6Ω
4Ω
Ix
Figure 3-26: If a circuit contains both dependent and
independent sources, RTh can be determined by (a) deactivating
only independent sources ( by replacing independent voltage
sources with short circuits and independent current sources
with open circuits), (b) adding an external source υex , and
then (c) solving the circuit to determine iex . The solution is
RTh = υex / iex .
b
a
2Ω
I1
+
-_ 3Ix
+
_
I2
(b) Solving for Iex
Solution: The KVL equation for mesh current I1 in
Fig. 3-27(a) is given by
Iex
b
a
−33 + 6I1 + 2I1 + 3Ix = 0.
Iex
+
_
RTh
Recognizing that Ix = I1 , solution of the preceding equation
leads to
I1 = 3 A.
Vex
Vex
b
Since there is no voltage drop across the 4 � resistor (because
no current is flowing through it),
(c) Equivalent circuit for calculating RTh
VTh = Vab = 2I1 + 3Ix = 5I1 = 15 V.
Figure 3-27: Solution of the open-circuit voltage gives
To find RTh using the external-source method, we deactivate the
33 V voltage source and we add an external voltage source Vex ,
as shown in Fig. 3-27(b). Our task is to obtain an expression for
Iex in terms of Vex . In Fig. 3-27(b) we have two mesh currents,
which we have labeled I1� and I2� . Their equations are given by
6I1�
+ 2(I1� − I2� ) + 3Ix
−3Ix + 2(I2� − I1� ) + 4I2� + Vex
= 0,
= 0.
After replacing Ix with I1� and solving the two simultaneous
equations, we obtain
I1� = −
1
Vex ,
28
Vab = VTh = 15 V. Use of the external-voltage method leads
to RTh = 56/11 � (Example 3-13).
and
11
Vex .
56
For the equivalent circuit shown in Fig. 3-27(c),
I2� = −
RTh =
Vex
.
Iex
In terms of our solution, Iex = −I2� . Hence,
RTh = −
Vex
56
=
�.
I2�
11
3-6 THÉVENIN AND NORTON EQUIVALENT CIRCUITS
149
Table 3-1: Properties of Thévenin/Norton analysis techniques.
To Determine
Method
Can Circuit Contain Dependent Sources?
Relationship
υTh = υoc
υTh = RTh isc
υTh
υTh
Open-circuit υ
Short-circuit i (if RTh is known)
Yes
Yes
RTh
RTh
RTh
Open/short
Equivalent R
External source
Yes
No
Yes
RTh = υoc /isc
RTh = Req
RTh = υex / iex
iN = υTh /RTh ; RN = RTh
and
'
Thevenin and Norton Equivalency
RTh
'
Thevenin
equivalent
circuit
υTh
+
_
iN
Concept Question 3-12: Why is the Thévenin-equivalent
circuit method such a powerful tool when analyzing a
complex circuit, such as that of a cell phone? (See
)
a
3-6.8 Analyzing Cascaded Systems
b
Let us go back to the simple household circuit of Fig. 3-19(b)
and redraw it in Fig. 3-29(a) as a series combination of blocks:
the voltage source consisting of Vs and associated resistance Rs ,
the fan, the lamp, and the DVM. We intend to use the circuit to
demonstrate how the Thévenin technique is used in practice
to analyze much more complicated circuits. Our goal is to
determine the voltage measured by the DVM.
RN
Figure 3-28: Equivalence between Thévenin and Norton
equivalent circuits, consistent with the source transformation
method of Section 2-3.4.
Blocks 1 and 2
3-6.7 Norton’s Theorem
A corollary of Thévenin’s theorem, Norton’s theorem states
that a linear circuit can be represented at its output terminals
by an equivalent circuit composed of a parallel combination of
a current source iN and a resistor RN . Application of source
transformation (Section 2-3.4) on the Thévenin equivalent
circuit shown in Fig. 3-28 leads to the straightforward
conclusion that iN and RN of the Norton equivalent circuit are
given by
iN =
(3.37b)
Table 3-1 provides a summary of the various methods available
for finding the elements of the Thévenin and Norton equivalent
circuits.
b
Norton equivalent
circuit
iN = υTh /RTh
RN = RTh
RN = RTh .
a
υTh
RTh
(3.37a)
We start with the combination of the first two blocks, namely
the source and the fan, after disconnecting everything to the
right of terminals (c, d) from the circuit. The Thévenin voltage
between terminals (c, d) in Fig. 3-29(b) is labeled Vcd and is
given by
Vcd =
Vs Rfan
110 × 100
=
= 100 V.
Rs + Rfan
10 + 100
The Thévenin resistance of the circuit at terminals (c, d) in
Fig. 3-29(b) is the parallel combination of Rs and Rfan :
Rcd = Rs � Rfan = 10 � 100 = 9.09 �.
150
CHAPTER 3 ANALYSIS TECHNIQUES
a
Vs
+
_
Rs = 10 Ω
110 V
c
Rfan
b
Source block
e
Fan block
+
Rlamp 100 Ω
100 Ω
d
f
Lamp block
_
DVM block
(a) Total circuit
a
Vs
+
_
Rs = 10 Ω
110 V
Rfan
b
Source block
Rcd = 9.09 Ω c
c
+
_
100 Ω Vcd
Fan block
Vcd
+
_
100 V
d
d
(b) Thévenin equivalent of source/fan combination
9.09 Ω
Vcd
+
_
100 V
Re f = 8.33 Ω e
e
c
Rlamp 100 Ω
d
+
_
Ve f
+
_
91.67 V
f
f
Thévenin equivalent
of source/fan combination
Ve f
Thévenin equivalent of
source/fan/lamp combination
(c) Thévenin equivalent of first three blocks
RTh = 8.33 Ω e
+
VTh = 91.67 V _
+
_
VDVM
DVM
2 MΩ
f
(d) Final equivalent circuit
Figure 3-29: Repeated application of Thévenin-equivalent circuit technique.
Blocks 1, 2, and 3
Blocks 1–4
Next, we repeat the Thévenin technique at terminals (e, f ) by
combining the lamp with the two earlier blocks. The Thévenin
voltage at terminals (e, f ) in Fig. 3-29(c) is labeled Vef and is
given by
100 × 100
Vef =
= 91.67 V,
9.09 + 100
and the Thévenin resistance, Ref , is
In part (d) of Fig. 3-29, we show the Thévenin equivalent of
all blocks to the left of the DVM connected to the DVM at
terminals (e, f ). Voltage division leads to
Ref = 100 � 9.09 = 8.33 �.
This is the same answer we would have obtained had we
analyzed the entire circuit at once using KCL/KVL. For
VDVM =
91.67 × 2 × 106
≈ 91.67 V.
8.33 + 2 × 106
3-7
COMPARISON OF ANALYSIS METHODS
151
this simple circuit, the multiple application of the Thévenin
equivalent technique is obviously unwarranted, but when
dealing with complex circuits comprising multiple subsections,
the Thévenin technique is not only desirable, but also the only
practical way to analyze and design circuits.
Concept Question 3-13: Section 3-6 offers three
different approaches for finding RTh. Which ones apply
to circuits containing dependent sources? (See
)
Exercise 3-13: Find the Norton equivalent at terminals
(a, b) of the circuit in Fig. E3.13.
3I
a
I
2A
3Ω
10 Ω
b
Figure E3.13
Answer:
3-8 Maximum Power Transfer
Suppose an active linear circuit is connected to a passive linear
circuit, as depicted by Fig. 3-30(a). An active circuit contains
at least one independent source, whereas a passive circuit may
contain dependent sources, but no independent sources. For
convenience, we shall refer to them as the source and load
circuits, respectively. For certain applications, it is desirable
to maximize the magnitude of the current iL that flows from
the source circuit to the load circuit, while other applications
may call for maximizing the voltage υL at the input to the load
circuit, or maximizing the power pL that gets transferred from
the source to the load. Given a specified source circuit, how,
then, does one approach the design of the load circuit so as to
achieve these different goals?
The solution to the problem posed by our question is
facilitated by the equivalence offered by Thévenin’s theorem.
We demonstrated in the preceding section that any active,
linear circuit always can be represented by an equivalent circuit
composed of a Thévenin voltage υTh connected in series with a
Thévenin resistance RTh . In the case of the passive load circuit,
its equivalent circuit consists of only a Thévenin resistance.
To avoid confusion between the two circuits, we denote υTh
and RTh of the source circuit as υs and Rs , and we denote RTh
of the load circuit as RL , as shown in Fig. 3-30(b). The current iL
a
0.5 A
a
4Ω
(See
3-7
)
Source circuit
Passive
circuit
b
Load circuit
(a) Source and load circuits
Comparison of Analysis Methods
In this and the preceding chapter, we presented several different
methods for analyzing electric circuits. Which method is
best? Which one is the easiest to implement and why? The
answer depends on the circuit configuration and the intended
application. Table 3-2 provides a summary of the key attributes
of the three circuit-analysis laws (Ohm’s law, KCL, and KVL)
and the analysis methods covered thus far. If the circuit contains
no dependent sources and the goal is to determine the currents
and voltages in the circuit, the two by-inspection methods
provide a straightforward solution approach. When dependent
sources are present, the node voltage and mesh current methods
are always applicable. For cascaded circuits, the Thévenin (and
Norton) equivalent-circuit technique is invariably the preferred
choice.
+
υ
−L
Active
circuit
b
iL
Rs
υs
+
_
a
iL
+
υL
−
RL
b
(b) Replacing source and load circuits with
their Thévenin equivalents
Figure 3-30: To analyze the transfer of voltage, current, and
power from the source circuit to the load circuit, we first replace
them with their Thévenin equivalents.
152
CHAPTER 3 ANALYSIS TECHNIQUES
Table 3-2: Summary of circuit analysis methods.
Method
Common Use
Ohm’s law
Relates V , I , R. Used with all other methods to convert V ⇔ I .
R, G in series
and �
Combine to simplify circuits. R in series adds, and is most often used. G in � adds, so may be
used when much of the circuit is in parallel.
Y-� or �-T
Convert resistive networks that are not in series or in � into forms that can often be combined in
series or in �. Also simplifies analysis of bridge circuits.
Voltage/current
dividers
Common circuit configurations used for many applications, as well as handy analysis tools.
Dividers can also be used as combiners when used “backwards.”
Kirchhoff’s laws
(KVL/KCL)
Solve for branch currents. Often used to derive other methods.
Node-voltage
method
Solves for node voltages. Probably the most commonly used method because (1) node voltages
are easy to measure, and (2) there are usually fewer nodes than branches and therefore fewer
unknowns (smaller matrix) than KVL/KCL.
Mesh-current
method
Solves for mesh currents. Fewer unknowns than KVL/KCL, approximately the same number
of unknowns as node voltage method. Less commonly used, because mesh currents seem less
intuitive, but useful when combining additional blocks in cascade.
Node-voltage
by-inspection
method
Quick, simplified way of analyzing circuits. Very commonly used for quick analysis in practice.
Limited to circuits containing only independent current sources.
Mesh-current
by-inspection
method
Quick, simplified way of analyzing circuits. Very commonly used for quick analysis in practice.
Limited to circuits containing only independent voltage sources.
Superposition
Simplifies circuits with multiple sources. Commonly used for both calculation and measurement.
Source transformation
Simplifies circuits with multiple sources. Commonly used for both calculation/design and
measurement/test applications.
Thévenin
and Norton
equivalents
Very often used to simplify circuits in both calculation and measurement applications. Also used to
analyze cascaded systems. Thévenin is the more commonly used form, but Norton is often handy
for analyzing parallel circuits. Source transformation allows easy conversion between Thévenin
and Norton.
Input/output
resistance
(Rin /Rout )
Commonly used to evaluate when cascaded circuits can be analyzed individually or when full
circuit analysis or a buffer is needed.
and associated voltage υL are given by Ohm’s law as
iL =
υs
,
Rs + R L
and by voltage division:
υL =
υ s RL
.
Rs + R L
3-8
MAXIMUM POWER TRANSFER
153
This equality is referred to as matching the source to
the load. pL
Maximum power
when RL = Rs
pmax
The proof of Eq. (3.42) is given in Example 3-14.
Use of RL = Rs in Eq. (3.41) leads to
RL
0 Rs
pmax =
Figure 3-31: Variation of power pL dissipated in the load RL ,
as a function of RL .
υs2 RL
υ2
= s ,
2
(RL + RL )
4RL
(3.43)
which represents 50 percent of the total power generated by the
equivalent input source υs . The other 50 percent is dissipated
in Rs .
If the source-circuit parameters υs and Rs are fixed and the
intent is to transfer maximum current to the load circuit, then RL
should be zero (short circuit). For a real circuit with a functional
purpose, the circuit will need to receive some energy in order to
function. Hence, RL cannot be exactly zero, but it can be made
to be very small in comparison with Rs . Thus, to maximize
current transfer, the load circuit should be designed such that
RL � Rs
(maximum current transfer).
(3.39)
Based on Eq. (3.38), the opposite is true for maximum voltage
transfer, namely
RL � Rs
(maximum voltage transfer).
(3.40)
The situation for power transfer calls for maximizing the
product of iL and υL ,
υs2 RL
pL = iL υL =
.
(Rs + RL )2
(3.41)
The expression given by Eq. (3.41) is a nonlinear function of RL .
The power pL goes to zero as RL approaches either end of its
range (0 and ∞), as illustrated by the plot in Fig. 3-31, and it
is at a maximum when
RL = Rs
(maximum power transfer).
(3.42)
Example 3-14: Maximum Power Transfer
Prove that pL , as given by Eq. (3.41), is at a maximum when
RL = Rs .
Solution: To find the value of RL at which the expression
for pL is at a maximum, we differentiate the expression with
respect to RL and then set the result equal to zero. That is,
dpL
d
=
dRL
dRL
= υs2
υs2 RL
(Rs + RL )2
2RL
1
−
= 0.
(Rs + RL )2
(Rs + RL )3
A few simple steps of algebra lead to
RL = Rs .
Concept Question 3-14: Under what conditions is the
power transferred from a power source to a load resistor
a maximum? When is the voltage a maximum? When is
the current a maximum? (See
)
Concept Question 3-15: Of the power generated by an
input circuit, what is the maximum fraction that can be
transferred to an external load? (See
)
154
TECHNOLOGY BRIEF 8: DIGITAL AND ANALOG
Technology Brief 8
Digital and Analog
Most of electrical engineering depends on the manipulation of voltages and currents. The real world interfaces
with our circuits through sensors (such as the resistive
sensors in Technology Brief 4), and we interface back to
the real world through user interfaces (such as turning
on an LED in Technology Brief 5). In between these
transducers are circuits! In the physical world, most
signals of interest are analog signals; that is, they vary
continuously with time and can take on any value between
their possible minimum and maximum values. When
electrical sensors transduce these signals into changes in
voltage or current, the electrical signals produced are thus
also analog. Analog electrical signals can be transduced
from sound (using a microphone), mechanical vibration
(using a piezoelectric vibration sensor), light or images
(using sensor arrays in a camera), temperature (using a
thermistor), and many other sources.
All of the circuits we have examined so far are analog
circuits. The voltages (and currents) present in these
circuits can take on any value between a maximum and a
minimum (typically set by the power source). By contrast,
a digital signal can only assume a few discrete values.
Most digital systems are binary, which is to say they can
only assume two such values, usually called “0” and “1”
(alternatively, “on” and “off”). The exact voltages which
represent the two logic states depend on the type of digital
logic used; for example, many modern digital processors
represent “0” with 0 V and “1” with 1.2 V.
Because any single digital line can only assume two
values, many such lines can be used to represent a
range of numbers. Consider, for example, Table TT8-1:
three digital lines (or bits) are used to encode 8 different
numbers within a given range. In the same way that
base-10 numbers can encode 10N different values with
N discrete numbers in the range 0–9 (e.g., two base
10 numbers can encode 0–99), 2N different values can
be encoded by N binary bits. Eight such bits make
up a byte (e.g., the value 01101111 is a byte). Two
bytes (16 bits) are a word. Standard encoding schemes
exist for representing commonly used data. For example,
letters, carriage returns, and other typographics can be
represented using the 7-bit American Standard Code for
Information Interchange (ASCII, pronounced “ask-ee”).
Table TT8-2 gives these codes for capital letters. Many
such standards exist (ranging from the data encoding
format for, say, Blu-ray data to data transmission across
ATM networks).
When representing floating point numbers (such as
−2.3), the computer must encode the sign (−1), the
number and the exponent. The precision to which a
number can be represented depends on how many bits
are used. Four words (32 bits) are considered single
precision, and 64 bits are double precision. The first bit
is the sign (1 = negative), and the next 8 bits are the
exponent. The remaining 23 bits (single precision) or 55
bits (double precision) are used to represent the number.
This means that the floating point representation of the
number has a certain predictable round-off error, and
when the computer adds, subtracts, multiplies, etc., this
error is also present in the calculations. Usually it is too
small to be noticed, but in some cases (2 − 1.9999 . . . �= 0)
it can cause unexpected problems in computer programs.
We commonly convert back and forth between analog
and digital voltages. Almost all analog signals are
converted to digital signals for storage (e.g., images),
wireless transmission (your voice in a cell phone call), and
performing mathematical functions (in your calculator).
This is done with an analog-to-digital converter (ADC).
Sometimes the digital signal must be converted back to
Table TT8-1: Three-bit counting scheme.
Bits
000
001
010
011
100
101
110
111
Number
=
=
=
=
=
=
=
=
0
1
2
3
4
5
6
7
TECHNOLOGY BRIEF 8: DIGITAL AND ANALOG
155
Table TT8-2: ASCII characters for capital letters.
0100 0001 = A
0100 0010 = B
0100 0011 = C
0100 0100 = D
0100 0101 = E
0100 0110 = F
0100 0111 = G
0100 1000 = H
0100 1001 = I
0100 1010 = J
0100 1011 = K
0100 1100 = L
0100 1101 = M
analog (so your friend can hear your voice on his cell
phone). This is done with a digital-to-analog converter
(DAC).
The analog voltage in Fig. TF8-1 can be converted to
digital using an ADC to sample it, find the closest step that
matches the signal, and convert the value of that step to
a digital value. The number of steps (controlled by the
number of bits in the ADC) controls the precision of the
ADC. Figure TF8-1 shows a very coarse 3-bit ADC that
can represent 8 levels. The difference between the actual
analog signal and the level that can be represented with
the ADC is called the quantization error.
Analog
0100 1110 = N
0101 1111 = O
0101 0000 = P
0101 0001 = Q
0101 0010 = R
0101 0011 = S
0101 0100 = T
0101 0101 = U
0101 0110 = V
0101 0111 = W
0101 1000 = X
0101 1001 = Y
0101 1010 = Z
One of the strengths of digital representations of data is
that manipulations of this data (mathematical operations,
storage, etc.) can be carried out efficiently with switching
networks.These are circuits of components wherein each
component can only produce one of two voltage values.
Transistors, in particular MOSFETS (see Chapter 4), are
particularly well-suited to act as switches in these circuits;
modern integrated circuits contain on the order of a billion
MOSFETS arranged into circuits to manipulate digital
data. Importantly, most modern integrated circuits contain
both analog and digital circuits and are known as mixedsignal circuits (see Section 13-9). Using built-in ADC and
Digital
10 V = 111
8.0 V = 110
6.8 V = 101
5.7 V = 100
4.3 V = 011
2.8 V = 010
1.4 V = 001
0 V = 000
Time
Figure TF8-1: Three-bit digital representation of a continuous signal.
156
TECHNOLOGY BRIEF 8: DIGITAL AND ANALOG
A
AND
B
A
OR
B
Input Output
A B A and B
0 0
0
0 1
0
1 0
0
1 1
1
Input Output
A B A or B
0 0
0
0 1
1
1 0
1
1 1
1
NOT
Input Output
A
Not A
0
1
1
0
A
Input Output
A B A xor B
0 0
0
0 1
1
1 0
1
1 1
0
A
XOR
B
Figure TF8-2: Logic gates.
DAC circuits, data is moved from the analog to the digital
domain within a single chip.
But sometimes we use only a few gates for simple
control operations or prototyping. Each gate takes two
digital signals (which can be either a 0 or 1) as input, and
outputs a different digital signal (based on these inputs).
Figure TF8-2 shows a few of these common logic gates.
An AND gate outputs a 1 if both input A AND input B
are 1. An OR gate outputs a 1 if either input A OR input B
are 1. A NOT gate outputs a 1 if input A is NOT a 1; i.e.,
it inverts the input. An exclusive OR gate, called an XOR
gate, outputs a 1 if one and only one of input A OR input B
is 1.
One way to prototype with logic gates is to use a
chip that plugs into your protoboard (see Appendix F).
Figure TF8-3 shows an example of a quad AND package.
Each pin on the chip is numbered 1–14 and plugs into
a separate node (row) on the protoboard. Logic gates
are active devices, which means they require an external
power supply, so Vcc is plugged into pin 14, and GND into
pin 7.
Interfacing from the real world to a computer most
often involves an analog sensor (such as a thermistor for
measuring temperature), a level-shifter (amplifier or deamplifier or comparator that converts the analog output
14
Vcc
13
12
11
10
9
8
GND
1
2
3
4
5
6
7
7408 Quad 2 Input AND
Figure TF8-3: Quad AND package.
voltage to digital levels), and then a logic circuit to act
upon the output (turn a switch to a heater on or off, for
instance). When interfacing back to the real world, the
digital signal may be applied in digital form, or may need to
be converted back to an analog signal (to drive speakers
for voice and music, or precision control of an engine air
intake, for example).
3-8
MAXIMUM POWER TRANSFER
157
Exercise 3-14: The bridge circuit of Fig. E3.14 is
connected to a load RL between terminals (a, b). Choose
RL such that maximum power is delivered to RL . If
R = 3 �, how much power is delivered to RL ?
24 V
R
+
_
a RL b
5Ω
16 V
2Ω
+
_
a
2R
b
2Ω
V1
R
5Ω
Figure E3.14
Answer: RL = 4R/3 = 4 �, pmax = 4 W. (See
RL
4Ω
(a) Original circuit
2R
)
16 V
2Ω
+
_
Va
I1
Example 3-15: Bridge Circuit
a
4Ω
b
+ Voc _
4Ω
2Ω
Vb
I2
(b) Open-circuit voltage
5Ω
In the bridge circuit shown in Fig. 3-32(a), choose RL so that
the power delivered to it is a maximum. How much power will
that be?
Solution: After temporarily removing RL from the circuit,
we proceed to find the Thévenin equivalent of the circuit at
terminals (a, b).
Open-Circuit Voltage: In the circuit shown in Fig. 3-32(b), we
designate the bottom node of the bridge as ground and the top
node as voltage V1 . Application of KCL at node V1 gives
V1
V1
V1 − 16
+
+
= 0,
5
2+4 2+4
which leads to
V1 = 6 V.
Voltage division gives
16 V
+
_
I2
2Ω
a
I1
Isc
I3
4Ω
4Ω
b
2Ω
(c) Short-circuit current
RL
a
b
+_
2.88 Ω
2V
(d) Thévenin equivalent circuit
Figure 3-32: Evolution of the circuit of Example 3-15.
�
�
4
V1 = 4 V,
2+4
�
�
2
Vb =
V1 = 2 V.
2+4
Va =
4Ω
Hence,
VTh = Voc = Va − Vb = 4 − 2 = 2 V.
Short-Circuit Current: In the circuit configuration shown
in Fig. 3-32(c), terminals (a, b) are connected by a short
circuit. Application of the mesh-analysis by-inspection method
(Section 3-4.2) leads to the matrix equation
⎡
⎤⎡ ⎤ ⎡ ⎤
16
11 −2 −4
I1
⎣−2 6 0 ⎦ ⎣I2 ⎦ = ⎣ 0 ⎦ .
0
I3
−4 0 6
158
CHAPTER 3 ANALYSIS TECHNIQUES
Matrix inversion by MATLAB or MathScript yields
96
I1 =
A,
46
32
I2 =
A,
46
pnp
32
64 32
= 0.7 A,
Isc = I3 − I2 =
−
=
46 46
46
RTh
B
E
The Thévenin equivalent circuit is shown in Fig. 3-32(d). Power
transfer to RL is a maximum when
npn
+
IC
+ IB
VCE
+
VBE IE
_
_
E
Schematic symbol
C
_
VBC
n
B
With the exception of the SPDT switch, all of the elements
we have discussed thus far have been two-terminal devices,
each characterized by a single i–υ relationship. These include
resistors, voltage and current sources, as well as the pn-junction
diode of Section 2-6.2. The potentiometer (Fig. 2-3(b)) may
appear to be like a three-terminal device, but in reality it is no
more than two resistors—each with its own pair of terminals.
This section introduces a true three-terminal device, the bipolar
junction transistor (BJT).
The BJT is a three-layer semiconductor structure commonly
made of silicon. Other compounds sometimes are used
for special-purpose applications (such as for operation at
microwave and optical frequencies), but for the present, we
will limit our examination to silicon-based transistors and their
uses in dc circuits. The three terminals of a BJT are called the
emitter, collector, and base, and each is made of either a p-type
(silicon with positive charge carriers) or n-type (silicon with
negative charge carriers) semiconductor material. The emitter
and collector are made of the same material—either p-type or
n-type—and the base is made of the other material. Thus, the
BJT can be constructed to have either a pnp configuration or
an npn configuration, as shown in the diagrams of Fig. 3-33.
The geometries and fabrication details of real transistors are
VBC
C
(a) pnp transistor
υ2
(2)2
= s =
= 0.35 W.
4RL
4 × 2.88
3-9 Application Note: Bipolar Junction
Transistor (BJT)
_
Conducting
connector
Configuration
RL = RTh = 2.88 ,
pmax
B
n
p
Voc
2
=
= 2.88 .
=
Isc
0.7
and according to Eq. (3.45),
Conducting
connector
p
Hence, the short-circuit current is
and
C
64
I3 =
A.
46
p
B
n
C
+
IC
+ IB
VCE
+
VBE IE
_
_
E
E
Configuration
Schematic symbol
(b) npn transistor
Figure 3-33: Configurations and symbols for (a) pnp and
(b) npn transistors.
far more elaborate than the simple diagrams suggest, but the
basic idea that the BJT consists of three alternating layers of
p- and n-type material is quite sufficient from the standpoint of
its external electrical behavior.
Figure 3-33 also shows schematic symbols used for the pnp
and npn transistors. The center terminal is always the base. One
of the three leads includes an arrow. The lead containing the
arrow identifies the emitter terminal and whether the transistor
is a pnp or npn. The arrow always points towards an n-type
material, so in the pnp transistor, the arrow points towards the
base, whereas in an npn transistor, the arrow points away from
the base.
3-9 APPLICATION NOTE: BIPOLAR JUNCTION TRANSISTOR (BJT)
B
IB
IC
Example 3-16: BJT Amplifier Circuit
C
Apply the equivalent-circuit model with VBE ≈ 0.7 V and
β = 200 to determine IB , IC , and VCE in the circuit
of Fig. 3-35(a). Assume that VBB = 2 V, VCC = 10 V,
RB = 26 k, and RC = 200 .
βIB
VBE
159
IE
Solution: Upon replacing the npn transistor with its
equivalent circuit, we end up with the circuit shown in
Fig. 3-35(b). In the left-hand loop, KVL gives
E
Figure 3-34: dc equivalent model for the npn transistor. The
equivalent dc source VBE ≈ 0.7 V.
The directions of the terminal currents shown in Fig. 3-33
are defined such that the base and collector currents IB and IC ,
respectively, flow into the transistor, and the emitter current IE
flows out of it. KCL requires that
−VBB + RB IB + VBE = 0,
which leads to
IB =
VBB − VBE
2 − 0.7
=
= 5 × 10−5 A = 50 μA.
RB
26 × 103
Given that β = 200,
IC = βIB = 200 × 50 × 10−6 = 10 mA
and
IE = IB + IC .
(3.44)
Under normal operating conditions, IE has the largest
magnitude of the three currents, and IB is much smaller than
either IC or IE . The transistor can operate under both dc
and ac conditions, but we will limit our present discussion
to dc circuits. For simplicity, we will consider only the npn
common-emitter configuration. Accordingly, we can describe
the operation of the npn transistor by the dc equivalent model
shown in Fig. 3-34. The circuit contains a constant dc voltage
source VBE and a dependent current-controlled current source
that relates IC to IB by
IC = βIB ,
VCE = VCC − IC RC = 10 − 10−2 × 200 = 8 V,
which is a 4-times amplification of source VBB .
C
RB
+
IC
RC
VBB
VCC
VCE
_
E
(a) Transistor circuit
(3.45)
where β is a transistor parameter called the common-emitter
current gain. This is a perfect example of how a nonlinear
element can be modeled in terms of a linear circuit containing
a dependent source. Under normal operation, VBE ≈ 0.7 V,
and β may assume values in the range between 30 and 1000,
depending on its specific design configuration. The VBE source
in Fig. 3-34 models a built-in voltage drop that arises within
the transistor at the interface of p-type and n-type regions; it
is not a true independent source as it can never supply power.
Transistors never supply power, they modify the flow of power
through them in interesting and useful ways. To operate in its
active mode, the transistor requires that certain dc voltages be
applied at its base and collector terminals. We shall refer to
these voltages as VBB and VCC , respectively.
B IB
RB
B IB
C
+
IC
VBB
VBE
βIB
RC
VCC
E
(b) Equivalent circuit
Figure 3-35: Circuit for Example 3-16.
VCE
_
160
CHAPTER 3 ANALYSIS TECHNIQUES
Example 3-17: Digital-Inverter Circuit
+
RB = 20 kΩ
Digital logic deals with two states, “0” and “1” (or equivalently
“low” and “high”). A digital-inverter circuit provides one of the
logic operations performed by a computer processor, namely
to invert the state of an input bit from low to high or from
high to low. Demonstrate that the transistor circuit shown in
Fig. 3-36 functions as a digital inverter by plotting its output
voltage Vout versus the input voltage Vin . A bit is assumed to
be in state 0 (low) if its voltage is between 0 and 0.5 V and
in state 1 (high) if its voltage is greater than 4 V. Assume that
the equivalent model given by Fig. 3-34 is applicable (with β
= 200) with the following qualifications: neither IB nor Vout
can have negative values, so if the analysis using the
equivalent-circuit model generates a negative value for either
one of them, it should be replaced with zero.
Solution: The equivalent circuit shown in Fig. 3-36(b)
provides the following expressions:
Vin − 0.7
,
20k
IC = βIB = 200IB ,
IB =
(3.46)
Vin
(a)
RB = 20 kΩ IB
IC
+
+
1 kΩ
Vin
Vout
200IB
0.7 V
5V
_
(b)
_
Equivalent circuit
Vout (V)
(3.47)
State
I
II
5
Input Output
Low
High
High
Low
3
(3.48)
2
Combining the three equations leads to
βRC
= VCC −
(Vin −0.7) = 12−10Vin
RB
_
Inverter circuit
4
Vout = VCC − IC RC .
Vout
VCC = 5 V
_
and
Vout
RC = 1 kΩ
+
1
(V). (3.49)
Since Vout is linearly related to Vin , the plot would be a straight
line, as shown in Fig. 3-36(c), but we also have to incorporate
the provisions that IB cannot be negative (which occurs when
Vin < 0.7 V), and Vout cannot be negative (which occurs when
Vin = 1.2 V). The resultant transfer function clearly satisfies
the digital inverter requirements:
0
(c)
II
0 0.7 1.2 2
I
3
4
5
Vin (V)
Vout versus Vin
Figure 3-36: Circuit for Example 3-17.
Input: Low
Output: High
If Vin < 0.5 V
Vout = 5 V,
related to the base current in a BJT? (See
Input: High
Output: Low
If Vin > 1.2 V
Vout = 0.
are its input and output voltages related to one another?
(See
)
Concept Question 3-16: How is the collector current
)
Concept Question 3-17: What is a digital inverter? How
NODAL ANALYSIS WITH MULTISIM
V(1)
+
_
161
100 Ω
2V
V(3)
50 Ω
50 Ω
+
V1 = 1 V
V(4)
_
+
3-10
75 Ω
V(5)
0.1Vx
Vx
_
V(2)
(a) Six-node circuit
(b) Multisim circuit and solution
Figure 3-37: Circuit analysis with Multisim.
Exercise 3-15: Determine IB , Vout1 , and Vout2 in the
transistor circuit of Fig. E3.15, given that VBE = 0.7 V
and β = 200.
5 kΩ
+
IB
200 Ω
8V
2V
100 Ω
+
_
Vout1
Figure E3.15
Answer: IB = 51.79 μA, Vout1 = 1.04 V,
Vout2 = 5.93 V. (See
)
Vout2
_
3-10 Nodal Analysis with Multisim
Multisim is a particularly useful tool for analyzing circuits
with many nodes. Consider the six-node circuit shown in
Fig. 3-37(a), in which the voltages and currents are designated
in accordance with the Multisim notation system. In Multisim,
V1 refers to the voltage of source 1 and V(1) refers to the voltage
at node 1. Application of nodal analysis would generate five
equations with five unknowns, V(1) to V(5), whose solution
would require the use of matrix algebra or several steps of
elimination of variables. [For this simple two-loop circuit,
mesh analysis is much easier to apply, as it involves only two
mesh equations and one auxiliary equation for the dependent
current source, but the objective of the present section is to
illustrate how Multisim can be used for circuits involving a
large number of nodes.] When drawn in Multisim, the circuit
appears in the form shown in Fig. 3-37(b). Application of either
Measurement Probes or DC Operating Point Analysis
generates the values of V(1) to V(5) listed in the inset of
Fig. 3-37(b).
162
CHAPTER 3 ANALYSIS TECHNIQUES
1V
_
100 Ω
+
+
+
2V _
50 Ω Vx
_
50 Ω
75 Ω
2
SPDT 1
3 kΩ
1A
I = 0.1Vx
(a) Circuit with SPDT switch
(b) Multisim configuration
Figure 3-38: (a) Circuit with a switch, and (b) its Multisim representation.
For circuits containing more than four or five nodes,
analyzing the circuit by hand becomes unwieldy. Moreover,
some circuits may contain time-varying sources or elements.
Consider, for example, the circuit in Fig. 3-38(a), which is a
replica of the circuit in Fig. 3-37 except for the addition of an
SPDT switch. [In Multisim, the switch can be toggled between
positions 1 and 2 using the space bar on your computer.] When
connected to position 1, the state of the circuit is identical to that
in Fig. 3-37, but when the SPDT switch is moved to position 2,
the new circuit configuration includes two additional elements
and one extra node.
The circuit drawn in Multisim is shown in Fig. 3-38(b).
The SPDT is available in the Select a Component window
under the Basic group in the SWITCH family. Measurement
Probes were added to nodes 4, 5, and 6. Using the Interactive
Simulation feature of Multisim, the circuit can be analyzed in
each of its two states by pressing F5 (or the
button or
switch) to start the simulation, and then toggling
toggle
the switch by pressing the space bar. This live-action switching
capability is why this particular tool is known as Interactive
Simulation.
In the Multisim section of Chapter 2, we examined how
the DC Operating Point Analysis tool can be used to
determine differences between node voltages. In addition to
basic subtraction, there are many operators that you can apply
to variables (or combinations of variables) to obtain the desired
3-10
NODAL ANALYSIS WITH MULTISIM
quantities. [See the Multisim Tutorial on the book website
http://c3.eecs.umich.edu for a list of the basic operators].
We will now use variable manipulation in the DC Operating
Point Analysis to calculate the power dissipated or supplied in
each component in the circuit in Fig. 3-37(a). To calculate the
power for each component, we need to know both the current
through and voltage across each component. However, for
many devices, Multisim can calculate the power automatically.
Open up the DC Operating Point Analysis window. Notice
that for the voltage sources and resistors, Multisim allows
you to select to solve for the power, using the P() notation.
You can also ask Multisim to solve for expressions which
use the available variables. In the output tab enter equations
via the Add Expression. . . button. We’ll enter an expression
for the power across the controlled source this way using
the expression V(5)*I(BI2). Click OK after entering any
expressions. [Remember proper sign notation and current
direction.] The equations for power should be
Source V1:
Source V2:
Source I1:
Resistor R1:
Resistor R2:
Resistor R3:
Resistor R4:
(V(4)-V(3))*I(v1)
(V(1)-V(2))*I(v2)
-V(5)*I(v1)
(V(3)-V(1))*I(v2)
V(3)*I(v3)
(V(5)-V(4))*I(v1)
V(2)*I(v2)
163
(a) Multisim circuit of Fig. 3-32(a) ready for
power calculations
(b) Selected variables for analysis visible in
DC Operating Point Analysis window
Note: Remember that these variable names apply to the
circuit shown in Fig. 3-39(a). If your circuit has a different
numbering for nodes or voltage sources, your equations will
differ in number accordingly.
Once these equations are entered, the Selected Variables for
Analysis field should resemble that in Fig. 3-39(b). To obtain
the values, press the Simulate button. The results should agree
with those shown in Fig. 3-39(c).
Knowing how to write equations such as these in Multisim is
very important, because many other Analyses which you will
encounter later in the book utilize identical syntax to that used
for the DC Operating Point Analysis.
Concept Question 3-18: What is the difference between
the Measurement Probe tool and the DC Operating
Point Analysis? (See
)
(c) Output of simulations (remember that all values
are in watts)
Figure 3-39: Multisim procedure for calculating power
Exercise 3-16: Use Multisim to calculate the voltage at
node 3 in Fig. 3-38(b) when the SPDT switch is connected
to position 2.
Answer: (See
)
consumed (or generated) by the seven elements in the circuit
of Fig. 3-37(a).
164
CHAPTER 3 ANALYSIS TECHNIQUES
Summary
Concepts
• After designating one of the extraordinary nodes in a
circuit as reference (ground), KCL at the remaining
extraordinary nodes provides the requisite number of
equations for determining the voltages at those nodes.
• Two extraordinary nodes connected by a solitary voltage
source constitute a supernode. The two nodes can be
treated as a single node, augmented by an auxiliary
relation specifying the voltage difference between them.
• By assigning a mesh current to each independent loop,
application of KVL leads to the requisite number of
equations for determining the unknown mesh currents.
• Two adjoining loops sharing a branch containing a
solitary current source constitute a supermesh. The two
loops can be treated as a single loop, augmented by an
auxiliary relation specifying the relationship between
their mesh currents..
• A circuit containing no dependent sources and only
current sources can be analyzed by the node-voltage
by-inspection method.
Mathematical and Physical Models
Node-voltage
method
of all current leaving a node = 0
[current entering a node is (−)]
Mesh-current
method
of all voltages around a loop = 0
[passive sign convention applied to
mesh currents in clockwise direction]
Nodal analysis by inspection
Important Terms
active
additivity property
artificial sources
base
bipolar junction
transistor (BJT)
block
• Similarly, a circuit containing no dependent sources and
only voltage sources can be analyzed the mesh-current
by-inspection method.
• Thévenin’s (Norton’s) theorem states that a linear circuit
can be represented by an equivalent circuit composed of
a voltage source (current source) in series (in parallel)
with a resistor.
• Thévenin and Norton equivalent circuits are powerful
tools for analyzing and designing complex, cascaded
circuits.
• The power transferred by an input circuit to an external
load is at a maximum when the load resistance is equal to
the Thévenin resistance of the input circuit. The fraction
of the power thus transferred is 50 percent of the power
supplied by the generator.
• Multisim is a useful tool for simulating the behavior of a
circuit and examining its sensitivity to specific variables
of interest.
Mesh analysis by inspection
RI = Vt
Thévenin equivalent circuit
υTh = υoc
RTh = υoc / isc
Norton equivalent circuit
iN = isc
RN = RTh
Maximum power transfer
RL = Rs
pmax =
GV = It
υs2
4RL
Provide definitions or explain the meaning of the following terms:
bridge circuit
by-inspection method
cell-phone circuit
collector
common collector
amplifier
common-emitter amplifier
common-emitter
current gain
conductance matrix
current mirror
decoupled
digital inverter
emitter
PROBLEMS
165
Important Terms (continued)
extraordinary node
homogeneity
impedance
independent
linear circuit
linear elements
load circuit
load impedance
loading
matching
maximum power transfer
mesh
mesh analysis by inspection
mesh current
nodal analysis by inspection
node-voltage method
Norton’s theorem
npn configuration
passive
pnp configuration
quasi-supernode
resistance matrix
scaling
source circuit
PROBLEMS
*3.3 Use nodal analysis to determine the current Ix and amount
of power supplied by the voltage source in the circuit of
Fig. P3.3.
Section 3-2: Node-Voltage Method
*3.1 Apply nodal analysis to find the node voltage V in the
circuit of Fig. P3.1. Use the information to determine the
current I .
9A
V
16 V
+
_
I
source superposition
source vector
supermesh
supernode
superposition principle
Thévenin’s theorem
Thévenin’s voltage
Thévenin’s resistance
uncoupled
voltage vector
2Ω
8Ω
+
_ 40 V
4Ω
Figure P3.3: Circuit for Problem 3.3.
2Ω
2Ω
4Ω
3Ω
+
_ 12 V
3.4 For the circuit in Fig. P3.4:
(a) Apply nodal analysis to find node voltages V1 and V2 .
(b) Determine the voltage VR and current I .
V1
1Ω
Figure P3.1: Circuit for Problem 3.1.
16 V
+
_
3.2 Apply nodal analysis to determine Vx in the circuit of
Fig. P3.2.
2Ω
2Ω
3A
1Ω
+
4 Ω Vx
_
Figure P3.2: Circuit for Problem 3.2.
∗
Ix
Answer(s) available in Appendix G.
1Ω
1Ω
+ VR _
V2
I
1Ω
1Ω
Figure P3.4: Circuit for Problem 3.4.
*3.5 Apply nodal analysis to determine the voltage VR in the
circuit of Fig. P3.5.
4Ω
12 V
+
_
+ VR
_
4Ω
2Ω
Figure P3.5: Circuit for Problem 3.5.
+
_
8V
166
CHAPTER 3 ANALYSIS TECHNIQUES
3.6 Use the nodal-analysis method to find V1 and V2 in the
circuit of Fig. P3.6, and then apply that to determine Ix .
V2
V1
2A
4A
6Ω
V2
3Ω
V1
Ix
12 Ω
4A
6Ω
Ix
2Ω
2Ω
+
_ 48 V
V3
4Ω
3A
6Ω
Figure P3.9: Circuit for Problem 3.9.
Figure P3.6: Circuit for Problem 3.6.
3.10 The circuit in Fig. P3.10 contains a dependent current
source. Determine the voltage Vx .
*3.7 Find Ix in the circuit for Fig. P3.7.
5Ω
5Ω
10 Ω
+
21 V _
Ix
10 Ω
2Ω
+
6V _
5Ω
_
+ 10.5 V
Figure P3.7: Circuit for Problem 3.7.
I
8Ω
4Ω
2Vx +
_
Figure P3.11: Circuit for Problem 3.11.
3.12 The magnitude of the dependent current source in the
circuit of Fig. P3.12 depends on the current Ix flowing through
the 10 � resistor. Determine Ix .
3A
8Ω
2Ω
+
12 V _
(c) How much influence does the 4 A source have on the
circuit to the left of the 3 A source?
8Ω
+
Vx
_
+ Vx _
(b) Determine the amount of power supplied by the voltage
source.
+
_
6Ω
*3.11 Determine the power supplied by the independent
voltage source in the circuit of Fig. P3.11.
(a) Determine I .
6V
2Vx
Figure P3.10: Circuit for Problem 3.10.
3.8 For the circuit in Fig. P3.8:
2Ω
3Ω
8Ω
4A
5Ω
Ix
Figure P3.8: Circuit for Problem 3.8.
3.9 Apply nodal analysis to find node voltages V1 to V3 in the
circuit of Fig. P3.9 and then determine Ix .
10 Ω
+
_ 12.3 V 4 Ω
20 Ω
2Ix
2Ω
Figure P3.12: Circuit for Problems 3.12 and 3.13.
PROBLEMS
167
*3.13 Repeat Problem 3.12 after replacing the 5 � resistor in
Fig. P3.12 with a short circuit.
4Ω
2I
2Ω
I
1Ω
+
_ 8V
4V
+_
0.2 Ω
0.5 Ω
_
+
3.14 Apply nodal analysis to find the current Ix in the circuit
of Fig. P3.14.
6Ω
1Ω
1Ω
+
Vx
_
0.5 Ω
0.1 Ω
+
_ 2V
Ix
0.1 Ω
0.1 Ω
+
3V _
Figure P3.17: Circuit for Problems 3.17 and 3.18.
3.18 Repeat Problem 3.17 after replacing the 2 � resistor in
Fig. P3.17 with a short circuit.
3.19 For the circuit shown in Fig. P3.19:
Figure P3.14: Circuit for Problem 3.14.
(a) Determine Req between terminals (a, b).
*3.15 Use the supernode concept to find the current Ix in the
circuit of Fig. P3.15.
2A
6V
+
_
0.5 Ω
R
4A
0.5 Ω
(c) Apply nodal analysis to the original circuit to determine the
node voltages and then use them to determine I . Compare
the result with the answer of part (b).
R
0.5 Ω
Ix
(b) Determine the current I using the result of (a).
Figure P3.15: Circuit for Problem 3.15.
R
a
3.16 Apply the supernode technique to determine Vx in the
circuit of Fig. P3.16.
6V
+
+
Vx
_
+_
Req
b
R
R
R
V0
*3.20 For the circuit in Fig. P3.20, determine the current Ix .
6 kΩ
1Ω
5 kΩ
+
_ 10 V
4 kΩ
0.1 Ω
0.2 Ω
1Ω
+
4V _
0.2 Ω
Figure P3.16: Circuit for Problem 3.16.
*3.17
R
R
Figure P3.19: Circuit for Problem 3.19.
_
1 kΩ
R
R
I
2 kΩ
R
Determine Vx in the circuit of Fig. P3.17.
Figure P3.20: Circuit for Problem 3.20.
Ix
0.1 Ω
168
CHAPTER 3 ANALYSIS TECHNIQUES
3.21 Apply nodal analysis to determine Vx in the circuit of
Fig. P3.21.
1Ω
2A
5Ω
+
2A
1Ω
4Ω
3Ω
Vx
_
4Ω
+
_
2V
8Ω
8Ω
+
3Ω
6Ω
1A
7Ω
Vx
_
Figure P3.24: Circuit for Problem 3.24.
3.25 Apply nodal analysis to determine Va , Vb , and Vc in the
circuit of Fig. P3.25.
Figure P3.21: Circuit for Problem 3.21.
15 Ω
3.22 Apply nodal analysis to determine VL in the circuit of
Fig. P3.22.
2 kΩ
1V
4 kΩ
Va
3 kΩ
V
_x
+
_
2.5 Ω
10 Ω
5Ω
1 kΩ
+
+
_
10 V
Vb +
_
3A
Vc
_
+
25 V
+
3Vx
2 kΩ
VL
_
+
_
50 V
7.5 Ω
5Ω
Figure P3.22: Circuit for Problem 3.22.
Figure P3.25: Circuit for Problem 3.25.
*3.23 Apply nodal analysis to determine Vx in the circuit of
Fig. P3.23.
Section 3-3: Mesh-Current Method
5V
_
+
2 kΩ
5 kΩ
+ Vx _
*3.26 Apply mesh analysis to find the mesh currents in the
circuit of Fig. P3.26. Use the information to determine the
voltage V .
7 kΩ
2A
7V
+
_
3 kΩ
2Ω
Figure P3.23: Circuit for Problem 3.23.
3.24 Apply nodal analysis to determine Vx in the circuit of
Fig. P3.24.
16 V
+
_
I1
V
2Ω
3Ω
I2
Figure P3.26: Circuit for Problem 3.26.
4Ω
+
_ 12 V
PROBLEMS
169
3.27 Use mesh analysis to determine the amount of power
supplied by the voltage source in the circuit of Fig. P3.27.
4A
3Ω
8Ω
9A
2Ω
+
_ 40 V
4Ω
6Ω
2Ω
+
_ 48 V
2Ω
4Ω
Figure P3.27: Circuit for Problem 3.27.
Figure P3.31: Circuit for Problem 3.31.
*3.28 Determine V in the circuit of Fig. P3.28 using mesh
analysis.
V
4Ω
+
12 V _
*3.32 Use the supermesh concept to solve for Vx in the circuit
of Fig. P3.32.
4Ω
2Ω
+
_ 8V
2Ω
2Ω
3A
1Ω
Figure P3.28: Circuit for Problem 3.28.
Figure P3.32: Circuit for Problem 3.32.
3.29 Apply mesh analysis to find I in the circuit of Fig. P3.29.
1Ω
+
16 V _
1Ω
I
1Ω
1Ω
3.33 Use the supermesh concept to solve for Ix in the circuit
of Fig. P3.33.
Figure P3.29: Circuit for Problem 3.29.
2A
*3.30 Apply mesh analysis to find Ix in the circuit of
Fig. P3.30.
5Ω
5Ω
+
21 V _
10 Ω
10 Ω
5Ω
3.31 Apply mesh analysis to determine the amount of power
supplied by the voltage source in Fig. P3.31.
6Ω
4A
3A
6Ω
Figure P3.33: Circuit for Problem 3.33.
3.34 Apply mesh analysis to the circuit in Fig. P3.34 to
determine Vx .
_
+ 10.5 V
Figure P3.30: Circuit for Problem 3.30.
Ix
12 Ω
1Ω
Ix
+
4 Ω Vx
_
2Ω
+
6V _
3Ω
2Vx
Figure P3.34: Circuit for Problem 3.34.
6Ω
+
Vx
_
170
CHAPTER 3 ANALYSIS TECHNIQUES
3.35 Determine the amount of power supplied by the
independent voltage source in Fig. P3.35 by applying the meshanalysis method.
6V
+
0.5 Ω
_
+ Vx _
Ix
0.5 Ω
2Ω
+
12 V _
2A
2Vx +
_
4Ω
4A
0.5 Ω
Figure P3.39: Circuit for Problem 3.39.
Figure P3.35: Circuit for Problem 3.35.
3.40 Determine Vx in the circuit of Fig. P3.40.
Use mesh analysis to find Ix in the circuit of Fig. P3.36.
4Ω
4V
+_
0.2 Ω
0.5 Ω
0.1 Ω
+
_ 2V
2I
2Ω
0.5 Ω
Ix
0.1 Ω
0.1 Ω
+
3V _
I
1Ω
+
_ 8V
_
6Ω
+
*3.36
1Ω
1Ω
+
Vx
_
Figure P3.40: Circuit for Problems 3.40 and 3.42.
Figure P3.36: Circuit for Problem 3.36.
3.37 The circuit in Fig. P3.37 includes a dependent current
source. Apply mesh analysis to determine Ix .
3.41 Apply the supermesh technique to find Vx in the circuit
of Fig. P3.41.
5Ω
10 Ω
+
_ 12.3 V 4 Ω
6V
+
20 Ω
2Ix
_
Ix
2 kΩ
2Ω
1 kΩ
+
Vx
_
6 kΩ
5 kΩ
2 mA
4 kΩ
Figure P3.37: Circuit for Problems 3.37 and 3.38.
Figure P3.41: Circuit for Problem 3.41.
3.38 Repeat Problem 3.37 after replacing the 5 � resistor in
Fig. P3.37 with a short circuit.
*3.39 Apply mesh analysis to the circuit of Fig. P3.39 to
determine Ix .
*3.42 Repeat Problem 3.40 after replacing the 2 � resistor in
Fig. P3.40 with a short circuit.
PROBLEMS
171
3.43 Apply mesh analysis to the circuit of Fig. P3.43 to
find Ix .
1Ω
0.1 Ω
0.2 Ω
Ix
1Ω
+
4V _
3.46 Simplify the circuit in Fig. P3.46 as much as possible
using source transformation and resistance combining, and then
apply mesh analysis to determine Ix .
0.2 Ω
6Ω
12 V
3Ω
+
_
3Ω
6Ω
6Ω
Ix
1Ω
4Ω
0.1 Ω
4Ω
3Ω
Figure P3.46: Circuit for Problem 3.46.
Figure P3.43: Circuit for Problem 3.43.
3.44
Determine I0 in Fig. P3.44 through mesh analysis.
3.47 Apply mesh analysis to determine I0 in the circuit in
Fig. P3.47.
2Ω
4Ω
2Ω
_
10 V +
3Ω
I0
2V
_
6Ω
3Ω
4Ix
2Ω
5Ω
4Ω
+
+
10 V _
Ix
I0
4Ω
6Ω
2Ω
Figure P3.44: Circuit for Problem 3.44.
Figure P3.47: Circuit for Problem 3.47.
*3.45 Use an analysis method of your choice to determine I0
in the circuit of Fig. P3.45.
*3.48 Apply mesh analysis to determine Ix in the circuit in
Fig. P3.48.
+
12 V _
5Ω
10 Ω
10 Ω
Ix
I0
5Ω
10 Ω
Figure P3.45: Circuit for Problem 3.45.
15 V
+_
2Ω
5Ω
10 Ω
10 Ω
2.5 A
Figure P3.48: Circuit for Problem 3.48.
3Ω
172
CHAPTER 3 ANALYSIS TECHNIQUES
3.49 Apply mesh analysis to determine Ix in the circuit in
Fig. P3.49.
(c) The values of how many of those mesh currents can be
determined immediately from the circuit?
(d) Apply mesh analysis to find I .
Ix
10 Ω
5Ω
4A
5Ω
1A
+
_
10 Ω
5Ω
_
+
50 V
+_
15 Ω
5V
85 V
2Ω
20 Ω
7A
10 V
5Ω
5Ω _
5Ω
10 V + _
I′
+
10 Ω
12 Ω 10 Ω
10 Ω
6A
5Ω
3A
+
_
40 V
Figure P3.49: Circuit for Problem 3.49.
7.5 Ω
Figure P3.51: Circuit for Problem 3.51.
3.50 Apply mesh analysis to determine Vx in the circuit in
Fig. P3.50.
Sections 3-4 and 3-5: By-Inspection and Superposition
Methods
1A
2Ω
5Ω
3Ω
+_
4Ω
2Ω
3Ω
*3.52 Apply the by-inspection method to develop a
node-voltage matrix equation for the circuit in Fig. P3.52 and
then use MATLAB or MathScript software to solve for V1
and V2 .
2V
12 Ω
+ Vx _
2Ω
1A
V1
6Ω
2A
V2
6Ω
4A
6Ω
3A
Figure P3.50: Circuit for Problem 3.50.
Figure P3.52: Circuit for Problem 3.52.
3.51
Consider the circuit shown in Fig. P3.51.
(a) How many extraordinary nodes does it have?
(b) How many independent meshes does it have?
3.53 Use the by-inspection method to establish a node-voltage
matrix equation for the circuit in Fig. P3.53. Solve the matrix
equation by MATLAB or MathScript software to find V1 to V4 .
PROBLEMS
173
2Ω
1Ω
V2
V1
2A
6Ω
7Ω
2 kΩ
3Ω
V3
9Ω
4 kΩ
4Ω
5Ω
V4
3A
8Ω
1 kΩ
Figure P3.53: Circuit for Problem 3.53.
+
21 V _
4 kΩ
2 mA
3.57 Use the by-inspection method to establish the meshcurrent matrix equation for the circuit in Fig. P3.57 and then
solve the equation to determine Vout .
16 Ω
5Ω
I1
5 kΩ
+
Vx
_
Figure P3.56: Circuit for Problem 3.56.
3.54 Develop a mesh-current matrix equation for the circuit
in Fig. P3.54 by applying the by-inspection method. Solve for
I1 to I3 .
5Ω
6 kΩ
I2
I3
10 Ω
10 Ω
5Ω
_
+ 4.2 V
8Ω
+
_ 538 V
4Ω
8Ω
4Ω
Figure P3.54: Circuit for Problem 3.54.
2Ω
2Ω
3.55 Find I0 in the circuit of Fig. P3.55 by developing a meshcurrent matrix equation and then solving it using MATLAB or
MathScript software.
1Ω
+
Vout
_
Figure P3.57: Circuit for Problem 3.57.
*3.58 Develop a node-voltage matrix equation for the circuit
in Fig. P3.58. Solve it to determine I .
+
12 V _
10 Ω
20 Ω
20 Ω
1Ω
10 Ω
20 Ω
5Ω
I0
10 Ω
I
20 Ω
20 Ω
V1
2Ω
2A
V2
3Ω
V3
4Ω
Figure P3.55: Circuit for Problem 3.55.
Figure P3.58: Circuit for Problem 3.58.
*3.56 Apply the by-inspection method to derive a node-voltage
matrix equation for the circuit in Fig. P3.56 and then solve it
using MATLAB or MathScript software to find Vx .
3.59 Determine the amount of power supplied by the voltage
source in Fig. P3.59 by establishing and then solving the meshcurrent matrix equation of the circuit.
174
CHAPTER 3 ANALYSIS TECHNIQUES
2Ω
*3.62 Perform necessary source transformations and then use
the mesh analysis by-inspection method to determine Vx in the
circuit of Fig. P3.62.
1Ω
3Ω 4Ω
+
_ 8V
2Ω
4Ω
5Ω
5Ω
2A
2Ω
3Ω
4Ω
6Ω
+ Vx _
Figure P3.59: Circuit for Problem 3.59.
7Ω
3.60 Determine the current Ix in the circuit of Fig. P3.60
by applying the source-superposition method. Call Ix� the
component of Ix due to the voltage source alone, and Ix��
the component due to the current source alone. Show that
Ix = Ix� + Ix�� is the same as the answer to Problem 3.9.
4A
3Ω
6Ω
Ix
2Ω
2Ω
+
_
4Ω
48 V
Figure P3.62: Circuit for Problem 3.62.
3.63 Apply the source-superposition method to the circuit in
Fig. P3.63 to determine:
(a) Vx� , the component of Vx due to the 1 A current source
alone.
(b) Vx�� , the component of Vx due to the 10 V voltage source
alone.
(c) Vx��� , the component of Vx due to the 3 A current source
alone.
(d) The total voltage Vx = Vx� + Vx�� + Vx��� .
+ Vx _
3.61 Apply the source-superposition method to the circuit in
Fig. P3.61 to determine:
1A
12 Ω
(a) Ix� , the component of Ix due to the voltage source alone
+
_
18 Ω
15 Ω
10 V
(c) The total current Ix = Ix� + Ix��
+
_
10 Ω
5Ω
(b) Ix�� , the component of Ix due to the current source alone
3A
3Ω
Figure P3.63: Circuit for Problem 3.63.
(d) P � , the power dissipated in the 4 � resistor due to Ix�
(e) P �� , the power dissipated in the 4 � resistor due to Ix��
(f) P , the power dissipated in the 4 � resistor due to the total
current I . Is P = P � + P �� ? If not, why not?
2Ω
1A
8Ω
Figure P3.60: Circuit for Problem 3.60.
9A
9Ω
Ix
8Ω
4Ω
Figure P3.61: Circuit for Problem 3.61.
+
_ 40 V
Section 3-6: Thévenin and Norton Equivalents
*3.64 Find the Thévenin equivalent circuit at terminals (a, b)
for the circuit in Fig. P3.64.
2Ω
1Ω
2Ω
3A
3Ω
4Ω
Figure P3.64: Circuit for Problem 3.64.
a
b
PROBLEMS
175
3.65 Find the Thévenin equivalent circuit at terminals (a, b)
for the circuit in Fig. P3.65.
2.5 Ω a
3.70 Repeat Problem 3.68 for terminals (d, e) as seen by the
2 � resistor between them (as if it were a load resistor external
to the circuit).
b
3.71 Find the Thévenin equivalent circuit at terminals (a, b)
of the circuit in Fig. P3.71.
3Ω
4A
4Ω
6Ω
+
_ 2V
5Ω
Ix
Figure P3.65: Circuit for Problem 3.65.
3.66 The circuit in Fig. P3.66 is to be connected to a load
resistor RL between terminals (a, b).
(a) Find the Thévenin equivalent circuit at terminals (a, b).
(b) Choose RL so that the current flowing through it is 0.5 A.
c
d
6Ω
a
+
_
I0
b
8V
+_
4Ω
d
4Ω
2Ω
e
+
12 V _
Figure P3.68: Circuit for Problems 3.68 through 3.70.
a
b
c
0.25 Ω
_ 0.2I
+
0
b
Figure P3.73: Circuit for Problem 3.73.
*3.74 Find the Norton equivalent circuit at terminals (a, b) of
the circuit in Fig. P3.74.
4Ω
I0
a
2Ω
0.2 Ω
0.2 Ω
0.1 Ω
*3.68 Find the Thévenin equivalent circuit at terminals (a, b)
for the circuit in Fig. P3.68.
+
_ 6V
b
Figure P3.71: Circuit for Problems 3.71 and 3.72.
3.67 For the circuit in Fig. P3.66, find the Thévenin equivalent
circuit as seen by the 6 � resistor connected between terminals
(c, d) as if the 6 � resistor is a load resistor connected to (but
external to) the circuit. Determine the current flowing through
that resistor.
4Ω
8Ω
10 Ω
48 V
Figure P3.66: Circuit for Problems 3.66 and 3.67.
2Ω
2Ix
4Ω
a
2Ω
20 Ω
3.73 Find the Norton equivalent circuit at terminals (a, b) for
the circuit in Fig. P3.73.
8Ω
4Ω
10 Ω
+
_ 19 V
*3.72 Find the Norton equivalent circuit of the circuit in
Fig. P3.71 after increasing the magnitude of the voltage source
to 38 V.
4A
4Ω
3.69 Repeat Problem 3.68 for terminals (a, c).
a
3Ω
+
_ 15 V
6Ω
1.2I0
Figure P3.74: Circuit for Problems 3.74 and 3.75.
b
176
CHAPTER 3 ANALYSIS TECHNIQUES
3.75 Repeat Problem 3.74 after replacing the 6 � resistor with
an open circuit.
a
3.76 Find the Norton equivalent circuit at terminals (a, b) of
the circuit in Fig. P3.76.
I0
0.2 Ω
I0
2Ω
−+
a
2I0
0.2 Ω
0.1 Ω
2Ω
4Ω
+
_ 0.2I0
4Ω
b
b
Figure P3.79: Circuit for Problem 3.79.
Figure P3.76: Circuit for Problems 3.76.
*3.77 Obtain the Thévenin equivalent circuit at terminals (a, b)
in Fig. P3.77.
2Ω
b
1V
+
_
8Ω
6Ω
+
_
4Ω
5V
*3.80 Obtain the Thévenin equivalent of the circuit in
Fig. P3.80 at terminals (a, b).
a
3Ω
4Ω
3Ω
Figure P3.77: Circuit for Problem 3.77.
1Ω
3Ω
1Ω
3.78 Obtain the Thévenin equivalent of the circuit to the left
of terminals (a, b) in Fig. P3.78. Use your result to compute
the power dissipated in the 0.4 � load resistor.
a
b
2A
1A
Figure P3.80: Circuit for Problem 3.80.
3Ω
2Ω
a
4Ω
Section 3-8: Maximum Power Transfer
4Ω
1A
+
_
0.4 Ω
2V
3.81 What value of the load resistor RL will extract the
maximum amount of power from the circuit in Fig. P3.81, and
how much power will that be?
b
3Ω
Figure P3.78: Circuit for Problem 3.78.
3.79 Obtain the Thévenin equivalent of the circuit in
Fig. P3.79 at terminals (a, b).
4Ω
2Ω
4Ω
3A
6Ω
8Ω
Figure P3.81: Circuit for Problem 3.81.
a
b
RL
PROBLEMS
177
3.82 For the circuit in Fig. P3.82, choose the value of RL so
that the power dissipated in it is a maximum.
+
_ 15 V
a
2 kΩ
Rs
3 kΩ
IL
RL
6 kΩ
4 kΩ
2 mA
Figure P3.85: Circuit for Problem 3.85.
RL
6 kΩ
8 kΩ
b
Figure P3.82: Circuit for Problem 3.82.
*3.83 Determine the maximum power that can be extracted by
the load resistor from the circuit in Fig. P3.83.
4 kΩ
2 kΩ
2000Ix
+_
+
_ 12 V
Ix
3 kΩ
+
_ 15 V
3.86 In the circuit shown in Fig. P3.86, a potentiometer is
connected across the load resistor RL . The total resistance of
the potentiometer is R = R1 + R2 = 5 k�.
(a) Obtain an expression for the power PL dissipated in RL
for any value of R1 .
(b) Plot PL versus R1 over the full range made possible by the
potentiometer’s wiper.
RL 1 kΩ
R
RL
6 kΩ
R1
R2
Figure P3.86: Circuit for Problem 3.86.
Figure P3.83: Circuit for Problem 3.83.
3.87 Determine the maximum power extractable from the
circuit in Fig. P3.87 by the load resistor RL .
3.84 Figure P3.84 depicts a 0-to-10 k� potentiometer as a
variable load resistor RL connected to a circuit of an unknown
architecture. When the wiper position on the potentiometer was
adjusted such that RL = 1.2 k�, the current through it was
measured to be 3 mA, and when the wiper was lowered so
that RL = 2 k�, the current decreased to 2.5 mA. Determine
the value of RL that would extract maximum power from the
circuit.
I0
2 kΩ
2 kΩ
1 kΩ
RL
+
_ 200I0
Figure P3.87: Circuit for Problem 3.87.
Circuit
IL
a
} RL
b
3.88 In the circuit Fig. P3.88, what value of Rs would result
in maximum power transfer to the 10 � load resistor?
Figure P3.84: Circuit for Problem 3.84.
*3.85 The circuit shown in Fig. P3.85 is connected to a variable
load RL through a resistor Rs . Choose Rs so that IL never
exceeds 4 mA, regardless of the value of RL . Given that choice,
what is the maximum power that RL can extract from the circuit?
2A
Rs
RL
Figure P3.88: Circuit for Problem 3.88.
10 Ω
178
CHAPTER 3 ANALYSIS TECHNIQUES
Section 3-9: Bipolar Junction Transistor
*3.89 The two-transistor circuit in Fig. P3.89 is known as a
current mirror. It is useful because the current I0 controls the
current IREF regardless of external connections to the circuit.
In other words, this circuit behaves like a current-controlled
current source. Assume both transistors are the same size such
that IB1 = IB2 . Find the relationship between I0 and IREF .
(Hint: You do not need to know what is connected above or
below the transistors. Nodal analysis will suffice.)
I0
IREF
C1
Transistor 1
Iin
C
Rin
+
V0 _
C2
B
3.91 The circuit in Fig. P3.91 is identical to the circuit in
Fig. P3.90, except that the voltage source Vin is more realistic
in that it has an associated resistance Rin . Find both the voltage
gain (AV = Vout /Vin ) and the current gain (AI = Iout /Iin ).
Assume Vin � VBE .
(Power supply)
E
+
_ Vin
Iout
RL
Transistor 2
E1
Figure P3.89: A simple current mirror (Problem 3.89).
V0
(Power supply)
B
Iout
RL
Figure P3.90: Circuit for Problem 3.90.
RL
+
V0 _
(Power supply)
C
_
+
Vout
_
Rs
+
_ Vin
E
+
_ Vin
Vout
3.92 The circuit in Fig. P3.92 is a BJT common-emitter
amplifier. Find Vout as a function of Vin .
3.90 The circuit in Fig. P3.90 is a BJT common collector
amplifier. Obtain expressions for both the voltage gain
(AV = Vout /Vin ) and the current gain (AI = Iout /Iin ). Assume
Vin � VBE .
+
_
+
Figure P3.91: Circuit for Problem 3.91.
E2
Iin
B
+
Figure P3.92: Circuit for Problem 3.92.
Vout
_
*3.93 Obtain an expression for Vout in terms of Vin for
the common emitter-amplifier circuit in Fig. P3.93. Assume
Vin � VBE .
PROBLEMS
179
RL
+
V0 _
(Power supply)
+ Vx _
+
Vout
_
2Ω
+
12 V _
Rs
2Vx +
_
4Ω
Figure P3.97: Circuit for Problem 3.97.
+
_ Vin
3.98 Use the DC Operating Point Analysis in Multisim to
find the power dissipated or supplied by each component in the
circuit in Fig. P3.98 and show that the sum of all powers is zero.
RE
R1
Figure P3.93: Circuit for Problem 3.93.
2.5I
_
3.94 Using Multisim, draw the circuit in Fig. P3.94 and solve
for voltages V1 and V2 .
R4
+
Section 3-10: Multisim Analysis
25 Ω
R2
R3
5Ω
5Ω
5Ω
R5 10 Ω
I
R6 10 Ω
+
10 V _
12 Ω
V1
V2
6Ω
3A
4A
Figure P3.98: Circuit for Problem 3.98.
6Ω
3A
Figure P3.94: Circuit for Problem 3.94.
3.95 The circuit in Problem 3.55 was solved using MATLAB
or MathScript software. It can be solved just as easily using
Multisim. Using Multisim, draw the circuit in Fig. P3.55 and
solve for all node voltages and the current I0 .
3.96 Using Multisim, draw the circuit in Fig. P3.96 and solve
for Vx .
3.99 Simulate the circuit found in Fig. P3.99 with a 10 �
resistor placed across the terminals (a, b). Then either by hand
or by using tools in Multisim (see Multsim Demo 3.3), find the
Thévenin and Norton equivalent circuits and simulate both of
those circuits in Multisim with 10 � resistors across their output
terminals. Show that the voltage drop across and current through
the 10 � load resistor is the same in all three simulations.
R1
50 Ω
+
_ 12 V
a
I
R2
R3 10 Ω
25 Ω
+
_ 2I
2Ω
+
6V _
9Ω
2Vx
6Ω
+
Vx
_
b
Figure P3.99: Circuit for Problem 3.99.
Potpourri Questions
Figure P3.96: Circuit for Problem 3.96.
3.100 Why is it of interest to measure the conductivity of sea
ice?
3.97 Use Multisim to draw the circuit in Fig. P3.97 and solve
for Vx .
3.101 In integrated circuit fabrication, what is a wafer? A die?
A chip?
180
CHAPTER 3 ANALYSIS TECHNIQUES
3.102 How is lithography related to feature size in IC
fabrication? Why are ICs fabricated under super-clean
conditions?
3.103 What is a bit in a digital signal? A byte? A word? What
does the acronym ASCII stand for?
R4
+
V1 I1
Isrc
_
R1 I2
R2 I3
R3 I4
_
+ Vsrc
Figure m3.2 Circuit for Problem m3.2.
Integrative Problems: Analytical / Multisim / myDAQ
To master the material in this chapter, solve the following
problems using three complementary approaches: (a)
analytically, (b) with Multisim, and (c) by constructing the
circuit and using the myDAQ interface unit to measure
quantities of interest via your computer. [myDAQ tutorials
.]
and videos are available on
m3.1 Node-Voltage Method: Apply the node-voltage method
to determine node voltages V1 to V4 for the circuit of Fig.
m3.1. From these results determine which resistor dissipates
the most power and which resistor dissipates the least power,
and report these two values of power. Use these component
values: Isrc1 = 3.79 mA, Isrc2 = 1.84 mA, Vsrc = 4.00 V,
R1 = 3.3 k�, R2 = 2.2 k�, R3 = 1.0 k�, and R4 = 4.7 k�.
R2
R1
V1
R4
V2
m3.3
Superposition: In the circuit of Fig. m3.3:
(a) Solve for Ia and Vb using nodal analysis.
(b) Solve for Ia and Vb using superposition. Hint: Solve for
Ia and Vb with one source on at a time.
(c) Determine Ia and Vb using any method.
Use these component values: I1 = 1.84 mA, V2 = 3.0 V,
R1 = 1.0 k�, R2 = 2.2 k�, and R3 = 4.7 k�.
+ Vb _
I1
V4
R3
Ia
R1
R2
+
_
V2
R3
Isrc1
V3
+
_
Isrc2
Vsrc
Figure m3.1 Circuit for Problem m3.1.
m3.2 Mesh-Current Method: Apply the mesh-current
method to determine mesh currents I1 to I4 in the circuit
of Fig. m3.2. From these results determine V1 , the voltage
across the current source. Use these component values:
Isrc1 = 12.5 mA, Vsrc = 15 V, R1 = 5.6 k�, R2 = 2.2 k�,
R3 = 3.3 k�, and R4 = 4.7 k�.
Figure m3.3 Circuit for Problem m3.3.
m3.4 Thévenin Equivalents and Maximum Power Transfer: In the circuit of Fig. m3.4, find the Thévenin equivalent
of the circuit at terminals (a, b) as would be seen by a load
resistor RL . Specifically:
(a) Determine the open-circuit voltage Voc that appears at
terminals (a, b).
(b) Determine the short-circuit current Isc that flows through
a wire connecting terminals (a, b) together.
PROBLEMS
181
(c) Determine the Thévenin resistance.
(d) Determine the maximum power Pmax that could be
delivered by this circuit.
Use these component values: Vsrc = 10 V, R1 = 680 �,
R2 = 3.3 k�, R3 = 4.7 k�, and R4 = 1.0 k�.
R1
Vsrc
+
_
(b) Add a short circuit between nodes 1 and 2, and then find the
short circuit current between them. Use this information
to calculate the Thévenin resistance.
(c) Turn off the 4 V and 8 V sources. Verify the Thévenin
resistance from part (b) by measuring the equivalent
resistance between terminals 1 and 2 (using Multisim and
myDAQ).
R3
a
R2
b
1
_
+ 2
+
_
V1
2V
R1
R3
1
R4
15 kΩ
R2
1 kΩ
47 kΩ
4.7 kΩ
+ V2
_ 4V
Figure m3.4 Circuit for Problem m3.4.
Figure m3.6 Circuit for Problem m3.6.
m3.5
Power Dissipation: For the circuit shown in Fig. m3.5:
(a) Find the combined total power generated by the two
current sources analytically and with Multisim. Do not
build this circuit (there is no myDAQ portion for part (a)).
(b) Use source transformations to reduce the current sources
in Fig. m2.5 into a single voltage source. Now, build
this circuit and measure the total power dissipated by all
four resistors. Hint: To create the voltage source, use the
myDAQ arbitrary waveform generator.
(c) Is the power found in part (a) the same as in part (b)?
3.3 kΩ
0.4 mA
R4
22 kΩ
R3
(a) Determine the power generated by the current source. For
the myDAQ portion of this problem, be sure to measure
the current through the LM371 regulator.
(b) Determine the total power dissipated by all other circuit
elements. Compare your answer to the result obtained in
part (a).
R1
I1
m3.7 Power Dissipation with Current Source: Creating
an ideal current source with the myDAQ requires a current
regulator. For the myDAQ portion of this problem use the
LM371 and a 220 � resistor to create the current source in
Fig. m3.7.
R2
1 kΩ
I2
0.8 mA
R4
R1
3.3 kΩ
Figure m3.5 Circuit for Problem m3.5.
m3.6 Thévenin Equivalents: For the circuit in Fig. m3.6:
(a) Find the open circuit voltage between nodes 1 and 2.
1 kΩ
4.7 kΩ
3.3 kΩ
I1
5.68 mA
R2
R3 1 kΩ
Figure m3.7 Circuit for Problem m3.7.
182
m3.8 Thévenin Equivalent with Current Source: Creating
an ideal current source with the myDAQ requires a current
regulator. For the myDAQ portion of this problem, use the
LM371 and a 1 k resistor to create the current source in
Fig. m3.8.
(a) Determine the open circuit voltage.
(b) Determine the short circuit current between the output
terminals.
(c) Determine the Thévenin resistance for the circuit.
CHAPTER 3 ANALYSIS TECHNIQUES
I1
1.25 mA
R2 1 kΩ
R1
R3
1
1 kΩ
+
2.2 kΩ
Voc
_
2
Figure m3.8 Circuit for Problem m3.8.
4
4
CHAPTER
C H A P T E R
Operational Amplifiers
Contents
4-1
TB9
4-2
4-3
4-4
4-5
TB10
4-6
4-7
4-8
4-9
4-10
4-11
TB11
4-12
4-13
Overview, 184
Op-Amp Characteristics, 184
Display Technologies, 190
Negative Feedback, 195
Ideal Op-Amp Model, 196
Inverting Amplifier, 198
Inverting Summing Amplifier, 200
Computer Memory Circuits, 203
Difference Amplifier, 206
Voltage Follower/Buffer, 208
Op-Amp Signal-Processing Circuits, 209
Instrumentation Amplifier, 214
Digital-to-Analog Converters (DAC), 216
The MOSFET as a Voltage-Controlled
Current Source, 219
Circuit Simulation Software, 225
Application Note: Neural Probes, 229
Multisim Analysis, 230
Summary, 235
Problems, 236
Dot next to pin #1
4
3
2
1
4411
7
SSN
N7
5
6
7
8
The introduction of the operational amplifier chip in the 1960s
has led to the development of a wide array of signal processing
circuits, enabling the creation of an ever-increasing number of
electronic applications.
Objectives
Learn to:
Combine multiple op-amp circuits together to
perform signal processing operations.
Describe the basic properties of an op amp and
state the constraints of the ideal op-amp model.
Explain the role of negative feedback and the
trade-off between circuit gain and dynamic range.
Analyze and design high-gain, high-sensitivity
instrumentation amplifiers.
Design an n-bit digital-to-analog converter.
Analyze and design inverting amplifiers, summing
amplifiers, difference amplifiers, and voltage
followers.
Use the MOSFET in analog and digital circuits.
Apply Multisim to analyze and simulate circuits
that include op amps.
184
CHAPTER 4
Overview
Since its first realization by Bob Widlar in 1963 and then
its introduction by Fairchild Semiconductor in 1968, the
operational amplifier, or op amp for short, has become the
workhorse of many signal-processing circuits. It acquired the
adjective operational because it is a versatile device capable
not only of amplifying a signal but also inverting it (reversing
its polarity), integrating it, or differentiating it. When multiple
signals are connected to its input, the op amp can perform
additional mathematical operations—including addition and
subtraction. Consequently, op-amp circuits often are cascaded
together in various arrangements to support a variety of different
applications. In this chapter, we explore several op-amp circuit
configurations, including amplifiers, summers that add multiple
signals together, and digital-to-analog converters that convert
signals from digital format to analog.
4-1
Op-Amp Characteristics
The internal architecture of an op-amp circuit consists of many
interconnected transistors, diodes, resistors and capacitors
OPERATIONAL AMPLIFIERS
(Fig. 4-1), all fabricated on a chip of silicon. Despite its internal
complexity, however, an op amp can be modeled in terms of a
relatively simple equivalent circuit that exhibits a linear inputoutput response. This equivalence allows us to apply the tools
we developed in the preceding chapters to analyze (as well as
design) a large array of op-amp circuits and to do so with relative
ease.
4-1.1
Nomenclature
Commercially available op amps are fabricated in encapsulated
packages of various shapes. A typical example is the eightpin DIP configuration shown in Fig. 4-2(a) [DIP stands for
dual-in-line package]. The pin diagram for the op amp is
shown in Fig. 4-2(b), and its circuit symbol (the triangle) is
displayed in Fig. 4-2(c). Of the eight pins (terminals) only five
need to be connected to an outside circuit in order for the op
amp to function (the remaining three are used for specialized
applications). The op amp has two input voltage terminals (υp
and υn ) and one output voltage terminal (υo ).
Figure 4-1: The circuit diagram of the Model 741 op amp consists of 20 transistors, several resistors, and one capacitor.
4-1
OP-AMP CHARACTERISTICS
185
to the op amp, KCL mandates that
Op-Amp Pin Designation
Pin 2
Pin 3
Pin 4
Pin 7
Pin 6
inverting (or negative) input voltage, υn
noninverting (or positive) input voltage, υp
negative (−) terminal of power supply Vcc
positive (+) terminal of power supply Vcc
output voltage, υo
The terms used to describe pins 3 and 2 as noninverting
and inverting are associated with the property of the op
amp that its output voltage υo is directly proportional to
both the noninverting input voltage υp and the negative
of the inverting input voltage υn . Kirchhoff’s current law applies to any volume of space,
including an op amp. Hence, for the five terminals connected
io = ip + in + i+ + i− ,
(4.1)
where ip , in , and io may be constant (dc) or time-varying
currents. Currents i+ and i− are dc currents generated by the
dc power supply Vcc .
From here on forward, we will ignore the pins connected
to Vcc when we draw circuit diagrams involving op amps,
because so long as the op amp is operated in its linear
region, Vcc will have no bearing on the operation of the
circuit. Hence, the op-amp triangle often is drawn with only three
terminals, as shown in Fig. 4-2(d). Moreover, voltages υp , υn ,
and υo are defined relative to a common reference or ground.
Dot next to pin #1
4
3
2
1
774411
N
SSN
8
7 + Vcc (power supply)
υn 2
7
6
5
(a)
1
υp 3
8
+
6 υo
(power supply) −Vcc 4
Typical op-amp package
(b)
5
Pin diagram
i+
ip
υp
in
3
2
+
_
υn
+
(c)
7
6
io
4
i−
Vcc
+
Complete circuit diagram
Vcc
υo
υp
υn
(d)
ip
+
_
io
in
Op-amp diagram without showing
Vcc sources explicitly
Figure 4-2: Operational amplifier.
υo
186
CHAPTER 4
Rs
Positive
saturation region
(+ voltage rail)
υo
Vcc
υs
Maximum
negative
threshold
+
_
OPERATIONAL AMPLIFIERS
Op-amp
circuit with
gain G
+
RL
υL = Gυs
_
0
Negative
saturation region
(– voltage rail)
Maximum
positive
threshold
υp − υn
to the signal input voltage υs .
Linear range
Figure 4-3: Op-amp transfer characteristics. The linear range
extends between υo = −Vcc and +Vcc . The slope of the line is
the op-amp gain A
The (+) and (−) labels printed on the op-amp triangle simply
denote the noninverting and inverting pins of the op amp not
the polarities of υp or υn .
Ignoring the pins associated with the power-supply voltage
Vcc does not mean we can ignore currents i+ and i− . To avoid
making the mistake of writing a KCL equation on the basis of
the simplified diagram given in Fig. 4-2(d), we explicitly state
that fact by writing
(4.2)
4-1.2 Transfer Characteristics
The output voltage υo of the op amp depends on the difference
(υp − υn ) at the input side. The plot shown in Fig. 4-3, which
depicts the input-output voltage-transfer characteristic of the
op amp, is divided into three regions of operation, denoted the
negative saturation, linear, and positive saturation regions. In
the linear region, the output voltage υo is related to the input
voltages υp and υn by
υo = A(υp − υn ),
Output load
Figure 4-4: Circuit gain G is the ratio of the output voltage υL
−Vcc
io � = ip + in .
Input circuit
(4.3)
where A is called the op-amp gain, or the open-loop gain. The
output voltage can be either positive or negative depending on
whether υp is larger than υn or the other way around. Strictly
speaking, this relationship is valid only when the op amp is
not connected to an external circuit on the output side (open
loop), but as will become clearer in future sections, it continues
to hold (approximately) if the output circuit satisfies certain
conditions (has high enough input resistance so as not to load
the circuit). The open-loop gain is specific to the op-amp device
itself, in contrast with the circuit gain or closed-loop gain G,
which defines the gain of the entire circuit. Thus, if υs is the
signal voltage of the circuit connected at the input side of the
op-amp circuit (Fig. 4-4), and υL is the voltage across the load
connected at its output side, then
υL = Gυs .
(4.4)
According to Eq. (4.3), υo is related linearly to the difference
between υp and υn or to either one of them if the other is held
constant. Excluding circuits that contain magnetically coupled
transformers, in a regular circuit no voltage can exceed the net
voltage level of the power supply.
The maximum value that υo can attain is |Vcc |. The op
amp goes into a saturation mode if |A(υp − υn )| > |Vcc |,
which can occur on both the negative and positive sides
of the linear region. As we will discuss shortly, the op-amp gain A is typically
on the order of 105 or greater, and the supply voltage is on the
order of volts or tens of volts. In the linear region, υo is bounded
between −Vcc and +Vcc , which means that (υp −υn ) is bounded
between −Vcc /A and +Vcc /A. For Vcc = 10 V and A = 106 ,
the operating range of (υp –υn ) is −10 μV to +10 μV. So a
basic op-amp configuration is able to amplify only very small
voltages, but the configuration can be modified so as to amplify
a wider range of voltages (Section 4-2). Even in such cases,
however, the maximum output voltage is Vcc and the minimum
4-1
OP-AMP CHARACTERISTICS
187
is −Vcc . These are called the voltage rails. It is important to
keep this in mind as we deal with circuits containing operational
amplifiers.
4-1.3 Op-Amp Switch
An op amp is an active device. Hence, to operate, it needs to
be connected to a power supply that can provide the necessary
voltages. Specifically, the op amp requires a positive supply
voltage Vcc at pin 7 and a negative supply voltage −Vcc at
pin 4. The magnitude of Vcc is specified by the manufacturer.
For some models, the positive and negative supply voltages
need not be of the same magnitude, but most often they are.
Hence, our default assumption in all future considerations of
op-amp circuits is that the dc supply voltages connected to pins
4 and 7 are equal in magnitude and opposite in polarity. Among
various op-amp models, Vcc typically is between 5 and 24 V.
As noted earlier in connection with Fig. 4-4, if (υp − υn )
exceeds a certain maximum positive threshold, the output
voltage υo saturates at Vcc , and if (υp − υn ) is negative (because
the voltage connected to υp is smaller than that connected to υn )
and its magnitude exceeds a maximum negative threshold, then
υo saturates at −Vcc . This op-amp behavior can be used to
operate the op amp like an electronic switch, either as an
ON/OFF switch, or as a switch to activate one device versus
another. An example is illustrated by the circuit in Fig. 4-5. At
Vp
Vn
+
_
the input side, the positive terminal is connected to a dc voltage
Vp that can be set at either +2 V or −2 V, and the negative input
terminal is connected to ground. At the output side, the op amp
is connected to the parallel combination of two LEDs, one that
can emit red light and another that can emit green light. The two
LEDs are arranged in opposite directions, so that when V0 is
positive and sufficiently large to cause a current to flow through
the red LED, it lights up, but the green LED will neither conduct
nor emit green light because it is reverse biased relative to V0 .
This is the scenario depicted in Fig. 4-5(b); the input Vp = +2 V
(and Vn = 0) causes the output to saturate at V0 = Vcc = 12 V
(the vertical flag with Vcc = 12 V is used to denote that this LED
uses a Vcc = 12 V), which is quite sufficient to cause the red
LED to conduct. When Vp is switched to −2 V, as in the scenario
depicted in Fig. 4-5(c), the output saturates at V0 = −12 V, in
which case the green LED starts to conduct and emit green light
and the red LED stops conducting altogether. Thus, switching
the input of the op amp between +2 V and −2 V causes the two
LEDs to alternate roles between active and inactive.
4-1.4
Equivalent-Circuit Model in Linear Region
When operated in its linear region, the op-amp input-output
behavior can be modeled in terms of the equivalent linear circuit
shown in Fig. 4-6. The equivalent circuit consists of a voltagecontrolled voltage source of magnitude A(υp − υn ), an input
resistance Ri , and an output resistance Ro . Table 4-1 lists the
Vcc = 12 V
V0
−Vcc = −12 V
R
Red LED
R
Green
LED
(a) Op-amp circuit
Vp = 2 V
+
_
Vcc = 12 V
−Vcc = −12 V
V0 = 12 V
R
Red LED
(b) Vp = +2 V
Green
LED
Vp = −2 V
R
LED acts
like open
circuit
+
_
Vcc = 12 V
V0 = −12 V
−Vcc = −12 V
Red LED
acts like
open circuit
R
R
Green
LED
(c) Vp = −2 V
Figure 4-5: Op amp operated as a switch. The ±Vcc flags indicate the dc supply voltages connected to pins 7 and 4.
188
CHAPTER 4
OPERATIONAL AMPLIFIERS
Table 4-1: Characteristics and typical ranges of op-amp parameters. The rightmost column represents the values assumed by the
ideal op-amp model.
Op-Amp Characteristics
• Linear input-output response
• High input resistance
• Low output resistance
• Very high gain
Parameter
Typical Range
Ideal Op Amp
Open-loop gain A
Input resistance Ri
Output resistance Ro
Supply voltage Vcc
104 to 108 (V/V)
106 to 1013 �
∞
∞�
0�
As specified by manufacturer
typical range of values that each of these op-amp parameters
may assume. Based on these values, we note that an op amp is
characterized by:
(1) High input resistance Ri : at least 1 M�, which is highly
desirable from the standpoint of voltage transfer from an
input circuit (as discussed previously in Section 3-7).
(2) Low output resistance Ro : which is desirable from the
standpoint of transfering the op-amp’s output voltage to
a load circuit.
(3) High open loop voltage gain A: which is the key, as we
see later, to allowing us to further simplify the equivalent
circuit into an “ideal” op-amp model with infinite gain.
1 to 100 �
5 to 24 V
Example 4-1: Noninverting Amplifier
The circuit shown in Fig. 4-7 uses an op amp to amplify the
input signal voltage υs . The circuit uses feedback to connect
the op-amp output (at node a) to the inverting input terminal
υn through a resistor R1 . Obtain an expression for the circuit
gain G = υo /υs , and then evaluate it for Vcc = 10 V, A = 106 ,
Ri = 10 M�, Ro = 10 �, R1 = 80 k�, and R2 = 20 k�.
Solution: For reference purposes, we label the output as
terminal a and the node from which a current is fed back into the
op amp as terminal b. The current i3 flowing from terminal b to
terminal a is the same as the current i4 flowing from terminal a
towards Ro . (The presence of the voltmeter used to measure
υo has no impact on the operation of the circuit because of the
very high input resistance of the voltmeter.) When expressed in
terms of node voltages, the equality i3 = i4 gives
υo − A(υp − υn )
υn − υo
=
R1
Ro
υp ip
in
υn
(node a).
(4.5)
At node b, KCL gives i1 + i2 + i3 = 0, or
υn − υp
υn
υn − υo
+
+
= 0.
Ri
R2
R1
+
+
Ro
(υp − υn) Ri
A(υp − υn)
−
+
_
−
−
io
+
υo
(node b).
(4.6)
Additionally,
υp = υs .
(4.7)
Solution of these simultaneous equations leads to the following
expression for the circuit gain G:
υo
[ARi (R1 + R2 ) + R2 Ro ]
=
.
υs
AR2 Ri + Ro (R2 + Ri ) + R1 R2 + Ri (R1 + R2 )
(4.8)
For Vcc = 10 V, A = 106 , Ri = 107 �, Ro = 10 �,
R1 = 80 k�, and R2 = 20 k�,
G=
Figure 4-6: Equivalent circuit model for an op amp operating
in the linear range (υo ≤ |Vcc |). Voltages υp , υn , and υo are
referenced to ground.
G=
υo
= 4.999975 ≈ 5.0.
υs
(4.9)
4-1
OP-AMP CHARACTERISTICS
189
Vcc = 10 V
υp
υs
υo ≈
+
υn
i4
Ro
Ri
+
_
(
)
R1 + R2
υs
R2
a
A(υp − υn)
+
_
_
+
R1
−Vcc = −10 V
i1
Negative feedback
(connecting output to
negative input terminal)
υn
i3
υo
b
i2
_
R2
Figure 4-7: Noninverting amplifier circuit of Example 4-1.
In the expression for G, the two parameters A and Ri are several
orders of magnitude larger than all of the others. Also, Ro is in
series with R1 , which is 8000 times larger. Hence, we would
incur minimal error if we let A → ∞, Ri → ∞, and Ro → 0,
in which case the expression for G reduces to
G≈
R1 + R2
R2
(ideal op-amp model).
(4.10)
This approximation, based on the ideal op-amp model that will
be introduced in Section 4-3, gives
G=
80 k� + 20 k�
= 5.
20 k�
Concept Question 4-3: How is an op amp used as a
switch? (See
)
Concept Question 4-4: An op amp is characterized by
three important input-output attributes. What are they?
(See
)
Exercise 4-1: In the circuit of Example 4-1 shown in
Fig. 4-7, insert a series resistance Rs between υs and υp
and then repeat the solution to obtain an expression for G.
Evaluate G for Rs = 10 � and use the same values listed
in Example 4-1 for the other quantities. What impact does
the insertion of Rs have on the magnitude of G?
Answer:
Concept Question 4-1: How is the linear range of an op
amp defined? (See
G=
)
= 4.999977
Concept Question 4-2: What is the difference between
the op-amp gain A and the circuit gain G? (See
)
[A(Ri + Rs )(R1 + R2 ) + R2 Ro ]
[AR2 (Ri + Rs ) + Ro (R2 + Ri + Rs )
+ R1 R2 + (Ri + Rs )(R1 + R2 )]
(See
)
(negligible impact).
190
TECHNOLOGY BRIEF 9: DISPLAY TECHNOLOGIES
Technology Brief 9
Display Technologies
• During operation, the cathode emits streams of
electrons into the electron gun.
From cuneiform-marked clay balls to the abacus to
today’s digital projection technology, advances in visual
displays have accompanied almost every major leap
in information technology. While the earliest “modern”
computers relied on cathode ray tubes (CRT) to project
interactive images, today’s computers can access a wide
variety of displays ranging from plasma screens and LED
arrays to digital micromirror projectors, electronic ink, and
virtual reality interfaces. In this Technology Brief, we will
review the major technologies currently available for twodimensional visual displays.
• The emitted electron stream is steered onto different
parts of the positively charged screen by the electron
gun; the direction of the electron stream is controlled
by the electric field of the deflecting coils through
which the beam passes.
• The screen is composed of thousands of tiny dots
of phosphorescent material arranged in a twodimensional array. Every time an electron hits a
phosphor dot, it glows a specific color (red, blue,
or green). A pixel on the screen is composed of
phosphors of these three colors.
Cathode Ray Tube (CRT)
• In order to make an image appear to move on
the screen, the electron gun constantly steers the
electron stream onto different phosphors, lighting
them up faster than the eye can detect the changes,
and thus, the images appear to move. In modern
color CRT displays, three electron guns shoot
different electron streams for the three colors.
The earliest computers relied on the same technology
that made the television possible. In a CRT television or
monitor (Fig. TF9-1), an electron gun is placed behind a
positively charged glass screen, and a negatively charged
electrode (the cathode) is mounted at the input of the
electron gun.
Electron beam
Deflecting coil
Anodes
Electron-emitting
heated cathode
Light emitted
from phosphor
Focusing anode
Deflecting coil
Evacuated
glass enclosure
Figure TF9-1: Schematic of CRT operation.
TECHNOLOGY BRIEF 9: DISPLAY TECHNOLOGIES
Horizontal
polarization filter
191
Glass
Front display glass
with color filter
Polarized
light
Row and column
electrodes
Vertical
polarization filter
Figure TF9-2: Schematic of LCD operation.
The basic concept behind CRT was explored in the
early 2000s in the development of field emission
displays (FED), which used a thin film of atomically sharp
electron emitter tips to generate electrons. The electrons
emitted by the film collide with phosphor elements just
as in the traditional CRT. The primary advantage of this
type of “flat-panel” display is that it can provide a wider
viewing angle (i.e., one can look at an FED screen at a
sharp angle and still see a good image) than possible with
conventional LCD or LED technology (discussed next).
Liquid Crystal Displays (LCD)
LCDs are used in digital clocks, cellular phones, desktop
and laptop computers, and some televisions and other
electronic systems. They offer a decided advantage over
other display technologies (such as cathode ray tubes)
in that they are lighter and thinner and consume a lot
less power to operate. LCD technology relies on special
electrical and optical properties of a class of materials
known as liquid crystals, first discovered in the 1880s
by botanist Friedrich Reinitzer. In the basic LCD display,
light shines through a thin stack of layers as shown in
Fig. TF9-2.
• Each stack consists of layers in the following
order (starting from the viewer’s eye): color filter,
vertical (or horizontal) polarizer filter, glass plate with
transparent electrodes, liquid crystal layer, second
glass plate with transparent electrodes, horizontal (or
vertical) polarizer filter.
• Light is shone from behind the stack (called the
backlight). As light crosses through the layer stack,
it is polarized along one direction by the first filter.
• If no voltage is applied on any of the electrodes, the
liquid crystal molecules align the filtered light so that
it can pass through the second filter.
• Once through the second filter, it crosses the color
filter (which allows only one color of light through)
and the viewer sees light of that color.
• If a voltage is applied between the electrodes on the
glass plates (which are on either side of the liquid
crystal), the induced electric field causes the liquid
crystal molecules to rotate. Once rotated, the crystals
no longer align the light coming through the first filter
so that it can pass through the second filter plate.
• If light cannot cross, the area with the applied
voltage looks dark. This is precisely how simple
hand-held calculator displays work; usually the bright
background is made dark every time a character is
displayed.
Modern monitors, laptops, phones, and tablets use a
version of the LCD called thin-film transistor (TFT) LCD;
these also are known as active matrix displays. In TFT
192
LCDs, several thin films are deposited on one of the
glass substrates and patterned into transistors. Each color
component of a pixel has its own microscale transistor
that controls the voltage across the liquid crystal; since
the transistors only take up a tiny portion of the pixel
area, they effectively are invisible. Thus, each pixel has
its own electrode driver built directly into it. This specific
feature enabled the construction of the flat high-resolution
screens now in common use (and made the CRT display
increasingly obsolete). Since LCD displays also weigh
considerably less than a CRT tube, they enabled the
emergence of laptop computers in the 1980s. Early
laptops used large, heavy monochrome LCDs; most of
today’s mobile devices use active-matrix displays.
Light-Emitting Diode (LED) Displays
A different but very popular display technology employs
tiny light-emitting diodes (LED) in large pixel arrays on
flat screens (see Technology Brief 5 on LEDs). Each pixel
in an LED display is composed of three LEDs (one each
of red, green, and blue). Whenever a current is made to
pass through a particular LED, it emits light at its particular
color. In this way, displays can be made flatter (i.e., the
LED circuitry takes up less room than an electron gun
or LCD) and larger (since making large, flat LED arrays
technically is less challenging than giant CRT tubes or
LCD displays). Unlike LCDs, LED displays do not need a
backlight to function and easily can be made multicolor.
Modern LED research is focused mostly on flexible and
organic LEDs (OLEDs), which are made from polymer
light-emitting materials and can be fabricated on flexible
substrates (such as an overhead transparency). Flexible
displays of this type have been demonstrated by several
groups around the world.
Plasma Displays
Plasma displays have been around since 1964 when
invented at the University of Illinois.While attractive due to
their low profile, large viewing angle, brightness, and large
screen size, they largely were displaced in the 1980s in
the consumer market by LCD displays for manufacturingcost reasons. In the late 1990s, plasma displays became
popular for high-definition television (HDTV) systems.
Each pixel in a plasma display contains one or more
microscale pocket(s) of trapped noble gas (usually neon
or xenon); electrodes patterned on a glass substrate are
placed in front and behind each pocket of gas (Fig.TF9-3).
TECHNOLOGY BRIEF 9: DISPLAY TECHNOLOGIES
Plasma cells
with phosphors
Insulator
Light
Row and column
electrodes
Front display glass
Figure TF9-3: Plasma display.
The back of one of the glass plates is coated with
light-emitting phosphors. When a sufficient voltage is
applied across the electrodes, a large electric field is
generated across the noble gas, and a plasma (ionized
gas) is ignited. The plasma emits ultraviolet light which
impacts the phosphors; when impacted with UV light, the
phosphors emit light of a certain color (blue, green, or
red). In this way, each pocket can generate one color.
Electronic Ink
Electronic ink, e-paper, or e-ink are all names for a set of
display technologies made to look like paper with ink on it.
In all cases, the display is very thin (almost as thin as real
paper), does not use a backlight (ambient light is reflected
off the display, just like real paper), and little to no power
is consumed when the image is kept constant. The first
version of e-paper was invented in the 1970s at Xerox,
but it was not until the 1990s that a commercially viable
version was developed at MIT. A number of electronic ink
technologies are in production or in development.
• Most common electronic ink technologies trap a thin
layer of oil between two layers of glass or plastic onto
which have been patterned transparent electrodes.
The total stack is usually less than a tenth of a
millimeter.
• Within the oil are suspended charged particles. In
some versions, the oil is colored.
TECHNOLOGY BRIEF 9: DISPLAY TECHNOLOGIES
193
Table TT9-1: A comparison of some characteristics of common display technologies; see also http://en.wikipedia.org/wiki/
Comparison of CRT, LCD, Plasma, and OLED.
Pros
• Good dynamic range (~15,000 : 1)
• Very little distortion
• Excellent viewing angle
• No inherent pixels
Cons
Cathode Ray Tube (CRT)
• Large and heavy, limiting maximum practical size
• High power consumption and heat generation
• Burn-in possible
• Produces noticeable flicker at low refresh rates
• Minimum size for color limited to 7” diagonal
• Can contain lead, barium, and cadmium, which are toxic
Plasma Displays
• Excellent contrast ratios (~1,000,000 : 1)
• Large minimum pixel pitch; suitable for larger displays
• Sub-millisecond response time
• High power consumption than LCD
• Near zero distortion
• Limited color depth since plasma pixels can only be turned
on or off, no grading of emission
• Excellent viewing angle
• Very scalable (easier than other technologies to make large
• Image burn-in possible
displays)
Organic Light-Emitting Diode (LED) Displays
• Excellent viewing angle
• Limited lifetime of organic materials (but progress in this
area is rapid)
• Very light
• Very fast, so no image distortion during fast motion
• Burn-in possible
• Excellent color quality because no backlight is used
• More expensive than other technologies (ca. 2012)
Liquid Crystal Displays (LCD)
• Small and light
• Limited viewing angle
• Lower power consumption than plasma or CRT
• Slower response than plasma or CRT can cause
image distortion during fast motion
• No geometric distortion
• Can be made in almost any size or shape
• Slow response at low temperatures
• Liquid crystal has no inherent resolution limit
• Requires a backlight, which can vary across screen
Digital Light Projection (DLP) Displays
• No burn-in
• Requires light source replacement
• Cheaper than LCD or plasma displays
• Reduced viewing angle compared with CRT, plasma, and LCD
• DLPs with LED and laser sources do not need light source
• Some viewers perceive the colors in the projection,
replacement very often
• Excellent for very large screens (theaters) due to possibility
producing a rainbow effect
of using multiple color sources (color depth) and no
inherent size limitation to hardware
Electronic Ink Displays
• Very low power consumption
• Slow, consumer units not yet suitable for fast video
• Works with reflected light; excellent for viewing in bright light • Ghost images persist without refresh
• Lightweight
• Color displays are still under development
• Flexible and bendable
• Applying a potential across the electrodes on either
side of the oil suspension attracts the charged
particles to either the top or bottom substrates
(depending on the polarity). Some displays use white
particles in black fluid. Thus, when the white particles
move to the top, they block the black fluid and
the display appears white. When they move to the
bottom, the display appears dark. Some displays use
194
TECHNOLOGY BRIEF 9: DISPLAY TECHNOLOGIES
Micromirror
pixel
Digital
micromirror
chip
Lens
Projected
light
Lens
Light
source
Figure TF9-4: A typical digital light processor (DLP) arrangement includes a light source, lenses, and a micromirror array that
steers the light to create projected pixels.
a combination of black and white particles to achieve
the same effect.
Digital Light Processing (DLP)
Digital light processing (DLP) is the name given to
a technology that uses arrays of individual, micromechanical mirrors to manipulate light at each pixel
position. Invented in 1987 by Dr. Hornbeck at Texas
Instruments, this technology has revolutionized projection
technology; many of today’s digital projectors are made
possible by DLP chips. DLP also was used heavily in
large, rear-projection televisions.
• A basic DLP consists of an array of metal
micromirrors, each about 100 micrometers on a side
(Fig. TF9-4(inset)). One micromirror corresponds to
one pixel on a digital image.
• Each micromirror is mounted on micromechanical
hinges and can be tilted towards or away from a light
source several thousand times per second!
• The mirrors are used to reflect light from a light source
(housed within the television or projector case) and
through a lens to project it either from behind a
screen (as is the case in rear-projection televisions)
or onto a flat surface (in the case of projectors), as
in (Fig. TF9-4). If a micromirror is tilted away from
the light source, that pixel on the projected image
becomes dark (since the mirror is not passing the
light onto the lens).
• If it is tilted towards the light source, the pixel lights
up. By varying the relative time a given mirror is in
each position, grey values can be generated as well.
• Color can be added by using multiple light sources
and either one chip (with a filter wheel) or three chips.
The three-chip color DLP used in high-resolution
cinema systems can purportedly generate 35 trillion
different colors!
4-2
4-2
NEGATIVE FEEDBACK
195
Negative Feedback
with
G≈
Feedback refers to taking a part of the output signal
and feeding it back into the input. It is called positive
feedback if it increases the intensity of the input signal,
and it is called negative feedback if it decreases it. In
negative feedback, the output terminal is connected to the
υn terminal, either directly or through a resistor. Positive feedback causes the op amp to saturate, thereby
forcing its output voltage υo to become equal to its supply
voltage Vcc . This behavior is used to advantage in certain types
of applications but they are outside the scope of this book.
Negative feedback, on the other hand, is an essential ingredient
of all of the op-amp circuits covered in this and forthcoming
chapters.
Why do some op-amp circuits need feedback and why
negative feedback specifically? It seems counter-intuitive to
want to decrease the input signal when the intent is to amplify
it! We will answer this question by examining the circuit of
Example 4-1 in some detail. To facilitate the discussion we
have reproduced the circuit diagram (into a smaller version)
and inserted it in Fig. 4-8(a).
When we say an op amp has a supply voltage Vcc of 10 V,
we actually mean that a positive (10 V) dc voltage source is
connected to pin 7 of its package and another, negative (−10 V)
source is connected to its pin 4 (Fig. 4-2(b)). The op-amp circuit
cannot generate an output voltage υo that exceeds its supply
voltage. Hence, υo is bounded to ±Vcc which means
|υo | ≤ Vcc ,
R1 + R2
.
R2
(4.13)
Inserting Eq. (4.12) into Eq. (4.11) gives
|Gυs | ≤ Vcc ,
(4.14)
−Vcc
Vcc
≤ υs ≤
,
G
G
(4.15)
or
which states that the linear dynamic range of υs is inversely
proportional to the circuit gain G.
(a) Unity Gain: If R2 = ∞ (open circuit between node b and
ground in the circuit of Fig. 4-8(a)), Eq. (4.13) gives G ≈ 1.
The corresponding dynamic range of υs extends from −Vcc to
+Vcc , the same as the output. The input-output transfer plot
relating υo to υs is displayed in green in Fig. 4-8(b).
(b) Modest Gain: If we choose R1 /R2 = 4, Eq. (4.13) gives
G = 5, and the dynamic range of υs now extends from
−(10/5) = −2V to +2 V. Thus, the gain is higher than the
unity-gain case by a factor of 5, but the dynamic range of υs is
narrower by the same factor.
(c) Maximum Gain: If R1 is removed (replaced with an open
circuit between nodes a and b) and R2 is set equal to zero (short
circuit), no feedback will take place in the circuit of Fig. 4-8(a).
Use of the exact expression for G given by Eq. (4.8) leads
to G = A. Since A = 106 , the absence of feedback provides
a huge gain, but operationally υs becomes limited to a very
narrow range extending from −10 μV to +10 μV.
Application of negative feedback offers a trade-off
between circuit gain and dynamic range for the input
voltage. or equivalently,
−Vcc ≤ υo ≤ Vcc .
(4.11)
Concept Question 4-5: Why is negative feedback used
Thus, the linear dynamic range of υo extends from −Vcc to
+Vcc .
According to Example 4-1, υo is related to the signal
voltage υs by
υo = Gυs ,
(4.12)
in op-amp circuits? (See
)
Concept Question 4-6: How large is the circuit gain G in
the absence of feedback? How large is it with 100 percent
feedback (equivalent to setting R1 = 0 in the circuit of
Fig. 4-8(a))? (See
)
196
CHAPTER 4
OPERATIONAL AMPLIFIERS
υ0
Vcc
Vcc = 10 V
υp
υs
+
_
+
i4 a
Ro
Ri
υn
G = 1, |υs| < Vcc
G = 5, |υs| < Vcc / 5
G = 10, |υs| < Vcc / 10
+
_
_
+
A(υp − υn)
υo
υs
R1
−Vcc
i1
Feedback
υn
i3
b
i2
R2
Dynamic range
(high gain)
Dynamic range
(modest gain)
Dynamic range
(unity gain)
(a)
(b) Input-output transfer plots
Figure 4-8: Trade-off between gain and dynamic range.
Exercise 4-2: To evaluate the trade-off between the
circuit gain G and the linear dynamic range of υs , apply
Eq. (4.8) to find the magnitude of G and then determine
the corresponding dynamic range of υs for each of the
following values of R2 : 0 (no feedback), 800 �, 8.8 k�,
40 k�, 80 k�, and 1 M�. Except for R2 , all other
quantities remain unchanged.
Answer:
(See
)
R2
G
υs Range
0
800 �
8.8 k�
40 k�
80 k�
1 M�
106
−10 μV to +10 μV
−99 mV to +99 mV
−0.99 V to +0.99 V
−3.3 V to +3.3 V
−5 V to +5 V
−9.26 V to +9.26 V
101
10.1
3
2
1.08
4-3 Ideal Op-Amp Model
We noted in Section 4-1 that the op amp has a very large
input resistance Ri on the order of 107 �, a relatively small
output resistance Ro on the order of 1–100 �, and an openloop gain A ≈ 106 . Usually, the series resistances of the input
circuit connected to terminals υp and υn are several orders
of magnitude smaller than Ri . Consequently, not only will
very little current flow through the input circuit, but also the
voltage drop across the input-circuit resistors will be negligibly
small in comparison with the voltage drop across Ri . These
considerations allow us to simplify the equivalent circuit of the
op amp by replacing it with the ideal op-amp circuit model
shown in Fig. 4-9, in which Ri has been replaced with an open
circuit. An open circuit between terminals υp and υn implies
4-3
IDEAL OP-AMP MODEL
197
Table 4-2: Characteristics of the ideal op-amp model.
ip = 0
υp
+
υn
(Ri =
_
)
8
in = 0
(Ro = 0)
+
Ideal Op Amp
υo
• Current constraint
• Voltage constraint
• A = ∞ Ri = ∞
ip = in = 0
υp = υn
Ro = 0
Noninverting Amplifier
Figure 4-9: Ideal op-amp model.
Rs
υn in = 0
the following ideal op-amp current constraint:
ip = in = 0
(ideal op-amp model).
(4.16)
In reality, ip and in are very small but not identically zero; for
if they were, there would be no amplification through the op
amp. Nevertheless, the current condition given by Eq. (4.16)
will prove quite useful.
Similarly, at the output side, if the load resistor connected in
series with Ro is several orders of magnitude larger than Ro ,
then Ro can be ignored by setting it equal to zero. Finally, in
the ideal op-amp model, the large open-loop gain A is made
infinite—the consequence of which is that
υo
υp − υn =
→0
A
υp ip = 0
as A → ∞.
υs
+
_
+
υo
−
R1
Rinput
υn
R2
υp = υn
Rinput ≈ Ri ≈ ∞
(a)
Circuit
υs
(b)
G=
R1 + R2
R2
υo = Gυs
Block-diagram representation
Figure 4-10: Noninverting amplifier circuit: (a) using ideal
op-amp model and (b) equivalent block-diagram representation.
Hence, we obtain the ideal op-amp voltage constraint
υp = υn
(ideal op-amp model).
(4.17)
In reality υp and υn are not exactly equal, but very close
to being equal, and only when negative feedback is in use.
Nevertheless, setting υp = υn leads to highly accurate results
when relating the output to the input. In summary:
The ideal op-amp model characterizes the op amp in
terms of an equivalent circuit in which Ri = ∞, Ro = 0,
and A = ∞. The operative consequences are given by Eqs. (4.16) and (4.17)
and in Table 4-2.
To illustrate the utility of the ideal op-amp model, let us reexamine the circuit we analyzed earlier in Example 4-1, but we
will do so this time using the ideal model. The new circuit, as
shown in Fig. 4-10, includes a source resistance Rs , but because
the op amp draws no current (ip = 0), there is no voltage drop
across Rs . Hence,
υp = υs ,
(4.18)
and on the output side, υo and υn are related through voltage
division by
R1 + R2
(4.19)
υn .
υo =
R2
Using these two equations, in conjunction with υp = υn (from
Eq. (4.17)), we end up with the following result for the circuit
198
CHAPTER 4
OPERATIONAL AMPLIFIERS
4-4 Inverting Amplifier
gain G:
G=
υo
=
υs
R1 + R2
R2
(4.20)
,
In an inverting amplifier op-amp circuit, the input
source is connected to terminal υn (instead of to
terminal υp ) through an input source resistance Rs , and
terminal υp is connected to ground. which is identical to Eq. (4.10).
The input resistance of the noninverting amplifier
circuit shown in Fig. 4-10 is the Thévenin resistance of
the op-amp circuit as seen by the input source υs . Because
ip = 0, it is easy to show that Rinput = Ri ≈ ∞, where Ri
is the input resistance of the op amp (typically on the order
of 109 �). From here on forward, we use the ideal op-amp model
exclusively. Feedback from the output continues to be applied at υn (through
a feedback resistance Rf ), as shown in Fig. 4-11. It is called an
inverting amplifier because (as we will see shortly) the circuit
gain G is negative.
To relate the output voltage υo to the input signal voltage υs ,
we start by writing down the node-voltage equation at
terminal υn as
)
(4.21)
υn − υo
υn − υs
+
+ in = 0.
Rs
Rf
(4.22)
or
Concept Question 4-7: What are the current and voltage
constraints of the ideal op amp? (See
i1 + i2 + in = 0
Upon invoking the op-amp current constraint given by
Eq. (4.16), namely in = 0, and the voltage constraint υn = υp ,
Concept Question 4-8: What are the values of the input
and output resistances of the ideal op amp? (See
)
Inverting Amplifier
Rf
Concept Question 4-9: In the ideal op-amp model, Ro
is set equal to zero. To satisfy such an approximation,
does the load resistance need to be much larger or much
smaller than Ro? Explain. (See
)
Exercise 4-3: Consider the noninverting amplifier circuit
of Fig. 4-10(a) under the conditions of the ideal op-amp
model. Assume Vcc = 10 V. Determine the value of G
and the corresponding dynamic range of υs for each of
the following values of R1 /R2 : 0, 1, 9, 99, 103 , 106 .
Answer:
R1 /R2
G
0
1
9
99
1000
106
1
2
10
100
∼ 1000
∼ 106
(See
)
υs Range
−10 V to +10 V
−5 V to +5 V
−1 V to +1 V
−0.1 V to +0.1 V
−10 mV to +10 mV (approx.)
−10 μV to +10 μV (approx.)
Rs
υs
+
+
-_
i1
i2
in = 0
υn
υp ip = 0
Rinput
Feedback
−
υo
+
RL
υp = υn
Rinput ≈ Rs
(a)
Circuit
υs
(b)
G = − (Rf /Rs)
υo = Gυs
Block diagram
Figure 4-11: Inverting amplifier circuit and its block-diagram
equivalent.
4-4
INVERTING AMPLIFIER
199
as well as recognizing that υp = 0 (because terminal υp is
connected to ground), we obtain the relationship
υo = −
Rf
Rs
υs .
υo
Rf
=−
.
υs
Rs
R1
(4.23)
The circuit voltage gain of the inverting amplifier therefore is
given by
G=
Rf
is
υn
υp
R2
+
−
+
υo
RL
(4.24)
(a)
Original circuit
In addition to amplifying υs by the ratio (Rf /Rs ), the
inverting amplifier also reverses the polarity of υs . Rf
Rs = R1 + R2
υo is independent of the magnitude of the load
resistance RL , so long as RL is much larger than the opamp output resistance Ro (which is an implicit assumption
of the ideal op-amp model). Because υn = 0, a Thévenin analysis of the circuit in
Fig. 4-11(a) would reveal that the input resistance of
the inverting amplifier circuit (as seen by source υs ) is
Rinput = RTh = Rs .
+
_
+
−
υp
υs = isR2
(b)
υn
+
υo
RL
After source transformation
Figure 4-12: Inverting amplifier circuit of Example 4-2.
Caution: Under the ideal op-amp model, it is not
possible to compute io , the current that flows into the op
amp from output terminal υo . Hence, it is inappropriate
to apply KCL at that terminal because additional current
can be delivered by the supply voltage sources Vcc and
−Vcc . Example 4-2: Amplifier with Input Current Source
For the circuit shown in Fig. 4-12(a): (a) obtain an expression
for the input-output transfer function Kt = υo /is and evaluate
it for R1 = 1 k�, R2 = 2 k�, Rf = 30 k�, and RL = 10 k�;
and (b) determine the linear dynamic range of is if Vcc = 20 V.
Solution: (a) Application of the source transformation
method converts the combination of is and R2 into a voltage
source υs = is R2 , in series with a resistance R2 . Upon
combining R2 in series with R1 , we obtain the new circuit
shown in Fig. 4-12(b), which is identical in form to the inverting
amplifier circuit of Fig. 4-11, except that now the source
resistance is Rs = (R1 + R2 ). Hence, application of Eq. (4.23)
gives
Rf
υo = −
R1 + R 2
Rf
υs = −
R1 + R 2
R2 is ,
(4.25)
from which we obtain the transfer function
Kt =
υo
Rf R2
=−
.
is
R1 + R 2
For R1 = 1 k�, R2 = 2 k�, and Rf = 30 k�,
Kt =
υo
= −2 × 104
is
(b) From the expression for Kt ,
is = −
υo
,
2 × 104
(V/A).
(4.26)
200
CHAPTER 4
and since |υo | is bounded by Vcc = 20 V, the linear range for is
is bounded by
|is | = Vcc 20 =
= 1 mA.
2 × 104 2 × 104 OPERATIONAL AMPLIFIERS
Inverting Summing Amplifier
Summing point
R1
R2
Thus, the linear range of is extends from −1 mA to +1 mA.
υ1
+
_
υ2
+
_
υp
υn
Concept Question 4-10: How does feedback control the
gain of the inverting-amplifier circuit? (See
Rf
_
+
υo
Original circuit
)
(a)
Concept Question 4-11: The expression given by
Eq. (4.24) states that the gain of the inverting amplifier
is independent of the magnitude of RL. Would the
expression remain valid if RL = 0? Explain. (See
)
is1 =
υ1
R1
is2 =
is1
Exercise 4-4: The input to an inverting-amplifier circuit
R1
Rf
υ2
R2
is2
R2
υp
υn
_
+
After source
transformation
consists of υs = 0.2 V and Rs = 10 �. If Vcc = 12 V,
what is the maximum value that Rf can assume before
saturating the op amp?
Answer: Gmax = −60, Rf = 600 �. (See
4-5
C3
(b)
)
Rf
υ1R2 + υ2R1
υs = R + R
1
2
Inverting Summing Amplifier
By connecting multiple sources in parallel at terminal υn of
the inverting amplifier, the circuit becomes an adder (or more
precisely a scaled inverting adder), as depicted by the block
diagram of Fig. 4-13(d). After we demonstrate how such a
circuit (usually called an inverting summing amplifier) works
for two input voltages υ1 and υ2 , we will extend it to multiple
sources. There are many applications where we may want to
scale and add multiple voltages together, such as combining or
averaging results from several sensors.
For the circuit shown in Fig. 4-13(a), our goal is to relate
the output voltage υo to υ1 and υ2 . To do so, we apply the
source-transformation technique so as to cast the input circuit
in the form of a single voltage source υs in series with a
source resistance Rs . The steps involved in the transformation
are illustrated in Fig. 4-13(b) and (c). Voltage to current
transformation gives is1 = υ1 /R1 and is2 = υ2 /R2 , which can
be combined together into a single current source as
is = is1 + is2 =
υ1
υ2
υ1 R2 + υ2 R1
+
=
.
R1
R2
R1 R 2
υo
(4.27)
υs
Rs
+
_
υp
υn
_
+
(c)
After combining and retransforming
υ1
G1 = − Rf /R1
υ2
G2 = − Rf /R2
(d)
+
υo
υo = G1υ1 + G2υ2
Block diagram representation
Figure 4-13: Inverting summing amplifier.
Similarly, the two parallel resistors add up to
Rs =
R 1 R2
.
R1 + R 2
(4.28)
4-5
INVERTING SUMMING AMPLIFIER
201
If we transform (is , Rs ) into a voltage source (υs , Rs ), we get
υs = is Rs =
υ1 R2 + υ2 R1
R1 R2
υ1 R2 + υ2 R1
R1 R2
=
.
R1 + R 2
R1 + R 2
(4.29)
The circuit in Fig. 4-13(c) is identical in form to that of the
inverting amplifier of Fig. 4-11. Hence, by applying the inputoutput voltage relationship given by Eq. (4.23), we have
Rf
υo = −
Rs
υ1 R2 + υ2 R1
Rf
υs = − R 1 R2
R1 + R2
R1 + R 2
Rf
Rf
υ1 −
(4.30)
υ2 .
=−
R1
R2
Generalizing to the case where the input consists of n input
voltage sources υ1 to υn (and associated source resistances
R1 to Rn , respectively), all connected in parallel at the same
summing point (terminal υn ), the output voltage becomes
Rf
Rf
Rf
υ1 + −
υ2 + · · · + −
υn .
υo = −
R1
R2
Rn
(4.34)
Example 4-3: Summing Circuit
Use inverting amplifiers to design a circuit that performs the
operation
υo = 4υ1 + 7υ2 .
This expression for υo can be written in the form
υo = G1 υ1 + G2 υ2 ,
(4.31)
where G1 = −(Rf /R1 ) is the (negative) gain applied to source
voltage υ1 , and G2 = −(Rf /R2 ) is the gain applied to υ2 . Thus:
The summing amplifier scales υ1 by negative gain G1
and υ2 by negative gain G2 and adds them together. Solution: The desired circuit has to amplify υ1 by a factor
of 4, amplify υ2 by a factor of 7, and add the two together.
A summing amplifier can do that, but it also inverts the sum.
Hence, we will need to use a two-stage cascaded circuit with
the first stage providing the desired operation within a “−” sign
and then follow it up with an inverting amplifier with a gain of
(−1). The two-stage circuit is shown in Fig. 4-14.
For the first stage, we need to select values for R1 , R2 , and Rf1
such that
Rf1
Rf1
=4
and
= 7.
R1
R2
Since we have only two constraints, we can satisfy the specified
ratios with an infinite number of combinations. Arbitrarily, we
choose Rf1 = 56 k�, which then specifies the other resistors as
4-5.1 Special Cases
For the special case where R1 = R2 = R,
υo = −
Rf
R
(υ1 + υ2 )
equal gain
R1 = R2 = R
R1 = 14 k�
,
(4.32)
inverted adder
.
R1 = R2 = Rf
R2 = 8 k�.
For the second stage, a gain of (−1) requires that
Rf2
= 1.
Rs2
and if additionally Rf = R1 = R2 , then G1 = G2 = −1. In this
case, the summing amplifier becomes an inverted adder with
υo = −(υ1 + υ2 )
and
(4.33)
Arbitrarily, we choose Rf2 = Rs2 = 20 k�.
4-5.2
Noninverting Summer
To perform the summing operation, the solution offered in
Example 4-3 employed two inverting amplifier circuits—one
202
CHAPTER 4
Rf1
R1
υ1
+
_
υn1
υ2
υo1
+
υp1
+
_
Rf2
−
R2
υo1 =
OPERATIONAL AMPLIFIERS
Rs2 υn
2
−
υp2
+
(− RR ) υ + (− RR ) υ
f1
1
1
f1
2
υo2 =
2
Stage 1: Inverting summing amp
υo2
(− RR ) υ
f2
s2
o1
Stage 2: Inverting amp
(a) Two-stage circuit
Circuit Design
R1
R2
Rf1
Rs1
Rf2
14 kΩ
8 kΩ
56 kΩ
20 kΩ
20 kΩ
υ1
−4
υ2
+
υo1
−7
−1
υo2
(b) Block diagram
Figure 4-14: Two-stage circuit realization of υo = 4υ1 + 7υ2 .
to perform an inverted sum, and a second one to provide
multiplication by (−1). Alternatively, the same result can be
achieved by using a single op amp in a noninverting amplifier
circuit, as shown in Fig. 4-15.
From our analysis in Section 4-3, we established that the
output voltage υo of the noninverting amplifier circuit is related
to υp by
R1 + R2
υo
=G=
.
υp
R2
(4.35)
For the circuit in Fig. 4-15, in view of the ideal op-amp
constraint that the op amp draws no current (ip = 0), it is a
straightforward task to show that
(4.36)
Combining Eqs. (4.35) and (4.36) leads to
Rs2
Rs1 + Rs2
υ1 +
Rs1
Rs1 + Rs2
and
GRs2
=4
Rs1 + Rs2
GRs1
= 7.
Rs1 + Rs2
A possible solution that satisfies these two constraints is
Rs1 = 7 k, Rs2 = 4 k, and G = 11. Furthermore, the
specified value of G can be satisfied by choosing R1 = 50 k
and R2 = 5 k.
4-5.3 Multiple Ways of Building a System
υ1 Rs2 + υ2 Rs1
.
υp =
Rs1 + Rs2
υo = G
To realize a coefficient of 4 for υ1 and a coefficient of 7 for υ2 ,
it is necessary that
υ2 .
(4.37)
There are often several different choices for how to implement
a linear equation such as υo = 4υ1 + 7υ2 (Example 4-3) with
op-amp circuits. Here are a few options:
(a) υo = (4υ1 ) + (7υ2 ): Multiply υ1 by 4 (noninverting
amplifier with a gain of 4) and υ2 by 7 (noninverting
amplifier with a gain of 7), and then add them together
(noninverting summer with a gain of 1).
TECHNOLOGY BRIEF 10: COMPUTER MEMORY CIRCUITS
Technology Brief 10
Computer Memory Circuits
The storage of information in electronically addressable
devices is one of the hallmarks of all modern computer
systems. Among these devices are a class of storage
media, collectively called solid-state or semiconductor
memories, which store information by changing the state
of an electronic circuit. The state of the circuit usually
has two possibilities (0 or 1) and is termed a bit (see
Technology Brief 8). Values in memories are represented
by a string of binary bits; a 5-bit sequence [V1V2V3V4V5 ],
for example, can be used to represent any integer decimal
value between 0 and 31. How do computers store these
bits? Many types of technologies have emerged over the
last 40 years, so in this Brief, we will highlight some of the
principal technologies in use today or under development.
It is worth noting that memory devices usually store
these values in arrays. For example, a small memory
might store sixteen different 16-bit numbers; this memory
usually would be referred to as a 16 × 16 block or a 256bit memory. Of course, modern multi-gigabyte computer
memories use thousands of much larger blocks to store
very large numbers of bits (Fig. TF10-1).
203
Read-Only Memories (ROMs)
One of the oldest, still-employed, memory architectures
is the read-only memory (ROM). The ROM is so termed
because it can only be “written” once, and after that it can
only be read. ROMs usually are used to store information
that will not need to be changed (such as certain startup
information on your computer or a short bit of code always
used by an integrated circuit in your camera). Each bit in
the ROM is held by a single MOSFET transistor.
Consider the circuit in Fig. TF10-2(a), which operates
much like the circuit in Fig. 4-25. The MOSFET has three
voltages, all referenced to ground. For convenience, the
input voltage is labeled VREAD and the output voltage is
labeled VBIT . The third voltage, VDD , is the voltage of the
dc power supply connected to the drain terminal via a
resistor R. If VREAD � VDD , then the output registers a
voltage VBIT = VDD denoting the binary state “1,” but if
VREAD ≥ VDD , then the output terminal shorts to ground,
generating VBIT = 0 denoting the binary state “0.” But
how does this translate into a permanent memory on
a chip? Let us examine the 4-bit ROM diagrammed
in Fig. TF10-2(b). In this case, some bits simply do
not have transistors; VBIT2 , for example, is permanently
connected to VDD via a resistor. This may seem trivial,
Figure TF10-1: Integrated circuit die photo of a Micron MT4C1024 220 -bit DRAM chip. Die size is 8.662 mm × 3.969 mm.
(Courtesy of ZeptoBars.)
204
TECHNOLOGY BRIEF 10: COMPUTER MEMORY CIRCUITS
VDD (dc voltage source)
R
VBIT
VREAD
(a) 1-bit ROM
VDD (dc voltage source)
R
VBIT1
R
VBIT2
R
VBIT3
R
VBIT4
VREAD
(b) 4-bit ROM
Figure TF10-2: (a) 1-bit ROM that uses a MOSFET transistor, and (b) 4-bit ROM configured to store the sequence [0100],
whose decimal value is 4.
Random-Access Memories (RAMs)
categories: static RAMs and dynamic RAMs (DRAMs).
Because RAMs lose the state of their bits if the power
is removed, they are termed volatile memories. Static
RAMs not only can be read from and written to, but
also do not forget their state as long as power is
supplied. These circuits also are composed of transistors,
but each single bit in a modern static RAM consists
of four transistors wired up in a bi-stable circuit (the
explanation of which we will leave to your intermediate
digital components classes!). Dynamic RAMs, on the
other hand, are illustrated more easily. Dynamic RAMs
usually hold more bits per area than static RAMs, but
they need to be refreshed constantly (even when power
is supplied continuously to the chip).
RAMs are a class of memories that can be read to
and written from constantly. RAMs generally fall into two
Figure TF10-3 shows a simple one-transistor dynamic
RAM. Again, we will treat the transistor as we did in
but this specific 4-bit memory configuration always stores
the value [0100]. In this same way, thousands of such
components can be strung together in rows and columns
in N × N arrays. As long as a power supply of voltage
VDD is connected to the circuit, the memory will report
its contents to an external circuit as [0100]. Importantly,
even if you remove power altogether, the values are not
lost; as soon as you add power back to the chip, the same
values appear again (i.e., you would have to break the
chip to make it forget what it is storing!). Because of the
permanency of this data, these memories also often are
called nonvolatile memories (NVM).
TECHNOLOGY BRIEF 10: COMPUTER MEMORY CIRCUITS
205
Vcolumn
To other cells
Vrow
N1
C
To other cells
Figure TF10-3: 1-bit DRAM cell.
Section 4-11. Note that if we make VROW > VDD , then
the transistor will conduct and the capacitor C will start
charging to whatever value we select for VCOLUMN . When
writing a bit, VCOLUMN usually is set at either 0 (GND)
or 1 (VDD ). We can calculate how long this chargingup process will require, because we know the value
of C and the transistor’s current gain g (see Section
5-7). When the capacitor is charged to VDD , a value
of 1 is stored in the DRAM. Had we applied instead
a value of zero volts to VCOLUMN , the transistor would
have discharged to ground (instead of charged to VDD )
and the bit would have a value of 0. However, note that
unlike the ROM, the state of the bit is not “hardwired.”
That is, if even tiny leakage currents were to flow
through the transistor when it is not on (that is, when
VROW < VDD ), then charge will constantly leak away and
the voltage of the transistor will drop slowly with time.
After a short time (on the order of a few milliseconds in
the dynamic RAM in your computer), the capacitor will
have irrecoverably lost its value. How is that mitigated?
Well, it turns out that a modern memory will read and
then re-write every one of its (several billion) bits every
64 milliseconds to keep them refreshed! Because each
bit is so simple (one transistor and one capacitor), it is
possible to manufacture DRAMs with very high memory
densities (which is why 1-Gbit DRAMs are now available
in packages of reasonable size). Other variations of
DRAMs also exist whose architectures deviate slightly
from the previous model—at either the transistor or
system level. Synchronous Graphics RAM (SGRAM),
for example, is a DRAM modified for use with graphics
adaptors; Double Data Rate 4 RAM (DDR4RAM) is a
fourth-generation enhancement over DRAM which allows
for faster clock speeds and lower operating voltages.
Advanced Memories
Several substantially different technologies are emerging
that likely will change the market landscape—just as
Flash memories revolutionized portable memory (like
your USB memory stick). Apart from the drive to increase
storage density and access speed, one of the principal
drivers in today’s memory research is the development
of non-volatile memories that do not degrade over time
(unlike Flash).
The Ferroelectric RAM (FeRAM) is the first of these
technologies to enter mainstream production; FeRAM
replaces the capacitor in DRAM (Fig. TF10-3) with a
ferroelectric capacitor that can hold the binary state
even with power removed. While FeRAM can be faster
than Flash memories, FeRAM densities are still much
smaller than modern Flash (and Flash densities continue
to increase rapidly). FeRAM currently is used in niche
applications where the increased speed is important.
Magnetoresistive RAM (MRAM) is another emerging
technology, currently commercialized by Everspin Technologies (spun out from Freescale Semiconductor), which
relies on magnetic plates to store bits of data. In MRAM,
each cell is composed of two ferromagnetic plates
separated by an insulator. The storage and retrieval of
bits occurs by manipulation of the magnetic polarization
of the plates with associated circuits. Like FeRAM,
MRAM currently is overshadowed by Flash memories, but
improvements in density, speed, and fabrication methods
may make it a viable alternative in the mainstream
consumer market in the future. Even more speculative
is the idea of using single carbon nanotubes to store
binary bits by changing their configuration electronically;
this technology is currently known as Nano RAM (NRAM).
206
CHAPTER 4
υp ip = 0
Rs1
Rs2
υ1
+
_
υ2
υn
+
_
tion/summation is done must keep each individual stage
from exceeding +/ − Vcc .
+
υo
in = 0
−
R1
R2
( R R+ R ) ( R R+ R )
1
G1 =
υ2
R1 + R2
G1 =
R2
2
(
s1
)(
s2
Rs1
Rs1 + Rs2
)
• Sensitivity when adding large and small values. Care is
typically taken to add values that are similar in magnitude,
so amplification is typically done prior to summation if two
values have significantly different magnitudes.
• Other considerations . . .
Concept Question 4-12: What type of op-amp circuits
(inverting, noninverting, and others) might one use to
perform the operation υo = G1υ1 +G2υ2 with G1 and G2
both positive? (See
)
s2
2
υ1
OPERATIONAL AMPLIFIERS
+
υo = G1υ1 + G2υ2
Figure 4-15: Noninverting summer.
Concept Question 4-13: What is an inverting adder?
(See
)
Exercise 4-5: The circuit shown in Fig. 4-14(a) is to be
used to perform the operation
υo = 3υ1 + 6υ2 .
If R1 = 1.2 k�, Rs2 = 2 k�, and Rf2 = 4 k�, select
values for R2 and Rf1 so as to realize the desired result.
(b) υo = (−4υ1 −7υ2 )(−1): Multiply υ1 by −4 and υ2 by −7
and add them together (inverting summing amplifier with
gains of −4 and −7), and then multiply the result by −1
(inverting amplifier with a gain of −1).
(c) υo = (4υ1 + 7υ2 ): Multiply υ1 by 4 and υ2 by 7 and add
them together (noninverting summing amplifier with gains
of 4 and 7).
(d) υo = [(2υ1 )+(3.5υ2 )]×2: Multiply υ1 by 2 (noninverting
amplifier with a gain of 2) and υ2 by 3.5 (noninverting
amplifier with a gain of 3.5), and then add them
(noninverting summer with a gain of 2).
Why might you choose one of these systems over another?
There are several reasons:
• To minimize the number of op amps (option c)
• To meet gain limitations. An inverting amplifier can have
a gain of less than 1, but a noninverting amplifier cannot.
• To avoid saturation. The output voltage of any individual
stage is limited by its Vcc . The order in which multiplica-
Answer: Rf1 = 1.8 k�, R2 = 600 �. (See
)
4-6 Difference Amplifier
When an input signal υ2 is connected to terminal υp of a
noninverting amplifier circuit, the output is a scaled version
of υ2 . A similar outcome is generated by an inverting amplifier
circuit when an input voltage υ1 is connected to the op amp’s
υn terminal, except that in addition to scaling υ1 its polarity
is reversed as well. The difference amplifier circuit combines
these two functions to perform subtraction.
In the difference-amplifier circuit of Fig. 4-16(a), the input
signals are υ1 and υ2 , R2 is the feedback resistance, R1 is the
source resistance of υ1 , and resistances R3 and R4 serve to
control the scaling factor (gain) of υ2 . To obtain an expression
that relates the output voltage υo to the inputs υ1 and υ2 , we
apply KCL at nodes υn and υp . At υn , i1 + i2 + in = 0, which
is equivalent to
υn − υo
υn − υ1
+
+ in = 0
R1
R2
(node υn ).
(4.38)
4-6
DIFFERENCE AMPLIFIER
207
where the scale factors (gains) are given by
Difference Amplifier
R2
R1
υ1
i1
i3 υn ip = 0
R3
+
_
υ2
i2
in = 0
υp
+
_
G2 =
_
υo
+
i4
(
R4
R3 + R4
G2 =
υ1
R2
G1 = −
R1
)(
R1 + R2
R1
R1 + R2
R1
(4.42a)
G1 = −
R2
R1
(4.42b)
.
According to Fig. 4-16(b) which is a block-diagram representation of the difference amplifier circuit:
(a) Difference circuit
υ2
R4
R3 + R 4
and
RL
R4
The difference amplifier scales υ2 by positive gain G2 ,
υ1 by negative gain G1 and adds them together. )
+
For the difference amplifier to function as a subtraction circuit
with equal gain, its resistors have to be interrelated by
υo = G1υ1 + G2υ2
R2 R3 = R1 R4 ,
(b) Block diagram
(4.43)
in which case Eq. (4.41) reduces to
Figure 4-16: Difference-amplifier circuit.
At υp , i3 + i4 + ip = 0, or
υo =
υp
υp − υ2
+
+ ip = 0
R3
R4
(node υp ).
υo =
R4
R3 + R 4
R1 + R2
R1
υ2 −
R2
R1
(υ2 − υ1 )
(equal gain).
(4.44)
Exact subtraction with no scaling requires that R1 = R2 .
Exercise 4-6: The difference-amplifier circuit of Fig. 4-16
is used to realize the operation
υ1 ,
υo = (6υ2 − 2) V.
(4.40)
which can be cast in the form
υo = G2 υ2 + G1 υ1 ,
R2
R1
(4.39)
Upon imposing the ideal op-amp constraints ip = in = 0 and
υp = υn , we end up with
(4.41)
Given that R3 = 5 k�, R4 = 6 k�, and R2 = 20 k�,
specify values for υ1 and R1.
Answer: υ1 = 0.2 V, R1 = 2 k�. (See
C3
)
208
CHAPTER 4
4-7 Voltage Follower/Buffer
Rs
4-7.1 No Buffer
(without voltage follower),
(4.45)
which obviously is dependent on both Rs and RL , so if the load
resistance RL changes, so will the output voltage υo .
υo
+
_
υs
In electronic circuits, we often need to incorporate the
functionality of a relatively simple (but important) circuit that
serves to isolate the input source from variations in the load
resistance RL . Such a circuit is called a voltage follower, buffer,
or unity gain amplifier. To appreciate the utility of the voltage
follower, let us first examine the circuit shown in Fig. 4-17(a).
A source input circuit represented by its Thévenin equivalent
(υs , Rs ), is connected to a load RL . The output voltage is
υ s RL
υo =
Rs + R L
OPERATIONAL AMPLIFIERS
No buffer
RL
Source circuit
Load
(a) Source circuit connected directly to a load
Rs
υn in = 0
+
_
υs
υp ip = 0
Buffer
+
υo
_
RL
Source circuit
Load
(b) Source circuit separated by a buffer
Figure 4-17: The voltage follower provides no voltage gain
(υo = υs ), but it insulates the input circuit from the load.
4-7.2 With Op-Amp Buffer
In contrast, when the op-amp voltage follower circuit shown
in Fig. 4-17(b) is inserted in between the source circuit and
the load, the output voltage becomes completely independent
of both Rs and RL . Because ip = 0, it follows that υp = υs .
Furthermore, in view of the op-amp constraint υp = υn and
because the output node is connected directly to υn , it follows
that
υo = υp = υs
(with voltage follower),
When designing and building a multistage circuit,
designers usually insert buffers between adjacent stages,
which allows them to design each stage separately and
then cascade them all together with buffers in between
them. (4.46)
and this is true regardless of the values of Rs and RL (excluding
Rs = open circuit and/or RL = short circuit, either of which
would invalidate the entire circuit). Thus:
4-7.3 Input-Output Resistance
When is a buffer needed? Consider again the circuit in
Fig. 4-17(a). Let us examine υo for various values of Rs and RL .
Rs (k)
The output of the voltage follower follows the input
signal while remaining immune to changes in RL because
it has a high input resistance and low output resistance. A circuit that offers this type of protection is often called a
buffer.
1
1
1
1
RL (k) υo (V)
0.09
0.1
1
0.5
10
0.91
100
0.99
% change
Buffer needed?
91%
50%
9%
1%
Yes
Yes
Probably
No
If Rs < RL , or even if Rs ≈ RL , there is a substantial difference
between υo and υs . This is overloading the circuit, which we
4-8
OP-AMP SIGNAL-PROCESSING CIRCUITS
209
typically just call loading. Substantial current is drawn from
the source, and the voltage is decreased as a result. To prevent
this, a buffer is needed. But if Rs � RL , the change is minimal,
and the circuit does not require a buffer.
An additional interesting aspect of buffering has to do with
where the current is coming from and where it is going to in the
circuit. In Fig. 4-17(a), the current is coming from the source
and going to the load. Excess current is being drawn, and the
circuit is (over)loaded, thus reducing the output voltage υo . In
Fig. 4-17(b), the current is not coming from the source, but it is
going to the load. Where is it coming from? The answer is that
it is coming from the output of the buffer, extracted from the
power supply voltage Vcc that powers the op amp in the buffer.
Concept Question 4-14: What is the function of a voltage
follower, and why is it called a “buffer”? (See
)
These circuits can be used in various combinations to
realize specific signal-processing operations. We note that the
input-output transfer functions are independent of the load
resistance RL that may be connected between the output
terminal υo and ground. In the case of the noninverting
amplifier, the transfer function is also independent of the source
resistance Rs .
When cascading multiple stages of op-amp circuits in
series, care must be exercised to ensure that none of the
op amps is driven into saturation by the cumulative gain
of the multiple stages. When analyzing circuits that involve op amps, whether in
configurations similar to or different from those we encountered
so far in this chapter, the basic rules to remember are as follows:
Basic Rules of Op-Amp Circuits
Concept Question 4-15: How much voltage gain is
provided by the voltage follower? (See
)
Exercise 4-7: Express υo in terms of υ1 , υ2 , and υ3 for
the circuit in Fig. E4.7.
3 kΩ
υ1
υ2
υ3
0.5 kΩ
1 kΩ
_
+
10 kΩ
5 kΩ
_
+
υo
2 kΩ
(2) The op amp will operate in the linear range so long
as |υo | < |Vcc |.
(3) The ideal op-amp model assumes that the source
resistance Rs (connected to terminals υp or υn ) is
much smaller than the op-amp input resistance Ri
(which usually is no less than 10 M�), and the load
resistance RL is much larger than the op-amp output
resistance Ro (which is on the order of tens of ohms).
(4) The ideal op-amp constraints are ip = in = 0 and
υp = υn .
Figure E4.7
Answer: υo = 12υ1 + 6υ2 + 3υ3. (See
(1) KCL and KVL always apply everywhere in the
circuit, but KCL is inapplicable at the output node
when applying the ideal op-amp model. All other
circuit-analysis tools can be applied to op-amp
circuits.
C3
)
Example 4-4: Block-Diagram Representation
4-8
Op-Amp Signal-Processing
Circuits
Table 4-3 provides a summary of the op-amp circuits we
have considered thus far, together with their functional
characteristics in the form of block-diagram representations.
Generate a block-diagram representation for the circuit shown
in Fig. 4-18(a).
Solution: The first op amp is an inverting amplifier (Table
4-3(b)) with a dc input voltage υ1 = 0.42 V. Its circuit gain Gi
(with the subscript added to denote “inverting amp”) is
Gi = −
30K
= −3,
10K
210
CHAPTER 4
Table 4-3: Summary of op-amp circuits.
Op-Amp Circuit
(a)
υs
+
Rs
υs
υo
υs
R1
R2
(b)
Block Diagram
υ
−
OPERATIONAL AMPLIFIERS
G=
R1 + R2
R2
υo = Gυs
Noninverting Amp
(υo independent of Rs)
Rs
Rf
−
υs
υo
+
G=−
Rf
Rs
υo = Gυs
Inverting Amp
(c)
υ1
R1
Rf
R2
υ2
−
R3
υ3
υo
+
υ1
G1 = − Rf /R1
υ2
G2 = − Rf /R2
υ3
G3 = − Rf /R3
+
υo = G1υ1 + G2υ2 + G3υ3
Inverting Summing Amp
(d)
υ1
R2
R1
−
R3
υ2
υo
+
R4
υ1
G1 = −
υ2
(
G2 =
R2
R1
R1 + R2
R1
)(
R4
R3 + R4
+
)
υo = G1υ1 + G2υ2
Subtracting Amp
(e)
υs
(f)
Rs
+
RL
υp ip = 0
Rs1
Rs2
υ1
+
_
+
υ2 _
υs
υo
−
υn
in = 0
Voltage Follower / Buffer
(υo independent of Rs and RL)
+
R1
( R R+ R ) ( R R+ R )
1
G1 =
υ2
R1 + R2
G2 =
R2
R2
Noninverting Summing Amp
s2
2
υ1
υo
−
υo = υs
G=1
2
(
s1
)(
s2
Rs1
Rs1 + Rs2
)
υo = G1υ1 + G2υ2
+
4-8
OP-AMP SIGNAL-PROCESSING CIRCUITS
211
is open to the outside air, is P . When at sea level, P = P0 , so
the membrane assumes a flat shape and the two capacitances
are equal. Since atmospheric pressure decreases with elevation,
a rise in altitude results in a change in the pressure P in
the upper chamber, causing the membrane to bend upwards
(Fig. 4-19(b)), thereby changing the capacitances of the two
capacitors. The sensor measures a voltage υs that is proportional
to the change in capacitance.
Based on measurements of υs as a function of h, the data was
found to exhibit an approximately linear variation given by
and its output is
υo1 = Gi υ1 = −3(0.42) = −1.26 V.
The second op amp is a difference amplifier. Using Table 4-3(d),
the gains of its positive and negative channels are
R1 + R2
R1
2K
10K + 20K
=
=2
1K + 2K
10K
G2 =
R4
R3 + R 4
υs = 2 + 0.2h
and
G1 = −
R2
20K
= −2.
=−
R1
10K
υo = G2 υ2 + G1 υo1 = 2υ2 − 2(−1.26) = (2υ2 + 2.52) V.
Solution: Based on the given information, the sensor
voltage υs will serve as the input to the circuit we are asked to
design, and the output υo will represent the height elevation h.
We therefore need a circuit that can perform the operation
Example 4-5: Elevation Sensor
A hand-held elevation sensor uses a pair of capacitors separated
by a flexible metallic membrane (Fig. 4-19(a)) to measure the
height h above sea level. The lower chamber in Fig. 4-19(a) is
sealed, and its pressure is P0 , which is the standard atmospheric
pressure at sea level. The pressure in the upper chamber, which
υ1
10 kΩ
υo = h =
1
2
υs −
= 5υs − 10,
0.2
0.2
where we have inverted Eq. (4.47) to solve for h in terms
of υs . The functional form of Eq. (4.48) indicates that we have
υo1
++
10 kΩ
−
Op
Amp 2
1 kΩ
υ2
+
_
+
2 kΩ
(a) Circuit
(b) Block diagram
−3
(4.48)
20 kΩ
30 kΩ
−Op
Amp 1
0.42 V
(4.47)
where h is in km. The sensor is designed to operate over the
range 0 ≤ h ≤ 10 km. Design a circuit whose output voltage υo
(in volts) is an exact indicator of the height h (in km).
Hence,
0.42 V
(V),
−1.26 V
υo1
υ2
−2
2
2.52 V
2υ2
+
υo = (2υ2 + 2.52) V
Figure 4-18: Block-diagram representation (Example 4-4).
υo
+
212
CHAPTER 4
Equation (4.49) can be made to implement Eq. (4.48) if we
select the following
Air
Metal plate
(b) υ1 as a dc voltage source such that (R2 /R1 )υ1 = 10 V,
which can be satisfied by arbitrarily selecting υ1 = 1 V
and (R2 /R1 ) = 10
C1
P
2
(c) values for R1 through R4 that simultaneously satisfy the
conditions
R2
R4
R1 + R2
= 10
and
= 5.
R1
R3 + R 4
R1
C2
P0
Metal plate
(a)
(a) υs = υ2
1
Flexible metal
membrane
3
Pressure sensor
P
P < P0
1
1
2
P0
3
(b)
C1
2
C2
3
A possible set of values that meets these conditions is
Sensor
R2
+
−
υ1 = 1 V
υn
R3
υp
−
R1 = 2 k�,
R3 = 10 k�,
R2 = 20 k�,
R4 = 8.33 k�.
Before we conclude the design, we should check to make
sure that the op amp will operate in its linear range over the
full range of operation of the sensor. According to Eq. (4.47),
as h varies from zero to 10 km, υs varies from 2 V to 4 V. The
corresponding range of variation of υo , from Eq. (4.48), is from
zero to 10 V. Hence, we should choose an op amp designed to
function with a dc supply voltage Vcc that exceeds 10 V.
Capacitances
R1
OPERATIONAL AMPLIFIERS
υo
+
Example 4-6: Circuit with Multiple Op Amps
Sensor
(c)
υ2 = υs
R4
R1 = 2 kΩ
R2 = 20 kΩ
R3 = 10 kΩ
R4 = 8.33 kΩ
Circuit realization
Figure 4-19: Design of a circuit for the pressure sensor of
Example 4-5 with P0 = pressure at sea level and P = pressure
at height h.
only one active (variable) input, namely υs , which we need to
amplify by a factor of 5, but we also need to subtract 10 V from
it. There are multiple circuit configurations that can achieve
the desired operation, including the subtractor circuit shown in
Table 4-3(d) and in Fig. 4-19(c). According to Eq. (4.40), the
output of the difference amplifier is given by
R1 + R2
R4
R2
υo =
υ2 −
υ1 . (4.49)
R3 + R 4
R1
R1
Relate the output voltage υo to the input voltages υ1 and υ2 of
the circuit in Fig. 4-20.
Solution: By comparing the circuit connections surrounding
the four op amps with those given in Table 4-3, we recognize
op amps 1 and 2 as noninverting amplifiers (sources υ1 and
υ2 are connected to + input terminals), op amp 3 as an
inverting amplifier with a gain of −1 (equal input and feedback
resistors R4 ), and op amp 4 as an inverting summing amplifier
(Table 4-3(b)) with equal gain (same input resistances R6 at
summing point).
We start by examining the pair of input op amps. Because
they are not among the standard configurations in Table 4-3,
we will use KVL/KCL to evaluate them. For op amp 1, υp1 = υ1
and υp1 = υn1 (op-amp voltage constraint). Hence,
υa = υn1 = υ1 .
Similarly, for op amp 2,
υb = υn2 = υ2 .
4-8
υ1
OP-AMP SIGNAL-PROCESSING CIRCUITS
+
_
υp1
υn1
+
υp2
υ2
+
_
R6
υo1
Op
Amp 1
−
R1
in1 = 0
in2 = 0
υn2
213
υa
i2
R4
R3
R4
υo2
+
υ'o2
R2
υb
−
Op
Amp 2
R6
−
Op
Amp 4
R5
+
υo
−
Op
Amp 3
+
Inverting Summing Amp
Inverting Amp
Noninverting Amps
Figure 4-20: Example 4-6.
Since in1 = in2 = 0 (op-amp current constraint),
i2 =
Example 4-7: Interesting Op-Amp Circuit
υb − υa
υ2 − υ1
=
,
R2
R2
Generate a plot for iL at the output side of the circuit shown in
Fig. 4-21(a) versus υs , covering the full linear range of υs .
and
υo2 − υo1 = i2 (R1 + R2 + R3 )
R1 + R2 + R3
=
(υ2 − υ1 ).
R2
Solution: This circuit is not one of the standard op-amp
configurations in Table 4-3, so we need to analyze it using
KVL/KCL. At node υn , KCL gives
(4.50)
Op amp 3 is a standard inverting amplifier, so we can use Table
4-3(c) to obtain
υo2
R4
=−
R4
υo2 = −υo2 .
υ n − υo
υn
+
= 0,
2k
6k
which leads to
υo = 4υn .
At node υp , KCL gives
Op amp 4 is an inverting summing amplifier (Table 4-3(c)) with
output
R5
(υo + υo2 )
R6 1
R5
= − (υo1 − υo2 )
R6
R5
R1 + R 2 + R 3
=
(υo − υo1 ) = R5
(υ2 − υ1 ).
R6 2
R6 R2
(4.51)
υo = −
which leads to
υp = υs + 0.5.
By imposing the op-amp constraint υp = υn , we have
υo = 4υn = 4(υs + 0.5) = 4υs + 2.
214
CHAPTER 4
OPERATIONAL AMPLIFIERS
At the output side,
iL =
υo − 4
4υs + 2 − 4
=
= (4υs − 2) mA.
1k
1k
10 = 4υs + 2,
υp
(υs + 0.5)
For υo = Vcc = 10 V,
+
_
or υs = 2 V,
2 kΩ
+
υo
iL
Vcc = 10 V
RL 1 kΩ
+
_ 4V
(a) Circuit
or υs = −3 V.
iL(mA)
15
(linear range).
12
9
Figure 4-21(b) displays a plot of iL versus υs over the latter’s
linear range. Note that the linear range is not symmetrical.
4-9
ip = 0
_
υs
Hence, linear range of υs is
−3 V ≤ υs ≤ 2 V
υn
0.5 V
and for υo = −Vcc = −10 V,
−10 = 4υs + 2,
6 kΩ
in = 0
2 kΩ
6
3
Instrumentation Amplifier
−4
An electric sensor is a circuit used to measure a physical
quantity, such as distance, motion, temperature, pressure,
or humidity. In some applications, the intent is not to
measure the magnitude of a certain quantity, but rather
to sense small deviations from a nominal value. For example, if the temperature in a room is to be maintained
at 20 ◦ C, the functional goal of the temperature sensor is to
measure the difference between the room temperature T and
the reference temperature T0 = 20 ◦ C and then to activate an
air conditioning or heating unit if the deviation exceeds a certain
prespecified threshold. Let us assume the threshold is 0.1 ◦ C.
Instead of requiring the sensor to be able to measure T with an
absolute accuracy of no less than 0.1 ◦ C, an alternative approach
would be to design the sensor to measure �υ = υ2 − υ1 , where
υ2 is the voltage output of a thermocouple circuit responding to
the room temperature T and υ1 is the voltage corresponding
to what a calibrated thermocouple would measure when
T0 = 20 ◦ C. Thus, the sensor is designed to measure the
deviation of T from T0 , rather than T itself, with an absolute
accuracy of no less than 0.1 ◦ C. The advantage of such an
approach is that the signal is now �υ, which is more than two
orders of magnitude smaller than υ2 . A circuit with a precision
of 10 percent is not good enough for measuring υ2 , but it is
plenty good for measuring �υ.
−3
−2
−1
−3
1
2
3
4
υs (V)
−6
−9
−12
−15
−14
(b) iL − υs transfer plot
Figure 4-21: Circuit for Example 4-7.
To appreciate the advantage of the differential measurement
approach over the direct measurement approach, consider the
two system configurations represented in Fig. 4-22.
(a) Direct Measurement Approach
In the configuration depicted in Fig. 4-22(a), input voltage υ2
represents the voltage across a thermistor used to measure the
temperature T in a house. The voltage is related to T by
υ2 = 0.01T ,
with T in ◦ C. The application circuit has a gain of 100 and a
measurement precision of ±1% of the amplified output. Thus,
υo = (100 ± 1)υ2 = (100 ± 1) × 0.01T = T ± 0.01T .
4-9
INSTRUMENTATION AMPLIFIER
Thermistor
υ2 = 0.01T
υ2
G = 100
± 1% of
υo
υo = (G ± 1)υ2
= T ± 0.01T.
For T = 21 ˚C,
υo = (21 ± 0.21) ˚C.
(a) Direct measurement
Thermistor
υ2 = 0.01T
υ2
G = 100
+
_ ± 1% of
υo
υ1 = 0.2 V
Fixed reference
temperature = 20 ˚C
υo = G(υ2 − υ1) ± 1%
of G(υ2 − υ1)
= (T − 20)
± 0.01(T − 20).
For T = 21 ˚C,
υo = (1 ± 0.01) ˚C.
Much better
measurement uncertainty
(b) Differential measurement
Figure 4-22: Comparison of direct and differential measurement uncertainties.
215
provided by the direct measurement system, but with an
associated precision on the order of 20 times better (±0.01 ◦ C
compared with ±0.21 ◦ C for the direct measurement system).
The instrumentation amplifier is perfectly suited for
detecting and amplifying a small signal deviation when
superimposed on one or the other of two much larger (and
otherwise identical) signals. An instrumentation amplifier consists of three op amps, as
shown in Fig. 4-23. The circuit configuration for the first two
is the same as the one we examined earlier in connection with
Example 4-6. According to Eq. (4.50), the voltage difference
between the outputs of op amps 1 and 2 is
R1 + R2 + R3
υo2 − υo1 =
(υ2 − υ1 ) = G1 (υ2 − υ1 ),
R2
(4.52)
where G1 is the circuit gain of the first stage (which includes
op amps 1 and 2) and is given by
G1 =
If T = 21 ◦ C, the output registers 21 ◦ C, and the associated
precision is 0.21 ◦ C.
(b) Differential Measurement Approach
The differential system in Fig. 4-22(b) also uses υ2 to
measure T , but it also uses a fixed voltage υ1 at the negative
terminal, with υ1 set at the desired reference temperature of
20 ◦ C. Hence, υ1 = 0.2 V. The differential output is given by
υo = 100(υ2 − υ1 ) ± (υ2 − υ1 )
= 100(υ2 − 0.2) ± (υ2 − 0.2)
= 100(0.01T − 0.2) ± (0.01T − 0.2)
= (T − 20) ± 0.01(T − 20).
If T = 21 ◦ C,
υo = (1 ± 0.01) ◦ C.
In the differential system, υo measures the deviation from the
reference temperature of 20 ◦ C, which is the same information
R1 + R2 + R3
.
R2
(4.53)
The third op amp is a difference amplifier that amplifies
(υo2 − υo1 ) by a gain factor G2 given by
G2 =
R4
.
R5
(4.54)
Hence,
υo = G2 G1 (υ2 − υ1 ) =
R4
R5
R1 + R2 + R3
R2
(υ2 − υ1 ).
(4.55)
To simplify the circuit, and improve precision, all resistors—
with the exception of R2 —often are chosen to be identical
in design and construction, thereby minimizing deviations
between their resistances. If we set R1 = R3 = R4 = R5 = R
in Eq. (4.55), the expression for υo reduces to
2R
(υ2 − υ1 ).
υo = 1 +
R2
(4.56)
In that case, R2 becomes the gain-control resistance of the
circuit; its value (relative to R) sets the gain. If the expected
signal deviation (υ2 − υ1 ) is on the order of microvolts to
millivolts, the instrumentation amplifier is designed to have an
overall gain that would amplify the signal to the order of volts.
216
CHAPTER 4
OPERATIONAL AMPLIFIERS
Instrumentation Amplifier
+
υ1
Gain control
Op
Amp 1
−
R1
υo1
R5
R3
υo2
R5
R2
υ2
R4
−
Op
Amp 2
−
Op
Amp 3
+
R4
υ1
υ2
+
υo
G=
( RR ) ( R + RR + R )
4
1
5
2
3
2
G(υ2 − υ1)
Figure 4-23: Instrumentation-amplifier circuit.
The instrumentation amplifier is a high-sensitivity,
high-gain, deviation sensor. Several semiconductor
manufacturers offer instrumentation-amplifier circuits in
the form of integrated packages. Concept Question 4-16: When designing a multistage
op-amp circuit, what should the design engineer do to
insure that none of the op amps is driven into saturation?
(See
)
Concept Question 4-17: If the goal is to measure small
deviations between a pair of input signals, what is the
advantage of using an instrumentation amplifier over
using a difference amplifier? (See
)
Exercise 4-8: To monitor brain activity, an
instrumentation-amplifier sensor uses a pair of needlelike probes inserted at different locations in the brain
to measure the voltage difference between them. If
the circuit is of the type shown in Fig. 4-23 with
R1 = R3 = R4 = R5 = R = 50 k�, Vcc = 12 V, and
the maximum magnitude of the voltage difference that
the brain is likely to exhibit is 3 mV, what should R2 be
to maximize the sensitivity of the brain sensor?
Answer: R2 = 25 �. (See
C
)
4-10 Digital-to-Analog Converters
(DAC)
A digital-to-analog converter (DAC) is a circuit that
transforms a digital sequence presented to its input into an
analog output voltage whose magnitude is proportional to
the decimal value of the input signal. An n-bit digital signal is described by the sequence
[V1 V2 V3 . . . Vn ], where V1 is called the most significant bit
(MSB) and Vn is the least significant bit (LSB). Voltages V1
through Vn can each assume only two possible states—either a 0
or a 1. When a bit is in the 1 state, its decimal value is 2m , where
m depends on the location of that bit in the sequence. For the
most significant bit (V1 ), its decimal value is 2(n−1) ; for V2 it is
2(n−2) ; and so on. The decimal value of the least significant bit is
2n−n = 20 = 1, when that bit is in state 1. Any bit in state 0 has
a decimal value of 0. Table 4-4 illustrates the correspondence
between the binary sequences of a 4-bit digital signal and their
decimal values. The binary sequences start at [0000] and end at
[1111], representing 16 decimal values extending from 0 to 15
and inclusive of both ends. To do so, the DAC in Fig. 4-24 has
to sum V1 to Vn after weighting each by a factor equal to its
decimal value. Thus, for a 4-bit digital sequence, for example,
the output voltage of the DAC has to be related to the input by
Vout = G(24−1 V1 + 24−2 V2 + 24−3 V3 + 24−4 V4 )
= G(8V1 + 4V2 + 2V3 + V4 ),
(4.57)
4-10
DIGITAL-TO-ANALOG CONVERTERS (DAC)
V1
MSB
V2
n-bit digital input
signal [V1V2KVn]
217
M
LSB
DAC
Vn
Vout = G(2n −1V1 + 2n −2V2 + L + 2Vn −1 + Vn)
Figure 4-24: A digital-to-analog converter transforms a digital signal into an analog voltage proportional to the decimal value of the digital
sequence.
Table 4-4: Correspondence between binary sequence and
decimal value for a 4-bit digital signal and output of a DAC
with G = −0.5.
V 1 V2 V 3 V4
Decimal Value
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
DAC Output (V)
0
−0.5
−1
−1.5
−2
−2.5
−3
−3.5
−4
−4.5
−5
−5.5
−6
−6.5
−7
−7.5
where G is a scale factor that has no influence on the relative
weights of the four terms. The magnitude of G is selected
to suit the range of the output voltage. If the input is a 3-bit
sequence whose range of decimal values extends from 0 to 7,
one might design the circuit so that G = 1, because in that case,
the maximum output voltage is 7 V, which is below Vcc for most
op amps. For digital signals with longer sequences, G needs to
be smaller than 1 in order to avoid saturating the op amp.
The weighted-sum operation of a DAC can be realized by
many different signal-processing circuits. A rather straightforward implementation is shown in Fig. 4-25, where an inverting
summer (Table 4-3(c)) uses the ratios of Rf to the individual
resistances to realize the necessary weights, and the positions
of the switches determine the 0/1 states of the 4 bits. Reference
to either Table 4-3(c) or Eq. (4.34) yields
Rf
Rf
Rf
Rf
V1 −
V2 −
V3 −
V4
R
2R
4R
8R
−Rf
=
(4.58)
(8V1 + 4V2 + 2V3 + V4 ),
8R
Vout = −
which satisfies the relative weights given in Eq. (4.57). Also, in
this case,
G=−
Rf
.
8R
(4.59)
For [V1 V2 V3 V4 ] = [1111], Vout = 15G. By selecting
G = −0.5 (corresponding to Rf = 4R), the output will
vary from 0 to −7.5.
Example 4-8: R–2R Ladder
The circuit in Fig. 4-26(a) offers an alternative approach to
realizing digital-to-analog conversion of a 4-bit signal. It is
called an R–2R ladder, because all of the resistors of its
input circuit have values of R or 2R, thereby limiting the
input resistance seen by the dc source to a 2 : 1 range no
matter how many bits are contained in the digital sequence.
This is in contrast with the DAC of Fig. 4-25, whose inputresistance range is dependent on the number of bits; 8 : 1 for a
4-bit converter, and 128 : 1 for an 8-bit converter. Additionally,
circuit performance and precision depend on resistor tolerance
and are superior when fewer groups of resistors are involved
in the input circuit. Resistors fabricated in the same production
process are likely to exhibit less variability among them than
resistors fabricated by different processes.
Show that the R–2R ladder in Fig. 4-26(a) does indeed
provide the appropriate weighting for a 4-bit DAC. If R = 2 k�
and Vcc = 10 V, what is the maximum realistic value that Rf
can have?
218
CHAPTER 4
OPERATIONAL AMPLIFIERS
Rf
LSB
8R
4R
2R
V4
V3
V2
0
1
+
−
0
1
0
R
V1
MSB
1
0
1
−
+
+
Vout
Inverting Summing Amp
1V
−
Figure 4-25: Circuit implementation of a DAC.
R
2R
R
Rf
R
2R
2R
2R
2R
V4 LSB
V3
V2
V1 MSB
−
+
1
+
Vout
0
1
+
−
0
1
0
1
0
Inverting Summing Amp
1V
−
R−2R ladder network
(a)
RTh
(b)
'
Thevenin
equivalent circuit
V2
V3
V1
V4
VTh =
+
+
+
2
4
8
16
RTh = R
+
−
VTh
Rf
−
+
+
Vout
Figure 4-26: R–2R ladder digital-to-analog converter.
−
4-11 THE MOSFET AS A VOLTAGE-CONTROLLED CURRENT SOURCE
Solution: Even though we know that (depending on the
positions of the switches) V1 to V4 can each assume only 2
binary values, namely 0 or 1 V, let us treat V1 to V4 as dc
power supplies and apply multiple iterations of voltage-current
transformations (starting on the left with the LSB) to arrive
at the Thévenin equivalent circuit at the input side of the op
amp. The result of such a transformation process is shown in
Fig. 4-26(b), in which
VTh =
V1
V2
V3
V4
+
+
+
2
4
8
16
(4.60a)
Insulator
219
Drain (D)
D
+
G
Gate (G)
IDS
+
VGS
_
Source (S)
(a) MOSFET symbol
VDS
_
S
(b) Voltages
Figure 4-27: MOSFET symbol and voltage designations.
and
RTh = R.
(4.60b)
Consequently,
Exercise 4-9: A 3-bit DAC uses an R–2R ladder design
with R = 3 k� and Rf = 24 k�. If Vcc = 10 V, write an
expression for Vout and evaluate it for [V1 V2 V3 ] = [111].
Rf
VTh
RTh
Rf V1
V2
V3
V4
=−
+
+
+
R
2
4
8
16
Vout = −
Rf
=−
(8V1 + 4V2 + 2V3 + V4 ) .
16R
Answer:
(4.61)
The voltage |Vout | is a maximum when [V1 V2 V3 V4 ] = [1111],
in which case
Vout = −
15 Rf
.
16 R
To insure that |Vout | does not exceed |Vcc | = 10 V as well as to
provide a safety margin of 2 V it is necessary that
8≥
15 Rf
,
16 2k
which gives Rf ≤ 17.1 k�.
Concept Question 4-18: In a digital-to-analog converter,
what dictates the maximum value that Rf can assume?
(See
)
Concept Question 4-19: What is the advantage of
the R–2R ladder (Fig. 4-26) over the traditional DAC
(Fig. 4-25)? (See
)
Vout = −
Rf
(4V1 + 2V2 + V3 ) = −(4V1 + 2V2 + V3 ).
8R
For [V1V2V3] = [111], Vout = −7 V, whose magnitude is
)
smaller than Vcc = 10 V. (See
4-11 The MOSFET as a
Voltage-Controlled Current
Source
In earlier sections, we demonstrated how op amps can be used
to build buffers and amplifiers. We now examine how to realize
the same outcome using MOSFETs. The simplest model of a
MOSFET, which stands for metal-oxide semiconductor fieldeffect transistor, is shown in Fig. 4-27(a). The vast majority
of commercial computer processors are built with MOSFETs;
as mentioned in Technology Brief 1 on nanotechnology, a
2010 Intel Core processor contains over 1 billion independent
MOSFETs. A MOSFET has three terminals: the gate (G), the
source (S), and the drain (D). Actually, it has a fourth terminal,
namely its body (B), but we will ignore it for now because for
many applications it is simply connected to the ground terminal.
The circuit symbol for the MOSFET may look somewhat
unusual, but it is actually a stylized depiction of the physical
cross section of a real MOSFET. In a real MOSFET, the gate
220
CHAPTER 4
consists of a very thin layer (< 500 nm thick) of a conducting
material adjacent to an even thinner layer (< 100 nm) of
insulator. The insulator in turn is placed directly on the surface
of a relatively large slab of semiconductor material, usually
referred to as “the chip” in everyday conversation (usually made
of silicon 0.5 to 1.5 mm thick). The drain and the source sections
are fabricated into this semiconductor chip on either side of the
gate.
Because the gate G is separated from the rest of the
transistor by the thin insulating layer, no dc current can
flow from G to either D or S. Nonetheless, it turns out that the voltage difference between
terminals G and S is key to the operation of the MOSFET.
Using terminal S as a reference in Fig. 4-27(b), we denote
VDS and VGS as the voltages at terminals D and G, respectively.
We also denote the current that flows through the MOSFET from
D to S as IDS . This simplification is justified by the assumption
that no current flows through the gate node to either the drain
or source node. The operation of the MOSFET can be analyzed
by placing it in the simple circuit shown in Fig. 4-28(a), in
which VDD is a dc power supply voltage usually set at a level
close to but not greater than, the maximum rated value of
VDS for the specific MOSFET model under consideration. The
resistance RD is external to the MOSFET, and its role will be
discussed later. The input voltage is synonymous with VGS and
the output voltage is synonymous with VDS ,
Vin = VGS ,
and
Vout = VDS .
(4.62)
approximately proportional to VGS . These observations allow us
to characterize the MOSFET in terms of the simple, equivalent
circuit model shown in Fig. 4-28(c), which consists of a single
dependent current source given by
IDS = gVGS ,
4-11.1
Digital Inverter
We now will use the model given by Eq. (4.64) to demonstrate
how the MOSFET can function as a digital inverter by
generating an output state of “0” when the input state is “1,”
and vice versa. Combining Eqs. (4.62) to (4.64) gives
Vout = VDD − gRD Vin .
Since current cannot flow from G to either D or S, the
only current that can flow through the MOSFET is IDS .
The dependence of IDS on VGS and VDS is shown for a
typical MOSFET in Fig. 4-28(b) in the form of characteristic
curves displaying the response of IDS to VDS at specific
values of VGS . We observe that if VDS is greater than a
certain saturation threshold value VSAT , the curves assume
approximately constant levels, and that these levels are
(4.65)
The constant g is a MOSFET parameter, so if we choose RD
such that gRD ≈ 1, Eq. (4.65) simplifies to
Vin
Vout
=1−
.
VDD
VDD
(4.63)
(4.64)
where g is a MOSFET gain constant. The characteristic
curves associated with this model, which is valid only if VDS
exceeds VSAT , are shown in Fig. 4-28(d).
Even though this equivalent circuit is very simple and
more sophisticated models usually are required, it nevertheless
serves as a useful approximate model for introducing some
common uses of MOSFETs. In real MOSFETs, the relationship
between IDS and VGS at saturation is not strictly linear. How
linear the relationship is depends (in part) on the size of
the transistor. Modern sub-micron transistors used in digital
processors exhibit a linear relationship between IDS and VGS at
saturation, whereas larger MOSFETs used for power switching
may behave nonlinearly. For our purposes, the simplification
denoted by Eq. (4.64) will suffice.
Moreover Vout is related to VDD by
Vout = VDD − IDS RD .
OPERATIONAL AMPLIFIERS
(4.66)
In a digital inverter, we are interested in output responses to
only two input states. According to Eq. (4.66):
If
Vin
= 1,
VDD
Vout
= 0,
VDD
(4.67a)
if
Vin
= 0,
VDD
Vout
= 1.
VDD
(4.67b)
and
Hence, the MOSFET circuit in Fig. 4-28(a) behaves like a
digital inverter, provided the model given by Eq. (4.64) holds
true and requiring that VDS exceeds VSAT . In a real circuit,
4-11 THE MOSFET AS A VOLTAGE-CONTROLLED CURRENT SOURCE
VDD
D
G
IDS
VDS
+
Vin
_
IDS
IDS
RD
VGS
+
Vout
_
5 mA
VGS = 2 V
4 mA
3 mA
VGS = 1 V
2 mA
1 mA
VGS very small
VSAT
Inverter circuit
IDS
RD
Vin = 3 V
3g
D
+
IDS = gVGS
+
Vin = 2 V
2g
Vout = VDS
Vin = 1 V
1g
Vin = VGS
_
_
Vout
S
(c)
Equivalent circuit
VDS
Typical characteristic curves
(b)
VDD
G
VGS = 3 V
6 mA
S
(a)
221
(d)
Characteristic lines of equivalent circuit
Figure 4-28: MOSFET (a) circuit, (b) characteristic curves, (c) equivalent circuit, and (d) associated characteristic lines.
Vin and Vout are not given by the simple results indicated by
Eq. (4.67), but each can be categorized easily into high and low
voltage values to satisfy the functionality of a digital inverter.
The NMOS inverter circuit of Fig. 4-28(a) provides the
correct functionality required from a digital inverter, but it
suffers from a serious power-dissipation problem. Let us
consider the power consumed by RD under realistic conditions:
4-11.2
Input State 0:
NMOS versus PMOS Transistors
The MOSFET circuit of Fig. 4-28(a) actually is called an nchannel MOSFET or NMOS for short. Its operation is limited
to the first quadrant in Fig. 4-28(d), where both IDS and VDS
can assume positive values only. A second type of MOSFET
called PMOS (p-channel MOSFET) is designed and fabricated
to operate in the third quadrant, corresponding to negative
values for IDS and VDS , as illustrated in Fig. 4-29. To distinguish
between the two types, the symbol for PMOS includes a small
open circle at terminal G.
Vin
=0
VDD
IDS ≈ 0
2
PRD = IDS
RD ≈ 0
(4.68a)
Input State 1:
Vin
=1
VDD
IDS =
VDD
RD
PRD =
2
VDD
. (4.68b)
RD
222
CHAPTER 4
OPERATIONAL AMPLIFIERS
IDS
D
G
S
NMOS
3g
VGS = 3
2g
VGS = 2
g
VGS = 1
VDS
VGS = −1
−g
VGS = −2
−2g
VGS = −3
−3g
D
G
S
PMOS
Figure 4-29: Complementary characteristic curves for NMOS and PMOS.
Heat dissipation in RD is practically zero for input state 0, but
2 /R . The value of V
for input state 1, it is equal to VDD
D
DD , which
is dictated by the MOSFET specifications, is typically on the
order of volts, and RD can be made very large—on the order of
k� or tens of k�. If RD is much larger than that, IDS becomes
too small for the MOSFET to function as an inverter. For VDD
on the order of 1 V and RD on the order of 10 k�, PRD for
an individual NMOS is on the order of 100 μW. This amount
of heat generation is trivial for a single transistor, but when we
consider that a typical computer processor contains on the order
of 109 transistors, all confined to a relatively small volume of
space, the total amount of heat that would be generated by such
an NMOS-based processor would likely burn a hole through
the computer! To address this heat-dissipation problem, a new
technology was introduced in the 1980s called CMOS, which
stands for complementary MOS.
CMOS has revolutionized the microprocessor industry
and led to the rise of the x86 family of PC processors. PMOS
G
VDD
S
D
+
Vin
_
G
NMOS
D
+
Vout
S
_
Figure 4-30: CMOS inverter.
CMOS is a configuration that attaches an NMOS to a PMOS
at their drain terminals, as shown in Fig. 4-30. The CMOS
inverter provides the same functionality as the simpler NMOS
inverter, but it has the distinct advantage in that it dissipates
4-11 THE MOSFET AS A VOLTAGE-CONTROLLED CURRENT SOURCE
VDD = 10 V and a drain resistance RD = 1 k�. The input signal
vs (t) is an ac voltage with a dc-bias given by
VDD
RD
Rs
υs (t) = [500 + 40 cos 300t]
D
G
+
υs(t) _
S
223
+
υout(t)
_
(a) MOSFET amplifier
Note that the amplitude of the input ac signal is several orders
of magnitude smaller than that of the dc voltage VDD . Apply
the MOSFET equivalent model with g = 10 A/V to obtain an
expression for υout (t).
Solution: Upon replacing the MOSFET with its equivalent
circuit, we end up with the circuit in Fig. 4-31(b). At the input
side, because no current flows through Rs , it follows that
VDD
υGS (t) = υs (t),
RD
and at the output side,
D
Rs
+
υs(t) _
G
+
iDS = gυGS
υGS
_
+
υout(t)
S
_
(b) Equivalent circuit
Figure 4-31: MOSFET amplifier circuit for Example 4-9.
negligible power for both input states. The significance of the
inverter is in the role it plays as a basic building block for more
complicated logic circuits, such as those that perform AND and
OR operations.
4-11.3
(μV).
MOSFETs in Analog Circuits
In addition to their use in digital circuits, MOSFETs also
can be used in analog circuits as buffers and amplifiers, as
demonstrated by Examples 4-9 and 4-10. As we discussed
earlier in Section 4-7, a buffer is a circuit that insulates the
input voltage from variations in the load resistance.
Example 4-9: MOSFET Amplifier
The circuit shown in Fig. 4-31(a) is known as a commonsource amplifier and uses a MOSFET with a dc drain voltage
υout (t) = VDD − iDS RD
= VDD − gRD υGS (t)
= VDD − gRD υs (t).
We observe that the output voltage consists of a constant dc
component (namely VDD ) and an ac component that is directly
proportional to the input signal υs (t). For the element values
specified in the problem,
υout (t) = 10 − 10 × 103 × (500 + 40 cos 300t) × 10−6
= 5 − 0.4 cos 300t
V.
The 5 V dc component is simply a level shift superimposed on
which is a cosinusoidal signal that is identical to the input signal
but is inverted and amplified by an ac gain of 104 (from 40 μV
to 0.4 V).
Example 4-10: MOSFET Buffer
The circuit in Fig. 4-32(a) consists of a real voltage source
(υs , Rs ) connected directly to a load resistor RL . In contrast, the
circuit in Fig. 4-32(b) uses a common-drain MOSFET circuit
inbetween the source and the load to buffer (insulate) the source
from the load. Let us define the source as being buffered from
the load if the output voltage across the load is equal to at
224
CHAPTER 4
In order for υout1 /υs ≥ 0.99, it is necessary that
Rs
υs
+
_
RL
≥ 99
Rs
+
RL
Source
υout1
_
or
RL ≥ 9.9 k�
Load
For the circuit in Fig. 4-32(c), in which the MOSFET has been
replaced with its equivalent circuit, KVL gives
VDD
Rs
−υs + υGS + υout2 = 0.
D
G
Also,
S
+
υs _
RL
MOSFET
buffer
Source
+
υout2
_
Load
(b) Buffer circuit
iDS = gυGS
υGS
+
_
S
RL
= gRL υGS .
Simultaneous solution of the two equations gives
gRL
υs .
υout2 =
1 + gRL
RL ≥ 9.9 �,
D
G
υout2 = IDS RL
With g = 10 A/V and in order for υout2 to be no less than 0.99υs ,
it is necessary that
VDD
Rs
(for Rs = 100 �).
(b) With MOSFET Buffer
(a) Source connected to load directly
υs
OPERATIONAL AMPLIFIERS
+
υout2
_
(c) Equivalent circuit
Figure 4-32: Buffer circuit for Example 4-10.
which is three orders of magnitude smaller than the requirement
for the unbuffered circuit.
Concept Question 4-20: What is the major advantage of
a CMOS over an NMOS circuit as a digital inverter?
(See
)
Concept Question 4-21: When a MOSFET is used in
a buffer circuit, υout ≈ υs, where υs is the input signal
voltage. So, why is it used? (See
)
least 99 percent of υs . For each circuit, determine the condition
on RL that will satisfy this criterion. Assume Rs = 100 � and
the MOSFET gain factor g = 10 A/V.
Exercise 4-10: In the circuit of Example 4-9, what value
of RD will give the highest possible ac gain while keeping
υout (t) always positive?
Solution:
Answer: RD = 1.85 k�. (See
(a) No-Buffer Circuit
Exercise 4-11: Repeat Example 4-10, but require that
For the circuit in Fig. 4-32(a),
υout be at least 99.9 percent of υs . What should RL be
(a) without the buffer and (b) with the buffer?
υout1 =
υs RL
.
Rs + R L
C3
)
Answer: (a) RL ≥ 99.9 k�, (b) RL ≥ 99.9 �. (See
C3
)
TECHNOLOGY BRIEF 11: CIRCUIT SIMULATION SOFTWARE
225
Technology Brief 11
Circuit Simulation Software
In Chapters 2 and 3 we examined all of the common
methods used for analyzing linear electric circuits. In
practice, these are used for designing and analyzing
the many building blocks that make up larger circuits,
or for obtaining approximate solutions for how more
complex circuits function. In Technology Brief 1, we noted
that very large scale integrated circuits (VLSI) have
experienced exponential scaling for almost 50 years, so
some of today’s electrical networks may include as many
as 100 billion transistors! The standard circuit analysis
methods available to us are accurate and applicable,
but it takes a great deal of computer automation to
apply them to a 100 billion–transistor network. The
Multisim circuit analysis software provides an excellent
start towards modeling the behavior of complex circuits.
Accordingly, Multisim will be the first of two computerbased tools we will explore in this Technology Brief.
Whereas Multisim is an excellent tool, it treats a circuit as
a 2-D configuration, which does not account for thermal
effects associated with heat generation by the circuit
elements, nor possible capacitive or inductive crosscoupling of voltages between elements (through the air
or insulator medium between them). To account for these
effects, we need to use a sophisticated 3-D computer
simulation tool. This is the subject of the second part of
this Technology Brief.
Multisim Software
(1) Using Simulation Tools to Calculate and
Understand
Engineers use electronic design automation (EDA)
tools, such as Multisim, to understand the function of a
circuit and calculate its response. Consider the simple
example shown in Fig. TF11-1(a), and let us assume we
need to determine what voltage Vr would be measured by
the voltmeter shown in the circuit. In this case, because
the circuit is very simple, we can analyze it by hand or we
can implement it and solve it by Multisim (Fig. TF11-1(b)).
But if the circuit has more than five nodes, the byhand approach becomes tedious, and the Multisim option
becomes far more practical.
Vr
3.8 kΩ
+
5V_
1 kΩ
1.2 kΩ
3 kΩ
+
_5V
(a) Circuit
(b) Multisim layout
Figure TF11-1: Two-source circuit and Multisim representation using switches to switch one or both voltage
sources on or off.
(2) Using Simulation Tools to Lay Out a Circuit
Once a circuit has been designed, we can either build it on
a protoboard or, alternatively, we can have a circuit board
built for it and then solder the parts to the board to create
the circuit. Printed circuit board (PCB) layout tools
help us plan the circuit layout and routing architecture,
which often are multiple layers deep, as in the circuit of
Fig. TF11-2.
When using silicon chips, for example, these designs
involve hundreds, millions, or trillions of components
arranged in one or more layers, and carrying thousands
of simultaneous signals throughout the circuit, all acting
together to obtain the desired voltage and/or current
output of the circuit. Classic EDA tools (such as Multisim)
begin with a graphical user interface (GUI) that allows
users to specify what type of circuit elements (sources,
resistors, switches, etc.) are needed and how they are
connected together. Circuits made up of several elements
can often be grouped or bundled together and stored
in libraries for later reuse. Often, libraries of complex
226
TECHNOLOGY BRIEF 11: CIRCUIT SIMULATION SOFTWARE
Figure TF11-2: Multilayer PCB layout, with each layer assigned a different color. Holes and solder pads are planned for
each chip and component attached to the board, and multilayer routing built into the circuit board connects them all together.
(Courtesy of ZYPEX Inc.)
circuits (such as the core of a computer processor)
are shared or purchased to reduce engineering design
time. For circuits whose design can be expressed as
either logical rules or a desired logical function—primarily
digital circuits—modern software tools transform circuit
design into an exercise in writing code. In essence,
programs can be written in hardware description
languages (HDL), which define the structure and/or
operation of digital circuits. The program is then executed
and a circuit description suitable for manufacture,
or instantiation into a field-programmable gate array
(FPGA), is synthesized. Programming in HDLs is similar
to assembly language or C coding, although major
differences exist. Most modern complex digital circuits are
designed, simulated, and synthesized with the aid of HDL
tools.
Once the elements and their connections are defined,
they are then modeled with either more or less detail (by
specifying tolerance levels or other relevant parameters)
depending on the level of accuracy needed. Simulation
results are only as good as the circuit model and input
parameters, so this is a very important consideration
when using EDA software. The more detailed the model,
the more accurate the results can be expected to be, but
also the longer it takes the simulation to run. Consider,
for example, the ideal and the more realistic models
TECHNOLOGY BRIEF 11: CIRCUIT SIMULATION SOFTWARE
for voltage and current sources listed in Table 1-5. The
realistic source models are certainly more accurate
than the ideal models, but even the “realistic” models
are approximate, because they neglect nonlinearities,
stray capacitance and inductance, and potential feedback
loops within the sources. For many applications, the
ideal model is sufficient, for others the first-order realistic
model (including a resistor) is sufficient, but for others,
a more detailed nonlinear model is required. How do
you, the engineer, know what model to use? The intuition
and knowledge gained from working with the common
circuit analysis tools from Chapters 2 and 3 help you
determine when you may or may not need a more realistic
model. Often, we will first try a simplified model, and
then one that is slightly more realistic. If there is minimal
change, we do not go on to a more complex model, but
if there is substantial change, we may try more and more
realistic models (each requiring more time and memory
for the software to run), until the result converges and
we are satisfied that we have modeled the real system at
hand.
Now let’s consider VLSI circuits involving trillions of
transistors. Even with relatively simple models of the
transistor (such as the BJT in Section 3-9 or MOSFET
in Section 4-11), there are still more unknowns than
we generally care to wait for the computer to solve.
In this case, two simplifications are essential. First, we
must break the circuit down into functional blocks, so
we can design each block individually and cascade or
connect the blocks together.We have already seen simple
examples of doing this using the Thévenin equivalent
circuit technique. Thévenin is also used this way in much
larger circuits, including VLSI designs. Second, we must
simplify the models we use for each circuit element.
Fortunately (or perhaps necessarily!) the largest circuits
electrical engineers design are digital circuits, for which
we can use the simplest models of all. We can assume
that all voltages are either high/on (digital 1) or low/off
(digital 0). This flexibility in the voltages allows us to
use much simpler models. The transistor, for example,
can be modeled as just a switch (on or off), or just
as a resistor that is switched in or out of the circuit.
Assuming all voltages are either on or off is the simplest
assumption. We also can model them as on/off or in
transition between on and off. The transition (which is
actually a bouncy switch) can be modeled as a linear
slope from low to high or high to low. The length of
this slope is the rise time of the transition, and the
faster the rise time, the faster the circuit can send
data.
227
3-D Modeling Tools
Model-based EDA tools define how a circuit is supposed
to function electrically, but sometimes effects not included
in the models come into play to make the circuit
malfunction.Two of these that are particularly relevant are
associated with thermal problems and coupling problems.
We know that resistors and other devices are designed
with specific power ratings. The power rating is related to
the size and material the resistors are made of and their
ability to withstand the heat generated by current moving
through them. If we start pushing all of the elements of
the circuit to their maximum capability, their interactions
(hot chips next to other hot chips) may make the most
vulnerable of these parts fail. But how do we determine
which parts are the most vulnerable, and what solution
can we offer to mitigate the heat problem? 3-D simulation
tools help us to identify these potential problems or (all
too often) diagnose them when they occur. The 3-D
simulation process starts with the physical model of a
given part, such as the high-speed IC package shown
in Fig. TF11-3(a). The spatial distributions of electrical
voltage and current are then modeled for part or all of
the package, as shown in Fig. TF11-3(b). The current
density at a given location is representative of what the
temperature will be at that location. If overheating were
to occur, it would most likely occur at the points with
the highest current. More detailed thermal modeling can
include the effects of heat sinks, fans, and other cooling
effects. The voltage is used to calculate coupling between
nearby electrical signals (such as two adjacent legs of this
package).
Another interesting circuit simulation is shown in
Fig. TF11-4, which displays the amount of power radiated
by a crescent antenna.
So WHY Should You Learn the Circuit Analysis
Methods Introduced in This Book?
Having learned how to apply the various circuit analysis
tools covered in this book thus far, you may wonder why
you need to learn so many different methods when they
all can give you the same result. And now that you have
read this Technology Brief and seen that you can use a
computer to analyze circuits, you may wonder why you
need to learn these analytical methods at all!
While it is true that automated tools are essential
for testing circuits used in practical applications, it is
equally true that the success of the design process is
highly coupled to one’s understanding of the fundamental
228
TECHNOLOGY BRIEF 11: CIRCUIT SIMULATION SOFTWARE
(a) Physical package
(b) Current density contour
Figure TF11-3: High-speed IC package and contour and vector plot of the current density flowing through it at 5 GHz. The
brighter/redder colors show higher current density (A/m2 ) (which also results in higher temperature) than the darker/bluer
colors. The arrows show the direction in which the current is flowing, and the size of the arrow is also proportional to the
r IC Package Simulation.)
magnitude of the current density. (Courtesy: CST MICROWAVE STUDIO
concepts in circuit analysis and design. Designing a new
circuit to address a specified application is a creative
endeavor that relies on one’s past experience and fluency
in circuit behavior and performance. Once an initial circuit
configuration has been developed, computer simulation
tools are then used to fine-tune the design and optimize
the circuit performance.
Figure TF11-4: This 3D electromagnetic simulation was used to evaluate the fields (in this case the square of the electric
field, which is proportional to power) in the nanocrescent antenna shown in Technology Brief 1. We can see the strong fields
at the tips (because charge congregates there), and also in the center. (Credit: Miguel Rodriguez.)
4-12 APPLICATION NOTE: NEURAL PROBES
229
aspects of brain development and operation, but they also are
beginning to see use in clinical applications for the treatment
of chronic neurological disorders, such as Parkinson’s disease
(see Technology Briefs 17 and 32 on neural stimulation and
computer-brain interfaces, respectively).
Because these voltage signals are so small, on-board
amplification, noise-removal, and analog-to-digital circuitry are
needed to process the signal from the brain to the recording
device.
Example 4-11: Neural Probe
Figure 4-33: Three-dimensional neural probe (5 mm × 5 mm
× 3 mm). (Courtesy of Prof. Ken Wise and Gayatri Perlin,
University of Michigan.)
4-12 Application Note: Neural Probes
The human brain is composed, in part, of interconnected
networks of individual, information-processing cells known
as neurons. There are about one trillion (1012 ) neurons in
the human brain with each neuron having on average 7000
connections to other neurons. Although the working of the
neural system is well beyond the scope of this book, it is
important to note that when a neuron transmits information,
it causes a change in the concentrations of various ions in
its vicinity. This movement of ions gives rise to an electric
current through the neuron’s membrane which in turn generates
a change in potential (voltage) between various parts of the cell
and its surroundings. Thus, when a given neuron fires, a small
(∼ 100 mV) but detectable potential drop develops between the
cell and its surroundings.
Over the past few decades, various types of devices were built
for measuring this electrical phenomenon in neurons. In recent
years, however, the field has achieved phenomenal success due
in part to the successful development of neural probes (also
known as neural interfaces) with very high sensitivities. An
example of a 3-dimensional probe is shown in Fig. 4-33. It
consists of a 2-D array of very thin probes—each instrumented
with a sensor at each of several locations along its length.
With such a probe, it is now possible to measure the action
potentials of firing neurons at a large number of brain locations
simultaneously. Modern neural interface systems also have been
developed to stimulate or change the electrical state of specific
neurons, thereby affecting their operation in the brain. These
types of devices not only offer the potential of unraveling
The neural probe shown in Fig. 4-34 consists of a long shank at
the end of which lie two metal electrodes. This shank is inserted
a short distance into the brain and the signal coming from these
electrodes is recorded. For simplicity, we will model the brain
activity between the two probes just like a realistic voltage
source Vs in series with a resistance Rs . The source produces
inverted pulses with −100 mV amplitudes. Note that neither Va
nor Vb are grounded relative to the ground level of the circuit.
The neural signal needs to be inverted and amplified so that it
can be presented to an analog-to-digital converter (ADC) which
only operates in the 0 to 5 V range. Design the amplifier circuit.
Solution: The input signal is represented by the difference
between Va and Vb , and since neither of those terminals is
grounded, some sort of differential amplifier is the logical
choice for the intended application.
The amplifier should invert the input signal and amplify it into
the 0 to 5 V range required by the ADC. Given these constraints,
we propose to use the op-amp instrumentation amplifier circuit
of Fig. 4-23 with Va as input υ1 and Vb as input υ2 . The amplifier
output is proportional to (υ2 −υ1 ), so the choice of connections
we made will realize the inversion requirement automatically.
According to Eq. (4.56), if we choose the circuit resistors such
that R1 = R3 = R4 = R5 = R, the output voltage is given by
2R
(υ2 − υ1 )
υo = 1 +
R2
2R
2R
= 1+
(Vb − Va ) = − 1 +
(Va − Vb ).
R2
R2
To amplify (Va − Vb ) from −100 mV to +5 V, the ratio
(R/R2 ) should be chosen such that
2R
× (−100 × 10−3 )
5=− 1+
R2
or, equivalently,
R
= 24.5.
R2
If we set R = 100 k�, then R2 should be 4.08 k�. This will
yield a 5 V pulse to the ADC every time a −100 mV pulse is
generated by the neuron.
230
CHAPTER 4
OPERATIONAL AMPLIFIERS
Probe
Va
Amplifier
ADC
To computer
Vb
Probe
Neuron
Va − Vb
1 ms
t
Rs
Vs
Va
Vb
−100 mV
Figure 4-34: Neural-probe circuit for Example 4-11.
4-13
Multisim Analysis
One of the most attractive features of Multisim is its interactivesimulation mode, which we began to utilize in Sections 2-7 and
3-8. The simulation mode allows you to connect virtual test
instruments to your circuit and to operate them in real time as
Multisim simulates the circuit behavior. In this section, we will
explore this feature with an op-amp circuit and two MOSFET
circuits.
4-13.1
Op Amps and Virtual Instruments
The circuit shown in Fig. 4-35 uses a resistive Wheatstone
bridge (Section 2-5) to detect the change of resistance induced in
a sensor modeled as a variable resistor (see Technology Brief 4
on resistive sensors). The output of the bridge is fed into a
pair of voltage followers and then into a differential amplifier.
The circuit can be constructed and tested in Multisim using
the components listed in Table 4-5. The resistance value of
the potentiometer component is adjustable with a keystroke
(the default is the key “a” to change the resistance in one
direction and the default key combination Shift-a to change
the resistance in the opposite direction) or by using the mouse
slider under the component. In order to observe how changes
in the potentiometer cause changes in the output, we need to
connect the output to an oscilloscope. Multisim provides several
oscilloscopes to choose from, including a generic instrument
and virtual versions of commercial oscilloscopes made by
Agilent and Tektronix. For starters, it is easiest to use the
generic instrument by selecting Simulate → Instruments →
Oscilloscope, or by selecting and dragging an oscilloscope
from the instrument dock. Figure 4-36 shows the complete
circuit drawn in Multisim. The power supplies for the op amps
can be found under Components → Sources → POWER
SOURCES → VDD (or VSS). Once placed, double-click the
VDD (or VSS) component, select the values tab and set the
voltage to 15 V for VDD and −15 V for VSS. Once the circuit
is complete, you can begin the simulation by pressing F5 (or
Simulate → Run) and pause it by pressing F6. Double-click
on the oscilloscope element in the schematic to bring up the
4-13
MULTISIM ANALYSIS
231
R
Sensor
R
~
+
+
_
−
R
15 kΩ
R
1V
R
R
R = 1.5 kΩ
Range: 0 to 3 kΩ
+
_
+
_
+
_
R
Vout
15 kΩ
Sensor bridge
Voltage follower
(Gain = 1)
Differential amplifier
(Gain = 10)
Figure 4-35: Wheatstone-bridge op-amp circuit.
oscilloscope’s screen. The output voltage should be visible as
Channel A in the oscilloscope window. In order to get a good
view of the trace, you might need to adjust both its timebase
and voltage scale using the controls found at the bottom of
the Oscilloscope window. Observe the change in the amplitude
of the output by shifting the resistance value of the sensor
potentiometer.
With Multisim, you can modify different parts of the circuit
and observe the consequent changes in behavior. Make sure
to stop your simulation (not just pause it) before changing
components or wiring.
Concept Question 4-22: What types of Multisim
instruments are available for testing a circuit? (See
)
Concept Question 4-23: Explain what the timebase is on
the oscilloscope. (See
)
Exercise 4-12: Why are the voltage followers necessary in
the circuit of Fig. 4-36? Remove them from the Multisim
circuit and connect the resistive bridge directly to the two
inputs of the differential amplifier. How does the output
vary with the potentiometer setting?
Answer: (See
)
4-13.2 The Digital Inverter
The MOSFET inverter introduced in Section 4-11.2 provides
a good opportunity to explore the difference between steadystate and time-dependent analysis techniques. Consider again
the MOSFET digital inverter of Fig. 4-30. When analyzing
this type of logic gate, we usually are interested in both the
response of the output voltage to a change in input voltage and
in how fast the gate generates the output voltage in response to
a change in input voltage. Both types of analyses are possible
with Multisim.
Table 4-5: List of Multisim components for the circuit in Fig. 4-35.
Component
Group
Family
Quantity
Description
1.5 k
Basic
Resistor
7
1.5 k resistor
15 k
Basic
Resistor
2
15 k resistor
3k
Basic
Variable resistor
1
3 k resistor
OP AMP 5T VIRTUAL
Analog
Analog Virtual
3
Ideal op amp with 5 terminals
AC POWER
Sources
Power Sources
1
1 V ac source, 60 Hz
VDD
Sources
Power Sources
1
15 V supply
VSS
Sources
Power Sources
1
−15 V supply
232
CHAPTER 4
OPERATIONAL AMPLIFIERS
Figure 4-36: Multisim window of the circuit of Fig. 4-35. The oscilloscope trace shows the 60 Hz waveform of the output voltage. Had
the voltage source been a dc source, the oscilloscope trace would have been a horizontal line.
Figure 4-37 shows a MOSFET inverter circuit in Multisim.
To draw this circuit, you need the components listed in
Table 4-6.
Transient Analysis
We can use a function generator (Simulate → Instruments
→ Function Generator) to observe the inverter output as a
function of time. Double-click on the function generator to bring
up its control window. Set the function generator to Square
Wave mode with a frequency of 1 kHz, amplitude of 2.5 V,
and an offset of 1.25 V. This will generate a 0–2.5 V squarewave input. The input and output can be plotted separately as
a function of time using Simulate → Analyses → Transient
Analysis. Whereas in Interactive Simulation the course of time
is open ended (by default it is limited to a duration of 1×1030 s),
when using Transient Analysis we can define the start and stop
times. Maintain the start time at 0 s, set the final time to 0.005 s,
and under the Output tab select the input voltage V(1) as the
voltage to plot. Click Simulate. The input voltage is plotted
as a function of time, as in Fig. 4-38(a). Repeat the simulation
after removing V(1) and adding V(2) under the Output tab.
4-13
MULTISIM ANALYSIS
233
Table 4-6: Components for the circuit in Fig. 4-37.
Component
Group
Family
Quantity
Description
MOS N
Transistors
Transistors VIRTUAL
1
3-terminal N-MOSFET
MOS P
Transistors
Transistors VIRTUAL
1
3-terminal P-MOSFET
VDD
Sources
Power Sources
1
2.5 V supply
GND
Sources
Power Sources
2
Ground node
(a)
Input voltage
(b)
Output voltage
Figure 4-38: Input and output voltages V(1) and V(2) in the
Figure 4-37: Multisim equivalent of the MOSFET circuit of
circuit of Fig. 4-37 as a function of time.
Fig. 4-30.
Figure 4-38(b) shows the output voltage as a function of time.
The input and output plots are essentially mirror images of one
another.
Steady-State Analysis
In order to analyze the steady-state output behavior, we first
must remove the function generator and replace it with a
234
CHAPTER 4
DC Sweep
OPERATIONAL AMPLIFIERS
Exercise 4-13: The IV Analyzer is another useful
Multisim instrument for analyzing circuit performance.
To demonstrate its utility, let us use it to generate
characteristic curves for an NMOS transistor similar to
those in Fig. 4-28(b). Figure E4.13(a) shows an NMOS
connected to an IV Analyzer. The instrument sweeps
through a range of gate (G) voltages and generates a
current-versus-voltage (IV) plot between the drain (D)
and source (S) for each gate voltage. Show that the
display of the IV analyzer is the same as that shown in
Fig. E4.13(b).
Answer: (See
C3
)
Figure 4-39: Output response of the MOSFET inverter circuit
of Fig. 4-37 as a function of the amplitude of the input voltage.
dc voltage source. The actual voltage value of the source is
unimportant. Once wired, select Simulate → Analyses →
DC Sweep. This analysis is similar to the DC Operating
Point Analysis, but it sweeps through a range of voltages at
a node of your choice and solves for the resultant steady-state
voltage (or current) at any other node you select. In this way,
you can generate and plot input-output relationships for circuits
and components.
Choose the source name vv1 as the input and enter 0 V,
2.5 V, and 0.01 V for the start, stop, and increment values,
respectively. Under the Output tab, select the output voltage
V(2) as the voltage to plot. Click Simulate. Figure 4-39 shows
that the output displays the expected inverter behavior: an input
in the 0 to 500 mV range generates an output of ∼ 2.5 V;
conversely, when the input is in the range between 2 and 2.5 V,
the circuit generates an output voltage of ∼ 0 V. In between,
we see a gradual transition zone.
Concept Question 4-24: How do the DC Operating
Point Analysis, Transient Analysis, and DC Sweep
analyses differ? (See
)
Concept Question 4-25: How many types of waveforms
can the generic function-generator instrument provide?
(See
)
(a)
VGS = 5 V
VGS = 3.75 V
VGS = 2.5 V
VGS = 1.25 V
VGS = 0
(b)
Figure E4.13 (a) Circuit schematic and (b) IV analyzer
traces for IDS versus VDS at selected values of VGS .
4-13
MULTISIM ANALYSIS
235
Summary
Concepts
• Despite its complex circuit architecture, the op amp
can be modeled in terms of a relatively simple, linear
equivalent circuit.
• The ideal op amp has infinite gain A, infinite input
resistance Ri , and zero output resistance Ro .
• Through resistive feedback connections between its
output and its two inputs, the op amp can be made to
amplify, sum, and subtract multiple input signals.
• Multistage op-amp circuits can be configured to support
a variety of signal-processing functions.
• Cascaded circuit blocks can be analyzed or designed
individually and then combined together if Ro of the first
circuit is much smaller than Ri of the second circuit.
• Buffers are used to increase Ri of the followup circuit.
• The instrumentation amplifier is a high-gain, highsensitivity detector of small signals, making it
particularly suitable for sensing deviations from
reference conditions.
• Multisim can accommodate op-amp circuits and
simulate their input-output responses.
Mathematical and Physical Models
Ideal op amp
Noninverting
υp = υn
ip = in = 0
amp∗
Inverting amp∗
Summing
amp∗
Important Terms
action potential
ADC
adder
bit
buffer
circuit gain
closed-loop gain
CMOS
complementary MOS
current constraint
difference amplifier
digital inverter
digital-to-analog
converter
DIP configuration
drain
dynamic range
feedback
feedback resistance
gain-control resistance
υo
R1 + R2
G=
=
υs
R2
υo
Rf
G=
=−
υs
Rs
υ1
υ2
υo = −Rf
+
R1
R2
Difference amp∗
υo = G2 υ2 + G1 υ2
Voltage follower∗
υo = υs
2R
υo = 1 +
(υ2 − υ1 )
R2
(with gain-control resistor R2 )
Instrumentation amp
MOSFET
∗ See Table
4-3.
Vout = VDD − gRD Vin
Provide definitions or explain the meaning of the following terms:
gate
ideal op-amp current
constraint
ideal op-amp voltage
constraint
input resistance
input source resistance
instrumentation amplifier
inverter
inverting
inverting adder
inverting amplifier
inverting input
inverting summing
amplifier
IV Analyzer
least significant bit
linear
linear dynamic range
loading
metal-oxide semiconductor
field-effect transistor
MOSFET
MOSFET gain constant
most significant bit
negative feedback
negative saturation
neural interface
neural probe
neuron
NMOS
noninverting amplifier
noninverting
noninverting input
noninverting summing
amplifier
oscilloscope
op amp
op-amp gain
open-loop gain
operational amplifier
output resistance
overloading
percent clipping
PMOS
positive feedback
positive saturation
R–2R ladder
saturation threshold value
scaled inverting adder
sensor
signal-processing circuit
source
subtraction
summing amplifier
unity gain amplifier
voltage constraint
voltage follower
voltage rails
236
CHAPTER 4
PROBLEMS
(a) Use the equivalent-circuit model of Fig. 4-6 to obtain an
expression for the closed-loop gain G = υo /υs in terms of
Rs , Ri , Ro , RL , Rf , and A.
Sections 4-1 and 4-2: Op-Amp Characteristics and
Negative Feedback
(b) Determine the value of G for Rs = 10 �, Ri = 10 M�,
Rf = 1 k�, Ro = 50 �, RL = 1 k�, and A = 106 .
*4.1 An op amp with an open-loop gain of 106 and Vcc = 12 V
has an inverting-input voltage of 20 μV and a noninvertinginput voltage of 10 μV. What is its output voltage?
4.2 An op amp with an open-loop gain of 6 × 105 and
Vcc = 10 V has an output voltage of 3 V. If the voltage at
the inverting input is −1 μV, what is the magnitude of the
noninverting-input voltage?
*4.3 What is the output voltage for an op amp whose
noninverting input is connected to ground and its invertinginput voltage is 4 mV? Assume that the op-amp open-loop gain
is 2 × 105 and its supply voltage is Vcc = 10 V.
4.4 With its noninverting-input voltage at 10 μV, the output
voltage of an op amp is −15 V. If A = 5 × 105 and Vcc = 15 V,
can you determine the magnitude of the inverting-input voltage?
If not, can you determine its possible range?
4.5 For the op-amp circuit shown in Fig. P4.5:
(b) Simplify the expression by applying the ideal op-amp
model (taking A → ∞, Ri → ∞, and Ro → 0).
is
Rs
+
_
υp
+
_
υn
Rs
υo
Rf
+
υs _
RL
Figure P4.6: Circuit for Problem 4.6.
(a) Use the op-amp equivalent-circuit model to develop an
expression for G = υo /υs .
(b) Simplify the expression by applying the ideal op-amp
model parameters, namely A → ∞, Ri → ∞, and
Ro → 0.
_
iL
Figure P4.5: Circuit for Problem 4.5.
4.6 The inverting-amplifier circuit shown in Fig. P4.6 uses a
resistor Rf to provide feedback from the output terminal to the
inverting-input terminal.
Answer(s) available in Appendix G.
*(d) Evaluate the approximate expression obtained in (c) and
compare the result with the value obtained in (b).
R1
RL
∗
(c) Simplify the expression for G obtained in (a) by letting
A → ∞, Ri → ∞, and Ro → 0 (ideal op-amp model).
4.7 For the circuit in Fig. P4.7:
(a) Use the model given in Fig. 4-6 to develop an expression
for the current gain Gi = iL /is .
υp
υn
OPERATIONAL AMPLIFIERS
+
υs _
+
υo
RL
Figure P4.7: Circuit for Problem 4.7.
4.8 The op-amp circuit shown in Fig. P4.8 has a constant dc
voltage of 6 V at the noninverting input. The inverting input is
the sum of two voltage sources consisting of a 6 V dc source
and a small time-varying signal υs .
PROBLEMS
237
(a) Use the op-amp equivalent-circuit model given in Fig. 4-6
to develop an expression for υo .
(b) Simplify the expression by applying the ideal op-amp
model, which lets A → ∞, Ri → ∞, and Ro → 0.
υo
+
6V _
υs
a
R1
R3
RL
+
_
_
R2
_
+
_
+
6V _
Rf
+
υs
R4
b
Figure P4.10: Circuit for Problem 4.10.
4.11 Determine the output voltage for the circuit in Fig. P4.11
and specify the linear range for υs , given that Vcc = 15 V and
V0 = 0.
Figure P4.8: Circuit for Problem 4.8.
200 kΩ
Sections 4-3 and 4-4: Ideal Op Amp and Inverting Amp
2 kΩ
_
Assume all op amps to be ideal from here on forward.
*4.9 The supply voltage of the op amp in the circuit of Fig. P4.9
is 16 V. If RL = 3 k�, assign a resistance value to Rf so that
the circuit would deliver 75 mW of power to RL .
50 Ω
+
3V _
4 kΩ
+
_
+
100 kΩ
υs
υo
Vcc = 15 V
+
_
V0
Figure P4.11: Circuit for Problems 4.11 and 4.12.
Vcc = 16 V
Rf
υo
+
RL
4.12 Repeat Problem 4.11 for V0 = 0.1 V.
*4.13 Obtain an expression for the voltage gain G = υo /υs for
the circuit in Fig. P4.13.
R2
Figure P4.9: Circuit for Problem 4.9.
_
4.10 In the circuit of Fig. P4.10, a bridge circuit is connected
at the input side of an inverting op-amp circuit.
(a) Obtain the Thévenin equivalent at terminals (a, b) for the
bridge circuit.
R1
Rs
R3
+
υo
RL
υs
Figure P4.13: Circuit for Problem 4.13.
(b) Use the result in (a) to obtain an expression for G = υo /υs .
(c) Evaluate G for R1 = R4 = 100 �, R2 = R3 = 101 �,
and Rf = 100 k�.
4.14 For the op-amp circuit shown in Fig. P4.14:
(a) Obtain an expression for the current gain Gi = iL / is .
238
CHAPTER 4
OPERATIONAL AMPLIFIERS
*(b) If RL = 12 k�, choose Rf so that Gi = −15.
Rf
_
Rf
600 Ω
_
is
iL
+
Rs
Vcc = 7 V
400 Ω
RL
υo
+
1200 Ω
1200 Ω
+
υs _
Figure P4.14: Circuit for Problem 4.14.
Figure P4.18: Circuit for Problems 4.18 and 4.19.
+
_
5 kΩ
20 kΩ
υs
Vcc = 6 V
υo 4 kΩ
70 kΩ
υL
*4.19 Repeat Problem 4.18 for Rf = 0.
4.20 Determine the linear range of the source υs in the circuit
of Fig. P4.20.
1.2 kΩ
RL
_
10 kΩ
200 Ω
Figure P4.15: Circuit for Problems 4.15 and 4.16.
υs
*4.16 For the circuit of Fig. P4.15, what should the resistance
value of RL be so as to have maximum transfer of power into
it?
4.17 Determine υo across the 10 k� resistor in the circuit of
Fig. P4.17.
2 kΩ
1V
_
+
_
+
50 Ω
5V
+
_
υo
υo
Vcc = 12 V
*4.21 Repeat Problem 4.20 after replacing the 2 V dc source
in Fig. P4.20 with a short circuit.
4.22 The circuit in Fig. P4.22 uses a potentiometer whose
total resistance is R = 10 k� with the upper section being βR
and the bottom section (1 − β)R. The stylus can change β from
0 to 0.9. Obtain an expression for G = υo /υs in terms of β and
evaluate the range of G (as β is varied over its own allowable
range).
υs
100 Ω
+
_
βR
(1 − β)R
υo
678
4.18 Evaluate G = υo /υs for the circuit in Fig. P4.18, and
specify the linear range of υs . Assume Rf = 2400 �.
+
_ 2V
+
Figure P4.20: Circuit for Problems 4.20 and 4.21.
10 kΩ
Figure P4.17: Circuit for Problem 4.17.
400 Ω
876 876
4.15 Determine the gain G = υL /υs for the circuit in
Fig. P4.15 and specify the linear range of υs for RL = 4 k�.
R = 10 kΩ
Figure P4.22: Circuit for Problem 4.22.
PROBLEMS
239
4.23 For the circuit in Fig. P4.23, obtain an expression for
voltage gain G = υo /υs .
4.28 For the circuit in Fig. P4.28, generate a plot for υL as a
function of υs over the full linear range of υs .
5 kΩ
υs
+
_
_
+
υo
20 kΩ
4 kΩ
6 kΩ
υs
Find the value of υo in the circuit in Fig. P4.24.
4V
+
_
+
0.5 V _
Figure P4.23: Circuit for Problem 4.23.
*4.24
4 kΩ
+
_
10 kΩ
4.27 Design an op-amp circuit that performs an averaging
operation of five inputs υ1 to υ5 .
υL
RL
Vcc = 12 V
Figure P4.28: Circuit for Problem 4.28.
4 kΩ
6 kΩ
6 kΩ
2 mA
_
+
2 kΩ
5V
υo
4.29 Relate υo in the circuit of Fig. P4.29 to υs and specify
the linear range of υs . Assume V0 = 0.
8 kΩ
+
_
Vcc = 16 V
_
2 kΩ
Figure P4.24: Circuit for Problem 4.24.
υs
4.25 Determine the linear range of υs for the circuit in
Fig. P4.25.
3V
8 kΩ
4 kΩ
+
_
4V
+
_
+
+
_ V0
io
υo
RL
Figure P4.29: Circuit for Problems 4.29 through 4.31.
Vcc = 16 V
10 kΩ
2V
+
_
υs
+
_
+
_
20 kΩ
υo
15 kΩ
Figure P4.25: Circuit for Problem 4.25.
Sections 4-5 and 4-6: Summing and Difference Amplifiers
4.26 If R2 = 4 k�, select values for Rs1 , Rs2 , and R1 in the
circuit of Fig. 4-15 so that υo = 3υ1 + 5υ2 .
*4.30 Repeat Problem 4.29 for V0 = 6 V.
4.31 Determine the current io flowing into the op-amp of the
circuit in Fig. P4.29 under the conditions υs = 0.5 V, V0 = 0,
and RL = 10 k�.
4.32 Design a circuit containing a single op amp that can
perform the operation υo = 3 × 104 (i2 − i1 ), where i2 and i1
are input current sources.
4.33 Design a circuit that can perform the operation
υo = 3υ1 + 4υ2 − 5υ3 − 8υ4 , where υ1 to υ4 are input voltage
signals.
240
CHAPTER 4
4.34
Relate υo in the circuit of Fig. P4.34 to υ1 , υ2 , and υ3 .
υ1
Rf
4 kΩ
R5
R4
R1
OPERATIONAL AMPLIFIERS
Vcc = 10 V
3 kΩ
_
R2
υ2
R3
_
+
υo
+
RL
7V
υ3
+
_
+
_
+
_
6V
υo
4V
Figure P4.34: Circuit for Problem 4.34.
Figure P4.37: Circuit for Problem 4.37.
*4.35 For the circuit in Fig. P4.35, obtain an expression for υo
in terms of υ1 , υ2 , and the four resistors. Evaluate υo if
υ1 = 0.1 V, υ2 = 0.5 V, R1 = 100 �, R2 = 200 �,
R3 = 2.4 k�, and R4 = 1.2 k�.
*4.38 Determine υo and the power dissipated in RL in the
circuit of Fig. P4.38.
R3
υ1
υ2
_
R4
R2
Vcc = 16 V
υo
+
7 kΩ
+
R1
5 kΩ
2V
_
4V
+
_
_
+
3 kΩ
3 kΩ
4 kΩ
υo
2 kΩ
2 kΩ
RL
Figure P4.35: Circuit for Problem 4.35.
Figure P4.38: Circuit for Problem 4.38.
4.36
Find the value of υo in the circuit in Fig. P4.36.
5 kΩ
2 kΩ
3V
+
_
9V
+
_
6 kΩ
4.39 The circuit in Fig. P4.39 contains two single-pole singlethrow switches, S1 and S2 . Determine the closed-circuit gain
G = υo /υs for each of the four possible closed/open switch
combinations.
4 kΩ
_
+
υo
24 kΩ
4 kΩ
S2
6 kΩ
Figure P4.36: Circuit for Problem 4.36.
4.37 Find the range of Rf for which the op amp in the circuit
of Fig. P4.37 does not saturate.
υs
6 kΩ
S1
_
+
6 kΩ
Figure P4.39: Circuit for Problem 4.39.
υo
PROBLEMS
241
Section 4-8: Op-Amp Signal-Processing Circuits
*4.46 Relate υo in the circuit of Fig. P4.46 to υs .
4.40 Develop a block-diagram representation for the circuit
in Fig. P4.40 for υs2 = υs3 = 0 and
*(a) R1 = open circuit
υs
_
Rs
+
(b) R1 = 10 k�.
υs1
υs2
24 kΩ
4 kΩ
400 kΩ
_
20 kΩ
+
2 kΩ
R1
υs3
R3
R2
_
+
R1
υo
+
4.47 In the circuit of Fig. P4.47, op amp 1 receives feedback
at its input from its own output as well as from the output of op
amp 2. Relate υo to υs .
Rf3
4.41 Develop a block-diagram representation for the circuit
in Fig. P4.40 for υs3 = 0 and R1 = ∞.
4.42 Develop a block-diagram representation for the circuit
in Fig. P4.40 for υs2 = 0 and R1 = ∞.
υs
Rf1
Rs1
_
Op
_
Amp 1
Rf2
Rs2
Figure P4.47: Circuit for Problem 4.47.
(b) Specify the linear range of υs .
(c) Determine υo for υs = 0.3 V and RL = 10 k�.
4.48 Relate υo in the circuit of Fig. P4.48 to υ1 and υ2 .
80 kΩ
+
_
0.4 V
2 kΩ
8 kΩ
Vcc = 12 V
_
+
υo
+
(a) Develop a block-diagram representation with RL as a
variable parameter.
4 kΩ
_
Op
Amp
+ 2
+
For the circuit in Fig. P4.43:
υs
RL
Figure P4.46: Circuit for Problem 4.46.
_
Figure P4.40: Circuit for Problems 4.40 through 4.42.
4.43
υo
Vcc = 12 V
+
_
10 kΩ
2 kΩ
υo
υ1
RL
Figure P4.43: Circuit for Problem 4.43.
4.44 Design an op-amp circuit that can perform the operation
υo = 12υs1 + 3υs2 , while simultaneously presenting an input
resistance of 50 k� on the input side for source υs1 and an
input resistance of 25 k� on the input side for source υs2 .
4.45 Design an op-amp circuit that can perform the operation
υo = 4υs1 − 3υs2 , while simultaneously presenting an input
resistance of 10 k� on the input side for source υs1 and an
input resistance of 5 k� on the input side for source υs2 .
_
+
20 kΩ
+
_
υ2
2 kΩ
40 kΩ
_
+
0.5 kΩ
10 kΩ
4 kΩ
_
+
υo
10 kΩ
40 kΩ
+
_
0.5 kΩ
16 kΩ
Figure P4.48: Circuit for Problem 4.48.
4.49 Design an op-amp circuit that can perform the operation
io = (30i1 − 8i2 + 0.6) A where i1 and i2 are input current
sources.
242
CHAPTER 4
+
_
10 kΩ
υo
+
_
12 kΩ
8 kΩ
6 kΩ
4 kΩ
3V
_
4V
_
4Ω
2Ω
4Ω
4Ω
_
+
5V
_
2 kΩ
+
υs 50 kΩ
4.53 Solve for υo in the circuit in Fig. P4.53.
+
Relate the output voltage υo in Fig. P4.50 to υs .
+
*4.50
OPERATIONAL AMPLIFIERS
4Ω
6Ω
+
_
4.51
υo
6Ω
2Ω
Figure P4.50: Circuit for Problem 4.50.
3Ω
_
+
2Ω
Solve for υo in terms of υs for the circuit in Fig. P4.51.
Figure P4.53: Circuit for Problem 4.53.
10 kΩ
+
_
υs
4V
_
+
+
_
12 kΩ
6 kΩ
3V
_
+
*4.54 If υo = −3 V, what is the value of υs in the circuit in
Fig. P4.54?
υo
+
_
υs
_
Figure P4.51: Circuit for Problem 4.51.
*4.52
10 kΩ
+
2 kΩ
3 kΩ
_
+
7 kΩ
6 kΩ
_
+
+
_
υo
2V
Find the value of υo in the circuit in Fig. P4.52.
Figure P4.54: Circuit for Problem 4.54.
3 kΩ
6 kΩ
8 kΩ
9V
+
_
_
+
5V
4 kΩ
+ 3 kΩ
_
Sections 4-9 and 4-10: Instrumentation Amp and D/A
Converter
+
_
8 kΩ
Figure P4.52: Circuit for Problem 4.52.
υo
4.55 The instrumentation-amplifier circuit shown in Fig. 4-23
is used to measure the voltage differential �υ = υ2 − υ1 . If
the range of variation of �υ is from −10 to +10 mV and
R1 = R3 = R4 = R5 = 100 k�, choose R2 so that the corresponding range of υo is from −5 to +5 V.
*4.56 An instrumentation amplifier with R1 = R3 = 10 k�,
R4 = 1 M�, and R5 = 1 k� uses a potentiometer for the gaincontrol resistor R2 . If the potentiometer resistance can be varied
PROBLEMS
243
between 10 and 100 �, what is the corresponding variation of
the circuit gain G = υo /(υ2 − υ1 )?
4.57 Design a five-bit DAC using a circuit configuration
similar to that in Fig. 4-25.
4.58 Design a six-bit DAC using a R–2R ladder configuration.
Section 4-11: MOSFET
4.61 In Problem 3.73 of Chapter 3, we analyzed a current
mirror circuit containing BJTs. Current mirror circuits also
can be designed using MOSFETs, as shown in Fig. P4.61.
Determine the relationship between I0 and IREF .
IREF
I0
D
4.59 In Example 4-9, we analyzed a common-source
amplifier without a load resistance. Consider the amplifier in
Fig. P4.59; it is identical to the circuit in Fig. 4-31, except that
we have added a load resistor RL . Obtain an expression for υout
as a function of υs .
S
D
G
S
Figure P4.61: Circuit for Problem 4.61.
VDD
RD
Section 4-13: Multisim Analysis
Rs
G
+
υs(t) _
D
S
+
RL
υout(t)
4.62 Draw a noninverting amplifier (Fig. 4-7) with a gain
of 2 in Multisim. Show that the circuit works as expected by
connecting a 1 V pulse source and plotting both the input and the
output voltages using the Grapher Tool and Transient Analysis.
Use the 3-terminal virtual op-amp component.
_
Figure P4.59: MOSFET circuit for Problem 4.59.
*4.60 Determine υout (t) as a function of υs (t) for the circuit
in Fig. P4.60. Assume VDD = 2.5 V.
VDD
4.64 In Multisim, draw a summing amplifier that adds the
values of four different dc voltage sources, each with an
inverting gain of 4. Use the DC Operating Point analysis tool
to verify the circuit performance.
1 kΩ
10 Ω
+
υs(t) _
g1 = 10 A/V
4.63 Draw an inverting amplifier (Fig. 4-11) with a gain of
−3.5 in Multisim. Show that the circuit works as expected by
connecting a 1 V dc voltage source and solving the circuit using
the DC Operating Point analysis. Use the 3-terminal virtual opamp component.
g2 = 100 A/V
+
1 kΩ
υout(t)
_
Figure P4.60: Two-MOSFET circuit for Problem 4.60.
4.65 In Multisim, draw a noninverting summing amplifier that
adds the values of three different dc voltage sources V1 , V2 ,
and V3 with gains of 1, 2, and 5, respectively. Apply the DC
Operating Point Solution tool to demonstrate that the circuit
functions as specified.
4.66 Draw the op-amp circuit shown in Fig. P4.66 in
Multisim, provide a DC Operating Point Analysis solution that
demonstrates its operation, and state what function the circuit
performs.
244
CHAPTER 4
50 kΩ
+
υin1
50 kΩ
_
+
+
50 kΩ
40 kΩ
10 kΩ
_
Potpourri Questions
50 kΩ
+
_
υout
+
υin2
_
_
Figure P4.66: Circuit for Problem 4.66.
4.67 Construct the noninverting amplifier circuit shown in
Fig. P4.67 in Multisim. Set the value of R to 50 k� and then
perform a DC Sweep analysis of the input voltage from −5 to
+5 V. Plot the Output. Now change the value of R to 80 k�
and repeat the DC Sweep analysis. Compare the two plots either
side by side or by overlapping them using the Overlay Traces
button on the Grapher toolbar. (Use the three-terminal virtual
op amp for the simulation.)
Vin
+
_
Vout
4.69 Based on the information provided in Table TT9-1 of
Technology Brief 9, which types of display technologies are
best suited for a large football stadium? A home TV? A cell
phone screen?
4.70 What are the limitations of today’s computer memory
circuits (ROM and RAM), and what emerging technologies are
becoming available to improve them?
4.71 Circuit analysis and design can be performed analytically by applying the techniques covered in this book, or they
can be performed by computer simulation. Are these competing
or complementary approaches? Explain.
Integrative Problems: Analytical / Multisim / myDAQ
To master the material in this chapter, solve the following problems using three complementary approaches: (a) analytically,
(b) with Multisim, and (c) by constructing the circuit and using
the myDAQ interface unit to measure quantities of interest
via your computer. [myDAQ tutorials and videos are available
on
.]
m4.1
R1
10 kΩ
OPERATIONAL AMPLIFIERS
R
Figure P4.67: Circuit for Problem 4.67.
4.68 Until the 1970s, much research was carried out on analog
computers (as distinguished from the digital computers found
everywhere today). In fact, analog computers were one of the
originally intended users of operational amplifiers. Op amps
easily can be incorporated to perform many mathematical
operations.
Using the basic op-amp circuits shown in this chapter,
construct a circuit that expresses the following algebraic
equation in voltage:
υ = 2x − 3.5y + 0.2z,
where υ is the output voltage and x, y, and z are three
input voltages. Once you have the circuit designed, build it in
Multisim and demonstrate that the circuit behaves appropriately
by giving it the following inputs: x = 1.2, y = 0.4, and
z = 0.9.
Ideal Op-Amp Model:
(a) Determine a general expression for υout in terms of the
resistor values and is for the circuit of Fig. m4.1 (no
Multisim or myDAQ for this part).
(b) Find Vout for these specific component values:
R1 = 3.3 k�,
R2 = 4.7 k�,
R3 = 1.0 k�,
and
Is = 1.84 mA.
(c) Replace R2 with a potentiometer. Use myDAQ and the
potentiometer to determine Vout for each of the following
values of R2 : 2.5 k�, 10 k�, and 25 k�.
R1
R3
R2
Is
_
+
Vout
Figure m4.1 Circuit for Problem m4.1.
PROBLEMS
245
m4.2 Noninverting Amplifier: The circuit in Fig. m4.2 uses
a potentiometer whose total resistance is R1 . The movable
stylus on terminal 2 creates two variable resistors: βR1 between
terminals 1 and 2 and (1−β)R1 between terminals 2 and 3. The
movable stylus varies β over the range 0 ≤ β ≤ 1.
υ1
1V
(a) Obtain on expression for G = υo /υs in terms of β.
(b) Calculate the amplifier gain for β = 0.0, β = 0.5,
and β = 1.0 with component values R1 = 10 k� and
R2 = 1.5 k�.
(c) Let υs be a 100 Hz sinusoidal signal with a 1 V peak value.
Plot υo and υs to scale for β = 0.0, β = 0.5, and β = 1.0.
υs
5
10
−1 V
υ2
1V
υ0
+
_
βR1
2
2.5 5 7.5 10
1
R1
(1 − β)R1
t (ms)
t (ms)
Figure m4.3 Input waveforms for Problem m4.3.
3
R2
Figure m4.2 Circuit for Problem m4.2.
m4.3
Summing Amplifier:
(a) Design an op-amp summing circuit that performs the
operation υo = −(2.14υ1 + 1.00υ2 + 0.47υ3 ). Use not
more than four standard-value resistors with values
between 10 k� and 100 k�. Refer to the resistor parts
list in Appendix A of the myDAQ tutorial on the EM .
(b) Draw the output waveform υo for the input waveforms υ1
and υ2 shown in Fig. m4.3 and υ3 = 4.7 V.
(c) State the minimum and maximum values of υo .
m4.4
Signal Processing Circuits:
(a) Design a two-stage signal processor to serve as a
“distortion box” for an electric guitar. The first-stage
amplifier applies a variable gain magnitude in the range
13.3 to 23.3 while the second-stage amplifier attenuates
the signal by 13.3, i.e., the second-stage amplifier has
a fixed gain of 1/13.3. Note that when the first-stage
amplifier gain is 13.3 the overall distortion box gain
is unity. The distortion effect relies on intentionally
driving the first-stage amplifier into saturation (also
called “clipping”) when its gain is higher than 13.3. Use
a 10 k� potentiometer and standard-value resistors in the
range 1.0 k� and 100 k�; see the resistor parts list in
. You may
Appendix A of the myDAQ tutorial on
combine two standard-value resistors in series to achieve
the required amplifier gains.
(b) Derive a general formula for percent clipping of a unitamplitude sinusoidal test signal; this is the percent of
time during one period in which the signal is clipped.
The formula includes the peak sinusoidal voltage Vp that
would appear at the output of the first-stage amplifier with
saturation ignored and the actual maximum value Vs due
to saturation.
(c) Apply your general formula to calculate percent clipping
of a 1 V peak amplitude sinusoidal signal for the
potentiometer dial in three positions: fully counterclockwise (no distortion), midscale (moderate distortion),
and fully clockwise (maximum distortion). Assume the
op-amp outputs saturate at ±13.5 V.
(d) Apply a 1 V peak amplitude sinusoidal signal with 100 Hz
frequency to the distortion box input and plot its output for
the potentiometer dial in the same three positions as above.
State the maximum and minimum values of the distortion
box output.
m4.5 Multiple Op-Amp Stages: Determine Vout in each of
the two circuits in Fig. m4.5.
246
CHAPTER 4
OPERATIONAL AMPLIFIERS
R1
_
V1
+
4V
_
V2
+
2V
5.6 kΩ
1
_
10 kΩ
+
+
R3
Vout1
10 kΩ
_
(a)
R1
_
V1
+
4V
_
V2
+
2V
1
10 kΩ
5.6 kΩ
_
R2
+
1.5 kΩ
R4
_
R3
1 kΩ
+
+
Vout2
10 kΩ
_
(b)
Figure m4.5 Circuits for Problem m4.5.
m4.6 The Importance of Voltage Followers: Suppose you
are asked to design a circuit to power a certain gadget and the
only source available to you is the 15 V source from your NI
myDAQ. Your boss tells you that in order for the gadget to
operate properly, its input voltage should be 10.3 V. Moreover,
you are told that the input equivalent load resistance of the
gadget is exceedingly high (greater than 10 M). To generate
the required 10.3 V source, you used the voltage divider shown
in Fig. m4.6.
(a) Confirm that the voltage divider provides an output voltage
of 10.3 V.
(b) It turns out that the information given to you about the
load resistance is in error; the true load resistance of the
gadget is 10 k, not 10 M, and the required input current
is 1.03 mA. Reevaluate your circuit in light of the new
information. What is the input voltage for the gadget and
what is the input current?
+
15 V _
R1
15 kΩ
R3
33 kΩ
+
V_in
Gadget
Figure m4.6 Circuit for Problem m4.6.
(c) To fix the problem, you decide to use a voltage follower.
Design a voltage follower in conjunction with your voltage
divider from part (a) to achieve a 1.03 mA current through
the 10 k load resistor.
PROBLEMS
247
R6
R3
100 kΩ
+
1V _
V1
+
_
R7
_
1 kΩ
+
V1
R2
R8
5.6 kΩ
R1 10 kΩ
1 kΩ
R5
3.3 kΩ
1V
+
_
V2
R4
_
1 kΩ
+
V2
Figure m4.7 Circuit for Problem m4.7.
m4.7 Cascaded Op Amps: Find the voltage at each of the
three op-amp outputs in the circuit of Fig. m4.7.
3.3 kΩ
V3
5
5
CHAPTER
C H A P T E R
RC and RL First-Order Circuits
Contents
5-1
5-2
TB12
5-3
5-4
5-5
TB13
5-6
TB14
5-7
5-8
Overview, 249
Nonperiodic Waveforms, 250
Capacitors, 258
Supercapacitors, 265
Inductors, 269
Response of the RC Circuit, 275
Response of the RL Circuit, 287
Hard Disk Drives (HDD), 293
RC Op-Amp Circuits, 295
Capacitive Sensors, 301
Application Note: Parasitic Capacitance
and Computer Processing Speed, 305
Analyzing Circuit Response with
Multisim, 310
Summary, 313
Problems, 314
Charge/discharge time
Objectives
Learn to:
Use mathematical functions to describe several
types of nonperiodic waveforms.
Define the electrical properties of a capacitor,
including its i-υ relationship and energy equation.
Combine multiple capacitors when connected in
series or in parallel.
Define the electrical properties of an inductor,
including its i-υ relationship and energy equation.
Combine multiple inductors when connected in
series or in parallel.
Capacitors (C) and inductors (L) are energy storage devices,
in contrast with resistors, which are energy dissipation devices.
This chapter examines the behavior of RC and RL circuits, to
be followed in Chapter 6 with an examination of RLC circuits.
Analyze the transient responses of RC and RL
circuits.
Design RC op-amp circuits to perform differentiation and integration and related operations.
Apply Multisim to analyze RC and RL circuits.
249
Overview
A resistor is characterized by a linear i–υ relationship, namely
υ = iR, which does not involve time explicitly. When we
apply Kirchhoff’s current and voltage laws to resistive circuits,
we end up with one or more simultaneous linear equations.
The process of solving a set of linear equations is relatively
straightforward and does not involve time explicitly, but if i
varies with time, so will υ, in a linearly proportionate manner,
and the character of the time variation remains the same for
both. Hence, even when a certain voltage or current source
in the circuit varies with time, we solve the resistive circuit
using static formulas that do not depend on time rather than
dynamic formulas that do, because the time variation is merely
a scale change. Another important feature of resistive elements
is that they consume electrical energy by converting it into
heat.
Resistive circuits are used to change the relationship
between υ and i, divide voltages and currents, and (with the
addition of op amps) amplify, add, subtract, and compare
voltages. Resistive sensors allow us to convert properties of
the physical world—light, heat, sound, moisture, pressure,
etc.—to voltage and current values that we can use in our
circuits.
Capacitors and inductors represent a contrasting (yet
complementary) class of electrical devices. Not only is
time t (or more precisely d/dt) at the heart of how
capacitors and inductors function, but they also differ
from resistors in that they do not dissipate energy. They
can store energy and then release it—but not consume
it. The addition of capacitors and inductors to circuits
containing time-varying sources opens the door to dynamic
circuits with a wide range of practical applications. Because
capacitors and inductors store energy, they can be used to
smooth out or average time-varying voltages or currents, select
or filter out different frequencies, and delay circuit responses.
Capacitive sensors can also be used to measure proximity,
touch, pressure, moisture, vibration, and more. Both capacitors
and inductors also are found as unintended parasitics in all
circuits. The dynamic, time-varying responses of capacitors
and inductors provide a new and important set of tools
for controlling voltage and current. The dynamic response
of a circuit to a certain voltage or current source depends
on both the architecture of the circuit and the waveform
characterizing the time variation of that source. In general, the
response consists of a transient component and a steady-state
component.
The transient response represents the initial reaction
immediately after a sudden change, such as closing or
opening a switch to connect a source to the circuit. This
is also called the early time response. Most (but not all) electronic circuits are designed such
that the transient response usually dies out or reaches an
approximately constant level within a fraction of a second after
the introduction of the external excitation. An example of a
transient response is when the energy stored in a capacitor is
transferred into the flashbulb of a camera. Figure 5-1 shows
examples of two typical circuit responses. In part (a), the
external excitation is a dc voltage source, and the displayed
response represents the current flowing through a certain
capacitor in the circuit, starting when the switch is closed.
This is much like the camera flash example. The current
levels labeled i0 and i∞ denote the values exhibited by
the transient response at the onset of the change (closing
the switch at t = 0) and a long time afterward (at t = ∞),
respectively. They are called the initial and final (or steady
state) values of i(t). For this example, the steady state current
is i∞ = 0.
Our second example displays in Fig. 5-1(b) the response
of another circuit to turning on a sinusoidally time-varying
source. The combination of the ac source and switch action
initially elicit a transient response that quickly transitions into
a steady-state response. This steady state ac case belongs to
a class of external excitations and circuit responses called
periodic waveforms (which repeat periodically). In contrast,
a dc waveform is nonperiodic (it does not repeat). As we
shall see later, the tools of circuit analysis and design lend
themselves to different mathematical approaches when dealing
with periodic versus nonperiodic waveforms. We will first
examine the behavior of circuits excited by nonperiodic external
excitations in this and the following chapter, before we pursue
the treatment of periodic ac circuits starting in Chapter 7.
Section 5-1 introduces some of the nonperiodic waveforms
commonly used in electric circuits, followed in Sections 5-2 and
5-3 with presentations of the circuit properties of capacitors and
inductors, respectively. Our treatment of the circuit response
to nonperiodic excitations is divided into two segments. The
first, covered in Sections 5-4 through 5-6 of this chapter, deals
with first-order circuits, so named because their Kirchhoff
voltage and current equations are characterized by first-order
differential equations.
250
CHAPTER 5
RC AND RL FIRST-ORDER CIRCUITS
i(t)
i0 (initial value)
υ(t)
+
_
i (final value)
t
8
R
0
t=0
(a) dc transient response
Circuit
i(t)
Transient response
Steady−state response
t
0
(b) Combined response to ac excitation
Figure 5-1: Circuit response to (a) dc source υ(t) = V0 and (b) ac source υ(t) = V0 cos ωt.
First-order circuits include RC circuits—composed
of sources, resistors, and a single capacitor (or multiple
capacitors that can be combined into a single equivalent
capacitor)—and RL circuits, but not circuits containing
capacitors and inductors simultaneously. RLC circuits, which give rise to second-order differential
equations, are the subject of Chapter 6.
Concept Question 5-1: What is the difference between
the transient and steady-state components of the circuit
response? (See
)
Concept Question 5-2: Why do we study the circuit
response to dc and ac sources separately? (See
)
5-1 Nonperiodic Waveforms
Among the multitudes of possible nonperiodic waveforms, the
step, ramp, pulse, and exponential waveforms are encountered
most frequently in electrical circuits. In this section, we review
the geometrical properties and corresponding mathematical
expressions associated with each of these four waveforms, as
well as introduce some of the connections between them.
5-1.1
Step-Function Waveform
The waveform υ(t) shown in Fig. 5-2(a) is an (ideal) step
function: it is equal to zero for t < 0, at t = 0 it makes a
5-1
NONPERIODIC WAVEFORMS
251
where u(t) is known as the unit step function and is defined as
Step Functions
υ(t)
0
u(t) =
1
V0 u(t)
V0
0
(a) Ideal step function
(5.2)
In reality, it is not possible to turn on a switch with an (ideal)
step function, because that would require changing the value of
υ(t) from 0 to V0 in zero time. A more realistic shape of the step
function is illustrated in Fig. 5-2(b); the discontinuous jump is
replaced with a ramp waveform with rise time t, providing a
smooth voltage turn-on.
If υ(t) transitions between its two levels at a time other than
zero, such as at t = T , it is written as
t
υ(t)
V0
∆t
(b) Realistic step function
for t < 0,
for t > 0.
t
0
υ(t) = V0 u(t − T ) =
V0
for t < T ,
for t > T .
(5.3)
υ(t)
V0 u(t − 3)
V0
u(t −T ) is called the time-shifted step function, which
is defined to be zero when its argument (t −T ) is less than
zero and 1 when its argument is greater than zero. Thus,
u(t − T ) = 1 for t > T . T>0
t (s)
0 3
(c) Time-shifted step u(t − T) with T = 3 s
υ(t)
V0 u(3 − t)
V0
t (s)
0 3
(d) Time-shifted step u(T − t) with T = 3 s
Figure 5-2: Step functions: (a) ideal step function, (b) realistic
step function with transition duration t, (c) time-shifted step
function V0 u(t − 3), (d) time-shifted step function V0 u(3 − t).
discontinuous jump to V0 , and from there on forward it remains
at V0 . The process represents an ideal switch that turns on a dc
voltage at t = 0. Mathematically, it can be described as
υ(t) = V0 u(t),
(5.1)
By the same definition, u(T − t) is zero when T − t < 0
(which is true when t > T ), and 1 when T − t > 0 (which is
true when t < T ). Figure 5-2(c) and (d) display step-function
waveforms for V0 u(t − 3) and V0 u(3 − t), respectively. We
often use combinations of step functions to represent voltage
sources turning on and off.
An example of a step function is when a switch is closed so as
to connect a voltage source to a circuit, as shown in Fig. 5-3(a).
When writing KCL and KVL equations for circuits that include
switches, the switching action (closing or opening) can be
represented mathematically by step functions. In Fig. 5-3(a),
closing the switch at t = 3 s is represented by u(t − 3), whereas
disconnecting the source by opening the switch in Fig. 5-3(b)
is represented by u(3 − t).
If the time associated with closing the switch is very short
in comparison with the time scale of interest, then it may be
acceptable to approximate the switch closing by an ideal step
function. On the other hand, if we are interested in analyzing
the circuit response at a sampling rate whose interval is shorter
than or comparable with the transition interval associated with
closing the switch, then it may be necessary to use a more
realistic, continuous, step function to represent the switch
action.
252
CHAPTER 5
t=3s
a
V0
+
_
Circuit
Ramp Functions
a
t=3s
V0
+
_
RC AND RL FIRST-ORDER CIRCUITS
υ(t)
Circuit
3V
2V
r(t + 1)
1V
b
−3 −2 −1 0
a
+
_
+
_
b
(a) Switch closes
at t = 3 s
Circuit
2V
−3 −2 −1 0
(b) Switch opens
at t = 3 s
1
2
3
4
t (s)
(b)
υ(t)
Slope = 3 V/s
a circuit via a switch can be represented mathematically by a step
function.
6V
3r(t − 1)
3V
5-1.2 Ramp-Function Waveform
−3 −2 −1 0
A waveform that varies linearly with time, starting at a specific
time t = T , is called a time-shifted ramp function and is
denoted by r(t − T ). If T = 0, it simply is called a ramp
function and is denoted by r(t). Formally, r(t − T ) is defined
as
(5.4)
Plots of υ(t) = r(t − T ) are displayed in Fig. 5-4(a) and (b)
for T = −1 s and T = 2 s, respectively. A voltage υ(t) that
ramps up at 3 V per second, starting at t = 1 s, is shown
graphically in Fig. 5-4(c). Mathematically, υ(t) can be
expressed as
V.
t (s)
r(t − 2)
1V
Figure 5-3: Connecting/disconnecting a voltage source to/from
υ(t) = 3r(t − 1)
4
3V
b
0
for t ≤ T ,
r(t − T ) =
(t − T ) for t ≥ T .
3
υ(t)
V0 u(3 − t)
V0 u(t − 3)
2
(a)
a
Circuit
1
1
2
3
4
t (s)
(c)
υ(t)
2V
t (s)
−3 −2 −1 0 1 2 3 4
Slope = −2 V/s
−2 V
−2r(t + 1)
−4 V
(d)
Figure 5-4: Time-shifted ramp functions.
A unit ramp function is related to the unit step function by
(5.5)
If the coefficient of r(t − T ) is negative, υ(t) would
exhibit a negative slope, as illustrated by Fig. 5-4(d) for
υ(t) = −2r(t + 1).
r(t) =
t
−∞
u(t) dt = t u(t),
(5.6)
5-1
NONPERIODIC WAVEFORMS
253
and for the case where the ramping action starts at t = T ,
r(t − T ) =
t
−∞
u(t − T ) dt = (t − T ) u(t − T ).
(5.7)
and a second ramp function that starts at T = +2 ms but its
slope is −3 V/s. Thus,
υ(t) = υ1 (t) + υ2 (t) = 3r(t + 2 ms) − 3r(t − 2 ms)
V.
In view of Eq. (5.7), υ(t) also can be expressed in terms of
time-shifted step functions as
Example 5-1: Realistic Step Waveform
υ(t) = 3(t + 2 ms) u(t + 2 ms)
Generate an expression to describe the waveform shown in
Fig. 5-5(a). Note that the time scale is in ms.
Solution: The voltage υ(t) can be synthesized as the sum
of two time-shifted ramp functions (Fig. 5-5(b)): one with a
positive slope of 3 V/s and a ramp start-up time T = −2 ms
υ (V)
12
9
6
− 3(t − 2 ms) u(t − 2 ms)
5-1.3
V.
Pulse waveform
The diagram in Fig. 5-6(a) depicts a SPDT switch that moves
from position 1 to position 2 at t = 1 s, connects a dc voltage
source to an electric circuit, and then returns to position 1 at
t = 5 s. From the standpoint of the circuit, the switch actions
constitute the introduction of a rectangular pulse of voltage V0 ,
as illustrated in Fig. 5-6(b). A pulse also may be triangular or
Gaussian in shape or may assume other forms, but in all cases,
it usually is assumed that a pulse rises from some specified base
level up to a peak value, remains constant for a while, and then
declines back to its original base level.
3
0 1
−5 −4 −3 −2 −1
2
3
t (ms)
4
Moves from 1 to 2 @ t = 1 s
Returns to 1 @ t = 5 s
(a) Original function
Composite
waveform
υ (V)
V0
+
_
SPDT 2
1
+
υ(t)
_
Circuit
12
9
3
−5 −4 −3 −2 −1 0 1
−3
2
3
4
t (ms)
−6
−9
−12
(a) Circuit with input switch
υ1(t) = 3r(t + 2 ms)
6
υ2(t) = −3r(t − 2 ms)
(b) As sum of two time-shifted ramp functions
Figure 5-5: Step waveform of Example 5-1.
+
V0
t=1s
3s
t=5s
υ(t)
_
Circuit
(b) Equivalent
inputpulse
t −3
rect
4
Figure 5-6: Connecting a switch to a dc source at t = 1 s and
then returning it to ground at t = 5 s constitutes a voltage pulse
centered at T = 3 s and of duration τ = 4 s.
254
CHAPTER 5
A rectangular pulse can be constructed out of two time-shifted
step functions: one that causes the rise in level and another
(delayed in time) that cancels the first one. The details are given
in Example 5-2.
Rectangular Pulses
υ(t)
rect
τ
1
0
( )
t−T
τ
Example 5-2: Pulses
t (s)
T
Construct expressions for (a) the rectangular pulse shown in
Fig. 5-8(a) and (b) the trapezoidal pulse shown in Fig. 5-8(b)
in terms of step and ramp functions.
(a)
Solution: (a) From Fig. 5-8(a), it is evident that the
amplitude of the rectangular pulse is 4 V and its duration is
2 s, extending from T1 = 2 s to T2 = 4 s. Hence, with its center
at 3 s and its duration equal to 2 s,
υ(t)
( )
t+2
V0 rect
2
V0
2
t (s)
0
−3 −2 −1
T = −2
υa (t) = 4 rect
υ(t)
2
−8
�
t −3
2
�
V.
(5.9)
The sequential addition of two time-shifted step functions, υ1 (t)
at t = 2 s and υ2 (t) at t = 4 s, as demonstrated graphically in
Fig. 5-8(c), accomplishes the task of synthesizing the rectangle
function in terms of two step functions. Specifically,
(b)
0
RC AND RL FIRST-ORDER CIRCUITS
3
T=3
4
2
−8 rect
υa (t) = υ1 (t) + υ2 (t) = 4[u(t − 2) − u(t − 4)]
t (s)
(b) The trapezoidal pulse consists of three segments, a ramp
with a positive slope that starts at t = 0 and ends at t = 1 s,
followed by a plateau that extends to t = 3 s, and finally, a
ramp with a negative slope that ends at 4 s. Building on the
experience gained from Example 5-1, we can synthesize the
trapezoidal pulse in terms of four ramp functions. The process,
which is illustrated graphically in Fig. 5-8(d), leads to
( )
t−3
2
(c)
Figure 5-7: Rectangular pulses.
υb (t) = υ1 (t) + υ2 (t) + υ3 (t) + υ4 (t)
A rectangular pulse can be described in terms of the unit
rectangular function rect[(t − T )/τ ], which is characterized
by two parameters: location of the center of the pulse T and the
duration of the pulse τ , as shown in Fig. 5-7. Its mathematical
definition is given by
= 5[r(t) − r(t − 1) − r(t − 3) + r(t − 4)]
− (t − 3) u(t − 3) + (t − 4) u(t − 4)]
(5.8)
V.
(5.11)
Equivalently, using the relationship between the ramp and step
functions given by Eq. (5.7), υb (t) can be expressed as
υb (t) = 5[t u(t) − (t − 1) u(t − 1)
�
�
t −T
rect
τ
⎧
⎪
⎨0 for t < (T − τ/2),
= 1 for (T − τ/2) ≤ t ≤ (T + τ/2),
⎪
⎩
0 for t > (T + τ/2).
V. (5.10)
V.
(5.12)
There are often multiple ways for representing waveforms of
these types, all of which should lead to the same result in the
end.
5-1
NONPERIODIC WAVEFORMS
255
Waveform Synthesis
υa(t)
υb(t)
( )
t−3
4 rect
2
4V
0 1
2
3
4
5V
5
t (s)
0 1
−2 −1
υb(t)
υa(t)
4u(t − 2)
0 1
−4 V
2
3 4
3
4
5
t
(b) Trapezoidal pulse
(a) Rectangular pulse
4V
2
5
υ1(t)
υ4(t)
5V
t (s)
0 1
−2 −1
−4u(t − 4)
2
3
4
t
υ3(t)
υ2(t)
(c) υa(t) = 4u(t − 2) − 4u(t − 4)
5
(d) υb(t) = υ1(t) + υ2(t) + υ3(t) + υ4(t)
Figure 5-8: Rectangular and trapezoidal pulses of Example 5-2.
υ
Concept Question 5-3: What determines the slope of a
ramp waveform? (See
)
10
0
Concept Question 5-4: How are the ramp and rectangle
functions related to the step function? (See
)
2
t (s)
4
−10
(a)
υ
Concept Question 5-5: A unit step function u(t) is
equivalent to closing an SPST switch at t = 0. What is
u(−t) equivalent to? (See
)
5
0
Exercise 5-1: Express the waveforms shown in Fig. E5.1
in terms of unit step functions.
Answer:
(a) υ(t) = 10 u(t) − 20 u(t − 2) + 10 u(t − 4),
(b) υ(t) = 2.5 r(t) − 10 u(t − 2) − 2.5 r(t − 4).
(See
)
2
4
−5
(b)
Figure E5.1
t (s)
256
CHAPTER 5
Exercise 5-2: How is u(t) related to u(−t)?
Answer: They are mirror images of one another (with
respect to the y-axis). (See
C
)
Exercise 5-3: Consider the SPDT switch in Fig. 5-6(a).
Assume that it started out at position 2, was moved to
position 1 at t = 1 s, and then moved back to position 2
at t = 5 s. This is the reverse of the sequence shown
in Fig. 5-6(a). Express υ(t) in terms of (a) unit step
functions and (b) the rectangle function.
Answer: (a) υ(t) = V0[ u(1 − t) + u(t − 5)],
(b) υ(t) = V0 1 − rect t−3
. (See
)
4
5-1.4 Exponential waveform
The exponential function is a particularly useful tool for
characterizing fast-rising and fast-decaying waveforms, which,
as we will see in later sections, are related to the transient
responses of RC and RL circuits. The (positive) exponential
function given by
υp (t) = et/τ
(5.13)
is shown graphically in Fig. 5-9 for a positive value of the
time constant τ . The figure also includes a plot of the negative
exponential function, where
υn (t) = e
−t/τ
.
(5.14)
When t = τ , υn = e−1 = 0.37. Thus, if a certain quantity (such
as a voltage or current) is said to decay exponentially with
Positive exponential
−2
−1
An exponential function with a short time constant rises
or decays faster than an exponential function with a longer
time constant, as illustrated by the plots in Fig. 5-10(a). Replacing t in the exponential with (t −T ) shifts the exponential
curve to the right if T has a positive value and to the left
if T is negative (Fig. 5-10(b)). In Fig. 5-10(c), the range
of the exponential function has been limited to t > 0 by
multiplying e−t/τ by u(t), and in Fig. 5-10(d) the function
υ(t) = V0 (1 − e−t/τ ) u(t) is used to describe a waveform
that builds up as a function of time towards a saturation
value V0 .
Table 5-1 provides a summary of common waveform shapes
and their equivalent expressions.
Concept Question 5-6: If the time constant of a
negative exponential function is doubled in value, will
the corresponding waveform decay faster or slower?
(See
)
Concept Question 5-7: What is the approximate shape
of the waveform described by the function (1 − e−|t|)?
(See
)
Exercise 5-4: The radioactive decay equation for a certain
material is given by n(t) = n0 e−t/τ , where n0 is the initial
count at t = 0. If τ = 2 × 108 s, how long is its half-life?
[Half-life t1/2 is the time it takes a material to decay to 50
percent of its initial value.]
12 hours, 10 minutes, 36 s. (See
)
υn = e−t/τ
0.37
−3
time, it means that after τ seconds its amplitude decreases
to 1/e or 37 percent of its initial value. Symmetrically,
υp = e−1 = 0.37 when t = −τ .
Answer: t1/2 = 1.386 × 108 s = 4 years, 144 days,
υp = et/τ
1
RC AND RL FIRST-ORDER CIRCUITS
0
1
Negative
exponential
t/τ
2
3
Figure 5-9: By t = τ , the exponential function e−t/τ has
decayed to 37 percent of its original value at t = 0.
Exercise 5-5: If the current i(t) through a resistor R
decays exponentially with a time constant τ , what is the
value of the power dissipated in the resistor at t = τ ,
compared with its value at t = 0?
Answer: p(t) = i 2 R = I02 R(e−t/τ )2 = I02 Re−2t/τ ,
p(τ )/p(0) = e−2 = 0.135 or 13.5 percent. (See
C3
)
5-1
NONPERIODIC WAVEFORMS
257
Exponential Functions
υ(t)
e−t/2 e−t
et
et/2
1
υ(t)
Longer time constant,
slower decay Shorter time constant,
1
faster decay
t
0
e(t + 1) et (t − 1)
e
t
0
−1
1
(b) Role of time shift T
(a) Role of time constant τ
υ(t)
υ(t)
V0
V0
0.63V0
V0e−t/τ u(t)
0.37V0
0
t
τ
V0[1 − e−t/τ] u(t)
0
(c)
t
τ
(d)
Figure 5-10: Properties of the exponential function.
Table 5-1: Common nonperiodic waveforms.
waveform
Step
Ramp
Rectangle
Expression
u(t − T ) =
0
1
for t < T
for t > T
General Shape
1
0 T
r(t − T)
r(t − T ) = (t − T ) u(t − T )
t −T
= u(t − T1 ) − u(t − T2 )
τ
τ
τ
T1 = T − ; T2 = T +
2
2
rect
u(t − T)
0 T
rect
1
0 T1
Slope = 1
t
t− T
τ
t
T2
exp[−(t − T)/τ] u(t − T)
1
Exponential
t
exp[−(t − T )/τ ] u(t − T )
0
T
t
258
CHAPTER 5
+
υ
+
_
E
_
+
+
+
_
_
+
+
+
+
+
+
Table 5-2: Relative electrical permittivity of common
Area A
+q
+
_
_
_
_
_
_
_
_
insulators: εr = ε/ε0 and ε0 = 8.854 × 10−12 F/m.
+
Material
d
Dielectric ε
−q
separated by a distance d, and filled with an insulating dielectric
material of permittivity ε.
Capacitors
When separated by an insulating medium, any two
conducting bodies (regardless of their shapes and sizes)
form a capacitor. A capacitor can store electric charge. The parallel-plate capacitor shown in Fig. 5-11 represents a
simple configuration in which two identical conducting plates
(each of area A) are separated by a distance d containing an
insulating (dielectric) material of electrical permittivity ε. The
permittivity of a material is usually referenced to that of free
space, namely ε0 = 8.85 × 10−12 farads/m (F/m). Hence, the
relative permittivity of a material is defined as
εr =
ε
.
ε0
(5.15)
When a dielectric material is subjected to an electric field, its
atoms become partially polarized; i.e., the atom is rearranged
into positive and negative domains.. The electric field E
induced in the space between the conducting plates is the
result of the voltage υ applied across the plates. The electrical
susceptibility χe of a material is a measure of how susceptible
that material is to electrical polarization. The permittivity ε and
susceptibility χe are related by
ε = ε0 (1 + χe ).
(5.16)
Relative Permittivity εr
Air (at sea level)
Teflon
Polystyrene
Paper
Glass
Quartz
Bakelite
Mica
Porcelain
E
_
Figure 5-11: Parallel-plate capacitor with plates of area A,
5-2
RC AND RL FIRST-ORDER CIRCUITS
1.0006
2.1
2.6
2–4
4.5–10
3.8–5
5
5.4–6
5.7
Free space contains no atoms; hence, its χe = 0 and εr = 1. For
air at sea level, εr = 1.0006 ≈ 1.0. Table 5-2 provides typical
values of εr for common types of insulators.
Returning to the parallel-plate capacitor, if a voltage source
is connected across the two plates, as shown in Fig. 5-11,
charge of equal and opposite polarity is transferred to the
conducting surfaces. The plate connected to the (+) terminal of
the voltage source will accumulate charge +q, and charge −q
will accumulate on the other plate. The charges induce a nearly
uniform electric field E in the dielectric medium, given by
E=
q
,
εA
(5.18)
with the direction of E being from the plate with +q to the
plate with −q. Moreover, E, whose unit is V/m, is related to
the voltage υ through
E=
υ
d
(parallel-plate capacitor).
(V/m)
(5.19)
For any capacitor, its capacitance C, measured in
farads (F), is defined as the amount of charge q that its
positive-polarity plate holds, normalized to the applied
voltage responsible for that charge accumulation. Thus,
In view of Eq. (5.15), the relative permittivity εr is given by
ε
εr =
= 1 + χe .
ε0
(5.17)
C=
q
υ
(F)
(any capacitor).
(5.20)
5-2
CAPACITORS
259
For the parallel-plate capacitor, combining Eqs. (5.18) and
(5.19) leads to q = εAυ/d. Upon inserting this expression for q
in Eq. (5.20), we have
Conductors
C=
εA
d
(parallel-plate capacitor).
Even though the expression given by Eq. (5.21) is specific to
the parallel-plate capacitor, the general tenor of the expression
holds true for other geometrical configurations as well. In
general, the capacitance C of any two-conductor system
increases with the area of the conducting surfaces, decreases
with the separation between them, and is directly proportional
to ε of the insulating material. For example, the capacitance
of a coaxial capacitor consisting of two concentric conducting
cylinders of radii a and b (Fig. 5-12(a)) and separated by a
dielectric material of permittivity ε is given by
C=
2π ε�
ln(b/a)
(coaxial capacitor),
l
(5.21)
Dielectric ε
2a
2b
(a) Coaxial capacitor
Metal foil
Mica insulator
(5.22)
where � is the length of the capacitor and ln(b/a) is the
natural logarithm of (b/a). The spacing between the cylinders is
(b−a); reducing this spacing, while holding b constant, requires
reducing the ratio (b/a), which reduces the value of ln(b/a),
thereby increasing the magnitude of C.
The mica capacitor shown in Fig. 5-12(b) consists of a stack
of conducting plates, interleaved by sheets of mica (dielectric).
The plastic-foil capacitor in Fig. 5-12(c) is constructed by
rolling flexible conducting foils (separated by a plastic layer)
into a spindle-like configuration. Small capacitors used in
microcircuits typically have capacitances in the picofarad
(10−12 F) to microfarad (10−6 F) range. Large capacitors used
in power-transmission substations may have capacitors in the
range of millifarads (10−3 F). Using thin-film polymers for
the dielectric insulator and carbon nanotubes for the electrodes
(terminals), a new type of capacitor (sometimes called a
supercapacitor or nanocapacitor) was developed in the 1990s
with the express goal of significantly increasing the amount
of charge that the conductors can hold (at a specified voltage
level). Such capacitors have capacitance values that are several
orders of magnitude greater than conventional capacitors of
comparable size. The new fabrication techniques have not only
expanded the versatility of capacitors in electronic circuits,
but they have also introduced the use of supercapacitors as
energy-storage devices in many electronic applications (see
Technology Brief 12: Supercapacitors).
(b) Mica capacitor
Lead to
inner foil sheet
Inner metal foil
Outer metal foil
Lead to
outer foil sheet
Plastic insulator
(c) Plastic foil capacitor
Figure 5-12: Various types of capacitors.
5-2.1
Electrical Properties of Capacitors
According to Eq. (5.20), q = Cυ. Application of the standard
definition for current (Eq. (1.3) provides the expression for the
current i through a capacitor as
i=
dq
dυ
=C
,
dt
dt
(5.23)
where the direction of i and the polarity of υ are defined
in accordance with the passive sign convention (Fig. 5-13).
260
CHAPTER 5
i
C
+
_υ
i=C
dυ
dt
Figure 5-13: Passive sign convention for capacitor: if current i
t
In view of dq = i dt, we recognize that the integral t0 i dt
represents the amount of charge accumulation on the capacitor
at time t. If we are dealing with a capacitor that had no charge
on it until a switch was closed or a signal was injected into
the circuit and if we conveniently set our time reference such
that the signal injection commenced at t0 = 0, then Eq. (5.25)
simplifies to
is entering the (+) voltage terminal across the capacitor, then
power is getting transferred into the capacitor. Conversely, if i
is leaving the (+) terminal, then power is getting released from
the capacitor.
The i–υ relationship expressed by Eq. (5.23) conveys a very
important condition, namely:
The voltage across a capacitor cannot change
instantaneously, but the current can. This assertion is supported by the observation that if υ were to
change values in zero time, dυ/dt would be infinite, as a result
of which the current i would be also infinite. Since i cannot be
infinite, υ cannot change instantaneously.
Another attribute of Eq. (5.23) relates to the behavior of
a capacitor under dc conditions (constant voltage across it).
Since dυ/dt = 0 for a dc voltage, it follows that i = 0. Such
a behavior is characteristic of an open circuit, through which
no current flows even when a non-zero voltage exists across it.
Thus:
Under dc conditions, a capacitor behaves like an open
circuit. To express υ(t) in terms of i(t), we replace t with a dummy
variable t � and integrate both sides of Eq. (5.23) from t � = t0 to
t � = t,
t t
dυ
1
�
dt
=
i dt � ,
(5.24)
dt �
C
t0
t0
where t0 is the initial reference point in time at which the initial
condition υ(t0 ) is known. Since the integral of the derivative of
a function is the function itself, integrating the left-hand side
and rearranging terms leads to
υ(t) = υ(t0 ) +
1
C
t
t0
i dt � .
(5.25)
RC AND RL FIRST-ORDER CIRCUITS
1
υ(t) =
C
t
i dt �
(5.26)
0
(capacitor uncharged before t = 0).
Charging up a capacitor creates an electric field in the
dielectric medium between the capacitor’s conductors. The
electric field becomes the mechanism for storage of electrical
energy in that medium. The stored energy can be released by
discharging the capacitor. Thus, a capacitor can store energy and
release previously stored energy but cannot dissipate energy.
The instantaneous power p(t) transferring into or out of a
capacitor is given by
dυ
dt
p(t) = υi = Cυ
(W),
(5.27)
where i is defined as entering the capacitor at its positive voltage
terminal (Fig. 5-13).
If the magnitude of p(t) is positive, then by the
passive sign convention, the capacitor is receiving power
(charging up), and if p(t) is negative, it is delivering power
(discharging). Energy is the integral of the product of power and time.
Hence, the amount of energy stored in the capacitor at any
time t is equal to the time integral of p(t) from −∞ (at which
time the capacitor was uncharged) to t and is given by
w(t) =
t
−∞
p dt � = C
t dυ
dt �
=C
t υ
−∞
−∞
d
dt �
dt �
1 2
υ
2
dt � ,
(5.28)
5-2
CAPACITORS
261
which yields
υ (V)
w(t) =
1
C υ 2 (t)
2
(J).
We note that since the capacitor had no charge at t = −∞, then
its voltage also was zero at t = −∞.
Equation (5.29) states that:
Voltage
10
5
(5.29)
0 1
(a)
2
3
4
5
6
7
5
6
7
t (s)
i (μA)
The electrical energy stored in a capacitor at a given
instant in time depends on the voltage across the capacitor
at that instant, without regard to prior history. This stored energy is akin to potential energy in a physical
system.
6
3
−3
−15
−30
t (s)
0 1
2
3
4
5
t (s)
6 7
Power transfer
out of capacitor
(discharging)
w (μJ)
30
22.5
15
7.5
r(t − T ) = (t − T ) u(t − T ),
(d)
Application of Eq. (5.23), while recalling that the derivative is
the same as the slope of a line or curve, gives:
⎧
⎪
0
for t ≤ 0,
⎪
⎪
⎪
⎪
⎪
for 0 ≤ t ≤ 2 s,
⎨3 μA
dυ
= 0
(5.31)
i(t) = C
for 2 s ≤ t ≤ 4 s,
⎪
dt
⎪
⎪
−3
μA
for
4
s
≤
t
≤
5
s,
⎪
⎪
⎪
⎩0
for t ≥ 5 s.
4
(c)
V.
(5.30)
3
Power transfer
into capacitor (charging)
30
15
Recalling that according to Eq. (5.7),
the expression for υ(t) corresponds to
⎧
⎪
0
for t ≤ 0,
⎪
⎪
⎪
⎪
⎪
for 0 ≤ t ≤ 2 s,
⎨5t V
υ(t) = 10 V
for 2 s ≤ t ≤ 4 s,
⎪
⎪
⎪
(−5t
+
30)
V
for 4 s ≤ t ≤ 5 s,
⎪
⎪
⎪
⎩5 V
for t ≥ 5 s.
2
p (μW)
The voltage waveform shown in Fig. 5-14(a) was applied across
a 0.6 μF capacitor. Determine the corresponding waveforms for
(a) the current i(t), (b) the power p(t), and (c) the energy stored
in the capacitor w(t).
υ(t) = 5r(t) − 5r(t − 2) − 5r(t − 4) + 5r(t − 5)
0 1
(b)
Example 5-3: Capacitor Response to Voltage Waveform
Solution: (a) We start by establishing a suitable expression
for the waveform of υ(t), shown in Fig. 5-14(a), in terms of
ramp functions. Noting that the ramp starts at t = 0 and has a
slope of 10/2 = 5 V/s, υ(t) can be written as
Current
Energy
0
1
2
3
4
5
6
7
t (s)
Figure 5-14: Example 5-3 waveforms for i, υ, p, and w.
A plot of the current waveform is displayed in Fig. 5-14(b). We
note that i(t) > 0 when υ(t) has a positive slope, and i(t) < 0
when υ(t) has a negative slope.
(b) The power p(t), which is equal to the product of
Eqs. (5.30) and (5.31), is shown in Fig. 5-14(c).
(c) We can calculate the stored energy w(t) either by
integrating p(t)—which is graphically equivalent to computing
the area under the curve—or by applying Eq. (5.29). In either
case, we end up with the plot displayed in Fig. 5-14(d).
262
CHAPTER 5
We note that after t = 5 s, the current is zero, the voltage is
constant, the power getting transferred into the capacitor is zero
(because i = 0), and the stored energy remains unchanged at
7.5 μJ.
Let us examine the energy transfer process from the
standpoint of the current and voltage. Between t = 0 and 2 s,
a constant positive current flows to the capacitor, causing the
deposition of positive charge on one side of the capacitor and a
net increase of negative charge by the same amount on the other
side of the capacitor. The increase in charge leads to a linear
increase in voltage. By Eq. (5.29), increasing the voltage leads
to a quadratic increase in stored energy, as shown in Fig. 5-14
during the time span between 0 and 2 s.
Between 2 and 4 s, i = 0 and υ is a constant. Hence, the
stored energy remains unchanged. Then, between 4 and 5 s, the
current reverses direction, which entails repatriating some of the
positive charges back to their original location. Consequently,
υ decreases and so does the stored energy, until t = 5 s. Beyond
that time, the remaining charge stays in place, the voltage
remains constant at 5 V, and the corresponding 7.5 μJ of energy
stored in the capacitor remains in that state until some future
action.
Example 5-4: RC Circuit under dc Conditions
RC AND RL FIRST-ORDER CIRCUITS
30 kΩ
20 kΩ
20 V
+
_
C1
+
_ V1
C2
+
_ V2
40 kΩ
50 kΩ
(a) Original circuit
V 30 kΩ
20 kΩ
20 V
+
_
C1
+
_V1
C2
+
_V2
40 kΩ
50 kΩ
(b) Equivalent circuit
Figure 5-15: Under dc conditions, capacitors behave like open
circuits.
Determine voltages υ1 and υ2 across capacitors C1 and C2 in
the circuit of Fig. 5-15(a). Assume that the circuit has been in
its present (charged) condition for a long time.
Solution: “Long time” implies steady state. Under steadystate dc conditions, no current flows through a capacitor.
Replacing capacitors C1 and C2 with open circuits, as in
Fig. 5-15(b), allows us to apply KCL at node V as
V
V − 20
+
= 0,
20 × 103
(30 + 50) × 103
cannot change instantaneously. Can the current change
instantaneously, and why? (See
)
Concept Question 5-10: For the capacitor, can p(t) be
negative? Can w(t) be negative? Explain. (See
)
which gives V = 16 V. Hence,
V1 = V = 16 V.
Through voltage division, V2 across the 50 k� resistor is given
by
V × 50k
16 × 50
=
= 10 V.
V2 =
(30 + 50)k
80
Concept Question 5-8: Explain why a capacitor behaves
like an open circuit under dc conditions. (See
Concept Question 5-9: The voltage across a capacitor
)
Exercise 5-6: It is desired to build a parallel-plate
capacitor capable of storing 1 mJ of energy when the
voltage across it is 1 V. If the capacitor plates are 2 cm
× 2 cm each and its insulating material is Teflon, what
should the separation d be? Is such a capacitor practical?
Answer: d = 3.72 × 10−12 m. No, it is not practical to
build a capacitor with such a small d, because it is about
two orders of magnitude smaller than the typical spacing
between two adjacent atoms in a solid material.
C3)
(See
5-2
CAPACITORS
263
Exercise 5-7: Instead of specifying A and calculating
the spacing d needed to meet the 1 mJ requirement in
Exercise 5-6, suppose we specify d as 1 μm and then
calculate A. How large would A have to be?
Answer: A = 10.4 m × 10.4 m, equally impractical!
(See
C3
)
Combining In-Series Capacitors
is
1
υ1
+ _
υ2
+ _
υ3
+ _
C1
C2
C3
+
υs +
_
2
Exercise 5-8: Determine the current i in the circuit of
Fig. E5.8, under dc conditions.
is
1 μF
5 kΩ
15 kΩ
2 μF
40 kΩ
1.5 A
+
υs +
_
5-2.2
Equivalent
circuit
i
C
+
_
Ceq =
1
1
1 −1
+
+
C1
C2
C3
2
20 kΩ
Figure 5-16: Capacitors in series.
Figure E5.8
Answer: i = 1 A. (See
1
)
Series and Parallel Combinations of
Capacitors
In Chapter 2, we established that multiple resistors connected
in series are equivalent to a single resistor whose resistance is
equal to the algebraic sum of the resistances of the individual
resistors. This equivalence relationship does not hold true for
capacitors. In fact, we will shortly determine that:
The equivalence relationship for capacitors connected
in series is similar in form to the relationship for resistors
connected in parallel, and vice versa. We wish to relate Ceq of the equivalent circuit to C1 , C2 ,
and C3 , subject to the requirement that the actual circuit and
its equivalent exhibit identical i–υ characteristics at terminals
(1, 2). For the equivalent circuit,
dυ1
dυ2
dυ3
dυs
= Ceq
+
+
is = Ceq
dt
dt
dt
dt
is
is
is
,
(5.34)
+
+
= Ceq
C1
C2
C3
which leads to
1
1
1
1
=
+
+
.
Ceq
C1
C2
C3
(5.35)
Generalizing to the case of N capacitors in series,
N
Capacitors in series
Consider the three capacitors shown in Fig. 5-16. They share
the same current is , and are therefore in series. Current is related
to their individual voltages by
dυ1
dυ2
dυ3
= C2
= C3
.
is = C1
dt
dt
dt
(5.32)
Also,
υs = υ1 + υ2 + υ3 .
(5.33)
1
1
1
1
1
=
=
+
+ ··· +
Ceq
Ci
C1
C2
CN
(5.36)
i=1
(capacitors in series).
Additionally, if at reference time t0 the capacitors had initial
voltages υ1 (t0 ) to υN (t0 ), the initial voltage of the equivalent
capacitor is
υeq (t0 ) =
N
i=1
υi (t0 ).
(5.37)
264
CHAPTER 5
Example 5-5: Equivalent Circuit
Combining In-Parallel Capacitors
is
υs
1
+
_
i1
i2
i3
C1
C2
C3
Reduce the circuit of Fig. 5-18(a) into the simplest equivalent
configuration.
Solution: Resistors are combined independently of capacitors. For the resistors, we first combine R2 and R3 in parallel,
and then add the result to R1 in series, noting that interchanging
the locations of two elements connected in series is perfectly
permissible, as such an action has no influence on either the
current flowing through them or the voltages across them. A
similar procedure can be followed for the capacitors, but we
have to keep in mind that the equivalence relationships for
resistors and capacitors are the reciprocal of one another:
2
is
υs
+
_
1
Equivalent circuit
RC AND RL FIRST-ORDER CIRCUITS
Ceq = C1 + C2 + C3
R2 � R3 =
2
R2 R 3
3k × 6k
= 2 k�.
=
R2 + R 3
3k + 6k
Req = R1 + 2 k� = 8 k� + 2 k� = 10 k�,
C2 � C3 = C2 + C3 = 1 μF + 5 μF = 6 μF,
C1 × 6 × 10−6
12 × 6
Ceq =
=
× 10−6 = 4 μF.
C1 + 6 × 10−6
12 + 6
Figure 5-17: Capacitors in parallel.
Capacitors in parallel
The equivalent circuit is shown Fig. 5-18(b).
The three capacitors shown in Fig. 5-17 share the same
voltage υs and are therefore connected in parallel. The source
current is is equal to the sum of their currents,
is = i1 + i2 + i3 = C1
dυs
dυs
dυs
+ C2
+ C3
.
dt
dt
dt
1
(5.38)
R2 = 3 kΩ
For the equivalent circuit with equivalent capacitor Ceq ,
is = Ceq
dυs
.
dt
(5.39)
Equating the expressions given by Eqs. (5.38) and (5.39) leads
to
Ceq = C1 + C2 + C3 ,
R1 = 8 kΩ C1 = 12 μF
C2 = 1 μF
R3 = 6 kΩ
C3 = 5 μF
2
(5.40)
(a) Original circuit
which can be generalized to N capacitors in parallel as
Ceq =
N
1
Ci
(capacitors in parallel).
(5.41)
i=1
Req = 10 kΩ
2
Since the capacitors are connected in parallel, they shared
the same voltage υ(t0 ) at reference time t0 . Hence, for the
equivalent capacitor
υeq (t0 ) = υ(t0 ).
(5.42)
Ceq = 4 μF
(b) Equivalent circuit
Figure 5-18: Circuit for Example 5-5.
TECHNOLOGY BRIEF 12: SUPERCAPACITORS
265
Technology Brief 12
Supercapacitors
As shown in Section 5-2.1, the energy (in joules) stored
in a capacitor is given by w = 12 CV 2 , where C is the
capacitance and V is the voltage across it. Why then do
we not charge capacitors by applying a voltage across
them and then use them instead of batteries in support
of everyday gadgets and systems? To help answer this
question, we refer the reader to Fig. TF12-1, whose
axes represent two critical attributes of storage devices.
It is the combination (intersection) of these attributes that
determines the type of applications best suited for each
of the various energy devices displayed in the figure.
Energy density W � is a measure of how much energy
a device or material can store per unit weight. That is,
W � = w/m, where m is the mass of the capacitor in
kilograms. [Alternatively, energy density can be defined
in terms of volume (instead of weight) for applications
where minimizing the volume of the energy source is more
important than minimizing its weight.] Even though the
formal SI unit for energy density is (J/kg), a more common
unit is the watt-hour/kg (Wh/kg) with 1 Wh = 3600 J. The
second dimension in Fig. TF12-1 is the power density P �
(W/kg), which is a measure of how fast energy can be
added to or removed from an energy-storage device (also
per unit weight). Power is defined as energy per unit time
as P � = dW � /dt.
Energy density W ’ (W-h/kg)
Charge/discharge time
Power density P ’ (W/kg)
Figure TF12-1: Energy and power densities of modern energy-storage technologies. Even though supercapacitors store less
charge than batteries, they can discharge their energy more quickly, making them more suitable for hybrid cars. (Science,
Vol. 313, p. 902.)
266
TECHNOLOGY BRIEF 12: SUPERCAPACITORS
Table TT12-1: Comparison of a conventional capacitor, supercapacitor, and lithium battery size and mass required to hold
∼ 1 megajoule (MJ) of energy (300 watt-hours). 1 MJ of energy will power a laptop with an average consumption of 50 W for 6
hours. Note from the first column that a lithium ion battery might hold 1000 times more energy than a conventional capacitor
for reasonable voltages (< 50 V).
Sample device
Conven�onal
capacitor
Supercapacitor
Lithium ion ba�ery
Specific
Energy
[Wa�
hours/ kg]
Specific
Energy
[MJ / kg]
Energy
Density
[MJ / liter]
Volume
required to
hold 1 MJ
[liter]
Weight
required to
hold 1 MJ
[kg]
0.01 – 0.1
4x10-5-4x10-4
6x10-5-6x10-4
17000-1700
25000 - 2500
1 - 10
100 - 250
0.004 – 0.04
0.36 - 0.9
0.006 - 0.06
1-2
166 – 16
1 – 0.5
250 – 25
2.8 – 1.1
According to Fig. TF12-1, fuel cells can store large
amounts of energy, but they can deliver that energy only
relatively slowly (several hours). In contrast, conventional
capacitors can store only small amounts of energy—
several orders of magnitude less than fuel cells—but it
is possible to charge or discharge a capacitor in just a
few seconds—or even a fraction of a second. Batteries
occupy the region in-between fuel cells and conventional
capacitors; they can store more energy per unit weight
than the ordinary capacitor by about three orders of
magnitude, and they can release their energy faster than
fuel cells by about a factor of 10. Thus, capacitors are
partly superior to other energy devices because they can
accomodate very fast rates of energy transfer, but the
amount of energy that can be “packed into” a capacitor
is limited by its size and weight. To appreciate what that
means, let us examine the relation
w=
1
CV 2 .
2
To increase w, we need to increase either C or V. We
can develop an intuitive feel for this if we compare how
large a storage element would have to be to hold 1 MJ
(∼ 300 watt-hours). From Table TT12-1, we can see that
a conventional capacitor would have to be thousands of
liters in size (and weigh thousands of kilograms), whereas
a supercapacitor or a battery would be considerably
smaller.
For a parallel-plate capacitor, C = εA/d, where ε is the
permittivity of the material between the plates, A is the
area of each of the two plates, and d is the separation
between them. The material between the plates should
be a good insulator, and for most such insulators, the
value of ε is in the range between ε0 (permittivity of
vacuum) and 6ε0 (for mica), so the choice of material
can at best increase C by a factor of 6. Making A
larger increases both the volume and weight of the
capacitor. In fact, since the mass m of the plates is
proportional directly to A, the energy density W � = w/m
is independent of A. That leaves d as the only remaining
variable. Reducing d will indeed increase C, but such a
course will run into two serious obstacles: (a) to avoid
voltage breakdown (arcing), V has to be reduced along
with d such that V/d remains lower than the breakdown
value of the insulator; (b) eventually d approaches
subatomic dimensions, making it infeasible to construct
such a capacitor. Increasing V also increases the energy
stored (by V 2 ) but here, too, we run into problems with
breakdown. Another serious limitation of the capacitor
as an energy storage device is that its voltage does not
remain constant as energy is transferred to and from it.
Supercapacitor Technology
A new generation of capacitor technologies, termed
supercapacitors or ultracapacitors, is narrowing the
gap between capacitors and batteries. These capacitors
can have sufficiently high energy densities to approach
within 10 percent of battery storage densities, and
additional improvements may increase this even more.
Importantly, supercapacitors can absorb or release
energy much faster than a chemical battery of identical volume. This helps immensely during recharging.
Moreover, most batteries can be recharged only a few
hundred times before they are degraded completely;
supercapacitors can be charged and discharged millions
TECHNOLOGY BRIEF 12: SUPERCAPACITORS
Outer
Helmholtz
Plane (OHP)
Solvated ion
and hydration
(water) sheet
267
Activated carbon
Separator
Electrodes
5-10 nm
(a)
(b)
Figure TF12-2: (a) Conceptual illustration of the water double layer at a charged metal surface; (b) conceptual illustration of
an electrochemical capacitor.
of times before they wear out. Supercapacitors also have
a much smaller environmental footprint than conventional
chemical batteries, making them particularly attractive for
green energy solutions.
History and Design
Supercapacitors are a special class of capacitor known
as an electrochemical capacitor. This should not be
confused with the term electrolytic capacitor, which is
a term applied to a specific variety of the conventional
capacitor. Electrochemical capacitors work by making
use of a special property of water solutions (and
some polymers and gels). When a metal electrode is
immersed in water and a potential is applied, the water
molecules (and any dissolved ions) immediately align
themselves to the charges present at the surface of
the metal electrode, as illustrated in Fig. TF12-2(a).
This rearrangement generates a thin layer of organized
water molecules (and ions), called a double layer,
that extends over the entire surface of the metal. The
very high charge density, separated by a tiny distance
on the order of a few nanometers, effectively looks
like a capacitor (and a very large one: capacitive
densities on the order of ∼ 10 μF/cm2 are common
for water solutions). This phenomenon has been known
to physicists and chemists since the work of von
Helmholtz in 1853, and later Guoy, Chapman, and
Stern in the early 20th century. In order to make
capacitors useful for commercial applications, several
technological innovations were required. Principal among
these were various methods for increasing the total
surface area that forms the double layer. The first working
capacitor based on the electrochemical double layer
(patented by General Electric in 1957) used very porous
conductive carbon. Modern electrochemical capacitors
employ carbon aerogels, and more recently carbon
nanotubes have been shown to effectively increase the
total double layer area (Fig. TF12-2(b)).
Supercapacitors are beginning to see commercial
use in applications ranging from transportation to lowpower consumer electronics. Several bus lines around the
world now run with buses powered with supercapacitors;
train systems are also in development. Supercapacitors
intended for small portable electronics (like your MP3
player) are in the pipeline as well!
268
CHAPTER 5
which reduces to
Example 5-6: Voltage Division
Figure 5-19(a) contains two resistors R1 and R2 connected in
series to a voltage source υs . In Chapter 2, we demonstrated
that the voltage υs is divided among the two resistors and, for
example, υ1 is given by
R1
υs .
(5.43)
υ1 =
R1 + R 2
Derive the equivalent voltage-division equation for the series
capacitors C1 and C2 in Fig. 5-19(b).Assume that the capacitors
had no charge on them before they were connected to υs .
Solution: From the standpoint of the source υs , it “sees” an
equivalent, single capacitor C given by the series combination
of C1 and C2 , namely
C=
C1 C2
.
C1 + C 2
(5.44)
The voltage across C is υs . The law of conservation of energy
requires that the energy that would be stored in the equivalent
capacitor C be equal to the sum of the energies stored in C1
and C2 . Hence, application of Eq. (5.29) gives
1
1
1
Cυs2 = C1 υ12 + C2 υ22 .
2
2
2
(5.45)
Upon replacing C with the expression given by Eq. (5.44) and
replacing the source voltage with υs = υ1 + υ2 , we have
C1 C2
1
1
1
(υ1 + υ2 )2 = C1 υ12 + C2 υ22 , (5.46)
2 C1 + C 2
2
2
+ υ1 _
υs
+
_
(a) υ1 =
υ2 =
+
R2
R1
R1 + R 2
R2
R1 + R 2
+
υ
_2
υs
υs
υs
+
_
υ1 _
q1 −q1
C1
q2
C2
−q2
(b) υ1 =
υ2 =
C1 υ1 = C2 υ2 .
(5.47)
Using υ2 = υs − υ1 in Eq. (5.47) leads to
C1 υ1 = C2 (υs − υ1 )
or
C2
(5.48)
υs .
C1 + C 2
We note that in the voltage-division equation for resistors, υ1 is
directly proportional to R1 , whereas in the capacitor case, υ1 is
directly proportional to C2 (instead of to C1 ). Additionally, in
view of the relationship given by Eq. (5.47), application of the
basic definition for capacitance, namely C = q/υ, leads to
υ1 =
q1 = q2 .
(5.49)
This result is exactly what one would expect when viewing the
circuit from the perspective of the voltage source υs .
Concept Question 5-11: Compare the voltage-division
equation for two capacitors in series with that for two
resistors in series. Are they identical or different in form?
(See
)
Concept Question 5-12: Two capacitors are connected
in series between terminals (a, b) in a certain circuit
with capacitor 1 next to terminal a and capacitor 2 next
to terminal b. How does the magnitude and polarity of
charge q1 on the plate (of capacitor 1) near terminal a
compare with charge q2 on the plate (of capacitor 2) near
terminal b? (See
)
Exercise 5-9: Determine Ceq and υeq (0) at terminals
Voltage Division
R1
RC AND RL FIRST-ORDER CIRCUITS
C2
C1 + C 2
C1
C1 + C 2
+
_ υ2
(a, b) for the circuit in Fig. E5.9 given that
C1 = 6 μF, C2 = 4 μF, C3 = 8 μF, and the initial
voltages on the three capacitors are υ1 (0) = 5 V and
υ2 (0) = υ3 (0) = 10 V, respectively.
a
+
υ1
C1
υs
_
C2
+
_ υ2
+
_υ3
C3
b
υs
Figure 5-19: Voltage-division rules for (a) in-series resistors
and (b) in-series capacitors.
Figure E5.9
Answer: Ceq = 4 μF, υeq(0) = 15 V. (See
C3
)
5-3
INDUCTORS
269
Area S
Exercise 5-10: Suppose the circuit of Fig. E5.9 is
connected to a dc voltage source V0 = 12 V. Assuming
that the capacitors had no charge before they were
connected to the voltage source, determine υ1 and υ2
given that C1 = 6 μF, C2 = 4 μF, and C3 = 8 μF.
Answer: υ1 = 8 V, υ2 = 4 V. (See
5-3
C3
i
)
Inductors
Any current-carrying conductor, whether straight or coiled,
forms an inductor. A current produces a magnetic field, which
stores energy that can be released later in the form of another
current. Also, since every wire acts like an inductor, we have
small amounts of stray inductance in every circuit. Fortunately,
this can be ignored except at extremely high frequencies
(microwave band).
Inductors exhibit a number of useful properties, including
magnetic coupling and electromagnetic induction. They are
employed in microphones and loudspeakers, magnetic relays
and sensors, theft detection devices, and motors and generators,
and they provide wireless power transmission and data
communication (albeit over relatively short distances).
Capacitors and inductors constitute a canonical pair
of devices. Whereas a capacitor can store energy through
the electric field induced by the voltage imposed across its
terminals, an inductor can store magnetic energy through
the magnetic field induced by the current flowing through
its wires. The i–υ relationship for a capacitor is i = C dυ/dt; the
converse is true for an inductor with υ = L di/dt. As we will
see in Chapter 7, the capacitor acts like an open circuit to lowfrequency signals and like a short circuit to high-frequency
signals; the exact opposite behavior is exhibited by the inductor.
A typical example of an inductor is the solenoid configuration
shown in Fig. 5-20. The solenoid consists of multiple turns
of wire wound in a helical geometry around a cylindrical
core. The core may be air filled or may contain a magnetic
material (typically iron) with magnetic permeability μ. If the
wire carries a current i(t) and the turns are closely spaced, the
solenoid produces a relatively uniform magnetic field B within
its interior region.
Magnetic-flux linkage � is defined as the total magnetic flux
linking (passing through) a coil or a given circuit. For a solenoid
with N turns carrying a current i,
μN 2 S
i
(Wb),
(5.50)
�=
�
Core
Magnetic-field
lines
Figure 5-20: The inductance of a solenoid of length � and
cross-sectional area S is L = μN 2 S/�, where N is the number
of turns and μ is the magnetic permeability of the core material.
where � is the length of the solenoid and S is its cross-sectional
area. The unit for � is the weber (Wb), named after the German
scientist Wilhelm Weber (1804–1891).
Self-inductance refers to the magnetic-flux linkage of a coil
(or circuit) with itself, in contrast with mutual inductance,
which refers to magnetic-flux linkage in a coil due to the
magnetic field generated by another coil (or circuit). Usually,
when the term inductance is used, the intended reference is to
self-inductance. Mutual inductance is covered in Chapter 11.
The (self) inductance of any conducting system is defined
as the ratio of � to the current i responsible for generating it,
given as
�
(H),
(5.51)
L=
i
and its unit is the henry (H), so named to honor the American
inventor Joseph Henry (1797–1878). Using the expression for �
given by Eq. (5.50), we have
L=
μN 2 S
�
(solenoid).
(5.52)
The inductance L is directly proportional to μ, the magnetic
permeability of the core material. The relative magnetic
permeability μr is defined as
μr =
μ
,
μ0
(5.53)
where μ0 ≈ 4 π × 10−7 (H/m) is the magnetic permeability of
free space.
270
CHAPTER 5
RC AND RL FIRST-ORDER CIRCUITS
Table 5-3: Relative magnetic permeability of materials,
μr = μ/μ0 and μ0 = 4π × 10−7 H/m.
Material
All Dielectrics and
Non-Ferromagnetic
Metals
Ferromagnetic Metals
Cobalt
Nickel
Mild steel
Iron (pure)
Silicon iron
Mumetal
Purified iron
Relative Permeability μr
≈ 1.0
250
600
2,000
4,000–5,000
7,000
∼ 100, 000
∼ 200, 000
High current inductor
Planar inductor
Solenoid
Figure 5-21: Various types of inductors.
Except for ferromagnetic materials, μr ≈ 1 for all
dielectrics and conductors. According to Table 5-3, μr of
ferromagnetic materials (which include iron, nickel, and
cobalt) can be as much as five orders of magnitude larger
than that of other materials. Consequently, L of an ironcore solenoid is about 5000 times that of an air-core
solenoid of the same size and shape. Air-core inductors have relatively low inductances, on the
order of 10 μH or smaller. Consequently, they are used mostly
in high-frequency circuits, such as those designed to support
AM and FM radio, cell phones, TV, and similar types of
transmitters and receivers. Ferrite-core inductors have the
inductance-size advantage over air-core inductors, but they have
the disadvantage that the ferrite material is subject to hysteresis
effects, and they tend to be larger and heavier than their air-core
counterparts. One of the consequences of magnetic hysteresis is
that the inductance L becomes a function of the current flowing
through it. Magnetic hysteresis is outside the scope of this book;
hence, we will always assume that an inductor is an ideal linear
device and its inductance is constant and independent of the
current flowing through it.
In modern circuit design and manufacturing, it is highly
desirable to contain circuit size down to the smallest dimensions
possible. To that end, it is advantageous to use planar integratedcircuit (IC) devices whenever possible. It is relatively easy to
manufacture resistors and capacitors in a planar IC format and to
do so for a wide range of resistance and capacitance values, but
the same is not true for inductors. even though inductors can be
manufactured in planar form, as illustrated by the coil shown in
Fig. 5-21, their inductance values are too small for most circuit
applications, necessitating the use of the more bulky, discrete
form instead.
5-3.1
Electrical Properties
According to Faraday’s law, if the magnetic-flux linkage in an
inductor (or circuit) changes with time, it induces a voltage υ
across the inductor’s terminals given by
d�
.
dt
(5.54)
di
d
(Li) = L .
dt
dt
(5.55)
υ=
In view of Eq. (5.51),
υ=
This i–υ relationship adheres to the passive sign convention
introduced earlier for resistors and capacitors. If the direction
of i is into the (+) voltage terminal of the inductor (Fig. 5-22),
then the inductor is receiving power. Also, the same logic that
led us earlier to the conclusion that the voltage across a capacitor
cannot change instantaneously leads us now to the conclusion:
The current through an inductor cannot change
instantaneously, but the voltage can. (Otherwise, the voltage across it would become infinite.) The
implication of this restriction is that when a current source
connected to an inductor is disconnected by a switch, the current
5-3
INDUCTORS
271
where it is presumed that at t = −∞ no current was flowing
through the inductor. Note the analogy with the capacitor for
which w(t) = 21 C υ 2 (t).
i
L
+
υ
_
υ=L
di
dt
The magnetic energy stored in an inductor at a given
instant in time depends on the current flowing through the
inductor at that instant—without regard to prior history. Figure 5-22: Passive sign convention for an inductor.
continues to flow for a short amount of time through the air
between the switch terminals, manifesting itself in the form of a
spark! In large power systems, current must always be ramped
up and down slowly to avoid this problem.
When we discussed the capacitor’s i–υ relationship given by
Eq. (5.23), we noted that under dc conditions a capacitor acts
like an open circuit. In contrast, Eq. (5.55) asserts that:
Under dc conditions, an inductor acts like a short
circuit. To express i(t) in terms of υ(t), we duplicate the procedure
we followed earlier in connection with the capacitor, which for
the inductor leads to
i(t) = i(t0 ) +
1
L
t
υ dt � ,
(5.56)
where t0 is an initial reference point in time.
The power delivered to the inductor is given by
w(t) =
−∞
�
p dt =
t −∞
di
,
dt
(5.57)
di
Li �
dt
�
dt ,
(5.58)
1
L i 2 (t)
2
(for t ≥ 0).
(a) Plot the waveform i(t) versus t and determine the
locations of its first maximum, first minimum, and their
corresponding amplitudes.
(b) given that L = 50 mH, obtain an expression for υ(t) across
the inductor and plot its waveform.
(J),
Solution: (a) The waveform of i(t) is shown in Fig. 5-23(b).
To determine the locations of its maxima and minima, we take
the derivative of i(t) and equate it to zero, which leads to
π 2
× 10e−0.8t cos
πt
2
= 0,
which in turn simplifies to
tan
πt
2
=
π
.
1.6
Its solution is
πt
= 1.1 + nπ
2
(for n = 0, 1, 2, . . . ).
For n = 0, t = 0.7 s, which is the location in time of the first
maximum of i(t). The next solution, corresponding to n = 1,
gives the location of the first minimum of i(t) at 2.7 s. The
amplitudes of i(t) at these locations are
which yields
w(t) =
i(t) = 10e−0.8t sin(π t/2) A,
−0.8 × 10e−0.8t sin(π t/2) +
and as with the resistor and the capacitor, the sign of p
determines whether the inductor is receiving power (p > 0)
or delivering it (p < 0). The accumulation of power over time
constitutes the storage of energy. The magnetic energy stored
in an inductor is
t
Upon closing the switch at t = 0 in the circuit of Fig. 5-23(a),
the voltage source generates a current waveform through the
circuit given by
(c) Generate a plot of the power p(t) delivered to the inductor.
t0
p(t) = υi = Li
Example 5-7: Inductor Response to Current Waveform
(5.59)
imax = i(t = 0.7 s) = 10e−0.8×0.7 sin(π × 0.7/2) = 5.09 A
272
CHAPTER 5
RC AND RL FIRST-ORDER CIRCUITS
i (A)
R
υs(t)
6
5.09
i(t)
4
t=0
+
_
+
L
Current
2
υ(t)
_
0 0
−1.03
−2
2
4
(a)
p (W)
0.78
1
Voltage
0
2
4
10
t (s)
Power
1.5
1
0.5
8
(b)
υ (V)
0
6
Power transfer
into inductor
(current increasing)
0.5
6
8
10
t (s)
−0.5
0
0
2
−0.5
4
6
8
10
Power transfer
out of inductor (current decreasing)
t (s)
−1
(c)
(d)
Figure 5-23: Circuit for Example 5-7.
(c)
and
imin = i(t = 2.7 s) = 10e−0.8×2.7 sin(π × 2.7/2) = −1.03 A.
(b)
p(t) = υ(t) i(t)
= [−0.4 sin(π t/2) + 0.25π cos(π t/2)]e−0.8t
× 10e−0.8t sin(π t/2)
di
υ(t) = L
dt
d
= L [10e−0.8t sin(πt/2)]
dt
= 50 × 10−3 · [−8e−0.8t sin(πt/2)
+ 5πe−0.8t cos(πt/2)]
= [−0.4 sin(πt/2) + 0.25π cos(πt/2)]e−0.8t V.
The waveform of υ(t) is shown in Fig. 5-23(c).
= [−4 sin2 (πt/2) + 2.5π cos(πt/2) sin(πt/2)]
× e−1.6t W.
The waveform of p(t) shown in Fig. 5-23(d) includes both
positive and negative values. During periods when p(t) > 0,
magnetic energy is getting stored in the inductor. Conversely,
when p(t) < 0, the inductor is releasing some of its previously
stored energy.
Concept Question 5-13: What type of material exhibits
a magnetic permeability higher than μ0? (See
)
5-3
INDUCTORS
273
Combining In-Series Inductors
Concept Question 5-14: Can the voltage across an
inductor change instantaneously? (See
)
is
Exercise 5-11: Calculate the inductance of a 20-turn air-
core solenoid if its length is 4 cm and the radius of its
circular cross section is 0.5 cm.
Answer: L = 9.87 × 10−7 H = 0.987 μH. (See
C3
1
+
_
υs
+ υ1 _ + υ2 _ + υ3 _
L1
L2
L3
2
)
Exercise 5-12: Determine currents i1 and i2 in the circuit
of Fig. E5.12, under dc conditions.
Answer: i1 = 0, i2 = 6 A. (See
C
)
L2
4 kΩ
1
+
_
υs
i1
L1
6A
is
Leq = L1 + L2 + L3
2
i2
Figure 5-24: Inductors in series.
L3
6 kΩ
Combining In-Parallel Inductors
Figure E5.12
5-3.2
is
Series and Parallel Combinations of
Inductors
The rules for combining multiple inductors in series or
in parallel are the same as those for resistors. υs
1
+
_
i1
i2
i3
L1
L2
L3
2
Inductors in series
For the three inductors in series in Fig. 5-24,
dis
dis
dis
υs = υ1 + υ2 + υ3 = L1
+ L2
+ L3
dt
dt
dt
dis
= (L1 + L2 + L3 )
,
(5.60)
dt
and for the equivalent circuit,
dis
υs = Leq
.
(5.61)
dt
Hence,
Leq = L1 + L2 + L3 ,
(5.62)
and for N inductors in series,
Leq =
N
i=1
υs
+
_
1
Leq =
2
1
1
1 −1
+
+
L1
L2
L3
Figure 5-25: Inductors in parallel.
Inductors in parallel
A similar analysis for the currents in the parallel circuit of
Fig. 5-25 leads to
Li = L1 + L2 + · · · + LN
(inductors in series).
is
(5.63)
1
1
1
1
=
+
+
.
Leq
L1
L2
L3
(5.64)
274
CHAPTER 5
RC AND RL FIRST-ORDER CIRCUITS
Table 5-4: Basic properties of R, L, and C.
Property
R
υ
R
i=
i–υ relation
L
i=
1
L
t
t0
C
υ dt � + i(t0 )
υ-i relation
υ = iR
υ=L
di
dt
p (power transfer in)
p = i2R
p = Li
di
dt
w (stored energy)
0
Req = R1 + R2
Series combination
w=
i=C
υ=
1
C
t
i dt � + υ(t0 )
t0
p = Cυ
1 2
Li
2
1
Cυ 2
2
1
1
1
=
+
Ceq
C1
C2
Leq = L1 + L2
1
1
1
=
+
Leq
R1
R2
short circuit
Can υ change instantaneously?
yes
yes
no
Can i change instantaneously?
yes
no
yes
dc behavior
dυ
dt
w=
1
1
1
=
+
Req
R1
R2
no change
Parallel combination
dυ
dt
Ceq = C1 + C2
open circuit
Generalizing to the case of N inductors,
L3 = 1 mH
2 kΩ
1
=
Leq
N
i=1
1
1
1
1
=
+
+ ··· +
.
Li
L1
L2
LN
(5.65)
C1 = 10 μF
If i1 (t0 ) through iN (t0 ) are the initial currents flowing through
the parallel inductors L1 to LN at t0 , then the initial
current ieq (t0 ) that would be flowing through the equivalent
inductor Leq is given by
ieq (t0 ) =
N
ij (t0 ).
+
_
C2 = 4 μF
24 V
(a) Original circuit
2 kΩ
(5.66)
j =1
A summary of the electrical properties of resistors, inductors
and capacitors is available in Table 5-4.
4 kΩ
L2 = 0.5 mH
L1 = 0.2 mH
(inductors in parallel)
6 kΩ
I1
L2
L1
C1
L3
V
I2
6 kΩ
4 kΩ
+
_
C2
24 V
Example 5-8: Energy Storage under dc Conditions
(b) Equivalent circuit under steady state conditions
The circuit in Fig. 5-26(a) has been in its present state for a long
time. Determine the amount of energy stored in the capacitors
and inductors.
Figure 5-26: Under steady-state dc conditions, capacitors act
like open circuits, and inductors act like short circuits.
5-4
RESPONSE OF THE RC CIRCUIT
275
Solution: Our first step is to replace components with their
dc equivalents (capacitors with open circuits and inductors with
short circuits). The process leads to the circuit in Fig. 5-26(b),
which can be solved using any of the analysis methods used
previously with resistive circuits. Current I1 then is given by
24
= 4 mA,
I1 =
(2 + 4)k
and node voltage V is
V = 24 − (4 × 10−3 × 4 × 103 ) = 8 V.
Hence, the amounts of energy stored in C1 , C2 , L1 , L2 , and L3
are
1
1
C 1 : W = C1 V 2 = × 10−5 × 64 = 0.32 mJ,
2
2
1
1
C 2 : W = C2 V 2 = × 4 × 10−6 × 64 = 0.128 mJ,
2
2
1
L1 : W = L1 I12
2
1
= × 0.2 × 10−3 × (4 × 10−3 )2 = 1.6 nJ,
2
1
1
L2 : W = L2 I22 = × 0.5 × 10−3 × (0) = 0,
2
2
and
1
1
L3 : W = L3 I12 = × 10−3 × (4 × 10−3 )2 = 8 nJ.
2
2
Concept Question 5-15: How do the rules for adding
inductors in series and in parallel compare with those for
resistors and capacitors? (See
)
Concept Question 5-16: An inductor stores energy
through the magnetic field B, but the equation for the
energy stored in an inductor is w = 1 Li2. Explain.
2
(See
)
Exercise 5-13: Determine Leq at terminals (a, b) in the
circuit of Fig. E5.13.
a
5-4 Response of the RC Circuit
The preceding sections described the behavior of capacitors
and inductors under dc conditions (i.e., a static circuit with
none of its voltages or currents varying with time). We now
turn our attention to the time-varying (dynamic) conditions of
these circuits.
From the standpoint of analysis and design, circuits
containing capacitors and inductors are divided into three
groups:
• RC Circuits: composed of sources (either constant or
time-varying), capacitors, and resistors.
• RL Circuits: composed of sources (either constant or
time-varying), inductors, and resistors.
• RLC Circuits: composed of any combination and any
number of sources, capacitors, inductors, and resistors.
In this and succeeding sections of this chapter, we examine
the responses of relatively simple RC and RL circuits to
sudden changes, such as closing or opening a switch—or both
sequentially—and we limit the sources to dc voltage and current
sources. The RLC circuit response is addressed in Chapter 6,
also for dc sources with switches. RLC circuits driven by ac
sources are treated in Chapters 7–11, and RLC circuits driven
by other types of sources are the subject of Chapters 12 and 13.
The circuit shown in Fig. 5-27 is called a first-order RC
circuit; it contains a resistor and a capacitor, and its current
and voltage responses are determined by solving a first-order
differential equation. The name also applies to any other circuit
containing sources, resistors, and capacitors—provided it can
be reduced to the form of the generic RC circuit of Fig. 5-27
or its Norton equivalent. This can be realized by combining
elements in series or in parallel, as well as through Y-
transformations. The voltage source exciting the circuit is a
rectangular pulse of amplitude Vs and duration T0 , which
includes both turn-on (charging) and turn-off (discharging)
periods. The objective of the present section is to develop a
2 mH
R
6 mH
12 mH
b
υi =
t=0
Figure E5.13
Answer: Leq = 6 mH. (See
Vs
)
+
_
iC
C
t = T0
Figure 5-27: Generic first-order RC circuit.
+
υ
_ C
276
CHAPTER 5
methodology appropriate for RC circuits, so we may apply
it to evaluate the circuit’s response to the rectangular-pulse
waveform or to other types of nonperiodic waveforms.
5-4.1
Natural Response of a Charged Capacitor
We begin by considering what is called the natural response of
the circuit, which refers to the time variations of the voltages
and currents in reaction to moving a switch that allows a fully
charged capacitor to discharge its accumulated charge. This
occurs at t = T0 in Fig. 5-27. To that end, let us examine the
more realistic circuit in Fig. 5-28(a). Until t = 0, the series RC
circuit had been connected to dc voltage source Vs for a long
time. At t = 0, the switch disconnects the RC circuit from the
Rs
Vs
R
1
+
_
2
t=0
dυ
iC = C dtC
C
+
_ υC
Vs
R
1
iC = 0
+
−
C
_υC(0 )
+
_
source and connects it to terminal 2. We seek to determine the
voltage response of the capacitor υ(t) for t ≥ 0.
Before we start our solution, it is important to consider the
implication of the information we are given about the state of
the capacitor before and after moving the switch. For purposes
of clarity, we define:
(a) t = 0− as the instant just before the switch is moved from
terminal 1 to terminal 2, and
(b) t = 0 as the instant just after it was moved; t = 0 is
synonymous with t = 0+ .
At t = 0− , the circuit had been in the condition shown in
Fig. 5-28(a) for a long time. As we noted earlier in Section
5-2.1, when a dc circuit is in a steady state, its capacitors act like
open circuits. Consequently, the open circuit in Fig. 5-28(b),
representing the state of the circuit at t = 0− , allows no current
to flow through the loop, and, therefore, there is no voltage
drop across either of the two resistors. Hence, υC (0− ) = Vs ,
and since the voltage across the capacitor cannot change
instantaneously, it follows that υC (0), the voltage after moving
the switch, is given by
υC (0) = υC (0− ) = Vs .
= Vs
RiC + υC = 0
RC
2
dυ
iC = C dtC
C
+
_ υC
(c) At t > 0 (capacitor discharging)
Figure 5-28: RC circuit with an initially charged capacitor that
starts to discharge its energy after t = 0.
(for t ≥ 0),
(5.68)
where iC is the current through and υC is the voltage across the
capacitor. Since iC = C dυC /dt, Eq. (5.68) becomes
(b) At t = 0− (fully charged capacitor)
R
(5.67)
As we see shortly, we will need this piece of information for
when we apply this initial condition to the solution of the
differential equation of υC (t).
For t ≥ 0, application of KVL to the loop in Fig. 5-28(c)
gives
(a) RC circuit
Rs
RC AND RL FIRST-ORDER CIRCUITS
dυC
+ υC = 0.
dt
(5.69)
Upon dividing both terms by RC, Eq. (5.69) takes the form
dυC
+ aυC = 0
dt
(source-free),
(5.70)
where
1
.
(5.71)
RC
When arranging a differential equation in υC (t), it is customary
to place all terms that involve υC (t) on the left-hand side of
the equation and to place terms that do not involve υC (t) on the
right-hand side. The term(s) on the right-hand side is (are) called
a=
5-4
RESPONSE OF THE RC CIRCUIT
277
the forcing function. For a circuit, the forcing function is related
directly to the voltage and current sources in the circuit. Because
the RC circuit in Fig. 5-28(c) does not contain any sources,
Eq. (5.70) has a zero on its right-hand side and it is called
(appropriately) a source-free, first-order differential equation.
The solution of the source-free equation is called the
natural response (discharging condition) of the circuit. The standard procedure for solving Eq. (5.70) starts by
replacing t with dummy variable t � and multiplying both sides
�
by eat ,
dυC at �
�
e + aυC eat = 0.
dt �
(5.72)
Next, we recognize that the sum of the two terms on the left�
hand side is equal to the expansion of the differential of (υC eat ),
dυC at �
d
�
�
(υC eat ) =
e + aυC eat .
dt �
dt �
(5.73)
Hence, Eq. (5.72) becomes
d
�
(υC eat ) = 0.
dt �
(5.74)
Integrating both sides, we have
t
0
d
�
(υC eat ) dt � = 0,
dt �
(5.75)
where we have chosen the lower limit to be t � = 0 (because we
are given specific information on the state of the circuit at that
point in time). Performing the integration gives
� t
υC eat = 0
The coefficient of t in the exponent is a critically important
parameter, because it determines the temporal rate of υC (t). It
is customary to rewrite Eq. (5.77) in the form
υC (t) = υC (0) e−t/τ ,
(5.78)
(natural response discharging),
with
τ = RC
(s),
(5.79)
where τ is called the time constant of the circuit, and it is
measured in seconds (s).
In view of the initial condition given by Eq. (5.67), namely
υC (0) = Vs , the expression for υC (t) becomes
υC (t) = Vs e−t/τ u(t),
(5.80)
where we inserted the unit step function u(t) as a multiplication
factor as a substitute for “for t ≥ 0.” The plot shown in
Fig. 5-29(a) indicates that in response to the switch action,
υC (t) decays exponentially with time from Vs at t = 0 down to
its final value of zero as t → ∞. The decay rate is dictated by
the time constant τ . At t = τ ,
υC (t = τ ) = Vs e−1 = 0.37Vs ,
(5.81)
which means that at τ seconds after activating the switch, the
voltage across the capacitor is down to 37 percent of its initial
value. At t = 2τ , it reaches 14 percent, and at t = 5τ , it is
less than 1 percent of its initial value. Hence, for all practical
purposes, we can treat the circuit as having reached its final
state when the switch has been in its new configuration for a
time equal to or longer than 5τ .
The magnitude of the time constant τ is a measure of
how fast or how slowly a circuit responds to a sudden
change. 0
or
υC (t) eat − υC (0) = 0.
(5.76)
Solving for υC (t), we have
υC (t) = υC (0) e−at = υC (0) e−t/RC
(for t ≥ 0), (5.77)
where we used Eq. (5.71) for a and appended the inequality
t ≥ 0 to indicate that the expression given by Eq. (5.77) is valid
only for t ≥ 0.
As we will see later in Section 5-7, the clock speed of a computer
processor is, to first order, proportional to 1/τ . Hence, a slow
circuit with τ = 1 ms would have a clock speed on the order of
1 kHz, whereas a fast circuit with τ = 1 ns can support clock
speeds as high as 1 GHz.
The current iC (t) flowing through the capacitor is given by
iC (t) = C
dυC
d
=C
(Vs e−t/τ )
dt
dt
Vs −t/τ
= −C
e
τ
(for t ≥ 0),
(5.82)
278
CHAPTER 5
υC
Voltage discharging
Vs
υC(t) = Vse−t/τ
0.37Vs
t
τ
0
(a)
iC
−0.37
Vs
R
−
Vs
R
τ
t
0
Current
iC(t) = −
Vs −t/τ
e
R
(b)
pC
τ/2
V2
−0.37 s
R
−
t
0
Vs2
R
Power
pC(t) = −
Vs2 −2t/τ
e
R
wC
CVs2
wC(t) =
( )
CVs2
0.37
2
Fig. 5-29(b) indicates that after closing the switch at t = 0,
the current changes instantly to (−Vs /R)—as if the capacitor
were a voltage source Vs —and then it decays exponentially
down to zero. The negative sign of i signifies that it flows in
a counterclockwise direction through the loop, consistent with
the behavior of the capacitor as a voltage source.
Given υC (t) and iC (t), we can provide an expression for
pC (t), the instantaneous power getting transferred to the
capacitor, as
Vs −t/τ
V2
× Vs e−t/τ = − s e−2t/τ u(t).
e
R
R
(5.84)
Note that from the definition of u(t) given by Eq. (5.2),
u(t) · u(t) = u(t).
In general, power transfer is into a device if pC > 0 and out
of it if pC < 0. Prior to t = 0, the capacitor had been connected
to the voltage source for a long time. Hence, power already had
flowed into the capacitor and was stored as electrical energy.
The minus sign in Eq. (5.84) denotes that after t = 0 power
flows out of the capacitor and gets dissipated in the resistor.
pC (t) = iC υC = −
The decay rate for pC (t) is 2/τ , which is twice as fast
as that for υC (t) or iC (t). The amount of energy wC (t) contained in the medium
between the capacitor’s oppositely charged conducting plates
can be calculated either by integrating pC (t) over time from 0
to t or by applying Eq. (5.29). The latter approach gives
(c)
1
2
RC AND RL FIRST-ORDER CIRCUITS
1
2 −2t/τ
2 CVs e
wC (t) =
Energy
t
1
CVs2 −2t/τ
u(t).
C υC2 (t) =
e
2
2
(5.85)
(d)
Parts (c) and (d) of Fig. 5-29 display the time waveforms of
pC (t) and wC (t), respectively.
Figure 5-29: Response of the RC circuit in Fig. 5-28(a) to
Concept Question 5-17: What specific characteristic
0
τ/2
moving the SPDT switch to terminal 2.
defines a first-order circuit? (See
which simplifies to
Vs −t/τ
e
u(t),
R
(natural response discharging)
iC (t) = −
(5.83)
where, again, u(t) is used to emphasize the fact that the
expression is valid for only t ≥ 0. The plot of iC (t) shown in
)
Concept Question 5-18: What does the time constant
of an RC circuit represent? Would a larger capacitor
discharge faster or more slowly than a small one?
(See
)
Concept Question 5-19: For the natural response of an
RC circuit, how does the decay rate for voltage compare
with that for power? (See
)
5-4
RESPONSE OF THE RC CIRCUIT
279
Exercise 5-14: If in the circuit of Fig. E5.14
20 kΩ
t=0
Vs1
+
_υC
5 μF
R
1
υC (0− ) = 24 V, determine υC (t) for t ≥ 0.
+
_
iC
t=0
2
C
+
_
Vs2
+
_υC
(a) RC circuit
Figure E5.14
Answer: υC
(t) = 24e−10t V
for t ≥ 0. (See
Rs
C3
)
5-4.2 General Form of the Step Response of the
RC Circuit
When we use the term circuit response, we mean the reaction
of a certain voltage or current in the circuit to change, such as
the introduction of a new source, the elimination of a source,
or some other change in the circuit configuration. Whenever
possible, we usually designate t = 0 as the instant at which the
change occurred and t ≥ 0 as the time interval over which we
seek the circuit response. In the general case, the capacitor may
start with a voltage υC (0) at t = 0 (immediately after the sudden
change) and may approach a value denoted υC (∞) as t → ∞.
A circuit configuration that can represent such a scenario is
the series RC circuit shown in Fig. 5-30(a). Prior to t = 0, the
RC circuit is connected to a source Vs1 , and after t = 0, it is
connected to a different source Vs2 . The circuit can be reduced
to the following special cases:
• Step response (due to Vs2 ) of an uncharged capacitor (if
Vs1 = 0)
Vs1
R
1
iC = 0
+
_
C
+
−
_υC(0 )
= Vs1
(b) Initial condition at t = 0−
iC
R
2
Vs2
C
+
_
+
_υC
(c) Natural reponse after t = 0
Figure 5-30: RC circuit switched from source Vs1 to source Vs2
at t = 0.
• Step response (due to Vs2 ) of a charged capacitor (if
Vs1 �= 0)
For t ≥ 0, the (natural response) voltage equation for the loop
in Fig. 5-30(c) is
• Natural response (if Vs2 = 0) of a charged capacitor
(Vs1 �= 0)
−Vs2 + iC R + υC = 0.
For obvious reasons, we excluded the trivial case where both
Vs1 and Vs2 are zero, and we will now treat the general case
where neither Vs1 nor Vs2 is zero.
At t = 0− (Fig. 5-30(b)), the capacitor has been in steady
state for a long time. Hence, it acts like an open circuit.
Consequently, iC (0− ) = 0, and υC (0− ) = Vs1 . Since υC across
the capacitor cannot change in zero time, the (initial condition)
voltage υC (0) after moving the switch to terminal 2 is
υC (0) = υC (0− ) = Vs1 .
(5.86)
(5.87)
Upon using iC = C dυC /dt and rearranging its terms,
Eq. (5.87) can be written in the differential-equation form
dυC
+ aυC = b,
dt
(5.88)
where
a=
1
RC
and
b=
V s2
.
RC
(5.89)
280
CHAPTER 5
We note that Eq. (5.88) is similar to Eq. (5.70), except that now
we have a non-zero term on the right-hand side of the equation.
Nevertheless, the method of solution remains the same. After
replacing t with dummy variable t � and multiplying both sides
�
of Eq. (5.88) by eat , we have
e
at �
dυC
�
�
+ aυC eat = beat .
dt �
(5.90a)
In view of Eq. (5.73), Eq. (5.90a) can be rewritten as
d
�
�
(υC eat ) = beat .
�
dt
(5.90b)
0
d
�
(υC eat ) dt � =
�
dt
gives
�
υC eat |t0
t
be
at �
dt �
b at b
e − ,
a
a
(5.93)
b
(1 − e−at ).
a
(5.94)
b
= Vs2 .
a
υC (t) = υC (∞) + [υC (T0 ) − υC (∞)]e−(t−T0 )/τ
· u(t − T0 ),
(5.98)
Series RC Circuit Solution
As t → ∞, e−∞ = 0 and υC (t) reduces to the final condition
υC (∞) =
If the switch action causing the change in voltage across
the capacitor occurs at time T0 instead of at t = 0, Eq. (5.96)
assumes the form
(5.92)
and then solving for υC (t), we have
υC (t) = υC (0) e−at +
(5.97)
(5.91)
Upon evaluating the functions at the two limits, we have
υC (t) eat − υC (0) =
υC (t) = Vs2 + (Vs1 − Vs2 )e−t/τ .
where we have replaced t with (t −T0 ) on the right-hand side of
Eq. (5.96). Now υC (T0 ) is the initial voltage at t = T0 . For easy
reference, this expression is made available in Table 5-5, along
with expressions for three other types of circuits discussed in
future sections.
0
b at � t
= e .
a
0
For the specific circuit in Fig. 5-30(a), Eqs. (5.86) and (5.95)
give υC (0) = Vs1 and υC (∞) = Vs2 . Hence,
(series RC circuit with switch action at t = T0 )
Integrating both sides from t � = 0 to t � = t, namely
t
RC AND RL FIRST-ORDER CIRCUITS
(5.95)
By reintroducing the time constant τ = RC = 1/a and
replacing b/a with υC (∞), we can rewrite Eq. (5.94) in the
general form:
υC (t) = υC (∞) + [υC (0) − υC (∞)]e−t/τ u(t).
(series RC circuit with switch action at t = 0)
(5.96)
The voltage response of any RC circuit is determined
by three parameters: the initial voltage υC (0), the final
voltage υC (∞), and the time constant τ . 1: If switch action is at t = 0, analyze circuit at t = 0−
to determine initial conditions υC (0− ) and iC (0− ). Use
this information to determine υC (0) and iC (0), at t
immediately after the switch action. Remember that the
voltage across a capacitor cannot change instantaneously
(between t = 0− and t = 0), but the current can.
2: Analyze the circuit to determine υC (∞), the voltage
across the capacitor long after the switch action.
3: Determine the time constant τ = RC.
4: Incorporate the information obtained in the previous
three steps in Eq. (5.96):
υC (t) = υC (∞) + [υC (0) − υC (∞)]e−t/τ u(t).
5: If the switch action is at t = T0 instead of t = 0, replace
0 with T0 and use Eq. (5.98):
υC (t) = υC (∞) + [υC (T0 ) − υC (∞)] · e−(t−T0 )/τ
· u(t − T0 ).
5-4.3 Thévenin Approach
For a circuit containing dc sources, resistors, switches and a
single capacitor (or multiple capacitors that can be combined
5-4
RESPONSE OF THE RC CIRCUIT
281
into a single equivalent capacitor), the voltage response across
the capacitor, υC (t), can be calculated with relative ease by
taking advantage of the Thévenin theorem. The procedure
involves the following steps:
a
Subcircuit 1
+
υ
_C
C
Subcircuit 2
b
(a) Original circuit
Thévenin Approach to RC Response
Step 1: If the circuit includes a single switch action (open,
close, or move between two terminals) at t = T0 , analyze
the circuit at t = T0− (just before the switch action)
to determine υC (T0− ). When so doing, the capacitor
should be replaced with an open circuit. Then set
υC (T0 ) = υC (T0− ), where υC (T0 ) is the voltage across
the capacitor after the switch action.
Step 2: For the circuit configuration at t ≥ T0 (after the
switch action), obtain the Thévenin equivalent circuit as
“seen” by the capacitor. Figure 5-31(a) depicts a general
circuit (composed of possibly two subcircuits) connected
to a capacitor C. After removing (temporarily) the
capacitor and calculating VTh and RTh of the equivalent
Thévenin circuit at terminals (a, b), reinstate the capacitor
as in Fig. 5-31(b).
RTh
VTh
+
_
a
C
+
υ
_C
b
(b) After replacing circuit with Thévenin equivalent
Figure 5-31: Replacing a resistive circuit with its Thévenin
equivalent as seen by capacitor C.
Step 3: The capacitor’s voltage response is then given by
υC (t) = υC (∞) + [υC (T0 ) − υC (∞)]e
−(t−T0 )/τ
· u(t − T0 ),
with υC (∞) = VTh , υC (T0 ) as obtained in step 1, and
τ = RTh C.
Step 4: If the circuit undergoes multiple switch actions,
repeat the procedure for each time segment and use the
property that the voltage across a capacitor cannot change
instantaneously to match the responses at the boundaries
between adjacent time segments.
Example 5-9: Thévenin Approach
The switch in the circuit of Fig. 5-32(a) had been in position 1
for a long time until it was moved to position 2 at t = 0.
Determine υC (t) for t ≥ 0.
Solution:
Step 1: Figure 5-32(b) depicts the state of the circuit at t = 0−
(initial condition), with the capacitor represented by an open
circuit. Because of the open circuit, i = 0 in the left-hand side
of the circuit. Hence, no voltage drop occurs across the 3 k�
resistor. Consequently, the voltage at node V1 , relative to the
designated ground node, is
V1 = 24 V.
On the right-hand side of the circuit, the current source flows
entirely through the 4 k� resistor, generating a node voltage
V2 = 4.5 × 10−3 × 4 × 103 = 18 V.
Hence, the initial voltage is
υC (0− ) = V1 − V2 = 24 − 18 = 6 V.
Since the voltage across the capacitor cannot change
instantaneously, it follows that
υC (0) = υC (0− ) = 6 V.
Step 2: Figure 5-32(c) represents the state of the circuit after
moving the switch to position 2 and removing the capacitor so
as to calculate the elements of the Thévenin circuit at terminals
(a, b). In step (d), conversion of the current source and 4 k�
282
CHAPTER 5
RC AND RL FIRST-ORDER CIRCUITS
Table 5-5: Response forms of basic first-order circuits.
Diagram
Circuit
R
Input: dc
circuit
with switch
action
@ t = T0
RC
C
υC
υC (t) = υC (∞) + [υC (T0 ) − υC (∞)]e−(t−T0 )/τ u(t − T0 )
(τ = RC)
Input: dc
circuit
with switch
action
@ t = T0
RL
Response
iL
R
L
iL (t) = iL (∞) + [iL (T0 ) − iL (∞)]e−(t−T0 )/τ u(t − T0 )
(τ = L/R)
C
R
Ideal integrator
+
_ υi
−
1
υout (t) = −
RC
υout
+
RL
t
t0
υi dt � + υout (t0 )
R
C
−
Ideal differentiator
+
_ υi
+
υout
υout (t) = −RC
RL
resistor into a voltage source in series with a resistor leads to
RTh = 4 k� + 1 k� = 5 k�,
VTh = −4.5 × 10−3 × 4 × 103 = −18 V.
Note that the polarity of the Thévenin voltage source
has to be assigned to match that of υC , the voltage across
the capacitor. In the present case, the current to voltage
transformation led to a voltage source with the opposite
polarity to that defined for VTh . Hence, VTh = −18 V, not
18 V. dυi
dt
Step 3: The capacitor is reinserted in part (e). With υC (0) = 6 V,
υC (∞) = VTh = −18 V, and
we have
τ = RTh C = 5 × 103 × 100 × 10−6 = 0.5 s,
υC (t) = υC (∞) + [υC (0) − υC (∞)]e−t/τ u(t)
= [−18 + 24e−2t ] u(t) V.
This solution indicates that at t = 0, the initial voltage across
the capacitor is υC (0) = −18 + 24 = 6 V, which is consistent
with the result obtained in step 1. After a long time t such
that e−2t approaches zero, υC (t) approaches −18 V, which
is υC (∞). In between, the capacitor discharges to zero and
5-4
RESPONSE OF THE RC CIRCUIT
+ υC _
3 kΩ
t=0
1
24 V
2
+
_
283
C = 100 μF
1 kΩ
4.5 mA
24 V
4 kΩ
2
+
_
1 kΩ
+ VTh _
b
4 kΩ
V2
4.5 mA
4 kΩ
(b) Initial condition at t = 0−
+ VTh _
a
υC(0−)_
+
a
b
C = 100 μF
1
i=0
(a) Circuit with switch
2
V1
3 kΩ
a
2
4.5 mA
1 kΩ
b
RTh
+
_
+
_
υC
_
5 kΩ
C = 100 μF
VTh = 18 V
4 kΩ
1 kΩ
(c) At t > 0 without the capacitor
18 V
+
(e) At t > 0, after reinserting C in
the Thévenin equivalent circuit
(d) After current to voltage
source transformation
υC (V)
6
6
5
υC(t) = (−18 + 24e−2t ) u(t)
0
0
0.5
1
1.5
2
t (s)
−5
−10
−15
−18
−20
(f ) Plot
Figure 5-32: Circuit for Example 5-9.
then builds up charge again, but of opposite polarity. The time
variation of υC (t) is displayed in Fig. 5-32(f).
Example 5-10: Switching between Two Sources
In the circuit of Fig. 5-33(a), the SPDT switch is moved from
position 1 to position 2 after it had been in position 1 for a
long time. Determine the voltage υC (t) for t ≥ 0 if the switch
is moved at (a) t = 0 or (b) t = 3 s.
Solution: (a) For T0 = 0 and t ≥ 0, the complete solution
of υC (t) is given by Eq. (5.96) as
υC (t) = υC (∞) + [υC (0) − υC (∞)]e−t/τ u(t). (5.99)
We need to determine three quantities: the initial voltage υC (0), the final voltage υC (∞), and the time constant τ .
284
CHAPTER 5
i1
4 kΩ
45 V
1
2 i2
RC AND RL FIRST-ORDER CIRCUITS
2 kΩ
24 kΩ
t=0
+
_
8 kΩ
20 μF
+
_
12 kΩ
+
_ υC
60 V
(a) Original circuit
i1 = 0
4 kΩ
45 V
+
_
1
2.67 kΩ
8 kΩ
30 V
+ _
_υC(0 )
C
C
20 μF
2
24 kΩ
+
_
12 kΩ
+
_υC
60 V
20 μF
Circuit
+ _
_υC(0 )
= 30 V
'
Thevenin
equivalent
(b) At t = 0−
(initial condition)
2 kΩ
1
+
_
Circuit
2 i2
i1 = 0
i2
10 kΩ
+
_
+
_υC
20 V
'
Thevenin
equivalent
(c) At t ≥ 0
(steady state)
Figure 5-33: Circuit for Example 5-10 [part (a)].
The initial voltage is the voltage that existed across the capacitor
before moving the switch. Since the switch had been in
that position for a long time, we presume that the circuit in
Fig. 5-33(b) had reached its steady-state condition long before
the switch was moved. Hence, at t = 0− (just before moving
the switch), the capacitor behaves like an open circuit. The
voltage υC (0− ) across the capacitor is the same as that across
the 8 k� resistor, and since i1 = 0 at t = 0− , application of
voltage division yields
υC (0− ) =
8k
4k + 8k
× 45 = 30 V.
Incidentally, we could have obtained the same result by
transforming the circuit in Fig. 5-33(b) into its Thévenin
equivalent.
Incorporating the constraint that the voltage across the
capacitor cannot change instantaneously, it follows that
υC (0) = υC (0− ) = 30 V.
Now we turn our attention to finding υC (∞). After moving
the switch to position 2 (Fig. 5-33(c)) and allowing the circuit
sufficient time to reach its final state, the capacitor again will
5-4
RESPONSE OF THE RC CIRCUIT
285
behave like on open circuit, which means that i2 = 0 at t = ∞.
Voltage division gives
υC (∞) =
12k
12k + 24k
× 60 = 20 V.
12k × 24k
= 10 k�.
12k + 24k
1
(a)
C
+
_ υC
C
+
_υ1
C
+
_υ2
Actual circuit
R1
R = RTh = 2 k� + 12 k� � 24 k�
= 2 k� +
R2
t = 10 s
+
_
V1
The time constant of the circuit to the right of terminal 2 is
given by τ = RC, with R being the Thévenin resistance of that
circuit. After suppressing (short-circuiting) the 60 V source, we
get
2 t=0
R1
R2
2
+
_
V1
Hence,
3
τ = RC = 10 × 10 × 20 × 10
−6
Circuit during 0 ≤ t ≤ 10 s
(b)
= 0.2 s.
R2
Substituting the values we obtained for υC (0), υC (∞), and τ
in Eq. (5.99) leads to
υC (t) = [(20 + 10e−5t ) u(t)] V.
υC (t) = υC (∞) + [υC (3) − υC (∞)]e−(t−3)/τ
1
(c)
(b) This is a repetition of the previous case except that now the
switch action takes place at T0 = 3 s. The applicable expression
is given by Eq. (5.98),
Circuit after t = 10 s
υC (V)
7
6.59
u(t − 3).
5
υC (t) =
30 V
[20 + 10e−5(t−3) ] V
2
Charging
Discharging
1
0
(d)
Given that the switch in Fig. 5-34 was moved to position 2
at t = 0 (after it had been in position 1 for a long time)
and then returned to position 1 at t = 10 s, determine the
voltage response υC (t) for t ≥ 0 and evaluate it for V1 = 20 V,
R1 = 80 k�, R2 = 20 k�, and C = 0.25 mF.
υ2(t) = 6.59e−0.2(t − 10) V
(for t ≥ 10 s)
3
for 0 ≤ t ≤ 3 s,
for t ≥ 3 s.
Example 5-11: Charge/Discharge Action
υ2(t)
υ1(t)
4
Of course, υC (t) = 30 V before t = 3 s. Hence, for the specified
time duration t ≥ 0,
υ1(t) = 20(1 − e−0.04t ) V
(for 0 ≤ t ≤ 10 s)
6
0
5
10
15
20
25
30
t (s)
Voltage response
Figure 5-34: After having been in position 1 for a long time,
the switch is moved to position 2 at t = 0 and then returned to
position 1 at t = 10 s (Example 5-11).
Solution: We will divide our solution into two time
segments: υC = υ1 (t) for 0 ≤ t ≤ 10 s and υC = υ2 (t) for
t ≥ 10 s.
286
CHAPTER 5
Time Segment 1:
RC AND RL FIRST-ORDER CIRCUITS
0 ≤ t ≤ 10 s
When the switch is in position 2 (Fig. 5-34(b)), the resistance
of the circuit is R = R1 + R2 . Hence, the time constant during
this first time segment is
υi =
τ1 = (R1 + R2 )C = (80 + 20) × 103 × 0.25 × 10−3 = 25 s.
Application of Eq. (5.96) with υ1 (0) = 0 (the capacitor had
no charge prior to t = 0), υ1 (∞) = V1 = 20 V, and τ1 = 25 s
leads to
= 20(1 − e
Vs = 10 V
+
_
+
_ υC
(a)
i
R
During 0 ≤ t ≤ 4 s
Vs
) V (for 0 ≤ t ≤ 10 s).
+
_
C
+
_ υ1
C
+
_ υ2
(b)
Time Segment 2: t ≥ 10 s
Voltage υ2 (t), corresponding to the second time segment
(Fig. 5-34(c)), is given by Eq. (5.98) with a new time constant τ2
as
i
υ2 (t) = υ2 (∞) + [υ2 (10) − υ2 (∞)]e−(t−10)/τ2 .
The new time constant is associated with the capacitor circuit
after returning the switch to position 1,
τ2 = R2 C = 20 × 103 × 0.25 × 10−3 = 5 s.
The initial voltage υ2 (10) is equal to the capacitor voltage υ1
at the end of time segment 1, namely
With no voltage source present in the R2 C circuit, the charged
capacitor will dissipate its energy into R2 , exhibiting a natural
response with a final voltage of υ2 (∞) = 0. Consequently,
υ2 (t) = υ2 (10) e−(t−10)/τ2
(for t ≥ 10 s).
The complete time response of υ(t) is displayed in Fig. 5-34(d).
Example 5-12: RC-Circuit Response to Rectangular
Pulse
Determine the voltage response of a previously uncharged
RC circuit to a rectangular pulse υi (t) of amplitude Vs and
duration T0 , as depicted in Fig. 5-35(a). Evaluate and plot
the response for R = 25 k�, C = 0.2 mF, Vs = 10 V, and
T0 = 4 s.
R
After t = 4 s
(c)
υC (V)
Forced 6
response
Natural response
4
υ2 (10) = υ1 (10) = 20(1 − e−0.04×10 ) = 6.59 V.
= 6.59e−0.2(t−10) V
C
t=0
t=4s
Pulse excitation
υ1 (t) = υ1 (∞) + [υ1 (0) − υ1 (∞)]e−t/τ1
−0.04t
i
R
2
(d)
0
0
4
10
20
t (s)
Figure 5-35: RC-circuit response to a 4 s long rectangular
pulse.
Solution: According to Example 5-2, a rectangular pulse is
equivalent to the sum of two step functions. Thus
υi (t) = Vs [u(t − T1 ) − u(t − T2 )],
where u(t − T1 ) accounts for the rise in level from 0 to 1 at
t = T1 and the second term (with negative amplitude) serves to
counteract (cancel) the first term after t = T2 . For the present
problem, T1 = 0, and T2 = 4 s. Hence, the input pulse can be
written as
υi (t) = Vs u(t) − Vs u(t − 4).
5-5
RESPONSE OF THE RL CIRCUIT
287
Since the circuit is linear, we can apply the superposition
theorem to determine the capacitor response υC (t). Thus,
υC (t) = υ1 (t) + υ2 (t),
where υ1 (t) is the response to Vs u(t) acting alone and,
similarly, υ2 (t) is the response to −Vs u(t −4) also acting alone.
Response to Vs u(t) alone
The response υ1 (t) is given by Eq. (5.96) with υ1 (0) = 0,
υ1 (∞) = Vs , and τ = RC. Hence,
Concept Question 5-21: If Vs2 < Vs1 in the circuit of
Fig. 5-30, what would you expect the direction of the
current to be after the switch is moved from position 1
to 2? Analyze the process in terms of charge accumulation
on the capacitor. (See
)
Exercise 5-15: Determine υ1 (t) and υ2 (t) for t ≥ 0, given
that in the circuit of Fig. E5.15 C1 = 6 μF, C2 = 3 μF,
R = 100 k�, and neither capacitor had any charge prior
to t = 0.
υ1 (t) = υ1 (∞) + [υ1 (0) − υ1 (∞)]e−t/τ
= Vs (1 − e
−t/τ
For Vs = 10 V and τ = RC =
υ1 (t) = 10(1 − e
)
(for t ≥ 0).
25 × 103
−0.2t
) V
R
× 0.2 × 10−3
= 5 s,
+
12 V _
C1
υ1
C2
υ2
(for t ≥ 0).
Figure E5.15
Response to −Vs u(t − 4) alone
The second step function has an amplitude of −Vs and is delayed
in time by 4 s. Upon reversing the polarity of Vs and replacing
t with (t − 4), we have
υ2 (t) = −10[1 − e−0.2(t−4) ] V
t=0
(for t ≥ 4 s).
Total response
The total response for t ≥ 0 therefore is given by
υC (t) = υ1 (t) + υ2 (t)
= 10[1 − e−0.2t ] − 10[1 − e−0.2(t−4) ] u(t − 4) V,
(5.100)
where we introduced the time-shifted step function u(t − 4)
to assert that the second term is zero for t ≤ 4 s. The plot of
υC (t) displayed in Fig. 5-35(d) shows that υC (t) builds up to a
maximum of 5.5 V by the end of the pulse (at t = 4 s) and then
decays exponentially back to zero thereafter. The build-up part
is due to the external excitation and often is called the forced
response. In contrast, during the time period after t = 4 s, υC (t)
exhibits a natural decay response as the capacitor discharges
its energy into the resistor. During this latter time segment, i(t)
flows in a counterclockwise direction.
Concept Question 5-20: What are the three quantities
needed to establish υC(t) across a capacitor in an RC
circuit? (See
)
Answer: υ1 (t) = 4(1 − e−5t ) V, for t ≥ 0,
υ2 (t) = 8(1 − e−5t ) V, for t ≥ 0.
(See
)
5-5 Response of the RL Circuit
With series RC circuits, we developed a first-order differential
equation for υC (t), the voltage across the capacitor, and then
we solved it (subject to initial and final conditions) to obtain
a complete expression for υC (t). By applying iC = C dυC /dt,
pC = iC υC , and wC = 21 CυC2 , we were able to determine the
corresponding current passing through the capacitor, the power
getting transferred to it, and the net energy stored in it. We now
follow an analogous procedure for the parallel RL circuit, but
our analysis will focus on the current i(t) through the inductor,
instead of on the voltage across it.
5-5.1
Natural Response of the RL Circuit
After having been in the closed position for a long time,
the switch in the RL circuit of Fig. 5-36(a) was moved to
position 2 at t = 0, thereby disconnecting the RL circuit from
the current source Is . What happens to the current i flowing
through the inductor after the sudden change caused by moving
the switch? That is, what is the waveform of iL (t) for t ≥ 0?
To answer this question, we first note that at t = 0− (just
before moving the switch), the RL circuit can be represented
by the circuit in Fig. 5-36(b), in which the inductor has been
288
CHAPTER 5
I0
+
_
t=0 2
R0
R
+
diL
υL = L dt
_
+
_
2
iL (t) = iL (0) e−t/τ u(t),
Initial condition at t = 0−
(c)
R0
R
L
τ=
5-5.2
+
diL
υL = L dt
_
Circuit at t ≥ 0 (natural response)
Figure 5-36: RL circuit disconnected from a current source at
t = 0.
replaced with a short circuit. This is because under steadystate conditions iL no longer changes with time, which leads to
υL = L diL /dt = 0. We also know that the current will take
the path of least resistance through the short circuit. A current
source entering a node connected to another node via a parallel
combination of a resistor R and a short circuit will flow entirely
through the short circuit. Hence, iL (0− ) = Is . Moreover, since
the current through an inductor cannot change instantaneously,
the initial current at t = 0 (after moving the switch) has to be
iL (0) = iL (0− ) = Is .
For the time period t ≥ 0, the loop equation for the RL circuit
in Fig. 5-36(c) is given by
diL
= 0,
RiL + L
dt
1
L
= .
a
R
(5.101)
(5.104)
General Form of the Step Response of the
RL Circuit
To generalize our solution to the case where the RL circuit
may contain sources both before and after the sudden change
in the circuit configuration, we adopt the basic circuit shown in
Fig. 5-37(a) in which two switches are moved simultaneously
at t = 0 so as to switch the RL circuit from current source Is1
to current source Is2 . The initial state of the circuit at t = 0−
(Fig. 5-37(b)) leads to the conclusion that
iL (0) = iL (0− ) = Is1 .
The circuit in Fig. 5-37(c) represents the arrangement at t ≥ 0.
Application of KCL at the common node gives
−Is2 + iR + iL = 0.
Since υ is common to R and L, iR = υ/R, and by applying
υL = L diL /dt, the KCL equation becomes
diL
+ aiL = b,
dt
(5.105)
where a is as given previously by Eq. (5.102) and
b = aIs2 =
which can be cast in the form
diL
+ aiL = 0,
dt
(5.103)
where for the RL circuit, the time constant is given by
iL
I0
(5.102)
(natural response discharging)
+
L υL(0−) = 0
_
R
R0
R
.
L
The form of Eq. (5.101) is identical to that of Eq. (5.70) for
the source-free RC circuit, except that now the variable is iL (t),
whereas then it was υL (t). By analogy with the solution given
by Eq. (5.78), our solution for iL (t) is given by
iL(0−) = Is
1
(b)
L
a=
Switch is moved at t = 0
(a)
I0
where a is a temporary constant given by
iL
1
RC AND RL FIRST-ORDER CIRCUITS
R
Is .
L 2
(5.106)
Not surprisingly, Eq. (5.105) has the same form as Eq. (5.88)
for the RC circuit and therefore exhibits a solution analogous
5-5
RESPONSE OF THE RL CIRCUIT
Is 1
If the sudden change in the circuit configuration happens
at t = T0 instead of at t = 0, the general expression for iL (t)
becomes
i
S1 1
2
289
t=0
S2
R0
Is 2
2
t=0
1
+
R
L
R0
di
υL= L L
dt
_
iL(0−) = Is1
S1 1
Is 1
S2
R0
Is 2
+
υL(0−)=0
R
_
R0
(b) Initial condition at t = 0−
iL
S1 1
2
Is 1
S2
R0
Is 2
2 iR
1
(5.108)
where iL (T0 ) is the current at T0 . This expression is the analogue
of Eq. (5.98) for the voltage across the capacitor.
Parallel RL Circuit Solution
2
1
· u(t − T0 ),
(switch action at t = T0 )
(a)
2
iL (t) = iL (∞) + [iL (T0 ) − iL (∞)]e−(t−T0 )/τ
R
R0
2: Analyze the circuit to determine iL (∞), the current
through the inductor long after the switch action.
+
L
1: If switch action is at t = 0, analyze circuit at t = 0−
(by replacing L with a short circuit) to determine initial
conditions iL (0− ) and υL (0− ). Use this information to
determine iL (0) and iL (0), at t immediately after the
switch action. Remember that the current through an
inductor cannot change instantaneously (between t = 0−
and t = 0), but the voltage can.
υL
_
(c) At t ≥ 0 (natural response)
Figure 5-37: RL circuit switched between two current sources
at t = 0.
to the expression given by Eq. (5.96). Thus, the general form
for the current through an inductor in an RL circuit is given by
iL (t) = iL (∞) + [iL (0) − iL (∞)]e−t/τ u(t),
(5.107)
(switch action at t = 0)
with time constant τ = L/R. For the specific circuit in
Fig. 5-37(a), iL (0) = Is1 and iL (∞) = Is2 .
3: Determine the time constant τ = L/R.
4: Incorporate the information obtained in the previous
three steps in Eq. (5.107):
iL (t) = iL (∞) + [iL (0) − iL (∞)]e−t/τ u(t).
5: If the switch action is at t = T0 instead of t = 0, replace
0 with T0 everywhere and use Eq. (5.108):
iL (t) = iL (∞) + [iL (T0 ) − iL (∞)]e−(t−T0 )/τ u(t−T0 ).
Example 5-13: Circuit with Two RL Branches
After having been in position 1 for a long time, the SPDT switch
in Fig. 5-38(a) was moved to position 2 at t = 0. Determine
i1 , i2 , and i3 for t ≥ 0, given that Vs = 9.6 V, Rs = 4 k�,
R1 = 6 k�, R2 = 12 k�, L1 = 1.2 H, and L2 = 0.36 H.
Solution: We start by examining the initial state of the circuit
before moving the switch. At t = 0− , the inductors behave
290
CHAPTER 5
i1
R1
Rs
L1
i1(0 −)
i2
+
_
Vs
1
R1
R2
i3
i2(0 −)
V
R2
Rs
+
_
Vs
L2
L1
2
RC AND RL FIRST-ORDER CIRCUITS
L2
1
t=0
(a)
Circuit with 2 inductors
Initial condition at t = 0−
(b)
i(t)
1.2 mA
i1
R1
i2
1.0 mA
R2
i3
L1
L2
2
0.8 mA
0.6 mA
i2(t)
0.4 mA
0.2 mA
0
Circuit after t = 0
(c)
i3(t)
i1(t)
0
0.1
0.2
0.3
0.4
t (ms)
Currents i1, i2, and i3
(d)
Figure 5-38: Circuit for Example 5-13.
like short circuits, resulting in the equivalent circuit shown in
Fig. 5-38(b). Application of KCL to node V gives
V − Vs
V
V
+
+
= 0,
R1
Rs
R2
whose solution is
R 1 R2 Vs
R1 R 2 + R 1 Rs + R 2 Rs
6 × 12 × 9.6
=
= 4.8 V.
6 × 12 + 6 × 4 + 12 × 4
V =
Hence, the initial currents i1 (0) and i2 (0) are given by
i1 (0) = i1 (0− ) =
V
4.8
=
= 0.8 mA
R1
6 × 103
i2 (0) = i2 (0− ) =
V
4.8
=
= 0.4 mA.
R2
12 × 103
and
The circuit in Fig. 5-38(c) represents the natural response
circuit condition after t = 0. Even though we have two resistors
and two inductors in the overall circuit, it can be treated
5-5
RESPONSE OF THE RL CIRCUIT
291
as two independent RL circuits because each RL branch is
connected across a short circuit. In both cases, the inductors
will dissipate their magnetic energy (that they had stored prior
to moving the switch) through their respective resistors. Hence,
i1 (∞) = i2 (∞) = 0. The complete expressions for i1 (t) and
i2 (t) for t ≥ 0 then are given by
R
iL
+
_
υs
i1 (t) = [i1 (∞) + [i1 (0) − i1 (∞)]e−t/τ1 ] = 0.8e−t/τ1 u(t) mA
(a) RL circuit
and
υs
i2 (t) = [i2 (∞) + [i2 (0) − i2 (∞)]e−t/τ2 ] = 0.4e−t/τ2 u(t) mA,
L1
1.2
=
= 2 × 10−4 s
R1
6 × 103
τ2 =
L2
0.36
=
= 3 × 10−5 s.
R2
12 × 103
and
0
1
2
3
−12 V
t (ms)
4
−4000r(t) u(t − 3 ms)
(b) υs(t) = 4000r(t) − 4000r(t) u(t − 3 ms)
The current flowing through the short circuit is simply
i3 = i1 + i2 = (0.8e−t/τ1 + 0.4e−t/τ2 ) u(t) mA.
4000r(t)
12 V
where τ1 and τ2 are the time constants of the two RL circuits,
namely
τ1 =
L
iL ( mA)
100
i1(t)
Example 5-14: Response to a Triangle Excitation
The source voltage in the circuit of Fig. 5-39(a) generates
a triangular ramp function that starts at t = 0, rises linearly
to 12 V at t = 3 ms, and then drops abruptly down to zero.
Additionally, R = 250 , L = 0.5 H, and no current was
flowing through L prior to t = 0.
(a) Synthesize υs(t) in terms of unit step functions and plot it.
(b) Develop the differential equation for iL(t) for t ≥ 0.
(c) Solve the equation and plot iL(t) for t ≥ 0.
Solution: (a) The waveform of υs (t) shown in Fig. 5-39(b)
can be synthesized as the sum of two ramp functions:
υs(t) = 4000r(t) − 4000r(t) u(t − 3 ms)
= 4000t u(t) − 4000t u(t) u(t − 3 ms)
= 4000t u(t) − 4000t u(t − 3 ms) V. (5.109)
0
iL(t) = i1 + i
2
1
2
3
4
5
6
t (ms)
i2(t)
−100
(c) iL(t) = i1(t) + i2(t)
Figure 5-39: Circuit and associated plot for Example 5-14.
(b) For t ≥ 0, the KVL loop equation is given by
−υs + RiL + L
diL
= 0,
dt
which can be rearranged into the form
diL
υs
+ aiL = ,
dt
L
(5.110)
292
CHAPTER 5
where a = R/L. Since υs (t) is composed of two components,
we will write iL (t) as the sum of two components,
iL (t) = i1 (t) + i2 (t),
(5.111)
where i1(t) is the solution of Eq. (5.110) with υs = 4000t u(t)
acting alone and i2(t) is the solution of Eq. (5.110) with
υs = −4000t u(t − 3 ms) acting alone. That is,
4t
di1
+ ai1 =
= bt
dt
L
for t ≥ 0
(5.112a)
for t ≥ 3 ms
(5.112b)
and
−4t
di2
+ ai2 =
= −bt
dt
L
�
We start by multiplying both sides of Eq. (5.112a) by eat and
then integrating from 0 to t:
e
�
di1
�
+ ai1 eat
�
dt
at �
0
Equations (5.112a) and (5.112b) are identical in form, except
for two important differences:
(1) The forcing function for i1 (t) is bt whereas the forcing
function for i2 (t) is −bt.
(2) The temporal domain of applicability for i2 (t) starts at
t = 3 ms, instead of at t = 0.
Hence, Eq. (5.116) can be adapted to i2 by replacing b with −b
and changing the lower limit of integration to 3 ms, which gives
�
� �t
i2 eat �
which leads to
Current i1 (t) alone
�t �
Current i2 (t) alone
3 ms
with b = 4000/L.
dt =
�t
dt � =
�t �
�
� at �
bt e
�
(5.113)
dt .
0
RC AND RL FIRST-ORDER CIRCUITS
=
�t
−b at � �
�
e
(at
−
1)
,
�
3 ms
a2
(5.119)
i2 (t) eat − i2 (3 ms) e0.003a
=−
b at
[e (at − 1) − e0.003a (0.003a − 1)].
a2
(5.120)
When we apply superposition, we apply the same initial
condition to both RL circuits (corresponding to the two
components of υs (t)). Thus, i1 (0) = i2 (3 ms) = 0, and
Eq. (5.120) simplifies to
For the left-hand side,
�t �
eat
0
�
di1
�
+ ai1 eat
dt �
�
0
�
d
�
(i1 eat ) dt �
dt �
�
� �t
= i1 eat � ,
0
and for the right-hand side,
�t
� at �
bt e
0
�t
�
b at � �
dt = 2 e (at − 1)�� .
a
0
�
(5.114)
(5.115)
In view of Eqs. (5.114) and (5.115), Eq. (5.113) becomes
�t
�
�
b
� �t
�
(5.116)
i1 eat � = 2 eat (at � − 1)�� ,
0
a
0
which leads to
at
i1 (t) e − i1 (0) =
b
a2
at
[e (at − 1) + 1].
(5.117)
Given that i1(0) = 0, the expression for i1(t) becomes
i1 (t) =
b
[(at − 1) + e−at ]
a2
(for t ≥ 0).
(5.118)
i2 (t) = −
b
[(at − 1) − (0.003a − 1)e−a(t−0.003) ]
a2
(for t ≥ 3 ms).
(5.121)
Total solution for iL (t)
For R = 250 � and L = 0.5 H,
a = R/L = 500,
b = 4/L = 8, and
�
for 0 ≤ t ≤ 3 ms,
i1 (t)
iL (t) =
i1(t) + i2(t) for t ≥ 3 ms,
⎧
32[(500t − 1) + e−500t ] mA
⎪
⎪
⎪
⎨
for 0 ≤ t <3 ms
(5.122)
= 103.7e−500t mA
⎪
⎪
⎪
⎩
for t ≥ 3 ms.
Figure 5-39(c) displays a plot of iL (t) versus t.
Concept Question 5-22: Compare Eq. (5.96) with
Eq. (5.107) to draw an analogy between RC and RL
circuits. υC, R, and C of the RC circuit correspond to
which parameters of the RL circuit? (See
)
TECHNOLOGY BRIEF 13: HARD DISK DRIVES (HDD)
Technology Brief 13
Hard Disk Drives (HDD)
Although invented in 1956, the hard disk drive (HDD)
arguably is still the most commonly used data-storage
device among nonvolatile storage media available today. It
is the availability of vast amounts of relatively inexpensive
hard-drive space that has made search engines, webmail,
and online games possible. Over the past 40 years,
improvements in HDD technology have led to huge
increases in storage density, which are simultaneous with
the significant reduction in physical size. The term hard
disk or hard drive evolved from common usage as a
means to distinguish these devices from flexible (floppy)
disk drives.
HDD Operation
Hard drives make use of magnetic material to read and
write data. A nonmagnetic disc ranging in diameter from
36 to 146 mm is coated with a thin film of magnetic
material, such as an iron or cobalt alloy. When a strong
magnetic field is applied across a small area of the disc, it
causes the atoms in that area to align along the orientation
of the field, providing the mechanism for writing bits of
data onto the disc (Fig. TF13-1). Conversely, by detecting
the aligned field, data can be read back from the disc. The
hard drive is equipped with an arm that can be moved
across the surface of the disc (Fig. TF13-2), and the disc
itself is spun around to make all of the magnetic surface
accessible to the writing or reading heads. The reading
293
and writing elements are physically moved along the
radius of the disk by using a magnet with a coil wrapped
around it. When current is driven into the coil, it produces
a magnetic force that moves the actuator. Because writing
onto or reading from the magnetized surface can be
performed very rapidly (fraction of a microsecond), hard
drives are spun at very high speeds (5,000 to 15,000
rpm) when directed to record or retrieve information.
Amazingly, hard-drive heads usually hover at a height of
about 25 nm above the surface of the magnetic disc while
the disc is spinning at such high speeds! The extremely
small gap between the head and the disc is maintained
by having the head “ride” on a thin cushion of air trapped
between the head and the surface of the spinning disc.
To prevent accidental scratches, the disc is coated with
carbon- or Teflon-like materials.
Hard drives are packaged carefully to prevent dust and
other airborne particles from interfering with the drive’s
operation. In combination with the air motion caused by
the spinning disc, a very fine air filter is used to keep
dust out while maintaining the air pressure necessary
to cushion the spinning discs. Hard drives intended for
operation at high altitudes (or low air pressure) are sealed
hermetically so as to make them airtight.
Modern Drive Technology
Early hard drives performed read and write operations
by using an inductor coil placed at the tip of the head.
When electric current is made to flow through the coil,
the coil induces a magnetic field which in turn aligns the
Standard Magnetic Recording
Spindle
Actuator arm
Perpendicular Magnetic Recording
Heads
Figure TF13-2: Close-up of a disassembled hard drive
Figure TF13-1: Longitudinal and perpendicular writing
techniques.
showing the magnetic discs mounted on a spindle and an
actuator arm. The head sits at the end of the arm and
performs the read/write operations as the disc spins.
Recent Developments
A new wave of developments is pushing hard drives into
the tens of terabytes. Already in commercial use is shingled magnetic recording (SMR). Conventional drives
write bits in parallel rows Fig. TF13-3(a)), usually with
a slight gap between them. Making the individual track
width smaller is extremely difficult because, as mentioned
above, very small magentic grains are not stable (or,
conversely, to make very small grains stable makes them
very hard to read/write with a magnetic head). The SMR
solution (Fig. TF13-3(b)) is to lay bits down in overlapping
tracks, exactly like roof shingles (where each shingle row
Track n
Track n + 1
Track n + 2
Track pitch
Cross track
Down track
(direction of rotation)
Writer and reader
gap widths
(a) Schematic of conventional magnetic recording
Track n
Track n + 1
Track n + 2
Band A
atoms of the magnetic material (i.e., a write operation).
The same coil also is used to detect the presence of
aligned atoms, thereby providing the read operation. The
many major developments that shaped the evolution of
read/write heads over the past 50 years have introduced
two major differences between the modern hard-drive
heads and the original models. Instead of using the same
head for both reading and writing, separate heads are
now used for the two operations. Furthermore, the writing
operation is now carried out with a lithographically defined
thin-film head, thereby reducing the feature size of the
head by several orders of magnitude. The feature size
is the area occupied by a single bit on the disc surface,
which is determined in part by the size of the write head.
Decreasing feature size leads to increased recording
density. The read operation—housed separately next
to the write head—uses a magnetoresistive material
whose resistance changes when exposed to a magnetic
field—even when the field intensity is exceedingly
small. In modern hard drives, high magnetoresistive
sensitivities are realized through the application of either
the giant magnetoresistance (GMR) phenomena or the
tunneling magnetoresistance (TMR) effect exhibited
by certain materials. The 2007 Nobel prize in physics
was awarded to Albert Fert and Peter Grünberg for their
discovery of GMR. A consequence of the extremely small
size of the magnetic bits (each bit in a 100-Gb/in2 disc is
about 40 nm long) is that temperature variations can lead
to loss of information over time. One method developed to
combat this issue is to use two magnetic layers separated
by a thin (∼ 1 nm) insulator, which increases the stability of
the stored bit. Another recent innovation that is already in
production involves the use of perpendicular magnetic
recording (PMR) as illustrated in Fig. TF13-1. PMR
makes it possible to align bits more compactly next to
each other.
TECHNOLOGY BRIEF 13: HARD DISK DRIVES (HDD)
Track n + 3
Track n + 4
Track n + 5
Band B
294
(b) Schematic of shingled magnetic recording
FigureTF13-3: Schematics of (a) conventional magnetic
recording and (b) shingled magnetic recording with two
3-track bands.
sits slightly on top of one adjacent row and slightly below
the other). The advantage is that the size of the track
(and hence, the grain), does not change but the overall
density increases. This works because a magnetic head
can still read the state of the magentic grain even if it
slightly overlapped with a nearby grain. The difficulty of
this method is that the writing process slows down since
every time we write to one of the overlapped rows, we
must also rewrite the neighboring rows. The tracks are
organized into bands (Fig. TF13-3(b)) and each band is
thus rewritten as needed. Coordinating this write activity
can be handled in firmware on the drive itself or in the
computer’s operating system (if it has the appropriate
driver to handle such drives).
A variety of other techniques (including the GMR heads
discussed above) are being explored to increase areal
density; in general, these focus on allowing smaller grains
by making them harder to write magnetically (which
makes them consequently more temperature stable).
Among these are heat-assisted, microwave-assisted and
patterning single-grain (or close to single-grain) isolated
magnetic islands (instead of a continuous magnetic thin
film); this is known as bit-patterned media (BPM). It
is estimated that techniques such as these will enable
densities on the order of 1–10 Tb/in2 in the next decade.
5-6
RC OP-AMP CIRCUITS
295
RC Integrator
Concept Question 5-23: Suppose the switch in the circuit
of Fig. 5-36(a) had been open for a long time, and then
it was closed suddenly. Will Is initially flow through R
or L? (See
)
υC = υout i
C
_
+
iR
_
υn
Exercise 5-16: Determine i1 (t) and i2 (t) for t ≥ 0
given that, in the circuit of Fig. E5.16, L1 = 6 mH,
L2 = 12 mH, and R = 2 �. Assume
−
in = 0
R
υi
υp
+
_
C
υout
+
RL
−
i1 (0 ) = i2 (0 ) = 0.
Figure 5-40: Integrator circuit.
i1
t=0
1.8 A
R
i2
L1
L2
Figure E5.16
Answer: i1(t) = 1.2(1
− e−500t ) u(t) A,
i2(t) = 0.6(1 − e−500t ) u(t) A. (See
5-6
The ideal op-amp model has two constraints. The voltage
constraint states that υp = υn , and since υp = 0 in the circuit of
Fig. 5-40, it follows that υn = 0. Hence, the current iR flowing
through R is given by
iR =
C3
)
5-6.1 Ideal Op-Amp Integrator
The circuit shown in Fig. 5-40 resembles the standard invertingamplifier circuit of Section 4-4, except that its feedback
resistor Rf has been replaced with a capacitor C, converting
it into an op-amp integrator. As we show shortly:
The output voltage υout of the RC integrator circuit
is directly proportional to the time integral of the input
signal υi . (5.123)
Given that υn = 0, the voltage υC across C is simply υout , and
the current flowing through it is
RC Op-Amp Circuits
Adding capacitors and inductors to resistive circuits vastly
expands their utility and versatility. In this section, we
consider a few examples of circuits in which capacitors are
used in conjunction with op amps to perform integration,
differentiation, and related operations. Even though these
specific functions also can be realized through the use of
inductors, capacitors are usually the preferred option (whenever
such a choice is possible) because of their smaller physical size
and availability in planar form.
υi
.
R
iC = C
dυout
.
dt
(5.124)
At node υn ,
iR + iC − in = 0.
(5.125)
iC = −iR
(5.126)
In view of the second op-amp constraint, namely in = ip = 0,
it follows that
or
1
dυout
(5.127)
=−
υi .
dt
RC
Upon integrating both sides of Eq. (5.127) from an initial
reference time t0 to time t, we have
t t0
dυout
dt �
dt � = −
1
RC
t
υi dt � ,
(5.128)
t0
which leads to
1
υout (t) = −
RC
t
t0
υi (t � ) dt � + υout (t0 ).
(5.129)
296
CHAPTER 5
Time t0 is the time at which the integration process begins, and
υout (t0 ) is the initial voltage across the capacitor at that instant
in time. Thus, according to Eq. (5.129), the output voltage
(which is also the voltage across the capacitor) is equal to
whatever voltage existed across the capacitor at the start of the
integration process, υout (t0 ), incremented by an amount equal
to the integrated value of the input voltage (from t0 to present
time t) and multiplied by a (negative) scaling factor (−1/RC).
RC AND RL FIRST-ORDER CIRCUITS
υi (V)
Input
3
−3
0
1 2
3 4
5
6
t (s)
(a)
υout (V)
Since the magnitude of the output voltage, |υout |, cannot
exceed the supply voltage Vcc , the values of R and C have
to be chosen carefully so as to avoid saturating the op
amp. 12
Output when Vcc = 14 V
6
If the time scale can be conveniently chosen such that the
initial reference time t0 = 0 and the capacitor was uncharged at
that point in time (i.e., υout (0) = 0), then Eq. (5.129) simplifies
to
−6
0
1
2
3
4
5
6
t (s)
−12
(b)
υout (t) = −
1
RC
t
0
υi (t � ) dt � (if υout (0) = 0).
υout (V)
(5.130)
12
Output when Vcc = 9 V
6
Example 5-15: Square-Wave Input Signal
The square-wave signal shown in Fig. 5-41(a) is applied at
the input of an ideal integrator circuit with an initial capacitor
voltage of zero at t = 0. If R = 200 k� and C = 2.5 μF,
determine the waveform of the corresponding output voltage
for an amp with (a) Vcc = 14 V and (b) Vcc = 9 V.
Solution: (a) The scaling factor is given by
−
−6
−9
−12
0
1
2
3
4
5
6
t (s)
Clipped output
(c)
Figure 5-41: Example 5-15 (a) input signal, (b) output signal
with no op-amp saturation, and (c) output signal with op-amp
saturation at −9 V.
1
1
= −2 s−1 .
=−
RC
2 × 105 × 2.5 × 10−6
For the time period 0 ≤ t ≤ 2 s (first half of the first cycle),
υout (t) = −2
t
0
υi dt � = −2
t
0
3 dt � = −6t V
(0 ≤ t ≤ 2 s),
which is represented by the first ramp function shown in
Fig. 5-41(b). The polarity reversal of υi during the second half
of the first cycle causes the energy that had been stored in the
capacitor to be discharged, concluding the cycle with no net
voltage across the capacitor. The process then is repeated during
succeeding cycles.
We note that because |υout | never exceeds |Vcc | = 14 V, no
saturation occurs in the op amp.
(b) For the op amp with Vcc = 9 V, the waveform shown in
Fig. 5-41(c) is the same as that in Fig. 5-41(b), except that it is
clipped at −9 V.
5-6
RC OP-AMP CIRCUITS
297
RC Differentiator
R
iC
C
in = 0
υn
υi
υp
+
_
Example 5-16: Pulse Response of an Op-Amp Circuit
iR
_
υout
+
Solution: One possible approach to solving the problem is
to analyze the circuit twice—once for the duration of the pulse
(0 to 0.3 s) and a second time for t > 0.3 s. An alternative
approach is to synthesize the rectangular pulse as the sum of
two step functions, to seek an independent solution for each
step function, and then to add up the solutions (superposition).
We will illustrate both methods.
RL
Figure 5-42: Differentiator circuit.
5-6.2
The op-amp circuit shown in Fig. 5-43(a) is subjected to an
input pulse of amplitude Vs = 2.4 V and duration T0 = 0.3 s.
Determine and plot the output voltage υout (t) for t ≥ 0,
assuming that the capacitor was uncharged before t = 0.
(a) Method 1: Two Time Segments
Ideal Op Amp Differentiator
The integrator circuit of Fig. 5-40 can be converted into the
differentiator circuit of Fig. 5-42 by simply interchanging the
locations of R and C. For the differentiator circuit, application
of the voltage and current constraints leads to
Time Segment 1: 0 ≤ t ≤ 0.3 s, and υi = Vs = 2.4 V.
At node υn ,
i1 + i2 + i3 = 0,
or, using the node voltage method,
dυi
,
iC = C
dt
υout
iR =
,
R
and
iC = −iR .
d
υn − υout1
υn − Vs
+C
= 0,
(υn − υout1 ) +
R1
dt
R2
Consequently,
υout = −RC
dυi
,
dt
(5.131)
where υout1 is the output voltage during time segment 1.
Since υp = 0, injection of the ideal op-amp voltage constraint
υp = υn leads to
which states that:
The output voltage of the differentiator circuit is
proportional directly to the time derivative of its input
voltage υi , and the proportionality factor is (−RC). The
differentiator circuit performs the inverse function of that
performed by the integrator circuit. 5-6.3
Other Op-Amp Circuits
The relative ease with which we were able to develop input–
output relationships for the ideal integrator and differentiator
circuits is attributed (at least in part) to the relative simplicity of
those circuits. Aside from the load resistor RL (which exercised
no influence on the solutions), the circuits in Figs. 5-40 and
5-42 consisted each of one resistor and one capacitor. Now,
through two examples, we demonstrate ways to approach the
analysis of RC op-amp circuits that may have more complicated
architectures.
C
Vs
υout1
dυout1
=− ,
+
dt
R2
R1
which can be cast in the standard first-order differentialequation form given by
dυout1
+ aυout1 = b,
dt
(5.132)
where
a=
1
,
R2 C
and
b=−
Vs
.
R1 C
Equation (5.132) is analogous to Eq. (5.88), so its solution is
analogous to that given by Eq. (5.94), namely
b
(1 − e−at )
a
V s R2
−
(1 − e−t/τ ),
R1
υout1 (t) = υout1 (0) e−at +
= υout1 (0) e−t/τ
(5.133)
298
CHAPTER 5
RC AND RL FIRST-ORDER CIRCUITS
R2 = 10 kΩ
in = 0
R1 = 2 kΩ
Vs
i1 υn
υp
+
_
υi(t) =
t=0
C = 25 μF
i2
i3
+υC_
_
υout
+
t = 0.3 s
(a) Op-amp circuit
υout (V)
0
0
0.3
0.5
1
1.5
2
t (s)
−2
Capacitor discharging
−4
−6
−8
−10
Capacitor building up charge
(b) υout(t)
Figure 5-43: Op-amp circuit of Example 5-16.
where
1
τ = = R2 C = 0.25 s.
a
Given that υn = 0, it is evident from the circuit in Fig. 5-43(a)
that
υout1 = −υC1 ,
where υC1 is the voltage across the capacitor during the first
time segment. According to the problem statement, the initial
condition υC1 (0− ) = 0, and since the voltage across a capacitor
cannot change instantaneously, it follows that
υout1 (0) = −υC1 (0) = −υC1 (0− ) = 0.
Upon incorporating this piece of information into our solution,
we have the natural response
υout1 (t) = −
Vs R2
(1 − e−t/τ )
R1
= −12(1 − e−4t ) V
(for 0 ≤ t ≤ 0.3 s). (5.134)
Time Segment 2: t > 0.3 s, and υi = 0.
The form of the solution for this time segment is the same as
that given by Eq. (5.133) for the preceding time segment, except
for three modifications:
(a) The input voltage is now zero, so we should set Vs = 0.
5-6
RC OP-AMP CIRCUITS
299
(b) The time variable t should be replaced with (t − 0.3 s) to
reflect the fact that our starting (reference) time is t = 0.3 s,
not t = 0.
(c) The initial voltage υout2 (0.3 s) is not zero (because the
capacitor had been building up charge during the previous
time segment).
Hence, for time segment 2, υout2 is given by
υout2 (t) = υout2 (0.3) e
−4(t−0.3)
(for t > 0.3 s).
The initial voltage υout2 (0.3) is equal to the voltage that existed
during the previous time segment at t = 0.3 s. Hence,
υout2 (0.3) = υout1 (0.3) = −12(1 − e
−4×0.3
) = −8.4 V.
Hence,
υout2 (t) = −8.4e−4(t−0.3 s) V
(for t > 0.3 s).
(5.135)
The combined output response to the input pulse is displayed
in Fig. 5-43(b).
(b) Method 2: Two Step Functions
In view of the definition of the step function, the complete
solution is given by
υout (t) = υouta (t) + υoutb (t)
for 0 ≤ t ≤ 0.3 s
υouta (t)
=
υouta (t) + υoutb (t) for t > 0.3 s.
It is a relatively straightforward exercise to demonstrate that the
two methods do indeed provide the same solution.
Example 5-17: Op-Amp Circuit with Output Capacitor
Determine υC (t), the voltage across the capacitor in
Fig. 5-44(a), given that υi (t) = 3u(t) V, the capacitor
had no charge on it prior to t = 0, R1 = 1 k�, R2 = 15 k�,
R3 = 30 k�, R4 = 12 k�, R5 = 24 k�, and C = 50 μF.
Solution: The capacitor is on the output (load) side of the
op amp, so one possible approach to solving the problem is to
(a) temporarily replace the capacitor with an open circuit;
(b) determine the Thévenin equivalent circuit at terminals
(a, b); and
(c) reinsert the capacitor as in Fig. 5-44(c) and analyze the
circuit.
By modeling the rectangular pulse as
υi (t) = Vs [u(t) − u(t − 0.3 s)],
(5.136)
To that end, we start by relating υout to υi . Given that for the
ideal op amp υn = υp and ip = 0, it follows that
we can develop a generic solution to a step-function input and
then use it to find
υout (t) = υouta (t) + υoutb (t).
We will treat the two step functions as two independent sources,
and we will apply the same initial-condition information to both
cases; that is, when treating the case of the second step function,
we do so as if the first step function had never existed.
To that end, the response of the first step function is given by
Eq. (5.134) as
υouta (t) = −12(1 − e−4t ) u(t) V
(5.139)
(for t ≥ 0). (5.137)
Similarly, after reversing the polarity of Vs and incorporating a
time delay of 0.3 s,
υoutb (t) = 12(1−e−4(t−0.3) ) u(t −0.3) V
(for t ≥ 0.3 s).
(5.138)
υn = υp = υi .
Moreover, since in = 0, υn and υout are related by a voltage
divider between nodes c and d:
R2 + R3
R2 + R3
υn =
υi .
υout =
R2
R2
With the capacitor removed, the Thévenin voltage across
terminals (a, b) in Fig. 5-44(a) is equal to the voltage across R5 ,
which is related to υout by the voltage-division rule
υTh =
R5
R4 + R 5
υout
R5
R2 + R3
υi
R4 + R 5
R2
24
15 + 30
=
× 3 = 6u(t) V
12 + 24
15
=
(for t ≥ 0).
300
CHAPTER 5
R1
υp ip = 0
υn in = 0
(a) Op-amp circuit
υi = 3 u(t)
+
_
+
RC AND RL FIRST-ORDER CIRCUITS
R4
c υout
_
a
R3
R5
R2
υp = υn
R4
c
R3
Ro
R2
a
b
RTh
υTh = 6u(t)
RTh
R5
d
(c) Equivalent circuit
+
υ
_C
b
d
(b) Relevant circuit for finding RTh , with op amp
replaced with its output resistance Ro
C
+
_
a
C
b
+
υ
_ C
Figure 5-44: Circuit for Example 5-17.
Our next task is to determine the value of RTh . To that end,
we set υi = 0. Consequently, υp − υn = 0, in which case the
op-amp’s equivalent circuit at terminals (c, d) consists of only
its output resistance R0 . Figure 5-44(b) contains the relevant
part of the overall circuit seen by terminals (a, b). For the real
op amp, R0 is on the order of 10 to 100 �, which is at least two
orders of magnitude smaller than any of the other resistors in the
circuit, lending justification to the ideal op-amp model which
sets R0 = 0 (thereby shorting out (R2 + R3 )). Consequently,
RTh = R4 � R5 =
R 4 R5
12 × 24
=
= 8 k�.
R4 + R 5
12 + 24
With υTh and RTh known, we now have a circuit (Fig. 5-44(c))
that resembles the step-function circuit of Fig. 5-30(a). Its
solution is given by Eq. (5.97) using Vs1 = 0 and Vs2 = Vs ,
namely
υC (t) = Vs (1 − e−t/τ ).
In the present case, Vs = υTh = 6 V, and
τ = RTh C = 8 × 103 × 50 × 10−6 = 0.4 s.
The capacitor response is therefore given by
υC (t) = 6(1 − e−2.5t ) u(t) V.
Example 5-18: Differential Equation Solver
Design an op-amp circuit whose output is the solution of the
differential equation
d 2υ
dυ
+8
+ 2υ = 4υs (t),
dt 2
dt
where υs (t) is a sinusoidal source given by
υs (t) = 3 sin(200t) u(t).
(5.140)
TECHNOLOGY BRIEF 14: CAPACITIVE SENSORS
Technology Brief 14
Capacitive Sensors
Capacitive sensors are used to convert information from
the real world to a change in capacitance that can be
detected by an electric circuit. Even though capacitors
can assume many different shapes, the basic concepts
can be easily explained using the shape and properties
of the parallel plate capacitor, for which the capacitance
C is given by
εA
C=
,
d
where ε is the permittivity of the material between the
plates, A is the area of each plate, and d is the spacing
between the plates. So, most capacitive sensors operate
by measuring the change in one or more of these three
basic parameters, in response to external physical stimuli.
Let us examine each one of these three parameters separately and how it can be used to measure external stimuli.
Applications Based on Change in Permittivity ε
The electrical permittivity ε of a given material is an
inherent property of that material; its value is dictated
Table TT14-1: Relative permittivity εr of common
materials.a
ε = εr ε0 and ε0 = 8.854 × 10−12 F/m
Material
Vacuum
Air (at sea level)
Low Permittivity Materials
Styrofoam
Teflon
Petroleum oil
Wood (dry)
Paraffin
Polyethylene
Polystyrene
Paper
Rubber
Plexiglass
Glass
Quartz
Water
Biological Materials
a These
Relative
Permittivity, εr
1
1.0006
1.03
2.1
2.1
1.5–4
2.2
2.25
2.6
2–4
2.2–4.1
3.4
4.5–10
3.8–5
72–80
40–70
are at room temperature (20 ◦ C).
301
by the polarization behavior of that material’s molecular
structure, relative to the absence of polarizability (as
in free space or vacuum). In free space, ε = ε0 =
8.854 × 10−12 F/m, and for all other media, it is convenient
to express the permittivity of a material relative to that
for free space through the relative permittivity εr = ε/ε0 .
Table TT14-1 provides a list for various types of materials.
We note that for plastic, glass, and most ceramics, εr is in
the range between 2 and 4, which makes them different
(electrically) from air (εr = 1 for air), but not markedly so.
In contrast, water-based materials—such as biological
materials or parts of the body—have an εr in the range of
60–80, making them electrically very different from both
air and dry materials. This means that their presence
can be easily detected by a capacitive sensor, which is
the basis of capacitive touchscreens, fluid and moisture
meters, and some proximity meters.
Capacitive Touch Buttons
An example of a capacitive touch sensor is shown in
Fig. TF14-1. The capacitor has two conducting surfaces
labeled sensor pad and ground hatch. In general,
the two conductors are separated either vertically or
horizontally, and covered with a layer of glass or plastic.
By applying a voltage source (supplied by the printed
circuit board) between the conducting surfaces, electric
field lines get established between them. When no finger
(or a capacitive stylus) is present near the sensor pad, the
electric field lines flow through the glass or plastic cover,
but when in the proximity of a finger, the electric field lines
pass partially through the finger, and since the finger
has a relative permittivity comparable to that of water, its
Overlay
Ground hatch
Sensor pad Ground hatch
PC board
Figure TF14-1: A capacitive touch sensor uses the high
permittivity of the finger to change the capacitance. The
finger does not need to come in direct contact with the
sensor in order to be detected.
302
TECHNOLOGY BRIEF 14: CAPACITIVE SENSORS
Contact pad
Sensing film
Alumina substrate
Interdigitated electrode
Figure TF14-2: Interdigitated humidity sensor. (Credit:
Hygrometrix.)
proximity changes the overall capacitance of the circuit.
The electric field starts on one of the conductors and
ends on the other, basically making an arc between them.
When the finger comes near either one or both of the two
conductors, it changes this field (note the electric field
arrow pointing straight up at the finger, which would not
be there without the finger), and this in turn changes the
capacitance. Another way to think about the process is in
terms of the electric charge stored at the two conductors.
The presence of the finger changes the effective
permittivity of the medium through which the electric field
lines flow, thereby changing the effective capacitance C.
Since for any capacitor, C = Q/V —where Q is the
charge on the conductor connected to the positive
terminal of the voltage source and V is the voltage of
the source—it follows that increasing C leads to an
increase in Q (with V remaining constant). Hence, when
the finger approaches the sensor pad, additional charge
accumulates at the two conductors (with more +Q at the
sensor pad and a corresponding −Q at the ground hatch).
Humidity Sensor
Another example of a capacitive sensor that also relies
on measuring the change in permittivity is the humidity
sensor featured in Fig. TF14-2. A sensing film absorbs
moisture from the air, thereby changing the capacitance
of the interdigitated line in proportion to the humidity in
the air surrounding the sensor.
“Seeing” through Walls
The capacitive sensing technique also is used to “see”
inside boxes, through walls, or through basically any
low-conductivity low-permittivity material (paper, plastic,
glass, etc.). An example is illustrated in Fig. TF14-3, in
which a capacitive sensor on an assembly line is used
to determine if a metal object is placed inside a box. The
Figure TF14-3: Capacitive proximity sensors can
“see” through low permittivity materials such as paper,
cardboard, plastic, and glass and detect objects composed
of a wide variety of materials including metals, fluids, etc.
Here, a capacitive sensor detects the contents of a box.
(Graphic courtesy of Balluff.)
object does not have to be metal, but its permittivity has to
be significantly different from that of the paper or plastic
enclosure. A similar application of capacitive sensors is
to locate wooden studs through plaster walls.
Fluid Gauge
Capacitive sensors can serve as fluid gauges by
measuring the height of a fluid in a tank or reservoir.
Examples include gasoline and oil level gauges used in
cars. If the tank is made of plastic or glass, metal strips
on the outside of the tank can determine the height of the
fluid without having to make contact with the fluid. This
is very useful when the fluid is caustic or sterile. If the
tank is metal, the strips must be placed inside. In either
case, the sensor consists of two capacitors, one (C2 in
Fig. TF14-4) with metal plates separated by a reference
fluid, and another (C1 ) in which the fluid level is a variable.
If the permittivity of the fluid is ε and the height of the fluid
in the upper container in Fig. TF14-4 is h, the ratio of the
two capacitances is given by
C1
= ah + b,
C2
where a and b are known constants related to ε and the
dimensions of the two capacitors. Hence, by measuring
the two capacitances with an external circuit, the sensor
provides a direct measurement of the fluid height h.
TECHNOLOGY BRIEF 14: CAPACITIVE SENSORS
303
C1
d
Air
C1
Variable
ε
h
L
h0
C2
Figure TF14-4: Fluid height can be measured from the
outside of a plastic or glass tank using a pair of parallel
plate capacitors on the outside of the tank.
C = ε0 εr
a×b
d
Pressure
Transducer
x
L
Figure TF14-6: Capacitance is proportional to overlap
area A = W (L − x), so when plates slide past each other
the capacitance decreases in proportion to the shifted
distance x.
ε
C2
Reference
x
W
Data
Figure TF14-5: Capactive transducer responding to
pressure from a sound wave.
Applications Based on Change in Area A
The change in the effective area common to the two
conducting surfaces can also change the capacitance C.
If one plate is slid past the other in Fig. TF14-6, the
effective area A changes as a function of the shifted
distance x. The capacitance is maximum when they are
perfectly lined up, corresponding to x = 0, and changes
approximately linearly as (L − x). This can be used to
align two objects, or to determine any other manual
displacement in either one or two directions. The MEMS
capacitive vibration sensor shown in Fig.TF14-7 uses two
interdigital electrodes, one static and another moveable.
When mounted in a car, for example, car acceleration or
deceleration causes the moveable electrode to respond
accordingly, which changes the capacitance between the
two electrodes, thereby providing the means to measure
acceleration. Such a sensor is called an accelerometer.
Applications Based on Change in
Inter-Conductor Distance d
As noted earlier, the capacitance C is inversely
proportional to the distance d between the two
conductors. This dependence can be used to measure
pressure, as illustrated by the diagram in Fig. TF14-5.
We call such a sensor an electrical transducer because
it converts one type of energy (mechanical) into another
(electrical). The capacitor has one stationary conducting
plate on the back side and a flexible conducting
membrane on the side exposed to the incident pressure
carried by an acoustic wave. The sound wave causes the
membrane to vibrate, thereby changing the capacitance,
which is measured and processed by an external circuit.
This type of capacitive transducer is used in numerous
industrial applications.
FigureTF14-7: Microelectromechanical system (MEMS)
vibration sensor using interdigitated static and movable
electrodes. (Credit: STMicroelectronics.)
304
CHAPTER 5
The step function u(t) denotes that the source is connected to
the circuit at t = 0. In your circuit, you may use a sinusoidal
source of any amplitude and angular frequency.
combined by a weighted op-amp summer in which the gains
can be adjusted to obtain the desired output υ.
In Fig. 5-45, υ is the output of op amp 4, as well as the
input to op amp 1, which is a differentiator with a gain factor of
−RC = −1 (the values of R and C are selected such that their
product is 1). The output of op amp 1 is simply −υ � . When followed by a second differentiator (op amp 2), we obtain υ �� . Op
amp 3 serves as an inverter with gain of −1. Finally, op amp 4 is
a summing amplifier that performs the sum of all three terms in
Eq. (5.141). The values of the resistors preceding the summing
point at the input to op amp 4 are selected to provide the correct
weights, namely (6R/12R) = 1/2 for υ �� , (6R/1.5R) = 4
for υ � , and (6R/R) = 6 for the sinusoidal source. The switch
serves to initiate the process at t = 0. Prior to that, υ = 0. To
avoid saturation, the supply voltage Vcc of each op amp should
exceed the maximum possible voltage at its output.
If one were to construct the circuit and close the switch, the
voltage υ(t) observed at the output of op amp 4 would be the
same solution we would obtain were we to solve the differential
equation analytically.
Solution: Using op amps, multiple circuit configurations can
be constructed to solve the given differential equation. One such
configuration is shown in Fig. 5-45. If in Eq. (5.140) we denote
dυ/dt = υ � and d 2 υ/dt 2 = υ �� and then solve for υ, we have
1 ��
υ − 4υ � + 2υs (t)
2
1
= − υ �� − 4υ � + 6 sin(200t) u(t).
2
RC AND RL FIRST-ORDER CIRCUITS
υ=−
(5.141)
One approach for designing this circuit is to realize that the
output must be υ, and somehow within the circuit we will also
need υ � and υ �� . We can design a differentiator with a gain of
1 and feed in the υ (output), and then feed that into a second
differentiator to get υ �� . The values of υ � , υ �� , and υs can be
R
R
C
υ
_
Op
Amp 1
6R
−υ′
C
_
Op
Amp 2
+
+
12R
υ′′
Summing
point
_
Op
Amp 4
+
Differentiator
Gain = −1
Differentiator
Summer
R
1
R
RC = 1
Gain = −1
υ = − 2 υ′′ − 4υ′ + 6 sin(200t)
_
Op
Amp 3
+
1.5R
υ ≤ Vcc
υ′
Inverter
Gain = −1
_ sin(200t)
R
t=0
Figure 5-45: Op-amp circuit whose output υ(t) is a solution to υ �� + 8υ � + 2υ = 12 sin(200t) u(t).
υ
5-7 APPLICATION NOTE: PARASITIC CAPACITANCE AND COMPUTER PROCESSOR SPEED
Concept Question 5-24: What causes clipping of the
waveform at the output of an op-amp integrator circuit?
Can clipping occur at the output of a differentiator circuit?
(See
)
Concept Question 5-25: If υs (t) is the input signal to
a two-stage op-amp circuit with the first stage being an
integrator with R1C1 = 0.01 s and the second stage
being a differentiator with R2C2 = 0.01 s, under what
circumstances will the output waveform υout (t) be the
same or different from υs(t)? (See
)
Exercise 5-17: The input signal to an ideal integrator
circuit with RC = 2 × 10−3 s and Vcc = 15 V is given
by υs(t) = 2 sin 100t V. What is υout (t)?
Answer: υout (t) = 10[cos(100t) − 1] V. (See
C3
)
5-7 Application Note: Parasitic
Capacitance and Computer
Processor Speed
As was noted in Section 4-11 and in Technology Brief 10, the
primary computational element in modern computer processors
is the CMOS transistor. How quickly a single logic gate is able
to switch its output between logic states 0 and 1 determines
how fast the entire processor can perform complex calculations.
Figure 5-46(a) displays a sample of a digital sequence, perhaps
at the output of a digital inverter. The individual pulses, each
denoting a logic state of 0 or 1, are each of duration T . If it were
possible to switch between states instantaneously, the maximum
number of pulses that can be sequenced per 1 second is 1/T .
We refer to this rate by several names, including the pulse
repetition frequency, switching frequency, and clock speed.
In the present case, we shall call it the switching frequency and
assign it the symbol fs . That is,
fs =
Exercise 5-18: Repeat Exercise 5-17 for a differentiator
instead of an integrator.
Answer: υout (t) = −0.4 cos 100t V. (See
C
)
305
1
T
(Hz).
(5.142)
So if T = 1 ns, fs = 1/10−9 = 1 GHz, and if we can make
the pulse duration narrower, we can increase fs accordingly.
Vout
VDD
(a) Pulses
1 0 1
0
Logic state 1
Logic state 0
T
t
Vout
VDD
0
State 1
trise
T
State 0
tfall
t
(b) Expanded view
Figure 5-46: Pulse sequence.
306
CHAPTER 5
Such a conclusion would be true if we can indeed arrange to
have the logic circuit switch between states instantaneously,
but it cannot. In Fig. 5-46(b), we show an expanded view of
three pulses representing the sequence 101. We observe that the
switching process is represented by ramp functions (rather than
step functions) and it takes a finite amount of time for the voltage
to change between a 0 state and a 1 state, which we shall call
the rise time trise . Similarly, the fall time between states 1 and 0
is tfall . [The linear rise and fall responses are actually artifacts
of certain simplifying assumptions. In general, the responses
involve exponentials, in which case it is more appropriate to
define trise and tfall as the durations between the 10 percent
level and 90 percent level of the change in voltage.] The total
time associated with a pulse is
Ttotal = T + trise + tfall = T + 2trise
(if trise = tfall ),
and the associated switching frequency is
fs =
1
1
=
.
Ttotal
T + 2trise
Even if T can be reduced to zero, the maximum possible
switching speed (without overlap between adjacent pulses)
would be
fs (max) =
1
.
2trise
(5.143)
As we shall see shortly, the switching times (trise and tfall )
are governed in part by the capacitances in the circuit.
Consequently, capacitances play a major role in determining
the ultimate switching speed of a digital circuit. In fact,
capacitances also govern the switching speeds of the wires—
often referred to as the bus—that connect the processor to the
various other devices on a computer motherboard.
Whereas the processor speed of a modern computer is
in the GHz range, the bus speed usually is slower by a
factor of 3 to 10. This is (in part) why a computer appears to slow down when the
processor needs to access data through the bus. The following
section will examine why this is so.
RC AND RL FIRST-ORDER CIRCUITS
Wire capacitor
l
2a
d
π ε�
ln[(d/2a) + (d/2a)2 − 1]
π ε�
≈
if d � a
ln(d/a)
C=
Figure 5-47: Capacitance of a two-wire configuration where ε
is the permittivity of the material separating the wires.
5-7.1
Parasitic Capacitance
Functionally, any two conducting bodies separated by an
insulating material (including air, plastic, and all nonconductors) form a capacitor. The capacitors we have
considered thus far are the type designed and fabricated
intentionally for use as components in circuits. In some
situations, however, unintentional capacitance may exist in the
circuit, in which case it usually is called parasitic capacitance.
(Parasitic inductance also is present, but it is usually very small,
so we will ignore it.) Consider, for example, the capacitance
formed by two parallel wires running side by side on a circuit
board. The capacitance of such a two-wire transmission line
(Fig. 5-47) is proportional directly to the length of the wires �
and inversely proportional to a logarithmic function involving
d, the spacing between the wires. Thus, C increases with �
and decreases with d. If the wires are sufficiently long, or
sufficiently close to one another, or some combination of the two
[as to result in a capacitance of significant magnitude relative
to the other capacitances in the circuit] such a wire capacitor
(the conductor traces between the different components in the
circuit) can slow down the response time of the circuit. In a
digital circuit, slower response time means slower switching
speed. To explore this subject further, we now examine the
impact of parasitic capacitance on the operation of a MOSFET.
5-7.2
CMOS Switching Speed
Recall from Section 4-11 that the gate node in a MOSFET
is composed of a metal and a semiconductor separated by
a thin layer of silicon dioxide that serves as a dielectric
insulator. This geometry is somewhat similar to that of the
parallel-plate capacitor of Fig. 5-11. Hence, during normal
5-7 APPLICATION NOTE: PARASITIC CAPACITANCE AND COMPUTER PROCESSOR SPEED
D
CSp
CDn
G
S
Gp
CSn
CGp
CDp
PMOS
Dp
(a) NMOS
Dn
D
CGn
VDD
Sp
CGn
G
307
+
n
υGS
n
iDS
_
S
CDn
Gn
CDn
+
CGn
υin
CSn
+
NMOS
Sn
_
υout
CSn
_
(a) Original circuit
(b) Equivalent circuit
VDD
Figure 5-48: n-channel MOSFET (NMOS): (a) circuit symbol
Sp
with added parasitic capacitances and (b) equivalent circuit. [In
p
p
a PMOS, parasitic capacitances CD and CS should be shown
connected to VDD instead of to ground.]
CDp
operation, the gate (G) and the source (S) nodes form a capacitor
between them, as do the gate and the drain (D) nodes. Other
parasitic capacitances also exist in a MOSFET, mainly due
to charges separated between the source and the large silicon
chip and between the drain and the chip. For simplicity, the
various parasitic capacitances can be lumped together into an
equivalent model containing three capacitances (all connected
to ground) from G, S, and D. As shown in Fig. 5-48, these
capacitances are designated CGn , CSn , and CDn , respectively,
with the superscript “n” denoting that the circuit configuration
applies to the n-channel MOSFET (or NMOS for short) whose
body node usually is connected to ground. In a p-channel
MOSFET, the body node is connected to VDD . Hence, the
p
p
model for PMOS would show parasitic capacitances CD and CS
connected to VDD , instead of to ground.
Now we are ready to analyze the operation of a CMOS
inverter in the presence of parasitic capacitances. The circuit in
Fig. 5-49(a) is essentially the same CMOS circuit of Fig. 4-30,
except with added parasitic capacitances. The capacitances
G
+
υin
_
D
+
CDn
CIN
Sn
υout
_
(b) Simplified circuit
Figure 5-49: Common drain inverter circuit with parasitic
capacitances. Superscripts “n” and “p” refer to the NMOS and
PMOS transistors, respectively.
associated with the n-channel MOSFET are shown connected
from terminals Gn , D n , and S n to ground. For the p-channel
p
MOSFET, capacitance CG is also connected to ground, but for
the other two terminals, the capacitances are shown connected
308
CHAPTER 5
(a) Initial condition at t = 0− :
VDD
The capacitances in Fig. 5-50(a) act like open circuits. Also,
n = 0 for the NMOS and
υin = 0, which means that VGS
p
VSG = VDD for the PMOS. Under such circumstances,
Sp
+
p
VSG
Rs
+
υin
_
+
CIN
G
p
iDS
=
i3
i1
D
i2
+
CDn υout
n
n
iDS
= gVGS
_
_
n
n
= gVGS
= 0,
iDS
CDp
p
gVSG
D
n
VGS
0
(5.145)
(5.146)
If υin is a step function that changes from 0 to VDD at t = 0,
the following pair of responses will take place:
Output
0
υout (0− ) = VDD .
(b) At t ≥ 0:
υDD
t
p
υout (0) = VDD .
υout
Input
and
Since the voltage across a capacitor cannot change instantaneously,
(a) Equivalent circuit for CMOS inverter
υin
p
iDS = gVSG = gVDD ,
(5.144)
where g is the MOSFET gain constant. Furthermore, the PMOS
p
p
behavior is such that, if VSG approaches VDD , the voltage VDS
n not
across the dependent current source goes to zero. With iDS
p
conducting and iDS acting like a short circuit, it follows that the
voltage across capacitor CDn is
_
Sn
υDD
RC AND RL FIRST-ORDER CIRCUITS
tfall
t
(b) υin(t) and υout(t)
Figure 5-50: (a) Equivalent circuit for the CMOS inverter; (b)
the response of υout (t) to υin changing states from 0 to VDD at
t = 0.
(a) At the input side in the circuit of Fig. 5-50(a), we have
an isolated loop comprising υin , Rs , and CIN . In response
to the change in υin , capacitor CIN will charge up to a
final voltage VDD at a rate governed by the time constant
τ = Rs CIN . Through proper choice of Rs (very small), CIN
can charge up to VDD so quickly (in comparison with the
response time of the output) that it can be assumed that
n =V
VGS
DD immediately after t = 0.
n =V
(b) At the output side, with VGS
DD , it follows that
p
VSG = 0. Hence,
to VDD . The two MOSFETs share a common gate terminal at
the input side and a common drain terminal at the output side.
Terminal S n of the NMOS is connected directly to ground,
which renders capacitance CSn irrelevant. Terminal S p of the
PMOS is connected directly to VDD , which similarly renders
p
p
CS irrelevant. Capacitances CGn and CG both are connected
from the common gate terminal to ground and therefore can be
combined into an equivalent capacitance CIN . Incorporating
these simplifications leads to the circuit shown in Fig. 5-49(b).
Our next step is to determine the output response υout (t) to a
sudden change of state at the input from υin = 0 to υin = VDD .
Let us assume that the change happens at t = 0 and that the
circuit was already in a steady-state condition by then.
n
= gVDD ,
iDS
p
p
iDS = gVSG = 0.
and
(5.147)
At node D � ,
and at node D,
i1 + i2 + i3 = 0,
p
n
+ iDS = gVDD .
i3 = iDS
(5.148)
(5.149)
Also,
p
i1 = CD
d
p d
(υout − VDD ) = CD
υout ,
dt
dt
(5.150)
and
i2 = CDn
d
υout .
dt
(5.151)
5-7 APPLICATION NOTE: PARASITIC CAPACITANCE AND COMPUTER PROCESSOR SPEED
Upon inserting the expressions given by Eqs. (5.149)
through (5.151) into Eq. (5.148) and then rearranging
terms, we have
dυout
−gVDD
= n
p.
dt
CD + CD
(5.152)
Integrating both sides from 0 to t gives
υout |t0
−gVDD
= n
p
CD + CD
t
dt,
(5.153)
0
υout (t) = υout (0) −
gVDD
p
CDn + CD
υout (t) = VDD 1 −
g
p
CDn + CD
t.
t .
(5.155)
p
CDn + CD
.
g
(5.156)
Example 5-19: Processor Speed
The input to a CMOS inverter consists of a sequence of bits, each
25 picoseconds in duration. Determine the maximum switching
frequency at which the CMOS inverter can be operated without
causing overlap between adjacent bits (pulses) under each
of the following conditions: (a) parasitic capacitances totally
ignored and (b) parasitic capacitances included. In both cases,
p
g = 10−5 A/V, and CDn = CD = 0.5 fF.
Solution: (a) With T = 25 ps = 25 × 10−12 s and no
capacitances to slow down the switching process, the maximum
switching frequency is
fs =
CDn + CD
(0.5 + 0.5) × 10−15
= 10−10 s.
=
g
10−5
To determine trise , we have to repeat the solution that led to
Eq. (5.156) but with υin starting in state 1 (i.e., υin = VDD ) and
switching to state 0 at t = 0. Such a process would lead to
g
υout (t) = VDD
p t.
CDn + CD
1
1
=
= 40 GHz.
T
25 × 10−12
trise =
(5.154)
Plots of υin (t) changing states from 0 to VDD at t = 0
and of the corresponding response υout (t) are displayed in
Fig. 5-50(b). We observe that tfall is the time it takes for
υout to change states from VDD to zero. From Eq. (5.155),
we deduce that
tfall =
p
tfall =
p
In view of Eq. (5.146), the expression for υout (t) becomes
(b) From Eq. (5.156),
The time duration that it takes υout (t) to reach VDD is
which leads to
309
CDn + CD
= tfall .
g
Hence, in the presence of parasitic capacitances, Eq. (5.143) is
applicable. Namely,
fs =
1
1
=
= 4.44 GHz.
T + 2trise
25 × 10−12 + 2 × 10−10
In this example, the parasitic capacitances are responsible for
slowing down the switching speed of the CMOS processor by
about one order of magnitude.
In the preceding example, we essentially ignored the input
capacitances of the CMOS. Since logic gates are strung along in
series such that one gate’s output is the next gate’s input, input
capacitances usually are lumped together with the previous
gate’s output capacitances. To properly incorporate the roles of
both input and output parasitic capacitances, a more thorough
treatment is needed than the first-order approximation we
carried out in this section. Nevertheless, the approximation did
succeed in making the point that at high switching rates parasitic
capacitances are important and should not be ignored.
Concept Question 5-26: What is the rationale for adding
parasitic capacitances to nodes G, D, and S in Fig. 5-48?
(See
)
Concept Question 5-27: What determines the maximum
switching frequency for a CMOS inverter? (See
)
p
n + C = 20 fF
Exercise 5-19: A CMOS inverter with CD
D
has a fall time of 1 ps. What is the value of its gain
constant?
Answer: g = 2 × 10−2 A/V. (See
C
)
310
CHAPTER 5
t=0
V(3)
R2
+
_
i
1 kΩ
2.5 V
5 fF
C1 R1
10 kΩ
RC AND RL FIRST-ORDER CIRCUITS
+
Vout
_
Figure 5-51: RC circuit with an SPST switch.
5-8 Analyzing Circuit Response with
Multisim
5-8.1
Modeling Switches in Multisim
Determining the time-dependent behavior of large, complex
circuits often is difficult to do and extremely time-consuming.
Accordingly, designs of commercial circuits rely heavily on
SPICE simulators for evaluating the response of a candidate
circuit design before constructing the real version. In this
section, we demonstrate how Multisim can be used to analyze
the transient response of a circuit driven by a time-dependent
source.
Because the first-order RC circuit is straightforward to
analyze by hand, it makes for a useful example with which we
can compare Multisim simulation results to hand calculations.
Consider the circuit shown in Fig. 5-51, in which the switch
is opened at t = 0 after it had been in the closed position for
a long time. Hence, prior to t = 0, the circuit was in a steady
state and the capacitor was fully charged with no current flowing
through it (behaving like an open circuit). The voltage across
the capacitor is designated V(3) (so as to match the Multisim
circuit that we will be constructing soon) and is given by
V(3) =
2.5 × 10 k
= 2.27 V
1 k + 10 k
(@ t = 0− ).
Upon opening the switch, the capacitor will discharge through
the 10 k� resistor with a time constant given by
τdischarge = R1 C1 = 104 × 5 × 10−15 = 50 ps.
Likewise, if the switch were to close at a later time after the
circuit had fully discharged, the capacitor would again charge
up to 2.27 V, but in this case, the time constant would be
τcharge = (R1 � R2 )C2 =
1 k × 10 k
× 5 × 10−15 = 4.54 ps.
11 k
Figure 5-52: Multisim equivalent of the RC circuit in Fig. 5-51.
Thus, the charge-up response of the circuit is much faster (by
about one order of magnitude) than its discharge response.
To demonstrate the transient behavior of the circuit with
Multisim, we construct the circuit model shown in Fig. 5-52
using the component list given in Table 5-6. The only oddity
in the circuit is the use of a Voltage-Controlled Switch and a
Pulse Generator source to drive it. Multisim does not provide
the user the option to use time-programmable switches, so
in order to observe the circuit response to multiple opening
and closing events of the switch, we use a voltage-controlled
switch in combination with an appropriately configured pulse
generator. The exact voltage amplitude of the pulse (V2 in
Fig. 5-52) is not important (so long as it is larger than the
1 mV threshold of the switch), but the timing of the pulse is
critically important, as we want to allow enough time between
opening and closing events to observe the complete transient
responses of the circuit. Since the longest time constant is 50 ps,
double-click on the Pulse Generator and set the Pulse width
at 250 ps and the Period at 500 ps so as to provide an adequate
time window. Also set the Rise Time and Fall Time to 1 ps.
To analyze the behavior, we select Simulate → Analyses
→ Transient Analysis. Make sure to select an End Time equal
to a few periods; 3 ns should suffice. (If you forget this, you may
need to abort the simulation to prevent it from running for a long
time since the default value is 0.001 s! To abort the simulation
or any general Analyses which may be taking too long, go
to Simulate → Analyses → Stop Analysis.) In the Output
tab, select the non-ground node of the capacitor V(3) and the
pulse voltage V(1) for time references. Figure 5-53 shows the
5-8 ANALYZING CIRCUIT RESPONSE WITH MULTISIM
311
Table 5-6: Multisim component list for the circuit in Fig. 5-52.
Component
Group
Family
Quantity
Description
1k
Basic
Resistor
1
1 k� resistor
10 k
Basic
Resistor
1
10 k� resistor
5f
Basic
Capacitor
1
5 fF capacitor
VOLTAGE CONTROLLED SPST
Basic
Switch
1
Switch
DC POWER
Sources
Power Sources
1
2.5 V dc source
PULSE VOLTAGE
Sources
Signal Voltage Source
1
Pulse-generating
voltage source
output of the transient analysis. Enabling the Cursor tool in the
Grapher window allows the user to read out the exact voltage
and time values for any trace.
5-8.2 Modeling Time-Dependent Sources in
Multisim
In the previous subsection, we examined how to create switches
that toggle with time. What if we wanted to simulate the circuit
shown in Fig. 5-54(a) and plot υC over a certain time duration?
The circuit has three time-dependent sources, which would
make adding switches and pulse generators rather complicated.
Multisim allows us to create the time-dependent sources found
in this circuit by using the ABM Voltage and Current sources.
In Multisim’s ABM syntax, the step function u(t) is
represented by the stp(TIME) function. Also, to guard against
Multisim calculating incorrect initial conditions prior to the step
function, it is advisable to shift the step-function transition to
occur 10 ms after the start of the simulation. Hence, we use the
V(1)
V(3)
Figure 5-53: Transient response of the circuit in Fig. 5-52.
312
CHAPTER 5
RC AND RL FIRST-ORDER CIRCUITS
R1
+
V1 = 5u(−(t − 0.01)) V _
300 Ω
R2
50 Ω
+
V2 = 3u(t − 0.01) V _
υC
+ C1
_ 100 μF
I1 = 0.1u(t − 0.02) A
(a) Circuit with three time-dependent sources
(b) Multisim circuit
(c) Trace of υC(t)
Figure 5-54: Multisim analysis of a circuit containing time-dependent sources.
following ABM expressions:
For V1 = 5u(−(t − 0.01)) V:
5*stp(-TIME+0.01)
For I1 = 0.1u(t − 0.02) A:
0.1*stp(TIME-0.02)
For V2 = 3u(t − 0.01) V:
3*stp(TIME-0.01)
Once these expressions have been entered, go to Simulate →
Analyses → Transient Analysis. Leave the Start Time at
0 s, and set the End Time to 0.04 s. Under the Output tab,
select the voltages V(1), V(2), and V(3) and press Simulate.
This generates the plots shown in Fig. 5-54(c).
5-8 ANALYZING CIRCUIT RESPONSE WITH MULTISIM
313
Summary
Concepts
• The step, ramp, rectangle, and exponential functions
can be used to characterize a variety of nonperiodic
waveforms.
• A capacitor stores electrical energy when a voltage
exists across it.
• An inductor stores magnetic energy when a current
passes through it.
• Under dc conditions, a capacitor acts like an open circuit
and an inductor acts like a short circuit.
• A series RC circuit excited by a dc source exhibits a
voltage response (across the capacitor) characterized
by an exponential function containing a time constant
τ = RC.
• A parallel RL circuit exhibits a current response
(through the inductor) that has the same form as the
voltage response of the series RC circuit, but for the RL
circuit, τ = L/R.
• The output voltage of the ideal op-amp RC integrator
circuit is directly proportional to the time integral of the
input signal.
• An integrator circuit becomes a differentiator circuit
upon interchanging the locations of R and C.
• Parasitic capacitance is often the factor that ultimately
limits the processor speed of a computer.
• Multisim allows us to evaluate the switching response
of a circuit.
Mathematical and Physical Models
Unit step
� function
0 for t < 0
u(t) =
1 for t > 0
Time-shifted�step function
0 for t < T
u(t − T ) =
1 for t > T
Unit ramp
� function
0 for t ≤ 0
r(t) =
t for t ≥ 0
Time-shifted
� ramp function
0
for t ≤ T
r(t − T ) =
(t − T ) for t ≥ T
Unit rectangular function
(pulse center at t =⎧
T ; pulse length = τ )
⎪0 for t < (T − τ/2),
�
� ⎨
(t − T )
rect
= 1 for (T − τ/2) ≤ t ≤ (T + τ/2),
⎪
τ
⎩
0 for t > (T + τ/2).
Capacitor
dυ
i=C
dt
�t
1
i dt �
υ(t) = υ(t0 ) +
C
w=
1
2
Cυ 2
Parallel plate
t0
(stored electrical energy)
εA
C=
d
Inductor
υ=L
di
dt
1
i(t) = i(t0 ) +
L
w=
1
2
Li 2
Solenoid L =
�t
υ dt �
t0
(stored magnetic energy)
μN 2 S
�
Series RC circuit response (sudden change at t = 0)
υC (t) = υC (∞) + [υ(0) − υ(∞)]e−t/τ
τ = RC
Parallel RL circuit response (sudden change at t = 0)
iL (t) = iL (∞) + [iL (0) − iL (∞)]e−t/τ
τ = L/R
Op-amp integrator
υout (t) = −
1
RC
�t
t0
υi dt � + υout (t0 )
Op-amp differentiator
dυi
υout (t) = −RC
dt
314
CHAPTER 5
Important Terms
RC AND RL FIRST-ORDER CIRCUITS
Provide definitions or explain the meaning of the following terms:
air-core solenoid
bus
bus speed
capacitance
capacitor
charge/discharge
charged capacitor
circuit response
clip
clock speed
coaxial capacitor
dc condition
duration of the pulse
dynamic circuit
early time response
electric field
electrical permittivity
electrical susceptibility
equivalent capacitance
exponential function
ferrite-core inductor
final condition
final value
first-order circuit
first-order RC circuit
forced response
forcing function
inductance
initial value
iron-core solenoid
magnetic field
magnetic flux linkage
magnetic permeability
mica capacitor
motherboard
mutual inductance
nanocapacitor
natural decay response
natural response
negative exponential
function
nonperiodic waveform
PROBLEMS
op-amp differentiator
op-amp integrator
parallel-plate capacitor
parasitic capacitance
periodic waveform
permeability
permittivity
plastic-foil capacitor
pulse repetition frequency
pulse waveform
ramp function
RC circuit
rectangle function
rectangular pulse
relative permittivity
rise time
RL circuit
scaling factor
self-inductance
solenoid
source-free
source-free, first-order
differential equation
static
steady-state component
steady-state response
step function
step function response
supercapacitor
switching frequency (speed)
time constant
time-shifted ramp function
time-shifted step function
transient component
transient response
transmission line
uncharged capacitor
unit rectangular function
unit step function
(b) υ2 (t) = 5r(t + 2) − 5r(t) − 10u(t)
(a) υ1 (t) = −6u(t + 3)
(c) υ3 (t) = 10 − 5r(t + 2) + 5r(t)
t +1
t −3
(d) υ4 (t) = 10 rect
− 10 rect
2
2
t −1
t −3
(e) υ5 (t) = 5 rect
− 5 rect
2
2
(c) υ3 (t) = 4u(t + 2) − 4u(t − 2)
5.5 Provide expressions for the waveforms displayed in
Fig. P5.5 in terms of ramp and step functions.
Section 5-1: Nonperiodic Waveforms
5.1 Generate plots for each of the following step-function
waveforms over the time span from −5 to +5 s.
(b) υ2 (t) = 10u(t − 4)
(d) υ4 (t) = 8u(t − 2) + 2u(t − 4)
(e) υ5 (t) = 8u(t − 2) − 2u(t − 4)
5.2 Provide expressions in terms of step functions for the
waveforms displayed in Fig. P5.2.
*5.3 A 10 V rectangular pulse with a duration of 5 μs starts at
t = 2 μs. Provide an expression for the pulse in terms of step
functions.
5.4 Generate plots for each of the following functions over
the time span from −4 to +4 s.
(a) υ1 (t) = 5r(t + 2) − 5r(t)
∗
Answer(s) available in Appendix G.
5.6 Provide plots for the following functions (over a time span
and with a time scale that will appropriately display the shape
of the associated waveform):
(a) υ1 (t) = 100e−2t u(t)
(b) υ2 (t) = −10e−0.1t u(t)
(c) υ3 (t) = −10e−0.1t u(t − 5)
3
(d) υ4 (t) = 10(1 − e−10 t ) u(t)
(e) υ5 (t) = 10e−0.2(t−4) u(t)
(f) υ6 (t) = 10e−0.2(t−4) u(t − 4)
PROBLEMS
315
υ1(t)
υ3(t)
υ2(t)
6
6
6
4
4
4
2
2
2
0 1
−2 −1
−2
2
3
4
t (s)
−2 −1 0 1
−2
(a) Step
2
3
t (s)
4
0 1
−2 −1
−2
(b) Bowl
6
6
4
4
4
2
2
2
2
3
4
t (s)
−2 −1 0 1
−2
3
2
t (s)
4
0 1
−2 −1
−2
(e) Hat
(d) Staircase down
4
2
3
4
(f) Square wave
Figure P5.2: Waveforms for Problem 5.2.
υ1(t)
υ2(t)
4
4
2
−2
−2
2
0
2
4
t (s)
6
−2
0
2
4
−4
(a) “Vee”
(b) Mesa
υ3(t)
4
2
−2
−2
0
t (s)
υ6(t)
6
0 1
−2 −1
−2
3
(c) Staircase up
υ5(t)
υ4(t)
2
2
4
6
−4
(c) Sawtooth
Figure P5.5: Waveforms for Problem 5.5.
t (s)
6
t (s)
t (s)
316
CHAPTER 5
*5.7 After opening a certain switch at t = 0 in a circuit
containing a capacitor, the voltage across the capacitor started
decaying exponentially with time. Measurements indicate that
the voltage was 7.28 V at t = 1 s and 0.6 V at t = 6 s. Determine
the initial voltage at t = 0 and the time constant of the voltage
waveform.
(d) What is the maximum amount of energy stored in the
capacitor, and when does it occur?
5.11 Suppose the waveform shown in Fig. P5.10 is the current
i(t) through a 0.2 mF capacitor (rather than the voltage) and
its peak value is 100 μA. given that the initial voltage on the
capacitor was zero at t = −4 s, determine and plot υ(t).
5.12 The current through a 40 μF capacitor is given by a
rectangular pulse as
Section 5-2: Capacitors
5.8 After plotting the voltage waveform, obtain expressions
and generate plots for i(t), p(t), and w(t) for a 0.2 mF capacitor.
The voltage waveforms are given by
(a) υ1 (t) = 5r(t) − 5r(t − 2) V
(b) υ2 (t) = 10u(−t) + 10u(t) − 5r(t − 2) + 5r(t − 4) V
(c) υ3 (t) = 15u(−t) + 15e−0.5t u(t) V
(d) υ4 (t) = 15[1 − e−0.5t ] u(t) V
*5.9 In response to a change introduced by a switch at t = 0,
the current flowing through a 100 μF capacitor, defined in
accordance with the passive sign convention, was observed to
be
i(t) = −0.4e−0.5t mA
5.10 The voltage υ(t) across a 20 μF capacitor is given by
the waveform shown in Fig. P5.10.
υ (V)
0
t −1
2
mA.
If the capacitor was initially uncharged, determine υ(t), p(t),
and w(t).
5.13 The voltage across a 0.2 mF capacitor was 20 V until a
switch in the circuit was opened at t = 0, causing the voltage
to vary with time as
υ(t) = (60 − 40e−5t ) V
(for t > 0).
(b) Did the switch action result in an instantaneous change in
the current i(t)?
(c) How much initial energy was stored in the capacitor at
t = 0?
(d) How much final energy will be stored in the capacitor (at
t = ∞)?
5.14 Determine voltages υ1 to υ4 in the circuit of Fig. P5.14
under dc conditions.
100
−2
i(t) = 40 rect
(a) Did the switch action result in an instantaneous change in
υ(t)?
(for t > 0).
If the final energy stored in the capacitor (at t = ∞) is 0.2 mJ,
determine υ(t) for t ≥ 0.
−4
RC AND RL FIRST-ORDER CIRCUITS
2
4
+
t (s)
(b) Specify the time interval(s) during which power transfers
into the capacitor and that (those) during which it transfers
out of the capacitor.
(c) At what instant in time is the power transfer into the
capacitor a maximum? And at what instant is the power
transfer out of the capacitor a maximum?
C1
+
_υ1
30 kΩ
C2
_
C3
20 kΩ
Figure P5.10: Waveform for Problems 5.10 and 5.11.
(a) Determine and plot the corresponding current i(t).
υ3
+
_ υ2
15 kΩ
5 kΩ
C4
+
_ 15 V
+
_υ4
Figure P5.14: Circuit for Problem 5.14.
10 kΩ
PROBLEMS
317
*5.15 Determine voltages υ1 to υ3 in the circuit of Fig. P5.15
under dc conditions.
5.18 Reduce the circuit in Fig. P5.18 into a single equivalent
capacitor at terminals (a, b). Assume that all initial voltages are
zero at t = 0.
6Ω
+
10 Ω
18 Ω
+
40 V _
4Ω
υ2
_
+
20 μF
+
_
60 μF
3Ω
υ1
υ3
C
C C
_
Figure P5.15: Circuit for Problem 5.15.
10 V
+
_
10 kΩ
3 kΩ
+
_υ1
20 μF
_
+ 2V
υ2
+
_
C
C
Figure P5.18: Circuit for Problem 5.18.
40 μF
a
Figure P5.16: Circuit for Problem 5.16.
b
5F
3F
6F
*5.17 Reduce the circuit in Fig. P5.17 into a single equivalent
capacitor at terminals (a, b). Assume that all initial voltages are
zero at t = 0.
6 μF
5F
6F
3F
8 μF
C
*5.19 For the circuit in Fig. P5.19, find Ceq at terminals (a, b).
Assume all initial voltages to be zero.
20 kΩ
3 kΩ
b
C
5.16 Determine the voltages across the two capacitors in the
circuit of Fig. P5.16 under dc conditions.
40 kΩ
a
C
10 μF
40 kΩ
C
c
d
5F
Figure P5.19: Circuit for Problems 5.19 and 5.20.
5.20 Find Ceq at terminals (c, d) in the circuit of Fig. P5.19.
a
3 μF
6 μF
12 μF
b
10 μF
Figure P5.17: Circuit for Problems 5.17 and 5.21.
*5.21 Assume that a 120 V dc source is connected at terminals
(a, b) to the circuit in Fig. P5.17. Determine the voltages across
all capacitors.
5.22 Determine (a) the amount of energy stored in each of
the three capacitors shown in Fig. P5.22, (b) the equivalent
capacitance at terminals (a, b), and (c) the amount of energy
stored in the equivalent capacitor.
318
CHAPTER 5
20 μF
a
10 kΩ
6 μF
+
15 V _
5 μF
RC AND RL FIRST-ORDER CIRCUITS
5.26 The waveform shown in Fig. P5.26 represents the
voltage across a 0.2 H inductor for t ≥ 0. If the current flowing
through the inductor is −20 mA at t = 0, determine the current
i(t) for t ≥ 0.
b
υ (mV)
Figure P5.22: Circuit for Problem 5.22.
20
10
Section 5-3: Inductors
0
5.23 After plotting the current waveform, obtain expressions
and generate plots for υ(t), p(t), and w(t) for a 0.5 mH inductor.
The current waveforms are given by
(a) i1 (t) = 0.2r(t − 2) − 0.2r(t − 4) − 0.2r(t − 8)
+ 0.2r(t − 10) A
0
2
t (s)
3
Figure P5.26: Voltage waveform for Problem 5.26.
5.27 The waveform shown in Fig. P5.27 represents the
voltage across a 50 mH inductor. Determine the corresponding
current waveform. Assume i(0) = 0.
(b) i2 (t) = 2u(−t) + 2e−0.4t u(t) A
(c) i3 (t) = −4(1 − e−0.4t ) u(t) A
5.24 The current i(t) passing through a 0.1 mH inductor is
given by the waveform shown in Fig. P5.24.
υ
(a) Determine and plot the corresponding voltage υ(t) across
the inductor.
10 cos (πt/4) (mV)
10 mV
(b) Specify the time interval(s) during which power is
transferred into the inductor and that (those) during which
power transfers out of the inductor. Also specify the
amount of energy transferred in each case.
0
2
4
t (s)
−10 mV
i (A)
Figure P5.27: Voltage waveform for Problem 5.27.
3
−4
−2
0
2
4
t (s)
5.28 For the circuit in Fig. P5.28, determine the voltage across
C and the currents through L1 and L2 under dc conditions.
Figure P5.24: Current waveform for Problem 5.24.
L1 = 2 mH
*5.25 Activation of a switch at t = 0 in a certain circuit caused
the voltage across a 20 mH inductor to exhibit the voltage
response
υ(t) = 4e−0.2t mV
(for t ≥ 0).
Determine i(t) for t ≥ 0 given that the energy stored in the
inductor at t = ∞ is 0.64 mJ.
10 Ω
15 Ω
2A
5Ω
L2 = 4 mH
C = 20 μF
Figure P5.28: Circuit for Problem 5.28.
PROBLEMS
319
*5.29 For the circuit in Fig. P5.29, determine the voltages
across C1 and C2 and the currents through L1 and L2 under
dc conditions.
3
3
4
C2 = 2 μF
1
a
10 Ω
4
Leq
5Ω
L1 = 2 H
6Ω
L2 = 6 H
C1 = 1 μF
3
1
4Ω
+
_ 30 V
3
3
3
b
3
Figure P5.32: Circuit for Problem 5.32.
Figure P5.29: Circuit for Problem 5.29.
Section 5-4: Response of the RC Circuit
5.30 All elements in Fig. P5.30 are 10 mH inductors.
Determine Leq .
L
L
Leq
L
L
(a) iC (0− ) and υC (0− )
L
L
5.33 After having been in position 1 for a long time, the
switch in the circuit of Fig. P5.33 was moved to position 2
at t = 0. Given that V0 = 12 V, R1 = 30 k�, R2 = 120 k�,
R3 = 60 k�, and C = 100 μF, determine:
(b) iC (0) and υC (0)
(c) c iC (∞) and υC (∞)
(d) υC (t) for t ≥ 0
L
(e) iC (t) for t ≥ 0
Figure P5.30: Circuit for Problem 5.30.
R1
*5.31 The values of all inductors in the circuit of Fig. P5.31
are in millihenrys. Determine Leq .
a
3
5
i1
+
V0 _
2
iC
1
R2
R3
C
υC
8
Figure P5.33: Circuit for Problems 5.33 and 5.34.
Leq
4
8
6
12
6
12
b
Figure P5.31: Circuit for Problem 5.31.
5.32 Determine Leq at terminals (a, b) in the circuit of
Fig. P5.32. All inductor values are in millihenrys.
5.34 Repeat Problem 5.33, but with the switch having been
in position 2 for a long time, and then moved to position 1 at
t = 0.
5.35 The circuit in Fig. P5.35 contains two switches, both
of which had been open for a long time before t = 0.
Switch 1 closes at t = 0, and switch 2 follows suit at t = 5 s.
Determine and plot υC (t) for t ≥ 0 given that V0 = 24 V,
R1 = R2 = 16 k�, and C = 250 μF. Assume υC (0) = 0.
320
CHAPTER 5
Switch 1
Switch 2
t=0
υC
C
t=0
R1
R1
+
V0 _
RC AND RL FIRST-ORDER CIRCUITS
t=5s
R2
Vs
+
_
C1
*5.36 The circuit in Fig. P5.36 was in steady state until the
switch was moved from terminal 1 to terminal 2 at t = 0.
Determine υ(t) for t ≥ 0 given that I0 = 21 mA, R1 = 2 k�,
R2 = 3 k�, R3 = 4 k�, and C = 50 μF.
R1
2
υ
1
C
t=0
C2
*5.39 The switch in the circuit of Fig. P5.39 had been in
position 1 for a long time until it was moved to position 2
at t = 0. Determine υ(t) for t ≥ 0, given that I0 = 6 mA,
V0 = 18 V, R1 = R2 = 4 k�, and C = 200 μF.
υ
I0
i
Figure P5.38: Circuit for Problem 5.38.
Figure P5.35: Circuit for Problem 5.35.
1
R2
R1
I0
C
2
+
_ V0
R2
R2
R3
Figure P5.39: Circuit for Problems 5.39 and 5.40.
Figure P5.36: Circuit for Problem 5.36.
5.37 Prior to t = 0, capacitor C1 in the circuit of Fig. P5.37
was uncharged. For I0 = 5 mA, R1 = 2 k�, R2 = 50 k�,
C1 = 3 μ F, and C2 = 6 μ F, determine:
(a) The equivalent circuit involving the capacitors for t ≥ 0.
Specify υ1 (0) and υ2 (0).
(b) i(t) for t ≥ 0.
(c) υ1 (t) and υ2 (t) for t ≥ 0.
R2
1
I0
R1
2
C1
t=0
υ1
5.40 Repeat Problem 5.39, but reverse the switching
sequence. [Switch starts in position 2 and is moved to position 1
at t = 0.]
5.41 Determine i(t) for t ≥ 0 where i is the current passing
through R3 in the circuit of Fig. P5.41. The element values are
υs = 16 V, R1 = R2 = 2 k�, R3 = 4 k�, and C = 25 μF.
Assume that the switch had been open for a long time prior to
t = 0.
i
C2
t=0
R1
υ2
Figure P5.37: Circuit for Problem 5.37.
5.38 The switch in the circuit of Fig. P5.38 had been closed for
a long time before it was opened at t = 0. Given that Vs = 10 V,
R1 = 20 k�, R2 = 100 k�, C1 = 6 μF, and C2 = 12 μF,
determine i(t) for t ≥ 0.
+
υs _
C
υ
R2
i
R3
Figure P5.41: Circuit for Problems 5.41 to 5.43.
5.42 Repeat Problem 5.41, but start with the switch being
closed prior to t = 0 and then opened at t = 0.
*5.43 Consider the circuit in Fig. P5.41, but without the switch.
If the source υs represents a 12 V, 100 ms long rectangular
PROBLEMS
321
pulse that starts at t = 0 and the element values are R1 = 6 k�,
R2 = 2 k�, R3 = 4 k�, and C = 15 μF, determine the voltage
response υ(t) for t ≥ 0.
5.44 Given that in Fig. P5.44, I1 = 4 mA, I2 = 6 mA,
R1 = 3 k�, R2 = 6 k�, and C = 0.2 mF, determine υ(t).
Assume the switch was connected to terminal 1 for a long time
before it was moved to terminal 2.
1
I1
R1
R2
υ
I2
*5.45 Determine υC (t) in the circuit of Fig. P5.45 for t ≥ 0,
given that the switch had been closed for a long time prior to
t = 0.
1
+
_
2 kΩ
+
υC
i
L
1
I0
R1
R2
t=0
2
R3
R4
Figure P5.48: Circuit for Problem 5.48.
1 kΩ
Figure P5.45: Circuit for Problem 5.45.
5.49 For the circuit in Fig. P5.49, determine iL (t) and plot it
as a function of t for t ≥ 0. The element values are I0 = 4 A,
R1 = 6 �, R2 = 12 �, and L = 2 H.Assume that iL = 0 before
t = 0.
Section 5-5: Response of the RL Circuit
5.46 After having been in position 1 for a long time, the switch
in the circuit of Fig. P5.46 was moved to position 2 at t = 0.
Given that V0 = 12 V, R1 = 30 �, R2 = 120 �, R3 = 60 �,
and L = 0.2 H, determine:
and υL
υL
*5.48 Determine i(t) for t ≥ 0 given that the circuit in
Fig. P5.48 had been in steady state for a long time prior to
t = 0. Also, I0 = 5 A, R1 = 2 �, R2 = 10 �, R3 = 3 �,
R4 = 7 �, and L = 0.15 H.
_
2 kΩ
(a) iL
L
5.47 Repeat Problem 5.46, but with the switch having been
in position 2 for a long time and then moved to position 1 at
t = 0.
10 μF
(0− )
R3
R2
t=0
1 kΩ
20 V
iL
Figure P5.46: Circuit for Problems 5.46 and 5.47.
Figure P5.44: Circuit for Problem 5.44.
1 kΩ
2
+
V0 _
2
t=0
C
R1
I0
R1
t=0
L
t = 0.5 s
R2
Figure P5.49: Circuit for Problem 5.49.
(0− )
(b) iL (0) and υL (0)
(c) iL (∞) and υL (∞)
(d) iL (t) for t ≥ 0
(e) υL (t) for t ≥ 0
*5.50 After having been in position 1 for a long time, the
switch in the circuit of Fig. P5.50 was moved to position 2 at
t = 0. Determine i1 (t) and i2 (t) for t ≥ 0, given that
I0 = 6 mA, R0 = 12 �, R1 = 10 �, R2 = 40 �, L1 = 1 H,
and L2 = 2 H.
322
CHAPTER 5
t=0
2
I0
i1
i2
L1
R0
R1
R2
1
RC AND RL FIRST-ORDER CIRCUITS
L2
R3
+
υs(t) _
R2
R1
i
L
(a) Circuit
υs(t)
Figure P5.50: Circuit for Problem 5.50.
12 V
5.51 Derive an expression for i2 (t) in the circuit of Fig. P5.51
in terms of the circuit variables, given that Is is a dc current
source and the switch was closed at t = 0 after it had been
open for a long time.
t
0
(b) υs(t) for Problem 5.53
υs(t)
R1
t=0
Rs
Is
R2
i2
12 V
L
0
t (s)
3
(c) υs(t) for Problem 5.54
Figure P5.51: Circuit for Problem 5.51.
υs(t)
5.52
Determine iL (t) in the circuit of Fig. P5.52 for t ≥ 0.
0.4 Vx
+_
1A
10 Ω
0
t=0
+
V
25 Ω
_x
12 V
π/6
π/3
π/2
t (s)
iL
5H
5Ω
Figure P5.52: Circuit for Problem 5.52.
*5.53 In the circuit of Fig. P5.53(a), R1 = R2 = 20 �,
R3 = 10 �, and L = 2.5 H. Determine i(t) for t ≥ 0 given
that υs (t) is the step function described in Fig. P5.53(b).
(d) υs(t) for Problem 5.55
Figure P5.53: Circuit and excitation voltages for Problems
5.53 to 5.55.
5.54 Repeat Problem 5.53 for the triangular-source excitation
given in Fig. P5.53(c).
eax
Hint :
xeax dx = 2 (ax − 1).
a
PROBLEMS
323
5.55 Repeat Problem 5.53 for the sinusoidal-source excitation
υs (t) = 12 sin 6t V displayed in Fig. P5.53(d).
Hint :
eax sin bx dx = eax
υi
12 V
[a sin bx − b cos(bx)]
.
a 2 + b2
0 2
4
6
8 10 12
t (s)
-12 V
*5.56 The switch in the circuit of Fig. P5.56 was moved from
position 1 to position 2 at t = 0, after it had been in position 1
for a long time. If L = 80 mH, determine i(t) for t ≥ 0.
1
(a) Waveform of υi(t)
50 kΩ
2 μF
_
+
υi
2
Vcc = 6 V
t=0
10 mA
20 Ω
i
40 Ω
(b) Op-amp circuit
20 mA
L
Figure P5.59: Waveform and circuit for Problem 5.59.
Figure P5.56: Circuit for Problems 5.56 and 5.57.
*5.60 Relate υout to υi in the circuit of Fig. P5.60.
υi
+
_
5.57 Repeat Problem 5.56, but with the switch having been
in position 2 and then moved to position 1 at t = 0.
0
υout
Figure P5.60: Circuit for Problem 5.60.
6Ω
i
+
_
C
R
5.58 Determine i(t) for t ≥ 0 due to the rectangular-pulse
excitation in the circuit of Fig. P5.58.
16 V
υout
8 mH
12 Ω
5.61 Develop the relationship between the output voltage υout
and the input voltage υi for the circuit in Fig. P5.61.
4 ms
Figure P5.58: Circuit for Problem 5.58.
R
υi
R
_
C
+
υout
Section 5-6: RC Op-Amp Circuits
Figure P5.61: Circuit for Problem 5.61.
5.59 The input-voltage waveform shown in Fig. P5.59(a) is
applied to the circuit in Fig. P5.59(b). Determine and plot the
corresponding υout (t).
5.62 Relate υout to υi in the circuit of Fig. P5.62. Assume
υC = 0 at t = 0.
324
CHAPTER 5
C
R1
υi
R2
C
_
*5.63 Relate iout (t) to υi (t) in the circuit of Fig. P5.63.
Evaluate it for υC (0) = 3 V, R = 10 k�, C = 50 μF, and
υi (t) = 9 u(t) V.
+
_
C
iout
υC
R
+
_
_
+
υout
Figure P5.65: Circuit for Problem 5.65.
5.66 Design a single op-amp circuit with a 40 μF capacitor
to generate a circuit output given by
υout (t) =
t
0
�
�
[6 − 2υs (t )] dt = 6t − 2
υs (t � ) dt �
(V),
0
υout = −100
t
υi dt,
0
1 mF
with υout (0) = 0 at t = 0. You are limited to one op-amp, one
capacitor that does not exceed 0.1 F, and any resistor(s) of your
choice.
2 kΩ
5.68 The two-stage op-amp circuit in Fig. P5.68 is driven
by an input step voltage given by υi (t) = 10 u(t) mV. If
Vcc = 10 V for both op amps and the two capacitors had no
charge prior to t = 0, determine and plot:
*(a) υout1 (t) for t ≥ 0;
(b) υout2 (t) for t ≥ 0.
_
+
12u(t) V
υout
5 kΩ
4 μF
Figure P5.64: Circuit for Problem 5.64.
5.65
t
5.67 Design a circuit that can perform the following
relationship between its output and input voltages:
Determine υout (t) in the circuit of Fig. P5.64 for t ≥ 0.
1 kΩ
R2
where υs (t) is any input voltage source that starts at t = 0.
Figure P5.63: Circuit for Problem 5.63.
5.64
R3
υs(t) = Au(t)
Figure P5.62: Circuit for Problem 5.62.
Vcc = 12 V
R1
υout
+
υi
RC AND RL FIRST-ORDER CIRCUITS
υi 5 kΩ
+
In the circuit of Fig. P5.65:
(a) Derive an expression for υout (t) for t ≥ 0 in terms of R1 ,
R2 , R3 , C, and A.
*(b) Evaluate the expression for R1 = 1 k�,
R3 = 2 k�, C = 0.25 mF, and A = 12 V.
_
R2 = 5 k�,
5 μF
υout1 1 MΩ
Vcc = 10 V
_
+
υout2
Vcc = 10 V
Figure P5.68: Op-amp circuit for Problem 5.68.
PROBLEMS
325
υ
R
C
R
_
R
+
υ1
R
_
R
+
υ2
_
R
+
υ3
2R
R
υs
_
+
υ4
Figure P5.71: Circuit for Problem 5.71.
5.69 Design a single op-amp circuit that can perform the
operation
t
υout = − (5υ1 + 2υ2 + υ3 ) dt.
0
5.70 Design a single op-amp circuit that can perform the
operation
t υ2
υ3 υ1
+
+
dt.
iout = −
100 200 400
0
5.71 Show that the op-amp circuit in Fig. P5.71 (in which
R = 10 k� and C = 20 μF) simulates the differential equation
dυ
+ 5υ = 10υs .
dt
5.72 Design an op-amp circuit that can solve the differential
equation
dυ
+ 0.2υ = 4 sin 10t
dt
with υ(0) = 0. Hint: See Problem 5.71.
t=0
+
2.5 V _
S1
Sections 5-7 and 5-8: Parasitic Capacitance and Multisim
Analysis
*5.73 In real transistors, both the MOSFET gain g and parasitic
p
capacitances CDn and CD depend on the size of the transistor.
Assuming the functional relationships
g = 106 W
p
CDn = CD = (2.5 × 103 )W 2 ,
where W is the transistor width in meters, how small should W
be in order for the CMOS inverter to have a fall time of 1 ns?
[The width of modern digital MOSFETs varies between 40 nm
and 4 μm.]
5.74 Draw and simulate in Multisim the circuit in Fig. 5-43(a)
of Example 5-15. Using the Grapher tool, plot υout (t) for t ≥ 0.
5.75 Consider the circuit in Fig. P5.75. Switch S1 begins in
the closed position and opens at t = 0. Switch S2 begins in the
open position and toggles between the open and closed positions
every 250 ps. Model this circuit in Multisim and plot υ0 and υ1
as a function of time until all nodes are discharged below 1 mV.
S2
1 kΩ
5 fF
and
10 kΩ
υ0
Figure P5.75: Circuit for Problem 5.75.
5.5 kΩ
20 fF
υ1
326
CHAPTER 5
R1
R1
R1
C1
C1
R1
RC AND RL FIRST-ORDER CIRCUITS
R1
C1
+
C1
υout1
C1
_
R2
+
υs(t) _
R2
R2
C2
C2
R2
R2
C2
+
C2
υout2
C2
_
Figure P5.76: Circuit for Problem 5.76 with R1 = R2 = 10 �, C1 = 7 pF, and C2 = 5 pF.
1V
+
t=0
+
5.76 A step voltage source υs (t) sends a signal down two
transmission lines simultaneously (Fig. P5.76). In Multisim,
the step voltage may be modeled as a 1 V square wave with a
period of 10 ns. Model the circuit in Multisim and answer the
following questions:
υc
_
υa
5 fF
Ω
1 fF
1
kΩ
M
5
(b) By how much?
Hint: When using cursors in the Grapher View, select a trace,
then right-click on a cursor and select Set Y Value, and enter
750 m. This will give you the exact time point at which that
trace equals 0.75 V.
_
3.
(a) If a detector registers a signal when the output voltage
reaches 0.75 V, which signal arrives first?
10 kΩ
_
5.77 Consider the delta topology in Fig. P5.77. Use Multisim
to generate response curves for υa , υb , and υc . Apply Transient
Analysis with TSTOP = 3 × 10−10 s.
2 fF
υb
+
Figure P5.77: Circuit for Problem 5.77.
5.78 Use Multisim to generate a plot for current i(t) in the
circuit in Fig. P5.78 from 0 to 15 ms.
5.79 Construct the integrator circuit shown in Fig. P5.79, using a 3-terminal virtual op amp. Print the output corresponding
to each of the following input signals:
(a) υin (t) is a 0-to-1 V square wave with a period of 1 ms and
a 50 percent duty cycle. Plot the output from 0 to 10 ms.
(b) υin (t) = −0.2t V. Plot the output from 0 to 50 ms.
L1
R1
υs(t) = [−5u(-t) + 5u(0.003 − t)] V
+
_
90 Ω
i
500 mH
R2
Figure P5.78: Circuit for Problem 5.78.
220 Ω
0.1u(t − 0.003) A
PROBLEMS
327
υ(t)
C1
υin
R1
100 Ω
_
+
8e−(t − 0.02)/0.008 V
for t > 0.02 s
8V
100 μF
υout
Figure P5.79: Circuit for Problem 5.79.
0
10
20
30
40
50
t (ms)
Figure m5.1 Voltage waveform for Problem m5.1.
Potpourri Questions
5.80 Calculate the plate area required to store 1 MJ of energy
in a traditional air-filled parallel plate capacitor at a voltage of
10 V. Assume the plate separation to be 1 cm.
(b) Determine the time at which the inductor current reaches
its maximum value.
5.81 What are the advantages and disadvantages of supercapacitors relative to a lithium-ion battery?
(c) Calculate the total peak-to-peak range of inductor current;
i.e., the maximum value minus the minimum value.
5.82 Is the memory stored on a hard disk drive volatile or
nonvolatile? What is the advantage of perpendicular magnetic
recording over the standard recording method?
5.83 How does the proximity of a finger change the
capacitance of a pixel in a touchscreen? How does the MEMS
capacitor measure the acceleration of a moving vehicle?
Integrative Problems: Analytical / Multisim / myDAQ
To master the material in this chapter, solve the following problems using three complementary approaches: (a) analytically,
(b) with Multisim, and (c) by constructing the circuit and using
the myDAQ interface unit to measure quantities of interest
via your computer. [myDAQ tutorials and videos are available
.]
on
m5.1 Capacitors: The voltage υ(t) across a 10 μF capacitor
is given by the waveform shown in Fig. m5.1.
(a) Determine the equation for the capacitor current i(t) and
plot it over the time period from 0 to 50 ms.
(b) Calculate the values of the capacitor current at times 0, 25,
and 30 ms.
m5.2 Inductors: The voltage υ(t) across a 33 mH inductor
is given by the sinusoidal pulse waveform shown in Fig. m5.2.
(a) Determine the equation for the inductor current i(t) and
plot it over the time period from 0 to 0.4 ms. Assume zero
initial inductor current.
υ(t)
9V
0
0.1
0.2
0.3
0.4
t (ms)
−9 V
Figure m5.2 Voltage waveform for Problem m5.2.
m5.3 Response of the RC Circuit: Figure m5.3(a) shows
a resistor-capacitor circuit with a pair of switches and
Fig. m5.3(b) shows the switch opening-closing behavior
as a function of time. The initial capacitor voltage is
−9 V. Component values are R1 = 10 k�, R2 = 3.3 k�,
R3 = 2.2 k�, C = 1.0 μF, V1 = 9 V, and V2 = −15 V.
(a) Determine the equation that describes υ(t) over the time
range 0 to 50 ms.
(b) Plot υ(t) over the time range 0 to 50 ms.
(c) Determine the values of υ(t) at the times 5, 15, 25, 35, and
45 ms.
328
CHAPTER 5
R1
V1
Sw1
Rs
R3
Sw2
+
+
_
υ(t)
_
+
_ V2
R2
C
RC AND RL FIRST-ORDER CIRCUITS
Vbatt
Rw
+
_
+
υ(t)
L
_
Rload
(a) Circuit
Sw1
Figure m5.4 Circuit for Problem m5.4.
Closed
Open
10
20
30
40
t (ms)
50
(a) Determine the load voltage υ after the switch had been
closed for a long time.
Sw2
Closed
Open
Resistor Rs models the finite resistance of an electronic
analog switch and Rw models the finite winding resistance of
the inductor. Component values are: Rs = 16 �, Rw = 90 �,
Rload = 680 �, L = 33 mH, and Vbatt = 1.5 V.
(b) Determine the equation that describes υ(t) after the switch
opens at time t = 0.
10
20
30
40
t (ms)
50
(b)
(c) Determine the magnitude of the peak value of υ(t). How
many times larger is this value compared to the battery
voltage Vbatt ?
(d) State the value of the circuit time constant τ with the switch
open. Plot υ(t) over the time range −τ ≤ t ≤ 5τ .
Figure m5.3 Voltage waveform for Problem m5.3.
m5.4 Response of the RL Circuit: The circuit of Fig. m5.4
demonstrates how an inductor can produce a high-voltage pulse
across a load resistor Rload that is considerably higher than
the circuit’s power supply Vbatt , a 1.5 V “AA” battery. Highvoltage pulses drive photo flash bulbs, strobe lights, and cardiac
defibrillators, as examples.
m5.5 RC Differentiator: The circuit in Fig. m5.5 is a
differentiator. Find υout (t), given that υs (t) is a 300 Hz sinusoid
with an amplitude of 3 V. You will need to use the myDAQ’s
Function Generator and Oscilloscope for this problem.
m5.6 RC Integrator: The circuit in Fig. m5.6 is an RC
integrator circuit. Find υout (t), given that υs (t) is a 100 Hz
sinusoid with an amplitude of 5 V. You will need to use
the myDAQ’s Function Generator and Oscilloscope for this
problem.
1 kΩ
C1
~
υs(t) = 3 cos(600πt) V +
−
1 μF
_
+
R1 10 kΩ
Figure m5.5 A differentiator circuit.
+
υout(t)
_
PROBLEMS
329
C1
R1
~
υs(t) = 5 cos(200πt) V +
−
100 kΩ
1 μF
_
+
R2 1 kΩ
Figure m5.6 Circuit for Problem m5.6.
+
υout(t)
_
6
6
CHAPTER
C H A P T E R
RLC Circuits
Contents
6-1
6-2
TB15
6-3
6-4
6-5
6-6
6-7
TB16
6-8
TB17
6-9
Overview, 331
Initial and Final Conditions, 331
Introducing the Series RLC Circuit, 334
Micromechanical Sensors and Actuators, 337
Series RLC Overdamped Response
(a > ω0 ), 341
Series RLC Critically Damped Response
(a = ω0 ). 346
Series RLC Underdamped Response
(a < ω0 ), 348
Summary of the Series RLC Circuit
Response, 349
The Parallel RLC Circuit, 353
RFID Tags and Antenna Design, 356
General Solution for Any Second-Order
Circuit with dc Source, 359
Neural Stimulation and Recording, 363
Multisim Analysis of Circuits Response, 369
Summary, 373
Problems, 374
Objectives
Learn to:
Analyze series and parallel RLC circuits containing dc sources and switches.
Analyze RC op-amp circuits.
Understand RFID circuits.
To receiver circuits
R
T
υout(t)
~+− υ
s
RFID transceiver
Ls
Magnetic field
Lp C p
υC
RFID tag
Rp
6-1
INITIAL AND FINAL CONDITIONS
Overview
In this chapter we evaluate the operation of second-order
RLC circuits—those with any combination of two inductors
and/or capacitors—in response to dc sources (the response
of RLC circuits to ac sources is covered in Chapter 7).
These circuits are particularly interesting because they allow
us to design oscillators and resonators for communication
and wireless power transmission systems, or to create
sensors that use the oscillation or resonance to detect
capacitive (usually) or inductive (rarely) changes caused by
environmental parameters (moisture, pressure, proximity, etc.).
One particularly interesting example is wireless power transfer
for radiofrequency ID (RFID) systems, as described in Section
6-9 and Technology Brief 16. Using two inductors and a
capacitor, the current in one loop is converted into voltage in
the capacitor, that can then be used to power the RFID circuit.
The currents and voltages of the first-order RC and
RL circuits we examined in the preceding chapter were
characterized by first-order differential equations. A key
provision of a first-order circuit is that it is reducible to a
single series or parallel circuit containing a single capacitor
or a single inductor, in addition to sources and resistors. If a
circuit contains two capacitors, as in Fig. 6-1(a), and if the
circuit architecture is such that it is not possible to combine the
two capacitors into a single in-series or in-parallel equivalent,
then the circuit does not qualify as a first-order circuit. The
two-capacitor circuit is a second-order circuit characterized by
a second-order differential equation. The same is true for the
two-inductor circuit in part (b) and for the series and parallel
RLC circuits shown in parts (c) and (d) of the same figure.
A second-order circuit may contain any combination of
two energy-storage elements (2 capacitors, 2 inductors, or
one of each), provided like-elements cannot be replaced
with a single-element equivalent. In general, the order of a circuit, and hence the order
of the differential equation describing any of its currents or
voltages, is governed by the number of irreducible storage
elements (capacitors and inductors) contained in the circuit.
The complexity of the solution depends on the order of the
differential equation and the character of the excitation source.
In this chapter we examine the response of series and parallel
RLC circuits to dc excitations, and we do so by solving
their differential equations in the time domain. Time-domain
solutions are reasonably tractable, so long as the forcing
function is a dc source or a rectangular pulse, and the differential
equation describing the voltages and currents in the circuit is
331
not higher than second order. For more complicated circuits, a
more robust method of solution is called for, such as the Laplace
transform analysis technique introduced in Chapter 12, which is
perfectly suited to deal with a wide range of circuits and any type
of realistic forcing function, including pulses and sinusoids.
6-1 Initial and Final Conditions
The general form of the solution of the differential equation
associated with a second-order circuit always includes a number
of unknown constants. To determine the values of these
constants, we usually match the solution to known values of
the voltage or current under consideration. For a circuit where
the solution we seek is for the time period following a sudden
change (such as when a SPST switch is closed or opened, or
when a SPDT switch is moved from one terminal to another)
R1
υs
+
_
t=0
R2
C1
(a)
C2
2 capacitors
R1
υs
+
_
t=0
R2
L1
(b)
L2
2 inductors
L
R
υs
+
_
t=0
C
(c)
is
(d)
Series RLC
+
_
t=0
R
L
C
Parallel RLC
Figure 6-1: Examples of second-order circuits.
332
CHAPTER 6
we can analyze the circuit conditions at the beginning and at
the end of that time period and then use the results to match
the solution of the differential equation. We call the process
invoking initial and final conditions.
Analyzing a circuit in its initial and final states relies on the
following fundamental properties:
R2
iL
R1
Vs
+
+
__
Example 6-1: Initial and Final Values
The circuit in Fig. 6-2(a) contains dc source Vs and a switch that
had been in position 1 for a long time prior to t = 0. Determine:
(a) initial values υC (0) and iL (0), (b) iC (0) and υL (0), and (c)
final values υC (∞) and iL (∞).
Solution: (a) To determine υC (0) and iL (0), we analyze
the circuit configuration at t = 0− (before moving the switch),
whereas to determine iC (0) and υL (0), we analyze the circuit
configuration at t = 0 (after moving the switch). At t = 0− , the
circuit is equivalent to the arrangement shown in Fig. 6-2(b),
in which C has been replaced with an open circuit and L with
a short circuit. Because the circuit contains no closed loops,
no current flows anywhere in the circuit. With no voltage drop
across R1 , it follows that
+
+
_υC
C
L
υL
_
t=0
• The voltage υC across a capacitor cannot change
instantaneously, and neither can the current iL through
an inductor.
• In circuits containing dc sources, the steady state
condition of the circuit (after all transients have died out)
is such that no currents flow through capacitors and no
voltages exist across inductors, allowing us to represent
capacitors as open circuits and inductors as short circuits
under steady state conditions. RLC CIRCUITS
1
2
(a) Circuit
R2
iL(0−) = 0
R1
Vs
C
+
+
__
1
+ −
_υC(0 ) = Vs
L
2
0−,
C acts like an open circuit
(b) At t =
and L like a short circuit
R2
iL
iC
C
+
_ Vs
L
iL(0) = 0
2
(c) At t = 0, C acts like a voltage source and
L like a current source with zero current
Figure 6-2: Circuit of Example 6-1.
υC (0− ) = Vs .
Also,
−
iL (0 ) = 0.
Time-continuity of υC and iL mandates that after moving the
switch to terminal 2:
υC (0) = υC (0− ) = Vs ,
iL (0) = iL (0− ) = 0.
(b) The circuit in Fig. 6-2(c) depicts the state of the circuit
at t = 0 (after moving the switch). The capacitor behaves like
a dc voltage source of magnitude Vs , and the inductor behaves
like a dc current source with zero current, which is equivalent to
an open circuit. Even though in general there is no requirement
disallowing a sudden change in iC , in this case iC = iL and
iL (0) = 0.
Consequently,
iC (0) = 0.
6-1
INITIAL AND FINAL CONDITIONS
333
I0 u(t)
R2
iL
R1
R3
+
+
__
C
(a)
+
_υC
R1
V0
+
+
__
I0
R1
V0
(c)
_
2
R2
iR3(0)
iL(0) = 2 A
R3
+
+
__
iC(0)
C
+
_ υC(0) = 12 V
At t = 0
i2
iL( )
8
υL(0)
+
L
R1
V0
R3
i1
+
+
__
+
υC( )
_
At t =
(d)
8
i1(0)
_
At t = 0−
I0
1
+
C υC(0−) = 12 V
R3
(b)
R2
iC(0−) = 0
8
V0
iL(0−) = 2 A
R2
L
Figure 6-3: Circuit for Example 6-2.
With no voltage drop across R2 , the voltage across the inductor
is
C = 8 mF. Determine: (a) υC (0) and iL (0), (b) iC (0) and υL (0),
and (c) υC (∞) and iL (∞).
υL (0) = υC (0) = Vs .
Solution: (a) To find initial values of υC and iL at t = 0, we
have to determine their values at t = 0− , and then invoke the
requirement that neither the voltage across a capacitor nor the
current through an inductor can change in zero time. The state
of the circuit at t = 0− is shown in Fig. 6-3(b), wherein the
inductor has been replaced with a short circuit, the capacitor
replaced with an open circuit, and the current source is absent
altogether. Since iC (0− ) = 0,
(c) The analysis for υC and iL as t → ∞ is totally
straightforward; with no active sources remaining in the part
of the circuit that contains L and C, all of the energy that may
have been stored in L and C will have dissipated completely
by t = ∞, rendering the circuit inactive. Hence,
υC (∞) = 0,
iL (∞) = 0.
iL (0− ) =
Example 6-2: Initial and Final Conditions
The circuit in Fig. 6-3(a) contains a dc voltage source and a
step-function current source. The element values are V0 = 24 V,
I0 = 4 A, R1 = 2 , R2 = 4 , R3 = 6 , L = 0.2 H, and
and
Hence,
V0
= 2 A,
R1 + R 2 + R 3
υC (0− ) = iL (0− ) R3 = 12 V.
iL (0) = iL (0− ) = 2 A,
334
CHAPTER 6
and
υC (0) = υC (0− ) = 12 V.
RLC CIRCUITS
Concept Question 6-3: What role do initial and final
values play in the solution of a circuit? (See
)
(b) At t = 0, the state of the circuit is as shown in Fig. 6-3(c).
Since
it follows that
υR3 (0) = υC (0) = 12 V,
12
= 2 A.
6
We did this because we need iC (0). Application of KCL at
node 2 leads to
Exercise 6-1: For the circuit in Fig. E6.1, determine
υC (0), iL (0), υL (0), iC (0), υC (∞), and iL (∞).
υL (0) = −8 V.
(c) The state of the circuit at t = ∞ shown in Fig. 6-3(d)
resembles that at t = 0− , except that now we also have the
current source I0 . The mesh equation for loop 1 is
−V0 + R1 i1 + R2 (i1 − i2 ) + R3 i1 = 0,
and for loop 2,
Solving for i1 gives
Figure E6.1
which leads to
Answer: υC(0) = 6 V,
iL(0) = 1 A, υL(0) = −6 V,
iC(0) = 0, υC(∞) = 0, iL(∞) = 0. (See C3 )
Exercise 6-2: For the circuit in Fig. E6.2, determine
υC (0), iL (0), υL (0), iC (0), υC (∞), and iL (∞).
iL
iL (∞) = i1 − I0 = 3.33 − 4 = −0.67 A
and
υC (∞) = i1 R3 = 3.33 × 6 = 20 V.
Concept Question 6-1: Determination of initial circuit
conditions after a sudden change relies on two
fundamental properties of capacitors and inductors. What
are they? (See
)
Concept Question 6-2: Under dc steady state conditions,
does a capacitor resemble an open circuit or a short
circuit? What does an inductor resemble? (See
)
υL
υC
C
4Ω
L
iC
i2 = I0 = 4 A.
i1 = 3.33 A,
υC
C
6Ω
t=0
Next, we need to determine υL (0). At node 1,
By applying KVL around the lower left loop, we find that
iC
L
+
10 V _
iC (0) = I0 + iL (0) − iR3 (0) = 4 + 2 − 2 = 4 A.
i1 (0) = I0 + iL (0) = 4 + 2 = 6 A.
iL
υL
4Ω
iR3 (0) =
2Ω
t=0
+
_ 12 V
Figure E6.2
Answer: υC(0) = 0, iL(0) = 0, υL(0) = −12 V,
)
iC(0) = 0, υC(∞) = 4 V, iL(∞) = −2 A. (See
6-2 Introducing the Series RLC
Circuit
6-2.1
Charging-Up Mode
The circuit in part (a) of Fig. 6-4 depicts a scenario in which
a series RLC circuit with no stored energy is connected to a
dc voltage source Vs at t = 0. After closing the switch, charge
supplied by the source starts to flow to the (+) voltage terminal
of the capacitor, and continues to do so until the capacitor
reaches the maximum voltage possible, namely Vs . Hence, our
expectation is that υC (t) will start at zero at t = 0 and then
build up to reach Vs as t → ∞. The specific path it takes,
6-2
INTRODUCING THE SERIES RLC CIRCUIT
335
υC(t)
L
R
Vs
+
_
Critically damped (α = ω0)
iC
t=0
24 V
C
Underdamped (α < ω0)
Vs = 24
υC
Overdamped
(α > ω0)
υC(0−) = 0
0
0.05
(a) Charging up C
Vs
+
_
2
24
20
L
R
0.15
0.2
t (s)
(b) Responses
υC(t)
1
0.1
t=0
C
υC
(c) Discharging C
Overdamped (α > ω0)
10
0
υC(0−) = 24 V
Underdamped (α < ω0)
Critically damped (α = ω0)
0
0.05
0.1
0.15
0.2
t (s)
−10
(d) Responses
Figure 6-4: Illustrating the charge-up and discharge responses of a series RLC circuit with Vs = 24 V. In all cases R = 12 � and L = 0.3 H,
which specifies α = R/2L = 20 Np/s. When C = 0.01 F, the response is overdamped, when C = 8.33 mF, the response is critically damped,
and when C = 0.72 mF, the response is underdamped.
however, depends on the relative magnitudes of two important
parameters. These are:
damping coefficient α =
R
2L
resonant frequency ω0 = √
(Np/s),
1
LC
(rad/s).
(6.1a)
Figure 6-4(b) displays three different response curves for
υC (t), labeled as follows:
Overdamped response
Critically damped response
Underdamped response
α > ω0 ,
α = ω0 ,
α < ω0 .
(6.1b)
(series RLC)
The parameter α is measured in nepers/second (Np/s) and ω0 is
an angular frequency, measured in radians per second (rad/s).
The magnitudes of the two parameters are specified by the
values chosen for R, L, and C.
The critically damped response represents the fastest smooth
path for υC (t) between its initial and final values. In comparison,
the overdamped response is slower than the underdamped
response, which starts out faster but exhibits an oscillatory
(ringing) behavior. The mathematical solutions for all three
cases are presented in detail in forthcoming sections. The intent
is to provide an overview of how υC (t) varies with time under
these various scenarios.
336
CHAPTER 6
L
R
+
_
C
(0−)
υC
= 12 V
+
_
t=0
24 V
C
i
R
+
_ 24
V
C
(b) After t = 0
R
L
24 V
i
L
R
L
C
+
_
υC(0−)
= 36 V
(a) At t = 0−
(a) At t = 0−
i=0
L
R
t=0
24 V
RLC CIRCUITS
υC increases
from 12 V to
reach 24 V
after a long
time
+
_
24 V
(b) After t = 0
R
C
υC(∞) = 24 V
υC decreases
from 36 V to
reach 24 V
after a long
time
+
_
L
24 V
i=0
C
υC(∞) = 24 V
(c) Long after closing the switch
(c) Long after closing the switch
Figure 6-5: Connecting a series RLC circuit with a charged-up
capacitor to a source with higher voltage.
Figure 6-6: Connecting a series RLC circuit with a charged-up
capacitor to a source with lower voltage.
6-2.2 Discharging Mode
If instead of starting out with an uncharged RLC circuit, we
were to start with a fully charged capacitor, as depicted by the
circuit in Fig. 6-4(c), and then discharge it by moving the SPDT
switch from terminal 1 to terminal 2, the voltage υC (t) across the
capacitor will decay from its initial value, Vs , to a final value of
zero volts. The specific path between Vs and zero again depends
on the value of α relative to that of ω0 , as shown in Fig. 6-4(d).
In fact, the three responses of the discharging RLC circuit are
essentially mirror images of those for the charging-up circuit;
the initial and final conditions of the circuit in Fig. 6-4(a) are
the converse of those for the circuit in Fig. 6-4(c). The capacitor
voltage of the charging-up circuit starts at zero and concludes
at 24 V, in contrast to the discharging circuit that starts at 24 V
and concludes at zero.
Now let us consider an RLC circuit in which the capacitor
has 12 V across it (due to some previous charging-up action),
and then a switch is closed to connect the RLC segment to a
source with Vs = 24 V, as shown in Fig. 6-5(a).After closing the
switch (Fig. 6-5(b)), the situation is such that Vs = 24V exceeds
the initial voltage of 12 V across the capacitor. Consequently,
charge will flow to the capacitor to build up its voltage, and
will continue to do so until the capacitor reaches the maximum
possible voltage, namely Vs = 24 V. When it reaches that state,
the current goes to zero (Fig. 6-5(c)).
The scenario in Fig. 6-6 depicts a similar circuit, but one that
starts with a capacitor whose initial voltage υC (0− ) is 36 V,
which is higher than that of Vs = 24 V. In this case, the capacitor
will start to discharge after closing the switch and then continue
to discharge until it reaches 24 V. Thus, in both circuit scenarios,
the capacitor will charge up or discharge down so as to equalize
its voltage to that of the source, Vs . Recall that a short circuit is
equivalent to a voltage source with Vs = 0. Hence, if we connect
an RLC circuit with a charged-up capacitor to a short circuit,
the capacitor will discharge down until it reaches a final voltage
of zero, the same as the scenario depicted in Fig. 6-4(c).
TECHNOLOGY BRIEF 15: MICROMECHANICAL SENSORS AND ACTUATORS
Technology Brief 15
Micromechanical Sensors and
Actuators
Energy is stored in many different forms in the world
around us. The conversion of energy from one form
to another is called transduction. Each of our five
senses, for example, transduces a specific form of
energy into electrochemical signals: tactile transducers
on the skin convert mechanical and thermal energy; the
eye converts electromagnetic energy; smell and taste
receptors convert chemical energy; and our ears convert
the mechanical energy of pressure waves. Any device,
whether natural or man-made, that converts energy
signals from one form to another is a transducer.
Most modern man-made systems are designed to manipulate signals (i.e., information) using electrical energy.
Computation, communication, and storage of information
are examples of functions performed mostly with electrical
circuits. Most systems also perform a fourth class of
signal manipulation: the transduction of energy from the
environment into electrical signals that circuits can use
in support of their intended application. If a transducer
converts external signals into electrical signals, it is called
a sensor. The charge-coupled device (CCD) chip on your
camera is a sensor that converts electromagnetic energy
(light) into electrical signals that can be processed, stored,
and communicated by your camera circuits. Some transducers perform the reverse function, namely to convert a
circuit’s electrical signal into an environmental excitation.
Such a transducer then is called an actuator. The components that deploy the airbag in your car are actuators:
given the right signal from the car’s microcontroller,
the actuators convert electrical energy into mechanical
energy and the airbag is released and inflated.
Microelectromechanical Systems (MEMS)
Micro- and nanofabrication technology have begun to
revolutionize many aspects of sensor and actuator design.
Humans increasingly are able to embed transducers
at very fine scales into their environment. This is
leading to big changes, as our computational elements
are becoming increasingly aware of their environment.
Shipping containers that track their own acceleration
profiles, laptops that scan fingerprints for routine login,
cars that detect collisions, and even office suites that
modulate energy consumption based on human activity
are all examples of this transduction revolution. In this
337
technology brief, we will focus on a specific type of
microscale transducers that lend themselves to direct
integration with silicon ICs. Collectively, devices of
this type are called microelectromechanical systems
(MEMS) or microsystems technologies (MST); the two
names are used interchangeably.
A Capacitive Sensor: The MEMS
Accelerometer
According to Eq. (5.21), the capacitance C of a parallel
plate capacitor varies directly with A, the effective area of
overlap between its two conducting plates, and inversely
with d, the spacing between the plates. By capitalizing on
these two attributes, capacitors can be made into motion
sensors that can measure velocity and acceleration along
x, y, and z.
Figure TF15-1 illustrates two mechanisms for translating motion into a change of capacitance. The first
generally is called the gap-closing mode, while the
second one is called the overlap mode. In the gap-closing
mode, A remains constant, but if a vertical force is applied
onto the upper plate, causing it to be displaced from its
nominal position at height d above the lower plate to a
new position (d − z), then the value of capacitance Cz
will change in accordance with the expression given
in Fig. TF15-1(a). The sensitivity of Cz to the vertical
displacement is given by dCz /dz.
The overlap mode (Fig. TF15-1(b)) is used to measure
horizontal motion. If a horizontal force causes one of
the plates to shift by a distance y from its nominal
position (where nominal position corresponds to a 100
percent overlap), the decrease in effective overlap area
will lead to a corresponding change in the magnitude of
capacitance Cy . In this case, d remains constant, but
the width of the overlapped areas changes from w to
(w − y). The expression for Cy given in Fig. TF15-1(b)
is reasonably accurate (even though it ignores the effects
of the fringing electric field between the edges of the
two plates) so long as y � w. To measure and amplify
changes in capacitance, the capacitor can be integrated
into an appropriate op-amp circuit whose output voltage is
proportional to C. As we shall see shortly, a combination
of three capacitors, one to sense vertical motion and
two to measure horizontal motion along orthogonal axes,
can provide complete information on both the velocity
and acceleration vectors associated with the applied
force. The capacitor configurations shown in Fig. TF15-1
illustrate the basic concept of how a capacitor is used
to measure motion, although more complex capacitor
338
TECHNOLOGY BRIEF 15: MICROMECHANICAL SENSORS AND ACTUATORS
Gap-Closing Mode
Overlap Mode
Nominal position
(no force)
d
Metal
plates
F
z
w
Capacitance:
Sensitivity:
l
εwl
d−z
εwl
dCz
=
dz
(d − z)2
Cz =
y
F
Metal d
plates
l
w
Capacitance:
Sensitivity:
ε(w − y)l
d
dCy
εl
=−
dy
d
Cy =
Figure TF15-1: Basic capacitive measurement modes. For (b), the expressions hold only for small displacements such that
y � w.
geometries also are possible, particularly for sensing
angular motion.
To convert the capacitor-accelerometer concept into a
practical sensor—such as the automobile accelerometer
that controls the release of the airbag—let us consider the
arrangement shown in Fig. TF15-2(b). The lower plate
is fixed to the body of the vehicle, and the upper plate
sits on a plane at a height d above it. The upper plate is
attached to the body of the vehicle through a spring with
a spring constant k. When no horizontal force is acting
on the upper plate, its position is such that it provides a
100 percent overlap with the lower plate, in which case
the capacitance will be a maximum at Cy = εW�/d. If the
vehicle accelerates in the y-direction with acceleration ay ,
the acceleration force Facc will generate an opposing
spring force Fsp of equal magnitude.
Equating the two forces leads to an expression
relating the displacement y to the acceleration ay , as
shown in the figure. Furthermore, the capacitance Cy
is directly proportional to the overlap area �(w − y) and
therefore is proportional to the acceleration ay . Thus, by
measuring Cy , the accelerometer determines the value
of ay . A similar overlap-mode capacitor attached to the
vehicle along the x-direction can be used to measure ax .
Through a similar analysis for the gap-closing mode
capacitor shown in Fig. TF15-2(a), we can arrive at a
functional relationship that can be used to determine the
vertical acceleration az by measuring capacitance Cz .
For example, if we designate the time when the ignition
starts the engine as t = 0, we then can set the initial
conditions on both the velocity u of the vehicle and its
acceleration a as zero at t = 0. That is, u(0) = a(0) = 0.
The capacitor accelerometers measure continuous-time
waveforms ax (t), ay (t), and az (t). Each waveform then can
be used by an op-amp integrator circuit to calculate the
corresponding velocity waveform. For ux , for example,
ux (t) =
t
ax (t) dt,
0
and similar expressions apply to uy and uz .
Commercial MEMS Accelerometers
Figure TF15-3 shows the Analog Devices ADXL202
accelerometer which uses the gap-closing mode to
detect accelerations on a tiny micromechanical capacitor
structure that works on the same principle described
above, although slightly more complicated geometrically.
Commercial accelerometers, such as this one, make use
of negative feedback to prevent the plates from physically
moving. When an acceleration force attempts to move
the plate, an electric negative-feedback circuit applies a
voltage across the plates to generate an electrical force
between the plates that counteracts the acceleration force
exactly, thereby preventing any motion by the plate. The
magnitude of the applied voltage becomes a measure of
the acceleration force that the capacitor plate is subjected
to. Because of their small size and low power consumption, chip-based microfabricated silicon accelerometers
TECHNOLOGY BRIEF 15: MICROMECHANICAL SENSORS AND ACTUATORS
Fsp
339
Spring constant k
Fsp
Facc
w
z
Mass m
d
Facc
y
Spring
d
Fsp = Facc
Facc = Fsp
kz = maz
may = ky
may
y=
k
z=
maz
k
εwl
Cz =
maz
d−
k
(
)
(a) The ADXL202 accelerometer employs many
gap-closing capacitor sensors to detect acceleration.
(Courtesy Analog Devices.)
Cy =
εl(w − y)
=
d
(
εl w −
d
may
k
)
(b) A silicon sensor that uses overlap mode fingers. The
white arrow shows the direction of motion of the moving
mass and its fingers in relation to the fixed anchors. Note
that the moving fingers move into and out of the fixed
fingers on either side of the mass during motion.
(Courtesy of the Adriatic Research Institute.)
Figure TF15-2: Adding a spring to a movable plate capacitor makes an accelerometer.
are used in most modern cars to activate the release
mechanism of airbags.They also are used heavily in many
toy applications to detect position, velocity and acceleration. The Nintendo Wii, for example, uses accelerometers
in each remote to detect orientation and acceleration.
Incidentally, a condenser microphone operates much like
the device shown in Fig. TF15-2(a): as air pressure waves
(sound) hit the spring-mounted plate, it moves and the
change in capacitance can be read and recorded.
A Capacitive Actuator: MEMS Electrostatic
Resonators
Not surprisingly, we can drive the devices discussed
previously in reverse to obtain actuators. Consider again
340
TECHNOLOGY BRIEF 15: MICROMECHANICAL SENSORS AND ACTUATORS
FigureTF15-3: The complete ADXL202 accelerometer chip.The center region holds the micromechanical sensor; the majority
of the chip space is used for the electronic circuits that measure the capacitance change, provide feedback, convert the
measurement into a digital signal, and perform self-tests. (Courtesy of Analog Devices.)
the configuration in Fig. TF15-2(a). If the device is not
experiencing any external forces and we apply a voltage V
across the two plates, an attractive force F will develop
between the plates. This is because charges of opposite
polarity on the two plates give rise to an electrostatic
force between them. This, in fact, is true for all capacitors.
In the case of our actuator, however, we replace the
normally stiff, dielectric material with air (since air is
itself a dielectric) and attach it to a spring as before.
With this modification, an applied potential generates an
electrostatic force that moves the plates.
This basic idea can be applied to a variety of
applications. A classic application is the digital light
projector (DLP) system that drives most digital projectors
used today. In the DLP, hundreds of thousands of
capacitor actuators are arranged in a 2-D array on a
chip, with each actuator corresponding to a pixel on
an image displayed by the projector. One capacitive
plate of each pixel actuator (which is mirror smooth
and can reflect light exceedingly well) is connected
to the chip via a spring. In order to brighten or
darken a pixel, a voltage is applied between the
plates, causing the mirror to move into or out of
the path of the projected light. These same devices have been used for many other applications,
including microfluidic valves and tiny force sensors
used to measure forces as small as a zeptonewton
(1 zeptonewton = 10−21 newtons).
6-3
SERIES RLC OVERDAMPED RESPONSE (α > ω0 )
R
Vs
+
_
L
t=0
24 V
and rearranging terms, Eq. (6.2) becomes
iC
C
341
R dυC
Vs
1
d 2 υC
+
+
υC =
.
(6.4)
2
dt
L dt
LC
LC
For convenience, we rewrite Eq. (6.4) in the abbreviated form
υC
υC�� + aυC� + bυC = c,
Figure 6-7: Series RLC circuit connected to a source Vs at
t = 0. In general, the capacitor may have had an initial charge
on it at t = 0− , with a corresponding initial voltage υC (0− ).
6-3
Series RLC Overdamped
Response (α > ω0 )
A key takeaway lesson from the qualitative description given
in the preceding section is that after closing the switch in a
series RLC circuit, the voltage across the capacitor will charge
up or discharge down to equalize to the voltage across the
source. In this section, we derive the differential equation for
the series RLC circuit in Fig. 6-7 and then solve it to obtain
an expression for υC (t) for t ≥ 0, with t = 0 designated as the
time immediately after the switch is closed.
As noted in the preceding section, the nature of the solution
for υC (t) depends on how the magnitude of the damping
coefficient α compares with that of the resonant frequency ω0 .
The values of the two parameters are dictated by the values of
R, L, and C, per the expressions in Eq. (6.1). In the present
section, we consider the case corresponding to α > ω0 , which
is called the overdamped response. The other two cases are
treated in follow-up sections.
For the circuit in Fig. 6-7, the KVL loop equation for t ≥ 0
(after closing the switch) is
RiC + L
diC
+ υC = Vs
dt
(for t ≥ 0),
(6.2)
where iC and υC are the current through and voltage across the
capacitor. The capacitor may or may not have had charge on
it. If it had, we denote the value of the initial voltage across it
υC (0), which is the same as υC (0− ), the voltage across it before
closing the switch (since the voltage across a capacitor cannot
change instantaneously).
By incorporating the relation
dυC
iC = C
,
dt
where
R
1
Vs
,
b=
,
c=
.
(6.6)
L
LC
LC
The second-order differential equation given by Eq. (6.5) is
specific to the capacitor voltage of the series RLC circuit of
Fig. 6-7, but the form of the equation is equally applicable to
any current or voltage in any second-order circuit (although the
values of the constants a, b, and c are different for different
circuits). The same is true for the general form of the solution
of the differential equation.
a=
6-3.2
Solution of Differential Equation
The general solution of the second-order differential equation
given by Eq. (6.5) consists of two components:
υC (t) = υtr (t) + υss (t),
(6.3)
(6.7)
where υtr (t) is the transient (also called homogeneous solution
of Eq. (6.5) or the natural response of the RLC circuit)
and υss (t) is the steady-state solution (also called particular
solution). The transient solution is the solution of Eq. (6.5)
under source-free conditions; i.e., with Vs = 0, which means
that c = Vs /LC also is zero. Thus υtr (t) is the solution of
υtr�� + aυtr� + bυtr = 0
6-3.1 Differential Equation
(6.5)
(source-free).
(6.8)
The steady-state solution υss (t) is related to the forcing function
on the right-hand side of Eq. (6.5), and its functional form is
similar to that of the forcing function. Since in the present case,
the forcing function c is simply a constant, so is υss (t). That is,
υss (t) is a non–time-varying constant υss that will be determined
later from initial and final conditions. Moreover, as we will see
shortly, the transient component υtr (t) always goes to zero as
t → ∞ (that’s why it is called transient). Hence, as t → ∞,
Eq. (6.7) reduces to
υC (∞) = υss ,
(6.9)
in which case Eq. (6.7) can be rewritten as
υC (t) = υtr (t) + υC (∞).
Our remaining task is to determine υtr (t).
(6.10)
342
CHAPTER 6
When differentiated, the exponential function est replicates
itself (within a multiplying factor), so it is often offered as
a candidate solution when solving homogeneous differential
equations. Thus, we assume that
υtr (t) = Aest ,
R
a
=
2L
2
1
=b
ω0 = √
LC
α=
(6.11)
(rad/s),
the expressions given by Eq. (6.14) become
s 2 Aest + asAest + bAest = 0,
s2 = −α −
(6.12)
which simplifies to
s 2 + as + b = 0.
(6.13)
Hence, the proposed solution given by Eq. (6.11) is indeed an
acceptable solution so long as Eq. (6.13) is satisfied.
The quadratic equation given by Eq. (6.13) is known as the
characteristic equation of the differential equation. It has two
roots:
s1 = −
a
2
s2 = −
a
2
a 2
−b ,
+
2
a 2
−b .
−
2
(6.14a)
(6.14b)
for t ≥ 0,
(6.15)
where constants A1 and A2 are to be determined shortly.
Inserting Eq. (6.15) into Eq. (6.10) leads to
υC (t) = A1 e
s1 t
+ A2 e
s2 t
+ υC (∞).
(6.16)
The exponential coefficients s1 and s2 are given by Eq. (6.14)
in terms of constants a and b, both of which are defined in
Eq. (6.6). By reintroducing the damping coefficient α and
resonant frequency ω0 , which we defined earlier in Eq. (6.1),
as
(6.17b)
α 2 − ω02 ,
(6.18a)
α 2 − ω02 ,
(6.18b)
The solution in the present section pertains to the overdamped
case corresponding to α > ω0 . Under this condition, both s1
and s2 are real, negative numbers. Consequently, as t → ∞,
the first two terms in Eq. (6.16) go to zero, just as we asserted
earlier.
6-3.3
Invoking Initial Conditions
To determine the values of constants A1 and A2 in Eq. (6.16),
we need to invoke initial conditions, which means that we need
to use information available to us about the values of υC and its
time derivative υC� , both at t = 0. Since
iC (t) = C
Since the values of a and b are governed by the values of only
the passive components in the circuit, so are the values of s1
and s2 . Strictly speaking, the unit of s1 and s2 is 1/second, but
it is customary to add the dimensionless neper to the units of
quantities that appear in exponential functions. Hence, s1 and s2
are measured in nepers/second (Np/s).
The existence of two distinct roots implies that Eq. (6.8) has
two viable solutions, one in terms of es1 t and another in terms
of es2 t . Hence, we should generalize the form of our solution to
υtr (t) = A1 es1 t + A2 es2 t
(6.17a)
(Np/s),
where A and s are constants to be determined later. To ascertain
that Eq. (6.11) is indeed a viable solution of Eq. (6.8), we
insert the proposed expression for υtr (t) and its first and second
derivatives in Eq. (6.8). The result is
s1 = −α +
RLC CIRCUITS
dυC
= C υ � (t),
dt
(6.19)
the second requirement is equivalent to needing to know iC (0).
At t = 0, Eq. (6.16) simplifies to
υC (0) = A1 + A2 + υC (∞),
(6.20)
and
dυC = C(s1 A1 es1 t + s2 A2 es2 t )t=0
iC (0) = C
dt t=0
= C(s1 A1 + s2 A2 ).
(6.21)
Simultaneous solution of Eqs. (6.20) and (6.21) for A1 and A2
gives
A1 =
A2 =
1
C iC (0) − s2 [υC (0) − υC (∞)]
s1 − s 2
,
(6.22a)
1
C iC (0) − s1 [υC (0) − υC (∞)]
s2 − s 1
.
(6.22b)
This concludes the general solution for the overdamped
response. A summary of relevant expressions is available in
Table 6-1.
6-3
SERIES RLC OVERDAMPED RESPONSE (α > ω0 )
343
Table 6-1: Step response of RLC circuits for t ≥ 0.
Series RLC
R
Input: dc
circuit
with switch
action
at t = 0
Parallel RLC
L
C
υC
Input: dc
circuit
with switch
action
at t = 0
Total Response
R
L
C
Total Response
Overdamped (α > ω0 )
Overdamped (α > ω0 )
υC (t) = A1 es1 t + A2 es2 t + υC (∞)
iL (t) = A1 es1 t + A2 es2 t + iL (∞)
1 i (0) − s [υ (0) − υ (∞)]
C
2 C
C
A1 = C
s1 − s 2
1
iC (0) − s1 [υC (0) − υC (∞)]
A2 = C
s2 − s 1
Critically Damped (α = ω0 )
1 υ (0) − s [i (0) − i (∞)]
L
2 L
L
A1 = L
s1 − s 2
1 υ (0) − s [i (0) − i (∞)]
L
1 L
L
A2 = L
s2 − s 1
Critically Damped (α = ω0 )
υC (t) = (B1 + B2 t)e−αt + υC (∞)
iL (t) = (B1 + B2 t)e−αt + iL (∞)
B1 = υC (0) − υC (∞)
B1 = iL (0) − iL (∞)
B2 = C1 iC (0) + α[υC (0) − υC (∞)]
1 υ (0) + α[i (0) − i (∞)]
B2 = L
L
L
L
Underdamped (α < ω0 )
Underdamped (α < ω0 )
υC (t) = e−αt (D1 cos ωd t + D2 sin ωd t) + υC (∞)
α=
iL
iL (t) = e−αt (D1 cos ωd t + D2 sin ωd t) + iL (∞)
D1 = υC (0) − υC (∞)
D1 = iL (0) − iL (∞)
1 i (0) + α[υ (0) − υ (∞)]
C
C
C
D2 = C
ωd
1 υ (0) + α[i (0) − i (∞)]
L
L
L
D2 = L
ωd
Auxiliary Relations
⎧
R
⎪
⎪
⎨ 2L
⎪
⎪
⎩ 1
2RC
s1 = −α +
Series RLC
Parallel RLC
α 2 − ω02
Example 6-3: Charging Up Capacitor with No Prior
Charge
Given that in the circuit of Fig. 6-8(a), Vs = 16 V, R = 64 ,
L = 0.8 H, and C = 2 mF, determine υC (t) and iC (t) for t ≥ 0.
The capacitor had no charge prior to t = 0.
1
ω0 = √
LC
ωd = ω02 − α 2
s2 = −α − α 2 − ω02
Solution: We begin by establishing the damping condition of
the circuit. From the definitions for α and ω0 given by Eq. (6.17),
we have
R
64
=
= 40 Np/s,
2L
2 × 0.8
1
1
=√
ω0 = √
= 25 rad/s.
LC
0.8 × 2 × 10−3
α=
344
CHAPTER 6
L
R
+
_
Vs
As t → ∞, the circuit reaches steady state and the capacitor
becomes like an open circuit, allowing no current to flow
through the circuit. Consequently,
i
t=0
RLC CIRCUITS
υC
C
υC (∞) = Vs = 16 V.
At t = 0− , the capacitor was uncharged. Hence,
(a)
υC (0) = υC (0− ) = 0.
υC (V)
16
12
Prior to t = 0, there was no current in the circuit, and since the
current through L (which is also the current through C) cannot
change instantaneously, it follows that
8
iC (0) = iL (0) = iL (0− ) = 0.
Capacitor voltage
From Eq. (6.22), A1 and A2 are given by
4
0
0.1
0.2
0.3
0.4
0.5
t (s)
(b)
iC (A)
0.2
0.15
Current
0.1
1
C iC (0) − s2 [υC (0) − υC (∞)]
s1 − s 2
0 + 71.2(0 − 16)
=
= −18.25 V,
−8.8 + 71.2
1
C iC (0) − s1 [υC (0) − υC (∞)]
A2 = −
s1 − s 2
0 + 8.8(0 − 16)
=−
= 2.25 V.
−8.8 + 71.2
The total response υC (t) is then given by
0.05
0
0
A1 =
0.1
0.2
0.3
0.4
0.5
t (s)
(c)
Hence, α > ω0 , which means that the circuit will exhibit an
overdamped response after the switch is closed. The applicable
expression for υC (t) is given by Eq. (6.16),
υC (t) = [A1 e
From Eq. (6.18),
+ A2 e
s2 t
+ υC (∞)].
α 2 − ω02
= −40 + 402 − 252 = −8.8 Np/s,
s2 = −α − α 2 − ω02 = −71.2 Np/s.
s1 = −α +
(for t ≥ 0),
and the associated current is
Figure 6-8: Example 6-3: (a) circuit, (b) υC (t), and (c) iC (t).
s1 t
υC (t) = [−18.25e−8.8t + 2.25e−71.2t + 16] V
iC (t) = C
dυC
dt
= 2 × 10−3 [18.25 × 8.8e−8.8t − 2.25 × 71.2e−71.2t ]
= 0.32(e−8.8t − e−71.2t ) A
(for t ≥ 0).
The waveforms of υC (t) and iC (t) are displayed in Figs. 6-8(b)
and (c), respectively.
Example 6-4: RLC Circuit with a Current Source
Determine υC (t) in the circuit of Fig. 6-9(a), given that
Is = 2 A, Rs = 10 �, R1 = 1.81 �, R2 = 0.2 �, L = 5 mH,
6-3
SERIES RLC OVERDAMPED RESPONSE (α > ω0 )
R1
L
2
R1
1
iL(0−) = 0
1.81 Ω t = 0
υC Rs
C
8V
345
10 Ω
2
1.81 Ω
10 Ω
L
Is = 2 A
R2 0.2 Ω
υC(0) = 20 V
C
+
_
RsIs = 20 V
R2 0.2 Ω
8V
(a) Original circuit
Rs
1
(b) At t = 0− (after current-to-voltage transformation)
υC (V)
iL
25
R1
2
20
1.81 Ω
L
15
υC
C
R2 0.2 Ω
8V
υC(0−) = 20 V
10
8
5
0
0
5
10
15
(c) After t = 0
20
25
30
t (ms)
(d) υC(t)
Figure 6-9: Circuit for Example 6-4.
and C = 5 mF. Assume that the circuit had been in the condition
shown in Fig. 6-9(a) for a long time prior to t = 0.
Solution:
At t = 0− : Figure 6-9(b) depicts the state of the circuit at
t = 0− , but after making a current source to voltage source
transformation. The replacement voltage source is 20 V. Since
the circuit had been in steady state for a long time, the capacitor
behaves like an open circuit with
of R = R1 + R2 = 1.81 + 0.2 = 2.01 , L = 5 mH, and
C = 5 mF, all connected in series with an 8 V source
(Fig. 6-9(c)). The current through C is the same as the current
through L, and since the current through an inductor cannot
charge instantaneously, it follows that
iC (0) = iL (0) = iL (0− ) = 0.
For the capacitor,
υC (0) = υC (0− ) = 20 V.
υC (0− ) = 20 V.
Also, as t approaches ∞, υC (t) approaches the voltage of the
8 V source. Hence,
We also note that in the left-hand part of the circuit, no current
can flow, mandating that
υC (∞) = 8 V.
−
iL (0 ) = 0.
At t ≥ 0: After moving the switch to terminal 2, the capacitor
becomes part of a new circuit composed of a combination
The parameters α and ω0 are given by
2.01
R1 + R2
= 201 Np/s,
=
2L
2 × 5 × 10−3
1
1
=√
ω0 = √
= 200 rad/s.
LC
5 × 10−3 × 5 × 10−3
α=
346
CHAPTER 6
Since α > ω0 , the response is overdamped and given by
Eq. (6.16),
α = ω0 , and according to Eq. (6.18),
s1 = s2 = −α.
υC (t) = A1 es1 t + A2 es2 t + υC (∞),
(6.24)
Repeated roots are problematic because Eq. (6.16) becomes
with
υC (t) = A1 e−αt + A2 e−αt + υC (∞)
α 2 − ω02
= −201 + (201)2 − (200)2 = −181 Np/s,
s2 = −α − α 2 − ω02 = −221 Np/s,
s1 = −α +
A1 =
= (A1 + A2 )e−αt + υC (∞) = (A3 )e−αt + υC (∞),
(6.25)
where A3 = A1 + A2 . A solution containing a single constant
(A3 ) cannot simultaneously satisfy the initial conditions on both
the voltage across the capacitor and the current through the
inductor.
For this critically damped case, we introduce two new
constants, B1 and B2 , and we adopt the modified form
1
C iC (0) − s2 [υC (0) − υC (∞)]
s1 − s 2
0 + 221[20 − 8]
=
= 66.3,
−181 + 221
A2 =
1
C iC (0) − s1 [υC (0) − υC (∞)]
s2 − s 1
0 + 181[20 − 8]
=
= −54.3.
−221 + 181
υC (t) = B1 e−αt + B2 te−αt + υC (∞)
Inserting the values of s1 , s2 , A1 , A2 , and υC (∞) in Eq. (6.16)
leads to
υC (t) = (66.3e−181t − 54.3e−221t + 8) V
for t ≥ 0.
Figure 6-9(d) displays the time response of υC (t).
Exercise 6-3: After interchanging the locations of L
and C in Fig. 6-9(a), repeat Example 6-4 to determine
υC(t) across C.
Answer: υ(t) = 9.8(e−221t − e−181t ) V. (See
6-4
RLC CIRCUITS
C3
)
Series RLC Critically Damped
Response (α = ω0 )
The critically damped response is the fastest response
the circuit can exhibit, without oscillation, between initial
and final conditions. = (B1 + B2 t)e−αt + υC (∞)
(for t ≥ 0)
(6.26)
(critically damped),
which contains a term with e−αt and a second term with (te−αt ).
It is a relatively straightforward task to show that the expression
given by Eq. (6.26) is indeed a valid solution of the differential
equation given by Eq. (6.4). When doing so, however, we need
to keep in mind that under the critically damped condition, R,
L, and C are interrelated by Eq. (6.23), and υC (∞) = Vs .
The constants B1 and B2 are governed by the initial
conditions on υC and ic . Thus, at t = 0, Eq. (6.26) provides
υC (0) = B1 + υC (∞),
dυC iC (0) = C
dt t=0
= C (−αB1 − αB2 t + B2 )e−αt t=0
= C(−αB1 + B2 ).
(6.27a)
(6.27b)
Simultaneous solution of Eqs. (6.27a and b) leads to
When
L
R=2
C
(critically damped),
(6.23)
B1 = υC (0) − υC (∞),
(6.28a)
B2 =
(6.28b)
1
iC (0) + α[υC (0) − υC (∞)].
C
SERIES RLC CRITICALLY DAMPED RESPONSE (α = ω0 )
6-4
L
R
+
_
Application of these initial and final conditions to Eq. (6.28)
leads to
iC
t=0
Vs = 24 V
347
B1 = υC (0) − υC (∞) = −24 V,
υC
C
1
iC (0) + α[υC (0) − υC (∞)]
C
= 0 + 20[0 − 24] = −480.
B2 =
(a)
Hence,
υC(t)
υC (t) = (B1 + B2 t)e−αt + υC (∞)
= [−(24 + 480t)e−20t + 24] V,
24
for t ≥ 0.
The response is plotted in Fig. 6-10(b).
Critically damped (α = ω0)
Exercise 6-4: The switch in Fig. E6.4 is moved to
position 2 after it had been in position 1 for a long time.
Determine: (a) υC (0) and iC (0), and (b) iC (t) for t ≥ 0.
0
0.05
0.1
0.15
0.2
(b) υC(t)
2
20 Ω
t (s)
1
t=0
1H
iC
Figure E6.4
Example 6-5: Critically Damped Response
Solution: The parameters α and ω0 are given by
12
R
=
= 20 Np/s,
2L
2 × 0.3
1
1
=√
ω0 = √
= 20 rad/s.
LC
0.3 × 8.33 × 10−3
α=
Hence, because α = ω0 , the response is critically damped and
given by Eq. (6.26) as
υ(t) = (B1 + B2 t)e−20t + υC (∞).
The initial conditions at t = 0 are
υC (0) = 0
and
iC (0) = 0,
and the final condition on υC is
υC (∞) = Vs = 24 V.
+
_ 40 V
υC
10 mF
Figure 6-10: Circuit response for Example 6-5.
Evaluate the response of the circuit in Fig. 6-10(a) for t ≥ 0,
given that the capacitor had no charge prior to t = 0 and
Vs = 24 V, R = 12 �, L = 0.3 H, and C = 8.33 mF.
10 Ω
Answer: (a) υC(0) = 40 V, iC(0) = 0.
(b) iC(t) = [−40te−10t ] A. (See
)
Exercise 6-5: The circuit in Fig. E6.5 is a replica of the
circuit in Fig. E6.4, but with the capacitor and inductor
interchanged in location. Determine: (a) iL (0) and υL (0),
and (b) iL (t) for t ≥ 0.
20 Ω
2
1
10 Ω
t=0
10 mF
1H
υL
iL
Figure E6.5
Answer: (a) iL(0) = 4 A,
υL(0) = −80 V.
)
(b) iL(t) = [4(1 − 10t)e−10t ] A. (See
+
_ 40 V
348
CHAPTER 6
6-5
Series RLC Underdamped
Response (α < ω0 )
The negative exponential e−αt signifies that υ(t) has a damped
waveform with a time constant τ = 1/α, and the sine and
cosine terms signify that υC (t) is oscillatory with an angular
frequency ωd and a corresponding time period
If α < ω0 , corresponding to
L
R<2
C
(underdamped),
(6.29)
we introduce the damped natural frequency ωd defined as
ωd2 = ω02 − α 2 .
(6.30)
T =
s1 = −α +
α2
s2 = −α −
α 2 − ω02 = −α − j ωd ,
− ω02
= −α +
−ωd2
(6.31b)
√
where j = −1. The fact that s1 and s2 are complex conjugates
of one another will prove central to the form of the solution.
Inserting the expressions for s1 and s2 into Eq. (6.16) gives
υC (t) = A1 e
−αt j ωd t
e
+ A2 e
−αt −j ωd t
e
+ υC (∞).
(6.32)
The Euler identity
e±j θ = cos θ ± j sin θ
υC (t) = A1 e
+ j (A1 − A2 ) sin ωd t] + υC (∞).
(6.37b)
Determine υC (t) for the circuit in Fig. 6-11, given that
Vs = 24 V, R = 12 �, L = 0.3 H, and C = 0.72 mF. The
circuit had been in steady state prior to moving the switch at
t = 0.
and
(6.34)
(underdamped).
(6.35)
12
R
=
= 20 Np/s
2L
2 × 0.3
1
1
=√
ω0 = √
= 68 rad/s.
LC
0.3 × 0.72 × 10−3
Since α < ω0 , the voltage response is underdamped and given
by Eq. (6.35) as
υC (t) = e−αt [D1 cos ωd t + D2 sin ωd t] + υC (∞),
with
ωd =
[D1 cos ωd t + D2 sin ωd t] + υC (∞)
(for t ≥ 0)
.
Example 6-6: Underdamped Response
α=
Next, by introducing a new pair of constants, D1 = A1 + A2
and D2 = j (A1 − A2 ), we have
υC (t) = e
ωd
The oscillatory behavior of the underdamped response is
illustrated by Example 6-6.
(cos ωd t + j sin ωd t)
= e−αt [(A1 + A2 ) cos ωd t
1
C iC (0) + α[υC (0) − υC (∞)]
(6.37a)
Solution: For the specified values of R, L, and C,
+ A2 e−αt (cos ωd t − j sin ωd t) + υC (∞)
−αt
D2 =
(6.33)
allows us to expand Eq. (6.32) as follows:
−αt
(6.36)
D1 = υC (0) − υC (∞),
= −α + j ωd ,
(6.31a)
2π
.
ωd
Since ωd is a measure of the oscillation associated with the
damped natural response of the circuit, it is only appropriate
that it be called the “damped natural frequency” of the circuit.
Invoking initial conditions on the expression given by
Eq. (6.35) leads to
Since α < ω0 , it follows that ωd > 0. In terms of ωd , the
expressions for the roots s1 and s2 given by Eq. (6.18) become
RLC CIRCUITS
ω02 − α 2 = (68)2 − (20)2 = 65 rad/s.
Prior to t = 0, the circuit was in steady state, which means
that the capacitor was fully charged at Vs = 24 V and acting
like an open circuit. Hence, υC (0− ) = 24 V and iC (0− ) = 0.
6-6
SUMMARY OF THE SERIES RLC CIRCUIT RESPONSE
R
1
Vs
+
_
L
iC
t=0
2
C
υC
349
Concept Question 6-4: What specific feature distinguishes the waveform of the underdamped response
from those of the overdamped and critically damped
responses? (See
)
Concept Question 6-5: Why is ωd called the damping
frequency? (See
(a)
Exercise 6-6: Repeat Example 6-4 after replacing the 8 V
υC (V)
source with a short circuit and changing the value of R1
to 1.7 �.
24
20
Answer:
Underdamped
16
)
υ(t) = e−190t (20 cos 62.45t + 60.85 sin 62.45t) V.
12
8
(See
)
4
0
−4
0
0.05
0.1
0.15
0.2
t (s)
−8
6-6 Summary of the Series RLC
Circuit Response
6-6.1
−12
(b)
Figure 6-11: Example 6-6 (a) circuit and (b) υC (t).
Since both υC across C and iL through L cannot change
instantaneously,
υC (0) = 24 V,
After t = 0, the closed RLC circuit will no longer have any
active sources, allowing the capacitor to dissipate all its energy
in the resistor. Hence, as t → ∞, υC (∞) = 0. Using these
initial and final values in the appropriate expressions for D1
and D2 in Eq. (6.37) leads to D1 = 24 V, D2 = 7.4 V, and
υC (t) = e−20t [24 cos 65t + 7.4 sin 65t] V,
The left-hand column of Table 6-1 provides the general
expressions for υC (t) for each of the three damping conditions
associated with the series RLC circuit. The table also includes
expressions for the constants in those expressions in terms of
the initial and final values of υC and the initial value of iC . In
all three cases, the starting point is to compute the values of
α and ω0 , then their relative values determines the applicable
damping condition.
6-6.2
iC (0) = iL (0) = iL (0− ) = 0.
for t ≥ 0.
Figure 6-11(b) shows a time plot of υC (t), which exhibits
an exponential decay (due to e−20t ) in combination with
the oscillatory behavior associated with the sine and cosine
functions.
Switch Action at t = 0
Switch Action at t = T0
If the sudden change in the circuit occurs at t = T0 , instead of
at t = 0, the only changes that need to be made are:
(1) t should be replaced with (t −T0 ) everywhere on the righthand side of all equations in Table 6-1.
(2) υC (0) and iC (0) should be replaced with υC (T0 ) and
iC (T0 ), respectively, in the expressions for the constants
in Table 6-1.
Example 6-7: Rectangular-Pulse Excitation
The switch in the circuit of Fig. 6-12(a) was in position 1 for
a long time before it was moved to position 2 at t = 0, and
350
CHAPTER 6
2t=0
Vs
+
_
1
R
L
iC
RLC CIRCUITS
υC (V)
t = 20 ms
2.5
C
υC
2
1.5
(a)
1
1.08
Capacitor voltage
0.5
R
2
L
0
iC1
0
(d)
+
Vs u(t) _
C
20
40
60
80
100
t (ms)
Switch
2
1
υC1
iC (A)
0 < t < 20 ms
(b)
0.2 0.182
0.15
R
L
1
(c)
C
Current
0.1
iC2
0.05
υC2
After t = 20 ms
t (ms)
0
−0.05
(e)
0
20
40
60
80
100
Switch
2
1
Figure 6-12: Example 6-7 with Vs = 12 V, R = 40 �, L = 0.8 H, and C = 2 mF.
then back to position 1 at t = 20 ms. If Vs = 12 V, R = 40 �,
L = 0.8 H, and C = 2 mF, determine the waveforms of υC (t)
and i(t) for t ≥ 0.
Solution: From Eq. (6.17),
40
R
=
= 25 Np/s,
α=
2L
2 × 0.8
1
1
=√
ω0 = √
= 25 rad/s.
LC
0.8 × 2 × 10−3
Since α = ω0 , the circuit will exhibit a critically damped
response. We will divide the solution into two time segments.
Time Segment 1: 0 ≤ t ≤ 20 ms.
The general expression for the critically damped response of
the series RLC circuit is given by Eq. (6.26) as
υC1 (t) = (B1 + B2 t)e−αt + υ1 (∞).
(6.38)
Even though we know that the switch will be moved back to
position 1 at t = 20 ms, when we evaluate the constants in
Eq. (6.38) for Time Segment 1, we do so as if the state of the
circuit shown in Fig. 6-12(b) is to remain the same until t = ∞.
Since the circuit is “unaware” of the change that will be taking
place at t = 20 ms, its reaction to the change at t = 0 presumes
6-6
SUMMARY OF THE SERIES RLC CIRCUIT RESPONSE
that the new condition of the circuit will continue indefinitely.
Hence, the voltage across the capacitor at t = ∞ would have
been
υC1 (∞) = Vs = 12 V.
(6.39)
At t = 0− , the RLC circuit contains no active sources, so both
υ1 (0− ) and i1 (0− ) are zero. Moreover, since neither the voltage
across C nor the current through L can change instantaneously,
it follows that
351
where constants B3 and B4 are so labeled to avoid confusion
with B1 and B2 of the earlier time segment. The associated
current is
iC2 (t) = C
d
{[B3 + B4 (t − 0.02)]e−25(t−0.02) }
dt
= [(2B4 − 50B3 ) − 50B4 (t − 0.02)]
= 2 × 10−3
· e−25(t−0.02) × 10−3 A
υC1 (0) = υC1 (0− ) = 0,
iC1 (0) = iC1 (0− ) = 0.
Application of the expressions for B1 and B2 available in
Table 6-1 gives
B1 = υC (0) − υC (∞) = 0 − 12 = −12 V,
1
iC (0) + α[υC1 (0) − υC1 (∞)]
C 1
= 0 + 25[0 − 12] = −300 V/s.
υC1 (t = 20 ms) = υC2 (t = 20 ms),
iC1 (t = 20 ms) = iC2 (t = 20 ms).
(6.40b)
(6.45b)
12 − (12 + 300 × 0.02)e−25×0.02 = B3 ,
υC1 (t) = 12 − (12 + 300t)e−25t V,
15 × 0.02e−25×0.02 = (2B4 − 50B3 ) × 10−3 ,
(6.41)
for 0 ≤ t ≤ 20 ms.
whose joint solution leads to
The associated current is
B3 = 1.08 V,
dυC1
d
= 2 × 10−3
[12 − (12 + 300t)e−25t ]
dt
dt
Time Segment 2:
(6.45a)
Application of Eqs. (6.45a and b) to the expressions given by
Eqs. (6.41) to (6.44) gives
Consequently, υC1 (t) is given by
= 15te−25t A,
for t ≥ 20 ms.
(6.44)
Across the juncture between time segment 1 and time segment 2,
neither the voltage can change (as mandated by the capacitor)
nor can the current (as mandated by the inductor). Thus,
(6.40a)
B2 =
iC1 (t) = C
dυC2
dt
Consequently,
υC2 (t) = [1.08 + 118.04(t − 0.02)]e−25(t−0.02) V
(for 0 ≤ t ≤ 20 ms).
(6.42)
and
t ≥ 20 ms.
After moving the switch back to position 1 at t = 20 ms, the
circuit no longer has any active sources, and yet it is part of a
closed circuit (Fig. 6-12(c)), allowing the capacitor and inductor
to dissipate their stored energies through the resistor. Hence, at
t = ∞,
υC2 (∞) = 0.
Upon shifting t by 0.02 s, the expression for υC2 (t) assumes
the form
υC2 (t) = [B3 + B4 (t − 0.02)]e
−25(t−0.02)
V
for t ≥ 20 ms,
(6.43)
B4 = 118.04 V/s.
for t ≥ 20 ms
(6.46a)
iC2 (t) = [0.182 − 5.90(t − 0.02)]e−25(t−0.02) A
for t ≥ 20 ms.
(6.46b)
The waveforms of υC (t) and iC (t) are displayed in Figs. 6-12(d)
and (e), respectively.
Example 6-8: Two-Source Circuit
The switch in the circuit of Fig. 6-13(a) was opened at t = 0,
after it had been closed for a long time. If Vs1 = 20 V,
Vs2 = 24 V, R1 = 40 �, R2 = R3 = 20 �, R4 = 10 �,
L = 0.8 H, and C = 2 mF, determine υC (t) for t ≥ 0.
352
CHAPTER 6
t=0
R1
R3
Vs2
+_
R1
R2
Vs1
+
_
C
iL
Vs2
+_
R3
R4
R2
Vs1
υC
+
_
RLC CIRCUITS
R4
I2
C
iL(0−)
= 0.2 A
I1
L
υC(0−)
= −4 V
L
(a)
At t = 0−
(b)
υC (V)
0
Vs2
+_
R3
R2
Req
a
iL
C
L
−1
a
C
iL
0.6
0.8
1
t (s)
−3
b
υC
0.4
0.
2
Underdamped response
−2
iC
R4
b
Veq
+_
0
υC
L
−4
−5
−6
−7
−8
(c)
At t > 0
(d) Equivalent circuit at t > 0
(e) υC(t)
Figure 6-13: Circuit for Example 6-8.
Solution: Consider the state of the circuit at t = 0− (before
opening the switch), as depicted by Fig. 6-13(b). The mesh
current equations for the indicated loops are
−Vs1 + R1 I1 + R2 (I1 − I2 ) = 0,
Req = (R2 + R3 )
R2 (I2 − I1 ) + R3 I2 + Vs2 + R4 I2 = 0.
After substituting the given values for the sources and the
resistors, simultaneous solution of the two equations leads to
I1 = 0.2 A,
Hence,
iL (0− ) = I1 = 0.2 A.
Veq =
R4 =
(R2 + R3 )R4
= 8 ,
R2 + R 3 + R 4
Vs2
× Req = 4.8 V.
R2 + R 3
Now we are ready to analyze the series RLC circuit of
Fig. 6-13(d). To that end, we compute α and ω0 :
I2 = −0.4 A.
υC (0− ) = I2 R4 = −0.4 × 10 = −4 V,
Next, we consider Fig. 6-13(c), which depicts the circuit
configuration at t > 0 (after opening the switch). To simplify
the analysis, we use source transformation to convert the circuit
into its Thévenin equivalent, as shown in Fig. 6-13(d), where
(6.47a)
(6.47b)
Req
8
=
= 5 Np/s,
2L
2 × 0.8
1
1
=√
ω0 = √
= 25 rad/s.
LC
0.8 × 2 × 10−3
α=
6-7 THE PARALLEL RLC CIRCUIT
353
Since α < ω0 , the capacitor voltage υC will exhibit an
underdamped oscillatory response of the form given by
Eq. (6.35) as
υC (t) = {e−αt [D1 cos ωd t + D2 sin ωd t]} + υC (∞), (6.48)
Vs u(t)
+
+
__
υC(t)
(a)
where
ωd =
ω02 − α 2 = 252 − 52 = 24.5 rad/s.
Is u(t)
It is evident from the circuit in Fig. 6-13(d) that
υC (∞) = −Veq = −4.8 V.
D1 = υC (0) − υC (∞) = −4 + 4.8 = 0.8 V,
D2 =
υC(t)
Parallel RLC
RLC circuit shown in (a) is identical in form to that of the current
iL (t) in the parallel RLC circuit in (b).
υC
dυC
+ iL + C
= Is .
R
dt
(6.49b)
(6.52)
Using υC = υL = L diL /dt, and rearranging terms, leads to
(6.50)
d 2 iL
1 diL
Is
1
+
+
iL =
,
2
dt
RC dt
LC
LC
iL + a2 iL + b2 iL = c2 ,
6-7 The Parallel RLC Circuit
(6.53)
which can be rewritten in the abbreviated form
The waveform of υC (t) is displayed in Fig. 6-13(e).
(6.54)
where
Having completed our examination of the series RLC circuit
[Fig. 6-14(a)], we now turn our attention to the parallel RLC
circuit shown in Fig. 6-14(b). As we will see shortly, the current
iL (t) flowing through the inductor in the parallel RLC circuit is
characterized by a second-order differential equation identical
in form to that for the voltage υC (t) across the capacitor of the
series RLC circuit. Accordingly, we will take advantage of this
correspondence between the series and parallel RLC circuits by
adapting the solutions we obtained in the preceding section for
the series circuit to the solutions we seek in this section for the
parallel circuit.
Application of KCL to the circuit in Fig. 6-14(b) gives
for t ≥ 0.
C
L
Figure 6-14: The differential equation for υC (t) of the series
υC (t) = {−4.8 + e−5t [0.8 cos 24.5t − 3.92 sin 24.5t]} V,
iR + iL + iC = Is
R
iC
iL(t)
When expressed in terms of υC (t), the voltage common to all
three passive elements, Eq. (6.51) becomes
With all unknown quantities accounted for,
for t ≥ 0.
iR
+
_
(6.49a)
1
C iC (0) + α[υC (0) − υC (∞)]
ωd
−100 + 5[−4 + 4.8]
= −3.92 V.
=
24.5
Series RLC
(b)
To determine D1 and D2 , we apply Eq. (6.37)
with υC (0) = −4 V,
iC (0) = −iL (0) = −0.2 A, and
υC (∞) = −4.8 V,
L
R
(6.51)
a2 =
1
,
RC
b2 =
1
,
LC
c2 =
Is
.
LC
(6.55)
Comparison of Eq. (6.54) with Eq. (6.5) for the capacitor
voltage of the series RLC circuit reveals that the two differential
equations are identical in form, albeit the constant coefficients
have different expressions in the two cases. The overdamped,
underdamped, and critically damped expressions for iL (t) are
given in Table 6-1.
Quantities s1 , s2 , ω0 , and ωd retain the same expressions
given earlier, but α is now given by
α=
1
2RC
(parallel RLC).
(6.56)
354
CHAPTER 6
Parallel RLC
V0
12
=
= 0.2 A,
R1
60
R1 R2
R � = R1 � R2 =
= 20�.
R1 + R 2
I0� =
Overdamped (α > ω0 )
iL (t) = [A1 es1 t + A2 es2 t + iL (∞)],
(for t ≥ 0)
(6.57a)
Critically damped (α = ω0 )
iL (t) = [(B1 + B2 t)e−αt + iL (∞)],
iL (t) = [e−αt (D1 cos ωd t + D2 sin ωd t) + iL (∞)],
(for t ≥ 0)
For the parallel RLC circuit in Fig. 6-15(d), the expressions for
α and ω0 are given by
1
1
= 50 Np/s,
=
2R � C
2 × 20 × 500 × 10−6
1
1
=√
ω0 = √
= 100 rad/s.
LC
0.2 × 500 × 10−6
α=
(for t ≥ 0)
(6.57b)
Underdamped (α < ω0 )
∗ More
RLC CIRCUITS
(6.57c)
Since α < ω0 , the circuit will exhibit an underdamped response
with a damped natural frequency ωd given in Table 6-1 as
ωd = ω02 − α 2 = 1002 − 502 = 86.6 rad/s.
From Table 6-1, the expression for iL (t) is given by
details in Table 6-1.
Example 6-9: Parallel RLC Circuit
Determine iL (t) in the circuit of Fig. 6-15(a) for t ≥ 0, given
that Is = 0.5 A, V0 = 12 V, R1 = 60 �, R2 = 30 �,
L = 0.2 H, and C = 500 μF.
Solution: The circuit in Fig. 6-15(b) represents the steady
state condition of the circuit at t = 0− (prior to moving the
switch). Under constant conditions, C acts like an open circuit
and L acts like a short circuit. Given that Is flows entirely
through the short circuit representing the inductor, it follows
that
iL (0− ) = Is = 0.5 A,
υC (0− ) = 0.
Since iL through an inductor cannot change instantaneously,
nor can υC across a capacitor, these conditions are equally
applicable at t = 0. Consequently,
iL (0) = iL (0− ) = 0.5 A,
and
υL (0) = υC (0) = 0.
After moving the switch (t > 0), the circuit assumes the
configuration shown in Fig. 6-15(c). After application of
source transformation, current source I0� and the equivalent
resistance R � in Fig. 6-15(d) are given by
iL (t) = [e−αt (D1 cos ωd t + D2 sin ωd t) + iL (∞)]
for t ≥ 0.
At t = ∞, the inductor behaves like a short circuit, forcing I0�
to flow through it exclusively. Hence,
iL (∞) = I0� = 0.2 A.
The only remaining unknowns are D1 and D2 , which we
determine by applying the expressions given in Table 6-1,
namely
D1 = iL (0) − iL (∞) = (0.5 − 0.2) A = 0.3 A,
and
1
L
υL (0) + α[iL (0) − iL (∞)]
ωd
0 + 50(0.5 − 0.2)
=
= 0.17 A.
86.6
D2 =
The final expression for iL (t) is then given by
iL (t) = [0.2 + e−50t (0.3 cos 86.6t + 0.17 sin 86.6t)] A,
for t ≥ 0,
and its plot is displayed in Fig. 6-15(e).
Exercise 6-7: Determine the initial and final values for iL
in the circuit of Fig. E6.7 on the following page and
provide an expression for iL (t).
6-7 THE PARALLEL RLC CIRCUIT
355
υC(0−)
iC
1
R1
Is
V0
iR
t=0
2
iL
R2
L
C
iL(0−)
υC
Is
R2
(b)
At t = 0−
L
iL
iL
R1
R2
L
C
I0
υC
R
L
C
υC
+
_
After t = 0
(c)
υC
+
_
(a)
V0
C
(d)
Norton equivalent
iL (A)
0.5
0.4
0.3
0.2
0
0.05
0.1
0.15
t (s)
(e) Plot of iL(t)
Figure 6-15: Circuit for Example 6-9.
2H
15 mA
40 Ω
+ υL _
5 mF
iL
Answer: iL (0) = 5 mA, υL (0) = 0.4 V,
t=0
80 Ω
iL (∞) = 15 mA, α = 2.5 Np/s,
ω0 = 10 rad/s, ωd = 9.68 rad/s,
iL(t) = {15 − [10 cos 9.68t −18.08 sin 9.68t]e−2.5t } mA.
(See
Figure E6.7
)
356
TECHNOLOGY BRIEF 16: RFID TAGS AND ANTENNA DESIGN
Technology Brief 16
RFID Tags and Antenna Design
RFID Applications
Radio-frequency identification (RFID) uses electromagnetic fields to transfer identifying information from
a small electrical ID circuit to an external receiver.
These are commonly used for identifying or tracking
animals, packages and goods, smart cards, tags,
etc. (Fig. TF16-1). RFID circuits are injected in pets to
help identify and return lost or stolen animals, attached
via ear tags to livestock to identify their whereabouts and
activities (how much time they spend eating or drinking),
attached to athletes via wrist bands to track and verify
their progress in a race, affixed to consumer goods
and packaging to track, locate, and maintain inventory,
and prevent theft. RFID tags can be based on either
static, unchanging data (such as the ID number for a
dog or cat), or their data can be changed by either
an internal circuit (monitoring and reporting temperature
of a refrigerated shipping container, for instance) or an
external circuit (such as marking the last time a box was
inspected).
When combined with other circuits, the information
provided by RFID tags can be used in a myriad of
ways. For instance, credit-card sized RFID tags attached
to valuable art or other one-of-a-kind objects contain
a unique ID number, as well as circuits detecting tilt
and vibration. This information is continuously transmitted
to receivers on the ceiling of a museum to create a
security system that constantly monitors their location and
status, and generates alarms if they are moved. RFID
tags permanently installed in new guitars can help track
them throughout their lives, and those installed in vintage
guitars can help prevent fraud and theft. RFID tags are
in most access-monitoring cards today, and can uniquely
identify a person and his/her time of entry and exit. If other
items are also tracked (sensitive documents for instance),
an RFID reader can also identify what he/she is carrying
and can generate an alarm if documents are leaving a
room (or books leaving a library) that shouldn’t be. RFID
tags can be used in numerous medical applications to
identify a person and identify and track the drugs or
treatments he/she receives.
RFID and bar code scanners can be used for similar
applications, but work in very different ways. Bar code
scanners require direct visual access for a laser to read
11.5 mm
11.5 mm
Grain of rice
Figure TF16-1: RFID examples.
TECHNOLOGY BRIEF 16: RFID TAGS AND ANTENNA DESIGN
357
RFID reader
Chip
Antenna
Antenna
Transponder
Tag
Figure TF16-2: RFID system.
the bar code. RFID circuits can be out of sight (inside a
pet or package) as long as the wireless electromagnetic
signal can penetrate the external packaging. Bar codes
are read only. RFID systems can be read only or readwrite. Bar codes are printed directly on packaging, or
stickers affixed to packaging. RFID systems require an
external antenna and a (tiny) computer chip. The antenna
can be printed, but the chip must be somehow affixed.The
entire system is often implemented in a sticker or card. Bar
codes are essentially free (printed), whereas RFID tags
cost 15 US cents and up.
RFID Operation
In a passive RFID system, an external transponder transmits a wireless signal to the RFID circuit (Fig. TF16-2),
which “wakes up” and receives power from the signal
through inductive coupling or other power harvesting
methods. It then transmits its coded ID information back to
the transponder, through the inductive link.The advantage
of passive RFID systems is that they can be very small,
not much bigger than a grain of rice, and can last for
decades without maintenance as they do not require an
internal battery to power the circuit. But the transponder
must be within a short distance (less than 1 m) of the RFID
circuit in order to receive the ID information. Active RFID
systems have a battery to power the internal RFID circuit
and can therefore transmit much further, up to 200 m.
RFID systems consist of an RFID transceiver with a
sinusoidal source and (typically) a loop antenna, through
which the current flows, creating a magnetic field. The
magnetic field is part of an electromagnetic wave that
travels a short distance through the air to the RFID tag.
The RFID tag has another (typically) loop or loop-like
antenna to receive the magnetic field and convert it back
to a current, and an RF circuit to convert it to a small
voltage that can be used to power the data circuit in
the chip. Frequencies used for RFID and some of their
applications are listed in Table TT16-1.
RFID Antennas
Two examples of RFID antennas are shown in
Fig. TF16-3. Both are printed 2-D antennas containing
an inductor, in either a coiled design as in part (a) or in a
“squiggly” design (yes, it really is called a squiggle tag),
Chip
Substrate
Antenna
coil
(a) Texas Instruments RFID tag
Chip
(b) Squiggle antenna
Figure TF16-3: RFID antennas.
358
TECHNOLOGY BRIEF 16: RFID TAGS AND ANTENNA DESIGN
Table TT16-1: RFID frequency bands.
Approximate
Tag Cost
in Volume
(2006) US$
Band
Regulations
Range
Data Speed
Remarks
120–150 kHz (LF)
Unregulated
10 cm
Low
Animal
identification,
factory data
collection
$1
13.56 MHz (HF)
(ISM) band
worldwide
10 cm – 1 m
Low to
moderate
Smart cards
(MIFARE, ISO/IEC
14443)
$0.50
433 MHz (UHF)
Short-range
devices
1–100 m
Moderate
Defense
applications, with
active tags
$5
865–868 MHz
(Europe),
902–928 MHz
(North America)
UHF
ISM band
1–12 m
Moderate to
high
EAN, various
standards
$0.15
(passive tags)
2450–5800 MHz
(microwave)
ISM band
1–2 m
High
802.11 (WLAN),
Bluetooth standards
$25
(active tag)
3.1–10 GHz
(microwave)
Ultra wide
band
1 to 200 m
High
Requires semi-active
or active tags
$5
which is often printed on a sticker label for consumer
products.
Antenna design is a subspecialty of electrical engineering. Antenna designers consider ways to either convert
current and voltage to electric and magnetic fields in
the air (for wireless transmission) or to collect those
fields in the air and convert them back into currents
and voltages. In general, the same antenna can be
used to receive and transmit the RFID signals. Antenna
performance is governed by the shape of the antenna and
its size relative to the wavelength λ of the electromagnetic
(EM) wave it radiates or intercepts. The wavelength, in
turn, is related to the signal frequency f by λ = c/f ,
where c is the velocity of light in vacuum. Hence, the
size of an antenna usually is chosen to match the EM
frequency that the RFID is intended to use. The ratio of
electric to magnetic field is called the impedance of the
antenna, and it needs to be matched to the same ratio
of voltage and current that are produced or received by
the circuit (the impedance of the circuit). The impedance
of the circuit is controlled by the capacitors, resistors,
inductors, and other elements at the input or output of the
circuit. The impedance of the antenna is controlled by its
shape and size. Coils tend to be more inductive, which
means their impedance is more like an inductor (has
a positive imaginary part). Antennas shaped like plates
tend to be more capacitive (having a negative imaginary
part). Most antennas are a combination of inductive
and capacitive, and can be modeled in circuit analysis
as circuits containing both inductors and capacitors.
Circuit elements are called lumped elements because
their capacitance, inductance, and resistance are built
from individual components, whereas an antenna is a
distributed element whose capacitance, inductance,
and resistance are spatially distributed along the length of
the antenna.Taking all of these design factors into account
at once is fairly daunting, so computer software is used
extensively in antenna design, leading to creative designs
such as the squiggle antenna and beyond. Antenna
designers sometimes say they are “painting with copper”
to describe the creative artistry of their field.
6-8
GENERAL SOLUTION FOR ANY SECOND-ORDER CIRCUIT WITH DC SOURCES
Exercise 6-8: In the parallel RLC circuit shown in
Fig. 6-14(b), how much energy will be stored in L and C
at t = ∞?
Answer: wL =
6-8
1
2
LIs2 ,
wC = 0. (See
)
x �� + ax � + bx = c,
(6.59)
Step 2: Determine the values of α and ω0 :
√
a
α= ,
ω0 = b .
2
According to the material covered in the preceding sections,
series and parallel RLC circuit share a common set of
characteristics. An RLC circuit is characterized by a resonant
frequency ω0 and a damping coefficient α, and when driven
by a sudden dc excitation, the circuit exhibits a response that
decays exponentially as e−αt , and it may or may not contain
an oscillatory variation, depending on whether ω0 is or is not
larger than α in magnitude, respectively. These characteristics
arise from the interplay between energy storage and energy
dissipation. During the operation of the RLC circuit, energy
is exchanged between the two storage elements—the capacitor
and the inductor—through the resistor. Dissipation is governed
by e−αt , which we can redefine as e−t/τ , with
(s).
Step 1: Develop a second-order differential equation for x(t),
for t ≥ 0. Express the equation in the general form
where a, b, and c are constants.
General Solution for Any
Second-Order Circuit with dc
Sources
1
τ=
α
359
(6.58)
In this alternative form, the decay rate is specified by the time
constant τ . If τ is short (rapid decay) in comparison with the
duration of a single oscillation period T , where T = 2π/ωd ,
it means that energy burns away too quickly to generate an
oscillation. This is the overdamped case. On the other hand,
if τ is sufficiently long (slow decay) in comparison with T ,
energy will move back and forth between L and C, generating an
oscillation. With every cycle, however, the resistance will burn
off some of the remaining energy, resulting in an underdamped
response that decays and oscillates simultaneously. If R = 0,
the circuit will oscillate forever at the resonant frequency ω0
(see Exercise 6-9).
Building on the experience we gained from our examination
of the series and parallel RLC circuits, we now extend the
method of solution to any second-order circuit, including those
containing op amps. For a circuit containing only dc sources
(or no independent sources at all), we seek to find the circuit
response x(t) for t ≥ 0, where x(t) is a voltage or current of
interest in the circuit, and t = 0 is the instant at which the circuit
experiences a sudden change (usually caused by a switch). To
that end, we propose the following solution outline:
(6.60)
Step 3: Determine whether the response x(t) is overdamped,
critically damped, or underdamped, and write down the
expression corresponding to that case from the following
general solution:
General Solution
Overdamped (α > ω0 )
x(t) = [A1 es1 t + A2 es2 t + x(∞)],
(for t ≥ 0)
(6.61a)
Critically Damped (α = ω0 )
x(t) = [(B1 + B2 t)e−αt + x(∞)],
(for t ≥ 0)
(6.61b)
Underdamped (α < ω0 )
x(t) = [e−αt (D1 cos ωd t + D2 sin ωd t) + x(∞)],
(for t ≥ 0)
(6.61c)
where
α 2 − ω02 ,
(6.62a)
s2 = −α − α 2 − ω02 ,
ωd = ω02 − α 2 .
(6.62b)
s1 = −α +
(6.62c)
The three expressions given by Eq. (6.61) represent the
circuit response to a sudden change that occurs at t = 0.
Had the sudden change occurred at t = T0 instead, the
expressions would continue to apply, but t will need to be
replaced with (t − T0 ) everywhere on the right-hand side
(only) of those expressions. 360
CHAPTER 6
RLC CIRCUITS
Table 6-2: General solution for second-order circuits for t ≥ 0.
x(t) = unknown variable (voltage or current)
Differential equation:
x �� + ax � + bx = c
Initial conditions:
x(0) and x � (0)
c
Final condition:
x(∞) =
b
√
a
α=
ω0 = b
2
Overdamped Response α > ω0
x(t) = [A1 es1 t + A2 es2 t + x(∞)] u(t)
s1 = −α + α 2 − ω02
s2 = −α − α 2 − ω02
�
x � (0) − s2 [x(0) − x(∞)]
x (0) − s1 [x(0) − x(∞)]
A1 =
A2 = −
s1 − s 2
s1 − s 2
Critically Damped α = ω0
x(t) = [(B1 + B2 t)e−αt + x(∞)] u(t)
B1 = x(0) − x(∞)
B2 = x � (0) + α[x(0) − x(∞)]
Underdamped α < ω0
x(t) = [D1 cos ωd t + D2 sin ωd t + x(∞)]e−αt u(t)
x � (0) + α[x(0) − x(∞)]
D1 = x(0) − x(∞)
D2 =
ωd
ωd = ω02 − α 2
Step 4: Evaluate the circuit to determine x(∞) at t = ∞.
Alternatively, we can use
c
x(∞) = .
b
(6.63)
Step 5: Apply initial conditions for x(t) and x � (t) at t = 0 (or
at t = T0 if the sudden change occurred at T0 ) to determine the
remaining unknown constants.
This procedure is highlighted in Table 6-2 and demonstrated
through Examples 6-10 to 6-12.
Step 1: Obtain differential equation for iL (t)
After closing the switch, node 1 gets connected to node 2 and
R2 becomes inconsequential to the rest of the circuit because
it is connected in parallel with a short circuit. At node 2 of the
circuit in Fig. 6-16(c), KCL gives
−i1 + iL + iC = 0.
In terms of the node voltage υC ,
υC − V0
,
R1
dυC
.
iC = C
dt
−i1 =
Example 6-10: RLC Circuit with a Short-Circuit Switch
The switch in the circuit of Fig. 6-16(a) had been open for a long
time before it was closed at t = 0. Determine iL (t) for t ≥ 0.
The circuit elements have the following values: V0 = 24 V,
R1 = 4 �, R2 = 8 �, R3 = 12 �, L = 2 H, and C = 0.2 F.
Solution: Figures 6-16(b), (c), and (d) depict the state of
the circuit at t = 0− , t ≥ 0, and t = ∞, respectively.
(6.64)
(6.65a)
(6.65b)
Hence,
V0
dυC
υC
=
+ iL + C
.
(6.66)
R1
dt
R1
The voltage υC is equal to the sum of the voltages across L
and R3 ,
diL
(6.67)
+ i L R3 .
υC = L
dt
GENERAL SOLUTION FOR ANY SECOND-ORDER CIRCUIT WITH DC SOURCES
R1
L
+
_
V0
iC
iL
i1
C
υC(0−) = 12 V
R3
υ2 = υC
2
8
i1( )
iC
R1
L
C
iC( ) = 0
iL( )
8
iL
+
_
C
(b) At t = 0−: iL(0−) = V0 /(R1 + R2 + R3) = 1 A,
and υC(0−) = iL(0−) R3 = 12 V.
R1
V0
L
+
_
V0
iC(0−) = 0
iL(0−) = 1 A
R1
υC
R3
i1
υ2(0−)
2
i1
(a) Circuit with switch
1
R2
1
2
8
1
R2
υC
V0
R3
C
υC( )
R3
(d) At t =
: iL( ) = V0 /(R1 + R3) = 1.5 A.
8
(c) At t > 0
L
+
_
8
t=0
361
8
6-8
Figure 6-16: Circuit for Example 6-10.
where
Substituting Eq. (6.67) in Eq. (6.66) leads to
1
R1
L + R1 R3 C
2 + 4 × 12 × 0.2
= 7.25,
=
R1 LC
4 × 2 × 0.2
R 1 + R3
4 + 12
b=
=
= 10,
R1 LC
4 × 2 × 0.2
24
V0
=
= 15.
c=
R1 LC
4 × 2 × 0.2
a=
V0
.
R1
(6.68)
After carrying out the differentiation in the third term and
rearranging terms, we have
L
diL
d
+ i L R3 + i L + C
dt
dt
d 2 iL
+
dt 2
L + R 1 R3 C
R1 LC
diL
+
dt
L
diL
+ i L R3
dt
R1 + R 3
R1 LC
=
V0
.
R1 LC
(6.69)
For convenience, we rewrite Eq. (6.69) in the compact form
iL =
(6.70)
(6.71b)
(6.71c)
Step 2: Determine α and ω0
α=
and
iL�� + aiL� + biL = c,
(6.71a)
ω0 =
a
7.25
=
= 3.625
2
2
(6.72a)
√
√
b = 10 = 3.162.
(6.72b)
362
CHAPTER 6
Step 3: Determine damping condition and select
appropriate expression
Since υL = L diL /dt, it follows that
Since α > ω0 , the response is overdamped, and
iL (t) = A1 es1 t + A2 es2 t + iL (∞)
iL� (0) = 0.
and
s2 = −α −
α 2 − ω02 = −1.85 Np/s
(6.74a)
α 2 − ω02 = −5.40 Np/s.
(6.74b)
The expressions for A1 and A2 in Table 6-2 are given in terms
of x, the variable associated with the second-order differential
equation. In the present case, our differential equation is given
by Eq. (6.70), with iL (t) as the unknown variable. Hence, by
setting x = iL in the expressions for A1 and A2 , we have
iL� (0) − s2 [iL (0) − iL (∞)]
s1 − s 2
0 + 5.4(1 − 1.5)
=
= −0.76 A
−1.85 + 5.4
A1 =
Step 4: Determine iL (∞)
From the circuit in Fig. 6-16(d), iC = 0 (open-circuit capacitor)
and
iL (∞) =
V0
24
= 1.5 A.
=
R1 + R 3
4 + 12
(6.79)
(6.73)
with
s1 = −α +
RLC CIRCUITS
(6.75)
and
(6.80a)
iL� (0) − s1 [iL (0) − iL (∞)]
A2 = −
s1 − s 2
0 + 1.85(1 − 1.5)
=−
= 0.26 A,
−1.85 + 5.4
(6.80b)
(6.80c)
Step 5: Invoke initial conditions
With C acting like an open circuit at t = 0− (Fig. 6-16(b)),
IL (0− ) = i1 (0− ) =
V0
= 1 A.
R1 + R 2 + R 3
and the final solution is then given by
iL (t) = [1.5−0.76e−1.85t +0.26e−5.4t ] A
for t ≥ 0. (6.81)
Since iL cannot change in zero time,
iL (0) = iL (0− ) = 1 A.
(6.76)
We need one additional relationship involving A1 and A2 , which
can be provided by the initial condition on iL� . From the circuit
in Fig. 6-16(b) at t = 0− , we have
υC (0− ) = iL (0− ) R3 = 1 × 12 = 12 V.
(6.77)
As we transition from t = 0− (before closing the switch) to
t = 0 (after closing the switch), neither iL nor υC can change,
which means that the voltage υ2 (0) at node 2 will continue to
be 12 V and the current iL through R3 will continue to be 1 A.
Hence, the voltage υL (0) has to be
υL (0) = υ2 (0) − iL (0) R3 = 12 − 1 × 12 = 0.
(6.78)
Exercise 6-9: Develop an expression for iC (t) in the
circuit of Fig. E6.9 for t ≥ 0.
I0
+
_
iL
t=0
L
iC
C
Figure E6.9
√
Answer: iC (t) = I0 cos ω0 t, with ω0 = 1/ LC . This
is an LC oscillator circuit in which dc energy provided
by the current source is converted into ac energy in the
)
LC circuit. (See
TECHNOLOGY BRIEF 17: NEURAL STIMULATION AND RECORDING
Technology Brief 17
Neural Stimulation and Recording
Section 4-12 introduced neural probes and how they can
be used to measure voltage at specific locations in the
brain. They can also be used to stimulate neurons to
control movement, sight, hearing, touch, smell, emotion,
and more. Neural stimulation and recording begin with a
neural probe such as the three dimensional neural probe
shown in Fig. 4-30 or the spiral-shaped cochlear implant
electrodes shown in Fig. TF17-1. Each electrode is meant
to stimulate one or more nearby neurons.
The electrodes are surgically inserted in proximity to
the neurons of interest, and connected onto an electrical
stimulation device that sends carefully designed electrical
pulses into the extracellular fluid around them (for neural
stimulation), or connected to an electrical receiver (that
reads signals from them in the case of neural recording).
There are many different devices, both commercially
available and in research applications, that utilize neural
stimulation or recording. These bioelectronics are one of
the most exciting and rapidly advancing areas of electrical
engineering. Several examples of these devices are given
below.
363
by a microphone and electrical circuitry. The sounds
are picked up by the microphone mounted behind the
ear, processed or coded (using electrical circuitry) into
electrical pulses associated with the sounds, and then
transmitted through the skin via inductive coupling or
direct connection to the electrodes. The electrodes place
these signals directly onto the auditory nerves, which
then send the signals to the brain, which “hears” the
sound. If the auditory nerve is not functional, an auditory
brainstem implant is used instead, wherein electrodes
directly stimulate the cochlear nucleus complex in the
lower brain stem.
Artificial Eye Retina
The artificial retina, or cortical implant, replaces
damaged eye structures with an external camera, a
wireless link (shown as the two orange inductive coils in
Fig. TF17-3), and an electrode array that stimulates the
optic nerve in the back of the eye. Another alternative is to
bypass the optical nerve and stimulate the visual cortex
of the brain directly. The resolution of sight depends on
the number of electrodes, as shown in Fig. TF17-4.
Brain Stimulation
Cochlear Implant
In the cochlear implant shown in Fig. TF17-2, the ear
drum and stapes (inner bones of the ear) are replaced
Electrodes
Figure TF17-1: Preformed spiral electrode for cochlear
c 2015
implant. (Courtesy of Cochlear Americas, Cochlear Americas.)
The deep brain stimulation (DBS) or cognitive
prosthesis shown in Fig. TF17-5 is used to stimulate
1. Sounds are picked up by
the microphone.
2. The signal is then
“coded” (turned into a
special pattern of electrical
pulses).
3. These pulses are sent to
the coil and are then
transmitted across the skin
to the implant.
4. The implant sends a
pattern of electrical pulses
to the electrodes in the
cochlea.
5. The auditory nerve picks
up these electrical pulses
and sends them to the
brain. The brain recognizes
these signals as sound.
Figure TF17-2: A cochlear implant stimulates the
auditory nerves to help deaf people hear. (Courtesy MEDEL.)
364
TECHNOLOGY BRIEF 17: NEURAL STIMULATION AND RECORDING
Figure TF17-3: Artificial retina simulates the optic nerve
to help blind people see. (Credit: John Wyatt.)
nerves deep within the brain. This has been used
to reduce tremors due to Parkinson’s disease and to
relieve some types of depression, and it has been
proposed for treating a number of other psychological and
physiological disorders. The development of applications
for direct stimulation of the brain is often preceded by
neural recording, to help researchers better understand
the natural electrical signals in the body.
Figure TF17-5: Deep brain stimulation (DBS) is used to
treat depression and tremors associated with Parkinson’s
disease. (Credit: Medtronic.)
them), thus returning some level of motion control. If a
limb is entirely gone, it can be replaced by an artificial
limb, controlled by neural recording and stimulation
(Fig. TF17-6). An interesting phenomenon associated
with these and many other types of neural prosthetics
is that the plasticity of the brain often allows the user to
learn and train the brain and body to see, hear, touch, and
move based on the adapted machine-brain interface from
the neural signals.
Sensory and Motor Prostheses
Several designs of sensory/motor prostheses are being
developed to help patients with spinal cord injuries,
damaged or amputated limbs, loss of bladder control, and
other physical impairments. If only the nerve connections
are damaged, these may be replaced by neural recording
(to receive signals) and stimulation devices (to transmit
16 electrodes
200+ electrodes
1000+ electrodes
Figure TF17-4: Vision resolution expected with various
numbers of sight-stimulating electrodes.
Pain Control
Another application of both internal and external electrical
stimulation is in control of pain. Basically, the pain
signals are masked by a stimulation-induced tingling
known as paresthesia. Internal devices used to induce
paresthesia include the spinal cord stimulator (SCS)
shown in Fig.TF17-7 and external devices include pulsed
electromagnetic field (PEMF) stimulators. External
devices use one of two methods for directing the pulsed
energy to the location of the pain. One method involves
inductive coupling (using coils external to the body),
and the other involves the use of two electrodes on
either side of the region, transmitting current from one
electrode through the body region to the other electrode
(Fig. TF17-8). PEMF devices have also been used to
improve bone and soft tissue healing.
Emerging technology in neural prostheses and other
body-machine interfaces has already provided life improvements for many. This technology is still in its infancy,
TECHNOLOGY BRIEF 17: NEURAL STIMULATION AND RECORDING
365
Figure TF17-6: Mind-controlled bionic arm uses both neural recording and neural stimulation within the brain and at the
attachment site of the artificial limb. (Credit: Todd Kuiken, MD, Center for Bionic Medicine.)
Figure TF17-7: Spinal cord stimulator (SCS). (Credit:
Spine-health.com.)
and many interesting challenges remain. How to create
a full-function, long-term biocompatible implant small
enough to be placed directly into the eye, brain, spine,
bladder, brain and other organs, with battery life and/or
power harvesting to support its operation, but with heat
and power low enough not to damage the critical neurons
it is connected to, surgically placing it correctly every time
Figure TF17-8: Wearable pulsed electromagnetic
field (PEMF) pain-control device for the knee. (Credit:
Orthomedical.)
for every patient, with easy ways to get information to and
from the device . . . there are enough challenges to keep
engineers engaged for decades to come!
366
CHAPTER 6
R1
Vs u(t)
R2
i2
i1
+
_
ix
iy
L1
L2
(a) Circuit
R1
i2( )
8
8
ix( )
iy( )
L1
8
+
_
8
Vs
R2
i1( )
L2
To obtain an expression for iy�� , we simply take the derivative of
Eq. (6.85),
R1 �
iy�� =
i + ix�� .
(6.86)
L1 x
After inserting Eqs. (6.85) and (6.86) into Eq. (6.84) and
rearranging terms, we have
(R1 + R2 )L1 + R1 L2 �
R 1 R2
R2 Vs
ix +
ix =
,
ix�� +
L1 L2
L1 L2
L1 L2
(6.87)
which can be rewritten in the compact form
(R1 + R2 )L1 + R1 L2
= 7.5,
L1 L2
R1 R2
R 2 Vs
b=
= 6,
c=
= 21.
L1 L2
L 1 L2
Step 2: Evaluate α, ω0 , s1 , and s2
8
Determine i1 (t) and i2 (t) in the circuit of Fig. 6-17 for
t ≥ 0. The component values are Vs = 1.4 V, R1 = 0.4 �,
R2 = 0.3 �, L1 = 0.1 H, and L2 = 0.2 H.
Solution: We designate ix and iy as the mesh currents in the
two loops, as shown. We will analyze the circuit in terms of ix
and iy and then use the solutions to determine i1 and i2 .
For t ≥ 0, the mesh equations are given by:
d
(ix − iy ) = 0,
dt
diy
d
L1
(iy − ix ) + R2 iy + L2
= 0,
dt
dt
−Vs + R1 ix + L1
s2 = −3.75 −
(3.75)2 − 6 = −6.6 Np/s.
(6.89b)
(6.89c)
(6.89d)
Step 3: Write expression for ix (t)
(iy loop)
Since α > ω0 , ix will exhibit an overdamped response given
by
ix (t) = [ix (∞) + A1 es1 t + A2 es2 t ]
(ix loop)
(6.82)
(iy loop)
(6.83)
Step 1: Develop a differential equation in ix alone
Take the time derivative of all terms in the iy -loop equation:
−L1 ix�� + R2 iy� + (L1 + L2 )iy�� = 0.
and
(6.89a)
(ix loop)
which can be rearranged and rewritten in the form
(6.84)
To convert Eq. (6.84) into a differential equation in ix alone, we
need to develop expressions for iy� and iy�� in terms of ix and its
derivatives. By isolating iy� in Eq. (6.82), we have
R1
Vs
=
ix + ix� −
.
L1
L1
a
7.5
=
= 3.75 Np/s,
2
2
√
√
ω0 = b = 6 = 2.45 rad/s,
s1 = −α + α 2 + ω02
= −3.75 + (3.75)2 − 6 = −0.91 Np/s,
α=
Example 6-11: Two-Inductor Circuit
iy�
(6.88)
a=
Figure 6-17: Circuit for Example 6-11.
−L1 ix� + R2 iy + (L1 + L2 )iy� = 0.
ix�� + aix� + bix = c,
where
(b) At t =
R1 ix + L1 ix� − L1 iy� = Vs ,
RLC CIRCUITS
(6.85)
= [ix (∞) + A1 e−0.91t + A2 e−6.6t ].
(6.90)
Step 4: Evaluate final condition
At t = ∞, the inductors in the circuit behave like short circuits
(Fig. 6-17(b)), in which case the current generated by Vs will
flow entirely through L1 . Hence,
Vs
1.4
=
= 3.5 A
(6.91a)
ix (∞) =
R1
0.4
and
iy (∞) = 0.
(6.91b)
The expression for ix (t) becomes
ix (t) = 3.5 + A1 e−0.91t + A2 e−6.6t .
(6.92)
6-8
GENERAL SOLUTION FOR ANY SECOND-ORDER CIRCUIT WITH A DC SOURCE
Step 5: Invoke initial conditions
using the iy -loop equation (Eq. (6.83)) to generate expressions
for ix� and ix�� . The procedure leads to
Before t = 0, the circuit contained no sources. Hence,
i1 (0) = i1 (0− ) = 0
(6.93a)
i2 (0) = i2 (0− ) = 0,
(6.93b)
iy (t) = 1.23(e−0.91t − e−6.6t ) A.
i1 (t) = ix (t) − iy (t)
= [3.5 − 1.59e−0.91t − 1.91e−6.6t ] A
which implies that
ix (0) = ix (0− ) = 0
(6.94)
iy (0) = iy (0− ) = 0.
(6.95)
At t = 0, with no currents flowing through either loop, the
voltages across L1 and L2 are both equal to Vs . That is,
i1� (0) =
1
Vs
υL (0) =
L1 1
L1
(6.96a)
and
(6.96b)
Exercise 6-10: For the circuit in Fig. E6.10, determine
iC (t) for t ≥ 0.
Vs
Vs
+
= 21.
L1
L2
(6.97)
20 mF
Figure E6.10
Answer: iC(t) = 2e−1.5t cos 4.77t A. (See
)
Example 6-12: Second-Order Op-Amp Circuit
i � (0) − s2 [ix (0) − ix (∞)]
A1 = x
s1 − s 2
21 + 6.6(0 − 3.5)
=
= −0.36 A
−0.91 + 6.6
Determine iL (t) in the op-amp circuit of Fig. 6-18(a) for t ≥ 0.
Assume Vs = 1 mV, R1 = 10 k�, R2 = 1 M�, R3 = 100 �,
L = 5 H and C = 1 μF.
Solution: KCL at node υn gives
ix� (0) − s1 [ix (0) − ix (∞)]
A2 = −
s1 − s 2
21 + 0.91(0 − 3.5)
=−
= −3.14 A.
−0.91 + 6.6
i1 + in + i2 + i3 = 0,
or equivalently,
υn − υout
d
υn − V s
+ in +
+C
(υn − υout ) = 0. (6.101)
R1
R2
dt
The final expression for ix (t) is then given by
ix (t) = [3.5 − 0.36e−0.91t − 3.14e−6.6t ] A.
3Ω
2H
Now that we know the values of ix (0), ix� (0), and ix (∞), we
can apply the general expressions for A1 and A2 in Table 6-2
to get
and
iC
3Ω
2A
Consequently,
ix� (0) = i1� (0) + i2� (0) =
(6.100b)
(for t ≥ 0)
t=0
1
Vs
υL (0) =
,
L2 2
L2
(6.100a)
i2 (t) = iy (t) = 1.23(e−0.91t − e−6.6t ) A
and
i2� (0) =
(6.99)
Finally, the solutions for i1 (t) and i2 (t) are:
and
and
367
(6.98)
Repetition of steps 1–4 for iy requires that we start by taking
the time derivative of the ix -loop equation (Eq. (6.82)) and then
Since υn = υp = 0, in = 0, and
υout = R3 iL + L
diL
,
dt
(6.102)
368
CHAPTER 6
R1
+
+
V u(t)
-_ s
i2
i1
Rearranging, we have
C
i3
iL�� + aiL� + biL = c,
in
υn
υp
R2
_
υout
+
L + R2 R3 C
= 21,
R2 LC
R3
b=
= 20,
R2 LC
a=
iL
R3
and
c=
Op-amp circuit
R2
a
= 10.5 Np/s,
2
√
√
ω0 = b = 20 = 4.47 rad/s.
α=
_
8
υout( )
iL( )
8
+
_ Vs
+
R3
At t =
Since α > ω0 , iL will exhibit an overdamped response given
by
iL (t) = [A1 es1 t + A2 es2 t + iL (∞)] u(t),
with
8
L
(b)
C
s1 = −α +
s2 = −α −
R2
R1
−_
+
+
V
-_ s
+
υout(0)
iL(0)
α 2 − ω02 = −1.0,
α 2 − ω02 = −20.
υout (∞) = −
R2
Vs .
R1
Hence,
At t = 0
Figure 6-18: Op-amp circuit of Example 6-12.
At t = ∞, the circuit assumes the equivalent configuration
shown in Fig. 6-18(b), which is an inverting amplifier with
an output voltage
R3
L
(c)
−Vs
= −0.02.
R1 LC
The damping behavior of iL is determined by how the magnitude
of α compares with that of ω0 :
C
R1
(6.104)
where
L
(a)
RLC CIRCUITS
iL (∞) =
υout (∞)
R 2 Vs
=−
= −1 mA.
R3
R1 R3
The expression for iL (t) becomes
iL (t) = [A1 e−t + A2 e−20t − 10−3 ].
Equation (6.101) becomes
R3
iL +
R2
L
+ R3 C
R2
d 2 iL
diL
Vs
+ LC
=−
. (6.103)
dt
dt 2
R1
(6.105)
To determine the values of A1 and A2 , we examine initial
conditions for iL and iL� . At t = 0− , there were no active sources
6-9
MULTISIM ANALYSIS OF CIRCUIT RESPONSE
in the circuit, and since iL cannot change instantaneously, it
follows that
iL (0) = iL (0− ) = 0,
which means that the inductor behaves like an open circuit at
t = 0, as depicted in Fig. 6-18(c). Also, since the voltage υC
across the capacitor was zero before t = 0, it has to remain at
zero at t = 0, which is why it has been replaced with a short
circuit in Fig. 6-18(c). Consequently, υout (0) = 0, υL (0) = 0,
and
1
iL� (0) = υL (0) = 0.
L
From Table 6-2, with x = iL ,
iL� (0) − s2 [iL (0) − iL (∞)]
s1 − s 2
0 + 20(0 + 1)
× 10−3 = 1.05 mA
=
−1 + 20
A1 =
and
(6.106)
iL� (0) − s1 [iL (0) − iL (∞)]
s1 − s 2
0 + 1(0 + 1)
=−
× 10−3 = −0.053 mA.
−1 + 20
A2 = −
(6.107)
The final expression for iL (t) is then given by
iL (t) = [1.05e−t − 0.053e−20t − 1] mA,
for t ≥ 0.
Concept Question 6-6: A circuit contains two capacitors
and three inductors, in addition to resistors and
sources. Under what circumstance is it a secondorder circuit? (See
)
369
with Multisim. As an example of a real-world application of the
RLC-circuit response, we will then examine how such a circuit
is used in RFID (radio frequency identification) technology.
6-9.1 The Series RLC Circuit
Using the now (hopefully) familiar schematic tools, draw
a series RLC circuit, including a switch, in the Multisim
Schematic Capture window. Use the parts and component
values listed in Table 6-3, and add an oscilloscope as shown
in Fig. 6-19. The scope is used for both L1 and C1 , so that
we may compare the voltages across them on the same screen.
Make sure that before starting the interactive simulation, the
initial condition of the switch is in position 2, so that the dc
voltage source is not connected directly to the RLC circuit.
Upon starting the simulation, you should see no voltage across
any of the three components. After hitting the space bar to
move the switch (Fig. 6-20), υL (t) will initially jump in level
to 1 V and then exhibit an underdamped oscillatory response as
a function of time. In contrast, υC (t) will exhibit an oscillatory
behavior that will dampen out with time to assume a final value
of 1 V.
A note on the Interactive Simulation settings is appropriate
here. When you run an Interactive Simulation, Multisim
numerically solves for the solution to the circuit at successive
points in time. The resolution of this time step can be modified
under Simulate → Interactive Simulation Settings. Both
the maximum time step (TMAX) and the initial time step
can be changed. Normally, there is no reason to do this and
Multisim’s defaults will work well. However, when using the
virtual instruments, sometimes time points are generated too
quickly and this makes it difficult for the user to observe the
behavior, or conversely the resolution may be too small so that
Concept Question 6-7: Suppose a = 0 in Eq. (6.59).
What type of response will x(t) have in that case?
(See
)
6-9
Multisim Analysis of Circuit
Response
Understanding the behavior of even a simple RLC circuit
is sometimes a challenging task for electrical and computer
engineering students. In reaction to a sudden change, a circuit
gives rise to voltage and current variations that depend on the
circuit topology, the initial conditions of its components, and the
values of those components. In this section, we describe how to
use Multisim to analyze the response of the series RLC circuit
we discussed in earlier sections. The procedure is intended to
demonstrate the steps one would follow to analyze any circuit
Position 1
Position 2
Figure 6-19: Multisim screen with RLC circuit.
370
CHAPTER 6
RLC CIRCUITS
Table 6-3: Component values for the circuit in Fig. 6-19.
Component
Group
Family
Quantity
Description
1
Basic
Resistor
1
1 � resistor
300 m
Basic
Inductor
1
300 mH inductor
5.33 m
Basic
Capacitor
1
5.33 mF capacitor
SPDT
Basic
Switch
1
Single-pole double-throw (SPDT) switch
DC POWER
Sources
Power Sources
1
1 V dc source
Interactive Simulation
υC(t)
Exercise 6-12: Is the natural response for the circuit in
Fig. 6-19 over-, under-, or critically damped? You can
determine this both graphically (from the oscilloscope)
and mathematically, by comparing ω0 and α.
Answer: (See
)
υL(t)
Switch moved from position 2
to position 1
Exercise 6-13: Modify the value of R in the circuit of
Fig. 6-19 so as to obtain a critically damped response.
Answer: (See
)
Figure 6-20: Voltage responses to moving the switch in the
RLC circuit from position 2 to position 1.
the progression of time in the Interactive Simulation becomes
annoyingly slow. When generating the traces in Fig. 6-20,
for example, it may be difficult to see the damped behavior
directly on the scope window because it scrolls by too fast.
In that case, it can be helpful to reduce both the maximum and
initial time steps (10–100 × reduction usually works fine). This
forces the computer to simulate more data points and slows it
down, allowing you to see the trace appear more slowly. The
drawback of this tweak is that you also use up more memory
(and filespace).
Exercise 6-11: Given the component values in the
Multisim circuit of Fig. 6-19, what are the values of ω0
and α for the circuit response?
Answer: (See
)
6-9.2
RFID Circuit
Radio frequency identification (RFID) circuits are fast
becoming ubiquitous in many mass consumer applications,
ranging from tracking parcels and shipments to “smart” ID
badges (see Technology Brief 16). Most systems in use today
rely on a transceiver (usually handheld) that can remotely
interrogate one or more RFID tags (ranging in size from
a few millimeters to a few centimeters). Some tags reply
with only a serial number, while others are connected to
miniature sensors and return values for temperature, humidity,
acceleration, position, etc. The key to the widespread success of
these RFID tags is that they do not require batteries to operate!
If the transceiver is in close proximity to the tag (usually within
a fraction of a meter), the radio-frequency power it transmits
is sufficient to activate the RFID tag. The RFID tag uses an
RLC circuit to harvest this power and communicate back to
the transceiver (Fig. 6-21). The essential elements of the RFID
communication system are shown in the circuit of Fig. 6-22. [An
actual RFID circuit is more sophisticated, but the basic principle
6-9
MULTISIM ANALYSIS OF CIRCUIT RESPONSE
371
RF transceiver
er
ceiv
s
Tran
_
Vs
+
Antenna 1 (Ls)
Antenna 2 (Lp)
RFID tag
Rp
Cp
Magnetic field coupling
Figure 6-21: Illustration of an RFID transceiver in close proximity to an RFID tag. Note that the RFID tag will only couple to the transceiver
when the two inductors are aligned along the magnetic field (shown in blue).
To receiver circuits
R
T
υout(t)
~+− υ
s
RFID transceiver
Ls
Magnetic field
Lp C p
υC
Rp
RFID tag
Figure 6-22: Basic elements of the RFID.
of operation is the same.] In transmit mode—with the SPDT
switch connected to terminal T —the transceiver circuit consists
of a ac voltage source, υs , connected in series with inductor Ls .
By moving the switch to terminal R, the transceiver circuit
becomes a receiver with output voltage υout (t). In transmit
mode, υs generates a current through Ls , which induces a
magnetic field around it. If inductor Lp of the RFID tag is
close to Ls , the magnetic field generated by Ls will induce
a current through Lp . This current becomes the power source
in the RFID-tag circuit, and the mechanism for building up the
voltage across Cp to some maximum value VC .
When the switch is moved from transmit mode to receive
mode, υs stops delivering power to Ls . The current through Lp ,
however, cannot change to zero instantaneously. The RLC
circuit will react to the sudden change with an oscillatory
underdamped response characterized by a damped natural
frequency ωd , whose value is governed by the choice of values
for Rp , Lp , and Cp of the RFID tag. This oscillation frequency
becomes part of the ID of that particular tag. In the same way
372
CHAPTER 6
RLC CIRCUITS
Table 6-4: Parts for the Multisim circuit in Fig. 6-23.
Component
Group
Family
TS IDEAL
Basic
Transformer
1
1 mH:1 mH ideal transformer
1k
Basic
Resistor
1
1 k� resistor
1μ
Basic
Capacitor
1
1 μF capacitor
SPDT
Basic
Switch
1
SPDT switch
AC CURRENT
Sources
Signal Current Source
1
1 mA, 5.033 kHz
that magnetic coupling served to transfer power from Ls to Lp
during the transmit mode, it also serves to transfer information
in the opposite direction—from Lp to Ls —during the receive
mode. Since
diLs
,
υout (t) = Ls
dt
the output voltage recorded after moving the switch to receive
Quantity
Description
mode provides the reply by the RFID tag to the earlier
excitation introduced by υs during the transmit mode. [Real
RFID transceivers transmit a few bits of data by superimposing
digital bits onto the oscillations.]
To illustrate the operation of the RFID tag, we can simulate
the process in Multisim. Using the parts listed in Table 6-4, we
can build the circuit shown in the Multisim window of Fig. 6-23.
vout
R
T
vout(t)
Figure 6-23: Multisim rendition of RFID circuit.
vC(t)
6-9
MULTISIM ANALYSIS OF CIRCUIT RESPONSE
373
Concept Question 6-8: How does the transmitter in the
Channel A Voltage (V)
RFID system transfer power to the RLC circuit?
(See
)
Concept Question 6-9: How does the transceiver elicit a
reply from the RFID tag? (See
)
Exercise 6-14: Calculate ω0 , α, and ωd for the RLC circuit
Switch moved from T to R
in Fig. 6-23. How do ω0 and ωd compare with the angular
frequency of the current source? This result, as we will
learn later when we study resonant circuits in Chapter 9,
is not at all by coincidence.
Answer: (See
Time (s)
Figure 6-24: Oscilloscope trace for RFID receive channel
υout (t) after moving the switch from T to R.
To simulate magnetic coupling between inductors Ls and Lp ,
we use transformer T1 , which represents two closely coupled
inductors sharing a common magnetic field. In Multisim we set
the inductance of each of the two transformer units to 1 mH and
the coupling coefficient to 1. The circuit uses an oscilloscope to
monitor υout (t). The oscilloscope trace is displayed in Fig. 6-24.
Note that when the switch is moved from transmit to receive
mode, υout (t) exhibits an immediate response that then decays
exponentially with time. You may also want to plot υC (t) and
iC (t) to examine the voltage and current experienced by the
RFID tag itself during transmit and receive periods.
)
Exercise 6-15: Ideally, we would like the response of the
RFID tag to take a very long time to decay down to zero,
so as to contain as many digital bits as possible. What
determines the decay time? Change the values of some of
the components in Fig. 6-23 so as to decrease the damping
coefficient by a factor of 2.
Answer: (See
)
Summary
Concepts
• Under dc steady state conditions, a capacitor behaves
like an open circuit and an inductor behaves like a short
circuit.
• Second-order circuits include series and parallel RLC
circuits, as well as any circuit containing two passive,
energy storage elements (capacitors and inductors).
• The response of a second-order circuit (containing dc
sources) to a sudden change consists of a transient
component, which decays to zero as t → ∞, and a
steady state component that has a constant value.
• The transient response may be overdamped, critically
damped, or underdamped, depending on the values of
the circuit elements.
• The general solution for second-order circuits is
applicable to circuits containing op-amps.
• Multisim can be used to simulate the response of any
second-order circuit.
374
CHAPTER 6
RLC CIRCUITS
Mathematical and Physical Models
Step response of series and parallel
RLC circuits
(See Table 6-1)
General Solution for Second Order Circuits (cont’d.):
Overdamped Response (α > ω0 )
x(t) = [x(∞) + A1 es1 t + A2 es2 t ] u(t)
General Solution for Second Order Circuits:
(see details in Table 6-3)
x �� + ax � + bx = c
Differential equation
Important Terms
Critically Damped Response (α > ω0 )
x(t) = [x(∞) + (B1 + B2 t)e−αt ] u(t)
Underdamped Response (α > ω0 )
x(t) = [x(∞) + [D1 cos ωd t + D2 sin ωd t]e−αt u(t)
Provide definitions or explain the meaning of the following terms:
characteristic equation
critically damped
critically damped
response
damped natural
frequency
damping coefficient
initial condition
initial time step
final condition
first-order circuit
homogeneous
homogeneous solution
invoke initial and
final conditions
MEMS
maximum time step
natural response
PROBLEMS
nepers/second
oscillator
overdamped response
particular
particular solution
resonant frequency
radio frequency
identification
RFID
that appropriately represent the state of the circuit at t = 0− ,
t = 0, and t = ∞ and use them to determine (a) υC (0) and
iL (0), (b) iC (0) and υL (0), and (c) υC (∞) and iL (∞).
Section 6-1: Initial and Final Conditions
*6.1 The SPST switch in the circuit of Fig. P6.1 closes at t = 0
after it had been open for a long time. Draw the configurations
that appropriately represent the state of the circuit at t = 0− ,
t = 0, and t = ∞ and use them to determine (a) υC (0) and
iL (0), (b) iC (0) and υL (0), and (c) υC (∞) and iL (∞).
υL
3Ω
+
12 V _
iL
4Ω
iC
L
t=0
second-order circuit
steady-state
steady-state response
time constant
time period
transient
transient response
underdamped response
C
υL
2Ω
iL
L
iC
5Ω
+
18 V _
t=0
C
υC
4Ω
υC
Figure P6.2: Circuit for Problem 6.2.
Figure P6.1: Circuit for Problem 6.1.
6.2 The SPST switch in the circuit of Fig. P6.2 opens at t = 0,
after it had been closed for a long time. Draw the configurations
∗
Answer(s) available in Appendix G.
6.3 The SPST switch in the circuit of Fig. P6.3 opens at t = 0,
after it had been closed for a long time. Draw the configurations
that appropriately represent the state of the circuit at t = 0− ,
t = 0, and t = ∞ and use them to determine
*(a) υC (0) and iL (0),
(b) iC (0) and υL (0), and
PROBLEMS
375
(c) υC (∞) and iL (∞).
t=0
4A
2 kΩ
υL
iC
2Ω
3Ω
iL
L
4 kΩ
iC
+
6V _
+
10 V _
t=0
υC
C
iL
24 Ω
υL
L
υC
C
+
12 V _
Figure P6.5: Circuit for Problems 6.5 and 6.6.
6.6 Repeat Problem 6.5, but start with a closed switch that
opens at t = 0.
Figure P6.3: Circuit for Problem 6.3.
*6.7 For the circuit in Fig. P6.7, determine i1 (0) and i2 (0).
6.4 The SPST switch in the circuit of Fig. P6.4 opens at t = 0,
after it had been closed for a long time. Draw the configurations
that appropriately represent the state of the circuit at t = 0− ,
t = 0, and t = ∞ and use them to determine (a) υC (0) and
iL (0), (b) iC (0) and υL (0), and (c) υC (∞) and iL (∞).
t=0
1
2
8Ω
i2
i1
t=0
+
30 V _
6Ω
3Ω
L1
L2
5Ω
Figure P6.7: Circuit for Problem 6.7.
10 Ω
+
45 V _
8Ω
iL
L
υL
iC
C
υC
6.8 For the circuit of Fig. P6.8, determine (a) iC1 (0), iR1 (0),
iC2 (0), and iR2 (0) and (b) υC1 (∞) and υC2 (∞).
3Ω
Figure P6.4: Circuit for Problem 6.4.
5Ω
6.5 The SPST switch in the circuit of Fig. P6.5 closes at t = 0,
after it had been opened for a long time. Draw the configurations
that appropriately represent the state of the circuit at t = 0− ,
t = 0, and t = ∞ and use them to determine (a) υC (0) and
iL (0), (b) iC (0) and υL (0), and (c) υC (∞) and iL (∞).
t=0
+
_ 20 V
5Ω
+
10 V _
iR1
C1 iC1
υC1
iR2
2Ω
C2
Figure P6.8: Circuit for Problem 6.8.
iC2
υC2
376
CHAPTER 6
6.9 For the circuit in Fig. P6.9:
(a) Draw the configurations that appropriately represent the
state of the circuit at t = 0− , t = 0, and t = ∞.
(b) Use the configurations to determine iL (0− ), υC (0− ), iL (0),
υC (0), iL (∞), and υC (∞).
2Ω
+
i1
30 V
t=0
t=0
3Ω
t=0
+
_
+
_
+
_ υC
C
4Ω
υC _
i2
3Ω
i3
+
iL
5V
RLC CIRCUITS
υL
6Ω
5A
L
_
3Ω
10 Ω
Figure P6.11: Circuit for Problem 6.11.
Figure P6.9: Circuit for Problem 6.9.
*6.10 For the circuit in Fig. P6.10, determine iC (0), υC (0),
iR (0), υR (0), iL (0), υL (0), υL (∞), iR (∞), υC (∞), and iL (∞).
12 Ω
_ υC +
iC
iL
iR
+
_
24 V
t=0
+
L
υ
_R
8Ω
+
_
υL
6.13 Determine iL (t) in the circuit of Fig. P6.12 and plot
its waveform for t ≥ 0, given that V0 = 12 V, R1 = 0.4 �,
R2 = 1.2 �, L = 0.1 H, and C = 0.1 F. Use a time scale that
appropriately captures the shape of the waveform in your plot.
*6.14 In the circuit of Fig. P6.12, V0 = 12 V, R1 = 0.4 �,
R2 = 1.2 �, and L = 0.1 H. What should the value of C be in
order for iL (t) to exhibit a critically damped response? Provide
an expression for iL (t) and plot its waveform for t ≥ 0.
Figure P6.10: Circuit for Problem 6.10.
6.15 The voltage υ in a certain circuit is described by the
differential equation
6.11 For the circuit in Fig. P6.11, find i1 (0− ), i2 (0), υC (0),
and i3 (∞).
3υ �� + 24υ � + 75υ = 0.
(a) Determine the values of α and ω0 .
Sections 6-2 to 6-6: Series RLC Circuit
*6.12 Determine υC (t) in the circuit of Fig. P6.12 and plot
its waveform for t ≥ 0, given that V0 = 12 V, R1 = 0.4 �,
R2 = 1.2 �, L = 0.1 H, and C = 0.4 F. Use a time scale that
appropriately captures the shape of the waveform in your plot.
L
R1
+
V0 _
t=0
R2
(b) What type of damping is exhibited by υ(t)?
*6.16 In the circuit of Fig. P6.16, the switch is moved from
position 1 to position 2 at t = 0. Provide an expression for
υC (t) for t ≥ 0.
iL
C
Figure P6.12: Circuit for Problems 6.12 to 6.14.
R
υC
+
V0 _
L
1
2
t=0
C
Figure P6.16: Circuit for Problem 6.16.
υC
PROBLEMS
377
6.17 A series RLC circuit exhibits the following voltage and
current responses:
υC (t) = (6 cos 4t − 3 sin 4t)e
−2t
u(t) V,
If R = 12 �, determine the values of Vs , L, and C.
*6.22 Determine iC (t) in the circuit of Fig. 6.22 and plot its
waveform for t ≥ 0.
iC (t) = −(0.24 cos 4t + 0.18 sin 4t)e−2t u(t) A.
Determine α, ω0 , R, L, and C.
*6.18
Determine iC (t) in the circuit of Fig. P6.18 for t ≥ 0.
2Ω
8Ω
t=0
+
12 V _
iC
2H
υC
0.1 F
4Ω
4H
2Ω
2Ω
+
_ 30 V
t=0
iC
υC
0.64 F
12 Ω
Figure P6.18: Circuit for Problem 6.18.
6.19
Determine υC (t) in the circuit of Fig. 6.19 for t ≥ 0.
t=0
4 mA
4 μF
Figure P6.22: Circuit for Problems 6.22 and 6.23.
6.23 Repeat Problem 6.22, retaining the same values for all
elements in the circuit except C. Choose the value of C so that
the response of iC (t) is critically damped.
6.24 Determine iC (t) in the circuit of Fig. 6.24 and plot its
waveform for t ≥ 0, given that L = 0.05 H. Use a time scale
that appropriately captures the shape of the waveform in your
plot.
L
0.5 kΩ
0.52 Ω
iC
υC
0.25 H
4 mA
0.1 Ω
1
F
1.8
t=0
0.1 Ω
υC
Figure P6.19: Circuit for Problem 6.19.
Figure P6.24: Circuit for Problem 6.24 and 6.25.
6.20
Determine iC (t) in the circuit of Fig. 6.20 for t ≥ 0.
2Ω
8Ω
iC
t=0
0.25 H
2.5 mF
3Ω
*6.25 Choose the value of the inductor in the circuit of Fig. 6.24
so that υC exhibits a critically damped response and determine
υC (t) for t ≥ 0.
6.26 Determine iC (t) in the circuit of Fig. 6.26 and plot
its waveform for t ≥ 0, given that Vs = 24 V, R1 = 2 �,
R2 = 4 �, L = 0.4 H, and C = 10
24 F.
+
20 V _
R1
L
iC
Figure P6.20: Circuit for Problem 6.20.
+
Vs _
t=0
C
R2
6.21 The circuit in Fig. 6-4(c) exhibits the response
υ(t) = (12 + 36t)e−3t V,
(for t ≥ 0).
Figure P6.26: Circuit for Problems 6.26 and 6.27.
378
CHAPTER 6
6.27 Repeat Problem 6.26 with the elements retaining their
values, except change C to 10
29 F.
6.28
In the circuit of Fig. 6.28:
(b) How long does it take after t = 0 for υC to reach 0.99 of
its final value? [Hint: After solving for υC (t), step through
values of t over the range 2 ≤ t ≤ 2.5 to determine the
value that satisfies the stated condition.]
6Ω
4
3
Figure P6.30: Circuit for Problem 6.30.
Ω
10 Ω
0.25 F
4Ω
0.2 F
_
0.1 V +
2Ω
+
24 V _
0.3 Ω
6.31 Determine iC (t) and iL (t) in the circuit of Fig. 6.31 for
t ≥ 0.
3A
1H
iL
t=0
+
0.2 V _
*(a) What is the value of υC (∞)?
t=0
0.2 H
0.1 Ω
RLC CIRCUITS
υC
iC
1H
5 mF
t=0
+
12 V _
Figure P6.28: Circuit for Problem 6.28.
100 Ω
iL
Figure P6.31: Circuit for Problem 6.31.
*6.29 Choose the value of C in the circuit of Fig. 6.29 so
that υC (t) has a critically damped response for t ≥ 0. Plot the
waveform of υC (t).
t=0
6Ω
+
18 V _
*6.32 For the circuit in Fig. P6.32, assume that before t = 0,
the circuit had been in that state for a long time. Find υC (t) and
iL (t) for t ≥ 0.
6Ω
6Ω
0.1 H
12 Ω
C
υC
+
12 V _
Figure P6.29: Circuit for Problem 6.29.
6.30 Determine iL (t) in the circuit of Fig. 6.30 and plot its
waveform for t ≥ 0.
4V
+
_
+ υC _ 1 mH
6 μF
iL 2 mH
t=0 5Ω
Figure P6.32: Circuit for Problem 6.32.
6.33 Find υC (t) for t ≥ 0 in the circuit in Fig. P6.33.
2A
PROBLEMS
379
Section 6-7: Parallel RLC Circuit
2Ω
2Ω
10 V
+
_
4u(−t) V υC _
+
+ _
2Ω
2Ω
6.36 Determine iL (t) and iC (t) in the circuit of Fig. 6.36 and
plot both waveforms for t ≥ 0. The SPDT switch was moved
from position 1 to position 2 at t = 0.
8 mF
2Ω
2 mH
Figure P6.33: Circuit for Problem 6.33.
2Ω
0.1 F
10
6
H
Figure P6.36: Circuit for Problem 6.36.
+
_ 24 V
12 Ω
iL
t=0
2 mH
iC
0.5 mF
6Ω
6A
iC
10 μF
8Ω
+
_
iC
3Ω
t=0
4Ω
0.5 mH
iL
6.37 Determine iL (t) in the circuit of Fig. 6.37 and plot its
waveform for t ≥ 0.
10 Ω
t=0
2
t=0
+
12 V _
6.34 For the circuit in Fig. P6.34, determine:
(a) υC (0).
(b) α, ω0 , and the type of response you expect υC (t) to exhibit.
(c) iC (t) for t ≥ 0.
0.5 A
1
10 Ω
+
_υC
Figure P6.37: Circuit for Problems 6.37 and 6.39.
*6.38 Determine iL (t) in the circuit of Fig. 6.38 and plot its
waveform for t ≥ 0. The capacitor had no charge on it prior to
t = 0.
6V
Figure P6.34: Circuit for Problem 6.34.
*6.35
For the circuit in Fig. P6.35, find υC (t) for t ≥ 0.
5Ω
8V +
_
υs
t=0
+
υC _
+
1.5 mA _
iL
1.6 H
t=0
2 kΩ
0.1 μF
υC
0.5 mH
2A
4A
2 mF
2Ω
1Ω
Figure P6.35: Circuit for Problem 6.35.
Figure P6.38: Circuit for Problem 6.38.
6.39 Determine iC (t) in the circuit of Fig. 6.37 for t ≥ 0.
*6.40 Determine iL (t) in the circuit of Fig. 6.40 and plot its
waveform for t ≥ 0.
380
CHAPTER 6
500 Ω
iC
+
16 V _
t=0
iL
t=0
2.5 μF
RLC CIRCUITS
2.5 H
iL
6Ω
6Ω
C
5 mH
Figure P6.40: Circuit for Problems 6.40 and 6.41.
9V
6.41 Determine iC (t) in the circuit of Fig. 6.40 and plot its
waveform for t ≥ 0.
6.42 Determine iL (t) in the circuit of Fig. 6.42 and plot its
waveform for t ≥ 0.
25
3
200 Ω
+
16 V _
H
0.2 mF
+
_
Figure P6.44: Circuit for Problem 6.44.
6.45 For the circuit in Fig. P6.45:
(a) Determine υC (t) for t ≥ 0.
iL
t=0
800 Ω
(b) Determine the time at which the inductor has maximum
energy stored in it and calculate the amount of that
maximum energy.
Figure P6.42: Circuit for Problem 6.42.
4Ω
+
_
10 V
_
+
2Ω
6 mH
0.5 mF
2Ω
+
_υC
_
12 V +
Figure P6.45: Circuit for Problem 6.45.
5Ω
*6.46 In the circuit in Fig. P6.46, υs = 20 V.
(a) Determine iL (t) for t ≥ 0.
1 mF
1 mH
5V
3Ω
6A
t=0
iL
1Ω
t=0
6Ω
*6.43 For the circuit of Fig. 6.43, determine:
(a) iL (t) for t ≥ 0
(b) The amount of energy stored in the capacitor at t = ∞.
t=0
8Ω
15 V
+
_
(b) If the source is changed to υs (t) = e−2t u(t), can you still
use the solution method in part (a) to find iL (t)? If not,
why not?
Figure P6.43: Circuit for Problem 6.43.
6.44 Assume that the circuit in Fig. P6.44 had been in that
state for a long time prior to t = 0.
(a) Determine the value of C for which iL (t) exhibits the
fastest smooth response.
(b) Use the value of C found in part (a) to find iL (t) for t ≥ 0.
t=0
10 Ω
υs
+
_
iL
10 Ω
2 mH
1 mF
+
_υC
Figure P6.46: Circuit for Problem 6.46.
5Ω
PROBLEMS
381
Section 6-8: General Solution
*6.50 The voltage in a certain circuit is described by the
differential equation
6.47 The switch in the circuit of Fig. P6.47 was closed at t = 0
and then reopened at t = 1 ms. Determine iL (t) and υC (t) for
t ≥ 0. Assume the capacitor had no charge prior to t = 0.
t = 1 ms
iL
+
3 mA _
1 kΩ
υ �� + 5υ � + 6υ = 144
Determine υ(t) for t ≥ 0 given that υ(0) = 16 V and
υ � (0) = 9.6 V/s.
6.51 The current in a certain circuit is described by the
differential equation
t=0
3.2 H
(for t ≥ 0).
i �� +
υC
0.2 μF
√
24 i � + 6i = 18
(for t ≥ 0).
Determine
√ i(t) for t ≥ 0 given that i(0) = −2 A and
i � (0) = 8 6 A/s.
6.52 For the circuit in Fig. P6.52:
Figure P6.47: Circuit for Problem 6.47.
(a) Determine iL (0) and υL (0).
*6.48 After closing the switch in the circuit of Fig. P6.48 at
t = 0, it was reopened at t = 1 ms. Determine iC (t) and plot
its waveform for t ≥ 0. Assume no energy was stored in either
L or C prior to t = 0.
200 Ω
+
20 V _
(b) Derive the differential equation for iL (t) for t ≥ 0.
*(c) Solve the differential equation and obtain an explicit
expression for iL (t), given that Vs = 12 V, Rs = 3 �,
R1 = 0.5 �, R2 = 1 �, L = 2 H, and C = 2 F.
Rs
t = 1 ms
+
Vs _
iC
t=0
2
t=0
R1
2.5 μF
2.5 H
iL
L
1
R2
C
Figure P6.52: Circuit for Problem 6.52.
Figure P6.48: Circuit for Problem 6.48.
6.49 Determine the current responses iL (t) and iC (t) to a
rectangular-current pulse as shown in Fig. P6.49, given that
Is = 10 mA and R = 499.99 �. Plot the waveforms of iL (t),
iC (t), and is (t) on the same scale.
6.53 Develop a differential equation for iL (t) in the circuit
of Fig. P6.53. Solve it to determine iL (t) for t ≥ 0 subject
to the following element values: Is = 36 μA, Rs = 100 k�,
R = 100 �, L = 10 mH, and C = 10 μF.
R
is =
Is
0
R
t=0
t = 1 ms
iL
iC
1H
1 μF
Figure P6.49: Circuit for Problem 6.49.
Is
t=0
Rs
C
Figure P6.53: Circuit for Problem 6.53.
iL
L
382
CHAPTER 6
*6.54 Develop a differential equation for υC in the circuit of
Fig. P6.54. Solve it to determine υC (t) for t ≥ 0. The element
values are Is = 0.2 A, Rs = 30 �, R1 = 10 �, R2 = 20 �,
R3 = 20 �, L = 4 H, and C = 5 mF.
t=0
R3
R1
Is
L
Rs
C
6.57 Repeat Problem 6.56, but this time assume that the
switch had been closed for a long time and then opened at
t = 0.
*6.58 The op-amp circuit shown in Fig. P6.58 is called a
multiple-feedback bandpass filter. If υin = A u(t), determine
υout (t) for t ≥ 0 for A = 6 V, R1 = 10 k�, R2 = 5 k�,
Rf = 50 k�, and C1 = C2 = 1 μF.
C2
υC
R2
υin
Figure P6.54: Circuit for Problem 6.54.
Rs
t = 0.5 s
iL
t=0
+
Vs _
Rf
C1
R1
_
R1
R2
L
C
Figure P6.58: Circuit for Problem 6.58.
6.59 The op-amp circuit shown in Fig. P6.59 is called a
two-pole low-pass filter. If υin = A u(t), determine υout (t) for
t ≥ 0 for A = 2 V, R1 = 5 k�, R2 = 10 k�, R3 = 12 k�,
R4 = 20 k�, C1 = 100 μF, and C2 = 200 μF.
C2
υin
R1
R2
Figure P6.55: Circuit for Problem 6.55.
+
_
C1
+
Vs _
R
C1
R3
Figure P6.59: Circuit for Problem 6.59.
i2
t=0
υout
R4
*6.56 Determine i2 in the circuit of Fig. P6.56 for t ≥ 0, given
that Vs = 10 V, Rs = 0.1 M�, R = 1 M�, C1 = 1 μF, and
C2 = 2 μF.
Rs
υout
+
R2
6.55 Develop a differential equation for iL in the circuit of
Fig. P6.55. Solve it for t ≥ 0. The switch was closed at t =
0 and then reopened at t = 0.5 s, and the element values are
Vs = 18 V, Rs = 1 �, R1 = 5 �, R2 = 2 �, L = 2 H, and
1
F.
C = 17
RLC CIRCUITS
C2
Figure P6.56: Circuit for Problems 6.56 and 6.57.
Section 6-9: Multisim
6.60 Using Multisim, draw a series RLC circuit with
Vs = 24 V, R = 12 �, L = 300 mH, and C = 10 mF. Use
the Transient Analysis tool to obtain a plot of υC (t) for
0 < t < 0.2 s.
PROBLEMS
383
R1
L1
90 Ω
500 mH
+
V1 _ 5u(0.003 − t) V
R2
220 Ω
+
_
υC C1
100 μF
I1
0.1u(t − 0.05) A
Figure P6.64: Circuit for Problem 6.64.
6.61 Using Multisim, draw the circuit in Fig. E6.4 of Exercise
6.4. Use the Transient Analysis tool to obtain a plot of iC (t) for
0 < t < 1 s.
6.62 Using Multisim, draw the circuit in Fig. E6.4 of Exercise
6.4. Use the Transient Analysis tool to obtain three plots of
iC (t) for (a) an underdamped response, (b) a critically damped
response, and (c) an overdamped response. To obtain the three
desired responses, adjust the value of the 20 � resistor as
needed.
6.63 Adjust the values of the source and the components in
Fig. 6-23 such that the RLC circuit is excited and oscillates at a
frequency of 1 MHz and the oscillation envelope decays to 10
percent of its initial value after 12 oscillations once the circuit
is switched to “listen” mode.
6.64 Build the circuit shown in Fig. P6.64 in Multisim and
then plot the voltage υC (t) from 0 to 200 ms using Transient
Analysis.
6.65 Build the active second-order circuit shown in
Fig. P6.65, plot the signal υout from 0 to 5 ms, and note how
long it takes before the amplitude of the oscillations drops
below 1 V. Change the value of R2 to 100 k� and repeat the
simulation. (You may need to readjust your timescale.)
Potpourri Questions
6.66
How are transducers and actuators related?
6.67
How does a capacitive accelerometer work?
6.68 What are the differences between a passive RFID tag and
an active RFID tag?
6.69 RFID tags operate at several frequency bands. How does
the data speed change as the frequency is increased from the
LF band to the microwave band?
6.70 Describe how electrical stimulation is used in a cochlear
implant, in motor prostheses, and in reducing tremors in patients
with Parkinson’s disease.
L1
10 mH
C1
10 nF
R2
R1
1 kΩ
+
V1 _ (1 + 4u(t − 0.001)) V
_
10 kΩ
+
υout
Figure P6.65: Circuit for Problem 6.65.
Integrative Problems: Analytical / Multisim / myDAQ
To master the material in this chapter, solve the following problems using three complementary approaches: (a) analytically,
(b) with Multisim, and (c) by constructing the circuit and using
the myDAQ interface unit to measure quantities of interest
via your computer. [myDAQ tutorials and videos are available
.]
on
m6.1 Initial and Final Conditions: The SPST switch in the
circuit of Fig. m6.1 opens at t = 0, after it had been closed for
a long time. Draw the circuit configurations that appropriately
represent the state of the circuit at t = 0− , t = 0, and t = ∞
and use them to determine:
(a) υC (0), iC (0) and υC (∞), and
(b) iL (0), υL (0) and iL (∞).
Component values are: R1 = 680 �,
R2 = 100 �,
R3 = 100 �, switch resistance Rsw = 10 �, wire resistance
Rw = 10 �, L = 3.3 mH, C = 0.1 μF, and Vs = 4.7 V.
384
CHAPTER 6
R2
Rw
+
_
C
R3
Rsw
R1
m6.3 Three-Resistor Circuit: Determine υ(t) of the circuit
shown in Fig. m6.3 for t ≥ 0, given that the switch is opened
at t = 0, after having been closed for a long time. Use
the following component values: Vsrc = 8 V, R1 = 470 �,
R2 = 100 �, Rw = 90 �, C = 1.0 μF, and L = 33 mH.
(a) Plot υ(t) from 0 to 5 ms using a tool such as MathScript or
MATLAB. Include a hard copy of the script used to create
the plot.
(b) Determine the following values for υ(t):
L
υL(t)
iL(t)
iC(t)
+
_
υC(t)
+
_
t=0
RLC CIRCUITS
Vs
• Initial value υ(0),
• Final value of υ(t),
• Minimum value of υ(t), and
• Time to reach the minimum value of υ(t).
Figure m6.1 Circuit for Problem m6.1.
t=0
m6.2 Natural Response of the Series RLC Circuit: The
SPST switch in the circuit of Fig. m6.2 opens at t = 0, after it
had been closed for a long time.
+
_
Vsrc
R1
R2
+ υ(t) _
C
(a) Determine υC (t) for t ≥ 0.
(b) Plot υC (t) over the time range 0 ≤ t ≤ 1 ms with a plotting
tool such as MathScript or MATLAB.
(c) Determine the following numerical values; use either the
equation υC (t) or take cursor measurements from the plot
you created in the previous step:
• Initial voltage υC ,
• υC (0),
• Maximum value of υC ,
• Damped oscillation frequency fd = ωd /2π in Hz,
and
• Damping coefficient α.
Use these component values: R1 = 220 �,
L = 33 mH, C = 0.01 μF, and Vsrc = 3.0 V.
R1
Vsrc
+
_
t=0
C
R2 = 330 �,
R2
+
_υC(t)
Figure m6.2 Circuit for Problem m6.2.
L
Figure m6.3 Circuit for Problem m6.3.
Rw
L
7
7
CHAPTER
C H A P T E R
ac Analysis
Contents
7-1
7-2
TB18
7-3
7-4
7-5
7-6
7-7
7-8
7-9
TB19
7-10
7-11
7-12
7-13
Overview, 386
Sinusoidal Signals, 386
Review of Complex Algebra, 389
Touchscreens and Active Digitizers, 393
Phasor Domain, 396
Phasor-Domain Analysis, 400
Impedance Transformations, 403
Equivalent Circuits, 410
Phasor Diagrams, 413
Phase-Shift Circuits, 416
Phasor-Domain Analysis Techniques, 420
Crystal Oscillators, 423
ac Op-Amp Circuits, 429
Op-Amp Phase Shifter, 431
Application Note: Power-Supply
Circuits, 432
Multisim Analysis of ac Circuits, 437
Summary, 443
Problems, 444
Objectives
υ(t)
Vm
0
T/2
T
3T/2
2T
t
−Vm
Electric circuits whose currents and voltages vary sinusoidally
with time—called alternating current (ac) circuits—are at the
heart of most analog applications. This chapter and the next
four are dedicated to ac circuits.
Learn to:
Transform time-varying sinusoidal functions to
the phasor domain and vice versa.
Analyze any linear circuit in the phasor domain.
Determine the impedance of any passive element,
or the combination of elements connected in series
or in parallel.
Perform source transformations, current division
and voltage division, and determine Thévenin
and Norton equivalent circuits, all in the phasor
domain.
Apply nodal analysis, mesh analysis, and other
analysis techniques, all in the phasor domain.
Design simple RC phase-shift circuits.
Design a dc power-supply circuit.
Use Multisim to analyze ac circuits
386
Overview
From solar illumination to radio and cell-phone transmissions,
we are surrounded by electromagnetic (EM) waves all of
the time. EM waves are composed of sinusoidally varying
electric and magnetic fields, and the fundamental parameter
that distinguishes one EM wave from another is the wave’s
frequency f (or equivalently, its wavelength λ = c/f , where
c = 3 × 108 m/s is the velocity of light in a vacuum). The
frequency of red light, for example, is 4.3 × 1014 Hz, and one
of the frequencies assigned to cell-phone traffic is 1,900 MHz
(1.9×109 Hz). Both are EM waves—and so are X-rays, infrared
waves, and microwaves—but they oscillate sinusoidally at
different frequencies and interact with matter differently (see
Technology Brief 20 on the Electromagnetic Spectrum).
The term “ac” (alternating current) is associated with
electric circuits whose currents and voltages vary sinusoidally
with time, just like EM waves. In fact, ac circuits and EM
waves are not only similar, but they also are connected directly:
when flowing in a conductor, an ac current with an oscillation
frequency f radiates EM waves of the same frequency. The
radiated waves can couple signals from one part of the circuit
to another through the air space they share or the insulating
regions between them. The coupling may serve as an intentional
means of communication, as in the case of radio frequency
identification (RFID) circuits, or it may introduce unwelcome
signals that interfere with the intended operation of the circuit.
Mitigation of such undesirable consequences is part of a
subdiscipline of electrical engineering called electromagnetic
compatibility.
This and the next four chapters will be devoted to the study
of ac circuits, which are far more prevalent than dc circuits
and offer a much broader array of practical applications. In our
study, we will assume that all currents and voltages are confined
to the discrete elements in the circuit and to the connections
between them, allowing us to ignore EM-compatibility issues
altogether.
In Chapter 12, we will learn how to use the Laplace
transform technique to determine the response of a circuit
to any source with any realistic waveform, including ac
sources. In general, the solution consists of two components,
a transient component—in response to sudden changes, such
as the opening or closing of switches—and a steady state
component that mimics the time variation of the source. If (a)
all the sources in the circuit are ac sources and (b) our interest
is in only the steady state component (because the transient
component decays to approximately zero within a short time
after connecting the circuit to the ac source), we can use the
phasor domain technique (instead of the Laplace transform
technique) to analyze the circuit, because it is mathematically
CHAPTER 7 AC ANALYSIS
simpler and easier to implement. In fact, the phasor domain
technique is a special case of the Laplace transform technique.
The phasor domain technique—also known as the
frequency domain technique—applies to ac circuits only,
and provides a solution of only the steady state component
of the total solution. 7-1 Sinusoidal Signals
The voltage between two points in a circuit (or the current
flowing through a branch) is said to have a sinusoidal waveform
if its time variation is given by a sinusoidal function. The term
sinusoid includes both sine and cosine functions. For example,
the expression
υ(t) = Vm cos ωt
(7.1)
π (rad) ≈ 3.1416 (rad) = 180◦ .
(7.2)
describes a sinusoidal voltage υ(t) that has an amplitude Vm and
an angular frequency ω. The amplitude defines the maximum
or peak value that υ(t) can reach, and −Vm is its lowest negative
value. The argument of the cosine function, ωt, is measured
either in degrees or in radians, with
Since ωt is measured in radians, the unit for ω is (rad/s).
Figure 7-1(a) displays a plot of υ(t) as a function of ωt. The
familiar cosine function starts at its maximum value (at ωt =
0), decreases to zero at ωt = π/2, goes into negative territory
for half of a cycle, and completes its first cycle at ωt = 2π.
Occasionally, we may want to display a sinusoidal signal as a
function of t, instead of ωt. We note that the angular frequency ω
is related to the oscillation frequency (or simply the frequency)
f of the signal by
ω = 2πf
(rad/s),
(7.3)
with f measured in hertz (Hz), which is equivalent to
cycles/second. A sinusoidal voltage with a frequency of 100 Hz
makes 100 oscillations in 1 s, each of duration 1/100 = 0.01 s.
The duration of a cycle is its period T . Thus,
T =
1
f
(s).
(7.4)
By combining Eqs. (7.1), (7.3), and (7.4), υ(t) can be rewritten
as
2π t
,
(7.5)
υ(t) = Vm cos
T
7-1
SINUSOIDAL SIGNALS
387
Table 7-1: Useful trigonometric identities (additional
υ(t)
relations are given in Appendix D).
Vm
0
π/2
π
2π
3π
4π
ωt
υ(t) versus ωt
−Vm
(a)
υ(t)
Vm
0
−Vm
T/2
T
3T/2
2T
(7.7a)
(7.7b)
(7.7c)
(7.7d)
(7.7e)
(7.7f)
sin(x ± y) = sin x cos y ± cos x sin y
cos(x ± y) = cos x cos y ∓ sin x sin y
(7.7g)
(7.7h)
2 sin x sin y = cos(x − y) − cos(x + y)
2 sin x cos y = sin(x + y) + sin(x − y)
2 cos x cos y = cos(x + y) + cos(x − y)
(7.7i)
(7.7j)
(7.7k)
t
In addition to ωt, the argument of the cosine function contains
a constant angle of −60◦ . A cosine-referenced sinusoidal
function generally takes the form
υ(t) versus t
(b)
Figure 7-1: The function υ(t) = Vm cos ωt plotted as a
function of (a) ωt and (b) t.
which is displayed in Fig. 7-1(b) as a function of t. We observe
that the cyclical pattern of the waveform repeats itself every T
seconds. That is,
υ(t) = υ(t + nT )
(7.6)
for any integer value of n.
Sinusoidal waveforms can be expressed in terms of either
sine or cosine functions.
To avoid confusion, we adopt the cosine form as
our reference standard throughout this and followup
chapters. This means that we will always express voltages and currents in
terms of cosine functions, so if a voltage (or current) waveform
is given in terms of a sine function, we should first convert it
to a cosine form with a positive amplitude before proceeding
with our circuit analysis. Conversion from sine to cosine form
is realized through the application of Eq. (7.7a) of Table 7-1.
For example,
i(t) = 6 sin(ωt + 30◦ )
sin x = ± cos(x ∓ 90◦ )
cos x = ± sin(x ± 90◦ )
sin x = − sin(x ± 180◦ )
cos x = − cos(x ± 180◦ )
sin(−x) = − sin x
cos(−x) = cos x
= 6 cos(ωt + 30◦ − 90◦ ) = 6 cos(ωt − 60◦ ).
(7.8)
υ(t) = Vm cos(ωt + φ),
(7.9)
where φ is called its phase angle. For i(t) of Eq. (7.8),
φ = −60◦ .
The angle φ may assume any positive or negative value,
but we usually add or subtract multiples of 2π radians (or
equivalently, multiples of 360◦ ) so that the remainder is between
−180◦ and +180◦ . The magnitude and sign (+ or −) of φ
determine, respectively, by how much and in what direction
the waveform of υ(t) is shifted along the time axis, relative
to the reference waveform corresponding to υ(t) with φ = 0.
Figure 7-2 displays three waveforms:
υ1 (t) = Vm cos
2π t
π
−
T
4
(lags by π/4),
(7.10a)
2π t
(reference waveform with φ = 0),
T
(7.10b)
2π t
π
υ3 (t) = Vm cos
+
(leads by π/4). (7.10c)
T
4
υ2 (t) = Vm cos
We observe that waveform υ3 (t), which is shifted backwards in
time relative to the reference waveform υ2 (t), attains its peak
value before υ2 (t) does. Consequently, waveform υ3 (t) is said
to lead υ2 (t) by a phase lead of π/4. Similarly, waveform
υ1 (t) lags υ2 (t) by a phase lag of π/4. A cosine function
with a negative phase angle φ takes longer to reach a specified
388
CHAPTER 7 AC ANALYSIS
υ
υ3(t): Leads reference wave
(occurs earlier in time)
Vm
υ2(t): Reference wave (ϕ = 0)
υ1(t): Lags reference wave (occurs later in time)
ϕ = π/4
ϕ = −π/4
∆t
T
2
T
3T
2
t
−Vm
Figure 7-2: Plots of υ(t) = Vm cos[(2π t/T ) + φ] for three different values of φ.
reference level (such as the peak value) than it takes the zerophase angle function to reach that level, signifying a phase lag.
When φ is positive, it signifies a phase lead. A phase angle of
2π corresponds to a time shift along the time axis equal to one
full period T . Proportionately, a phase angle of φ (in radians)
corresponds to a time shift �t given by
φ
T.
(7.11)
�t =
2π
We generalize our discussion of phase lead and lag by stating
that:
Given two sinusoidal functions with the same angular
frequency ω, and both expressed in standard cosine form
as
and
υ1 (t) = V1 cos(ω + φ1 )
Example 7-1: Voltage Waveform
A sampling oscilloscope is used to measure a voltage signal
υ(t). The measurements reveal that υ(t) is periodic with an
amplitude of 10 V, its maxima are separated by 20 ms, and one
of its maxima occurs at t = 1.2 ms. Determine the functional
form of υ(t).
Solution: Given that Vm = 10 V and
T = 20 ms = 2 × 10−2 s,
υ(t) is given by
υ(t) = 10 cos
(out of phase)
= 10 cos(100π t + φ) V.
10 = 10 cos(100π × 1.2 × 10−3 + φ),
υ2 leads υ1 by (φ2 − φ1 ),
υ1 and υ2 are in phase-opposition
which requires the argument of the cosine to be a multiple of
2π,
the relevant terminology is:
υ1 and υ2 are in phase
2π t
+φ
2 × 10−2
Application of υ(t = 1.2 ms) = 10 V gives
υ2 (t) = V2 cos(ω + φ2 ),
υ2 lags υ1 by (φ1 − φ2 ),
0.12π + φ = 2nπ,
if φ2 = φ1 ,
if φ2 = φ1 ± 180◦ .
n = 0, ±1, ±2, . . .
The smallest value of φ in the range [−180◦ , 180◦ ] that satisfies
the preceding equation corresponds to n = 0, and is given by
φ = −0.12π = −21.6◦ .
Hence,
υ(t) = 10 cos(100π t − 21.6◦ ) V.
7-2
REVIEW OF COMPLEX ALGEBRA
389
Example 7-2: Phase Lead / Lag
Exercise 7-2: Given two current waveforms:
Given the current waveforms
and
and
i1 (t) = −8 cos(ωt − 30◦ ) A
i1 (t) = 3 cos ωt
i2 (t) = 3 sin(ωt + 36◦ ),
does i2(t) lead or lag i1(t), and by what phase angle?
i2 (t) = 12 sin(ωt + 45◦ ) A,
Answer: i2(t) lags i1(t) by 54◦. (See
)
does i1 (t) lead i2 (t), or the other way around, and by how much?
Solution: Standard cosine format requires that the sinusoidal functions be cosines and that the amplitudes have positive
values. Application of Eq. (7.7d) of Table 7-1 allows us to
remove the negative sign preceding the amplitude of i1 (t),
i1 (t) = −8 cos(ωt − 30◦ ) = 8 cos(ωt − 30◦ + 180◦ )
= 8 cos(ωt + 150◦ ) A.
Application of Eq. (7.7a) to i2 (t) leads to
7-2 Review of Complex Algebra
This section provides a review of complex algebra, in
preparation for the introduction of the phasor domain technique
in Section 7-3.
A complex number z may be written in the rectangular form
z = x + jy,
i2 (t) = 12 sin(ωt + 45◦ ) = 12 cos(ωt + 45◦ − 90◦ )
= 12 cos(ωt − 45◦ ) A.
Hence, φ1 = 150◦ , φ2 = −45◦ , and
where x and y are the real
√ (Re) and imaginary (Im) parts of z,
respectively, and j = −1. That is,
x = Re(z),
◦
�φ = φ2 − φ1 = −195 .
(7.12)
y = Im(z).
(7.13)
Alternatively, z may be written in polar form as
The concept of phase lead/lag requires that �φ be within the
range [−180◦ , 180◦ ]. Addition of 360◦ to �φ converts it to
165◦ , which means that i2 leads i1 by 165◦ .
Concept Question 7-1: A sinusoidal waveform is
characterized by three parameters. What are they, and
what does each one of them specify? (See
)
z = |z|ej θ = |z| θ
(7.14)
where |z| is the magnitude of z, θ is its phase angle, and the
form θ is a useful shorthand representation commonly used
in numerical calculations. A phase angle may be expressed in
degrees, as in θ = 30◦ , or in radians, as in θ = 0.52 rad.
By applying Euler’s identity,
Concept Question 7-2: Waveforms υ1 (t) and υ2 (t) have
the same angular frequency, but υ1 (t) leads υ2 (t). Will
the peak value of υ1(t) occur sooner or later than that of
)
υ2(t)? Explain. (See
Exercise 7-1: Provide an expression for a 100 V, 60 Hz
voltage that exhibits a minimum at t = 0.
Answer: υ(t) = 100 cos(120πt + 180◦) V. (See
)
ej θ = cos θ + j sin θ,
(7.15)
we can convert z from polar form, as in Eq. (7.14), into
rectangular form, as in Eq. (7.12)),
z = |z|ej θ = |z| cos θ + j |z| sin θ,
(7.16)
390
CHAPTER 7 AC ANALYSIS
Im(z)
x = |z| cos θ
y = |z| sin θ
z
y
both cases. Also note that, since |z| is a positive quantity, only
the positive root in Eq. (7.18) is applicable.
The complex conjugate of z, denoted with a star superscript
(or asterisk), is obtained by replacing j (wherever it appears)
with −j , so that
+
|z| = x2 + y2
θ = tan−1 (y/x)
|z|
z∗ = (x + jy)∗ = x − jy = |z|e−j θ = |z| −θ .
θ
Re(z)
x
The magnitude |z| is equal to the positive square root of the
product of z and its complex conjugate:
Figure 7-3: Relation between rectangular and polar
representations of a complex number z = x + jy = |z|ej θ .
|z| =
y = |z| sin θ,
(7.17)
θ = tan−1 (y/x).
(7.18)
The two forms of z are illustrated graphically in Fig. 7-3.
Because in the complex plane, a complex number assumes the
form of a vector, it is represented by a bold letter in this book.
When using Eq. (7.18), care should be taken to ensure that
θ is in the proper quadrant by noting the signs of x and y
individually, as illustrated in Fig. 7-4. Complex numbers z2 and
z4 point in opposite directions and their phase angles θ2 and θ4
differ by 180◦ , despite the fact that (y/x) has the same value in
θ2 = 180o − θ1
3
θ2 2
1
z3 = −2 − j3
z1 = x1 + jy1 = |z1 |ej θ1 ,
(7.21a)
,
(7.21b)
z2 = x2 + jy2 = |z2 |e
j θ2
then z1 = z2 if and only if (iff) x1 = x2 and y1 = y2 or,
equivalently, |z1 | = |z2 | and θ1 = θ2 .
Addition:
z1 + z2 = (x1 + x2 ) + j (y1 + y2 ).
= (x1 x2 − y1 y2 ) + j (x1 y2 + x2 y1 ),
z1 = 2 + j3
θ1
θ1 =
3
tan−1 2
(7.22)
Multiplication:
z1 z2 = (x1 + jy1 )(x2 + jy2 )
2 3
−3 −2 −1
1
−1
θ3 = −θ2
θ θ4 θ4 = −θ1
−2 3
−3
(7.20)
Equality: If two complex numbers z1 and z2 are given by
Im(z)
z2 = −2 + j3
√
z z∗ .
We now highlight some of the properties of complex algebra
that we will likely encounter in future sections.
which leads to the relations
x = |z| cos θ,
|z| = x 2 + y 2 ,
(7.19)
(7.23a)
or
= 56.3o
Re(z)
z4 = 2 − j3
Figure 7-4: Complex
numbers z1 to z4 have the same
magnitude |z| = 22 + 32 = 3.61, but their polar angles
depend on the polarities of their real and imaginary components.
z1 z2 = |z1 |ej θ1 · |z2 |ej θ2
= |z1 ||z2 |ej (θ1 +θ2 )
= |z1 ||z2 |[cos(θ1 + θ2 ) + j sin(θ1 + θ2 )].
(7.23b)
Division: For z2 �= 0,
z1
x1 + jy1
(x1 + jy1 ) (x2 − jy2 )
=
=
·
z2
x2 + jy2
(x2 + jy2 ) (x2 − jy2 )
(x1 x2 + y1 y2 ) + j (x2 y1 − x1 y2 )
=
,
x22 + y22
(7.24a)
7-2
REVIEW OF COMPLEX ALGEBRA
391
Table 7-2: Properties of complex numbers.
sin θ =
ej θ − e−j θ
2j
Euler’s Identity: ej θ = cos θ + j sin θ
z = x + jy = |z|ej θ
cos θ =
ej θ + e−j θ
2
z∗ = x − jy = |z|e−j θ
zn = |z|n ej nθ
�
√
|z| = zz∗ = x 2 + y 2
⎧ −1
tan (y/x)
⎪
⎪
⎪ −1
⎨
tan (y/x) ± π
θ=
⎪
π/2
⎪
⎪
⎩
−π/2
z1/2 = ±|z|1/2 ej θ/2
z1 = z2 iff x1 = x2 and y1 = y2
z1 + z2 = (x1 + x2 ) + j (y1 + y2 )
x = Re(z) = |z| cos θ
y = Im(z) = |z| sin θ
z1 = x1 + jy1
z1 z2 = |z1 ||z2 |ej (θ1 +θ2 )
−1 = ej π = e−j π = 1 ±180◦
j = ej π/2 = 1 90◦
�
(1 + j )
j = ±ej π/4 = ± √
2
if x
if x
if x
if x
> 0,
< 0,
= 0 and y > 0,
= 0 and y < 0.
z2 = x2 + jy2
|z1 | j (θ1 −θ2 )
z1
=
e
z2
|z2 |
−j = e−j π/2 = 1 −90◦
�
(1 − j )
−j = ±e−j π/4 = ± √
2
Useful Relations:
or
|z1 |ej θ1
|z1 | j (θ1 −θ2 )
z1
=
=
e
z2
|z2 |ej θ2
|z2 |
|z1 |
=
[cos(θ1 − θ2 ) + j sin(θ1 − θ2 )].
|z2 |
(7.24b)
Powers: For any positive integer n,
zn = (|z|ej θ )n
= |z|n ej nθ = |z|n (cos nθ + j sin nθ),
(7.25)
= ±|z|1/2 [cos(θ/2) + j sin(θ/2)].
(7.26)
z1/2 = ±|z|1/2 ej θ/2
−1 = ej π = e−j π = 1 180◦ ,
j = ej π/2 = 1 90◦ ,
j π/2
−j π/2
(7.27a)
(7.27b)
−90◦ ,
−j = −e
=e
=1
�
±(1 + j )
j = (ej π/2 )1/2 = ±ej π/4 =
,
√
2
�
±(1 − j )
−j = ±e−j π/4 =
.
√
2
(7.27c)
(7.27d)
(7.27e)
For quick reference, the preceding properties of complex
numbers are summarized in Table 7-2. Note that if a complex
number is given by (a + j b) and b = 1, it can be written either
as (a + j 1) or simply as (a + j ). Thus, j is synonymous with
j 1.
392
CHAPTER 7 AC ANALYSIS
Since our preference is to end up with a phase angle within
the range between −180◦ and +180◦ , we will choose −180◦ .
Hence,
Im
θI
|I|
I
◦
−3
−2
I = 3.61e−j 123.7 .
Re
θV
(b)
|V|
VI = (5 −53.1◦ )(3.61 −123.7◦ )
−3
−4
= (5 × 3.61) (−53.1◦ − 123.7◦ ) = 18.05 −176.8◦ .
V
Figure 7-5: Complex numbers V and I in the complex plane
(c)
(Example 7-3).
◦
◦
V
5e−j 53.1
j 70.6◦
.
=
◦ = 1.39e
−j
123.7
I
3.61e
Given two complex numbers
(e)
V = 3 − j 4,
√
I = −(2 + j 3).
Solution: (a)
√
VV∗ = (3 − j 4)(3 + j 4) = 9 + 16 = 5,
θV = tan−1 (−4/3) = −53.1◦ ,
◦
V = |V|ej θV = 5e−j 53.1 = 5 −53.1◦ ,
√
|I| = 22 + 32 = 13 = 3.61.
θI =
I=
−180 + tan−1 23
3.61 −123.7◦ .
same magnitude, are they necessarily equal to each other?
(See
)
= −123.7 ,
z1 = (4 − j 3)2 ,
Alternatively, whenever the real part of a complex number is
negative, we can factor out a (−1) multiplier and then use
Eq. (7.27a) to replace it with a phase angle of either +180◦
or −180◦ , as needed. In the case of I, the process is as follows:
◦
I = −2 − j 3 = −(2 + j 3) = e±j 180 ·
◦
22 + 32 ej tan
◦
= 3.61ej 57.3 e±j 180 .
Exercise 7-3: Express the following complex functions
in polar form:
◦
Concept Question 7-3: If Z is a complex number that
lies in the first quadrant in the complex plane, its
complex conjugate Z∗ will lie in which quadrant?
(See
)
Concept Question 7-4: If two complex numbers have the
Since I = (−2 − j 3) is in the third quadrant in the complex
plane (Fig. 7-5),
◦
◦
3.61e−j 123.7
√
◦
◦
= ± 3.61 e−j 123.7 /2 = ±1.90e−j 61.85 .
I=
(a) Express V√and I in polar form, and find (b) VI, (c) VI∗ , (d)
V/I, and (e) I .
|V| =
◦
(d)
Example 7-3: Working with Complex Numbers
√
◦
VI∗ = 5e−j 53.1 × 3.61ej 123.7 = 18.05ej 70.6 .
z2 = (4 − j 3)1/2 .
Answer:
(See
)
z1 = 25 −73.7◦ ,
√
z2 = ± 5 −18.4◦ .
−1 (3/2)
Exercise 7-4: Show that
√
2j = ±(1 + j ). (See
)
TECHNOLOGY BRIEF 18: TOUCHSCREENS AND ACTIVE DIGITIZERS
Technology Brief 18
Touchscreens and Active Digitizers
Touchscreen is the common name given to a wide variety
of technologies that allow computer displays to directly
sense information from the user. In older systems, this
usually meant the display could detect and pinpoint where
a user touched the screen surface; newer systems can
detect multiple touch locations as well as the associated
touch pressures simultaneously, with very high resolution.
This has led to a surge of applications in mobile computing, cell phones, personal digital assistants (PDA), and
consumer appliances. Interactive touchscreens which detect multiple touches and interact with styli are now commonly used in phones, tablet computers and e-readers.
Numerous technologies have been developed since
the invention of the electronic touch interface in 1971 by
Samuel C. Hurst. Some of the earlier technologies were
susceptible to dust, damage from repeat use, and poor
transparency. These issues largely have been resolved
over the years (even for older technologies) as experience
and advanced material selection have led to improved
devices. With the explosion of consumer interest in
portable, interactive electronics, newer technologies have
emerged that are more suitable for these applications.
Figure TF18-1 summarizes the general categories of
touchscreens in use today. Historically, touchscreens
were manufactured separately from displays and added
as an extra layer of the display. More recently, display companies have begun to manufacture sensing technology
directly into the displays; some of the newer technologies
reflect this.
Resistive
Resistive touchscreens are perhaps the simplest to
understand. A thin, flexible membrane is separated from
a plastic base by insulating spacers. Both the thin
membrane and the plastic base are coated on the inside
with a transparent conductive film (indium tin oxide (ITO)
often is used). When the membrane is touched, the two
conductive surfaces come into contact. Detector circuits
at the edges of the screen can detect this change in
resistance between the two membranes and pinpoint the
location on the X–Y plane. Older designs of this type were
susceptible to membrane damage (from repeated flexing)
and suffered from poor transparency.
393
Capacitive
Older capacitive touchscreens employ a single thin,
transparent conductive film (usually indium tin oxide
(ITO)) on a plastic or glass base. The conductive film
is coated with another thin, transparent insulator for
protection. Since the human body stores charge, a finger
tip moved close to the surface of the film effectively forms
a capacitor where the film acts as one of the plates and
the finger as the other. The protective coating and the air
form the intervening dielectric insulator. This capacitive
coupling changes how a current flowing across the film
surface is distributed; by placing electrodes at the screen
corners and applying an ac electric signal, the location of
the finger capacitance can be calculated precisely. One
variant of this idea is to divide the sensing area into many
smaller squares (just like pixels on the display) and to
sense the change in capacitance across each of them
continuously and independently; this is commonly known
as self-capacitance sensing. A newer development,
found in many modern portable devices, is the use
of mutual capacitance sensing touchscreens, which
employ two sets of conductive lines, each on a different
layer. On one layer, the lines might run horizontally, while
on another layer below the first the lines run vertically. At
each point of overlap between the lines on the two layers,
a parallel plate capacitor is formed. If there are M lines
on the top layer and N lines on the bottom, there will be
M ×N such nodes.Whenever a finger moves near a node,
the capacitance of the node changes. By monitoring the
capacitance of each node continuously, the touchscreen
can detect when touches occur and where. The principal
advantages of a touchscreen of this type are its ability
to detect many simultaneous touches and its ability to
detect very light ones. Capacitive technologies are much
more resistant to wear and tear (since they are not flexed)
than resistive touchscreen and are somewhat more transparent (> 85 percent transparency) since they can have
fewer films and avoid air gaps. These types of screens
can be used to detect metal objects as well, so pens with
conductive tips can be used on writing interfaces.
Not all capacitive touch systems are integrated with
screens; a number of interactive media technologies
developed over the last 15 years integrate the touch
sensing technology into furniture, household objects, or
even countertops and overlay a display using nearby
projection equipment. Some interactive tables operate
this way. A completely different way to detect touch relies
on the measurement of acoustic energy on or near the
touchscreen. There are several ways to make use of
394
TECHNOLOGY BRIEF 18: TOUCHSCREENS AND ACTIVE DIGITIZERS
Membrane
Conductive film
Cfinger
Spacer
Plastic
Plastic
(a) Resistive
Strain
sensor
(b) Capacitive
Strain
sensor
Force
Stress
Membrane
Conductive film
Stress
Acoustic
emitter
5 MHz
Acoustic wave
Screen
Acoustic
dampening
(d) Acoustic
LC
R
(c) Pressure
Acoustic
sensor
LED
IR beam
Pen
Electromagnetic
radiation
Detector
Screen
(e) Infrared
(f) Active digitizer
Wires
Figure TF18-1: Touchscreen technologies: (a) resistive, (b) capacitive, (c) pressure/strain sensor, (d) acoustic, (e) infrared,
and (f) active digitizer.
acoustic energy to measure touch. One implementation
relies on transmission of high-frequency acoustic energy
across the surface of the display material.
Pressure
Touch also can be detected mechanically. Pressure
sensors can be placed at the corners of the display screen
or even the entire display assembly, so whenever the
screen is depressed, the four corners will experience
different stresses depending on the (X,Y) position of
the pressure point. Pressure screens benefit from high
resistance to wear and tear and no losses in transparency
(since there is no need to add layers over the display
screen).
TECHNOLOGY BRIEF 18: TOUCHSCREENS AND ACTIVE DIGITIZERS
Acoustic
A completely different way to detect touch relies on the
transmission of high-frequency acoustic energy across
the surface of the display material. Bursts of 5 MHz tones
are launched by acoustic actuators from two corners of
the screen. Acoustic reflectors all along the edges of the
screen re-direct the incoming waves to the sensors. Any
time an object comes into contact with the screen, it
dampens or absorbs some fraction of the energy traveling
across the material. The exact (X,Y) position can be
calculated from the energy hitting the acoustic sensors.
The contact force can be calculated as well, because the
acoustic energy is dampened more or less depending on
how hard the screen is pressed.
Another approach is to listen, with very sensitive
acoustic transducers (i.e., microphones) to the characteristic pressure signal (e.g., sound) made in the
touchscreen material when it is touched. By placing
several transducers around the edge of the screen, the
system can determine if a touch occurred and where. One
drawback is that motionless fingers cannot be detected.
However, this does provide an advantage in that resting
objects (i.e., your cheek) do not trigger the screen.
This method is sometimes known as acoustic pulse
recognition.
Infrared
One of the oldest and least used technologies is the
infrared touchscreen. This technology relies on infrared
emitters (usually infrared diodes) aligned along two
adjoining edges of the screen and infrared detectors
aligned across from the emitters at the other two edges.
The position of a touch event can be determined through
a process based on which light paths are interrupted.
The detection of multiple simultaneous touch events is
possible. Infrared screens are somewhat bulky, prone to
damage or interference from dust and debris, and need
special modifications to work in daylight.They largely have
been displaced by newer technologies.
Electromagnetic Resonance
Another technology in widespread use is the electromagnetic resonance detection scheme used by many tablet
PCs. Strictly speaking, many tablet PC screens are not
touchscreens; they are called active digitizers because
they can detect the presence and location of the tablet
pen as it approaches the screen (even without contact).
In this scheme, a very thin wire grid is integrated within
395
the display screen (which usually is a flat-profile LCD
display). The pen itself contains a simple RLC resonator
(see Section 6-1) with no power supply. The wire grid
alternates between two modes (transmit and receive)
every ∼ 20 milliseconds. The grid essentially acts as an
antenna. During the transmit mode, an ac signal is applied
to the grid and part of that signal is emitted into the air
around the display. As the pen approaches the grid, some
energy from the grid travels across to the pen’s resonator
which begins to oscillate. In receive mode, the grid is used
to “listen” for ac signals at the resonator frequency; if those
signals are present, the grid can pinpoint where they are
across the screen. A tuning fork provides a good analogy.
Imagine a surface vibrating at a musical note; if a tuning
fork designed to vibrate at that note comes very close to
that surface, it will begin to oscillate at the same frequency.
Even if we were to stop the surface vibrations, the tuning
fork will continue to make a sound for a little while longer
(as the resonance dies down). In a similar way, the laptop
screen continuously transmits a signal and listens for
the pen’s electromagnetic resonance. Functions (such as
buttons and pressure information) can be added to the
pen by having the buttons change the capacitance value
of the LCR when pressed; in this way, the resonance
frequency will shift (see Section 6-2), and the shift can
be detected by the grid and interpreted as a button press.
Increased Integration
Mobile devices have largely driven the development of
advanced touch technologies in the last few years. Given
the constant pressure to miniaturize and integrate, a
number of companies have or are developing integrated
touch and display systems. Unlike the earlier-generation
technologies, the display and the touch sensor are
not manufactured separately and then integrated during
assembly. Rather, the touch sensor conductors (in the
case of capacitive sensing) are designed into the very
display itself, either into the conductive traces in/on the
pixels of the display or immediately over them. In other
designs, light-sensing pixels are manufactured into each
display pixel of a display, giving the display not only the
ability to produce images but also to sense nearby objects
that occlude light landing on the sensing pixels. Even
the integrated circuits are increasingly being integrated;
earlier-generation systems relied on stand-alone touch
controller IC chips that managed the sensor information
and communicated it to the application processor in
the mobile devices. There is a push to integrate this
functionality into some phone processors directly.
396
CHAPTER 7 AC ANALYSIS
7-3 Phasor Domain
In this chapter, we explore how currents and voltages defined in
the time domain are transformed into their counterparts in the
phasor domain (also called the frequency domain), and why
such a transformation facilitates the analysis of ac circuits.
The KVL and KCL equations characterizing an ac circuit
containing capacitors and inductors take the form of integrodifferential equations with forcing functions (representing the
real sources in the circuit) that vary sinusoidally with time.
The phasor technique allows us to transform the equations
from the time domain to the phasor domain, as a result of
which the integro-differential equations get converted into
linear equations with no sinusoidal functions. After solving for
the desired variable—such as a particular voltage or current—
in the phasor domain, conversion back to the time domain
provides the same solution that we would have obtained had
we solved the integro-differential equations entirely in the time
domain. The procedure involves multiple steps, but it avoids
the complexity of solving differential equations containing
sinusoidal functions.
X = |X|ej φ .
(7.29)
Using this expression in Eq. (7.28) gives
x(t) = Re[|X|ej φ ej ωt ] = Re[|X|ej (ωt+φ) ] = |X| cos(ωt +φ).
(7.30)
Application of the Re operator allows us to transform a function
from the phasor domain to the time domain. The reverse
operation, namely to specify the phasor-domain equivalent of a
time function, can be ascertained by comparing the two sides of
Eq. (7.30). Thus, for a voltage υ(t) with phasor counterpart V,
the correspondence between the two domains is as follows:
Time Domain
Phasor Domain
υ(t) = V0 cos ωt
V = V0
υ(t) = V0 cos(ωt + φ)
(7.31a)
V = V0 ej φ .
(7.31b)
If φ = −π/2,
υ(t) = V0 cos(ωt − π/2)
7-3.1 Time-Domain/Phasor-Domain
Correspondence
V = V0 e−j π/2 .
(7.32)
Since cos(ωt − π/2) = cos(π/2 − ωt) = sin ωt and
Transformation from the time domain to the phasor domain
entails transforming all time-dependent quantities in the circuit,
which in effect transforms the entire circuit from the time
domain to an equivalent circuit in the phasor domain. The
quantities involved in the transformation include all currents
and voltages, all sources, and all capacitors and inductors. The
values of capacitors and inductors do not change per se, but
their i–υ relationships undergo a transformation because they
involve differentiation or integration with respect to t.
Any cosinusoidally time-varying function x(t), representing
a voltage or a current, can be expressed in the form
x(t) = Re[ X ej ωt ],
In general, the phasor-domain quantity X is complex,
consisting of a magnitude |X| and a phase angle φ,
(7.28)
phasor
where X is a time-independent function called the phasor
counterpart of x(t). Thus, x(t) is defined in the time domain,
while its counterpart X is defined in the phasor domain.
To distinguish phasor quantities from their timedomain counterparts, phasors are always represented by
bold letters in this book. e−j π/2 = cos(π/2) − j sin(π/2) = −j ,
Eq. (7.32) reduces to
υ(t) = V0 sin ωt
V = −j V0 ,
(7.33)
V = V0 ej (φ−π/2) .
(7.34)
which can be generalized to
υ(t) = V0 sin(ωt + φ)
Occasionally, voltage and current time functions may encounter
differentiation or integration. For example, consider a current
i(t) with a corresponding phasor I,
i(t) = Re[Iej ωt ],
(7.35)
where I may be complex but, by definition, not a function of
time. The derivative di/dt is given by
d
d
di
= [Re(Iej ωt )] = Re
(Iej ωt ) = Re[j ωI ej ωt ],
dt
dt
dt
phasor of di/dt
(7.36)
where in the second step we interchanged the order of the two
operators, Re and d/dt, which is justified by the fact that the
two operators are independent of one another, meaning that
taking the real part of a quantity has no influence on taking its
7-3
PHASOR DOMAIN
397
time derivative, and vice versa. We surmise from Eq. (7.36) that
di
dt
(7.37)
j ωI,
or:
Differentiation of a time function i(t) in the time
domain is equivalent to multiplication of its phasor
counterpart I by j ω in the phasor domain. i dt =
Re[Iej ωt ] dt
= Re
I j ωt
Iej ωt dt = Re
e
,
jω
phasor of
(7.38)
i dt
or
i dt
I
,
jω
x(t)
X
A cos ωt
A
A cos(ωt + φ)
Aej φ
A sin ωt
Ae−j π/2 = −j A
−A cos(ωt + φ)
Aej (φ±π)
A sin(ωt + φ)
Aej (φ−π/2)
Aej (φ+π/2)
d
(x(t))
dt
d
[A cos(ωt + φ)]
dt
x(t) dt
A cos(ωt + φ) dt
j ωX
j ωAej φ
1
X
jω
1
Aej φ
jω
(7.39)
iR = Re[IR ej ωt ].
which states that:
(7.41b)
Inserting these expressions into Eq. (7.40) gives
Integration of i(t) in the time domain is equivalent to
dividing its phasor I by j ω in the phasor domain. Table 7-3 provides a summary of some time functions and their
phasor-domain counterparts.
7-3.2 Impedance of Circuit Elements
The υ–i relationship for a resistor R is
υR = RiR .
(7.40)
If iR is a sinusoidal function of t, the same is true for υR . The
time-domain quantities υR and iR are related to their phasordomain counterparts by
υR = Re[VR ej ωt ]
Re[VR ej ωt ] = R Re[IR ej ωt ] = Re[RIR ej ωt ].
(7.42)
Upon combining both sides under the same real-part (Re)
operator, we have
Re[(VR − RIR )ej ωt ] = 0.
(7.43a)
Through a somewhat similar treatment that uses a sine
reference—rather than a cosine reference—to define sinusoidal
functions, we can obtain the result
Resistors
and
their cosine-reference phasor-domain counterparts X, where
x(t) = Re [Xej ωt ].
−A sin(ωt + φ)
Similarly,
Table 7-3: Time-domain sinusoidal functions x(t) and
(7.41a)
Im[(VR − RIR )ej ωt ] = 0,
(7.43b)
which, for the sake of expediency, we simply state without
taking the steps to prove it. In view of Eqs. (7.43a) and (7.43b),
both the real and imaginary components of the quantity inside
the square bracket are zero. Hence, the quantity itself is zero,
and since ej ωt �= 0, it follows that
VR − RIR = 0.
(7.44)
398
CHAPTER 7 AC ANALYSIS
In the phasor domain:
Capacitors
The impedance Z of a circuit element is defined as the
ratio of the phasor voltage across it to the phasor current
entering through its plus (+) terminal, Z=
V
I
(�),
(7.45)
and the unit of Z is the ohm (�). For a resistor, Eq. (7.44) gives
ZR =
VR
= R.
IR
(7.46)
Thus, for a resistor the impedance is entirely real, and the form
of the υ–i relationship is the same in both the time and phasor
domains.
Since for a capacitor
iC = C
dυC
,
dt
(7.52)
it follows that in the phasor domain,
IC = j ωCVC
(7.53)
and the impedance of a capacitor C is
ZC =
VC
1
.
=
IC
j ωC
(7.54)
Inductors
In the time domain, the voltage υL across an inductor L is related
to iL by
diL
υL = L
.
(7.47)
dt
Phasors VL and IL are related to their time-domain counterparts
by
and
Consequently,
Re[VL ej ωt ] = L
υL = Re[VL ej ωt ]
(7.48a)
iL = Re[IL ej ωt ].
(7.48b)
d
[Re(IL ej ωt )] = Re[j ωLIL ej ωt ],
dt
(7.49)
which leads to
VL = j ωLIL .
VL
= j ωL.
IL
In the phasor domain, a capacitor behaves like an
open circuit at dc and like a short circuit at very high
frequencies. We note that the impedance of a resistor is purely real,
that of an inductor is purely imaginary and positive, and
that of a capacitor is purely imaginary and negative (because
1/j ωC = −j/ωC). Table 7-4 provides a summary of the υ–i
properties for R, L, and C.
(7.50)
Hence, the impedance of an inductor L is
ZL =
Because ZL and ZC are, respectively, directly and inversely
proportional to ω, ZL and ZC assume inverse roles as ω
approaches zero and ∞.
Example 7-4: Phasor Quantities
(7.51)
According to Eq. (7.51), ZL is positive and entirely imaginary
(no real component); ZL → 0 as ω → 0 (dc); and ZL → ∞ as
ω → ∞. Consequently:
In the phasor domain, an inductor behaves like a
short circuit at dc and like an open circuit at very high
frequencies. Determine the phasor-domain counterparts of the following
quantities:
(a) υ1 (t) = 10 cos(2 × 104 t + 53◦ ) V,
(b) υ2 (t) = −6 sin(3 × 103 t − 15◦ ) V,
(c) L = 0.4 mH at 1 kHz,
(d) C = 2 μF at 1 MHz.
7-3
PHASOR DOMAIN
399
Table 7-4: Summary of υ–i properties for R, L, and C.
Property
R
L
C
di
dt
υ–i
υ = Ri
υ=L
V–I
V = RI
V = j ωLI
Z
R
j ωL
dc equivalent
R
High-frequency equivalent
R
|ZR|
Frequency response
Short circuit
Open circuit
Open circuit
Short circuit
|ZL|
|ZC|
R
ωL
ω
Solution: (a) Since υ1 (t) is already in cosine format,
◦
V1 = 10ej 53 = 10 53◦ V.
(b) To determine the phasor V2 corresponding to υ2 (t), we
should either convert the expression for υ2 (t) to standard cosine
format or apply the transformation for a sine function given in
Table 7-3. We choose the first option,
υ2 (t) = −6 sin(3 × 103 t − 15◦ )
= −6 cos(3 × 103 t − 15◦ − 90◦ )
3
◦
= −6 cos(3 × 10 t − 105 ) V.
To convert the amplitude from −6 to +6, we use Eq. (7.7d) of
Table 7-1, namely
− cos(x) = cos(x ± 180◦ ).
We can either add or subtract 180◦ from the argument of the
cosine. Since the argument has a negative phase angle (−105◦ ),
it is more convenient to add 180◦ . Hence,
υ2 (t) = 6 cos(3 × 103 t − 105◦ + 180◦ )
= 6 cos(3 × 103 t + 75◦ ) V,
and
◦
V2 = 6ej 75 = 6 75◦ V.
dυ
dt
I
V=
j ωC
1
j ωC
i=C
1/ωC
ω
ω
(c)
ZL = j ωL = j 2π × 103 × 0.4 × 10−3 = j 2.5 �.
(d)
ZC =
−j
−j
= −j 0.08 �.
=
ωC
2π × 106 × 2 × 10−6
Concept Question 7-5: Why is the phasor domain useful
for analyzing ac circuits? (See
)
Concept Question 7-6: Differentiation in the time
domain corresponds to what mathematical operation in
the phasor domain? (See
)
Concept Question 7-7: The unit for inductance is the
henry (H). What is the unit for the impedance ZL of an
inductor? (See
)
Concept Question 7-8: What type of circuit is equivalent
to the behavior of (a) an inductor at dc and (b) a capacitor
at very high frequencies? (See
)
400
CHAPTER 7 AC ANALYSIS
i
Exercise 7-5: Determine the phasor counterparts of the
following waveforms:
(a) i1 (t) = 2 sin(6 × 103 t − 30◦ ) A,
(b) i2(t) = −4 sin(1000t + 136◦) A
Answer:
(See
)
(a) I1 = 2 −120◦ A,
υs(t)
+
_
C
(b) I2 = 4 −134◦ A.
Figure 7-6: RC circuit connected to an ac source.
Exercise 7-6: Obtain the time-domain waveforms (in
standard cosine format) corresponding to the following
phasors at angular frequency ω = 3 × 104 rad/s:
(a) V1 = (−3 + j 4) V
(b) V2 = (3 − j 4) V
Answer: (a) υ1(t) = 5 cos(3 × 104t + 126.87◦) V,
(b) υ2(t) = 5 cos(3 × 104t − 53.13◦) V. (See
)
Exercise 7-7: At ω =
rad/s, the phasor voltage across
and current through a certain element are given by
V = 4 −20◦ V and I = 2 70◦ A. What type of element
is it?
Answer: Capacitor with C = 0.5 μF. (See
)
Phasor-Domain Analysis
In the time domain, Kirchhoff’s voltage law states that the
algebraic sum of all voltages υ1 to υn around a closed path
containing n elements is zero,
υ1 (t) + υ2 (t) + · · · + υn (t) = 0.
(7.55)
If V1 to Vn are respectively the phasor-domain counterparts of
υ1 to υn , then
Re[V1 ej ωt ] + Re[V2 ej ωt ] + · · · + Re[Vn ej ωt ] = 0, (7.56)
or equivalently,
Re[(V1 + V2 + · · · + Vn )ej ωt ] = 0.
(7.57)
Since ej ωt �= 0, it follows that
Re[V1 + V2 + · · · + Vn ] = 0.
(7.58a)
Had we used a sine convention—instead of a cosine
convention—we would have arrived at the result
Im[V1 + V2 + · · · + Vn ] = 0.
The combination of Eqs. (7.58a)(a) and (b) asserts that
V1 + V2 + · · · + Vn = 0,
(7.58c)
which states that KVL is equally applicable in the phasor
domain.
Similarly, KCL at a node leads to
106
7-4
R
(7.58b)
I1 + I2 + · · · + In = 0,
(7.59)
where I1 to In are the phasor counterparts of i1 to in .
The fact that KCL and KVL are valid in the phasor
domain is highly significant, because it implies that
the analysis tools we developed earlier on the basis of
these two laws also are valid in the phasor domain.
These include the nodal and mesh analysis methods, the
Thévenin and Norton techniques, and several others. Revisiting these tools and learning to apply them to ac circuits
is the subject of future sections in this chapter. However, we
will now introduce the basic elements of the phasor analysis
process through a simple example.
The phasor analysis method consists of five steps. To assist
us in presenting it, we use the RC circuit shown in Fig. 7-6. The
voltage source is given by
υs = 12 sin(ωt − 45◦ ) V,
(7.60)
√
with ω = 103 rad/s, R = 3 k�, and C = 1 μF. Application
of KVL generates the following loop equation:
1
Ri +
(time domain).
(7.61)
i dt = υs
C
Our goal is to obtain a solution for i(t). In general, i(t) consists
of a transient response, obtained by solving Eq. (7.61) with
υs set equal to zero (as we had done previously in Chapters 5
and 6), and a steady-state response that involves the sinusoidal
7-4
PHASOR-DOMAIN ANALYSIS
401
function υs (t). Our interest at present is in only the sinusoidal
response, which we can obtain by solving Eq. (7.61) in the time
domain, but the method of solution is somewhat cumbersome—
even for such a simple circuit—on account of the sinusoidal
voltage source. Alternatively, we can obtain the desired solution
by applying the phasor technique, which avoids dealing with
sine and cosine functions altogether.
i
Step 1
Adopt Cosine Reference
(Time Domain)
υs (t) = 12 sin(ωt − 45◦ )
υs(t)
C
υs(t) = 12 sin(ωt − 45o)
(V)
Step 1: Adopt cosine reference
All voltages and currents with known sinusoidal functions
should be expressed in the standard cosine format (Section 7-1).
For our RC circuit, υs (t) is the only time-varying quantity with
an explicit expression, and since υs (t) is given in terms of a
sine function, we need to convert it into a cosine by applying
Eq. (7.7a) of Table 7-1:
+
~+−_
R
Step 2
Transfer to Phasor Domain
i
υ
R
L
C
I
R
+
_ Vs
I
V
ZR = R
ZL = jωL
ZC = 1/jωC
1
jωC
Vs = 12e−j135 (V)
o
= 12 cos(ωt − 45◦ − 90◦ ) = 12 cos(ωt − 135◦ ) V.
(7.62)
In accordance with Table 7-3, the phasor equivalent of υs (t) is
Vs = 12e
−j 135◦
V.
(7.63)
Step 3
Cast Equations in
Phasor Form
(
I R+
)
1
= Vs
jωC
Step 2: Transform circuit to phasor domain
The current i(t) in Eq. (7.61) is related to its phasor counterpart I
by
i(t) = Re[Ie
j ωt
].
(7.64)
As yet, we do not have an explicit expression for either i(t)
or I, but we will obtain those expressions later on in Steps 4
and 5. Step 2 in Fig. 7-7 shows the RC circuit in the phasor
domain, with loop current I, impedance ZR = R representing
the resistance and impedance ZC = 1/j ωC representing the
capacitor. The voltage source is represented by its phasor Vs .
Step 4
Solve for Unknown Variable
(Phasor Domain)
Step 5
Transform Solution
Back to Time Domain
I=
Vs
R+
1
jωC
i(t) = Re[Ie jωt]
= 6 cos(ωt −105o)
(mA)
Step 3: Cast KCL and/or KVL equations in phasor domain
For the circuit in Step 2 of Fig. 7-7, its loop equation is given
by
ZR I + ZC I = Vs ,
which is equivalent to
R+
1
j ωC
Figure 7-7: Five-step procedure for analyzing ac circuits using
the phasor-domain technique.
(7.65)
◦
I = 12e−j 135 .
(7.66)
This equation also could have been obtained by transforming
Eq. (7.61) from the time domain
to the phasor domain, which
entails replacing i with I, i dt with I/j ω, and υs with Vs .
Step 4: Solve for unknown variable
Solving Eq. (7.66) for I gives
I=
◦
12e−j 135
R+
1
j ωC
◦
j 12ωCe−j 135
=
.
1 + j ωRC
(7.67)
402
CHAPTER 7 AC ANALYSIS
Using the specified values, namely R =
and ω = 103 rad/s, Eq. (7.67) becomes
I=
√
3 k�, C = 1 μF,
−j 135◦
j 12 × 103 × 10−6 e
j 12e
=
√
√ mA.
3
3
−6
1 + j 10 × 3 × 10 × 10
1+j 3
υs(t)
In preparation for the next step, we should convert the
expression for I into polar form (Aej θ , where A is a positive real
number) because it is easier to multiply or divide two complex
numbers using the polar form. To that end, we should replace j
in the numerator with ej π/2 and convert the denominator into
polar form:
√
√
1 + j 3 = 1 + 3 ej φ = 2ej φ ,
where
(b)
◦
◦
i(t) = Re[Iej ωt ] = Re[6e−j 105 ej ωt ] = 6 cos(ωt−105◦ ) mA.
This concludes our demonstration of the five-step procedure of
the phasor-domain analysis technique. The procedure is equally
applicable for solving any linear ac circuit.
υL
Time domain
Vs
12e−j 135 · ej 90
◦
◦
◦
◦
= 6ej (−135 +90 −60 ) = 6e−j 105 mA.
◦
2ej 60
Step 5: Transform solution back to time domain
To return to the time domain, we apply the fundamental relation
between a sinusoidal function and its phasor counterpart,
namely
L
I
R
√ 3
−1
= 60◦ .
φ = tan
1
◦
+
~+−_
(a)
Hence,
I=
i
R
−j 135◦
+
_
jωL
VL
Phasor domain
Figure 7-8: RL circuit of Example 7-5.
Step 2: Transform circuit to the phasor domain.
Phasor-domain circuit is shown in Fig. 7-8(b), in which
R remains R, L becomes j ωL, i(t) becomes I, and υs (t)
becomes Vs .
Step 3: Cast KVL in phasor domain.
RI + j ωLI = Vs .
Example 7-5: RL Circuit
The voltage source of the circuit shown in Fig. 7-8(a) is given
by
υs (t) = 15 sin(4 × 104 t − 30◦ ) V.
Also, R = 3 � and L = 0.1 mH. Obtain an expression for the
voltage across the inductor.
Step 4: Solve for unknown variable.
I=
◦
Vs
15e−j 120
=
R + j ωL
3 + j 4 × 104 × 10−4
=
Solution:
Step 1: Convert υs (t) to the cosine reference.
◦
4
υs (t) = 15 sin(4 × 10 t − 30 )
= 15 cos(4 × 104 t − 30◦ − 90◦ )
◦
4
= 15 cos(4 × 10 t − 120 ) V,
and its corresponding phasor Vs is given by
◦
Vs = 15e−j 120 V.
◦
◦
15e−j 120
15e−j 120
◦
= 3e−j 173.1 A.
=
◦
3 + j4
5ej 53.1
The phasor voltage across the inductor is related to I by
◦
VL = j ωLI = j 4 × 104 × 10−4 × 3e−j 173.1
◦
= j 12e−j 173.1
◦
◦
◦
= 12e−j 173.1 · ej 90 = 12e−j 83.1 V,
◦
where we replaced j with ej 90 .
7-5
IMPEDANCE TRANSFORMATIONS
403
Step 5: Transform solution to the time domain.
and
The corresponding time-domain voltage is obtained by
multiplying VL by ej ωt and then taking the real part:
◦
4
υL (t) = Re[VL ej ωt ] = Re[12e−j 83.1 ej 4×10 t ]
From these three simple examples, we observe that an
impedance Z is, in general, a complex quantity composed of
a real part and an imaginary part. We usually use the symbol R
to represent its real part and we call it its resistance, and we use
the symbol X to represent its imaginary part and we call it its
reactance. Thus,
= 12 cos(4 × 104 t − 83.1◦ ) V.
Exercise 7-8: Repeat the analysis of the circuit in
Example 7-4 for υs (t) = 20 cos(2 × 103 t + 60◦ ) V,
R = 6 �, and L = 4 mH.
Answer: υL(t) = 16 cos(2 × 103t + 96.9◦) V. (See
7-5
Voltage division, current division, and the Y–� transformation
are among the many analysis tools we developed in Chapter 2
in connection with circuits composed solely of sources and
resistors. All of these tools are based on two fundamental laws:
KCL and KVL. Having established in the preceding section
that KCL and KVL also are valid in the phasor domain, it
follows that these simplification and transformation techniques
can be used in the phasor domain as well. The fundamental
difference between the two cases is that in Chapter 2 we dealt
with resistors, and with voltages and currents expressed in the
time domain, whereas in the phasor domain the circuit quantities
are impedances and phasors. Thus, once an ac circuit has been
transformed into the phasor domain, we can apply the same
techniques of Chapters 2 and 3, but we do so using complex
algebra.
In this and the next section, we illustrate how impedance
and source transformations are executed in the phasor domain.
Before we do so, however, we should expand our definition of
impedance to encompass more than the impedance of a single
element. The three passive elements, R, L, and C, are measured
in ohms, henrys, and farads. Their corresponding impedances
ZR , ZL , and ZC are all measured in ohms, and are given by
ZL = j ωL,
ZC =
−j
.
ωC
(7.68)
Consider the three series combinations shown in Fig. 7-9.
Application of KVL to the circuits on the left-hand side and
to their counterparts leads to
Z1 = ZR1 + ZL1 = R1 + j ωL1 ,
Z2 = ZR2 + ZC2
j
= R2 −
,
ωC2
Z = R + j X.
)
Impedance Transformations
ZR = R,
1
.
Z3 = ZL3 + ZC3 = j ωL3 −
ωC3
(7.69)
Impedances Z1 and Z2 have reactances with opposite polarities.
When X is positive, as in Z1 , we call Z an inductive impedance,
and when X is negative, we call it a capacitive impedance.
Impedance Z2 is capacitive. Impedance Z3 is purely imaginary,
and it may be inductive or capacitive depending on how the
magnitude of ωL compares with that of 1/ωC.
Occasionally, we may need to express Z in polar form
Z = |Z|ej θ ,
(7.70)
where its magnitude |Z| and phase angle θ are related to
components R and X of the rectangular form by
|Z| =
+
R 2 + X2 ,
and
θ = tan−1
X
.
R
(7.71)
The inverse relationships are given by
and
R = Re[Z] = Re[|Z|ej θ ] = |Z| cos θ
(7.72a)
X = Im[Z] = Im[|Z|ej θ ] = |Z| sin θ.
(7.72b)
In Chapter 2, we defined the conductance G as the reciprocal
of R, namely G = 1/R. The phasor analogue of G is the
admittance Y, defined as
Y=
1
= G + j B,
Z
(7.73)
where G = Re[Y] is called the conductance of Y and
B = Im[Y] is called its susceptance. The unit for Y, G, and B
is the siemen (S).
404
CHAPTER 7 AC ANALYSIS
I
V
R1
jωL1
I
+
_
V
+
_
Z1 = R1 + jωL1
(a) RL
I
V
R2
−j/ωC2
I
+
_
V
+
_
Z2 = R2 −
j
ωC2
(b) RC
I
V
jωL3 −j/ωC3
I
+
_
V
(
+
_
1
Z3 = j ωL3 − ωC
3
)
(c) LC
Figure 7-9: Three different, two-element, series combinations.
7-5.1
Impedances in Series and in Parallel
Is
The three in-series examples of Fig. 7-9 consisted each of only
two impedances. By extension, we can assert that:
N impedances connected in series (sharing the same
phasor current) can be combined into a single equivalent
impedance Zeq whose value is equal to the algebraic sum
of the individual impedances. Zeq =
N
Vs
Voltage Division
Z1
V1 =
(
Z1
V
Z1 + Z2 s
Z2
V2 =
(
Z2
V
Z1 + Z2 s
+
_
)
)
Figure 7-10: Voltage division among two impedances in series.
Zi
(impedances in series).
(7.74)
i=1
The phasor voltage across any individual impedance Zi is a
proportionate fraction (Zi /Zeq ) of the phasor voltage across
the entire group.
This is a statement of voltage division, which for the twoimpedance circuit of Fig. 7-10, assumes the form
Z1
Z2
Vs ,
V2 =
Vs . (7.75)
V1 =
Z1 + Z 2
Z1 + Z 2
7-5
IMPEDANCE TRANSFORMATIONS
Is
405
Current Division
I1
Vs
+
_
I1 =
(
I2
Y1
)
Y1
I
Y 1 + Y2 s
Since Z1 = 1/Y1 and Z2 = 1/Y2 , Eq. (7.77) can be rewritten
in terms of impedances as
Y2
I2 =
(
I1 =
)
Y2
I
Y 1 + Y2 s
Z2
Z1 + Z 2
Is ,
I2 =
Z1
Z1 + Z 2
Is .
(7.78)
Example 7-6: Input Impedance
Figure 7-11: Current division among two admittances in
The circuit in Fig. 7-12(a) is connected to a source given by
parallel.
υs (t) = 16 cos 106 t V.
Admittance Y is the inverse of impedance Z. That is,
Y = 1/Z. Hence,
Determine (a) the input impedance of the circuit, given that
R1 = 2 k�, R2 = 4 k�, L = 3 mH, and C = 1 nF, and (b)
the voltage υ2 (t) across R2 .
N admittances connected in parallel between a pair of
nodes, all sharing the same voltage, can be combined into
a single, equivalent admittance Yeq , whose value is equal
to the algebraic sum of the individual admittances. υs(t)
Yeq =
N
Yi
(admittances in parallel)
(7.76a)
C
R1
+
_
R2
L
υ2(t)
(a) Time domain
i=1
Z1
or, equivalently,
Vs
Zeq
−1
N
1
=
.
Zi
(7.76b)
+
_
Z1 = R1 −
ZL
Zi
ZR2 V2 ZL = jωL
j
ωC
ZR2 = R2
(b) Phasor domain
i=1
The phasor current flowing through any individual admittance Yi is a proportionate fraction (Yi /Yeq ) of the phasor
current flowing through the entire group.
The current division analogue of Eq. (7.75), defining how
current splits up among two admittances connected in parallel
(Fig. 7-11), is
I1 =
Y1
Y1 + Y 2
Is ,
I2 =
Y2
Y1 + Y 2
Is .
(7.77)
Z1
Vs
+
_
Zi
Z 2 V2
Z2 = ZL || ZR2
Zi = Z1 + Z2
(c) Combining impedances
Figure 7-12: Circuit for Example 7-6.
406
CHAPTER 7 AC ANALYSIS
Solution: (a) The phasor-domain equivalent circuit is shown
in Fig. 7-12(b), where
i
+
+
_
−
~
Vs = 16,
υs(t)
ZL = j ωL = j × 106 × 3 × 10−3 = j 3 k�,
(a) Time domain
j
j
Z1 = R1 −
= (2 − j 1) k�,
= 2 × 103 − 6
ωC
10 × 10−9
L
R1
i2
C
R2
and
ZR2 = R2 = 4 k�.
I
The parallel combination of ZL and ZR2 is denoted Z2 in
Fig. 7-12(c), and it is given by
Z2 = ZL � ZR2
=
ZL ZR2
j 3 × 103 × 4 × 103
j 12 × 103
=
=
.
Z L + Z R2
(4 + j 3) × 103
4 + j3
A useful “trick” for converting the expression for Z2 into the
form (a + j b) is to multiply the numerator and denominator by
the complex conjugate of the denominator:
j 12 × 103
4 − j3
Z2 =
×
4 + j3
4 − j3
36 + j 48
× 103 = (1.44 + j 1.92) k�.
=
16 + 9
Vs
+
_
ZR1
Yi
I2
I1
Za = R2 + jωL
j
ZC = −
ωC
ZC
Za
Zb
Zb = ZC || Za
(b) Phasor domain
I
Vs
+
_
ZR1
Yi
(c) Combining impedances
Figure 7-13: Circuit for Example 7-7.
The input impedance Zi is equal to the sum of Z1 and Z2 ,
Zi = Z1 + Z2 = (2 − j 1 + 1.44 + j 1.92) × 103
= (3.44 + j 0.92) k�.
(b) By voltage division,
V2 =
Z2 Vs
(1.44 + j 1.92) × 103 × 16
◦
=
= 10.8ej 38.2 V.
Z1 + Z 2
(3.44 + j 0.92) × 103
Transforming V2 to its time-domain counterpart leads to
υ2 (t) = Re[V2 ej ωt ]
◦
Determine (a) the input admittance Yi , given that R1 = 10 �,
R2 = 30 �, L = 2 μH, and C = 10 nF, and (b) the current
i2 (t) flowing through R2 .
Solution: (a) We start by converting υs (t) to cosine format:
υs (t) = 4 sin(107 t + 15◦ )
= 4 cos(107 t + 15◦ − 90◦ ) = 4 cos(107 t − 75◦ ) V.
The corresponding phasor voltage is
6
= Re[10.8ej 38.2 ej 10 t ] = 10.8 cos(106 t + 38.2◦ ) V.
and the impedances shown in Fig. 7-13(b) are given by
Example 7-7: Current Division
The circuit in Fig. 7-13(a) is connected to a source
7
◦
Vs = 4e−j 75 V,
◦
υs (t) = 4 sin(10 t + 15 ) V.
ZR1 = R1 = 10 �,
ZC =
−j
−j
= −j 10 �,
= 7
ωC
10 × 10−8
7-5
IMPEDANCE TRANSFORMATIONS
407
and
Za = R2 + j ωL = 30 + j 107 × 2 × 10−6 = (30 + j 20) �.
In Fig. 7-13(c), Zb represents the parallel combination of ZC
and Za ,
Zb = ZC � Za
Concept Question 7-10: Is it possible to construct a
circuit composed solely of capacitors and inductors such
that the impedance of the overall combination has a
non-zero real part? Explain. (See
)
Exercise 7-9: Determine the input impedance at
(−j 10)(30 + j 20)
=
−j 10 + 30 + j 20
20 − j 30
(20 − j 30) (3 − j 1)
=
=
= (3 − j 11) �.
3 + j1
(3 + j 1) (3 − j 1)
ω = 105 rad/s for each of the circuits in Fig. E7.9.
2 μF
Zi
0.1 mH
The input impedance is
Zi = ZR1 + Zb = 10 + 3 − j 11 = (13 − j 11) �,
(a)
and its reciprocal is
Yi =
13 + j 11
1
1
×
=
Zi
13 − j 11 13 + j 11
13 + j 11
=
169 + 121
Zi
2 μF
◦
= (4.5 + j 3.8) × 10−2 = 5.89 × 10−2 e−j 40.2 S.
(b)
(b) The current I is given by
I = Vs Yi = (4e
−j 75◦
)(5.89×10
Figure E7.9
−2 −j 40.2◦
e
) = 0.235e
−j 34.8◦
By current division in Fig. 7-13(b),
ZC
I
Za + Z C
−j 10
◦
=
× 0.235e−j 34.8
30 + j 20 − j 10
◦
2.35e−j 34.8 · e−j 90
◦
=
= 7.4 × 10−2 e−j 143.2 A.
◦
31.6ej 18.4
The corresponding current in the time domain is
◦
7
i2 (t) = Re[I2 ej ωt ] = Re[7.4 × 10−2 e−j 143.2 ej 10 t ]
= 7.4 × 10−2 cos(107 t − 143.2◦ ) A.
Concept Question 7-9: The
A.
Answer: (a) Zi = j 5 �, (b) Zi = −j 10 �. (See
)
7-5.2 Y–� Transformation
I2 =
◦
0.1 mH
rule for adding the
capacitances of two in-series capacitors is different from
that for adding the resistances of two in-series resistors,
but the rule for adding the impedances of those two inseries capacitors is the same as the rule for adding two
in-series resistors. Does this pose a contradiction?
Explain. (See
)
The Y–� transformation outlined in Section 2-4 allows us to
replace a Y circuit connected to three nodes with a � circuit,
or vice versa, without altering the voltages at the three nodes
or the currents entering them. The same principle applies to
impedances, as do the relationships between impedances Z1
to Z3 of the Y circuit (Fig. 7-14) and impedances Za to Zc of
the � circuit.
→Y transformation:
Z1 =
Z b Zc
,
Za + Z b + Z c
(7.79a)
Z2 =
Za Zc
,
Za + Zb + Zc
(7.79b)
408
CHAPTER 7 AC ANALYSIS
1
2
Z1
c
Zc
1
2
Z2
Zb
Z3
Za
3
3
(a) Y circuit
(b) ∆ circuit
Z a Zb
.
Za + Z b + Z c
Z b Zc
Za + Zb + Zc
−j 6 × 12
−j 72
=
=
= (0.8 − j 1.6) �,
24 − j 12 − j 6 + 12
36 − j 18
Za Zc
(24 − j 12) × 12
Z2 =
= 8 �,
=
Za + Zb + Zc
36 − j 18
and
Z b Za
−j 6(24 − j 12)
=
= −j 4 �.
Z3 =
Za + Zb + Zc
36 − j 18
Z1 =
(7.79c)
Y→ transformation:
Z1 Z2 + Z2 Z3 + Z1 Z3
Za =
,
Z1
(a) Simplify the circuit in Fig. 7-15(a) by applying the Y–�
transformation so as to determine the current I. (b) Determine
the corresponding i(t), given that the oscillation frequency of
the voltage source is 1 MHz.
Solution: (a) The � circuit connected to nodes 1, 3, and 4
can be replaced with a Y circuit, as shown in Fig. 7-15(b),
with impedances
Figure 7-14: Y–� equivalent circuits.
Z3 =
Example 7-8: Applying Y– Transformation
(7.80a)
In Fig. 7-15(c), Zf represents the series combination of Z3
and Zd ,
Zf = Z3 + Zd = −j 4 + j 2 = −j 2 �.
Zb =
Zc =
Z1 Z2 + Z2 Z3 + Z1 Z3
,
Z2
Z1 Z2 + Z2 Z3 + Z1 Z3
.
Z3
Similarly,
(7.80b)
Zg = Z2 + Ze = (8 + j 6) �.
Impedances Zf and Zg are connected in parallel, and their
combination is in series with Z0 and Z1 . Hence,
(7.80c)
I=
Balanced circuits:
=
If the Y circuit is balanced (all of its impedances are equal), so
will be the � circuit, and vice versa. Accordingly:
Vs
Z0 + Z1 + (Zf � Zg )
16ej 30
◦
−j 2 × (8 + j 6)
2.4 + (0.8 − j 1.6) + −j 2 + 8 + j 6
.
After a few steps of complex algebra, we obtain the result
Z1 = Z2 = Z3 =
Za
, if Za = Zb = Zc ,
3
I = 3.06 76.55◦ A.
(7.81a)
(b)
Za = Zb = Zc = 3Z1 , if Z1 = Z2 = Z3 .
(7.81b)
◦
6
i(t) = Re[Iej ωt ] = Re[3.06ej 76.55 ej 2π×10 t ]
= 3.06 cos(2π × 106 t + 76.55◦ ) A.
7-5
IMPEDANCE TRANSFORMATIONS
I
Z0 = 2.4 Ω
Zb = −j6 Ω
Vs
+
_
24 Ω
3
Vs = 16
1
Zc = 12 Ω
−j12 Ω
4
123
Za = (24 − j12) Ω
Zd = j2 Ω
(a)
409
30o
Ze = j6 Ω
2
(V)
I
Z0 = 2.4 Ω
1
Z0 = 2.4 Ω
Z1 = (0.8 − j1.6) Ω
(b)
+
_
Vs = 16
Z3 = −j4 Ω
Z2 = 8 Ω
3
4
Zd = j2 Ω
Ze = j6 Ω
30o
2
(V)
1
Z1 = (0.8 − j1.6) Ω
c
Vs
I
Vs
c
+
_
Zf = Z3 + Zd
= −j2 Ω
Vs = 16
30o
Zg = Z2 + Ze
= (8 + j6) Ω
4
(V)
(c)
Figure 7-15: Example 7-8 circuit evolution.
Exercise 7-10: Convert the Y-impedance circuit in
Fig. E7.10 into a -impedance circuit.
Answer:
1
1
j7.5 Ω
j5 Ω
j5 Ω
2
−j10 Ω
2
3
Figure E7.10
(See
)
−j15 Ω
−j15 Ω
3
410
CHAPTER 7 AC ANALYSIS
I
Zs
Vs
+
+
-_
V12
(a)
Is
(b)
I
Zs
Actual
circuit
External
circuit
ZTh
1
V12
Current source
VTh
External
circuit
2
7-6.1
A voltage source Vs in series with a source
impedance Zs is equivalent to the combination of a current
source Is = Vs /Zs , in parallel with a shunt impedance Zs .
The direction of Is is the same as the arrow from the (−)
terminal to the (+) terminal of Vs . Equivalence implies that both input circuits would deliver
the same current I and voltage V12 to the external circuit.
7-6.2 Thévenin Equivalent Circuit
When restated for the phasor domain, Thévenin’s theorem of
Section 3-5.1 becomes:
ZL
+
Voc
−
VTh = Voc
(c)
Actual circuit with
independent sources
deactivated
Source Transformation
Section 2-3.4 provides an outline of the source-transformation
principle as it applies to resistive circuits. Its phasor-domain
analogue is diagrammed in Fig. 7-16 from the vantage point of
the external circuit.
+
+
-_
Actual
circuit
Equivalent Circuits
Having examined in the preceding section how phasordomain circuits can be simplified by applying impedance
transformations, we now extend our review of the rules of circuit
equivalency to circuits containing voltage and current sources.
IL
'
Thevenin
equivalent
(b)
Figure 7-16: Source-transformation equivalency.
7-6
ZL
(a)
2
Voltage source
Is
IL
1
(d)
Zeq
ZTh = Zeq
Figure 7-17: Thévenin-equivalent method for a circuit with no
dependent sources.
A linear circuit can be represented at its output terminals
by an equivalent circuit consisting of a series combination
of a voltage source VTh and an impedance ZTh , where VTh
is the open-circuit voltage at those terminals (no load)
and ZTh is the equivalent impedance between the same
terminals when all independent sources in the circuit have
been deactivated. Equivalence implies that if a load ZL is connected at the output
terminals of any actual circuit (as portrayed in Fig. 7-17(a))
thereby inducing a current IL to flow through it, the Thévenin
7-6
EQUIVALENT CIRCUITS
411
External-source method
Actual
circuit
(a)
+
Voc
−
ZTh =
ZTh = Voc /Isc
Circuit with only
independent
sources deactivated
(b)
Isc
Actual
circuit
+
_
Vex
,
Iex
(7.84)
where Iex is the current generated by an external source Vex
connected at the circuit’s terminals (as shown in Fig. 7-18(b))
after deactivating all independent sources in the circuit.
For the sake of completeness, we should remind the reader
that a Thévenin equivalent circuit always can be transformed
into a Norton equivalent circuit—or vice versa—by applying
the source-transformation method of Section 7-6.1.
Iex
Vex
ZTh = Vex /Iex
Figure 7-18: The (a) open-circuit/short-circuit method
and (b) the external-source method are both suitable for
determining ZTh , whether or not the circuit contains dependent
sources.
Example 7-9: Thévenin Circuit
The circuit shown in Fig. 7-19(a) contains a sinusoidal source
given by
υs (t) = 10 cos 105 t V.
equivalent circuit (Fig. 7-17(b)) would deliver the same
current IL when connected to the same load impedance ZL . For
the equivalence to hold, the voltage VTh and impedance ZTh of
the Thévenin circuit have to be related to the actual circuit by
(Figs. 7-17(c) and (d)):
Determine the Thévenin equivalent circuit at terminals (a, b).
Solution:
Step 1: The phasor counterpart of υs (t) is
Vs = 10 V.
and
VTh = Voc
(7.82a)
ZTh = Zeq .
(7.82b)
Application of Eq. (7.82a) to determine VTh by calculating
or measuring the open-circuit voltage Voc is always a valid
approach, whether or not the actual circuit contains dependent
sources. That is not so for Eq. (7.82b). The equivalentimpedance method cannot be used to determine ZTh if the
circuit contains dependent sources. Alternative approaches
include the following.
Open-circuit / short-circuit method
ZTh =
Voc
,
Isc
Figure 7-19(b) displays the circuit in the phasor domain, in
addition to having replaced the series combination (Vs , Rs ) with
the parallel combination (Is , Rs ), where
Is =
Vs
10
=
= 2 A.
Rs
5
Step 2: Combining Rs with Z1 in parallel gives
Z�1 = Rs � Z1 =
5(6 + j 8)
= (3.51 + j 1.08) �.
5 + 6 + j8
Step 3: Converting back to a voltage source in series with Z�1
leads to the circuit in Fig. 7-19(d), with
(7.83)
where Isc is the short-circuit current at the circuit’s output
terminals (Fig. 7-18(a)).
Vs� = Is Z�1 = 2(3.51 + j 1.08) = (7.02 + j 2.16) V.
412
CHAPTER 7 AC ANALYSIS
10−5 H
υs(t)
+
_
R1 = 6 Ω
L1 = 0.08 mH
678
Rs = 5 Ω
R3 = 2 Ω
C = 1 μF
b
(a) υs(t) = 10 cos 105t (V)
Z2 = 3 + j4
Is = 2 A
Rs = 5
Z1 = 6 + j8
Z1 = 3.51 + j1.08
Z3 = 2 − j10
+
_
b
υTh(t)
+
_
CTh = 6.29 μF
a
7.6 cos (105t − 31.61o) V
'
(f) Thevenin
equivalent
b
Z2 = 3 + j4
Z3
RTh = 8.42 Ω
a
(c) Z1 = Rs || Z1
+
_
a
(e) Zs = Z1 + Z2
b
Z1 = 3.51 + j1.08
Vs
Z3 = 2 − j10
Z2 = 3 + j4
Vs
Zs = 6.51 + j5.08
a
(b) Is = Vs /Rs = 10/5 = 2 A
Is = 2 A
a
678
678
R2 = 3 Ω L2 = 4
b
a
Z3 = 2 − j10
(d) Vs = IsZ1 = (7.02 + j2.16) V
b
Figure 7-19: Using source transformation to simplify the circuit of Example 7-9. (All impedances are in ohms.)
Step 4: Combining Z�1 with Z2 in series leads to the circuit in
Fig. 7-19(e), where
Z�s
=
Z�1
+ Z2
= (3.51 + j 1.08) + (3 + j 4) = (6.51 + j 5.08) �.
Step 5: Application of voltage division provides
VTh = Voc =
Vs� Z3
(7.02 + j 2.16)(2 − j 10)
=
�
Zs + Z3
(6.51 + j 5.08) + (2 − j 10)
= 7.6 −31.61◦ V.
7-7
PHASOR DIAGRAMS
413
7-7 Phasor Diagrams
Hence,
◦
5
υTh (t) = Re[VTh ej ωt ] = Re[7.6e−j 31.61 ej 10 t ]
5
◦
= 7.6 cos(10 t − 31.61 ) V.
Consider the following sinusoidal signal υs (t) and its phasor
counterpart Vs :
Step 6: Suppressing the source Vs� in Fig. 7-19(e) reduces the
circuit at terminals (a, b) to Z�s in parallel with Z3 , leading to
ZTh = Z�s � Z3
=
(6.51 + j 5.08)(2 − j 10)
= (8.42 − j 1.59) �.
(6.51 + j 5.08) + (2 − j 10)
Step 7: The impedance ZTh is capacitive because the sign of
the imaginary component is negative. Hence, it is equivalent to
ZTh = RTh −
j
.
ωCTh
Matching the two expressions gives
RTh = 8.42 �,
CTh =
Concept Question 7-11: In the phasor domain, is the
Thévenin equivalent method valid for circuits containing
dependent sources? If yes, what methods are amenable
)
to finding ZTh of such circuits? (See
Concept Question 7-12: If ZTh of a certain circuit is
purely imaginary, what would be your expectation about
whether or not the circuit contains resistors? (See
)
Exercise 7-11: Determine VTh and ZTh for the circuit in
Fig. E7.11 at terminals (a, b).
10 V
+
_
(10 + j30) Ω
a
Z1
Z2 5 Ω
5I
b
Figure E7.11
Answer:
(See
)
VTh = 6 −36.9◦ V, ZTh = (2.6 + j 1.8) �.
Vs = V0 φ.
(7.85)
The time-domain voltage υs (t) is characterized by three
attributes: the amplitude V0 , the angular frequency ω, and
the phase angle φ. In contrast, its counterpart in the phasor
domain Vs is specified by only two attributes, V0 and φ. This
may suggest that ω becomes irrelevant when we analyze a
circuit in the phasor domain, but that certainly is not true if the
circuit contains capacitors and/or inductors. Whereas ω does
not appear explicitly in the expressions for phasor currents
and voltages, it is integral to the definitions of the capacitor
impedance ZC and inductor impedance ZL , which in turn define
the I–V relationships for those two elements as
1
= 6.29 μF.
1.59ω
The time-domain Thévenin equivalent circuit is shown in
Fig. 7-19(f).
I
υs (t) = V0 cos(ωt + φ)
ZC =
VC
1
1
=
=
−90◦
IC
j ωC
ωC
(7.86a)
ZL =
VL
= j ωL = ωL 90◦ .
IL
(7.86b)
and
In fact, the value of ω (relative to the values of L of C) can
drastically change the behavior of a circuit:
At dc, ZC → ∞ (open circuit) and ZL → 0 (short
circuit); and conversely, as ω → ∞, ZC → 0 and
ZL → ∞. A phasor diagram is a useful graphical tool for examining
the relationships among the various currents and voltages in a
circuit. Before considering multielement circuits, however, we
will start by examining the phasor diagrams for R, L and C,
individually. Figure 7-20 displays the phasor diagrams for I
and V for all three elements, with V chosen as a reference by
selecting its phase angle to be zero. Each phasor quantity is
displayed in the complex plane in terms of its magnitude and
phase angle. For the resistor, VR and IR always line up along
the same direction because they are always in-phase. Since VR
was chosen to be purely real, so is IR .
Next, we consider the capacitor. In view of Eq. (7.86a),
IC =
VC
= j ωCVC = ωCVC 90◦ ,
ZC
(7.87a)
414
CHAPTER 7 AC ANALYSIS
Consequently,
Resistor
IL lags VL by 90◦ . Im
IR
VR
IR
IR =
For individual elements, the relationship between I and V is
straightforward; given the position of either one of them in the
complex plane, we can place the other one in accordance with
the phase-angle shift appropriate to that element.
R
VR
Re
VR
(independent of ω)
R
For a multielement circuit, we can draw either a relative
phasor diagram or an absolute phasor diagram. For the
relative phasor diagram, we usually choose a specific
current or voltage and designate it as our reference phasor
by arbitrarily assigning it a phase angle of 0◦ . Capacitor
Im
The goal then is to use the phasor diagram to examine the
relationships between and among the various currents and
voltages in the circuit—which includes their magnitudes and
relative phase angles—rather than to establish their absolute
phase angles. In principle, it does not matter much which
specific phasor voltage or current is selected as the reference, but
in practice, we usually choose a phasor current or voltage that is
common to lots of elements in the circuit. By way of illustration,
Example 7-10 examines a series RLC circuit by displaying its
phasor diagram twice, once using the current flowing through
the loop as reference, and a second time with the voltage source
as reference. The former results in a relative phasor diagram,
whereas the latter results in an absolute phasor diagram.
IC
IC
C
VC
90o
VC
Re
IC = jωC VC
(directly proportional to ω)
Inductor
Im
IL
VL
IL
−90o
L
VL
Example 7-10: Relative versus Absolute Phasor
Diagrams
Re
The circuit in Fig. 7-21(a) is driven by a voltage source given
by
−jVL
IL =
ωL
(inversely proportional to ω)
υs (t) = 20 cos(500t + 30◦ ) V.
Generate: (a) a relative phasor diagram by selecting the phasor
current I as a reference, and (b) an absolute phasor diagram.
Figure 7-20: Phasor diagrams for R, L, and C.
which positions the vector IC ahead of VC by 90◦ . Hence:
IC leads VC by 90◦ . (a) Relative Phasor Diagram
Selecting I as the reference phasor means that we assign it an
unknown magnitude I0 and a phase angle of 0◦ :
For the inductor,
IL =
VL
−j VL
VL
=
=
−90◦ .
j ωL
ωL
ωL
Solution: Figure 7-21(b) displays the phasor-domain circuit
with its RLC elements represented by their respective
impedances.
(7.87b)
I = I0 0◦ .
7-7
PHASOR DIAGRAMS
R=8Ω
υs(t)
415
Relative Phasor Diagram
i
Im
+
+
_
−
~
C = 0.25 mF
2I0
Vs
+
_
VL
Re
VL + VC −3I0
VC
−4I0
ZC = −j8 Ω
−5I0
Vs = 10I0
−6I0
−7I0
−8I0 VC = 8I0
(b) Phasor domain
16
VR = 16
14
−90o
66.87o
VL + VC
12
Vs = 20
10
30o
8
Absolute Phasor Diagram
6
4
2
−12 −10 −8 −6 −4 −2
−2
−4
−36.87o
(c) Relative phasor diagram where all phase angles are relative
to that of I.
Im
VL = 4
VR = 8I0
−2I0
I
ZL = j2 Ω
156.87o
ω
4I0
36.87o
−I0
(a) Time domain
VR
90o
I = I0
L = 4 mH
ZR = 8 Ω
VL = 2I0
I
66.87o
30o
2
4
6
8 10 12 14 16 18 20
−23.13o
−6
Re
VC = 16 −23.13o
(d) Absolute phasor diagram
Figure 7-21: Circuit and phasor diagrams for Example 7-10. The true phase angle of I is 66.87◦ , so if the relative phasor diagram in (c)
were to be rotated counterclockwise by that angle and the scale adjusted to incorporate the fact I0 = 2, the diagram would coincide with
the absolute phasor diagram in (d).
Because the true phase angle of I actually may not be zero, the
vectors we will draw in the complex plane of the relative phasor
diagram all will be shifted in orientation by exactly the same
amount (namely by the true phase angle of I) so even though
they may not have the correct orientations, they all will bear the
correct relative orientations to one another.
416
CHAPTER 7 AC ANALYSIS
We deduce from the functional form of υs (t) that ω = 500
rad/s. In terms of I, the voltages across R, C, and L are
VR = RI = 8I0 0◦ ,
VC =
and
I
−j I0
=
= −j 8I0 = 8I0 −90◦ ,
j ωC
500 × 2.5 × 10−4
Concept Question 7-14: What is the difference between a
relative phasor diagram and an absolute phasor diagram?
(See
)
Exercise 7-12: Establish the relative phasor diagram for
the circuit in Fig. E7.12 with V as the reference phasor.
V
VL = j ωLI = j 500 × 4 × 10−3 I0 = j 2I0 = 2I0 90◦ ,
and the sum of all three gives
I0 = 1 0 A
I1
I2
Y1 = 0.4 S
Y2 = j0.6 S
Vs = VR + VC + VL
with
= 8I0 − j 8I0 + j 2I0
= (8 − j 6)I0 = 82 + 62 I0 ej φ = 10I0 φ,
φ = − tan−1
Figure E7.12
Answer:
6
= −36.87◦ .
8
Figure 7-21(c) displays the relative phasor diagram of the RLC
circuit with I as a reference; the magnitudes of VR , VC , VL ,
and Vs are all measured in units of I0 , and their orientations are
relative to that of I.
Im
56.3o
(b) Absolute Phasor Diagram
(See
Vs = 20 30◦ V,
and the application of KVL around the loop leads to
=
Vs
j
R + j ωL −
ωC
◦
◦
Re
I1 = 0.4V
The phasor counterpart of υs (t) is
I=
I0 = I1 + I2
I2 = j0.6V
◦
20ej 30
20ej 30
20ej 30
j 66.87◦
=
=
A,
◦ = 2e
8 + j2 − j8
8 − j6
10e−j 36.87
)
7-8 Phase-Shift Circuits
In certain communication and signal-processing applications,
we often need to shift the phase of an ac signal by adding (or
subtracting) a phase angle of a specified value, φ. Thus, if the
input voltage in Fig. 7-22 is
υin (t) = V1 cos ωt,
which states that the true phase angle of I is 66.87◦ . Given I, we
easily can calculate VR , VC , and VL . The phasor diagram shown
in Fig. 7-21(d) is identical to that in Fig. 7-21(c), except that
all vectors have been rotated in a counterclockwise direction by
66.87◦ .
Concept Question 7-13: For a capacitor, what is the
phase angle of its phasor current, relative to that of its
phasor voltage? (See
)
V
(7.88)
+
+
_
_
Phase-shift
υout(t) = V2 cos(ωt + ϕ)
υin(t) = V1 cos ωt
circuit
Figure 7-22: The phase-shift circuit changes the phase of the
input signal by φ.
7-8
PHASE-SHIFT CIRCUITS
417
the function of the phase-shift circuit is to provide an output
voltage given by
υout (t) = V2 cos(ωt + φ).
(7.89)
The amplitude V2 of the output voltage is related to V1 (the
amplitude of the input voltage) and to the configuration of
the phase-shift circuit. RC circuits can be designed as phase
shifters, with any specified positive or negative value of φ:
υout leads υin
υout lags υin
if 0 ≤ φ ≤ 180◦ ,
if − 180◦ ≤ φ ≤ 0.
To illustrate the process, let us consider the simple RC circuit
shown in Fig. 7-23(a). The input signal is given by
6
υin (t) = 10 cos 10 t
and
V,
−j
−j
= −j 5 �.
= 6
ωC
10 × 0.2 × 10−6
Vout2 = 9.28 −21.8◦ = (8.62 − j 3.45) V.
The phase angle φ1 associated with Vout1 is 68.2◦ , and the
angle φ2 associated with Vout2 is −21.8◦ . As shown in the
complex plane of Fig. 7-23(c), the angular separation between
Vout1 and Vout2 is exactly 90◦ . Also, if we were to add Vout1
and Vout2 in the complex plane, their imaginary parts would
cancel out and their real parts would add up to 10 V (the
amplitude of Vin ).
In the time domain,
υout1 (t) = Re[Vout1 ej ωt ] = 3.716 cos(106 t + 68.2◦ ) V
(7.92)
and
Figure 7-23(a) provides a comparison of the waveform of the
input signal υin (t) with that of υout2 (t), the voltage across the
capacitor. We note that because υout2 lags υin , it always crosses
the time axis later than υin by a time delay �t. If we denote t0
as the time when υin (t) crosses the time axis and t2 as the time
when υout2 (t) does, then
ωt0 = 106 t0 =
By voltage division in the phasor domain (Fig. 7-23(b)),
ωRC
Vin R
=√
Vin φ1 ,
j
1
+
ω2 R 2 C 2
R−
ωC
−j
Vin
1
ωC
=
Vin φ2 ,
=√
2 R2 C 2
j
1
+
ω
R−
ωC
Vout1 =
Vout2
φ1 = tan−1
and
1
ωRC
φ2 = φ1 − 90◦ = tan−1
1
ωRC
ωt2 + φ2 = 106t2 + φ2 =
(7.90b)
π = −0.38 radians.
180◦
Now that all quantities are in the same units, we can determine
the time delay from
φ2 = −21.8◦ ×
�t2 = t2 − t0 = −φ2 × 10−6 = −(−0.38) × 10−6 = 0.38 μs.
By the same argument, υout1 leads υin by 68.2◦ , and it crosses
the time axis sooner than does υin (t) by
�t1 = 68.2◦ ×
− 90◦ .
π
,
2
with
(7.91a)
π
2
and
(7.90a)
and the phase angles φ1 and φ2 are given by
Vout1 = 3.71 68.2◦ = (1.38 + j 3.45) V
υout2 (t) = Re[Vout2 ej ωt ] = 9.285 cos(106 t − 21.8◦ ) V.
(7.93)
and the element values are R = 2 � and C = 0.2 μF. At
ω = 106 rad/s, the capacitor impedance is
ZC =
For ω = 106 rad/s, R = 2 �, C = 0.2 μF, and Vin = 10 V,
(7.91b)
π
× 10−6 = 1.19 μs.
180◦
From the foregoing analysis, we conclude that for the simple
RC circuit, we can use υout1 as our output if we want to add
418
CHAPTER 7 AC ANALYSIS
υa = υin(t)
i
a
t0
Input
+
R
υout1
∆t
_b
~
υin(t) +
−
+
C
υout2
I
Vin
+
_
R=2Ω
ZC = −j5 Ω
+
υout1 (not displayed)
Leads input by ∆t1 = 1.19 μs
Im
5V
3.45 V
_
+
_
(b) Phasor-domain circuit
Vout1
ϕ1
Vout1
Vout2
Lags input by
∆t2 = 0.38 μs
υb = υout2(t)
_
(a) Time-domain waveforms
υout2
t2
8.62 V Vin
ϕ2
−3.45 V
−5 V
Re
Vout2
(c) Phasors Vin , Vout1 , and Vout2 in the complex plane
Figure 7-23: RC phase-shift circuit: the phase of υout1 (across R) leads the phase of υin (t), whereas the phase of υout2 (across C) lags
the phase of υin (t).
a positive phase angle to the input υin , and we can use υout2
as our output if we want to add a negative phase angle to υin .
Moreover, by adjusting the values of R and C (at a specific value
of ω), we can change φ1 to any value between 0 and 90◦ , and
similarly, we can change φ2 to any value between 0 and −90◦
(but not independently); as was noted earlier in connection with
Fig. 7-23(c), the absolute values of φ1 and φ2 always add up to
90◦ . Another consideration that we should be aware of is that
the magnitudes of υout1 and υout2 are linked to the magnitudes
of φ1 and φ2 through the choices we make for R, C, and ω. For
example, as φ1 approaches 90◦ , υout1 approaches zero, so we
can indeed phase-shift the input signal by an angle close to 90◦ ,
7-8
PHASE-SHIFT CIRCUITS
C
υs
+
_
υ1
R
419
C
υ2
C
R
Stage 1
R
Stage 2
Simultaneous solution of Eqs. (7.94) and (7.95), followed by
several steps of algebra, leads to the expressions
υ3
+
V1
x[(x 2 − 1) − j 3x]
= 3
,
Vs
(x − 5x) + j (1 − 6x 2 )
υout
_
Stage 3
Figure 7-24: Three-stage, cascaded, RC phase-shifter
and
(Example 7-11).
(7.97)
V2
x 2 (x − j 1)
= 3
,
Vs
(x − 5x) + j (1 − 6x 2 )
(7.98)
V3
x3
= 3
,
Vs
(x − 5x) + j (1 − 6x 2 )
(7.99)
x = ωRC.
(7.100)
where
but the magnitude of the output signal will be too small to be
useful. To overcome this limitation or to introduce phase-shift
angles greater than 90◦ , we can use circuits with more than two
elements, such as the cascaded circuit of Example 7-11.
To generate a phase lead at the output, the cascading
arrangement should be as that shown in Fig. 7-24, but to
generate a phase lag, the locations of R and C should be
interchanged. Example 7-11: Cascaded Phase-Shifter
The circuit in Fig. 7-24 uses a 3-stage cascaded phase-shifter
to produce an output signal υout (t) whose phase is 120◦ ahead
of the input signal υs (t). If ω = 103 (rad/s) and C = 1 μF,
determine R and the ratio of the amplitude of υout to that of υs .
Solution: Application of nodal analysis at nodes V1 and V2
in the phasor domain gives
V1
V1 − V2
V1 − V s
+
=0
+
ZC
R
ZC
(7.94)
V2 − V1
V2
V2
+
= 0,
+
R
R + ZC
ZC
(7.95)
The magnitude and phase of V3 (both relative to those of Vs )
are
and
V3 x3
=
V [(x 3 − 5x)2 + (1 − 6x 2 )2 ]1/2 ,
s
φ3 = − tan
V3 =
R
R + ZC
V2 .
(7.96)
1 − 6x 2
x 3 − 5x
.
(7.101b)
To satisfy the stated requirement, we set φ3 = 120◦ and solve
for x:
1 − 6x 2
tan 120◦ = −1.732 = −
,
x 3 − 5x
which leads to
x = 1.1815.
(7.102)
Given that ω = 103 rad/s and C = 1 μF, it follows that
R=
x
1.1815
= 3
= 1.1815 k� ≈ 1.2 k�.
ωC
10 × 10−6
With x = 1.1815, Eq. (7.101a) gives
and
where ZC = 1/j ωC. Moreover, through voltage division, V3 is
related to V2 by
−1
(7.101a)
Note that:
V3 = 0.194.
V s
• The use of multiple stages allowed us to shift the phase by
more than 90◦ .
• However, the magnitude of the output voltage is about 20%
of that of the input.
420
CHAPTER 7 AC ANALYSIS
R3
Concept Question 7-15: Describe the function of a
phase-shift circuit in terms of time delay or time advance
of the waveform. (See
)
Exercise 7-13: Repeat Example 7-11, but use only two
stages of RC phase shifters.
7-9
3Ω
R5
2Ω
R4
2Ω
2Ω
R6
iL
C
0.25 mF
L
υs 2
1 mH
2Ω
+
_
)
Exercise 7-14: Design a two-stage RC phase shifter that
provides a phase shift of negative 120◦ at ω = 104 rad/s.
Assume C = 1 μF.
Answer: R ≈ 220 �. (See
R1
)
Phasor-Domain Analysis
Techniques
The analysis techniques introduced in Chapter 3 in connection
with resistive circuits are all equally applicable for analyzing ac
circuits in the phasor domain. The only fundamental difference
is that after transferring the circuit from the time domain to the
phasor domain, the operations conducted in the phasor domain
involve the use of complex algebra, as opposed to just real
numbers. Otherwise, the circuit laws and methods of solution
are identical.
At this stage, instead of repeating the details of these
various techniques, a more effective approach is to illustrate
their implementation procedures through concrete examples.
Examples 7-12 through 7-16 are designed to do just that.
R3
I1
V1
R1
I2
R2
I3
2Ω
3Ω
C
Solution: We first demonstrate how to solve this problem
using the standard nodal-analysis method (Section 3-2), and
then we solve it again by applying the by-inspection method
(Section 3-4).
R5
I5
I6
R4
2Ω
2Ω
I7
I9
R6
−j4 Ω
j1 Ω
−j6 V
I8
V3
2Ω
+ V s2
_
Figure 7-25: Circuit for Example 7-12 in (a) the time domain
and (b) the phasor domain.
Nodal-analysis method
Our first step is to transform the given circuit to the phasor
domain. Accordingly,
ZC =
Apply the nodal-analysis method to determine iL (t) in the
circuit of Fig. 7-25(a). The sources are given by:
υs2 (t) = 6 sin 103 t V.
V s1
2Ω
I4 V2
IL
Example 7-12: Nodal Analysis
υs1 (t) = 12 cos 103 t V,
12 V
_
+
Answer: R ≈ 2.2 k�; |Vout /Vs| = 0.63. (See
R2
+
Concept Question 7-16: When is it necessary to use
multiple stages to achieve the desired phase shift?
(See
)
υs1 2 Ω
_
−j
1
= 3
= −j 4 �,
j ωC
10 × 0.25 × 10−3
ZL = j ωL = j 103 × 10−3 = j 1 �,
and
υs1 = 12 cos 103 t
υs2 = 6 sin 103 t
Vs1 = 12 V,
Vs2 = −j 6 V,
where for Vs2 we used the property given in Table 7-2, namely
that the phasor counterpart of sin ωt is −j . Using these values,
we generate the phasor-domain circuit given in Fig. 7-25(b) in
7-9
PHASOR-DOMAIN ANALYSIS TECHNIQUES
which we selected one of the extraordinary nodes as a ground
node and assigned phasor voltages V1 to V3 to the other three.
Our plan is to write the voltage node equations at nodes 1 to
3, solve them simultaneously to find V1 to V3 , and then use the
value of V2 to obtain IL . The final step will involve transforming
IL to the time domain to obtain iL (t).
At node 1, KCL requires that
I1 + I2 + I3 = 0.
421
which can be simplified to
−V1 + (2.8 − j 0.4)V2 − V3 = 12
V3 − V 1
V3 + j 6
V3 − V2
+
+
= 0,
2
2
2
In terms of node voltages V1 to V3 ,
or
I1 =
−V1 − V2 + 3V3 = −j 6
and
I3 =
�
1
1
1
1 1
+ +
V1 − V2 − V3 = −6.
2 2 3 − j4
2
2
(7.104)
The coefficient of V1 can be simplified as follows:
1
1
1 1
+ +
=1+
2 2 3 − j4
3 − j4
3 − j4 + 1
=
3 − j4
4 − j4 3 + j4
×
=
3 − j4 3 + j4
(12 + 16) + j (16 − 12)
= 1.12 + j 0.16.
=
9 + 16
(7.105)
Inserting Eq. (7.105) in Eq. (7.104) and multiplying all terms
by 2 leads to the following simplified algebraic equation for
node 1:
(2.24 + j 0.32)V1 − V2 − V3 = −12
(node 3).
(7.108)
Equations (7.106) to (7.108) now are ready to be cast in matrix
form:
V1
V1
=
.
R1 + Z C
3 − j4
Inserting the expressions for I1 to I3 in Eq. (7.103) and then
rearranging the terms leads to
�
(7.107)
and at node 3,
(7.103)
V1 − V3
V1 − V3
=
,
R3
2
V1 − V2 + Vs1
V1 − V2 + 12
,
I2 =
=
R2
2
(node 2),
(node 1). (7.106)
Similarly, at node 2,
V2
V 2 − V3
V2 − V1 − 12
+
+
= 0,
2
2 + j1
2
⎤
⎡
⎤⎡ ⎤ ⎡
−12
(2.24 + j 0.32)
−1
−1
V1
⎣
−1
(2.8 − j 0.4) −1⎦ ⎣V2 ⎦ = ⎣ 12 ⎦ .
−j 6
V3
−1
−1
3
(7.109)
Matrix inversion, either manually or by MATLAB or MathScript
software, provides the solution:
V1 = −(4.72 + j 0.88) V,
and
(7.110a)
V2 = (2.46 − j 0.89) V,
(7.110b)
V3 = −(0.76 + j 2.59) V.
(7.110c)
Hence,
IL =
V2
2.46 − j 0.89
◦
=
= 0.81−j 0.85 = 1.17e−j 46.5 A,
2 + j1
2 + j1
and its corresponding time-domain counterpart is
iL (t) = Re[IL ej 1000t ]
◦
= Re[1.17e−j 46.4 ej 1000t ] = 1.17 cos(1000t − 46.5◦ ) A.
(7.111)
422
CHAPTER 7 AC ANALYSIS
Y3
Y2 =
V1
Y1
YC
1
3
j
S
1
4
1
2
S
1
2
S
Y4
6A
Y5
V2
1
2
1
2
S
S
−j3 A
IL
S = Y = (0.12+ j0.16) S
YL
V3
Y6
1
2
S
−j1 S = Y = (0.4 + j0.2) S
Figure 7-26: Equivalent of the circuit in Fig. 7-25, after source transformation of voltage sources into current sources and replacement of
passive elements with their equivalent admittances.
By-inspection method
Implementation of the nodal-analysis by-inspection method
requires that the circuit contain no dependent sources and
that all independent sources in the circuit be current sources.
The first condition is valid for the circuit in Fig. 7-25(b),
but the second one is not. However, both voltage sources
in Fig. 7-25(b) have in-series resistors associated with them,
so we easily can transform them into current sources. The
resultant circuit is shown in Fig. 7-26, in which not only
have the voltage sources been replaced with equivalent current
sources, but all impedances have also been replaced with their
equivalent admittances (Y = 1/Z). For the 3-node case, the
phasor-domain equivalent of Eq. (3.25) is given by
⎡
where
⎤⎡ ⎤ ⎡ ⎤
Y11 Y12 Y13
V1
It1
⎣Y21 Y22 Y23 ⎦ ⎣V2 ⎦ = ⎣It2 ⎦ ,
Y31 Y32 Y33
V3
It3
Y� = Y1 � YC =
1
3
1
3
× j 41
+ j 41
= (0.12 + j 0.16) S.
Hence,
Y11 = (1.12 + j 0.16) S.
Similarly,
Y22 = Y�� + 0.5 + 0.5
= (Y4 � YL ) + 1 =
(7.112)
0.5 × (−j 1)
+ 1 = (1.4 − j 0.2) S,
0.5 − j 1
Y33 = 0.5 + 0.5 + 0.5 = 1.5 S.
Ykk =
Yk� =
sum of all admittances connected to node k
Y�k = negative of admittance(s) connecting
nodes k and �, with k � = �
Vk = unknown phasor voltage at node k
Itk = total of phasor current sources entering node k (a
negative sign applies to a current source leaving
the node).
For the circuit in Fig. 7-26,
Y11 = Y� + Y2 + Y3 = (Y� + 0.5 + 0.5) S,
where Y� is the sum of Y1 and YC . The rule for adding two inseries admittances is the same as that for adding two in-parallel
impedances:
(7.113)
Also, Y12 = Y21 = Y13 = Y31 = Y23 = Y32 = −0.5 S,
It1 = −6 A, It2 = 6 A, and It3 = −j 3 A. Entering the values
of all of these quantities in Eq. (7.112) gives
⎤
⎤⎡ ⎤ ⎡
−6
(1.12 + j 0.16)
−0.5
−0.5
V1
⎣
−0.5
(1.4 − j 0.2) −0.5⎦ ⎣V2 ⎦ = ⎣ 6 ⎦ .
−j 3
V3
−0.5
−0.5
1.5
(7.114)
Multiplication of both sides of Eq. (7.114) by a factor of 2
would produce exactly the matrix equation given by Eq. (7.109),
as expected. Consequently, the final expression for iL (t) is
identical to that given by Eq. (7.111).
⎡
TECHNOLOGY BRIEF 19: CRYSTAL OSCILLATORS
Technology Brief 19
Crystal Oscillators
Circuits that produce well-defined ac oscillations are
fundamental to many applications: frequency generators
for radio transmitters, filters for radio receivers, and
processor clocks, among many. An oscillator is a
circuit that takes a dc input and produces an ac
output at a desired frequency. Temperature stability, long
lifetime, and little frequency drift over time are important
considerations when designing oscillators.
A circuit consisting of an inductor and a capacitor
√ will
resonate at a specific natural frequency ω0 = 1/ LC . In
such a circuit, energy is stored in the capacitor’s electric
field and the inductor’s magnetic field. Once energy is
introduced into the circuit (for example, by applying an
initial voltage to the capacitor), it will begin to flow back
and forth (oscillate) between the two components; this
constant conversion gives rise to oscillations in voltage
and current at the resonant frequency. In an ideal circuit
with no dissipation (no resistor), the oscillations will
continue at this one frequency forever.
Making oscillating circuits from individual inductor and
capacitor components, however, is relatively impractical and yields devices with poor reproducibility, high
temperature drift (i.e., the resonant frequency changes
with the temperature surrounding the circuit), and poor
overall lifetime. Since the early part of the 20th century,
resonators have been made in a completely different way,
namely by using tiny, mechanically resonating pieces of
quartz glass.
423
used in loudspeakers. Piezoelectricity can also be applied
to make a quartz crystal resonate. If a voltage of the
proper polarity is applied across one of the principal axes
of the crystal, it will shrink along the direction of that axis.
Upon removing the voltage, the crystal will try to restore
its shape to its original unstressed state by stretching
itself, but its stored compression energy is sufficient to
allow it to stretch beyond the unstressed state, thereby
generating a voltage whose polarity is opposite of that
of the original voltage that was used to compress it. This
induced voltage will cause it to shrink, and the process will
continue back and forth until the energy initially introduced
by the external voltage source is totally dissipated. The
behavior of the crystal is akin to an underdamped RLC
circuit.
In addition to crystals, some metals and ceramics
are also used for making oscillators. Because the
resonant frequency can be chosen by specifying the
type of material and its shape, such oscillators are
easy to manufacture in large quantities, and their
oscillation frequencies can be designed with a high
degree of precision. Moreover, quartz crystals have good
temperature performance, which means that they can
be used in many applications without the need for
temperature compensation, including in clocks, radios,
and cellphones.
X1
Quartz Crystals and Piezoelectricity
In 1880, the Curie brothers demonstrated that certain
crystals—such as quartz, topaz, and tourmaline—
become electrically polarized when subjected to mechanical stress. That is, such a crystal exhibits a voltage
across it if compressed, and a voltage of opposite
polarity if stretched. The converse property, namely
that if a voltage is applied across a crystal it will
change its shape (compress or stretch), was predicted
a year later by Gabriel Lippman (who received the
1908 Nobel Prize in physics for producing the first
color photographic plate). Collectively, these bidirectional
properties of crystals are known as piezoelectricity.
Piezoelectric crystals are used in microphones to convert
mechanical vibrations of the crystal surface, caused by
acoustic waves, into electrical signals, and the converse is
(a)
+
_
υcrystal
RS
CS
LS
RS = 50 Ω
LS = 80 mH
(b)
CS = 1.3 fF
CO
+
υout
_
CO = 4.5 pF
Figure TF19-1: (a) Quartz crystal circuit symbol and (b)
equivalent circuit. Values given are for a 5 MHz crystal.
424
TECHNOLOGY BRIEF 19: CRYSTAL OSCILLATORS
Positive feedback
X1
+
+
VCC
+
_
_
VCC
gain
υout
_
Negative feedback
Figure TF19-2: Schematic block diagram of an oscillator
circuit. An oscillator is wired into the positive feedback path,
while a negative feedback path is used to control gain.
Crystal Equivalent Circuit and Oscillator
Design
The electrical behavior of a quartz crystal can be modeled
as a series RLC circuit (LS , CS , RS ) in parallel with a shunt
capacitor (CO ). The RLC circuit models the fundamental
oscillator behavior with dissipation. The shunt capacitor
is mostly due to the capacitance between the two plates
that actuate the quartz crystal. Figure TF19-1 shows the
circuit symbol, the equivalent circuit with sample values
Figure TF19-3: Schematic (left) and photo (right) of a
tiny atomic physics package used in a chip-scale atomic
clock. (Courtesy of Clark Nguyen, U.C. Berkeley, and John
Kitching, National Institutes of Standards and Technology.
for a commercial 12 MHz crystal along with expressions
and values for the resonant frequencies and Q.
The crystal is, of course, not sufficient to produce a
continuous oscillating waveform; we need to excite the
circuit and keep it running. A common way to do this
is to insert the crystal in the positive feedback path of
an amplifier (Fig. TF19-2). The amplifier, of course, is
−
supplied with dc power (V+
CC and VCC ). Note that no
input signal is applied to the circuit. Initially, the output
generates no oscillations; however, any noise at vout that
is at the resonant frequency of X1 will be fed back to
the input and amplified. This positive feedback will quickly
ramp up the output so that it is oscillating at the resonant
frequency of the crystal. A negative feedback loop is also
commonly used to control the overall gain and prevent
the circuit from clipping the signal against the op amp’s
−
supply voltages V+
CC and VCC .
In order to oscillate continuously, a circuit must meet
the following two Barkhausen criteria: (1) The gain of
the circuit must be greater than 1. (This makes sense, for
otherwise the signal will neither get amplified nor establish
a resonating condition.) (2) The phase shift from the input
to the output, then across the feedback loop to the input
must be 0. (This also makes sense, since if there is nonzero phase shift, the signals will destructively interfere and
the oscillator will not be able to start up.)
Advances in Resonators and Clocks
As good as quartz resonators are, even the best among
them will drift in frequency by 0.01 ppm per year as a
result of aging of the crystal. If the oscillator is being used
to keep time (as in your digital watch), this dictates how
many seconds (or fractions thereof) the clock will lose
per year. Put differently, this drift puts a hard limit on
how long a clock can run without calibration. The same
phenomenon limits how well independent clocks can stay
synchronized with each other. Atomic clocks provide an
extra level of precision by basing their oscillations on
atomic transitions; these clocks are accurate to about
10−9 seconds per day. Recently, a chip-scale version
of an atomic clock (Fig. TF19-3) was demonstrated by
the National Institute for Standards and Technology
(NIST); it consumes 75 mW and was the size of a grain of
rice (10 mm3 ). Other recent efforts for making oscillators
for communication have focused on replacing the quartz
crystal with a type of micromechanical resonator.
7-9
PHASOR-DOMAIN ANALYSIS TECHNIQUES
425
Exercise 7-15: Write down the node-voltage matrix
or
V2
I1
V1 − 4 V1
+
+
+
= 0,
2
j4
4
2
equation for the circuit in Fig. E7.15.
4
60o
and we also incorporate the auxiliary equation relating the two
nodes, namely
(A)
V1
V2
(2 + j2) S
2A
V2 − V1 = 29.
(7.116)
V1 − 4
.
2
(7.117)
From the circuit, the current I1 in Eq. (7.115) is given by
−j4 S
I1 =
Using Eqs. (7.116) and (7.117) in Eq. (7.115) and then solving
for V1 leads to
Figure E7.15
Answer:
which in turn gives
�
�� � �
◦�
(2 + j 2) −(2 + j 2) V1
2 − 4ej 60
=
.
◦
−(2 + j 2) (2 − j 2)
V2
4ej 60
(See
(7.115)
IL =
)
V1 = −(4 + j 1) V,
V1
(4 + j 1)
=−
= (−0.25 + j 1) = 1.03 104◦ A.
j4
j4
With ω = 2 ×103 rad/s, the inductor current in the time domain
is given by
Example 7-13: Circuit with a Supernode
◦
The circuit in Fig. 7-27, which is already in the phasor domain,
contains two independent voltage sources, both oscillating at an
angular frequency ω = 2×103 rad/s, and both characterized by
a phase angle of 0◦ . Determine iL (t).
Solution: Because nodes V1 and V2 are connected by a
voltage source, their combination constitutes a supernode.
When we apply KCL to a supernode, we simply sum all the
currents leaving both of its nodes as if the two nodes are one,
I1 + I2 + I3 + I4 = 0,
Vs2 = 29 V
V2
_
I1
I2
+
_ V s1 = 4 V L
j4
IL
+
V1
2Ω
I4
I3
4Ω
3
iL (t) = Re[IL ej ωt ] = Re[1.03ej 104 ej 2×10 t ]
I1
2
Figure 7-27: Phasor-domain circuit containing a supernode
and a dependent source (Example 7-13).
= 1.03 cos(2 × 103 t + 104◦ ) A.
Example 7-14: Mesh Analysis
Apply the mesh-analysis method to determine iL(t) in the
circuit of Fig. 7-28, given that ω = 1000 rad/s.
Solution: The circuit shown in Fig. 7-28 has mesh currents
I1 to I3. Since the circuit has no dependent sources and no
independent current sources, it is suitable for application of the
mesh-analysis by-inspection method. For a three-loop circuit,
the phasor-domain parallel of Eq. (3.28) assumes the form:
⎡
⎤⎡ ⎤ ⎡ ⎤
Z11 Z12 Z13
I1
Vt1
⎣Z21 Z22 Z23 ⎦ ⎣I2 ⎦ = ⎣Vt2 ⎦ ,
(7.118)
Z31 Z32 Z33
I3
Vt3
where
Zkk = sum of all impedances in loop k
Zk� = Z�k = negative of impedance(s) shared by loop
k and �, with k �= �
Ik = unknown phasor current of loop k
Vtk = total of phasor voltage sources contained in loop
k, with the polarity defined as positive if Ik flows
from (−) to (+) through the source.
426
CHAPTER 7 AC ANALYSIS
2Ω
Answer:
I3
12 V
_
2Ω
+
IL
I1
−j4 Ω
�� � �
�
(5 + j 6) −(3 + j 6) I1
12
=
.
I2
−(3 + j 6) (7 + j 6)
−j 6
2Ω
2Ω
3Ω
�
I2
−j6 V
j1 Ω
(See
2Ω
+
_
Example 7-15: Source Superposition
The circuit in Fig. 7-29(a) contains two independent sources.
Apply the source-superposition method to demonstrate that IL
is given by the same expression obtained in Example 7-14,
namely Eq. (7.120).
Figure 7-28: Circuit for Example 7-14.
In view of these definitions, the matrix equation for the circuit
in Fig. 7-28 is given by
⎤
⎡
⎤⎡ ⎤ ⎡
12
(7 − j 3) − (2 + j 1) −2
I1
⎣−(2 + j 1) (6 + j 1) −2⎦ ⎣I2 ⎦ = ⎣ j 6 ⎦ . (7.119)
I3
−12
−2
−2
6
Matrix inversion leads to
I1 = (0.43 + j 0.86) A,
I2 = (−0.38 + j 1.71) A,
and
I3 = (−1.98 + j 0.86) A.
Solution: With the source-superposition method, we activate one independent source at a time.
Source 1 Alone: In part (b) of Fig. 7-29, only the 12 V source
is active, and the other source has been replaced with a short
circuit. The loop currents are designated I1� through I3� , and the
corresponding current through the inductor is IL� . Application
of the mesh-current by-inspection method gives the matrix
equation
⎡
⎤⎡ �⎤ ⎡
⎤
(7 − j 3) −(2 + j 1) −2
I1
12
⎣−(2 + j 1) (6 + j 1) −2⎦ ⎣I� ⎦ = ⎣ 0 ⎦ , (7.122)
2
−2
−2
6
I3�
−12
whose inversion leads to
The current IL through the inductor is given by
I1� = (0.79 + j 0.52) A,
IL = I1 − I2 = (0.43 + j 0.86) − (−0.38 + j 1.71)
= 0.81 − j 0.85 = 1.17e
−j 46.5◦
A,
iL (t) = Re[IL e
] = Re[1.17e
and
−j 46.5◦ j 1000t
e
Exercise 7-16: Write down the mesh-current matrix
equation for the circuit in Fig. E7.16.
+
12 V _
I1
j6 Ω
Figure E7.16
Hence,
IL� = I1� − I2� = (0.79 + j 0.52) − (−0.36 + j 0.48)
= (1.15 + j 0.04) A.
4Ω
3Ω
I3� = (−1.86 + j 0.33) A.
]
= 1.17 cos(1000t − 46.5◦ ) A. (7.121)
2Ω
I2� = (−0.36 + j 0.48) A,
(7.120)
and its time-domain counterpart is
j ωt
)
I2
+
_
j6 V
(7.123)
Source 2 Alone: Deactivation of the 12 V source and
reactivation of the −6j V source produces the circuit shown
in part (c) of Fig. 7-29. Now the loop currents are I1�� , I2�� , and
I3�� , and their matrix equation is
⎡
⎤ ⎡ �� ⎤ ⎡ ⎤
0
(7 − j 3) −(2 + j 1) −2
I1
⎣−(2 + j 1) (6 + j 1) −2⎦ ⎣I�� ⎦ = ⎣j 6⎦ .
(7.124)
2
0
I3��
−2
−2
6
7-9
PHASOR-DOMAIN ANALYSIS TECHNIQUES
427
2Ω
12 V
_
2Ω
2Ω
+
2Ω
3Ω
2Ω
IL
−j4 Ω
j1 Ω
(a)
+
_
−j6 V
Both sources
2Ω
2Ω
12 V
_
2Ω
I3
+
2Ω
3Ω
I1
−j4 Ω
IL
I2
I3
2Ω
2Ω
2Ω
3Ω
2Ω
I1
−j4 Ω
j1 Ω
(c)
(b) −j6 V source replaced with short circuit
2Ω
IL
j1 Ω
I2
2Ω
−j6 V
+
_
12 V source replaced with short circuit
Figure 7-29: Demonstration of the source-superposition technique (Example 7-15).
The solution of Eq. (7.124) is
Example 7-16: Thévenin Approach
I1�� = (−0.36 + j 0.34) A,
For the circuit of Fig. 7-30, (a) obtain its Thévenin equivalent
at terminals (a, b), as if the inductor were an external load, and
(b) then use the Thévenin circuit to determine IL .
I2�� = (−0.02 + j 1.23) A,
and
I3�� = (−0.13 + j 0.53) A,
IL�� = I1�� − I2�� = −0.36 + j 0.34 − (−0.02 + j 1.23)
= (−0.34 − j 0.89) A.
Total Superposition Solution: Given IL� due to source 1 alone
and IL�� due to source 2 alone, the total current due to both sources
simultaneously is
IL = IL� + IL�� = (1.15 + j 0.04) + (−0.34 − j 0.89)
= (0.81 − j 0.85) A,
(7.125)
which is identical to the expression given by Eq. (7.120).
Solution: (a) We will apply the open-circuit/short-circuit
method to determine the values of VTh and ZTh of the Thévenin
equivalent circuit.
Open-Circuit Voltage: With the inductor replaced with an
open circuit in Fig. 7-30(b), the matrix equation for loop
currents I1 and I2 is
12 + j 6
(9 − j 4) −4 I1
=
,
(7.126)
−12
I2
−4
6
and its inversion gives
I1 = (0.02 + j 0.96) A
and I2 = (−1.98 + j 0.64) A.
428
CHAPTER 7 AC ANALYSIS
2Ω
2Ω
2Ω
2Ω
+
2Ω
2Ω
IL
3Ω
a
+
_
j1 Ω
−j4 Ω
12 V
_
I2
+
12 V
_
2Ω
2Ω
2Ω
2Ω
3Ω
a
−j6 V
−j4 Ω
b
(a) Original circuit
I1
2Ω
I5
(b) Inductor replaced with open circuit
ZTh
2Ω
+
I3
2Ω
I4
a
Isc
−j4 Ω
a
IL
2Ω
3Ω
−j6 V
b
2Ω
12 V
_
+
_
Voc
+
_
+
_
VTh
L
−j6 V
j1 Ω
b
b
'
(d) Thevenin
circuit connected to inductor
(c) Inductor replaced with short circuit
Figure 7-30: After determining the open-circuit voltage in part (b) and the short-circuit current in part (c), the Thévenin equivalent circuit
is connected to the inductor to determine IL .
With I1 and I2 known, application of KVL around the loop
containing the −j 6 V source leads to
VTh = Voc = 2(I1 − I2 ) + 2I1 − j 6
= 4I1 − 2I2 − j 6 = (4.06 − j 3.44) V. (7.127)
Short-Circuit Current: In part (c) of Fig. 7-30, the inductor
has been replaced with a short circuit. The matrix equation for
loop currents I3 to I5 is given by
⎤
⎤⎡ ⎤ ⎡
12
(7 − j 4) −2 −2
I3
⎣ −2
6 −2⎦ ⎣I4 ⎦ = ⎣ j 6 ⎦ .
−12
I5
−2 −2 6
⎡
Solution of Eq. (7.128) gives
I3 = (0.44 + j 0.95) A,
I4 = (−0.53 + j 1.60) A,
and
I5 = (−2.03 + j 0.85) A,
from which we have
Isc = I3 − I4 = (0.44 + j 0.95) − (−0.53 + j 1.60)
= (0.97 − j 0.65) A.
(7.129)
Given Voc and Isc , it follows that
(7.128)
ZTh =
Voc
4.06 − j 3.44
=
= (4.53 − j 0.51) �. (7.130)
Isc
0.97 − j 0.65
7-10 AC OP-AMP CIRCUITS
429
(b) Having established VTh and ZTh , we now connect the
Thévenin equivalent circuit to the inductor at terminals (a, b),
as shown in Fig. 7-30(d). The current IL is simply
IL =
7-10
VTh
4.06 − j 3.44
=
= (0.80 − j 0.85) A.
ZTh + j 1
4.53 − j 0.51 + j 1
(7.131)
υp ip
ac Op-Amp Circuits
Question 1: Are op amps used in ac circuits?
Answer 1: Yes.
in
υn
+
+
Ro
(υp − υn) Ri
A(υp − υn)
−
+
-_
−
io
+
υo
Question 2: Is the ideal op-amp model applicable to ac circuits?
To explain what we mean by the answer to the second
question, let us start with a quick review of the op-amp models
introduced earlier in Chapter 4. The operation of the op amp can
be represented by the equivalent circuit shown in Fig. 7-31(a).
The model parameters include large input resistance Ri on the
order of megaohms, small output resistance Ro on the order of
50 �, and an open-loop gain A. At dc, A is very large, on the
order of 105 or greater. These attributes allowed us to adopt
the ideal op-amp model in which we set Ri ≈ ∞, Ro ≈ 0, and
A ≈ ∞. By invoking these approximations, we obtained the
two constraints:
and
υp = υn
ip = in = 0.
The use of these constraints served to significantly simplify the
analysis of op-amp circuits containing dc sources. An important
underlying assumption is that A is very large. Whereas this
assumption is certainly valid for dc, it is not necessarily so at
ac.
(a) Op-amp equivalent circuit
+
υp
in = 0
υn
(Ri =
_
)
8
Answer 2: The ideal op-amp model is based on the assumption
that the open-loop gain A is very large (> 104 ), which is
true at dc and low frequencies, but not necessarily so at high
frequencies. The range of frequencies over which A is large
depends on the specific op-amp design. As we shall see later on
in this section, when the standard LM741 op amp is used in an
inverting amplifier circuit, the ideal op-amp model is applicable
for ac circuits so long as the frequency is less than about 1 kHz.
For operations at higher frequencies, other models should be
used instead, so the selection of a particular op-amp model for
a particular application (such as amplification and processing
of video signals) becomes an important consideration.
(Ro = 0)
+
υo
υp = υn
(b) Ideal op-amp model
Figure 7-31: Op-amp (a) equivalent circuit (for both dc and
ac) and (b) ideal model (for dc, and ac at low frequencies).
Figure 7-32 displays a typical plot of the open-loop gain A as
a function of the oscillator frequency f for the LM741 op amp.
At dc, the gain (denoted A0 ) is indeed very large (105 ), but A
decreases rapidly with increasing frequency. The gain spectrum
of an op amp is characterized by three important parameters:
(a) the dc gain A0 : the value of A at f = 0 Hz.
(b) the corner
√ frequency fc : the frequency at which
A = A0 / 2 = 0.707A0 .
(c) the unity gain frequency fu : the frequency at which A = 1.
For the op-amp gain displayed in Fig. 7-32, A0 = 105 ,
fc = 10 Hz, and fu = 1 MHz. The ideal op-amp model assumes
430
CHAPTER 7 AC ANALYSIS
A
Rf = 10 kΩ
dc gain
0.707 × 105
105
103
Rs
υs
LM741
104
~
+
−
υn
2 kΩ
υp
_
υo
+
RL 10 kΩ
102
10
1
0.1
(a) Inverting amplifier circuit
Corner frequency fc
Unity gain frequency fu
10
100
1k
Rf = 10 kΩ
f (Hz)
10 k 100 k 1 M 10 M
Rs = 2 kΩ
Figure 7-32: Open-loop gain A versus frequency for the
LM741 op amp.
υs
that A is very large, which is a valid assumption at dc and at
frequencies as high as 10 kHz, but it is certainly not valid at
much higher frequencies.
What are the implications of a nonuniform spectrum for A
(i.e., A not a constant as a function of f )? We answer the
question through Example 7-17.
~
+
−
υn
Ro
Ri 1 MΩ
A(υp − υn) +
_
υp
υo
RL 10 kΩ
(b) Equivalent circuit model
Figure 7-33: Inverting amplifier.
Equivalent circuit model
The node equations at nodes υn and υo in Fig. 7-33(b) are given
by:
Example 7-17: Audio and Video Amplifier
The objective of this example is to establish whether or not the
inverting amplifier circuit shown in Fig. 7-33(a) is suitable for
amplifying (a) audio signals with spectra extending to 1 kHz
and video signals with spectra extending to 1 MHz. The op-amp
gain spectrum is given in Fig. 7-32, and the input and output
resistances are Ri = 1 M�, and Ro = 50 �.
υn
υn − υo
υn − υs
+
+
= 0,
Rs
Ri
Rf
υo − A(υp − υn )
υo
υo − υn
+
+
= 0.
Rf
Ro
RL
(7.133)
(7.134)
After setting υp = 0 (because the positive input terminal is
connected to the ground terminal) and solving the two equations
simultaneously to obtain an expression for the circuit gain, we
have
Solution: Since A is not uniformly high at all the frequencies
under consideration, we should compute the circuit gain
Rf
υo
=
G=
G = υo /υs using the op-amp equivalent circuit model, and then
υs
Rs
compare it with the value obtained using the ideal model. We Rs Ri (Ro − ARf )
will perform the comparison at multiple frequencies between ·
.
(RL Ro + Rf RL + Rf Ro )(Ri Rf + Rs Rf + Rs Ri ) − Rs Ri (Ro − ARf )
dc and 1 MHz.
(7.135)
Ideal op-amp model
From Eq. (4.24),
Gideal =
υo
Rf
10 k
= −5.
=−
=−
υs
Rs
2k
(7.132)
Using the values Ri = 106 �, Rs = 2 × 103 �, Rf = 104 �,
Ro = 50 �, RL = 10 k�, and the value of A from Fig. 7-32,
we obtain the results summarized in Table 7-5.
(a) Audio Signal: Based on the gain data listed in Table 7-5,
an audio signal consisting of frequencies extending between
7-11
OP-AMP PHASE SHIFTER
431
Table 7-5: Inverting amplifier gain G as a function of
Zf
oscillation frequency f . Gideal = −5
f (Hz)
A
G
0 (dc)
100
1k
10 k
100 k
1M
105
104
103
102
10
1
−4.997
−4.970
−4.714
−3.111
−0.707
−0.081
C2
Error
Zs
0.06%
0.6%
5.7%
37.8%
85.9%
98.4%
R1
υin
C1
R2
_
+
~
+
−
Gideal − G
Gideal
Figure 7-34: Inverting amplifier as a phase-shift circuit.
× 100.
dc and 1 kHz would experience relatively minimal distortion
because they would all be amplified by a factor of about −5,
within a maximum variation of 5.7% (at 1 kHz).
(b) Video Signal: Because the video signal extends to 1 MHz
and the op-amp circuit does not provide good amplification at
frequencies above 10 kHz, the output signal will be highly
distorted. Hence, to amplify video signals with minimal
distortion, it is necessary to use an op amp with a corner
frequency (Fig. 7-32) as high as 1 MHz or higher.
7-11
1
j ωR1 C1 + 1
=
,
(7.137a)
j ωC1
j ωC1
1
R2 /j ωC2
R2
Zf = R2 �
=
=
.
j ωC2
R2 + 1/j ωC2
1 + j ωR2 C2
(7.137b)
Zs = R1 +
The circuit gain is
Zf
−j ωR2 C1
Vout
=−
=
,
Vin
Zs
(1 + j ωR1 C1 )(1 + j ωR2 C2 )
(7.138)
which can be expressed as
G=
Op-Amp Phase Shifter
In Section 7-8, we examined how an RC circuit can be used as
a phase shifter with an output voltage having the same angular
frequency ω of the input voltage, but whose phase angle is
increased or decreased (shifted) by a desired amount. That is,
if the input is
υin (t) = V1 cos ωt,
(7.136a)
the phase-shifted output is
υout (t) = V2 cos(ωt + φ).
υout
_
The error is defined as
% error =
+
(7.136b)
As was shown earlier in Section 7-8, an RC circuit can indeed
realize the desired phase shift, but at a cost in amplitude. The
amplitude of the output voltage, V2 , is smaller than V1 , and the
degree of reduction depends on φ and the number of RC stages
used in the phase shifter.
An op-amp circuit can serve as a phase shifter, without
necessarily sacrificing a reduction in amplitude. Consider the
circuit in Fig. 7-34(a). It is an inverting amplifier with complex
source and feedback impedances:
G = |G|ej φ ,
(7.139)
with
|G| =
ωR2 C1
,
[(1 + ω2 R12 C12 )(1 + ω2 R22 C22 )]1/2
φ = 270◦ − tan−1 (ωR1 C1 ) − tan−1 (ωR2 C2 ),
(7.140a)
(7.140b)
where 270◦ is the phase angle corresponding to (−j ) in the
numerator of Eq. (7.138). In the time domain,
υout (t) = |G|V1 cos(ωt + φ).
(7.141)
Through judicious choice of the values of R1 , R2 , C1 , and C2 ,
it should be possible to design a phase shifter that provides the
desired value of φ, with |G| ≥ 1. The process is illustrated by
Example 7-18.
Example 7-18: Op-Amp Phase Shifter
Select values for R1 , R2 , C1 , and C2 in the circuit of Fig. 7-34
so that φ = 120◦ and |G| = 2 at ω = 500 rad/s.
432
CHAPTER 7 AC ANALYSIS
υs(t)
ac input
Transformer
Rectifier
Filter
Vout
dc output
Voltage
regulator
υs(t)
Vout
Figure 7-35: Block diagram of a basic dc power supply.
Solution: With 4 selectable parameters against only 2
specified parameters, the desired outcome can be realized
through many different combinations of (R1 , R2 , C1 , C2 ).
Hence, we arbitrarily choose
R1 = 2 k�,
C1 = 3 μF,
which leads to
ωR1 C1 = 500 × 2 × 103 × 3 × 10−6 = 3.
Using this value and φ = 120◦ in Eq. (7.140b) leads to
120◦ = 270◦ − tan−1 (3) − tan−1 (ωR2 C2 ),
which simplifies to
tan−1 (ωR2 C2 ) = 270◦ − 120◦ − tan−1 3
= 150◦ − 71.57◦ = 78.43◦ .
Hence,
ωR2 C2 = tan 78.43◦ = 4.89.
With ωR1 C1 = 3 and ωR2 C2 = 4.89, and |G| = 2, solution of
Eq. (7.140a) leads to
R2 = 21 k�,
7-12 Application Note: Power-Supply
Circuits
Systems composed of one or more electronic circuits usually
contain power-supply circuits that convert the ac power
available from the wall outlet into dc power, thereby providing
the internal dc voltages required for proper operation of the
electronic circuits. Most dc power supplies consist of the four
subsystems diagrammed in Fig. 7-35. The input is an ac voltage
υs (t) of amplitude Vs and angular frequency ω, and the final
output is a dc voltage Vout . Our plan in this section is to
describe the operation of each of the intermediate stages, and
then connect them all together.
7-12.1
Ideal Transformers
A transformer consists of two inductors called windings, that are
in close proximity to each other but not connected electrically.
The two windings are called the primary and the secondary,
as shown in Fig. 7-36. Even though the two windings are
isolated electrically—meaning that no current flows between
them—when an ac voltage is applied to the primary, it creates a
magnetic flux that permeates both windings through a common
core, inducing an ac voltage in the secondary.
The transformer gets its name from the fact that it
is used to transform currents, voltages, and impedances
between its primary and secondary circuits. and
C2 =
4.89
4.89
=
= 0.47 μF.
ωR2
500 × 21 × 103
The key parameter that determines the relationships between
the primary and the secondary is the turns ratio n = N2 /N1 ,
7-12 APPLICATION NOTE: POWER-SUPPLY CIRCUITS
i1
N1 : N2 i2
i1
+
+
υ1
υ2
_
_
Dots on same ends
+
υ1
_
N1 : N2
_
υ2
+
i2
Dots on opposite ends
Figure 7-36: Schematic symbol for an ideal transformer. Note
the reversal of the voltage polarity and current direction when
the dot location at the secondary is moved from the top end of
the coil to the bottom end. For both configurations:
υ2
N2
i2
N1
1
υ 2 i2
p2
=
= n,
=
= ,
=
=1
υ1
N1
i1
N2
n
p1
υ 1 i1
where N1 is the number of turns in the primary coil and N2 is
the number of turns in the secondary. An additionally important
attribute is the direction of the primary winding, relative to
that of the secondary, around the common magnetic core. The
relative directions determine the voltage polarity and current
direction at the secondary, relative to those at the primary. To
distinguish between the two cases, a dot usually is placed at one
or the other end of each winding, as shown in Fig. 7-36. For the
ideal transformer, voltage υ2 at the secondary side is related
to voltage υ1 at the primary side by
N2
υ2
=
= n,
υ1
N1
(7.142)
where the polarities of υ1 and υ2 are defined such that their (+)
terminals are at the ends with the dots. In an ideal transformer,
no power is lost in the core, so all of the power supplied by a
source to its primary coil is transferred to the load connected
at its secondary side. Thus, p1 = p2 , and since p1 = i1 υ1 and
p2 = i2 υ2 , it follows that
N1
i2
=
,
i1
N2
(7.143)
with i1 always defined in the direction towards the dot on the
primary side and i2 defined in the direction away from the dot
on the secondary side. The purpose of the dot designation is
to indicate whether the windings in the primary and secondary
coils curl in the same (clockwise or counterclockwise) direction
or in opposite directions. The coil directions determine the
433
direction of magnetic flux coupling between the two coils. More
details are available in Chapter 11.
If N2 /N1 > 1, the transformer is called a step-up
transformer because it transforms υ1 to a higher voltage,
and if N2 /N1 < 1, it is called a step-down transformer. Most office and household electronic gadgets (such as
telephones, clocks, radios, and answering machines) require
dc voltages that are on the order of volts (or at most a few tens
of volts), which is much smaller than the voltage level available
at the wall outlet. The transformer in such gadgets is invariably
a step-down transformer.
As discussed in great detail in Chapter 11, the inputoutput relationships for a real transformer are more elaborate
than those given by Eqs. (7.142) and (7.143) for the
ideal transformer. Nevertheless, these simple relationships are
reasonable first-order approximations and serve our current
discussion quite adequately.
Concept Question 7-17: In a transformer, how are the
voltage polarities and current directions defined relative
to the dots on the primary and secondary windings?
(See
)
Concept Question 7-18: For an ideal transformer, how
is power p2 related to power p1? (See
7-12.2
)
Rectifiers
A rectifier is a diode circuit that converts an ac waveform into
one that is either always positive or always negative, depending
on the direction(s) of the diode(s). Power supplies usually use a
bridge rectifier, but to appreciate how such a bridge functions,
we will first consider the simple single-diode rectifier circuit
shown in Fig. 7-37. As discussed in Section 2-6.2, a diode is
modeled by a practical response that allows current to flow
through it in the direction shown in Fig. 7-37 if and only if the
voltage across it is greater than a threshold value known as the
forward-bias voltage VF . That is, for the circuit in Fig. 7-37,
the output voltage across the load resistor is given by
υout =
υin − VF
0
if υin ≥ VF ,
if υin ≤ VF .
(7.144)
For an ideal diode with VF = 0, the output waveform is identical
to the input waveform for the half cycles during which υin is
positive, and the output is zero when υin is negative. In the case
434
CHAPTER 7 AC ANALYSIS
υout(t) with VF = 0
υin(t)
υin
i1
+ VF _
+
_
υout
υout(t) with VF = 0.7 V
RL
υout(t)
υin(t)
Figure 7-37: Half-wave rectifier circuit.
of a real diode with VF ≈ 0.7 V, the peak amplitude of the output
is smaller than that of the input by 0.7 V. Because the output
waveform essentially replicates only the positive half cycles
of the input waveform (with a negative amplitude shift equal
to VF ), the circuit of Fig. 7-37 is called a half-wave rectifier.
Next, we consider the bridge-rectifier circuit of Fig. 7-38.
The bridge rectifier uses four diodes. During the positive half
cycle of υin (t), two of the diodes conduct, and the other two
are OFF. The reverse happens during the second half cycle, but
the direction of the current through RL is the same during both
half cycles. Consequently, the output waveform essentially is
equivalent to taking the absolute value of the input waveform
(if VF is so small relative to the peak value as to be neglected).
Because a bridge rectifier acts on both halves of a cycle, it is
often called a full-wave rectifier.
Exercise 7-17: Suppose the input voltage in the circuit of
Fig. 7-38 is a 10 V amplitude square wave. What would
the output look like?
Answer: 8.6-V dc. (See
7-12.3
)
Smoothing Filters
So far, we have examined two of the four subcircuits of the dc
power supply. The transformer serves to adjust the amplitude
of the ac signal to a level close to the desired dc voltage level
of the final output. The bridge rectifier converts the ac signal
into an all-positive waveform. Next, we need to reduce the
variations of the full-wave rectified waveform to bring it to
as close to a constant level as possible. We accomplish this
by subjecting the full-wave rectified waveform to a smoothing
(averaging) filter. This is realized by adding a capacitor C in
parallel with the load resistor. The modified circuit is shown in
Fig. 7-39(a), and the associated output waveform is displayed in
Fig. 7-39(b). The capacitor is a storage device that goes through
partial charging-up and discharging-down cycles. During the
charging-up period, the upswing time constant of the circuit is
given by
τup = (2RD � RL )C ≈ 2RD C
if RL � RD ,
(7.145)
where RD is the diode resistance. Typically, RD is on the order of
ohms and RL is on the order of kiloohms, so the approximation
given by Eq. (7.145) is quite reasonable. In the absence of
the capacitor in the circuit, RD usually is ignored because
it is in series with a much larger resistance, RL . Adding a
capacitor, however, creates an RC circuit in which R is the
parallel combination of RD and RL , placing RD in a controlling
position.
During the discharging period, the diode turns off, and
the capacitor discharges through RL alone. Consequently, the
downswing time constant involves RL and C only,
τdn = RL C.
(7.146)
For a specified value of the diode resistance RD , we can choose
the values of RL and C so that τup is short and τdn is long—
both relative to the period of the rectified waveform—thereby
realizing a fast response on the upswing part and a very slow
response on the downswing part. In practice, it is possible to
generate an approximately constant dc voltage with a ripple
component on the order of 1 to 10 percent of its average value
(Fig. 7-39(b)).
7-12 APPLICATION NOTE: POWER-SUPPLY CIRCUITS
OFF
υin(t)
υin
+
_
435
υout(t)
_ υ
out +
RL
OFF
(a) Positive half cycle
OFF
υin
+
_
υin(t)
υout(t)
_ υ
out +
RL
OFF
(b) Negative half cycle
υout(t) = |υin(t)| − 2VF
υin(t)
Full-wave
bridge rectifier
(c) Input-output response
Figure 7-38: Full-wave bridge rectifier. Current flows in the same direction through the load resistor for both half cycles.
Example 7-19: Filter Design
Trect =
1
= 8.33 ms,
120
If the bridge rectifier circuit of Fig. 7-39(a) has a 60 Hz ac input
signal, determine the values of RL and C that would result in
τup = Trect /12 and τdn = 12Trect , where Trect is the period of
the rectified waveform. Assume RD = 5 �.
and the corresponding design specifications are
Solution: If the frequency of the original ac signal is 60 Hz,
the frequency of the rectified waveform is 120 Hz. Hence, the
period of the rectified waveform is
Application of Eq. (7.145) leads to
τup =
Trect
= 0.69 ms,
12
and τdn = 12Trect = 100 ms.
τup ≈ 2RD C
436
CHAPTER 7 AC ANALYSIS
υin
+
_
+
C
υout
RL
(a) Bridge rectifier with filter
υout
Capacitor charging up
Capacitor discharging
With filter
Without filter
Ripple voltage υr
t
Trect
(b) Filtered output
Figure 7-39: Smoothing filter reduces the variations of waveform υout (t).
or
τup
0.69 × 10−3
C=
=
= 69 μF.
2RD
2×5
With the value of C known, application of Eq. (7.146) gives
τdn
100 × 10−3
RL =
= 1.45 k�.
=
C
69 × 10−6
7-12.4 Voltage Regulator
The circuit shown in Fig. 7-40 includes all of the power-supply
subcircuits we have discussed thus far, plus two additional
elements, namely a series resistance Rs and a zener diode.
When operated in reverse breakdown, the zener diode maintains
the voltage across it at a constant level Vz —so long as the
current iz passing through it remains between certain limits.
Since the diode is connected in parallel with RL , the output
voltage becomes equal to the zener voltage Vz , and the effective
time constant of the smoothing filter becomes τ = Rs C. It is
worth noting that the addition of the zener diode reduces the
peak-to-peak ripple voltage Vr (Fig. 7-39(b)) at the output of
the RC filter by about an order of magnitude. An approximate
expression for the peak-to-peak ripple voltage with the zener
diode in place is given by
Vr =
[(Vs1 − 1.4) − Vz ]Trect
(Rz � RL )
×
,
Rs C
Rs + (Rz � RL )
(7.147)
where Vs1 is the amplitude of the ac signal at the output of
the transformer (Fig. 7-40), the factor 1.4 V accounts for the
voltage drop across a pair of diodes in the rectifier, Vz is the
manufacturer-rated zener voltage for the specific model used in
the circuit, Trect is the period of the rectified waveform, and Rz is
the manufacturer specified value of the zener-diode resistance.
Example 7-20: Power-Supply Design
A power supply with the circuit configuration shown in
Fig. 7-40 has the following specifications: the input voltage
is 60 Hz √
with an rms amplitude Vrms = 110 V where
Vrms = Vs / 2 (the rms value of a sinusoidal function is
7-13
MULTISIM ANALYSIS OF AC CIRCUITS
Vs1 =
N1 : N2
υs(t) = Vs cos ωt
+
_
437
υs2
( )
N2
V
N1 s
υout
Vz
(Vs1 − 1.4)
t
t
Zener diode Vz
Rs
υs1(t) = Vs1 cos ωt
iz
+
υs2(t)
C
_
Transformer
Rectifier
+
RL υout(t)
_
123
RC filter and
voltage regulator
Figure 7-40: Complete power-supply circuit.
discussed in Chapter 8), N1 /N2 = 5, C = 2 mF, Rs = 50 �,
RL = 1 k�, Vz = 24 V, and Rz = 20 �. Determine υout , the
ripple voltage, and the ripple fraction relative to υout .
Solution: At the secondary side of the transformer,
N2
(Vs cos 377t)
υs1 (t) =
N1
√
1
= × 110 2 cos 377t = 31.11 cos 377t V.
5
Hence, Vs1 = 31.11 V, which is greater than the zener voltage
Vz = 24 V.
Consequently, the zener diode will limit the output voltage
at
υout = Vz = 24 V.
In Example 7-19, we established that Trect = 8.33 ms. Also,
20 × 1000
= 19.6 �.
Rz � RL =
20 + 1000
Application of Eq. (7.147) gives
[(Vs1 − 1.4) − Vz ]Trect
(Rz � RL )
×
Vr =
Rs C
Rs + (Rz � RL )
19.6
[(31.11 − 1.4) − 24]
(8.33 × 10−3 ) ×
=
50 × 2 × 10−3
50 + 19.6
= 0.13 V (peak-to-peak).
Hence,
0.13/2
(Vr /2)
=
= 0.0027,
Vz
24
which represents a relative variation of less than ±0.3 percent.
ripple fraction =
7-13 Multisim Analysis of ac Circuits
Even though we usually treat the wires in a circuit as ideal short
circuits, in reality a wire has a small but non-zero resistance.
Also, as noted earlier in Section 5-7.1, when two wires are in
close proximity to one another, they form a non-zero capacitor.
A pair of parallel wires on a circuit board is modeled as a
distributed transmission line with each small length segment �
represented by a series resistance R and a shunt capacitance C,
as depicted by the circuit model shown in Fig. 7-41. For a
parallel-wire segment of length �, R and C are given by
R=
or
R=
2�
π a2σ
πf μ
σ
(low-frequency
approximation)
√
(a f σ ≤ 500),
(7.148a)
�
πa
(high-frequency
approximation)
√
(a f σ ≥ 1250),
(7.148b)
and
C=
πε�
ln(d/a)
for (d/2a)2 � 1,
(7.148c)
where a is the wire radius, d is the separation between the
wires, f is the frequency of the signal propagating along the
wires, μ and σ are respectively the magnetic permeability and
conductivity of the wire material, and ε is the permittivity of
the material between the two wires. Note that R represents the
438
CHAPTER 7 AC ANALYSIS
and if the total length of the parallel wires is �t = 15 cm, then
their transmission-line equivalent circuit should consist of n
sections with
�t
15 cm
n=
=
= 5.
�
3 cm
We will now use Multisim to simulate such a transmission line.
Conductivity σ
2a
d
l
l
l
l
Example 7-21: Transmission-Line Simulation
R
R
C
R
C
R
C
C
Figure 7-41: Distributed impedance model of two-wire
transmission line.
A pair of parallel wires made of a conducting material with
conductivity σ = 1.9×105 S/m is used to carry a 1 GHz squarewave signal between two circuits on a circuit board. The wires
are 15 cm in length and separated by 1 mm, and their radii are
0.1 mm. (a) Develop a transmission-line equivalent model for
the wires and (b) use Multisim to evaluate the voltage response
along the transmission line.
Solution: (a) With � = 3 cm (to satisfy Eq. (7.149)),
application of Eqs. (7.148b and c) gives
resistance of both wires. There is actually a third distributed
element to consider in the general case of a transmission line:
the distributed inductance. This inductance is placed in series
with the resistance R of each segment. It arises because current
flowing through the transmission-line wires gives rise to a
magnetic field around the wires and, hence, an inductance (as
discussed in Section 5-3). However, modeling the behavior
of a transmission line with all three components is rather
complex. So, for the purposes of this section, we will ignore the
inductance altogether so that we may illustrate the performance
of an RC transmission line using Multisim. Keeping this in
mind, the distributed model shown in Fig. 7-41 allows us to
represent the wires by a series of cascaded RC circuits. For
the model to faithfully represent the behavior of the real twowire configuration, each RC stage should represent a physical
length � that is no longer than a fraction (≈ 10 percent) of the
distance that the signal travels during one period of the signal
frequency. Thus, � should be on the order of
�≤
up T
c
≈
,
10
10f
(7.149)
where up is the signal velocity along the wires, which is on
the order of the velocity of light by c = 3 × 108 m/s, and the
period T is related to the frequency f by T = 1/f . For example,
if the signal frequency is 1 GHz (= 109 Hz), then � should be
on the order of
c
3 × 108
�≈
= 3 cm,
=
10f
10 × 109
R=
=
and
πf μ
σ
�
πa
π × 109 × 4π × 10−7
1.9 × 105
= 13.76 �
C=
=
3 × 10−2
π × 10−4
πε�
ln(d/a)
π × (10−9 /36π ) × 3 × 10−2
ln(10)
= 3.6 × 10−13 F
= 0.36 pF.
(b) To use Multisim, we need to select values for R and C—
from the libraries of available values—that are approximately
equal to those we calculated. The selected values are less critical
to the simulation than the value of their product, because it is
the product RC = 13.76 × 0.36 × 10−12 ≈ 5 × 10−12 s that
determines the time constant of the voltage response. Hence,
we select
R = 10 �
and
C = 0.5 pF,
and we draw the 5-stage circuit shown in Fig. 7-42. The square
wave is generated by a pulse generator that alternates between
0 and 1 V. Its pulses are 500 ps long and the pulse period is
7-13
MULTISIM ANALYSIS OF AC CIRCUITS
439
Figure 7-42: Transmission-line circuit in Multisim.
1000 ps (or equivalently, 1 ns, which is the period corresponding
to a frequency f = 1 GHz). The Rise Time and Fall Time
should be set to 1 ps. Figure 7-43 displays V(1) at node 1,
which represents the pulse-generator voltage waveform, and
the voltages at nodes 2, 3, 4, 5, and 6 corresponding to the
outputs of the five RC stages.
During the charging-up period, it takes longer for the
nodes further away from the pulse generator to reach the
steady-state voltage of 1 V than it does for those closer to
the generator. The same pattern applies during the discharge
period. In addition to the parallel-wire configuration, the
distributed transmission-line concept is equally applicable
Input voltage V(1)
V(6)
V(4)
V(2)
Figure 7-43: Multisim display of voltage waveforms at nodes 1, 2, 3, 4, 5, and 6.
440
CHAPTER 7 AC ANALYSIS
Figure 7-44: Using the Logic Analyzer to measure time delay in Multisim.
to other transmission media, including the shielded cable
commonly used for the transmission of audio, video, and
digital data between different circuits. If a digital signal with
logic 0 = 0 V and logic 1 = 1 V is to be transmitted along
a coaxial cable or some other transmission line, it may be of
interest to simulate the process using Multisim to determine
how long it takes to charge the different nodes along the line
up to 1 V. This is also known as propagating the logic 1
down the transmission line. The Logic Analyzer (Simulate
→ Instruments → Logic Analyzer) is used to visualize a
large number of logic levels at once. (See the Multisim Tutorial
for a detailed explanation on how to use the Logic Analyzer
Instrument.) An example is shown in Fig. 7-44. The circuit uses
1 M� resistors, 5 fF capacitors, and a pulse generator. The pulse
length is set at 500 ps and the pulse period at 1000 ps (= 1 ns).
The circuit nodes are wired to the logic analyzer. In Fig. 7-45, we
can observe how long it takes each node to charge up sufficiently
to register as a logic 1. Note that the logic analyzer’s cursor can
be used to read out the exact time points.
Example 7-22: Measuring Phase Shift
Run a Transient Analysis on the Multisim circuit in Fig. 7-44
after replacing the pulse generator with a 1 V amplitude, 10
MHz ac source. The goal is to determine the phase of node 2,
relative to the phase of node 1 (the voltage source). Select a
Start Time of 2.7 μs and an End Time (TSTOP) of 3.0 μs,
and set TSTEP and TMAX to 1e-10 seconds so as to generate
smooth-looking curves. [We did not choose a Start Time of 0 s
simply because it takes the circuit a few microseconds to reach
its steady-state solution.]
Solution: Figure 7-46 shows the traces of selected nodes
V(1), V(2), and V(6) on Grapher View. Clicking on the
Show/Hide Cursors button enables the measurement cursor,
which can be used to quantify the amplitude (vertical axis) and
time (horizontal axis) for each curve. To measure the phase shift
between nodes V(2) and V(1), two cursors are needed.
Step 1: Place cursor 1 slightly to the left of a maximum of the
V(1) trace.
Step 2: Click on the trace for V(1) to select it. White triangles
will appear on the V(1) trace.
Step 3: Right-click the cursor itself and select Go to next
Y Max=>. On row x1, at column V(1), the value in the
table should be 2.7250 μs.
7-13
MULTISIM ANALYSIS OF AC CIRCUITS
Node 1
Node 2
Node 4
Node 6
Figure 7-45: Logic Analyzer readout at nodes 1, 2, 3, 4, 5, and 6.
V(1)
V(2)
V(6)
Figure 7-46: Multisim Grapher Plot of voltage nodes V(1), V(2), and V(6) in the circuit of Fig. 7-42.
441
442
CHAPTER 7 AC ANALYSIS
Figure 7-47: Using Measurement Probes to determine phase and amplitude of signal at various points on transmission line.
Step 4: Repeat the process using cursor 2 to select the nearby
maximum of the V(2) trace. The entry in row x2, at column
V(2), should be 2.7312 μs.
The time difference between the two values is
�t = 2.7312 μs − 2.7250 μs
= 0.0062 μs.
Given that f = 10 MHz, the period is
1
f
1
= 7
10
T =
= 10−7
= 0.1 μs.
Application of Eq. (7.11) gives
�t
T
0.0062
= 360◦ ×
0.1
φ = 2π
= 22.3◦ .
We also can determine the ratio of the amplitude of V(2) to
that of V(1). The ratio of y2 in column V(2) to y1 in column
V(1) gives
V(2)
0.656
=
≈ 66 percent.
V(1)
1
Exercise 7-18: Determine the amplitude and phase of
V(6) in the circuit of Example 7-22, relative to those of
V(1).
Answer: (See
)
Additional method to measure amplitude and phase
Let us continue working with the transmission-line circuit of
the previous two examples. Place a Measurement Probe (of
the type we introduced in Chapters 2 and 3) at each of the
appropriate nodes in the circuit. Double-click on the Probe, and
under the Parameters tab, select the appropriate parameters so
that only V(p-p), Vgain(ac), and Phase are printed in the Probe
output. Additionally, with the exception of Probe 1 (located
right above V1), at the top of the Probe Properties window,
check Use reference probe, and select Probe 1. Note that
“phase” here refers to the phase difference between the voltage
at the specific probe and the reference probe. So if a particular
signal is leading the reference node, then the phase will appear
negative, and if a particular signal is lagging the reference node,
then the phase will appear positive. This is the opposite of how
we are taught to think of phase, so keep this at the front of your
mind when using this approach.
Run the Interactive Simulation by pressing F5 (or any of
the appropriate buttons or toggles, which you should know by
now) and the result should resemble that shown in Fig. 7-47.
We can see that the Phase at Node 2 is 22.6◦ , which of course is
opposite to what we see in Fig. 7-46, where the signal at V(2)
is behind V(1) by 22.3◦ . However, we must remember that the
phase values are flipped in the Measurement Probe readings,
so the values actually are in agreement. Additionally, we see
in Fig. 7-47 that the Vgain(ac) at Node 2 is “654m” (which
corresponds to 65.4 percent), which is very nearly in agreement
with the value of 66 percent obtained in Example 7-22.
7-13
MULTISIM ANALYSIS OF AC CIRCUITS
443
Summary
Concepts
• A sinusoidal waveform is characterized by three
independent parameters: its amplitude A, its angular
frequency ω, and its phase angle φ.
• Complex algebra is used extensively in the phasor
domain to analyze ac circuits. Hence, it behooves every
student taking a course in circuit analysis to become
proficient in using complex numbers (by hand, with a
scientific calculator, and with MATLAB/Mathworks).
• By transforming an ac circuit from the time domain to
the phasor domain, its integro-differential equation gets
transformed into a linear equation. After solving the
linear equation, the solution is then transformed back
to the time domain.
• Voltages and currents in the time domain have phasor
•
•
•
•
•
counterparts in the phasor domain; resistors, capacitors,
and inductors are transformed into impedances.
The rules for combining impedances (when connected
in series or in parallel) are the same as those for
resistors in resistive circuits. The same is true for
Y–� transformations.
All of the techniques of circuit analysis are equally
applicable in the phasor domain.
A phase shifter is a circuit that can modify the phase
angle of a sinusoidal waveform.
An ac waveform can be converted into dc by subjecting it
to a four-step process that includes a transformer, bridge
rectifier, smoothing filter, and voltage regulator.
Multisim is very useful for analyzing an ac circuit and
evaluating its response as a function of frequency.
Mathematical and Physical Models
Transformer
Trigonometric identities
Table 7-1
Time domain/phasor domain
correspondence
Table 7-2
Impedance
ZR = R
ZC = 1/j ωC
ZL = j ωL
Impedances in series
Zeq =
Admittances in parallel
Y–� transformation
Important Terms
absolute phasor diagram
ac
admittance
alternating current
amplitude
Yeq =
Section 7-4.2
N
i=1
N
υ2
N2
=
υ1
N1
i2
N1
=
i1
N2
R=
Wire capacitor
C=
Zi
Yi
i=1
2�
for (a f σ ≤ 500)
π a2σ
πf μ
�
R=
σ
πa
√
for (a f σ ≥ 1250)
Wire resistance
πε�
ln(d/a)
for (d/2a)2 � 1
Provide definitions or explain the meaning of the following terms:
angular frequency
argument
bridge rectifier
capacitive impedance
complex conjugate
complex number
conductance
core
cosine-referenced
current division
downswing time constant
electromagnetic
compatibility
Euler’s identity
forward-bias voltage
444
CHAPTER 7 AC ANALYSIS
Important Terms (continued)
frequency
frequency domain
technique
full-wave rectifier
half-wave rectifier
iff
ideal transformer
imaginary
impedance
inductive impedance
lag
lead
oscillation frequency
peak-to-peak ripple voltage
peak value
period (of a cycle)
phase angle
phase lag
phase lead
phase-shift circuit
phase-shift oscillator
phasor counterpart
phasor diagram
phasor domain
phasor domain technique
polar form
primary winding
radio frequency identification
PROBLEMS
Section 7-1: Sinusoidal Signals
*7.1
Express the sinusoidal waveform
υ(t) = −4 sin(8π × 103 t − 45◦ ) V
in standard cosine form and then determine its amplitude,
frequency, period, and phase angle.
7.2
Express the current waveform
i(t) = −0.2 cos(6π × 109 t + 60◦ ) mA
in standard cosine form and then determine the following:
(a) Its amplitude, frequency, and phase angle.
(b) i(t) at t = 0.1 ns.
*7.3 A 4 kHz sinusoidal voltage waveform υ(t), with a 12 V
amplitude, was observed to have a value of 6 V at t = 1 ms.
Determine the functional form of υ(t).
7.4 Two waveforms, υ1 (t) and υ2 (t), have identical amplitudes and oscillate at the same frequency, but υ2 (t) lags υ1 (t)
by a phase angle of 60◦