BITS-Pilani, Hyderabad Campus ECE F314 Assignment Name:_______________________________________ Roll No: _____________________________________ ID Number:___________________________________ Submissions without the above information will be awarded zero. Total Marks: 30 Date of Submission: November 20, 2023 (5 pm IST) at LAMBDA (W-101) Submission mode: Hard copy by hand. This is an open book, open internet assignment. Instructions: a) You will need to use APLAC student version software for this assignment. b) APLAC student version is a freeware which can be used without restriction. The setup for the same is uploaded in CMS. c) You may contact Mr. Shaik Sultan on p20220420@hyderabad.bits-pilani.ac.in for issues in software installation only. d) Students need to submit the hardcopy of the assignment. You must show substitutions clearly. You can present more results and explanations than asked. Marks will also be awarded based on the uniqueness of your solution and any additional data and logical explanations provided to justify your solutions. e) Students must note that wherever circuit schematics are asked, the name of the component, the value of the component must be clearly seen. Miniaturised snapshots of the circuit and frequency response which cannot be read by the human eye easily will be awarded zero marks. f) Students must note that wherever frequency response graphs with APLAC are asked, the frequency range must be from 1 GHz to 10 GHz. Appropriate horizontal and vertical markers must be placed at the frequency F, at the frequency where S11 is minimum and where the bandwidth of S11 is -10 dB down. g) Students must note that wherever response graphs with APLAC are asked, You should draw it properly. h) The best way to learn a software tool is to learn it by ones’ own effort. Hence, it is expected that students will learn the use of APLAC by themselves with the help of resources available on the internet. Issues regarding the use of software or debugging the errors will not be answered by the instructor or TA under any circumstances. Pre-Assignment Reading 1) S-Parameters and their use in characterising RF microwave circuits/devices Note: The values of Z1, Z0, F, Z2 and Z3 are based on your roll numbers. The allocated values can be found in the uploaded pdf file named data. You must use values 1 corresponding to your roll number only. If any other values are considered, you will be awarded zero marks. Note2: Do not change the order of the questions. You may increase the space available for writing the solutions, provided that the format is not disturbed. Note 3: This assignment consist of 2 questions. Q.1 consist of 5 sub-questions, Q. 2 consist of 5 sub-questions. All questions are compulsory. Q. 1. A load of impedance Z1 is to be matched to a line of impedance Z0 using the single stub matching technique. The stub is a short circuit stub in parallel to the load. The characteristic impedance of the stub is Z0. The frequency of matching is F. (Use Tline for tranmsmission line) (15 points in total) a) Design the matching network for the same and determine the two possible solutions using the Smith chart. Draw using a Smith chart. Label appropriate points and sections. Also, draw the circuit diagram showing the two solutions with appropriate labels and dimensions. (3 points) 2 b) Now, implement the obtained solutions in APLAC student version and present your solutions in the prescribed format below: Draw the schematic of the circuit in APLAC here for both the solutions (the lengths, impedances and values of all the components should be clearly visible) (4 points) Circuit 1 Circuit 2 c) Now obtain the frequency response of each of the circuit (S11 (dB), S21(dB)) and draw the response here for both the schematics (note that for a given circuit, S11(dB) and S21(dB) should be in the same graph). The frequency response should be on a rectangular plot with the frequency varying from 1 GHz to 10 GHz with appropriate intervals to resolve your graph. Mark the bandwidth where the matching is better than 3 -10 dB in APLAC manually using ratio and proportion and state it clearly below your solution. (4 points) Response of Circuit 1 Response of Circuit 2 d) Explain how would you judge the correctness of your design by observing the frequency response. (2 points) 4 e) Other than the distance where the stub is attached and the length of the stub, what is the difference in the behaviour of circuit 1 and circuit 2 of your solution? State in a couple of sentences. (2 points) 5 Q. 2. A 𝒁𝟎 ohm line feeds a load which may exhibit two different normalised admittances at different times based on reasons out of the scope of this question. The two normalised admittances are 0.3+j0.2 and 0.4 +j 0.7. You are asked to design a stub matching solution which is able to match both these admittances without changing the positions of the stub(s). The user will have the flexibility to change the length of the stub(s) to arrive at a match when the admittance switches. You have to suggest to the user the lengths of the stub(s), which will give good matching for each of the above two cases. The constraints given to you by the user is that when the load exhibits an admittance of 0.3+j0.2, the first stub is located at a distance of 0.13λ away from the load. You are free to select a choice of any stub matching technique to arrive at an appropriate solution. The matching should be at a frequency of F. Design the appropriate network in APLAC and write your solution in the prescribed format below to model the transmission line in APLAC (Use Tline for tranmsmission line) (15 points in total) a) Which method would you select and why? (3 points) b) Draw the APLAC schematic of your solution when the normalised load admittance is 0.3+j0.2. All values must be clearly labelled in your schematic. (4 c) 3. points) 6 d) Draw the frequency response of your solution (in terms of S11 dB and S21 dB) when normalised load admittance is 0.3+j0.2. Clearly depict the -10 dB bandwidth in APLAC (4 points) e) Draw the APLAC schematic of your solution when the normalised load admittance is 0.4+j0.7. All values must be clearly labelled in your schematic. (2 points) 7 f) Draw the frequency response of your solution when normalised load admittance is 0.4+j0.7 as obtained from APLAC (2 points) End of assignment 8