Lab 9 Part A : SR NAND latch: 1-Using only two of the four NAND gates of 7400, connect the circuit as shown in the figure 2- connect two red LEDs. To monitor the output of the flip-flops (1 or 0) 3- Verify the truth table for the SR NAND latch. 4- Modify the above circuit so that it can be used as a debouncer with the addition of an SPDT switch and two 10K resistors : What is debouncing? Debouncing is removing unwanted input noise from buttons, switches or other user input. Debouncing prevents extra activations or slow functions from triggering too often. Debouncing is used in hardware switches, programs and websites. How we use: Part B: 4-bit asynchronous counter 1- Mutually connect the 4 JK flip-flops according to the scheme shown in Figure 1 to construct the 4-bit counter. 2- The CLEAR terminals (pin 15 and 14) of the two the FFs are connected together to perform a common RESET (CLEAR). 3- The PRESET terminals (pin 4 and pin 10) are also tied to +5V. 4- Connect 4 orange LEDs to the 4 Q outputs (A, B, C, D) of the FFs as visual indicators of outputs. 5- Connect the Q output from the switch debouncer to pin 1 of the first 74LS114 chip 6- toggle the SPDT switch to generate a series of clean ON/OFF pulses. These pulses serve as a “clock” for the counter. 7- Can you count the pulses with the 4 blinking LEDs? The count should proceed from 0 to 15 in a binary sequence. Demonstrate this to the instructor. 8- At any time, in the count sequence, connect the common CLEAR line momentarily to GND (0V) to perform a full asynchronous reset (CLEAR) of the counter. 9- Can you modify the circuit to count backwards (from 16 to 0) Up : 1- https://de-iitr.vlabs.ac.in/exp/4bit-synchronous-asynchronouscounter/simulation/counter/asyn.html 2- https://www.youtube.com/watch?v=eEeBh8jfDjg (4-bit asynchronous up counter using jk flip-flop) 3- https://www.google.com/imgres?imgurl=https%3A%2F%2Fi.ytimg.com%2Fvi%2FnoUcCs2z NaI%2Fhq720.jpg%3Fsqp%3DoaymwEhCK4FEIIDSFryq4qpAxMIARUAAAAAGAElAADIQj0AgKJD%26rs%3DAOn4CLBXFPc9mi uCKx9oi7usx0hUWoO6Jg&tbnid=ZQ72Qm8mAxLeM&vet=12ahUKEwi0hbSMlOGCAxWSkScCHUgpPO0QMygAegQIARAq..i&imgrefurl=https% 3A%2F%2Fm.youtube.com%2Fwatch%3Fv%3DeEeBh8jfDjg&docid=M2_YozRcayK1sM&w=6 86&h=386&q=4-bit%20asynchronous%20up%2Fdown%20counter%20using%20jk%20flipflop&hl=en-US&ved=2ahUKEwi0hbSMlOGCAxWSkScCHUgpPO0QMygAegQIARAq (4-bit asynchronous down counter using jk flip-flop)
