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US005619403A
United States Patent
[19]
Ishikawa et al.
[Ill
Patent Number:
5,619,403
[45]
Date of Patent:
Apr. 8, 1997
4,833,582
4,870,555
4,912,617
4,945,465
5,285,368
5,289,359
5,434,768
[54] MULTI-OUTPUT POWER SUPPLY
APPARATUS
[75] Inventors: Tadashi Ishikawa, Tokyo; Atsushi
Asayama, Inagi, both of Japan
[73] Assignee: Canon Kabushiki Kaisha, Tokyo,
Japan
[30]
[57]
[JP]
[JP]
ABSTRACT
In a multi-output power supply apparatus including a primary winding and a plurality of secondary windings, the
switching operation of the primary winding is controlled in
accordance with the output of one of the secondary windings. The switching operation of a switching device for
switching the output of another secondary winding is synchronized with the switching operation of the primary
winding, or is controlled in accordance with an input voltage
for the primary winding.
Japan .................................... 4-197939
Japan .................................... 4-264770
[51] Int. Cl.6 ....................................................
H02M 3/335
[52] U.S. Cl. .................................363/21; 363/89; 363/97;
363/131
[58] Field of Search ................................363/20, 210, 84,
363/89, 95, 97, 131
[56]
Cella, Harper &
Jul. 20, 1993
Foreign Application Priority Data
Jul. 24, 1992
Oct. 2, 1992
Kupka ....................................... 363/21
White ........................................ 363/21
Hartmann et al......................... 363/21
Marinus et al........................... 363/89
Ishikawa ................................... 363/21
Ziermann .................................. 363/21
Jitarv et al. ............................... 363/21
Primary Examiner-Jeffrey L. Sterrett
Attorney, Agent, or Firm-Fitzpatrick,
Scinto
[21] Appl. No.: 93,627
[22] Filed:
5/1989
9/1989
3/1990
7/1990
2/1994
2/1994
7/1995
References Cited
U.S. PATENT DOCUMENTS
4,642,743
19 Claims, 22 Drawing Sheets
2/1987 Radcliffe ................................... 363/21
L1
'-------------V1
C2 +
00
'---1------------1--.,-coM
7
PULSE-WIDTH
LIMITATION
CIRCUIT
T1
4
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PWM
CONTROL
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POWER-SUPPLYVOLTAGE
DETECTION CIRCUIT
,--Dl----+----1....._--l---1-V2
2 .---......,___, C1
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Apr. 8, 1997
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Sheet 3 of 22
FIG.3
D1
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3
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U.S. Patent
Apr. 8, 1997
5,619,403
Sheet 4 of 22
FIG.4
Tr2
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+
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Rx
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Apr. 8, 1997
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Sheet 5 of 22
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Apr. 8, 1997
5,619,403
Sheet 6 of 22
FIG.6
Q1
D1
T1 (e))
L1
[X]
~D2
R3
,..../
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+
-~c3
(GO")
•
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(a)
PWM CONTROL
CIRCUIT
3
SYNCHRONISM
DETECTION
CIRCUIT
U.S. Patent
Apr. 8, 1997
Sheet 7 of 22
5,619,403
FIG.7
(a)
PWM
CONTROL
CIRCUIT 1
(b)
Q11
COLLECTOR
(c)
N3
WINDING
(d)
Q2-0UTPUT
[II]
[I]
( e)
Q12-0N/OFF
-----+-I----+-+--+-+--------.__
ON
OFF
[III]
(f)
V1-0UTPUT
( g)
POINT X
U.S. Patent
Apr. 8, 1997
5,619,403
Sheet 8 of 22
FIG.8
Q1
L1
Vref
T1
Vin
Vee
•
+
PH1
)K
N1
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Q13
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C1
2
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lQ0
+
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V2
C3
COM
1
___
PWM CONTROL
CIRCUIT
3
.____
SYNCHRONISM
DETECTION
------CIRCUIT
U.S. Patent
5,619,403
Sheet 9 of 22
Apr. 8, 1997
FIG.9
Q1
T1
[X]
Vin----N1
Q11
+
D
Q2
\
CLK
D-F/F
C1
2
DRIVING
CIRCUIT
~------------+----1--v2
)
l_Q_QJ D3
+
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(00)
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Apr. 8, 1997
5,619,403
Sheet 12 of 22
FIG.12
--
i1
Vin
•
N1
L21
1
n4{L4)
V1
\
• D1
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t
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!:,--C21
COM
SW1
-------------V2
c22-..._
__________
--1-
21
CTL
CIRCUIT
+
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coM
U.S. Patent ·
Apr. 8, 1997
5,619,403
Sheet 13 of 22
FIG.13
ON
(a)
sw1
I
oFF
I
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1roFF
(b)
sw2
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7
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to
t1 t2
t3
V{n2)-V1 x TON1
r=1~-r4
c1
t1
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( f)
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V X TOFF2
L4
b
l1~t7
I
r·-X
I
N
V1
L5
l8
--
[:
TON2
b
U.S. Patent
Apr. 8, 1997
5,619,403
Sheet 14 of 22
FIG.14
D1
n4
~
V1
+
D23
W2
. COM
FIG.15
i1
D1 n4(L4)
~
Vin
V1
D23
N1
j
N3i2t
/4
SW1
SW2
n5(L5)
\__
.
D2
13
+
t
COM
~
V2
+
COM
CTL
CIRCUIT
U.S. Patent
Sheet 15 of 22
Apr. 8, 1997
5,619,403
FIG.16
n5
---------+
N3
____
V1
_._ ______
.._ _____
FIG.17
"----
V1
+
COM
U.S. Patent
5,619,403
Sheet 16 of 22
Apr. 8, 1997
FIG.18
(PRIOR ART)
D1
1
11[
/:li_- -
Tr2
f
L1
\ ___
___,-"---~----....(""I
(C) R1 /.✓•
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{a)
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+
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R4
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11 I
Q1
1
II I I
II I I
{b)
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(Tr2)
le
(Tr2)
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1
I
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0\ I
IN
I I
V:z
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z·
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I""
U.S. Patent
5,619,403
Sheet 17 of 22
Apr. 8, 1997
FIG.19
L1
"---------V1
C2 +
R3
(Oo)
R4
-----+------41~-----4~---41--~-coM
7
T1
PULSE-WIDTH
LIMITATION
CIRCUIT
4
Vin--+------.
•
6
+
2
POWER-SUPPLVVOLTAGE
DETECTION CIRCUIT
C1
lQ.Q.)
DRIVING
CIRCUIT
PWM
CONTROL
CIRCUIT
(ro
~---~---4---+---+-V2
D3
+
N2
- C3
-•---------'----i-----coM
ZERO-CROSS
DETECTION CIRCUIT 5
_------1
PWM CONTROL ______
CIRCUIT
_____.
1
SYNCHRONISM
....__-----' DETECTION .,________
CIRCUIT
3
.......1
U.S. Patent
5,619,403
Sheet 18 of 22
Apr. 8, 1997
FIG.20
L1
,___
__
C2 +
___.
___
V1
R3
R4
TRIANGULAR /1 /1 A
WAVE
/ V VI-------
T1
Vin-----+
Ra
6 POWER-SUPPLY~
VOLTAGE
DETECTION CIRCUIT
V2
2
+
DRIVING
CIRCUIT
___
{oO)
N2
-
*6 I •
ZERO-CROSS
DETECTION CIRCUIT 5
PWM CONTROL ..._ ___
_____,
CIRCUIT
1
.___
C3
SYNCHRONISM
DETECTION
CIRCUIT
---------1
3
COM
U.S. Patent
Apr. 8, 1997
5,619,403
Sheet 19 of 22
FIG.21
Q4
L1
...._-...-----V1
C2 +
R3
R4
TRIANGULAR A 11A
WAVE
/VVI-----
T1
R9
+
--6
R8
2 .-----DRIVING
CIRCUIT
V2
C1
lQ.Q..J
(m
t
+ C3
•
O
COM
ZERO-CROSS
DETECTION CIRCUIT 5
PWM CONTROL
CIRCUIT
......__--t
POWER-SUPPLVVOLTAGE
DETECTION CIRCUIT
SYNCHRONISM
DETECTION
CIRCUIT
t---------'
1
7
3
R10 /
U.S. Patent
Apr. 8, 1997
5,619,403
Sheet 20 of 22
FIG.22
L1
-------V1
C2
R3
+
R4
----7
TRIANGULAR 11J111--------.
WAVE
IVVI
I
I
I
I
T1
I
I
I
I
I
Vin-----
•
I
I
I
N1
D4
~
+
4
_._ 6 POWER-SUPPLYRs
VOLTAGE
DETECTION CIRCUIT
- - - - - - - - - - - - - - - -7
C1
2
DRIVING
CIRCUIT
,-1
v2:
I
I
1
N2
~
----~--
I
I
I
I
I
{t I •
+C3
:
•
I
I
ZERO-CROSS-----DETECTION CIRCUIT 5
PWM CONTROL
CIRCUIT
__
COM
J
1
1
1
1
I
lQ.Q)
I
I
I
I
----1
SYNCHRONISM
DETECTION
CIRCUIT
3
I
I
L----------------------,-------------~
I
--,_1 DIGITIZED
IN 1 CHIP
U.S. Patent
5,619,403
Sheet 21 of 22
Apr. 8, 1997
FIG.23
T1
Vx
Vin-.,._
____
04
Vy
L1
V1
_
D2
•
+
R3
C2
R4
+
PWM CONTROL
CIRCUIT
~-----+-------.,._~~+--V2
2
4
C1
DRIVING
CIRCUIT
LQ..Qj
+ C3
{oO"j
-
*~I •
ZERO-CROSS
DETECTION CIRCUIT 5
__
PWM CONTROL ----------'
CIRCUIT
1
SYNCHRONISM
DETECTION
CIRCUIT
~-------.....1
3
COM
U.S. Patent
Apr. 8, 1997
5,619,403
Sheet 22 of 22
FIG.24
Q1
Vds
PERIOD A
I
I
Vin --l-
(a)
I
I
I
I
--!-------,
I
I
-
I
I
- J_ - - I
I
I
I
I
I
PERIOD B
I
I
_I - -
------
I
'
I
I
I
I
I
I
------~--I
I
I
I
I
I
I
I
(b)
I
l(N3)
I
r- - -----------1
I
I
- - - - -1I
I
I
(c)
(d)
Vx
Vy
I
I
I
I- I
I
I
I
I
I
I
I
-------I
I
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I
---1------11
~
><3
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I
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I
;
5,619,403
1
2
MULTI-OUTPUTPOWER SUPPLY
APPARATUS
transistor) or the like, to generate a voltage in proportion to
the turns ratio at the secondary side.
BACKGROUND OF THE INVENTION
5
1. Field of the Invention
This invention relates to a power supply apparatus having
a plurality of outputs which is suitable as a power supply
apparatus for a copier or a printer.
10
2. Description of the Related Art
In a switching power supply apparatus having a plurality
of outputs (hereinafter termed a "multi-output" switching
power supply apparatus), in order to stabilize a specific
output, a PWM (pulse-width modulation) control circuit
determines the "on" period of a switching device of the 15
primary side by performing feedback of the output. Other
outputs are controlled by providing a control circuit for the
output of a winding of the secondary side, or are output
without performing control. For example, when the other
outputs have small electric power, the outputs can be easily 20
stabilized by performing a series control using three-terminal regulators or the like. However, when the other outputs
have large electric power, a large amount of loss is produced
by a series control. Hence, in general, a desired voltage
value is obtained by performing chopper control. A magnetic 25
amplifier may also be considered for controlling the other
outputs.
(a) However, when performing chopper control, if a DC
output is first produced and a chopper-type DC-to-DC 30
converter is provided in the following stage, the number of
components increases and the efficiency of the apparatus is
reduced. Also when directly chopping the output of a
secondary winding, a large amount of loss is produced due
to switching.
35
(b) In a magnetic amplifier, since a saturable reactor is
magnetized until a saturated region, a large amount of iron
loss is produced in a core material. In addition, since the
saturation flux density of a magnetic material generally has
a negative temperature coefficient, a very large core is 40
required in order to prevent the phenomenon that at a high
temperature and no load, the iron loss of the core increases
due to the temperature rise of the core, the temperature of the
core thereby rises, the saturation flux density of the core
thereby decreases, and therefore voltage control cannot be 45
performed. If the switching frequency is increased for the
purpose of providing a small switching power supply appa- ratus, a dead-angle effect (the phenomenon that an output
voltage decreases because the output is hindered for a first
predetermined time period of a pulse) caused by the uncon- 50
trollable magnetic flux of the saturable reactor and the
inductance of the winding increases compared with lowfrequency switching. In order to prevent such a phenomenon, it is necessary to reduce the number of turns of the
saturable reactor, causing a requirement for a greater core in 55
order to obtain the same saturation flux density. As a result,
the merit obtained by high-frequency switching is cancelled.
In general, accuracy in a magnetic material (for example, the
saturation flux density) is ±20% at most. Hence, a larger core
must be used in consideration of worst conditions.
60
Conventional voltage-resonance-type switching regulators have been widely used as devices for generating a high
voltage necessary for chargers of copiers, horizontal deflection of CRT' s, and the like. Most of these apparatuses are
configured such that power supply for a winding of the 65
primary side of a converter transformer is intermitted by
switching means, such as a transistor, an FET (field-effect
SUMMARY OF THE INVENTION
It is an object of the present invention to solve the
above-described problems.
It is another object of the present invention to provide a
multi-output control power supply apparatus which has a
simple configuration and high efficiency.
It is still another object of the present invention to provide
a switching regulator in which the maximum output voltage
does not depend on the power-supply voltage.
According to one aspect, the present invention which
achieves these objectives relates to a multi-output power
supply apparatus in which a switching device is provided in
series immediately after a stage of rectifying an output other
than the output of a main control winding, and the output is
controlled by turning on and off the switching device in
synchronization with a main control switch. Thus, the
switching loss can be minimized, and a control circuit can be
configured at low cost.
According to another aspect, the present invention which
achieves these objectives relates to a multi-output power
supply apparatus in which the low-voltage side of a winding
other than a main control winding is switched with a
frequency sufficiently lower than the switching frequency of
a main control output, and the switching is performed during
"off" periods of main switching. Since the output at the
low-voltage side is switched with this configuration, it is
possible to provide a switch driving circuit having a simple
configuration which provides a constant voltage not depending on the input voltage, and which causes a small amount
of loss. In addition, since switching is performed during
off-periods of main switching, the amount of switching loss
is reduced.
According to still another aspect, the present invention
which achieves these objectives relates to a multi-output
power supply apparatus in which a tap is provided at an
output choke coil of a winding other than a main control
winding (or a two-winding structure is adopted), and switching is performed between the tap and a common electrode.
According to this configuration, the amount of loss is
reduced, and the configuration of the circuitry is simplified.
According to still another aspect, the present invention
which achieves these objectives relates to a power supply
apparatus in which in order to deal with a large-power
pulsed load, switching means is provided in series with a
secondary winding, and the maximum value of the conductive angle of the switching means is provided with inputvoltage dependency. Thus, input-voltage dependency of the
maximum output power disappears. According to this configuration, it is possible to improve reliability because of
improvement in the power supply circuit and protective
characteristics of the load, and to reduce the size and the cost
of the apparatus from the viewpoint of thermal design.
More specifically, the multi-output control power supply
apparatus of the present invention has any of the following
configurations (1)-(5).
(1) A multi-output control power supply apparatus,
including a converter transformer including a primary winding and first and second secondary windings, first switching
means for intermitting a connection between the primary
winding and a power supply thereof, rectifying and smoothing means for rectifying and smoothing the output of the first
5,619,403
3
secondary winding and supplying the resultant output to a
first output terminal, PWM (pulse-width modulation) control means for performing a PWM control of the first
switching means in accordance with a voltage at the first
output terminal, rectifying means for rectifying the output of 5
the second secondary winding, second switching means for
intermitting the output of the rectifying means and supplying
the resultant output to a second output terminal, synchronism detection means for obtaining a signal synchronized
with a pulse generated by the PWM control means from the 10
output of the PWM control means, comparison means for
comparing a voltage at the second output terminal with a
reference value, and holding means for updating and holding
the output of the comparison means in accordance with the
output of the synchronism detection means, and for supplying the resultant output to the second switching means as a 15
control signal.
(2) A multi-output control power supply apparatus,
including a converter transformer including a primary winding and first and second secondary windings, first switching 20
means for intermitting a connection between the primary
winding and a power supply thereof, rectifying and smoothing means for rectifying and smoothing the output of the first
secondary winding and supplying the resultant output to a
first output terminal, PWM control means for performing
PWM control of the first switching means in accordance 25
with a voltage at the first output terminal, rectifying means
for rectifying the output of the second secondary winding
and supplying the resultant output to a second output terminal, second switching means for intermitting the lowvoltage side of the output of the second secondary winding, 30
synchronism detection means for obtaining a signal synchronized with a pulse generated by the PWMcontrol means
from the output of the PWM control means, comparison
means for comparing a voltage at the second output terminal 35
with a reference value, and holding means for updating and
holding the output of the comparison means in accordance
with the output of the synchronism detection means, and for
supplying the resultant output to the second switching means
as a control signal.
40
(3) A multi-output control power supply apparatus,
including a converter transformer including a primary winding and first and second secondary windings, first switching
means for intermitting a connection between the primary
winding and a power supply thereof, rectifying and smooth- 45
ing means for rectifying and smoothing the output of the first
secondary winding and supplying the resultant output to a
first output terminal, PWM control means for performing a
PWM control of the first switching means in accordance
with a voltage at the first output terminal, rectifying means 50
connected to one end of the second secondary winding, a
choke coil having a tap or two windings for supplying a
second output terminal with the output of the rectifying
means, second switching means for intermitting a connection between the tap or one end of the two windings and 55
another end of the second secondary winding, comparison
means for comparing a voltage at the second output terminal
with a reference value, and for supplying the second switching means with an output as a result of the comparison as a
control signal, and a flywheel diode connected to another 60
end of the two windings and another end of the second
secondary winding.
(4) A multi-output control power supply apparatus,
including a converter transformer including a primary winding and first and second secondary windings, first switching 65
means for intermitting a connection between the primary
winding and a power supply thereof, rectifying and smooth-
4
ing means for rectifying and smoothing the output of the first
secondary winding and supplying the resultant output to a
first output terminal, PWM control means for performing a
PWM control of the first switching means in accordance
with a voltage at the first output terminal, rectifying means
connected to one end of the second secondary winding, a
choke coil having two windings for supplying a second
output terminal with the output of the rectifying means,
second switching means for intermitting a connection
between a common connection point of the two-winding
choke coil and the rectifying means and another end of the
second secondary winding, a flywheel diode connected
between an end of the two windings opposite to the side
connected to the rectifying means and another end of the
second secondary winding, and comparison means for comparing a voltage at the second output terminal with a
reference value, and for supplying the second switching
means with an output as a result of the comparison as a
control signal.
(5) A multi-output power supply apparatus for switching
the primary side of a converter transformer and supplying an
output from an on-on winding of the secondary side of the
converter transformer, including switching means connected
in series with the on-on winding, power-supply-voltage
detection means for detecting the voltage of a power supply
for the converter transformer, and control means for performing an on-off control of the switching means by outputting a control signal whose maximum duty cycle changes
in accordance with the output of the power-supply-voltage
detection means.
According to the above-described configuration (1), the
second switching means operates in synchronization with
the first switching means, and is turned on and off with 0
voltage.
According to the above-described configuration (2), the
second switching means turns on and off the low-voltage
side of the second output in synchronization with the first
switching means, and is perfectly turned on and off with 0
voltage.
According to the above-described configurations (3) and
(4), the second switching means operates in asynchronously
with the first switching means and without an auxiliary
power supply.
According to the above-described configuration (5), the
switching means is subjected to on-off control by the control
signal whose maximum duty cycle changes in accordance
with the voltage of a power supply of the converter transformer.
These and other objects, advantages and features of the
present invention will become more apparent from the
following detailed description of the preferred embodiments
taken in conjunction with the accompanying drawings.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a diagram illustrating the circuitry of an apparatus according to a first embodiment of the present invention;
FIG. 2 illustrates timing charts of the first embodiment;
FIG. 3 is a diagram illustrating the circuitry of a principal
portion of an apparatus according to a second embodiment
of the present invention;
FIG. 4 is a diagram illustrating the circuitry of a principal
portion of an apparatus according to a third embodiment of
the present invention;
5,619,403
5
FIG. 5 is a diagram illustrating the circuitry of a principal
portion of an apparatus according to a fourth embodiment of
the present invention;
FIG. 6 is a diagram illustrating the circuitry of an apparatus according to a fifth embodiment of the present invention;
FIG. 7 illustrates timing charts of the fifth embodiment;
FIG. 8 is a diagram illustrating the circuitry of an apparatus according to a sixth embodiment of the present invention;
FIG. 9 is a diagram illustrating the circuitry of an apparatus according to a seventh embodiment of the present
invention;
FIG. 10 is a diagram illustrating the circuitry of an
apparatus according to an eighth embodiment of the present
invention;
FIG. 11 is a schematic diagram illustrating a state in
which transistor Q22 shown in FIG. 10 is turned on in the
eighth embodiment;
FIG. 12 is a diagram illustrating a principle in which the
eighth embodiment is generalized;
FIG. 13 illustrates timing charts of the circuitry shown in
FIG. 12;
FIG. 14 is a diagram illustrating the principle of an
eleventh embodiment of the present invention;
FIG. 15 is a diagram illustrating the principle of a twelfth
embodiment of the present invention;
FIG. 16 is a diagram illustrating the principle of a
modification of the twelfth embodiment;
FIG. 17 is a diagram illustrating a modification of the
eleventh and the twelfth embodiments;
FIG. 18 illustrates diagrams illustrating a conventional
approach;
FIG. 19 is a diagram illustrating the circuitry of an
apparatus according to an eighth embodiment of the present
invention;
FIG. 20 is a diagram illustrating the details of the circuitry
shown in FIG. 19;
FIG. 21 is a diagram illustrating the details of the circuitry
of an apparatus according to a ninth embodiment of the
present invention;
FIG. 22 is a diagram illustrating the details of the circuitry
of an apparatus according to a tenth embodiment of the
present invention;
FIG. 23 is a diagram illustrating the circuitry of an
embodiment; and
FIG. 24 illustrates waveforms at respective portions of
FIG. 23.
6
capacitor Cl is connected in parallel between the drain and
the source ofFETTrl, in order to efficiently transmit electric
power to the secondary side of transformer Tl in resonance
with the inductance of winding Nl. A pulse signal for
5 driving FET Trl is generated by PWM control circuit 1, and
drives the gate of FET Trl via driving circuit 2. In the
present embodiment, since PWM control circuit 1 is provided at the secondary side of transformer Tl, driving circuit
2 includes insulation means, such as a transformer, a pho10 tocoupler or the like. An output from winding N2 of the
secondary side of transformer Tl is rectified and smoothed
by rectifier diode D3 and capacitor C3 to be output as output
V2 and also input to PWM control circuit 1 so as to
determine the pulse width. Rectifier diode D3 of winding N2
15 is connected so as to be turned off and on when FET Trl is
turned on and off, respectively. That is, rectifier diode D3
and capacitor C3 constitute a flyback converter which drives
FET Trl so that the output of winding N2 has a predetermined value.
20
A voltage proportional to the turns ratio of N3 to Nl, the
input AC line voltage, and the duty ratio of PWM is
generated in winding N3 of the secondary side of transformer Tl. Winding N3 is connected to that rectifier diode
Dl is turned on when FET Trl is turned on. The output of
25 winding N3 is rectified by rectifier diode Dl and is supplied
to the emitter of switching transistor Tr2. Another end of
winding N3 is grounded. The collector of transistor Tr2 is
connected to the cathode of flywheel diode D2 and one end
of choke coil Ll. Another end of choke coil Ll is connected
30 to one end of capacitor C2, and is also output to the outside
as output Vl. This output Vl is divided by resistors R3 and
R4, and the divided output is input to the minus(-) terminal
of comparator Ql. A voltage obtained by dividing a known
voltage Vee by resistors RS and R6 is input to the plus(+)
35 terminal of comparator Ql. The output of comparator Ql is
input to D flip-flop (hereinafter termed a D-F/F) Q2. The
output of D-F/F Q2 turns on and off transistor Tr2 via
transistor Tr3. A PWM pulse signal from PWM control
circuit 1 is input to the clock terminal of D-F/F Q2 via
40 synchronism detection circuit 30 The anode of diode D2,
another end of capacitor C2, the emitter of transistor Tr3 and
the like are grounded.
In the present embodiment, power is supplied to the
respective circuits at the secondary side from another aux45 iliary power supply (not shown).
Next, the operation of the present embodiment will be
described. FIG. 2 illustrates timing charts of the first
embodiment and illustrates waveforms at points (A)-(F)
shown in FIG. 1. Chart (A) illustrates the output of PWM
50 control circuit 1, which operates so as to increase and
decrease the "on" period (corresponding to level "L") of
FETTrl when output V2 at the side of winding N2 is smaller
and greater than a predetermined value, respectively. While
FETTrl is turned on, a minus(-) voltage is generated at the
DETAILED DESCRIPTION OF THE PREFERRED
55 ungrounded end of winding N2, and rectifier diode D3 is
EMBODIMENTS
turned off. Hence, energy is not dissipated through winding
First Embodiment
N2, and electromagnetic energy is stored in the primary
FIG. 1 is a diagram illustrating the circuitry of a multiinductance. When FET Trl has been turned off, a flyback
output control power supply apparatus according to a first
pulse is generated in winding Nl, and the voltage waveform
embodiment of the present invention. In FIG. 1, a plus(+) 60 at winding N2 is inverted to turn on rectifier diode D3. Thus,
output terminal after rectifying and smoothing an AC line
the energy stored in the primary inductance is discharged to
input is connected to one end of winding Nl of the primary
the secondary side. The width of the flyback pulse is
side of transformer Tl. Another end of winding Nl is
determined by the primary inductance, resonance capacitor
connected to the drain of switching transistor (an FET
Cl and the capacity of the winding. In order to prevent a
(field-effect transistor) in the present embodiment) Trl, and 65 switching loss caused by zero-voltage switching in which
the source of FET Trl is connected to a minus (-) output
FET Trl is turned on when the voltage waveform assumes
terminal after the rectification and smoothing. Resonance
a zero level, PWM control circuit 1 operates so as to provide
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7
8
a constant width of the flyback pulse during "off' periods of
FET Trl. That is, a duty controlling operation, in which the
pulse width during "on" periods is changed while providing
a constant "off' period, is performed.
Chart (B) in FIG. 2 illustrates the waveform of the drain
voltage of FET Trl. Chart (C) illustrates the waveform of
winding N3. If rectifier diode D1 is turned on while transistor Tr2 is turned on, energy is supplied to the load via
choke coil Ll, and capacitor C2 is charged to excite choke
coil Ll. If rectifier diode D1 is then turned off, flywheel
diode D2 is turned on, and the exciting energy stored in
choke coil L1 and the charging energy of capacitor C2 are
supplied to the load. A normal forward conversion operation,
in which the above-described operation is repeated in accordance with the on/off states of FET Trl, is performed.
While transistor Tr2 is turned off, energy is not supplied
from transformer Tl irrespective of the voltage waveform
generated in winding N3. Hence, the energy stored in choke
coil Ll and capacitor C2 is continuously supplied to the
load. Output voltage Vl at the side of winding N3 is divided
by resistors R3 and R4, and the divided voltage is connected
to the minus (-) input terminal of comparator Ql. Comparator Ql compares the divided voltage of the voltage Vl
with a reference voltage obtained by dividing the known
voltage Vee by resistors RS and RS and supplied to the plus
(+) input terminal of comparator Ql. The output terminal of
comparator Ql is connected to the D input terminal of D-F/F
Q2, the Q output terminal of D-F/F Q2 is connected to the
base of transistor Tr3, and the collector of transistor Tr3 is
connected to the base of transistor Tr2. Transistor Tr2 is
turned on and off by the output of D-F/F Q2. The output of
PWM control circuit 1 is input to the clock terminal ofD-F/F
Q2 via synchronism detection circuit 3.
For example, a case, in which a clock signal is provided
by detecting the rising edge of a pulse shown in Chart (A),
will be described. As described above, FET Trl is turned on
while the output of PWM control circuit 1 assumes level
"L", and a plus (+) voltage is generated in winding N3. If the
detected value of voltage Vl is smaller than a predetermined
value, comparator Ql outputs level "H". This result of the
comparison is latched by D-F/F Q2 by the rising edge shown
in Chart (A) (corresponding to portion (I) in FIG. 2),
transistor Tr2 is turned on by this latch. At that time,
transistor Tr2 is already turned off, and winding N3 generates a minus(-) voltage. Hence, rectifier diode D1 is turned
off, and current does not flow through transistor Tr2. That is,
basically, the transition of transistor Tr2 is effected when
voltage is not applied to the emitter of transistor Tr2. If
transistor Tr2 is again turned on and a plus (+) voltage is
generated in winding N3, current flows through transistor
Tr2. Thus, current is supplied to the load, and choke coil Ll
is excited to charge capacitor C2. If FET Trl is then turned
off, the voltage waveform of winding N3 is inverted, and
rectifier diode D1 is turned off. As a result, current supply
via transistorTr2 is interrupted to turn on flywheel diode D2,
whereby the exciting energy stored in choke coil Ll and the
charging energy of capacitor C2 arc supplied to the load. The
above-described forward conversion operation is repeated
while the detected value of output voltage Vl at the side of
winding N3 is smaller than the predetermined value.
When the detected value of output voltage Vl has reached
the predetermined value, the output of comparator Ql is
inverted. As a result, the output is delayed until the output of
PWM control circuit 1 rises, and is latched in DF/F Q2
(corresponding to portion [II] shown in FIG. 2). Transistor
Tr2 is turned off by this result of the latch. At that time, FET
Trl is already turned off, and winding N3 turns off transistor
Tr2 while generating a minus(-) voltage. That is, since the
transition of transistor Tr2 occurs when no voltage is applied
to its emitter, no switching loss is produced. As a result, a
very efficient regulator can be configured. When transistor
Tr2 has been turned off, flywheel diode D2 is turned on as
in the above-described forward conversion operation.
Hence, the exciting energy stored in choke coil Ll and the
charging energy of capacitor C2 are supplied to the load.
When all the exciting energy stored in choke coil Ll has
been discharged, the voltage at point (F) assumes the same
potential as output voltage Vl to turn off flywheel diode D2
(corresponding to portion [III] shown in FIG. 2), and only
the charging energy of capacitor C2 is discharged to the
load, causing a gradual decrease in the output voltage. When
the value of the output voltage becomes smaller than the set
value of comparator Ql, the output of comparator Ql is
inverted to again turn on transistor Tr2, and the abovedescribed operation is repeated.
FIG. 18 illustrates a conventional approach. In this
approach, transistor Tr2 is instantaneously switched by the
result of comparison. Hence, as shown in the timing charts
of FIG. 18, a switching loss is produced in switching
transistor Tr2 during time periods Z and Z' when switching
transistor Tr2 is turned on and off. Particularly, a largecurrent switching transistor tends to have a slow switching
time, causing a large amount of loss. To the contrary, as
described above, according to the present embodiment, the
efficiency of the apparatus is improved with a simple configuration.
Although in the present embodiment, a description has
been provided using a bipolar transistor as switching transistor Tr2, any other device may be used provided that it can
perform a switching operation. For example, an FET may be
used.
Second Embodiment
FIG. 3 illustrates the circuitry of a principal portion of an
apparatus according to a second embodiment of the present
invention. In the first embodiment, a clock signal for D-F/F
Q2 is obtained by performing synchronism detection from
the output of PWM control circuit 1. In the present embodiment, however, as shown in FIG. 3, delay circuit 4 is
provided at the following stage of synchronism detection
circuit 3, and a clock signal is supplied to D-F/F Q2 via this
circuit.
As described in the first embodiment, the output of PWM
control circuit 1 drives the transistor at the primary side via
driving circuit 2 as well as the transformer, causing the
generation of an output waveform in the winding at the
secondary side. Hence, a considerable amount of delay is in
some cases present between the output of PWM control
circuit 1 and the output waveform of winding N2 of the
secondary side. Moreover, if the output of PWM control
circuit 1 is directly made to be a clock signal for D-F/F Q2
as in the first embodiment, there is the possibility that
switching transistor Tr2 is switched while a plus (+) voltage
is generated in winding N3, depending on the switching time
of switching transistor Tr2. By providing an appropriate
amount of delay to the output of PWM control circuit 1 by
delay circuit 4 and making the resultant output a clock signal
for D-F/F Q2, a configuration in which a switching loss is
not produced can be provided even in the above-described
case.
Third Embodiment
FIG. 4 is a diagram illustrating the circuitry of a principal
portion of an apparatus according to a third embodiment of
the present invention. In the present embodiment, resistor
Rx detects the output current. When the voltage drop in
5
10
15
20
25
30
35
40
45
50
55
60
65
5,619,403
9
10
resistor Rx exceeds the value Vbe of transistor Tr4, transisrectifier diode D3 and capacitor C3 constitute a flyback
tor Tr4 is turned on to forcedly make the clear terminal of
converter which drives transistor Qll so that the output of
D-F/F Q2 level "L". As a result, transistor Tr2 is turned on
winding N2 has a predetermined value.
to interrupt energy supply from winding N3 to the load.
A voltage proportional to the turns ratio of N3 to Nl, the
Thus, overcurrent protection can be realized. An idle period 5 input AC line voltage, and the duty ratio of PWM is
corresponding to the time constant determined by resistor
generated at winding N3 of the secondary side of transR7 and capacitor C3 is set.
former Tl. This winding N3 is connected so that rectifier
Fourth Embodiment
diode D1 is turned on when transistor Qll is turned on. The
FIG. 5 is a diagram illustrating the circuitry of a principal
voltage of winding N3 is rectified b7 rectifier diode D1. The
portion of an apparatus according to a fourth embodiment of 10 cathode of diode DI is connected to the cathode of flywheel
the present invention. As shown in FIG. 5, digital circuitry
diode D2 and one end of choke coil Ll. Another end of
including CPU 6, ROM 7, RAM 8, a timer and the like,
choke coil Ll is connected to one end of capacitor C2, and
analog circuitry including an AID converter and the like, and
is also output to the outside as output Vl. This output Vl is
the above-described circuits 1, 3, 4, Ql, Q2 and the like are
divided by resistors R3 and R4, and the divided output is
integrated on one chip. It is thereby possible to perform 15 input to the plus (+) terminal of comparator Ql. A known
power-supply control suitable for each state while performvoltage Vref is input to the minus (-) terminal of comparator
ing sequential control of a copier, a printer or the like. For
Ql. The output of comparator Ql is input to D-F/F Q2. The
example, delay circuit 4 may be configured by a programoutput of D-F/F Q2 turns on and off transistor (to be
mable counter. Thus, even if the delay in the generation of
described later) via transistors Ql4 and Ql3. A PWM pulse
a voltage waveform in the emitter of transistor Tr2 after 20 signal from PWM control circuit 1 is input to the clock
PWM control circuit 1 has generated a pulse in a loaded
terminal of D-F/F Q2 via synchronism detection circuit 3.
condition changes, since CPU 6 has information relating to
Another end of winding N3 is connected to the collector
the loaded condition, the loss in transistor Tr2 can be
of transistor Q12. The emitter of transistor Q12, the anode
minimized by setting an optimum value in the programof diode D2, another end of capacitor C2, and the like are
mable counter. In addition, by switching the comparison 25 grounded. The emitter of transistor Q13, and the like are
(reference) voltage of comparator Ql between a steady state
connected to a minus power supply -Vss. Power is supplied
and a quiescent state, low power consumption can be
to the circuits 1, 2, 3, Ql, Q2 and the like of the secondary
realized. Furthermore, CPU 6 may deal with overcurrent
side from another auxiliary power supply (not shown).
protection via set/reset register 9, and reset register 9. Thus,
Next, the operation of the present embodiment will be
an idle period can be arbitrarily set by CPU 6. As described 30 described. FIG. 7 illustrates timing charts of the present
above, by integrating various circuit components on one
embodiment. IN FIG. 7, Chart (a) illustrates the output of
chip, it is possible to perform flexible and intelligenter
PWMcontrol circuit 1, which operates so as to increase and
power-supply control.
decrease the "on" period (corresponding to level "L") of
Fifth Embodiment
transistor Qll when output V2 at the side of winding N2 is
In the above-described first through fourth embodiments, 35 smaller and greater than a predetermined value, respectively.
switching loss is reduced by turning on and off switching
While transistor Qll is turned on, a minus (-) voltage is
transistor Tr2 with zero voltage. However, since the base
generated in winding N2, and rectifier diode D3 is turned off.
current of switching transistor Tr2 is obtained from the
Hence, energy is not dissipated through winding N2, and
output of winding N3 whose output is chopped, the turningelectromagnetic energy is stored in the primary inductance.
on of the switching transistor with zero voltage cannot be 40 When transistor Qll has been turned off, a flyback pulse is
performed from the viewpoint of principle. The following
generated in winding Nl, and the voltage waveform in
fifth through seventh embodiments of the present invention
winding N2 is inverted to turn on rectifier diode D3. Thus,
intend to solve this problem.
the energy stored in the primary inductance is discharged to
FIG. 6 is a diagram illustrating the circuitry of a "multithe secondary side. The width of the flyback pulse is
output control power supply apparatus" according to a fifth 45 determined by the primary inductance, resonance capacitor
embodiment of the present invention.
Cl and the capacity of the winding. In order to prevent a
A plus (+) output after rectifying and smoothing an AC
switching loss caused by zero-voltage switching in which
line input is supplied to one end of winding Nl of the
transistor Qll is turned on when the voltage waveform
primary side of transformer Tl. Another end of winding Nl
assumes a zero level, PWM control circuit 1 operates so as
is connected to the collector of switching transistor Qll, and 50 to provide a constant width of the flyback pulse during "off"
the emitter of transistor Qll is connected to a minus (-)
periods of transistor Qll. That is, an operation, in which the
output terminal after the rectification and smoothing. Resopulse width during "on" periods is changed while providing
nance capacitor Cl is provided between the collector and the
a constant "off'' period, is performed.
emitter of transistor Q11 in order to efficient!y transmit
Chart (b) in FIG. 7 illustrates the waveform of the
electric power to the secondary side of transformer Tl in 55 collector of transistor Qll. Chart (c) illustrates the waveform of winding N3. If rectifier diode D1 is turned on while
resonance with the inductance of winding Nl. A pulse signal
transistor Ql2 is turned on, energy is supplied to the load via
for driving transistor Qll is generated by PWM control
choke coil Ll, and capacitor C2 is charged to exite choke
circuit 1, and drives the base of transistor Qll via driving
coil Ll. If rectifier diode D1 is turned off, flywheel diode D2
circuit 2. In the present embodiment, since PWM control
circuit 1 is provided at the secondary side of transformer Tl, 60 is turned on; and the exciting energy stored in choke coil L1
and the charging energy of capacitor C2 are supplied to the
driving circuit 2 includes insulation means. The output of
winding N2 of the secondary side of transformer Tl is
load. A normal forward conversion operation, in which the
rectified and smoothed by diode D3 and capacitor C3 to be
above-described operation is repeated in accordance with
output as output V2, and is also input to PWM control circuit
the on/off states of transistor Qll, is performed. While
1 so as to determine the pulse width. Rectifier diode D3 of 65 transistor Q12 is turned off, energy is not supplied from
winding N2 is connected so as to be turned off and on when
transformer Tl irrespective of the voltage waveform generated in winding N3. Hence, the energy stored in choke coil
transistor Qll is turned on and off, respectively. That is,
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11
12
Ql, the output of comparator Ql is inverted to again turn on
Ll and capacitor C2 is continuously supplied to the load.
transistor Q12, and the above-described operation is
Output voltage Vl is divided by resistors R3 and R4, and the
divided voltage is supplied to the plus (+) input terminal of
repeated.
comparator Ql. Comparator Ql compares the above-deIn the present embodiment, the base current of switching
scribed voltage with a reference voltage Vref supplied to the 5 transistor Q12 is obtained from auxiliary power supply
minus (-) terminal of comparator Ql. The output of com-V ss, and perfect turning-on of the switching transistor with
parator QI is supplied to the D input terminal of D-F/F Q2,
zero voltage can be realized. In addition, since the switching
the output of D-F/F Q2 is supplied to the base of transistor
transistor is provided at the low-voltage side, the loss in a
Q14, the emitter of transistor Q14 is connected to a plus
base-current-limiting resistor has a small value.
power supply, the collector of transistor Ql4 is connected to 10
Although in the present embodiment, a description has
the base of transistor Q13, and the collector of transistor Q13
been provided using a bipolar transistor as switching tranis connected to the base of transistor Q12. Transistor Q12 is
sistor Q12, any other device may be used provided that it can
turned on and off by the output of D-F/FQ2. The output of
perform a switching operation. For example, an FET may be
PWM control circuit 1 is input to the clock terminal of D-F/F
used.
Q2 via synchronism detection circuit 3.
15 Sixth Embodiment
For example, a case, in which a clock signal is provided
FIG. 8 illustrates the circuitry of an apparatus according
by detecting the rising edge of a pulse shown in Chart (a),
to a sixth embodiment of the present invention. In the fifth
will be described. As described above, transistor QU is
embodiment, a PNP transistor is used as the switching
turned on while the output of PWMcontrol circuit 1 assumes
device Q12. However, a PNP transistor is more expensive
level "L", and a plus(+) voltage is generated in winding N3. 20 than an NPN transistor, and is less available. Hence, in the
If the detected value of output voltage Vl is smaller than a
present embodiment, the same function as in the fifth
predetermined value, comparator Ql outputs level "L". This
embodiment is obtained by using an NPN transistor and a
result of the comparison is latched by D-F/F Q2 by the rising
photocoupler PHl.
edge shown in Chart (a) (corresponding to portion (I) in FIG.
Seventh Embodiment
7). Switching transistor Q12 is turned on by this latch. At 25
FIG. 9 illustrates the circuitry of an apparatus according
that time, transistor QU is already turned off, and winding
to a seventh embodiment of the present invention. While an
N3 generates a minus (-) voltage. Hence, rectifier diode D1
external auxiliary power supply is required in the fifth
is turned off, and current does not flow through transistor
embodiment, in the present embodiment, by adding diode
Q12. That is, basically, the transition of transistor Q12 is
D4, a certain amount of output voltage VI can be output even
effected when voltage is not applied between the emitter and 30 if transistor Q12 is turned off at the start point. Hence, this
the collector of transistor Q12. If transistor QU is again
voltage Vl can be used in place of the auxiliary power
turned on and a plus(+) voltage is generated in winding N3,
supply, and therefore the production cost can be reduced.
current flows through transistor Ql2, as shown in Chart (g).
In the above mentioned first through seventh embodiThus, current is supplied to the load, and choke coil Ll is
ments, when a power supply needs to provide somewhat
excited to charge capacitor C2. If transistor QU is then 35 large electrical power to a load, such as a motor, from a
turned off, the voltage waveform of winding N3 is inverted,
forward type winding N3 (in FIG. 23), a resonance voltage
and rectifier diode D1 is turned off. As a result, current
wave does not zero-cross in the rising-down duration (durasupply via transistor Ql2 is interrupted to turn on flywheel
tion A in FIG. 24), which is a shortage of the first through
diode D2, whereby the exciting energy stored in choke coil
eighth embodiments. To overcome such a shortage, the
Ll and the charging energy of capacitor C2 are supplied to 40 structure shown in FIG. 23 can be considered.
the load. The above-described forward conversion operation
First through seventh embodiments are for power supplies
is repeated while the detected value of output voltage Vl at
having loads necessitating an intermediate amount of power,
the side of winding N3 is smaller than the predetermined
but the following embodiments are for those having loads
value.
necessitating a relatively large amount of electric power.
When the detected value of output voltage Vl has reached 45
In this voltage-resonance-type switching regulator of FIG.
the predetermined value, the output of comparator Ql is
23, switching device Q4 is provided at the secondary side in
inverted. As a result, the output is delayed until the output of
order to deal with a large-power pulsed load, such as a motor
PWM control circuit 1 rises, and is latched in D-F/F Q2
or the like.
(corresponding to portion [II] shown in FIG. 7). Switching
This switching device Q4 is pulse-width controlled in the
transistor Q 12 is turned off by this result of the latch. At that 50 same frequency and in synchronized with the primary
time, transistor QU is already turned off, and winding N3
switching device Ql. Further, turning on of the switching
turns off transistor Q12 while generating a minus (-) voltdevice Q4 is inhibited during the period while the switching
age. That is, since the transition of transistor Q12 occurs
device Ql generates a flyback wave.
when no voltage is applied between its emitter and collector,
The configuration of this voltage-resonance-type switchno switching loss is produced. As a result, a very efficient 55 ing regulator will now be described with reference to FIG.
regulator can be configured. When transistor Q12 has been
23. In FIG. 23, there is shown converter transformer Tl.
turned off, flywheel diode D2 is turned on as in the aboveVoltage Vin is applied to one end of winding Nl of the
described forward conversion operation. Hence, the exciting
primary side of converter transformer Tl. This voltage
energy stored in choke coil L1 and the charging energy of
"Vin" serves as a power-supply voltage for converter transcapacitor C2 are supplied to the load. When all the exciting 60 former Tl as well as an input voltage to converter transenergy stored in choke coil Ll has been discharged, the
former Tl when switching device Ql is turned on. However,
voltage at point (X) assumes the same potential as the output
the expression "input voltage" will be confused with the
voltage to turn off flywheel diode D2 (corresponding to
input voltage to converter transformer Tl when switching
portion [III] shown in FIG. 7), and only the charging energy
device Ql is turned off, and this voltage Vin also serves as
of capacitor C2 is discharged to the load, causing a gradual 65 the power-supply voltage for the switching regulator. Hence,
decrease in the output voltage. When the value of the output
this voltage "Vin" will be hereinafter termed a "powervoltage becomes smaller than the set value of comparator
supply voltage". Another end of primary winding Nl is
5,619,403
13
14
connected to the drain of PET Ql, serving as a switching
device. The source of this switching device FET Ql is
grounded. By switching device FET Ql, voltages proportional to the turns ratios are generated at secondary windings
N2 and N3. One end of secondary winding N3 is connected
to the anode of rectifier diode Dl, and the cathode of rectifier
diode Dl is connected to the cathode of flywheel diode D2
and one end of choke coil Ll via switching device Q4
controlled by PWM control circuit 4. Another end of secondary winding N3 is connected to a COM potential.
Another end of choke coil Ll is connected to one end of
output capacitor C2. Another ends of flywheel diode D2 and
output capacitor C2 are connected to the COM potential.
Winding N2 is the main winding at the secondary side. In
order to make the voltage after rectifying and smoothing the
output of winding N2 constant, the duty ratio of switching
of switching device Ql is changed using PWM control
circuit 1. According to the above-described configuration, a
large-capacity voltage-resonance-type switching regulator
of this type is realized. FIG. 24 illustrates waveforms at
respective points of this switching regulator. The details of
FIG. 24 will be described later.
The operation of the circuitry will be described with
reference to FIGS. 23 and 24. For the convenience of
description, the operation when switching device Q4 is not
provided will be first described.
Wben switching device Q4 is absent, resonance voltage
Vdc (the drain-source voltage of switching device Ql) does
not become zero-crossed as the load at the side of secondary
winding N3 is increased, and therefore electric power cannot
be transmitted. This is because diode Dl at the forward side
of the on-on-side output is turned on while resonance
voltage Vds is equal to or less than power-supply voltage
Vin. The following two periods are present.
(I) A period (period A shown in FIG. 24 in which
switching device Ql is turned off, resonance voltage
Vds<power-supply voltage Vin, and the resonance current
flows from capacitor Cl to power supply Vin.
During this period, resonance current I(RES) flows from
capacitor Cl to power supply Vin. On the other hand, load
current Ip(on/on) in winding N3 at the on-on side tends to
flow from power supply Vin to capacitor Cl with a value
Iox(Ns/Np) as seen from the primary side. Hence, the
resonance current (in the direction of flowing from capacitor
Cl to power supply Vin) apparently decreases, and the
voltage decreases less steeply, causing difficulty in zero
crossing of the voltage.
(2) A period (period B shown in FIG. 24 in which
switching device Ql is turned off, resonance voltage
Vdc<power-supply voltage Vin, and the resonance current
flows from power supply Vin to capacitor Cl.
During this period, both resonance current I(RES) and
load current Ip(on/on) in winding N3 at the on-on side tend
to flow to capacitor Cl and interfere with each other, and the
rising slope of Vds becomes steeper.
Due to the above-described periods (1) and (2), resonance
voltage Vds leaves a sinusoidal wave as the load current is
supplied from winding N3 at the on-on side, and finally zero
crossing will not occur.
In order to overcome this problem, the following
approaches (a) and (b) can be considered.
(a) Current Ip(on/on) in the on-on-side winding is relatively reduced by increasing resonance current I(RES).
More specifically,resonance capacitor Cl is increased, or the
inductance of converter transformer Tl is reduced. In this
case, however, the resonance frequency decreases, and the
exciting current for converter transformer Tl increases.
Thus, burden for switching device Ql and the like increases,
and converter transformer Tl tends to reach magnetic saturation, causing an increase in the size of converter transformer Tl. Hence, this is not an optimum approach.
(b) Current Ip(on/on) in the on-on-side winding is interrupted during at least one of period A and period B.
The circuitry of FIG. 23 adopts the above-described
approach (b). That is, current Ip(on/on) in the on-on-side
winding is interrupted during period A using switching
device Q4.
Next, a description will be provided of the operation when
switching device Q4 is provided with reference to FIG. 24.
In FIG. 24, Vx represents the voltage in on-on winding N3,
and a voltage substantially having the shape of an isosceles
trapezoid is produced at the positive side. If the "on" period
of switching device Q4 is appropriately controlled by PWM
control circuit 4, output voltage Vy of switching device Q4
has a waveform in which the voltage is absent in Y region,
as shown in FIG. 24, and current I(N3) in on-on winding N3,
that is, the current flowing through rectifier diode Dl,
becomes O during period A. Hence, the above-described
interference between Ip(on/on) in the on-on winding and
resonance current I(RES) during period A will not occur.
Thus, the waveform of Vds approaches a sinusoidal wave
(strictly speaking, it is also necessary to interrupt the current
during period B), and a zero-crossing condition can be
secured even if a load current several times greater than the
current in the conventional approach is supplied. That is, a
large-capacity switching regulator can be realized.
In the above-described voltage-resonance-type switching
regulator, a triangular wave is formed in PWM control
circuit 4 based a synchronizing signal from synchronism
detection circuit 3, a PWM signal is formed by comparing
the triangular wave with the output of the error amplifier by
the comparator.
Accordingly, the maximum duty ratio of the PWM signal
is constant irrespective of power-supply voltage Vin. Thus,
the maximum value of output voltage Vl at the side of
secondary winding N3 increases and decreases as powersupply voltage Vin increases and decreases, respectively. In
order to secure output voltage Vl, the maximum duty ratio
of the PWM signal is determined in accordance with the
minimum value of power-supply voltage Vin. Hence, when
power-supply voltage Vin has the maximum value, the
maximum value of output voltage Vl becomes too large. As
a result, the power supply, the load, the switching device and
the like of the apparatus may in some cases be damaged
because of the too large power. This is a problem in a
switching regulator, since a switching regulator is generally
designed so as to deal with a power supply having a wide
voltage range.
A description will now be provided of an embodiment of
the present invention in which the above-described problem
is solved.
Eighth Embodiment
FIG. 19 is a digram illustrating the circuitry of a "voltageresonance-type switching regulator" according to an eighth
embodiment of the present invention. In FIG. 19, there is
shown a converter transformer Tl. Power-supply voltage
Vin is supplied to one end of primary winding Nl of
converter transformer Tl. Another end of primary winding
Nl is connected to the drain of PET Ql which serves as a
switching device. The source of switching device PET Ql is
grounded. By switching device FET Ql, a desired voltage is
generated at secondary windings N2 and N3 in proportion to
respective turns ratio. One end of secondary winding N3 is
connected to the anode of rectifier diode Dl, and another end
5
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40
45
50
55
60
65
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of winding N3 is connected to a COM potential. The cathode
of rectifier diode Dl is connected to the cathode of flywheel
diode D2 and one end of choke coil L1 via switching device
Q4 driven by PWM control circuit 4 and pulse-width
limitation circuit 7. Another end of choke coil Ll is connected to one end of output capacitor C2. Another ends of
flywheel diode D2 and output capacitor C2 are connected to
the COM potential. Pulse-width limitation circuit 7 limits
the maximum duty ratio of switching device Q4 in accordance with power-supply voltage Vin detected by powersupply-voltage detection circuit 6. PWM control circuit 4
performs a PWM control in synchronization with driving
circuit 2 through synchronism detection circuit 3.
Secondary winding N2 is the main winding at the secondary side. In order to make the voltage after rectifying and
smoothing the output of winding N2 constant, the duty ratio
of switching of switching device Ql is changed using PWM
control circuit 1.
As described above, the circuitry of the present embodiment differs from the circuitry of FIG. 23 in that powersupply-voltage detection circuit 6 and pulse-width limitation
circuit 7 are provided. A portion differed from the circuitry
of FIG. 23 will be described with reference to the detailed
circuit diagram of FIG. 20. As shown in FIG. 20, a synchronizing signal is obtained from synchronism detection
circuit 3, a triangular wave is formed from the obtained
signal, the formed triangular wave is compared with the
output of error amplifier AMPS by comparator COMP9, and
the PWM control of switching device Q4 is performed. In
general, an approach in which the maximum duty cycle of
comparator COMP9 is determined by resistors RS and R6 is
adopted. In this approach, however, since the maximum duty
cycle becomes constant, the maximum value of output
voltage Vl increases and decreases as power-supply voltage
Vin increases and decreases, respectively. If the values of
resistors RS and R6 are determined in accordance with the
minimum value of power-supply voltage Vin in order to
secure output voltage Vl, the maximum value of output
voltage Vl becomes too large when power-supply voltage
Vin has the maximum value. It is clear that this is not
preferable from the viewpoint of protecting the power
supply, the load and the switching device of the switching
regulator.
In the present embodiment, power-supply voltage Vin is
detected by power-supply-voltage detection circuit 6, and
the maximum duty cycle of switching device Q4 is arranged
to have dependency on power-supply voltage Vin in accordance with the detected voltage Vin, so that the maximum
value of output voltage Vl is made to be constant irrespective of changes in power-supply voltage Vin. That is, in the
circuitry of FIG. 20, power-supply voltage Vin is detected
using devices N4, D4, C4 and RS, and the detected voltage
is supplied to the output side of error amplifier AMPS via
resistor R7, so that the voltage at the minus (-) input
terminal of comparator COMP9 increases and the duty cycle
of switching device Q4 decreases as power-supply voltage
Vin increases. Thus, the maximum duty ratio has dependency on power-supply voltage Vin, so that the maximum
value of output voltage Vl is constant irrespective of
changes in power-supply voltage Vin.
As described above, in the present embodiment, since the
maximum value of output voltage Vl is constant irrespective of changes in power-supply voltage Vin for converter
transformer Tl, an excessive burden is not applied on the
power supply, the load, the switching device and the like of
the switching regulator.
Furthermore, since the dependency of the maximum
output power on the power-supply voltage disappears, the
size and the cost of a switching regulator can be reduced
from the viewpoint of thermal design.
Ninth Embodiment
FIG. 21 is a diagram illustrating the details of the circuitry
of an apparatus according to a ninth embodiment of the
present invention. As shown in FIG. 21, in the present
embodiment, the amplitude of a triangular voltage is
changed by transistor QS controlled by the output of powersupply-voltage detection circuit 6 to provide the maximum
duty cycle of switching device Q4 with dependency on the
power-supply voltage. Thus, the maximum value of output
voltage Vl is arranged to be constant irrespective of changes
in power-supply voltage Vin. As described above, also in the
present embodiment, the same effects as in the first embodiment can be obtained.
Tenth Embodiment
FIG. 22 is a diagram illustrating the circuitry of an
apparatus according to a tenth embodiment of the present
invention. In FIG. 22, by providing components enclosed
with broken lines, such as PWM control circuits i and 4,
synchronism detection circuit 3, pulse-width limitation circuit 7, power-supply-voltage detection circuit 6 and the like,
on a one-chip IC, and providing a part of the circuitry as
software, the apparatus can be provided in a small size and
can be used for general purposes.
Although in each of the above-described embodiments, a
description has been provided of a voltage-resonance-type
switching regulator, the present invention is not limited to
switching regulators of this type, but may also be applied to
switching regulators of any other types. Although in each of
the above-described embodiments, voltage levels are compared by a comparator, the present invention is not limited
to this approach, but may also be applied to an approach in
which current levels are compared.
As described above, according to the present invention, it
is possible to provide an efficientmulti-output control power
supply apparatus which has a simple configuration. In addition, an excessive burden is not applied on the power supply,
the load, and the switching device of the apparatus, and
reliability of the apparatus is improved. In addition, since the
upper limit of the pulse widthxvoltage can be limited
irrespective of the power-supply voltage, the apparatus can
operate even if the response of control for a pulsed load is
slow. Furthermore, since the maximum output power does
not depend on the power-supply voltage, the size and the
cost of the apparatus can be reduced from the view-point of
thermal design.
Next, still another embodiments of the present invention
will be described.
Eleventh Embodiment
In each of the first through fourth embodiments, since the
switching device is provided at the high-voltage side, the
loss in the base-current-limiting resistor has a large value. In
each of the fifth through seventh embodiments, since the
switching device is provided at the low-voltage side, the loss
in the base-current-limiting resistor has a small value, but a
power supply for driving the base is required. The following
eleventh and twelfth embodiments of the present invention
intend to solve the above-described problems.
FIG. 10 is a diagram illustrating the circuitry of a "multioutput control power supply apparatus" according to an
eleventh embodiment of the present invention. In FIG. 10,
there is shown a converter transformer Tl. Power-supply
voltage Vin is supplied to one end of primary winding Nl of
converter transformer Tl. Another end of the winding Nl is
connected to the collector of transistor Q12 which serves as
a switching device. The emitter of transistor Q12 is
5
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30
35
40
45
50
55
60
65
5,619,403
17
18
grounded. By switching transistor Ql2, a desired voltage is
is equivalent to be absent, and the variation Ail of the value
generated at secondary winding N3 in proportion to the turns
i1 is
ratio. One end of winding N3 is connected to the anode of
Ml=[ {V(n3)-V2 }/IA JxTonl,
rectifier diode D1, and another end of winding N3 is
connected to a COM (common) potential point. The cathode 5
where V(n3)=Vinx(n3/nl), and it is clear that
of rectifier diode D1 is connected to the cathode of flywheel
diode D2 and one end of choke coil L21 having a tap.
Af2=0, and
Another end of choke coil L21 is connected to output
capacitor C21. The anode of flywheel diode D2 and another
Af3=0.
end of capacitor C21 are connected to the COM potential 10
(2) tl-t2 (SWl is turned off, and SW2 is turned on)
point.
While switch SWl is turned off, and switch SW2 is turned
The cathode of diode D23 is connected to the tap of choke
on, the flywheel current through the choke coil flows to
coil L21, and the emitter of switching transistor Q22 is
winding n5 having a smaller inductance value LS, but does
connected to the anode of diode D23 in series. The collector
not flow to winding n4having a greater inductance value L4.
of switching transistor Q22 is connected to the COM paten- 15 Hence,
tial point. The driving circuit for transistor Q22 is configured
Ail=0,
by transistor Q23, comparator COMPl, and error amplifier
Af2=0, and
AMPl.
Af3=-[Vl/LS]xTon2.
Winding N2 is the main winding at the secondary side. In
(3) t2-t3 (SWl is turned off, and SW2 is turned off)
order to make the voltage after rectifying and smoothing the 20
While
switch SWl is turned off, and switch SW2 is turned
output of winding N2 constant, the duty ratio of switching
off, the flywheel current through the choke coil changes
of transistor Q21 is changed using CTL (control) circuit 21.
from i3 to i2, and
The operation of the circuitry will now be described. If
Ail=0,
transistor Q2 is always turned off, the circuitry of the present
embodiment performs average-value rectification as an ordi- 25
Af2=-[Vl/L4]xToff2
nary on/on converter, and has the following value of output
Ai3=0.
voltage Vl.
In the condition that the current in the output choke coil
is continuous (has at least the critical current value), con(1).
Vl=Vinx{Tonl/(Tonl +Toffl) }xx
sidering that (Aflxn4+Af2xn4+Ai3xn5)becomes 0 in one
If transistor Q22 is always turned off, the circuitry becomes 30 period, the following expression is obtained:
equivalent to the circuitry shown in FIG. 11, and
Vl=Vinx{Tonl/Tonl+a
xToffl)}xx
(2),
n4x {V (n3 )-Vl }IIAxTon 1-n5xV1/L5xTon2-n4xVl/IAxTofl2=0,
and
IA/LS=(n4/n5) 2
(3).
where a=4/n5, x=3/nl, Toni represents the "on" period of 35
switch 1 (Q21), Toffl represents the "off' period of switch
The following expression is obtained by solving expression
1, and nx represents the number of turns of winding Nx. The
(3):
case of a=l corresponds to an ordinary on/on converter
Vl=Vinx(n3/nl)x[Tonl/{Tonl +(n4/n5)xTon2+ Toff2} I, and
(refer to the following description for the proof of expression (2)).
40
(4).
Ton2+Toff2=Toffl
Next, the operation of the present embodiment will be
described with reference to the circuitry ofFIG.12 in which
IfTon2=0 in expression (4), expression (I) is obtained, and
the circuitry of a principal portion of the apparatus of the
ifToff2=0 in expression (4), expression (2) is obtained. That
present embodiment is generalized, and the timing charts
is, by controlling the timing of the switching-on and the
thereof shown in FIG. 13. First, the case, in which switch 45
switching-off of switch SW2, if n4>n5, output voltage Vl
SW2 is switched on and off while switch SWl is switched
can be controlled to be constant within the range of
off, will be considered.
In the following description, Ton2 represents the effective
Vl(max)=Vinxxx{Tonl/Tonl+Toffl)}, and
"on" period of switch SW2 (the time period between ti and
V2(min)=Vinxxx{Tonl/(Tonl +(n4/n5)Toffl) },
t2 shown in FIG. 13), Toff2 represents the effective "off' 50
period of switch SW2 (the time period between t2 and t3
where
shown in FIG. 13), Ton2+Toff2=Toffl, i1 represents the
current flowing through flywheel diode D2 (see i1 shown in
x=3/nl.
As can be understood from FIG. 14, if switch SW2 is
FIG. 13), i2 represents the current flowing through flywheel
diode D2 (see i2 shown in FIG. 13), i3 represents the current 55 switched off to a degree close to the impedance of (n4/n5),
the current is switched to flywheel diode D2 (i3 is switched
flowing through sub-flywheel diode D2 (see i3 shown in
to i2). Hence, the switching loss has a small value.
FIG. 13), L4 represents the inductance of winding n4, and
FIG. 14 is a diagram illustrating the principle of the eighth
LS represents the inductance of winding n5. The forward
embodiment. As described above, the eighth embodiment
voltage Vf of the diode will be neglected for the purpose of
60 provides a step-down type power supply apparatus using a
simplification.
choke coil having a tap.
A description will be provided while dividing one period
As described above, according to the present embodiinto three periods (1), (2) and (3).
ment, it is possible to provide a multi-output control power
It is necessary that L4>L5, and a step-down type power
supply apparatus which has a relatively simple configuration
supply apparatus will be provided.
65 without requiring synchronism, has a small amount of loss,
(1) tl-tl (SWl is turned on)
and does not require a power supply for driving the base of
While switch SWl is turned on, i3=0 irrespective of the
a transistor.
switching-on and switching-off of switch SW2. That is, n5
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20
Twelfth Embodiment
The same operation as in the eleventh embodiment can
also be realized by using a step-up type power supply
apparatus, as shown in FIG. 15. A description will be
provided of such a device as a twelfth embodiment of the 5
present invention. In the present embodiment, it is necessary
that L4<L5.
(1) tO-tl (SWl is turned on)
As in the case of a step-down type apparatus, the variation
L1ilof the value il is expressed by:
10
rul=I {V(n3)-Vl }/L4 JxTonl,
where V(n3)=Vinx(n3/nl), and it is clear that
L1i2=0,and
15
L1i3=0.
(2) tl-t2 (SWl is turned off, and SW2 is turned on)
While switch SWl is turned off, and switch SW2 is turned
on, the flywheel current through the choke coil flows to n4
having a smaller inductance value L4, and does not flow to
20
n5 having a greater inductancd value LS. Hence,
L1il=0,
L1i2=-[Vl/L4]xTon2, and
L1i3=0.
(3) t2-t3 (SWl is turned off, and SW2 is turned off)
25
While switch SWl is turned off, and switch SW2 is turned
off, the flywheel current through the choke coil is switched
from i2 to i3, and
Afl=O,
30
L1i2=0,and
L1i3=-[Vl/LS]xToff2.
In the condition that the current of the output choke coil
is continuous (has at least the critical current value), considering that the value (rulxn4+Af2xn4+L1i3xn5)becomes O
35
in one period, the following expression is obtained:
n4x{V (n3)-Vl }/L4xTonl-n4xV1/L4xTon2-n5xV1/
L5xToff2=0, and
lA/LS=(n4/n5) 2
(5). 40
The following expression is obtained by solving expression (5):
45
Vl= Vinx(n3/nl)x1Tonl/{Tonl +Ton2+(n4/n5)xToff2}], and
Ton2+Toff2=Toffl
(6).
That is, by controlling the timing of the switching-on and the
switching-off of switch SW2, if n4>n5, output voltage Vl
50
can be controlled to be constant within the range of
Vl(min)=Vinxxx{Tonl/Tonl +Toffl)}, and
V2(max)=Vinxxx{Tonl/(Tonl +(n4/n5)Toffl) },
55
where
x=n3/nl.
The present embodiment can be modified as shown in
FIG. 16.
The same effect can be obtained even if it is arranged so 60
that the switching frequency of switch SW2< the switching
frequency of switch SWl in the eleventh and twelfth
embodiments. The same effect may also be obtained using a
half-bridge circuit, as shown in FIG. 17. The important point
in the eleventh and twelfth embodiments is to switch the 65
inductance of the choke coil, and the effect does not depend
on the rectifying means at the secondary side. Accordingly,
the same operation as in the forward converter is performed
in a circuit other than the forward converter, for example, a
half-bridge circuit.
While the present invention has been described with
respect to what is present! considered to be the preferred
embodiments, it is to be understood that the invention is not
limited to the disclosed embodiments. To the contrary, the
present invention is intended to cover various modifications
and equivalent arrangements included within the spirit and
scope of the appended claims. The scope of the following
claims is to be accorded the broadest interpretation so as to
encompass all such modifications and equivalent structures
and functions.
What is claimed is:
1. A voltage-resonant-type switching regulator, comprising:
a) a transformer comprising:
a primary winding;
a first secondary winding;
a second secondary winding;
a first switching device for switching said primary
winding;
a resonant capacitor connected to said primary winding; and
a feedback circuit for controlling a switching operation
of said first switching device in accordance with the
output of said first secondary winding,
b) a second switching device for switching the output of
said second secondary winding; and
c) a synchronizing circuit for synchronizing said second
switching device with the switching operation of said
first switching device to reduce an interference between
a current flowing through said second secondary winding and a resonant current flowing from said resonant
capacitor through said primary winding.
2. A voltage,resonant-type switching regulator according
to claim 1, wherein said synchronizing circuit switches said
second switching device during "off'' periods of said first
switching device.
3. A voltage-resonant-type switching regulator according
to claim 1, further comprising:
power-supply-voltage detection means for detecting the
voltage of a power supply for said transformer; and
control means for performing an on-off control of said
second switching means in accordance with the output
of said power-supply-voltage detection means.
4. A voltage-resonant-type switching regulator according
to claim 1, wherein said synchronizing circuit prevents the
current from flowing through said second secondary winding while a resonant voltage is smaller than an input voltage
to said primary and while the resonant current flows from
said resonant capacitor through said primary winding.
5. A voltage-resonant-type switching regulator according
to claim 1, wherein said switching circuit keeps said second
switching device off between a time when an output of said
second secondary winding turns positive and a time when
the resonant currents stops.
6. A voltage-resonant-type switching regulator according
to claim 1, wherein said first secondary winding is an on-off
winding and said second secondary winding is an on-on
winding.
7. A switching regulator for switching the primary of a
converter transformer and supplying an output from an
on-on winding of the secondary side of the converter transformer, said switching regulator comprising:
switching means connected in series with the on-on
winding;
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22
power-supply-voltage detection means for detecting the
comparison means for comparing a voltage at the second
voltage of a power supply for the converter transoutput terminal with a reference value, and for supplyformer; and
ing said second switching means with an output as a
result of the comparison as a control signal; and
control means for performing an on-off control of said
switching means in accordance with the output of said 5
a flywheel diode connected to another end of the two
power-supply-voltage detection means,
windings and another end of said second secondary
winding.
wherein said control means comprises a comparator for
10.A multi-output control power supply apparatus, comcomparing the output of an error amplifier with a
prising:
triangular wave synchronized with switching at the
primary side of the converter transformer, and wherein 10
a converter transformer comprising a primary winding
said control means changes the output level of said
and first and second secondary windings;
error amplifier in accordance with the output of said
first switching means for intermitting a connection
power-supply-voltage detection means.
between said primary winding and a power supply
8. A multi-output control power supply apparatus, comthereof;
prising:
15
rectifying and smoothing means for rectifying and
a converter transformer comprising a primary winding
smoothing the output of said first secondary winding
and first and second secondary windings;
and supplying the resultant output to a first output
first switching means for intermitting a connection
terminal;
between said primary winding and a power supply
PWM control means for performing PWM control of said
thereof;
20
first switching means in accordance with a voltage at
rectifying and smoothing means for rectifying and
said first output terminal;
smoothing the output of said first secondary winding
rectifying means connected to one end of said second
and supplying the resultant output to a first output
secondary winding;
terminal;
a choke coil having two windings for supplying a second
PWM control means for performing a PWM control of 25
output terminal with the output of said rectifying
said first switching means in accordance with a voltage
means;
at the first output terminal;
second switching means for intermitting a connection
rectifying means for rectifying the output of said second
between a common connection point of said twosecondary winding and supplying the resultant output
winding choke coil and said rectifying means and
to a second output terminal;
30
another end of said second secondary winding;
second switching means for intermitting the low-voltage
a flywheel diode connected between an end of the two
side of the output of said second secondary winding;
windings opposite to the side connected to said rectisynchronism detection means for obtaining a signal synfying means and another end of said second secondary
winding; and
chronized with a pulse generated by said PWM control
means from the output of said PWM control means; 35
comparison means for comparing a voltage at the second
output terminal with a reference value, and for supplycomparison means for comparing a voltage at the second
ing said second switching means with an output as a
output terminal with a reference value; and
result of the comparison as a control signal.
holding means for updating and holding the output of said
11. A multi-output power supply apparatus, comprising:
comparison means in accordance with the output of 40
a) a transformer comprising:
said synchronism detection means, and for supplying
a primary winding;
the resultant output to said second switching means as
a first secondary winding;
a control signal.
a second secondary winding;
9. A multi-output control power supply apparatus, coma first switching device for switching said primary
prising:
45
winding; and
a converter transformer comprising a primary winding
a feedback circuit for controlling the switching operaand first and second secondary windings;
tion of said first switching device in accordance with
the output of said first secondary winding,
first switching means for intermitting a connection
between said primary winding and a power supply
b) a second switching device provided at the low-voltage
thereof;
side of the output of said second secondary winding for
50
switching
the output; and
rectifying and smoothing means for rectifying and
c) a driving circuit for switching said second switching
smoothing the output of said first secondary winding
device at a frequency lower than a switching frequency
and supplying the resultant output to a first output
for said first switching device.
terminal;
12. A multi-output power supply apparatus according to
55
PWM control means for performing PWM control of said
claim 11, wherein said driving circuit switches said second
first switching means in accordance with a voltage at
switching device during an "off" period of said first switchthe first output terminal;
ing device.
rectifying means connected to one end of said second
13. A switching regulator for switching the primary of a
secondary winding;
converter transformer and supplying an output from an
60
on-on winding of the secondary side of the converter transa choke coil having one of a tap and two windings for
former, said switching regulator comprising:
supplying a second output terminal with the output of
said rectifying means;
switching means connected in series with the on-on
winding;
second switching means for intermitting a connection
between the one of the tap and one end of the two 65
power-supply-voltage detection means for detecting the
windings and another end of said second secondary
voltage of a power supply for the converter transwinding;
former; and
5,619,403
23
24
control means for performing an on-off control of said
switching means in accordance with the output of said
power-supply-voltage detection means,
wherein said control means comprises a comparator for
comparing the output of an error amplifier with a
triangular wave synchronized with switching at the
primary side of the converter transformer, and wherein
said control means changes the output level of the
triangular wave in accordance with the output of said
power-supply-voltage detection means.
14. A switching regulator for switching the primary of a
converter transformer and supplying an output from an
on-on winding of the secondary side of the converter transformer, said switching regulator comprising:
switching means connected in series with the on-on
winding;
power-supply-voltage detection means for detecting the
voltage of a power supply for the converter transformer; and
control means for performing an on-off control of said
switching means in accordance with the output of said
power-supply-voltage detection means,
wherein said control means comprises digital circuitry for
controlling said switching regulator including a central
processing unit, a read-only memory, a random access
memory and analog circuitry including digital-to-analog converting means, said digital circuitry being
formed as a one-chip integrated circuit.
15. A multi-output power supply apparatus, comprising:
a) A transformer comprising:
a primary winding;
an on-off secondary winding;
an on-on secondary winding;
a first switching device for switching said primary
winding; and
a feedback circuit for controlling the switching operation of said first switching device in accordance with
the output of said on-off secondary winding,
b) a second switching device for switching the output of
said on-on secondary winding;
c) a power-supply-voltage detection circuit for detecting
an input voltage to said primary winding; and
d) a driving circuit for limiting an "on" period of the
switching operation of said second switching device in
accordance with the output of said power-supply-voltage detection circuit.
16. A multi-output power supply apparatus according to
claim 15, wherein said transformer is a voltage-resonanttype transformer having a resonant capacitor.
17. A multi-output control power supply apparatus, comprising:
a converter transformer comprising a primary winding
and first and second secondary windings;
first switching means for intermitting a connection
between said primary winding and a power supply
thereof;
rectifying and smoothing means for rectifying and
smoothing the output of said first secondary winding
and supplying the resultant output to a first output
terminal;
PWM (pulse-width modulation) control means for performing a PWM control of said first switching means in
accordance with a voltage at the first output terminal;
rectifying means for rectifying the output of said second
secondary winding;
second switching means for intermitting the output of said
rectifying means and supplying the resultant output to
a second output terminal;
synchronism detection means for obtaining a signal synchronized with a pulse generated by said PWM control
means from the output of said PWM control means;
comparison means for comparing a voltage at the second
output terminal with a reference value; and
holding means for updating and holding the output of said
comparison means in accordance with the output of
said synchronism detection means, and for supplying
the resultant output to said second switching means as
a control signal.
18. A multi-output control power supply apparatus
according to claim 17, further comprising delay means for
delaying the control signal supplied from said holding
means to said second switching means by a predetermined
time period.
19. A multi-output control power supply apparatus
according to claim 17, wherein the circuitry of said PWM
control means, said synchronism detection means, and said
holding means is formed on the same chip together with
digital circuitry comprising a central processing unit, a
read-only memory, a random access memory and the like,
and analog circuitry comprising a digital-to-analog converter and the like.
5
10
15
20
25
30
35
40
45
* * * * *
UNITED STATES PATENT AND TRADEMARK OFFICE
CERTIFICATE OF CORRECTION
Page_l of _l_
PATENT NO.
: 5,619,403
DATED
:April 8, 1997
: ISHIKAWA, et al.
INVENTOR(S)
It is certified that error appears in the above-indentified patent and that said Letters Patent is hereby
corrected as shown below:
Column 1
Line 41 , "a" should be deleted.
Column 6
Line 23,
11
to 11 should
read --so--
Line 40, "30" should read --3.--.
Column 7
Line 42, "FIG. 2)," should read --FIG. 2).--.
Line 43, "transistor" should read --Transistor--.
Column 9
Line 32, "intelligenter" should read --intelligent--.
Column 10
Line 9, "b7" should read --by--.
Line 31, "IN" should read --In--.
Column 11
Line 7, "QI" should read --Q 1--.
UNITED STATES PATENT AND TRADEMARK OFFICE
CERTIFICATE OF CORRECTION
Page_1_of..l_
PATENT NO.
: 5,619,403
DATED
:April 8, 1997
: ISHIKAWA, et al.
INVENTOR(S)
It is certified that error appears in the above-indentified patent and that said Letters Patent is hereby
corrected as shown below:
Column 12
Line 29, "VI" should read --VI--.
Line 50, "in" should read --is--.
Column 13
Line 64, "Cl" should read --Cl--.
Column 14
Line 32, "based" should read --based on--.
Column 16
Line 20, "i" should read --1--.
Column 18
Line 13, "LS," should read --15,--.
Line 14, "n4having" should read "n4 having--.
Line 18, "di3=-[Vl/LS]xTon2." should read --di3=[Vl/L5]xTon2.--.
Line 24, "dil=O," should read --dil=O,".
Line 29, "(dilxn4+di2xn4+di3n5)" should read
--(dil xn4+di2 xn4+di3 xn5)--.
UNITED STATES PATENT AND TRADEMARK OFFICE
CERTIFICATE OF CORRECTION
Page_l_ of l
PATENT NO.
: 5,619,403
DATED
:April 8, 1997
INVENTOR(S) : ISHIKAWA,
et al.
It is certified that error appears in the above-indentifiedpatent and that said Letters Patent is hereby
corrected as shown below:
Column 19
Line 21, "Llil=O,"should read --Llil=O,".
Line 29, "Llil=O,"should read --Llil =O,".
Line 34, "(Llilxn4+Lli2xn4+Lli3n5)" should read
--(Llilxn4+Lli2xn4+Lli3xn5)--.
Column 20
Line 5, "present!" should read --presently--.
Line 35, "voltage, resonant-type" should read --voltage-resonant-type--.
Signed and Sealed this
Fourth Day of November, 1997
Attest:
BRUCE LEHMAN
Attesting Officer
Commissio11,,r o{ Pa,enr.-. and Tradrmark.\·