dell-alienware-18-schematics-version-x02-compal-la9332p-laptop-schematics
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A B C D E www.laptopblue.vn 1 MODEL NAME : Viking 18 PCB NO : LA-9332P BOM P/N : 4619KU31L01 1 Compal Confidential 2 2 Viking 18 Schematic Document Rev: X02 2012-11-19 3 3 @ : Nopop Component 4 4 Compal Secret Data Security Classification Issued Date 2012/05/14 2013/05/13 Deciphered Date Title Compal Electronics, Inc. Cover Sheet THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.1 \\tperdfs1\CIS\SPEC\BAS40-04_SOT23-3.pdf Date: A B C D Friday, December 14, 2012 Sheet E 1 of 56 A B C D E www.laptopblue.vn LVDS Mux PI3LVD1012 P.42 LVDS Conn. P.33 eDP to LVDS RTD2136 P.40 LVDS Mux PI3LVD1012 P.41 FFS LNG3DMTR 2-lane eDP DP1.1 DP/HDMI HDMI to LVDS SW STDP6038 P.37 2 HDMI 1.3 Input HDMI 1.4a Output Conn. HDMI Conn. 1 Memory Bus DDRIII Dual Channel 204pin DDRIII SO-DIMM x4 BANK 0, 1, 2, 3 P.12, 13, 14, 15 1.35V DDRIII 1600 MHz P.5, 6, 7, 8, 9, 10, 11 DP1.2 DP/HDMI HDMI MUX PS8271 P.36 P.16 DMI x4 PEGx 8 Gen 3 100MHz 5GT/s USB3.0 Rediver PS8713 P.52 USB3.0 USB 2.0 HDMI SW TS3DV621 P.35 P.35 CPU XDP Conn. P.6 MXM III HDMI Redriver PS121 P.37 HDMI Redriver PS121 P.36 4C 47W/57W Scoket G3 rPGA-947 PEGx 8 Gen 3 LVDS Fan Control ADM1032 P.54 Intel Haswell Processor HDMI 1 P.49 MXM III Conn. USB 3.0/USB 2.0 Conn. P.52 ( USB Charger Port ) USB3.0 Rediver PS8713 P.52 USB3.0 USB 2.0 USB 3.0/USB 2.0 Conn. 2 P.52 P.17 DP Redriver PS8330 P.31 miniDP Conn. P.30 mDP MUX MAX14998 P.31 Intel Mini Card #1(Half) USB2.0 PCI-E 2.0 WLAN/WiMax BT4.0+LE/WiGig P.51 HDMI Redriver PS121 P.39 P.53 USB2.0 P.57 Digital Camera USB2.0 USB2.0 PCI-E 2.0 LAN(GbE) E2201 Killer AlienFX/ELC P.48,49 BGA 695 Balls SATA 3.0 SATA Rediver PS8520BT P.49 HDD Conn. 1 SATA 3.0 SATA Rediver PS8520BT P.49 HDD Conn. 2 PCI-E 2.0 P.46 Card Reader RTS5209 9 in 1 Conn. USB 3.0/USB 2.0 Conn. HM87 P.51 P.46 USB3.0 USB 2.0 P.52 PCH HDMI MUX PS8271 P.39 Display MiniCard RJ45 Conn. USB 3.0/USB 2.0 Conn. Lynx Point DMC 3 USB3.0 USB 2.0 3 HDD Conn. 3 In ODD Bay (In place PCI-E 2.0 SATA 3.0 SATA Rediver PS8520BT P.50 Card Reader Board SATA 3.0 RTC conn. SPI LPC Bus P.49 of ODD) ODD Conn. Mini Card #3(Full) mSATA P.17, 18, 19, 20, 21, 22, 23, 24, 25 SPI ROM P.20 8MB P.49 P.50 P.50 P.50 Front L/R + HP1 +MIC HD Audio P.47 Center/Subwoofer + HP2 ENE KC3810 Power On/Off CKT. 4 Audio Codec ALC3661 ENE KB9012 P.43 P.55 P.43 DC/DC Interface CKT. P.47 P.56 VPK MCU Int.KBD Rear L/R P.47 Array Mics P.57 P.49 Subwoofer TI TPA3111D VPK Daughter Board TI TPA3113D2 P.48 Int. Speaker (2.5W*2) P.48 Compal Secret Data Security Classification Issued Date P.48 Audio Daughter Board 4 Touch Pad Power Circuit DC/DC P.37 P.47 2012/02/28 Deciphered Date 2013/02/27 Title Block Diagram THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.1 LA-9332P Date: A B C D Friday, December 14, 2012 E Sheet 2 of 56 A B C Compal Confidential D E www.laptopblue.vn Project Code : VAS10 File Name : LA-9332P 1 1 Camera LCD Panel 44 pin LA-9332P M/B Coaxial/Wire Combo B To B conn. FFC LS-933GP LS-9335P LS-933FP 20 pin Hall Sensor /B 4 pin on/off SW HDD in ODD Bay Cable 22pin Led x 1 6pin Wire LS-933HP Right Tron Light Wire LS-933IP Left Tron Light Wire LS-933JP Front Right Tron Light Wire LS-933KP Front Left Tron Light FFC 2 6 pin 6pin LS-9336P INDICATOR/B LS-9337P CardReader /B 6pin Led-HDD Led-Wireless Led-CapsLock FFC FFC 20 pin 30 pin 6pin 20pin FFC FPC 60 pin 20 pin Wire 12pin KSI/KSO 30 pin 2 HDD conn. Card Slot 3 HDD3/ODD Coaxial Audio /B POWER BUTTON/B LS-9338P VPK Daughter/B PWM VPK Keyboard VPK MCU MAX7313 40 pin Hot Key 6 pin 10 pin HDD1/HDD2 LS-XXXXP 3 LOGO /B Key Pad Led x 2 Backlight / 8 Pressure-sense Analog Signals FFC 16 pin Wire Wire Wire 6pin 6pin 6pin LS-9333P LS-9331P Alien Slits-R Light/B Alien head badge/B Touch Pad Led x 2 Led x 2 LS-9332P Alien Slits-L Light/B Led x 2 4 4 Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2011/06/02 2012/06/02 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: A B C D Block Diagram Document Number Rev 0.1 Friday, December 14, 2012 Sheet E 3 of 56 A www.laptopblue.vn USB 3.0 PORT Board ID Table for AD channel Vcc Ra Board ID 0 1 2 3 4 5 6 7 3.3V +/100K +/Rb 0 8.2K +/18K +/33K +/56K +/100K +/200K +/NC 5% 5% BOARD ID Table V AD_BID min 0 V 0.168 V 0.375 V 0.634 V 0.958 V 1.372 V 1.851 V 2.433 V 5% 5% 5% 5% 5% 5% V AD_BID typ 0 V 0.250 V 0.503 V 0.819 V 1.185 V 1.650 V 2.200 V 3.300 V V AD_BID max 0.155 V 0.362 V 0.621 V 0.945 V 1.359 V 1.838 V 2.420 V 3.300 V EC AD3 0x00-0x0C 0x0D-0x1C 0x1D-0x30 0x31-0x49 0x4A-0x69 0x6A-0x8E 0x8F-0xBB 0xBC-0xFF POWER STATES Board ID 0 1 2 3 4 5 6 7 PCB Revision 0.1 (SSI) 0.2 (PT) 0.3 (ST) 0.4 (QT) 1.0 (MP) Connetion 1 JUSB1 (Right side) 2 JUSB2 (Right side) 3 NA 4 NA 5 JUSB3 (Left side) 6 JUSB4 (Left side) USB PORT# DESTINATION 0 JUSB1(USB3.0 P1) 1 JUSB2(USB3.0 P2) 2 JUSB3(USB3.0 P5) 3 JUSB4(USB3.0 P6) 4 JMINI1 (WLAN) 5 JMINI2 (DMC) 6 AlienFX/ELC 7 None 8 None 9 None 10 None 11 None 12 LVDS CAMERA 13 VPK K/B PM TABLE Signal SLP S3# State S0 (Full ON) / M0 SLP S4# HIGH HIGH SLP S5# HIGH S4 STATE# HIGH SLP M# ALWAYS PLANE HIGH SUS PLANE ON RUN PLANE CLOCKS ON ON +5VS +5VALW power plane ON +3VS +3VALW +1.35V +1.5VS +3VLP +1.05V +1.05VS +3V_PCH S3 (Suspend to RAM) / M-OFF LOW HIGH HIGH LOW ON ON OFF USB2.0 +0.675VS OFF +3VMXM +5VMXM S4 (Suspend to DISK) / M-OFF S5 (SOFT OFF) / M-OFF LOW LOW LOW LOW HIGH LOW LOW LOW LOW OFF ON LOW ON OFF OFF OFF OFF +VCC_CORE State +1.35V_CPU_VDDQ OFF Symbol Note : : means Digital Ground : means Analog Ground S0 ON ON ON S3 ON ON OFF S5 S4/AC ON OFF OFF S5 S4/AC don't exist OFF OFF OFF 1 1 DIFFERENTIAL CLKOUT_PCIE0 CLK DESTINATION FLEX CLOCKS MINI CARD-1 WLAN DESTINATION CLKOUTFLEX0 CLKOUT_PCIE1 MINI CARD-2 DMC CLKOUTFLEX1 None CLKOUT_PCIE2 10/100/1G LAN CLKOUTFLEX2 None CLKOUT_PCIE3 CLKOUT_PCIE4 SATAIII DESTINATION SATA0 HDD1 SATA1 HDD2 DESTINATION SATA2 ODD PCI0 PCH_LOOPBACK SATA3 mSATA PCI1 EC SATA4/PCIE LANE1 MINI CARD-1 WLAN PCI2 80port debug card SATA5/PCIE LANE2 MINI CARD-2 DMC PCI3 None PCI4 None CLKOUTFLEX3 CARD READER CLKOUT_PCIE6 CLKOUT_PCIE7 CLKOUT_PEG_A None None CLKOUT CLKOUT_PCIE5 PCI EXPRESS None None None None MXM DESTINATION Lane 1/USB3.0 Port 3 None Lane 2/USB3.0 Port 4 None Lane 3 10/100/1G LAN Lane 4 CARD READER Lane 5 None Lane 6 None Lane 7 None Lane 8 None SMBUS Control Table SOURCE EC_SMB_CK1 EC_SMB_DA1 KB9012 EC_SMB_CK2 EC_SMB_DA2 KB9012 PCH_SML0CLK PCH_SML0DATA PCH PCH_SML1CLK PCH_SML1DATA PCH MEM_SMBCLK MEM_SMBDATA PCH WLAN DMC BATT DIMM 6038 4028 Thermal Sensor FFS 2136 VPK MCU V MXM XDP V V V V V Charger TP mSATA V V Link Compal Secret Data Security Classification V V V V V V Issued Date 2012/05/28 Deciphered Date 2013/05/27 Title Compal Electronics, Inc. Notes List THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.1 LA-9332P Date: A Friday, December 14, 2012 Sheet 4 of 56 5 4 3 2 1 www.laptopblue.vn +VCOMP_OUT D 2 PEG_COMP 24.9_0402_1%~D D 1 RC2 CAD Note: Trace width=12 mils ,Spacing=15mil Max length= 400 mils. PEG_GTX_HRX_P[0..15] PEG_GTX_HRX_N[0..15] PEG_HTX_C_GRX_P[0..15] PEG_HTX_C_GRX_N[0..15] 29,30 29,30 29,30 29,30 Haswell rPGA EDS JCPU1A DMI_CRX_PTX_P0 DMI_CRX_PTX_P1 DMI_CRX_PTX_P2 DMI_CRX_PTX_P3 D20 C20 B20 A20 DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3 DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3 D18 C17 B17 A17 DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3 DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3 D17 C18 B18 A18 17 17 17 17 DMI_CRX_PTX_P0 DMI_CRX_PTX_P1 DMI_CRX_PTX_P2 DMI_CRX_PTX_P3 17 17 17 17 17 17 17 17 DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3 DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3 PEG D21 C21 B21 A21 DMI_CRX_PTX_N0 DMI_CRX_PTX_N1 DMI_CRX_PTX_N2 DMI_CRX_PTX_N3 DMI C DMI_CRX_PTX_N0 DMI_CRX_PTX_N1 DMI_CRX_PTX_N2 DMI_CRX_PTX_N3 17 17 17 17 DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3 DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3 @ FDI_CSYNC FDI_INT RC3 2 RC87 2 1 0_0402_1% 1 0_0402_1% @ FDI_CSYNC_R FDI_INT_R H29 J29 FDI_CSYNC FDI_INT FDI 17 17 B PEG_RCOMP PEG_RXN_0 PEG_RXN_1 PEG_RXN_2 PEG_RXN_3 PEG_RXN_4 PEG_RXN_5 PEG_RXN_6 PEG_RXN_7 PEG_RXN_8 PEG_RXN_9 PEG_RXN_10 PEG_RXN_11 PEG_RXN_12 PEG_RXN_13 PEG_RXN_14 PEG_RXN_15 PEG_RXP_0 PEG_RXP_1 PEG_RXP_2 PEG_RXP_3 PEG_RXP_4 PEG_RXP_5 PEG_RXP_6 PEG_RXP_7 PEG_RXP_8 PEG_RXP_9 PEG_RXP_10 PEG_RXP_11 PEG_RXP_12 PEG_RXP_13 PEG_RXP_14 PEG_RXP_15 PEG_TXN_0 PEG_TXN_1 PEG_TXN_2 PEG_TXN_3 PEG_TXN_4 PEG_TXN_5 PEG_TXN_6 PEG_TXN_7 PEG_TXN_8 PEG_TXN_9 PEG_TXN_10 PEG_TXN_11 PEG_TXN_12 PEG_TXN_13 PEG_TXN_14 PEG_TXN_15 PEG_TXP_0 PEG_TXP_1 PEG_TXP_2 PEG_TXP_3 PEG_TXP_4 PEG_TXP_5 PEG_TXP_6 PEG_TXP_7 PEG_TXP_8 PEG_TXP_9 PEG_TXP_10 PEG_TXP_11 PEG_TXP_12 PEG_TXP_13 PEG_TXP_14 PEG_TXP_15 E23 M29 K28 M31 L30 M33 L32 M35 L34 E29 D28 E31 D30 E35 D34 E33 E32 L29 L28 L31 K30 L33 K32 L35 K34 F29 E28 F31 E30 F35 E34 F33 D32 H35 H34 J33 H32 J31 G30 C33 B32 B31 A30 B29 A28 B27 A26 B25 A24 J35 G34 H33 G32 H31 H30 B33 A32 C31 B30 C29 B28 C27 B26 C25 B24 PEG_COMP PEG_GTX_C_HRX_N0 PEG_GTX_C_HRX_N1 PEG_GTX_C_HRX_N2 PEG_GTX_C_HRX_N3 PEG_GTX_C_HRX_N4 PEG_GTX_C_HRX_N5 PEG_GTX_C_HRX_N6 PEG_GTX_C_HRX_N7 PEG_GTX_C_HRX_N8 PEG_GTX_C_HRX_N9 PEG_GTX_C_HRX_N10 PEG_GTX_C_HRX_N11 PEG_GTX_C_HRX_N12 PEG_GTX_C_HRX_N13 PEG_GTX_C_HRX_N14 PEG_GTX_C_HRX_N15 PEG_GTX_C_HRX_P0 PEG_GTX_C_HRX_P1 PEG_GTX_C_HRX_P2 PEG_GTX_C_HRX_P3 PEG_GTX_C_HRX_P4 PEG_GTX_C_HRX_P5 PEG_GTX_C_HRX_P6 PEG_GTX_C_HRX_P7 PEG_GTX_C_HRX_P8 PEG_GTX_C_HRX_P9 PEG_GTX_C_HRX_P10 PEG_GTX_C_HRX_P11 PEG_GTX_C_HRX_P12 PEG_GTX_C_HRX_P13 PEG_GTX_C_HRX_P14 PEG_GTX_C_HRX_P15 PEG_HTX_GRX_N0 PEG_HTX_GRX_N1 PEG_HTX_GRX_N2 PEG_HTX_GRX_N3 PEG_HTX_GRX_N4 PEG_HTX_GRX_N5 PEG_HTX_GRX_N6 PEG_HTX_GRX_N7 PEG_HTX_GRX_N8 PEG_HTX_GRX_N9 PEG_HTX_GRX_N10 PEG_HTX_GRX_N11 PEG_HTX_GRX_N12 PEG_HTX_GRX_N13 PEG_HTX_GRX_N14 PEG_HTX_GRX_N15 PEG_HTX_GRX_P0 PEG_HTX_GRX_P1 PEG_HTX_GRX_P2 PEG_HTX_GRX_P3 PEG_HTX_GRX_P4 PEG_HTX_GRX_P5 PEG_HTX_GRX_P6 PEG_HTX_GRX_P7 PEG_HTX_GRX_P8 PEG_HTX_GRX_P9 PEG_HTX_GRX_P10 PEG_HTX_GRX_P11 PEG_HTX_GRX_P12 PEG_HTX_GRX_P13 PEG_HTX_GRX_P14 PEG_HTX_GRX_P15 CC1 CC2 CC3 CC4 CC5 CC13 CC6 CC7 CC8 CC9 CC10 CC11 CC12 CC14 CC15 CC16 CC17 CC18 CC19 CC20 CC21 CC22 CC23 CC24 CC25 CC26 CC27 CC28 CC29 CC30 CC31 CC32 CC33 CC34 CC35 CC36 CC37 CC38 CC39 CC40 CC41 CC42 CC43 CC44 CC45 CC46 CC47 CC48 CC49 CC50 CC51 CC52 CC53 CC54 CC55 CC56 CC57 CC58 CC59 CC60 CC61 CC62 CC63 CC64 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D 0.22U_0402_16V7K~D PEG_GTX_HRX_N0 PEG_GTX_HRX_N1 PEG_GTX_HRX_N2 PEG_GTX_HRX_N3 PEG_GTX_HRX_N4 PEG_GTX_HRX_N5 PEG_GTX_HRX_N6 PEG_GTX_HRX_N7 PEG_GTX_HRX_N8 PEG_GTX_HRX_N9 PEG_GTX_HRX_N10 PEG_GTX_HRX_N11 PEG_GTX_HRX_N12 PEG_GTX_HRX_N13 PEG_GTX_HRX_N14 PEG_GTX_HRX_N15 PEG_GTX_HRX_P0 PEG_GTX_HRX_P1 PEG_GTX_HRX_P2 PEG_GTX_HRX_P3 PEG_GTX_HRX_P4 PEG_GTX_HRX_P5 PEG_GTX_HRX_P6 PEG_GTX_HRX_P7 PEG_GTX_HRX_P8 PEG_GTX_HRX_P9 PEG_GTX_HRX_P10 PEG_GTX_HRX_P11 PEG_GTX_HRX_P12 PEG_GTX_HRX_P13 PEG_GTX_HRX_P14 PEG_GTX_HRX_P15 PEG_HTX_C_GRX_N0 PEG_HTX_C_GRX_N1 PEG_HTX_C_GRX_N2 PEG_HTX_C_GRX_N3 PEG_HTX_C_GRX_N4 PEG_HTX_C_GRX_N5 PEG_HTX_C_GRX_N6 PEG_HTX_C_GRX_N7 PEG_HTX_C_GRX_N8 PEG_HTX_C_GRX_N9 PEG_HTX_C_GRX_N10 PEG_HTX_C_GRX_N11 PEG_HTX_C_GRX_N12 PEG_HTX_C_GRX_N13 PEG_HTX_C_GRX_N14 PEG_HTX_C_GRX_N15 PEG_HTX_C_GRX_P0 PEG_HTX_C_GRX_P1 PEG_HTX_C_GRX_P2 PEG_HTX_C_GRX_P3 PEG_HTX_C_GRX_P4 PEG_HTX_C_GRX_P5 PEG_HTX_C_GRX_P6 PEG_HTX_C_GRX_P7 PEG_HTX_C_GRX_P8 PEG_HTX_C_GRX_P9 PEG_HTX_C_GRX_P10 PEG_HTX_C_GRX_P11 PEG_HTX_C_GRX_P12 PEG_HTX_C_GRX_P13 PEG_HTX_C_GRX_P14 PEG_HTX_C_GRX_P15 C B Near MXM Connector 1 OF 9 INTEL_HASWELL_HASWELL CONN@ A A Compal Secret Data Security Classification Issued Date 2012/05/28 2013/05/27 Deciphered Date Title Compal Electronics, Inc. CPU (1/7) DMI,PEG THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.1 LA-9332P Date: 5 4 3 2 Friday, December 14, 2012 Sheet 1 5 of 56 5 4 3 2 1 www.laptopblue.vn +VCCIO_OUT @ 1 1 1 1 0_0402_5%~D 2 G RUN_ON_CPU1.5VS3# 3 10,56 1 UC2 74AHC1G09GW_TSSOP5~D 2 RC94 2 1 RC28 0_0402_5%~D RUNPWROK_AND 2 @ 2 +VCCIO_OUT @ 1 @ RC125 PM_DRAM_PWRGD_CPU 2 SYS_PWROK_XDP 1K_0402_1%~D 9 XDP_PREQ#_R XDP_PRDY#_R 9 9 CFG3 H_CPUPWRGD 17,43 10 CPU_PWR_DEBUG 17,43,62 IMVP_PWRGD S 12,13,14,15,19,49,50,51,53 12,13,14,15,19,49,50,51,53 9 9 CFG4 CFG5 CFG4 CFG5 9 9 CFG6 CFG7 CFG6 CFG7 @ @ 2 1K_0402_1%~D H_CPUPWRGD_XDP 2 0_0402_5%~D CFD_PWRBTN#_XDP RC8 1 RC12 1 @ @ 2 0_0402_5%~D 2 0_0402_5%~D CPU_PWR_DEBUG_R SYS_PWROK_XDP 1 1 @ @ 2 0_0402_5%~D 2 0_0402_5%~D DDR_XDP_SMBDAT_R1 DDR_XDP_SMBCLK_R1 RC126 RC127 PCH_SMBDATA PCH_SMBCLK CFG2 1 CFG3_R 1K_0402_1%~D XDP_OBS0 XDP_OBS1 1 1 RC5 RC6 PBTN_OUT# CFG0 CFG1 CFG0 CFG1 9 CFG2 RC56 2 @ RC5 need to close to JCPU1 D +VCCIO_OUT JXDP1 Place near JXDP1 +3V_PCH RC14 3.3K_0402_1%~D @ 2 200_0402_1%~D A 4 2 O @ QC1 SSM3K7002FU_SC70-3~D @RC64 @ RC64 39_0402_5%~D 1 RC18 +3V_PCH 2 5 B 2 PM_DRAM_PWRGD 1 P 1 G 17 SYS_PWROK 3 1.35V_SUS_PWRGD 17 CC156 1 2 0.1U_0402_25V6K~D @ 2 1 RC97 0_0402_5%~D 2 1 RC88 0_0402_5%~D 2 59 @ RC16 1.8K_0402_1% Deep S3 2 +3VALW @ D RC89 100K_0402_5%~D 1 +1.35V_CPU_VDDQ CC66 0.1U_0402_25V6K~D 1 +3VALW CC65 0.1U_0402_25V6K~D SM_DRAMPWROK with DDR Power Gating Topology XDP_TCLK_R 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 GND0 OBSFN_A0 OBSFN_A1 GND2 OBSDATA_A0 OBSDATA_A1 GND4 OBSDATA_A2 OBSDATA_A3 GND6 OBSFN_B0 OBSFN_B1 GND8 OBSDATA_B0 OBSDATA_B1 GND10 OBSDATA_B2 OBSDATA_B3 GND12 PWRGOOD/HOOK0 HOOK1 VCC_OBS_AB HOOK2 HOOK3 GND14 SDA SCL TCK1 TCK0 GND16 GND1 OBSFN_C0 OBSFN_C1 GND3 OBSDATA_C0 OBSDATA_C1 GND5 OBSDATA_C2 OBSDATA_C3 GND7 OBSFN_D0 OBSFN_D1 GND9 OBSDATA_D0 OBSDATA_D1 GND11 OBSDATA_D2 OBSDATA_D3 GND13 ITPCLK/HOOK4 ITPCLK#/HOOK5 VCC_OBS_CD RESET#/HOOK6 DBR#/HOOK7 GND15 TD0 TRST# TDI TMS GND17 SAMTE_BSH-030-01-L-D-A 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 D CFG17 CFG16 CFG17 CFG16 CFG8 CFG9 CFG8 CFG9 CFG10 CFG11 CFG10 CFG11 9 9 CFG19 CFG18 CFG19 CFG18 9 9 CFG12 CFG13 CFG12 CFG13 9 9 CFG14 CFG15 CFG14 CFG15 CLK_XDP CLK_XDP# RC144 RC145 9 9 9 9 9 9 1 1 @ 2 0_0402_5%~D 2 0_0402_5%~D CLK_CPU_ITP CLK_CPU_ITP# @ XDP_RST#_R XDP_DBRESET# 2 RC9 1 @ 18 18 CPU_PLTRST#_R 1K_0402_1%~D XDP_TDO XDP_TRST#_R XDP_TDI XDP_TMS_R CFG3_R CONN@ +VCCIO_OUT 2 1 2 RC44 H_THERMTRIP# 56_0402_5%~D H_CATERR# 49.9_0402_1%~D H_PROCHOT# 62_0402_5%~D Haswell rPGA EDS JCPU1B AP32 place RC134 near CPU H_PM_SYNC H_CPUPWRGD 1 RC25 H_PM_SYNC VCCPWRGOOD_0_R PM_DRAM_PWRGD_CPU CPU_PLTRST#_R 2 @ 0_0402_1% 2 2 2 2 2 2 1 1 1 1 1 1 @ @ @ @ @ @ 0_0402_1% 0_0402_1% 0_0402_1% 0_0402_1% 0_0402_1% 0_0402_1% AT28 AL34 AC10 AT26 G28 H28 F27 E27 D26 E26 CPU_DPLL# CPU_DPLL CPU_SSC_DPLL# CPU_SSC_DPLL CPU_DMI# CPU_DMI CATERR PECI RSVD PROCHOT THERMTRIP PM_SYNC PWRGOOD SM_DRAMPWROK PLTRSTIN DPLL_REF_CLKN DPLL_REF_CLKP SSC_DPLL_REF_CLKN SSC_DPLL_REF_CLKP BCLKN BCLKP CLOCK RC51 RC52 RC43 RC22 RC15 RC13 18 CLK_CPU_DPLL# 18 CLK_CPU_DPLL CLK_CPU_SSC_DPLL# CLK_CPU_SSC_DPLL 18 CLK_CPU_DMI# 18 CLK_CPU_DMI 18 18 @ AN32 AR27 AK31 AM30 AM35 PWR 17 21 1 1 RC57 RC134 H_PROCHOT# H_THERMTRIP# C MISC THERMAL H_CATERR# H_PECI H_PECI PAD~D T66 @ 2 56_0402_5%~D H_PROCHOT#_R 2 0_0402_1% H_THERMTRIP#_R 21,43 43,57 21 SKTOCC PRDY PREQ TCK TMS TRST TDI TDO DBR INTEL_HASWELL_HASWELL BPM_N_0 BPM_N_1 BPM_N_2 BPM_N_3 BPM_N_4 BPM_N_5 BPM_N_6 BPM_N_7 2 OF 9 AP3 AR3 AP2 AN3 SM_RCOMP0 SM_RCOMP1 SM_RCOMP2 DDR3_DRAMRST#_CPU AR29 AT29 AM34 AN33 AM33 AM31 AL33 AP33 XDP_PRDY# XDP_PREQ# XDP_TCLK XDP_TMS XDP_TRST# XDP_TDI_R XDP_TDO_R XDP_DBRESET#_R RC50 RC36 RC46 RC47 RC48 RC23 RC24 RC26 1 1 1 1 1 1 1 1 @ @ @ @ @ @ @ @ 2 2 2 2 2 2 2 2 0_0402_1% 0_0402_1% 0_0402_1% 0_0402_1% 0_0402_1% 0_0402_1% 0_0402_1% 0_0402_1% AR30 AN31 AN29 AP31 AP30 AN28 AP29 AP28 XDP_OBS0_R XDP_OBS1_R XDP_OBS2_R XDP_OBS3_R XDP_OBS4_R XDP_OBS5_R XDP_OBS6_R XDP_OBS7_R RC30 1 RC31 1 @ @ 2 2 @T68 @ T68 @T69 @ T69 @T70 @ T70 @T71 @ T71 @T72 @ T72 @T73 @ T73 0_0402_1% 0_0402_1% PAD~D PAD~D PAD~D PAD~D PAD~D PAD~D DDR3_DRAMRST#_CPU 12 XDP_PRDY#_R XDP_PREQ#_R XDP_TCLK_R XDP_TMS_R XDP_TRST#_R XDP_TDI XDP_TDO XDP_DBRESET# XDP_DBRESET# 17 XDP_OBS0 XDP_OBS1 For ESD concern, please put near CPU CONN@ +VCCIO_OUT 1 CPU_SSC_DPLL 10K_0402_5%~D CPU_SSC_DPLL# 1 10K_0402_5%~D SM_RCOMP_0 SM_RCOMP_1 SM_RCOMP_2 SM_DRAMRST DDR3 2 1 @RC128 @ RC128 JTAG 1 @RC136 @ RC136 C 2 RC20 @ 2 RC21 @ PU/PD for JTAG signals +3VS SSC CLOCK TERMINATION, IF NOT USED, stuff RC20,RC21 B XDP_DBRESET# RC19 2 B 1 1K_0402_1%~D +1.05VS NC VCC A GND Y 4 2 5 @ 2 RC17 1K_0402_1%~D UC1 CC140 0.1U_0402_25V6K~D 2 @ 1 2 3 PLT_RST# 1 1 +1.05VS RC135 10K_0402_5%~D +3VS @ 17,43,44,51,53 1 VCCPWRGOOD_0_R Buffered reset to CPU CRB Rev 0.7 no pull up DDR3 COMPENSATION SIGNALS 1 RC10 @ 2 RC54 2 @ 1 0_0402_5%~D CPU_PLTRST#_R RC53 2 @ 1 0_0402_1% 43_0402_5%~D CAD Note: Avoid stub in the PWRGD path while placing resistors RC25 & RC130 2 RC11 20K_0402_5%~D 1 SN74LVC1G07DCKR_SC70-5~D @ RC27 2 @ 1 51_0402_1%~D XDP_TDI RC29 2 @ 1 51_0402_1%~D XDP_PREQ# RC32 2 @ 1 51_0402_1%~D XDP_TDO RC35 2 @ 1 51_0402_1%~D @ 1 51_0402_1%~D CRB Rev 0.7 is depop PCH_PLTRST#_BUF CAD Note: PLACE PULL-UP RESISTOR WITHIN 2 INCH OF THE CPU XDP_TMS 21 CPU_PLTRST# SM_RCOMP0 RC45 1 2 100_0402_1%~D XDP_TCLK RC42 2 SM_RCOMP1 RC55 1 2 75_0402_1%~D XDP_TRST# RC41 2 SM_RCOMP2 RC49 1 2 100_0402_1%~D 1 51_0402_1%~D CAD Note: Trace width=12~15 mil, Spcing=20 mils Max trace length= 500 mil A A Compal Secret Data Security Classification Issued Date 2012/05/28 Deciphered Date 2013/05/27 Title Compal Electronics, Inc. CPU (2/7) PM,XDP,CLK THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.1 LA-9332P Date: 5 4 3 2 Friday, December 14, 2012 1 Sheet 6 of 56 5 4 3 2 1 www.laptopblue.vn Haswell rPGA EDS JCPU1C D 12,14 DDR_A_D[0..63] DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63 C B +V_SM_VREF +DIMM0_1_VREF +DIMM0_1_CA AR15 AT14 AM14 AN14 AT15 AR14 AN15 AM15 AM9 AN9 AM8 AN8 AR9 AT9 AR8 AT8 AJ9 AK9 AJ6 AK6 AJ10 AK10 AJ7 AK7 AF4 AF5 AF1 AF2 AG4 AG5 AG1 AG2 J1 J2 J5 H5 H2 H1 J4 H4 F2 F1 D2 D3 D1 F3 C3 B3 B5 E6 A5 D6 D5 E5 B6 A6 E12 D12 B11 A11 E11 D11 B12 A12 AM3 F16 F13 SA_DQ_0 SA_DQ_1 SA_DQ_2 SA_DQ_3 SA_DQ_4 SA_DQ_5 SA_DQ_6 SA_DQ_7 SA_DQ_8 SA_DQ_9 SA_DQ_10 SA_DQ_11 SA_DQ_12 SA_DQ_13 SA_DQ_14 SA_DQ_15 SA_DQ_16 SA_DQ_17 SA_DQ_18 SA_DQ_19 SA_DQ_20 SA_DQ_21 SA_DQ_22 SA_DQ_23 SA_DQ_24 SA_DQ_25 SA_DQ_26 SA_DQ_27 SA_DQ_28 SA_DQ_29 SA_DQ_30 SA_DQ_31 SA_DQ_32 SA_DQ_33 SA_DQ_34 SA_DQ_35 SA_DQ_36 SA_DQ_37 SA_DQ_38 SA_DQ_39 SA_DQ_40 SA_DQ_41 SA_DQ_42 SA_DQ_43 SA_DQ_44 SA_DQ_45 SA_DQ_46 SA_DQ_47 SA_DQ_48 SA_DQ_49 SA_DQ_50 SA_DQ_51 SA_DQ_52 SA_DQ_53 SA_DQ_54 SA_DQ_55 SA_DQ_56 SA_DQ_57 SA_DQ_58 SA_DQ_59 SA_DQ_60 SA_DQ_61 SA_DQ_62 SA_DQ_63 SM_VREF SA_DIMM_VREFDQ SB_DIMM_VREFDQ 3 OF 9 +1.35V Haswell rPGA EDS RSVD_AC7 SA_CK_N_0 SA_CK_P_0 SA_CKE_0 SA_CK_N_1 SA_CK_P_1 SA_CKE_1 SA_CK_N_2 SA_CK_P_2 SA_CKE_2 SA_CK_N_3 SA_CK_P_3 SA_CKE_3 SA_CS_N_0 SA_CS_N_1 SA_CS_N_2 SA_CS_N_3 SA_ODT_0 SA_ODT_1 SA_ODT_2 SA_ODT_3 SA_BS_0 SA_BS_1 SA_BS_2 RSVD_V10 SA_RAS SA_WE SA_CAS SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8 SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13 SA_MA_14 SA_MA_15 SA_DQS_N_0 SA_DQS_N_1 SA_DQS_N_2 SA_DQS_N_3 SA_DQS_N_4 SA_DQS_N_5 SA_DQS_N_6 SA_DQS_N_7 SA_DQS_P_0 SA_DQS_P_1 SA_DQS_P_2 SA_DQS_P_3 SA_DQS_P_4 SA_DQS_P_5 SA_DQS_P_6 SA_DQS_P_7 AC7 U4 V4 AD9 U3 V3 AC9 U2 V2 AD8 U1 V1 AC8 M_CLK_DDR#0 M_CLK_DDR0 DDR_CKE0_DIMMA M_CLK_DDR#1 M_CLK_DDR1 DDR_CKE1_DIMMA M_CLK_DDR#4 M_CLK_DDR4 DDR_CKE4_DIMMC M_CLK_DDR#5 M_CLK_DDR5 DDR_CKE5_DIMMC M7 L9 M9 M10 M8 L7 L8 L10 V5 U5 AD1 DDR_CS0_DIMMA# DDR_CS1_DIMMA# DDR_CS4_DIMMC# DDR_CS5_DIMMC# M_ODT0 M_ODT1 M_ODT4 M_ODT5 DDR_A_BS0 DDR_A_BS1 DDR_A_BS2 V10 U6 U7 U8 DDR_A_RAS# DDR_A_WE# DDR_A_CAS# V8 AC6 V9 U9 AC5 AC4 AD6 AC3 AD5 AC2 V6 AC1 AD4 V7 AD3 AD2 DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15 AP15 AP8 AJ8 AF3 J3 E2 C5 C11 AP14 AP9 AK8 AG3 H3 E3 C6 C12 DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7 DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7 @T67 @ T67 13,15 PAD~D M_CLK_DDR#0 14 M_CLK_DDR0 14 DDR_CKE0_DIMMA M_CLK_DDR#1 14 M_CLK_DDR1 14 DDR_CKE1_DIMMA M_CLK_DDR#4 12 M_CLK_DDR4 12 DDR_CKE4_DIMMC M_CLK_DDR#5 12 M_CLK_DDR5 12 DDR_CKE5_DIMMC DDR_CS0_DIMMA# DDR_CS1_DIMMA# DDR_CS4_DIMMC# DDR_CS5_DIMMC# M_ODT0 14 M_ODT1 14 M_ODT4 12 M_ODT5 12 DDR_A_BS0 12,14 DDR_A_BS1 12,14 DDR_A_BS2 12,14 DDR_A_RAS# 12,14 DDR_A_WE# 12,14 DDR_A_CAS# 12,14 DDR_A_MA[0..15] DDR_A_DQS#[0..7] DDR_A_DQS[0..7] DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63 14 14 12 12 14 14 12 12 12,14 12,14 12,14 AR18 AT18 AM17 AM18 AR17 AT17 AN17 AN18 AT12 AR12 AN12 AM11 AT11 AR11 AM12 AN11 AR5 AR6 AM5 AM6 AT5 AT6 AN5 AN6 AJ4 AK4 AJ1 AJ2 AM1 AN1 AK2 AK1 L2 M2 L4 M4 L1 M1 L5 M5 G7 J8 G8 G9 J7 J9 G10 J10 A8 B8 A9 B9 D8 E8 D9 E9 E15 D15 A15 B15 E14 D14 A14 B14 SB_DQ_0 SB_DQ_1 SB_DQ_2 SB_DQ_3 SB_DQ_4 SB_DQ_5 SB_DQ_6 SB_DQ_7 SB_DQ_8 SB_DQ_9 SB_DQ_10 SB_DQ_11 SB_DQ_12 SB_DQ_13 SB_DQ_14 SB_DQ_15 SB_DQ_16 SB_DQ_17 SB_DQ_18 SB_DQ_19 SB_DQ_20 SB_DQ_21 SB_DQ_22 SB_DQ_23 SB_DQ_24 SB_DQ_25 SB_DQ_26 SB_DQ_27 SB_DQ_28 SB_DQ_29 SB_DQ_30 SB_DQ_31 SB_DQ_32 SB_DQ_33 SB_DQ_34 SB_DQ_35 SB_DQ_36 SB_DQ_37 SB_DQ_38 SB_DQ_39 SB_DQ_40 SB_DQ_41 SB_DQ_42 SB_DQ_43 SB_DQ_44 SB_DQ_45 SB_DQ_46 SB_DQ_47 SB_DQ_48 SB_DQ_49 SB_DQ_50 SB_DQ_51 SB_DQ_52 SB_DQ_53 SB_DQ_54 SB_DQ_55 SB_DQ_56 SB_DQ_57 SB_DQ_58 SB_DQ_59 SB_DQ_60 SB_DQ_61 SB_DQ_62 SB_DQ_63 4 OF 9 +1.35V INTEL_HASWELL_HASWELL D JCPU1D DDR_B_D[0..63] +1.35V RSVD SB_CKN0 SB_CK0 SB_CKE_0 SB_CKN1 SB_CK1 SB_CKE_1 SB_CKN2 SB_CK2 SB_CKE_2 SB_CKN3 SB_CK3 SB_CKE_3 SB_CS_N_0 SB_CS_N_1 SB_CS_N_2 SB_CS_N_3 SB_ODT_0 SB_ODT_1 SB_ODT_2 SB_ODT_3 SB_BS_0 SB_BS_1 SB_BS_2 RSVD SB_RAS SB_WE SB_CAS SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8 SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 SB_MA_14 SB_MA_15 SB_DQS_N_0 SB_DQS_N_1 SB_DQS_N_2 SB_DQS_N_3 SB_DQS_N_4 SB_DQS_N_5 SB_DQS_N_6 SB_DQS_N_7 SB_DQS_P_0 SB_DQS_P_1 SB_DQS_P_2 SB_DQS_P_3 SB_DQS_P_4 SB_DQS_P_5 SB_DQS_P_6 SB_DQS_P_7 AG8 @ T76 Y4 M_CLK_DDR#2 AA4 M_CLK_DDR2 AF10 DDR_CKE2_DIMMB Y3 M_CLK_DDR#3 AA3 M_CLK_DDR3 AG10 DDR_CKE3_DIMMB Y2 M_CLK_DDR#6 AA2 M_CLK_DDR6 AG9 DDR_CKE6_DIMMD Y1 M_CLK_DDR#7 AA1 M_CLK_DDR7 AF9 DDR_CKE7_DIMMD P4 R2 P3 P1 DDR_CS2_DIMMB# DDR_CS3_DIMMB# DDR_CS6_DIMMD# DDR_CS7_DIMMD# R4 R3 R1 P2 R7 P8 AA9 M_ODT2 M_ODT3 M_ODT6 M_ODT7 DDR_B_BS0 DDR_B_BS1 DDR_B_BS2 PAD~D M_CLK_DDR#2 15 M_CLK_DDR2 15 DDR_CKE2_DIMMB M_CLK_DDR#3 15 M_CLK_DDR3 15 DDR_CKE3_DIMMB M_CLK_DDR#6 13 M_CLK_DDR6 13 DDR_CKE6_DIMMD M_CLK_DDR#7 13 M_CLK_DDR7 13 DDR_CKE7_DIMMD DDR_CS2_DIMMB# DDR_CS3_DIMMB# DDR_CS6_DIMMD# DDR_CS7_DIMMD# M_ODT2 M_ODT3 M_ODT6 M_ODT7 DDR_B_BS0 DDR_B_BS1 DDR_B_BS2 R10 R6 DDR_B_RAS# P6 DDR_B_WE# P7 DDR_B_CAS# R8 Y5 Y10 AA5 Y7 AA6 Y6 AA7 Y8 AA10 R9 Y9 AF7 P9 AA8 AG7 DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15 AP18 AP11 AP5 AJ3 L3 H9 C8 C14 AP17 AP12 AP6 AK3 M3 H8 C9 C15 DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7 DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7 15 15 13 13 15 15 13 13 15 15 13 13 13,15 13,15 13,15 DDR_B_RAS# 13,15 DDR_B_WE# 13,15 DDR_B_CAS# 13,15 DDR_B_MA[0..15] C 13,15 DDR_B_DQS#[0..7] 13,15 DDR_B_DQS[0..7] 13,15 B INTEL_HASWELL_HASWELL CONN@ 1 1 +V_SM_VREF RC146 2 1 2 1 CC139 0.022U_0402_25V7K~D 2 2_0402_1%~D 2 1 2 1 2 RC151 24.9_0402_1% RC149 24.9_0402_1% A 2 2 2 2_0402_1%~D +V_SM_VREF_CNT RC78 1K_0402_1%~D 1 1 CC138 0.022U_0402_25V7K~D RC81 1K_0402_1%~D 2 RC82 1K_0402_1%~D RC150 24.9_0402_1% A 2_0402_1%~D 1 1 1 CC137 0.022U_0402_25V7K~D 1 2 +DIMM0_1_VREF_CPU 2 1 2 2 RC148 2 1 +DIMM0_1_VREF +DIMM0_1_CA_CPU RC86 1K_0402_1%~D RC147 RC95 1K_0402_1%~D +DIMM0_1_CA RC96 1K_0402_1%~D 1 CONN@ Compal Secret Data Security Classification Issued Date 2012/05/28 2013/05/27 Deciphered Date Title Compal Electronics, Inc. CPU (3/7) DDRIII THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.1 LA-9332P Date: 5 4 3 2 Friday, December 14, 2012 Sheet 1 7 of 56 5 4 3 2 www.laptopblue.vn 1 COMPENSATION PU FOR eDP +VCOMP_OUT 2 EDP_COMP 24.9_0402_1%~D D 1 RC1 D CAD Note:Trace width=20 mils ,Spacing=25mil, Max length=100 mils. Haswell rPGA EDS 36 36 36 36 36 36 36 36 HDMI 31 31 31 31 31 31 31 31 mDP C DMC 39 39 39 39 39 39 39 39 CPU_HDMI_N2 CPU_HDMI_P2 CPU_HDMI_N1 CPU_HDMI_P1 CPU_HDMI_N0 CPU_HDMI_P0 CPU_HDMI_N3 CPU_HDMI_P3 T28 U28 T30 U30 U29 V29 U31 V31 CPU_mDP_N0 CPU_mDP_P0 CPU_mDP_N1 CPU_mDP_P1 CPU_mDP_N2 CPU_mDP_P2 CPU_mDP_N3 CPU_mDP_P3 CPU_mDP_N0 CPU_mDP_P0 CPU_mDP_N1 CPU_mDP_P1 CPU_mDP_N2 CPU_mDP_P2 CPU_mDP_N3 CPU_mDP_P3 T34 U34 U35 V35 U32 T32 U33 V33 CPU_DPD_DMC_N0 CPU_DPD_DMC_P0 CPU_DPD_DMC_N1 CPU_DPD_DMC_P1 CPU_DPD_DMC_N2 CPU_DPD_DMC_P2 CPU_DPD_DMC_N3 CPU_DPD_DMC_P3 CPU_DPD_DMC_N0 CPU_DPD_DMC_P0 CPU_DPD_DMC_N1 CPU_DPD_DMC_P1 CPU_DPD_DMC_N2 CPU_DPD_DMC_P2 CPU_DPD_DMC_N3 CPU_DPD_DMC_P3 P29 R29 N28 P28 P31 R31 N30 P30 CPU_HDMI_N2 CPU_HDMI_P2 CPU_HDMI_N1 CPU_HDMI_P1 CPU_HDMI_N0 CPU_HDMI_P0 CPU_HDMI_N3 CPU_HDMI_P3 DDIB_TXBN_0 DDIB_TXBP_0 DDIB_TXBN_1 DDIB_TXBP_1 DDIB_TXBN_2 DDIB_TXBP_2 DDIB_TXBN_3 DDIB_TXBP_3 JCPU1H eDP EDP_AUXN EDP_AUXP EDP_HPD EDP_RCOMP RSVD EDP_TXN_0 EDP_TXP_0 EDP_TXN_1 EDP_TXP_1 FDI_TXN_0 FDI_TXP_0 FDI_TXN_1 FDI_TXP_1 DDIC_TXCN_0 DDIC_TXCP_0 DDIC_TXCN_1 DDIC_TXCP_1 DDIC_TXCN_2 DDIC_TXCP_2 DDIC_TXCN_3 DDIC_TXCP_3 M27 N27 P27 E24 R27 CPU_EDP_AUX# CPU_EDP_AUX EDP_HPD EDP_COMP CPU_EDP_AUX# CPU_EDP_AUX 40 40 PAD~D T77 @ P35 R35 N34 P34 P33 R33 N32 P32 CPU_EDP_N0 CPU_EDP_P0 CPU_EDP_N1 CPU_EDP_P1 CPU_EDP_N0 CPU_EDP_P0 CPU_EDP_N1 CPU_EDP_P1 40 40 40 40 C DDID_TXDN_0 DDID_TXDP_0 DDID_TXDN_1 DDID_TXDP_1 DDID_TXDN_2 DDID_TXDP_2 DDID_TXDN_3 DDID_TXDP_3 DDI INTEL_HASWELL_HASWELL 8 OF 9 CONN@ 1 +VCCIO_OUT HPD INVERSION FOR EDP 10K_0402_5%~D RC65 B 2 B 1 S 2 G 2 RC75 100K_0402_5%~D 1 CPU_EDP_HPD# QC10 BSS138_SOT23~D 40 3 EDP_HPD D A A Compal Secret Data Security Classification Issued Date 2012/05/28 2013/05/27 Deciphered Date Title Compal Electronics, Inc. CPU (4/7) FDI,eDP,DDI THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.1 LA-9332P Date: 5 4 3 2 Friday, December 14, 2012 Sheet 1 8 of 56 5 4 3 2 1 www.laptopblue.vn CFG STRAPS for CPU 2 @RC76 @ RC76 1K_0402_1%~D 1 CFG2 D D PEG Static Lane Reversal - CFG2 is for the 16x 1:(Default) Normal Operation; Lane # definition matches socket pin map definition CFG2 0:Lane Reversed Haswell rPGA EDS JCPU1I CFG4 @ T83 PAD~D @T83 @ T108PAD~D @T108PAD~D +VCC_CORE @ T82 PAD~D @T82 @T94 @ T94 PAD~D C35 B35 @T85 @ T85 PAD~D AL25 @ T84 PAD~D @T84 @T86 @ T86 PAD~D H_CPU_TESTLO CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 AT20 AR20 AP20 AP22 AT22 AN22 AT25 AN23 AR24 AT23 AN20 AP24 AP26 AN25 AN26 AP25 CFG_RCOMP CFG_16 CFG_18 CFG_17 CFG_19 RSVD_TP RSVD_TP RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD_TP RSVD RSVD TESTLO RSVD CFG_0 CFG_1 CFG_2 CFG_3 CFG_4 CFG_5 CFG_6 CFG_7 CFG_8 CFG_9 CFG_10 CFG_11 CFG_12 CFG_13 CFG_14 CFG_15 RSVD RSVD NC RSVD RSVD_TP RSVD_TP RSVD_TP RSVD RSVD RSVD RSVD AT31 AR21 AR23 AP21 AP23 CFG_RCOMP CFG16 CFG18 CFG17 CFG19 CFG16 CFG18 CFG17 CFG19 1 C 6 6 6 6 AR33 G6 AM27 AM26 F5 AM2 K6 PAD~D PAD~D PAD~D PAD~D PAD~D PAD~D PAD~D E18 PAD~D T96 @ U10 P10 PAD~D T98 @ PAD~D T97 @ B1 A2 AR1 PAD~D T100 @ PAD~D T109 @ E21 E20 PAD~D T102 @ PAD~D T107 @ Display Port Presence Strap T91 @ T104@ T92 @ T89 @ T93 @ T95 @ T111@ CFG6 CFG5 AP27 AR26 AL31 AL32 PAD~D T105 @ PAD~D T106 @ B 2 RC60 2 RC58 2 RC59 1 H_CPU_TESTLO 49.9_0402_1%~D 1 CFG_RCOMP 49.9_0402_1%~D 1 H_CPU_RSVD 49.9_0402_1%~D INTEL_HASWELL_HASWELL 1 : Disabled; No Physical Display Port attached to Embedded Display Port 0 : Enabled; An external Display Port device is connected to the Embedded Display Port CFG4 @ RC92 1K_0402_1%~D CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 RSVD RSVD RSVD RSVD RSVD RSVD VCC RC90 1K_0402_1%~D 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 W30 W31 W34 RSVD_TP RSVD_TP T99 @ T90 @ T87 @ T88 @ 2 W29 W28 H_CPU_RSVD G26 W33 AL30 AL29 F25 PAD~D PAD~D PAD~D PAD~D 1 @ T79 PAD~D @T79 @ T101PAD~D @T101PAD~D C23 B23 D24 D23 2 A34 A35 RSVD_TP RSVD_TP RSVD_TP RSVD_TP 1 @T110PAD~D @ T110PAD~D @T81 @ T81 PAD~D RSVD_TP RSVD_TP RSVD 2 AT1 AT2 AD10 RC77 1K_0402_1%~D C @T103PAD~D @ T103PAD~D @T80 @ T80 PAD~D @T78 @ T78 PAD~D 9 OF 9 CONN@ CFG[6:5] PCIE Port Bifurcation Straps 11: (Default) x16 - Device 1 functions 1 and 2 disabled 10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled 01: Reserved - (Device 1 function 1 disabled ; function 2 enabled) 00: x8,x4,x4 - Device 1 functions 1 and 2 enabled B 2 PEG DEFER TRAINING 1: (Default) PEG Train immediately following xxRESETB de assertion 0: PEG Wait for BIOS for training CFG7 A Compal Secret Data Security Classification Issued Date @RC91 @ RC91 1K_0402_1%~D 1 CFG7 2012/05/28 2013/05/27 Deciphered Date Title A Compal Electronics, Inc. CPU (5/7) RSVD,CFG THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.1 LA-9332P Date: 5 4 3 2 Friday, December 14, 2012 Sheet 1 9 of 56 5 4 3 +1.35V 2 1 www.laptopblue.vn +1.35V_CPU_VDDQ @ JP4 1 2 PAD-OPEN 4x4m @ JP5 1 4 3 1 2 4 RUN_ON_CPU1.5VS3# 1 2 1 1 2 1 2 6 1 2 2 @ T113 @T113 @T114 @ T114 @T112 @ T112 @T116 @ T116 @ RC73 20K_0402_5%~D @ @ @ CC136 0.022U_0402_25V7K~D @ RC143 1M_0402_5%~D 1 RC79 @ RUN_ON_CPU1.5VS3 QC4B DMN66D0LDW-7_SOT363-6~D CPU1.5V_S3_GATE 2 0_0402_5%~D 2 0_0402_5%~D @ 1 @ 5 QC4A DMN66D0LDW-7_SOT363-6~D 43 1 RC93 1 2 3 CC135 10U_0603_6.3V6M~D RC72 330K_0402_5%~D RC74 100K_0402_5%~D @ 8 7 6 5 D JCPU1E +1.35V_CPU_VDDQ 2 B+_BIAS RUN_ON_CPU1.5VS3# SUSP# +VCC_CORE Haswell rPGA EDS @ QC3 AO4304L_SO8 +1.35V +3VALW 43,56,59,60,61 2 PAD-OPEN 4x4m +1.35V_CPU_VDDQ Source D K27 L27 T27 V27 PAD~D PAD~D PAD~D PAD~D VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC RSVD RSVD RSVD RSVD +1.35V_CPU_VDDQ +1.35V @ CC151 2 CC152 2 AB11 AB2 AB5 AB8 AE11 AE2 AE5 AE8 AH11 K11 N11 N8 T11 T2 T5 T8 W11 W2 W5 W8 1 0.1U_0402_10V7K~D 1 0.1U_0402_10V7K~D @ @ 56,6 @T115 @ T115 N26 K26 AL27 AK27 PAD~D +VCC_CORE @ T151 @T151 @T152 @ T152 PAD~D PAD~D VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ RSVD VCC RSVD RSVD C +1.05VS SVID ALERT 2 1 2 CAD Note: Place the PU resistors close to CPU RC60 close to CPU 300 - 1500mils 2 VIDALERT_N 1 @ RC4 RC61 75_0402_1%~D 62 +VCCIO_OUT +VCCIO_OUT 1 VCCSENSE_R 0_0603_5%~D @T153 @ T153 RESISTOR STUFFING OPTIONS ARE PROVIDED FOR TESTING PURPOSES 1 2 2 6 CPU_PWR_DEBUG @ VIDSOUT AP35 H27 AP34 AT35 AR35 AR32 AL26 AT34 AL22 AT33 AM21 AM25 AM22 AM20 AM24 AL19 AM23 AT32 CPU_PWR_DEBUG @ T157 @T157 @T158 @ T158 @T162 @ T162 @T163 @ T163 PAD~D PAD~D PAD~D PAD~D 2 CAD Note: RC67 SHOULD BE PLACED CLOSE TO CPU CC194 1 VCCSENSE_R 0_0402_1% +1.35V_CPU_VDDQ 0.1U_0402_25V6K~D 2 2 + 2 1 + 2 VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC INTEL_HASWELL_HASWELL C B U25 U26 V25 V26 W26 W27 5 OF 9 CONN@ @ @ @ @ 1 2 1 2 @ 1 C_0805NEW 2 C_0805NEW 1 C_0805NEW 2 C_0805NEW 1 C_0805NEW 2 2 CC191 22U_0805_6.3V6M~D 1 CC190 22U_0805_6.3V6M~D 2 CC189 22U_0805_6.3V6M~D 1 CC188 22U_0805_6.3V6M~D 2 CC187 22U_0805_6.3V6M~D 1 CC186 22U_0805_6.3V6M~D 2 CC185 22U_0805_6.3V6M~D 1 CC184 22U_0805_6.3V6M~D 2 CC183 22U_0805_6.3V6M~D 1 CC182 22U_0805_6.3V6M~D 2 CC181 22U_0805_6.3V6M~D 1 C_0805NEW 1 RC70 100_0402_1%~D 2 2 1 CC171 330U_D2_2VM_R6M~D 2 @1 CC167 330U_D2_2VM_R6M~D 2 @1 CC166 10U_0603_6.3V6M~D 2 CC165 10U_0603_6.3V6M~D 2 @1 CC164 10U_0603_6.3V6M~D 2 @1 CC163 10U_0603_6.3V6M~D 2 @1 CC162 10U_0603_6.3V6M~D 2 1 CC161 10U_0603_6.3V6M~D 11 1 CC168 10U_0603_6.3V6M~D VSSSENSE_R 1 CC169 10U_0603_6.3V6M~D VSSSENSE 1 CC170 10U_0603_6.3V6M~D 62 1 VSSSENSE_R 0_0402_1% CC180 10U_0603_6.3V6M~D 1 @ Y25 Y26 Y27 Y28 Y29 Y30 Y31 Y32 Y33 Y34 Y35 VDDQ DECOUPLING @ 2 C_0805NEW 1 C_0805NEW @ CAD Note: RC68 SHOULD BE PLACED CLOSE TO CPU RC68 2 VSSSENSE VSS PWR_DEBUG RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD +VCC_CORE @ RC67 2 VCCSENSE VIDALERT VIDSCLK VIDSOUT CC193 2 C_0805NEW VCCSENSE VCC_SENSE RSVD VCCIO_OUT VCCIO2PCH VCCIOA_OUT RSVD RSVD VSS RSVD 1 C_0805NEW 1 2 62 RC66 100_0402_1%~D VCC_SENSE 0.1U_0402_25V6K~D +VCC_CORE B AL35 E17 AN35 A23 F22 W32 AL16 J27 AL13 H_CPU_SVIDALRT# AM28 AM29 VIDSCLK AL28 VIDSOUT @ VIDSOUT CAD Note: Place the PU resistors close to CPU RC63 close to CPU 300 - 1500mils CC192 1 1 2 62 1 PAD~D PAD~D PAD~D PAD~D VIDSCLK RC71 10K_0402_5%~D 0.1U_0402_25V6K~D RC63 130_0402_1%~D 62 RC80 150_0402_5%~D +VCCIO_OUT SVID DATA @T160 @ T160 @ T159 @T159 @T177 @ T177 @T154 @ T154 +1.05VS H_CPU_SVIDALRT# RC69 43_0402_5%~D PAD~D +VCCIO_OUT @ T156 PAD~D +VCOMP_OUT AA26 AA28 AA34 AA30 AA32 AB26 AB29 AB25 AB27 AB28 AB30 AB31 AB33 AB34 AB32 AC26 AB35 AC28 AD25 AC30 AD28 AC32 AD31 AC34 AD34 AD26 AD27 AD29 AD30 AD32 AD33 AD35 AE26 AE32 AE28 AE30 AG28 AG34 AE34 AF25 AF26 AF27 AF28 AF29 AF30 AF31 AF32 AF33 AF34 AF35 AG26 AH26 AH29 AG30 AG32 AH32 AH35 AH25 AH27 AH28 AH30 AH31 AH33 AH34 AJ25 AJ26 AJ27 AJ28 AJ29 AJ30 AJ31 AJ32 AJ33 AJ34 AJ35 G25 H25 J25 K25 L25 M25 N25 P25 R25 T25 @ A A Compal Secret Data Security Classification Issued Date 2012/05/28 Deciphered Date 2013/05/27 Title Compal Electronics, Inc. CPU (6/7) PWR THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.1 LA-9332P Date: 5 4 3 2 Friday, December 14, 2012 1 Sheet 10 of 56 5 4 3 2 1 www.laptopblue.vn Haswell rPGA EDS D A10 A13 A16 A19 A22 A25 A27 A29 A3 A31 A33 A4 A7 AA11 AA25 AA27 AA31 AA29 AB1 AB10 AA33 AA35 AB3 AC25 AC27 AB4 AB6 AB7 AB9 AC11 AD11 AC29 AC31 AC33 AC35 AD7 AE1 AE10 AE25 AE29 AE3 AE27 AE35 AE4 AE6 AE7 AE9 AF11 AF6 AF8 AG11 AG25 AE31 AG31 AE33 AG6 AH1 AH10 AH2 AG27 AG29 AH3 AG33 AG35 AH4 AH5 AH6 AH7 AH8 AH9 AJ11 AJ5 AK11 AK25 AK26 AK28 AK29 AK30 AK32 E19 C B Haswell rPGA EDS JCPU1F VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS RSVD VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS INTEL_HASWELL_HASWELL AK34 AK5 AL1 AL10 AL11 AL12 AL14 AL15 AL17 AL18 AL2 AL20 AL21 AL23 E22 AL3 AL4 AL5 AL6 AL7 AL8 AL9 AM10 AM13 AM16 AM19 E25 AM32 AM4 AM7 AN10 AN13 AN16 AN19 AN2 AN21 AN24 AN27 AN30 AN34 AN4 AN7 AP1 AP10 AP13 AP16 AP19 AP4 AP7 W25 AR10 AR13 AR16 AR19 AR2 AR22 AR25 AR28 AR31 AR34 AR4 AR7 AT10 AT13 AT16 AT19 AT21 AT24 AT27 AT3 AT30 AT4 AT7 B10 B13 B16 B19 B2 B22 B34 B4 B7 C1 C10 C13 C16 C19 C2 C22 C24 C26 C28 C30 C32 C34 C4 C7 D10 D13 D16 D19 D22 D25 D27 D29 D31 D33 D35 D4 D7 E1 E10 E13 E16 E4 E7 F10 F11 F12 F14 F15 F17 F18 F20 F21 F23 F24 F26 F28 F30 F32 F34 F4 F6 F7 F8 F9 G1 G11 G2 G27 G29 G3 G31 G33 G35 G4 G5 H10 H26 H6 H7 J11 J26 J28 J30 J32 J34 J6 K1 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS RSVD VSS VSS VSS VSS VSS 6 OF 9 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS RSVD RSVD RSVD RSVD VSS_SENSE RSVD INTEL_HASWELL_HASWELL CONN@ D JCPU1G K10 K2 K29 K3 K31 K33 K35 K4 K5 K7 K8 K9 L11 L26 L6 M11 M26 M28 M30 M32 M34 M6 N1 N10 N2 N29 N3 N31 N33 N35 N4 N5 N6 N7 N9 P11 P26 P5 R11 R26 R28 R30 R32 R34 R5 T1 T10 T29 T3 T31 T33 T35 T4 T6 T7 T9 U11 U27 V11 V28 V30 V32 V34 W1 W10 W3 W35 W4 W6 W7 W9 Y11 H11 AL24 F19 T26 AK35 AK33 C B VSSSENSE_R 10 PAD~D T120 @ 7 OF 9 CONN@ A A Compal Secret Data Security Classification Issued Date 2012/05/28 2013/05/27 Deciphered Date Title Compal Electronics, Inc. CPU (7/7) VSS THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.1 LA-9332P Date: 5 4 3 2 Friday, December 14, 2012 Sheet 1 11 of 56 5 4 3 2 1 www.laptopblue.vn @ 2 JDIMMA H=9.2mm D 13,14,15 +DIMM0_1_VREF_CPU +1.35V DDR3_DRAMRST#_R RD29 DDR3_DRAMRST#_R +1.35V 1 RD27 1K_0402_5%~D 1 +1.35V CRB Rev 0.7 is depop D 2 DDR3_DRAMRST#_CPU 0_0402_5%~D 6 JDIMA0 @ 14,7 2 1 2 CD2 0.1U_0402_25V6K~D 1 CD1 2.2U_0402_6.3V6M All VREF traces should have 20 mil trace width DDR_A_DQS#[0..7] 14,7 DDR_A_D[0..63] 14,7 DDR_A_DQS[0..7] 14,7 DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D8 DDR_A_D9 DDR_A_DQS#1 DDR_A_DQS1 DDR_A_D10 DDR_A_D11 DDR_A_MA[0..15] DDR_A_D16 DDR_A_D17 DDR_A_DQS#2 DDR_A_DQS2 DDR_A_D18 DDR_A_D19 Layout Note: Place near JDIMMA DDR_A_D24 DDR_A_D25 +1.35V DDR_A_D26 DDR_A_D27 C 1 2 1 2 CD6 1U_0402_6.3V6K~D 2 CD5 1U_0402_6.3V6K~D 1 CD4 1U_0402_6.3V6K~D @2 CD3 1U_0402_6.3V6K~D 1 7 DDR_CKE4_DIMMC 14,7 DDR_A_BS2 DDR_CKE4_DIMMC DDR_A_BS2 DDR_A_MA12 DDR_A_MA9 DDR_A_MA8 DDR_A_MA5 DDR_A_MA3 DDR_A_MA1 +1.35V 2 1 + 2 CD14 330U_SX_2VY~D 2 1 @CD13 @ CD13 10U_0603_6.3V6M~D 2 1 CD74 10U_0603_6.3V6M~D 2 1 CD11 10U_0603_6.3V6M~D 2 1 CD10 10U_0603_6.3V6M~D 2 1 CD9 10U_0603_6.3V6M~D 2 1 CD8 10U_0603_6.3V6M~D 1 CD7 10U_0603_6.3V6M~D @ 7 7 7 M_CLK_DDR4 M_CLK_DDR#4 14,7 DDR_A_BS0 14,7 14,7 DDR_A_WE# DDR_A_CAS# DDR_CS5_DIMMC# M_CLK_DDR4 M_CLK_DDR#4 DDR_A_MA10 DDR_A_BS0 DDR_A_WE# DDR_A_CAS# DDR_A_MA13 DDR_CS5_DIMMC# DDR_A_D34 DDR_A_D35 B DDR_A_D40 DDR_A_D41 Layout Note: Place near JDIMMA.203,204 DDR_A_D42 DDR_A_D43 DDR_A_D48 DDR_A_D49 DDR_A_DQS#6 DDR_A_DQS6 +0.675VS 2 DDR_A_D56 DDR_A_D57 2 RD38 10K_0402_5%~D @ RD39 10K_0402_5%~D DDR_A_D58 DDR_A_D59 1 1 DDR_A_D50 DDR_A_D51 1 2 +3VS 2 1 CD20 1U_0402_6.3V6K~D 2 CD19 1U_0402_6.3V6K~D 1 CD18 1U_0402_6.3V6K~D 2 CD17 1U_0402_6.3V6K~D 1 @ DIMA0 1 DIMB0 0 0 DIMA1 0 1 DIMB1 2 2 1 1 RD22 0_0402_1% 2 1 2 CD22 2.2U_0402_6.3V6M 0 1 @ CD21 0.1U_0402_25V6K~D SA0 SA1 1 RD21 @ 10K_0402_5%~D 1 +3VS +0.675VS 205 CKE0 VDD1 NC1 BA2 VDD3 A12/BC# A9 VDD5 A8 A5 VDD7 A3 A1 VDD9 CK0 CK0# VDD11 A10/AP BA0 VDD13 WE# CAS# VDD15 A13 S1# VDD17 NCTEST VSS27 DQ32 DQ33 VSS29 DQS#4 DQS4 VSS32 DQ34 DQ35 VSS34 DQ40 DQ41 VSS36 DM5 VSS37 DQ42 DQ43 VSS39 DQ48 DQ49 VSS41 DQS#6 DQS6 VSS44 DQ50 DQ51 VSS46 DQ56 DQ57 VSS48 DM7 VSS49 DQ58 DQ59 VSS51 SA0 VDDSPD SA1 VTT1 VSS1 DQ4 DQ5 VSS3 DQS#0 DQS0 VSS6 DQ6 DQ7 VSS8 DQ12 DQ13 VSS10 DM1 RESET# VSS12 DQ14 DQ15 VSS14 DQ20 DQ21 VSS16 DM2 VSS17 DQ22 DQ23 VSS19 DQ28 DQ29 VSS21 DQS#3 DQS3 VSS24 DQ30 DQ31 VSS26 CKE1 VDD2 A15 A14 VDD4 A11 A7 VDD6 A6 A4 VDD8 A2 A0 VDD10 CK1 CK1# VDD12 BA1 RAS# VDD14 S0# ODT0 VDD16 ODT1 NC2 VDD18 VREF_CA VSS28 DQ36 DQ37 VSS30 DM4 VSS31 DQ38 DQ39 VSS33 DQ44 DQ45 VSS35 DQS#5 DQS5 VSS38 DQ46 DQ47 VSS40 DQ52 DQ53 VSS42 DM6 VSS43 DQ54 DQ55 VSS45 DQ60 DQ61 VSS47 DQS#7 DQS7 VSS50 DQ62 DQ63 VSS52 EVENT# SDA SCL VTT2 G1 G2 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204 DDR_A_D4 DDR_A_D5 DDR_A_DQS#0 DDR_A_DQS0 DDR_A_D6 DDR_A_D7 DDR_A_D12 DDR_A_D13 DDR3_DRAMRST#_R DDR_A_D14 DDR_A_D15 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D28 DDR_A_D29 DDR_A_DQS#3 DDR_A_DQS3 DDR_A_D30 DDR_A_D31 DDR_CKE5_DIMMC C DDR_CKE5_DIMMC 7 DDR_A_MA15 DDR_A_MA14 DDR_A_MA11 DDR_A_MA7 DDR_A_MA6 DDR_A_MA4 DDR_A_MA2 DDR_A_MA0 M_CLK_DDR5 M_CLK_DDR#5 DDR_A_BS1 DDR_A_RAS# DDR_CS4_DIMMC# M_ODT4 M_CLK_DDR5 M_CLK_DDR#5 7 7 DDR_A_BS1 DDR_A_RAS# 14,7 14,7 DDR_CS4_DIMMC# M_ODT4 7 M_ODT5 M_ODT5 7 7 +V_SM_VREF_CNT All VREF traces should have 20 mil trace width DDR_A_D36 DDR_A_D37 1 DDR_A_D38 DDR_A_D39 2 DDR_A_D44 DDR_A_D45 1 2 CD16 0.1U_0402_25V6K~D DDR_A_DQS#4 DDR_A_DQS4 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203 VREF_DQ VSS2 DQ0 DQ1 VSS4 DM0 VSS5 DQ2 DQ3 VSS7 DQ8 DQ9 VSS9 DQS#1 DQS1 VSS11 DQ10 DQ11 VSS13 DQ16 DQ17 VSS15 DQS#2 DQS2 VSS18 DQ18 DQ19 VSS20 DQ24 DQ25 VSS22 DM3 VSS23 DQ26 DQ27 VSS25 CD15 2.2U_0402_6.3V6M DDR_A_D32 DDR_A_D33 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 B DDR_A_DQS#5 DDR_A_DQS5 DDR_A_D46 DDR_A_D47 DDR_A_D52 DDR_A_D53 CPU DDR_A_D54 DDR_A_D55 DDR_A_D60 DDR_A_D61 TOP BOT DDR_A_DQS#7 DDR_A_DQS7 CH A1 (H9.2)(Std) CH B1 (H5.2)(Std) CH B0 (H5.2) (Rev) DIMM B0 DIMM A1 DIMM B1 CH A0 (H9.2) (Rev) DIMM A0 DDR_A_D62 DDR_A_D63 M_THERMAL# M_THERMAL# PCH_SMBDATA PCH_SMBCLK 13,14,15,43 13,14,15,19,49,50,51,53,6 13,14,15,19,49,50,51,53,6 +0.675VS 206 TYCO_2-2013311-1 CONN@ A A Compal Secret Data Security Classification Issued Date 2012/05/28 Deciphered Date 2013/05/27 Title Compal Electronics, Inc. DDRIII DIMMA THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.1 LA-9332P Date: 5 4 3 2 Friday, December 14, 2012 1 Sheet 12 of 56 5 4 3 2 1 www.laptopblue.vn JDIMMB H=5.2mm D D +DIMM0_1_CA_CPU +1.35V +1.35V JDIMB0 15,7 2 1 2 CD24 0.1U_0402_25V6K~D @ All VREF traces should have 20 mil trace width CD23 2.2U_0402_6.3V6M 1 DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D8 DDR_B_D9 DDR_B_DQS#[0..7] DDR_B_DQS#1 DDR_B_DQS1 15,7 DDR_B_D[0..63] 15,7 DDR_B_DQS[0..7] 15,7 DDR_B_D10 DDR_B_D11 DDR_B_MA[0..15] DDR_B_D16 DDR_B_D17 DDR_B_DQS#2 DDR_B_DQS2 DDR_B_D18 DDR_B_D19 Layout Note: Place near JDIMMB DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 C +1.35V 2 1 2 @ CD28 1U_0402_6.3V6K~D 2 1 CD27 1U_0402_6.3V6K~D 1 CD26 1U_0402_6.3V6K~D 2 CD25 1U_0402_6.3V6K~D 1 7 DDR_CKE6_DIMMD 15,7 DDR_B_BS2 DDR_CKE6_DIMMD DDR_B_BS2 DDR_B_MA12 DDR_B_MA9 DDR_B_MA8 DDR_B_MA5 DDR_B_MA3 DDR_B_MA1 +1.35V 7 7 2 1 + 2 CD36 330U_SX_2VY~D 2 1 @ CD35 10U_0603_6.3V6M~D 2 1 CD34 10U_0603_6.3V6M~D 2 1 CD33 10U_0603_6.3V6M~D 2 1 CD32 10U_0603_6.3V6M~D 2 1 CD31 10U_0603_6.3V6M~D 2 1 CD30 10U_0603_6.3V6M~D 1 CD29 10U_0603_6.3V6M~D @ M_CLK_DDR6 M_CLK_DDR#6 15,7 DDR_B_BS0 15,7 15,7 DDR_B_WE# DDR_B_CAS# 7 DDR_CS7_DIMMD# M_CLK_DDR6 M_CLK_DDR#6 DDR_B_MA10 DDR_B_BS0 DDR_B_WE# DDR_B_CAS# DDR_B_MA13 DDR_CS7_DIMMD# DDR_B_D34 DDR_B_D35 Layout Note: Place near JDIMMB.203,204 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D48 DDR_B_D49 +0.675VS DDR_B_DQS#6 DDR_B_DQS6 2 DDR_B_D50 DDR_B_D51 DDR_B_D56 DDR_B_D57 2 1 2 @ RD40 10K_0402_5%~D RD24 10K_0402_5%~D 1 2 DDR_B_D58 DDR_B_D59 1 1 CD42 1U_0402_6.3V6K~D 2 CD41 1U_0402_6.3V6K~D 1 CD40 1U_0402_6.3V6K~D 2 CD39 1U_0402_6.3V6K~D 1 +3VS A DIMA0 1 DIMB0 0 0 DIMA1 0 1 DIMB1 2 1 0 1 1 1 1 @ RD41 10K_0402_5%~D 2 1 2 CD43 2.2U_0402_6.3V6M RD23 @ 10K_0402_5%~D SA0 SA1 CD44 0.1U_0402_25V6K~D 2 +3VS +0.675VS 205 CKE0 VDD1 NC1 BA2 VDD3 A12/BC# A9 VDD5 A8 A5 VDD7 A3 A1 VDD9 CK0 CK0# VDD11 A10/AP BA0 VDD13 WE# CAS# VDD15 A13 S1# VDD17 NCTEST VSS27 DQ32 DQ33 VSS29 DQS#4 DQS4 VSS32 DQ34 DQ35 VSS34 DQ40 DQ41 VSS36 DM5 VSS37 DQ42 DQ43 VSS39 DQ48 DQ49 VSS41 DQS#6 DQS6 VSS44 DQ50 DQ51 VSS46 DQ56 DQ57 VSS48 DM7 VSS49 DQ58 DQ59 VSS51 SA0 VDDSPD SA1 VTT1 VSS1 DQ4 DQ5 VSS3 DQS#0 DQS0 VSS6 DQ6 DQ7 VSS8 DQ12 DQ13 VSS10 DM1 RESET# VSS12 DQ14 DQ15 VSS14 DQ20 DQ21 VSS16 DM2 VSS17 DQ22 DQ23 VSS19 DQ28 DQ29 VSS21 DQS#3 DQS3 VSS24 DQ30 DQ31 VSS26 CKE1 VDD2 A15 A14 VDD4 A11 A7 VDD6 A6 A4 VDD8 A2 A0 VDD10 CK1 CK1# VDD12 BA1 RAS# VDD14 S0# ODT0 VDD16 ODT1 NC2 VDD18 VREF_CA VSS28 DQ36 DQ37 VSS30 DM4 VSS31 DQ38 DQ39 VSS33 DQ44 DQ45 VSS35 DQS#5 DQS5 VSS38 DQ46 DQ47 VSS40 DQ52 DQ53 VSS42 DM6 VSS43 DQ54 DQ55 VSS45 DQ60 DQ61 VSS47 DQS#7 DQS7 VSS50 DQ62 DQ63 VSS52 EVENT# SDA SCL VTT2 G1 G2 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204 DDR_B_D4 DDR_B_D5 DDR_B_DQS#0 DDR_B_DQS0 DDR_B_D6 DDR_B_D7 DDR_B_D12 DDR_B_D13 DDR3_DRAMRST#_R DDR3_DRAMRST#_R 12,14,15 DDR_B_D14 DDR_B_D15 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D28 DDR_B_D29 DDR_B_DQS#3 DDR_B_DQS3 DDR_B_D30 DDR_B_D31 C DDR_CKE7_DIMMD DDR_CKE7_DIMMD 7 DDR_B_MA15 DDR_B_MA14 DDR_B_MA11 DDR_B_MA7 DDR_B_MA6 DDR_B_MA4 DDR_B_MA2 DDR_B_MA0 M_CLK_DDR7 M_CLK_DDR#7 DDR_B_BS1 DDR_B_RAS# DDR_CS6_DIMMD# M_ODT6 M_ODT7 M_CLK_DDR7 M_CLK_DDR#7 DDR_B_BS1 DDR_B_RAS# 7 7 15,7 15,7 DDR_CS6_DIMMD# M_ODT6 7 M_ODT7 7 7 +V_SM_VREF_CNT All VREF traces should have 20 mil trace width DDR_B_D36 DDR_B_D37 1 DDR_B_D38 DDR_B_D39 2 1 2 DDR_B_D44 DDR_B_D45 CD38 0.1U_0402_25V6K~D DDR_B_DQS#4 DDR_B_DQS4 B 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203 VREF_DQ VSS2 DQ0 DQ1 VSS4 DM0 VSS5 DQ2 DQ3 VSS7 DQ8 DQ9 VSS9 DQS#1 DQS1 VSS11 DQ10 DQ11 VSS13 DQ16 DQ17 VSS15 DQS#2 DQS2 VSS18 DQ18 DQ19 VSS20 DQ24 DQ25 VSS22 DM3 VSS23 DQ26 DQ27 VSS25 CD37 2.2U_0402_6.3V6M DDR_B_D32 DDR_B_D33 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 B DDR_B_DQS#5 DDR_B_DQS5 DDR_B_D46 DDR_B_D47 DDR_B_D52 DDR_B_D53 CH A1 (H9.2)(Std) DDR_B_D54 DDR_B_D55 CH B1 (H5.2)(Std) CH B0 (H5.2) (Rev) DIMM B0 CPU DDR_B_D60 DDR_B_D61 DDR_B_DQS#7 DDR_B_DQS7 BOT DDR_B_D62 DDR_B_D63 M_THERMAL# TOP M_THERMAL# PCH_SMBDATA PCH_SMBCLK 12,14,15,43 12,14,15,19,49,50,51,53,6 12,14,15,19,49,50,51,53,6 DIMM A1 DIMM B1 CH A0 (H9.2) (Rev) DIMM A0 +0.675VS 206 TYCO_2-2013290-1 CONN@ A Compal Secret Data Security Classification Issued Date 2012/05/28 Deciphered Date 2013/05/27 Title Compal Electronics, Inc. DDRIII DIMMB THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.1 LA-9332P Date: 5 4 3 2 Friday, December 14, 2012 1 Sheet 13 of 56 5 4 3 2 1 www.laptopblue.vn JDIMMC H=9.2mm D D +DIMM0_1_VREF_CPU +1.35V +1.35V JDIMA1 12,7 @ 2 1 2 CD53 0.1U_0402_25V6K~D All VREF traces should have 20 mil trace width CD50 2.2U_0402_6.3V6M 1 DDR_A_DQS#[0..7] 12,7 DDR_A_D[0..63] 12,7 DDR_A_DQS[0..7] 12,7 DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D8 DDR_A_D9 DDR_A_DQS#1 DDR_A_DQS1 DDR_A_D10 DDR_A_D11 DDR_A_MA[0..15] DDR_A_D16 DDR_A_D17 DDR_A_DQS#2 DDR_A_DQS2 DDR_A_D18 DDR_A_D19 Layout Note: Place near JDIMMC DDR_A_D24 DDR_A_D25 +1.35V DDR_A_D26 DDR_A_D27 C 2 1 2 1 @2 CD47 1U_0402_6.3V6K~D 1 CD63 1U_0402_6.3V6K~D CD54 1U_0402_6.3V6K~D 2 CD12 1U_0402_6.3V6K~D 1 7 DDR_CKE0_DIMMA 12,7 DDR_A_BS2 DDR_CKE0_DIMMA DDR_A_BS2 DDR_A_MA12 DDR_A_MA9 DDR_A_MA8 DDR_A_MA5 DDR_A_MA3 DDR_A_MA1 +1.35V 2 1 + 2 CD45 330U_SX_2VY~D 2 1 @CD61 @ CD61 10U_0603_6.3V6M~D 2 1 CD75 10U_0603_6.3V6M~D 2 1 CD49 10U_0603_6.3V6M~D 2 1 CD46 10U_0603_6.3V6M~D 2 1 CD62 10U_0603_6.3V6M~D 1 CD59 10U_0603_6.3V6M~D @2 CD56 10U_0603_6.3V6M~D 1 7 7 7 M_CLK_DDR0 M_CLK_DDR#0 12,7 DDR_A_BS0 12,7 12,7 DDR_A_WE# DDR_A_CAS# DDR_CS1_DIMMA# M_CLK_DDR0 M_CLK_DDR#0 DDR_A_MA10 DDR_A_BS0 DDR_A_WE# DDR_A_CAS# DDR_A_MA13 DDR_CS1_DIMMA# DDR_A_D34 DDR_A_D35 B DDR_A_D40 DDR_A_D41 Layout Note: Place near JDIMMC.203,204 DDR_A_D42 DDR_A_D43 DDR_A_D48 DDR_A_D49 DDR_A_DQS#6 DDR_A_DQS6 +0.675VS 1 2 DDR_A_D56 DDR_A_D57 2 @ RD25 @ 10K_0402_5%~D 1 2 DDR_A_D50 DDR_A_D51 @ RD43 10K_0402_5%~D DDR_A_D58 DDR_A_D59 1 1 CD55 1U_0402_6.3V6K~D 2 CD57 1U_0402_6.3V6K~D 1 CD51 1U_0402_6.3V6K~D 2 CD64 1U_0402_6.3V6K~D 1 2 +3VS 2 2 1 SA0 SA1 1 0 DIMA0 1 1 DIMB0 0 0 DIMA1 0 1 DIMB1 1 RD26 0_0402_1% 2 1 2 CD60 2.2U_0402_6.3V6M @ RD42 CD48 0.1U_0402_25V6K~D 0_0402_1% @ 1 +3VS +0.675VS 205 CKE0 VDD1 NC1 BA2 VDD3 A12/BC# A9 VDD5 A8 A5 VDD7 A3 A1 VDD9 CK0 CK0# VDD11 A10/AP BA0 VDD13 WE# CAS# VDD15 A13 S1# VDD17 NCTEST VSS27 DQ32 DQ33 VSS29 DQS#4 DQS4 VSS32 DQ34 DQ35 VSS34 DQ40 DQ41 VSS36 DM5 VSS37 DQ42 DQ43 VSS39 DQ48 DQ49 VSS41 DQS#6 DQS6 VSS44 DQ50 DQ51 VSS46 DQ56 DQ57 VSS48 DM7 VSS49 DQ58 DQ59 VSS51 SA0 VDDSPD SA1 VTT1 VSS1 DQ4 DQ5 VSS3 DQS#0 DQS0 VSS6 DQ6 DQ7 VSS8 DQ12 DQ13 VSS10 DM1 RESET# VSS12 DQ14 DQ15 VSS14 DQ20 DQ21 VSS16 DM2 VSS17 DQ22 DQ23 VSS19 DQ28 DQ29 VSS21 DQS#3 DQS3 VSS24 DQ30 DQ31 VSS26 CKE1 VDD2 A15 A14 VDD4 A11 A7 VDD6 A6 A4 VDD8 A2 A0 VDD10 CK1 CK1# VDD12 BA1 RAS# VDD14 S0# ODT0 VDD16 ODT1 NC2 VDD18 VREF_CA VSS28 DQ36 DQ37 VSS30 DM4 VSS31 DQ38 DQ39 VSS33 DQ44 DQ45 VSS35 DQS#5 DQS5 VSS38 DQ46 DQ47 VSS40 DQ52 DQ53 VSS42 DM6 VSS43 DQ54 DQ55 VSS45 DQ60 DQ61 VSS47 DQS#7 DQS7 VSS50 DQ62 DQ63 VSS52 EVENT# SDA SCL VTT2 G1 G2 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204 DDR_A_D4 DDR_A_D5 DDR_A_DQS#0 DDR_A_DQS0 DDR_A_D6 DDR_A_D7 DDR_A_D12 DDR_A_D13 DDR3_DRAMRST#_R DDR3_DRAMRST#_R 12,13,15 DDR_A_D14 DDR_A_D15 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D28 DDR_A_D29 DDR_A_DQS#3 DDR_A_DQS3 DDR_A_D30 DDR_A_D31 DDR_CKE1_DIMMA C DDR_CKE1_DIMMA 7 DDR_A_MA15 DDR_A_MA14 DDR_A_MA11 DDR_A_MA7 DDR_A_MA6 DDR_A_MA4 DDR_A_MA2 DDR_A_MA0 M_CLK_DDR1 M_CLK_DDR#1 DDR_A_BS1 DDR_A_RAS# DDR_CS0_DIMMA# M_ODT0 M_CLK_DDR1 M_CLK_DDR#1 DDR_A_BS1 DDR_A_RAS# DDR_CS0_DIMMA# M_ODT0 7 M_ODT1 M_ODT1 7 7 12,7 12,7 7 DDR_A_D36 DDR_A_D37 1 DDR_A_D38 DDR_A_D39 2 7 +V_SM_VREF_CNT DDR_A_D44 DDR_A_D45 1 2 All VREF traces should have 20 mil trace width CD58 0.1U_0402_25V6K~D DDR_A_DQS#4 DDR_A_DQS4 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203 VREF_DQ VSS2 DQ0 DQ1 VSS4 DM0 VSS5 DQ2 DQ3 VSS7 DQ8 DQ9 VSS9 DQS#1 DQS1 VSS11 DQ10 DQ11 VSS13 DQ16 DQ17 VSS15 DQS#2 DQS2 VSS18 DQ18 DQ19 VSS20 DQ24 DQ25 VSS22 DM3 VSS23 DQ26 DQ27 VSS25 CD52 2.2U_0402_6.3V6M DDR_A_D32 DDR_A_D33 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 B DDR_A_DQS#5 DDR_A_DQS5 DDR_A_D46 DDR_A_D47 DDR_A_D52 DDR_A_D53 CPU DDR_A_D54 DDR_A_D55 DDR_A_D60 DDR_A_D61 TOP BOT DDR_A_DQS#7 DDR_A_DQS7 (H9.2)(Std) CH B1 (H5.2)(Std) CH B0 (H5.2) (Rev) DIMM B0 CH A0 (H9.2) (Rev) DDR_A_D62 DDR_A_D63 M_THERMAL# CH A1 M_THERMAL# PCH_SMBDATA PCH_SMBCLK DIMM A1 DIMM B1 DIMM A0 12,13,15,43 12,13,15,19,49,50,51,53,6 12,13,15,19,49,50,51,53,6 +0.675VS 206 TYCO_2-2013310-1 CONN@ A A Compal Secret Data Security Classification Issued Date 2012/05/28 Deciphered Date 2013/05/27 Title Compal Electronics, Inc. DDRIII DIMMC THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.1 LA-9332P Date: 5 4 3 2 Friday, December 14, 2012 1 Sheet 14 of 56 5 4 3 2 1 www.laptopblue.vn JDIMMD H=5.2mm D D +DIMM0_1_CA_CPU +1.35V +1.35V JDIMB1 13,7 2 1 2 CD76 0.1U_0402_25V6K~D All VREF traces should have 20 mil trace width CD84 2.2U_0402_6.3V6M @1 DDR_B_D2 DDR_B_D3 DDR_B_D8 DDR_B_D9 DDR_B_DQS#[0..7] DDR_B_DQS#1 DDR_B_DQS1 13,7 DDR_B_D[0..63] 13,7 DDR_B_DQS[0..7] 13,7 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 DDR_B_D0 DDR_B_D1 DDR_B_D10 DDR_B_D11 DDR_B_MA[0..15] DDR_B_D16 DDR_B_D17 DDR_B_DQS#2 DDR_B_DQS2 DDR_B_D18 DDR_B_D19 Layout Note: Place near JDIMMD DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 +1.35V C 2 @ 1 2 CD71 1U_0402_6.3V6K~D 2 1 CD78 1U_0402_6.3V6K~D 2 1 CD80 1U_0402_6.3V6K~D CD82 1U_0402_6.3V6K~D 1 7 DDR_CKE2_DIMMB 13,7 DDR_B_BS2 DDR_B_MA8 DDR_B_MA5 DDR_B_MA3 DDR_B_MA1 7 7 2 1 + 2 CD68 330U_SX_2VY~D 2 1 @CD70 @ CD70 10U_0603_6.3V6M~D 2 1 CD88 10U_0603_6.3V6M~D 2 1 CD65 10U_0603_6.3V6M~D 2 1 CD79 10U_0603_6.3V6M~D 2 1 CD81 10U_0603_6.3V6M~D 1 CD87 10U_0603_6.3V6M~D 2 CD67 10U_0603_6.3V6M~D 1 DDR_B_BS2 DDR_B_MA12 DDR_B_MA9 +1.35V @ M_CLK_DDR2 M_CLK_DDR#2 13,7 DDR_B_BS0 13,7 13,7 DDR_B_WE# DDR_B_CAS# 7 DDR_CS3_DIMMB# M_CLK_DDR2 M_CLK_DDR#2 DDR_B_MA10 DDR_B_BS0 DDR_B_WE# DDR_B_CAS# DDR_B_MA13 DDR_CS3_DIMMB# DDR_B_DQS#4 DDR_B_DQS4 DDR_B_D34 DDR_B_D35 Layout Note: Place near JDIMMD.203,204 B DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D48 DDR_B_D49 +0.675VS DDR_B_DQS#6 DDR_B_DQS6 DDR_B_D56 DDR_B_D57 2 2 DDR_B_D50 DDR_B_D51 RD31 @ 10K_0402_5%~D RD32 10K_0402_5%~D DDR_B_D58 DDR_B_D59 1 2 +3VS 1 2 @1 CD85 1U_0402_6.3V6K~D 2 1 CD86 1U_0402_6.3V6K~D 1 CD77 1U_0402_6.3V6K~D 2 CD89 1U_0402_6.3V6K~D 1 2 @ RD45 10K_0402_5%~D A 1 0 DIMA0 1 1 DIMB0 0 0 DIMA1 0 1 DIMB1 1 1 SA0 SA1 1 2 1 2 CD66 2.2U_0402_6.3V6M @ 0_0402_1% CD69 0.1U_0402_25V6K~D RD44 2 +3VS +0.675VS 205 CKE1 VDD2 A15 A14 VDD4 A11 A7 VDD6 A6 A4 VDD8 A2 A0 VDD10 CK1 CK1# VDD12 BA1 RAS# VDD14 S0# ODT0 VDD16 ODT1 NC2 VDD18 VREF_CA VSS28 DQ36 DQ37 VSS30 DM4 VSS31 DQ38 DQ39 VSS33 DQ44 DQ45 VSS35 DQS#5 DQS5 VSS38 DQ46 DQ47 VSS40 DQ52 DQ53 VSS42 DM6 VSS43 DQ54 DQ55 VSS45 DQ60 DQ61 VSS47 DQS#7 DQS7 VSS50 DQ62 DQ63 VSS52 EVENT# SDA SCL VTT2 G1 G2 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204 DDR_B_D4 DDR_B_D5 DDR_B_DQS#0 DDR_B_DQS0 DDR_B_D6 DDR_B_D7 DDR_B_D12 DDR_B_D13 DDR3_DRAMRST#_R DDR3_DRAMRST#_R 12,13,14 DDR_B_D14 DDR_B_D15 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D28 DDR_B_D29 DDR_B_DQS#3 DDR_B_DQS3 DDR_B_D30 DDR_B_D31 C DDR_CKE3_DIMMB DDR_CKE3_DIMMB 7 DDR_B_MA15 DDR_B_MA14 DDR_B_MA11 DDR_B_MA7 DDR_B_MA6 DDR_B_MA4 DDR_B_MA2 DDR_B_MA0 M_CLK_DDR3 M_CLK_DDR#3 DDR_B_BS1 DDR_B_RAS# DDR_CS2_DIMMB# M_ODT2 M_ODT3 M_CLK_DDR3 M_CLK_DDR#3 7 13,7 13,7 DDR_CS2_DIMMB# M_ODT2 7 M_ODT3 7 DDR_B_D36 DDR_B_D37 1 DDR_B_D38 DDR_B_D39 7 DDR_B_BS1 DDR_B_RAS# 2 7 +V_SM_VREF_CNT 1 2 DDR_B_D44 DDR_B_D45 CD83 0.1U_0402_25V6K~D DDR_B_D32 DDR_B_D33 CKE0 VDD1 NC1 BA2 VDD3 A12/BC# A9 VDD5 A8 A5 VDD7 A3 A1 VDD9 CK0 CK0# VDD11 A10/AP BA0 VDD13 WE# CAS# VDD15 A13 S1# VDD17 NCTEST VSS27 DQ32 DQ33 VSS29 DQS#4 DQS4 VSS32 DQ34 DQ35 VSS34 DQ40 DQ41 VSS36 DM5 VSS37 DQ42 DQ43 VSS39 DQ48 DQ49 VSS41 DQS#6 DQS6 VSS44 DQ50 DQ51 VSS46 DQ56 DQ57 VSS48 DM7 VSS49 DQ58 DQ59 VSS51 SA0 VDDSPD SA1 VTT1 VSS1 DQ4 DQ5 VSS3 DQS#0 DQS0 VSS6 DQ6 DQ7 VSS8 DQ12 DQ13 VSS10 DM1 RESET# VSS12 DQ14 DQ15 VSS14 DQ20 DQ21 VSS16 DM2 VSS17 DQ22 DQ23 VSS19 DQ28 DQ29 VSS21 DQS#3 DQS3 VSS24 DQ30 DQ31 VSS26 CD72 2.2U_0402_6.3V6M 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203 DDR_CKE2_DIMMB VREF_DQ VSS2 DQ0 DQ1 VSS4 DM0 VSS5 DQ2 DQ3 VSS7 DQ8 DQ9 VSS9 DQS#1 DQS1 VSS11 DQ10 DQ11 VSS13 DQ16 DQ17 VSS15 DQS#2 DQS2 VSS18 DQ18 DQ19 VSS20 DQ24 DQ25 VSS22 DM3 VSS23 DQ26 DQ27 VSS25 All VREF traces should have 20 mil trace width B DDR_B_DQS#5 DDR_B_DQS5 DDR_B_D46 DDR_B_D47 DDR_B_D52 DDR_B_D53 CPU DDR_B_D54 DDR_B_D55 DDR_B_D60 DDR_B_D61 TOP BOT DDR_B_DQS#7 DDR_B_DQS7 (H9.2)(Std) CH B1 (H5.2)(Std) CH B0 (H5.2) (Rev) DIMM B0 DIMM A1 DIMM B1 CH A0 (H9.2) (Rev) DIMM A0 DDR_B_D62 DDR_B_D63 M_THERMAL# CH A1 M_THERMAL# PCH_SMBDATA PCH_SMBCLK 12,13,14,43 12,13,14,19,49,50,51,53,6 12,13,14,19,49,50,51,53,6 +0.675VS 206 TYCO_2-2013289-1 CONN@ A Compal Secret Data Security Classification Issued Date 2012/05/28 Deciphered Date 2013/05/27 Title Compal Electronics, Inc. DDRIII DIMMD THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.1 LA-9332P Date: 5 4 3 2 Friday, December 14, 2012 1 Sheet 15 of 56 5 4 3 2 1 www.laptopblue.vn +RTC_CELL 2 1 RH38 330K_0402_1%~D D D PCH_INTVRMEN 2 1 @ RH39 330K_0402_1%~D INTVRMEN - INTEGRATED SUS 1.05V VRM ENABLE High - Enable Internal VRs Low - Enable External VRs +3VS +3V_PCH 2 1 HDA_SPKR 10K_0402_5%~D 2 @RH287 @ RH287 NO REBOOT STRAP PCH_AZ_SDOUT 1K_0402_1%~D +3VS FLASH DESCRIPTOR SECURITY OVERRIDE DISABLED WHEN LOW (DEFAULT) ENABLED WHEN HIGH LOW = DESABLED (DEFAULT) HIGH = ENABLED 1 RH286 CH2 2 1 PCH_RTCX1_R 2 0_0402_1% YH1 32.768KHZ_12.5PF_Q13FC1350000~D C 2 PCH_GPIO33 100K_0402_5%~D 2 B5 PCH_RTCX2 B4 SRTCRST# B9 1 +RTC_CELL RH22 1 2 20K_0402_5%~D RH11 1 2 1M_0402_5%~D INTRUDER# PCH_INTVRMEN RH23 1 CMOS_CLR1 2 20K_0402_5%~D PCH_RTCRST# CMOS setting Shunt Clear CMOS Open Keep CMOS 1 2 2 1 1 2 2 45 @ ME1 TPM setting 1 Shunt Clear ME RTC Registers Open Keep ME RTC Registers CH5 B25 PCH_AZ_SYNC A22 HDA_SPKR HDA_SPKR 45 PCH_AZ_CODEC_SDIN0 PCH_AZ_CODEC_SDIN0 D9 PCH_AZ_BITCLK PCH_AZ_RST# @ CMOS1 SHORT PADS~D 1 2 1U_0402_6.3V6K~D CH4 SHORT PADS~D 2 1U_0402_6.3V6K~D AL10 C24 L22 K22 CMOS place near DIMM G22 F22 43 PCH_AZ_SDOUT 1K_0402_1%~D PCH_GPIO33 PCH_mDP_HPD A24 B17 C22 RTCX2 SRTCRST# SATA_TXN_0 SATA_TXP_0 SATA_RXN_1 SATA_RXP_1 INTRUDER# INTVRMEN SATA_TXN_1 SATA_TXP_1 RTCRST# SATA_RXN_2 SATA_RXP_2 HDA_BCLK SATA_TXN_2 SATA_TXP_2 HDA_SYNC SPKR SATA_RXN_3 SATA_RXP_3 HDA_RST# SATA_TXN_3 SATA_TXP_3 HDA_SDI0 HDA_SDI1 SATA_RXN4/PERN1 SATA_RXP4/PERP1 HDA_SDI2 HDA_SDI3 SATA_TXN4/PETN1 SATA_TXP4/PETP1 HDA_SDO SATA_RXN5/PERN2 SATA_RXP5/PERP2 DOCKEN#/GPIO33 HDA_DOCK_RST#/GPIO13 SATA_TXN5/PETN2 SATA_TXP5/PETP2 SATALED# 1 51_0402_1%~D PCH_JTAG_TCK AB3 RH44 1 2 210_0402_1%~D PCH_JTAG_TMS AD1 2 210_0402_1%~D PCH_JTAG_TDI AE2 2 210_0402_1%~D 2 RH47 100_0402_1%~D RH49 100_0402_1%~D RH48 100_0402_1%~D 1 @ RH46 1 @ RH45 1 PCH_JTAG_TDO @ 1 2 PCH_TP25 RH289 0_0402_1% @ T122 PAD~D PCH_JTAG_RST T175 PAD~D @ AD3 F8 C26 AB6 JTAG_TCK SATA0GP/GPIO21 JTAG_TMS SATA1GP/GPIO19 JTAG RH59 2 1 +3.3V_ALW_PCH_JTAG 1 @ PCH_mDP_HPD 2 2 QH8 SSM3K7002FU_SC70-3~D 2 RTCX1 SATA_RCOMP 2 2 PCH_AZ_SYNC @ 2 1 D RH31 1M_0402_5%~D 1 3 S PCH_AZ_SYNC_Q 17,31 RH288 0_0603_5%~D G B 1 RH50 HDA_SDO +3V_PCH +5VS 1 HDA_SYNC Isolation Circuit JTAG_TDI SATA_IREF JTAG_TDO TP9 TP25 TP8 BC8 BE8 SATA_PRX_DTX_N0 SATA_PRX_DTX_P0 AW8 AY8 SATA_PTX_DRX_N0 SATA_PTX_DRX_P0 BC10 BE10 SATA_PRX_DTX_N1 SATA_PRX_DTX_P1 AV10 AW10 SATA_PTX_DRX_N1 SATA_PTX_DRX_P1 49 49 SATA_PTX_DRX_N0 SATA_PTX_DRX_P0 49 49 SATA_PRX_DTX_N1 SATA_PRX_DTX_P1 49 49 SATA_PTX_DRX_N1 SATA_PTX_DRX_P1 49 49 45 A 45 2 1 PCH_AZ_CODEC_RST# RH27 1 PCH_AZ_CODEC_BITCLK +RTC_CELL 2 CH12 1U_0603_10V6K @CH101 @ CH101 27P_0402_50V8J~D RH26 1 W=20mils 1 2 1 RH56 HDD2(Slave) AY13 AW13 BC12 BE12 AR13 AT13 BD13 BB13 SATA_ODD_PRX_DTX_N4 SATA_ODD_PRX_DTX_P4 AV15 AW15 SATA_ODD_PTX_DRX_N4 SATA_ODD_PTX_DRX_P4 BC14 BE14 MSATA_PRX_DTX_N5 MSATA_PRX_DTX_P5 AP15 AR15 MSATA_PTX_DRX_N5 MSATA_PTX_DRX_P5 SATA_ODD_PRX_DTX_N4 SATA_ODD_PRX_DTX_P4 50 50 SATA_ODD_PTX_DRX_N4 SATA_ODD_PTX_DRX_P4 50 50 MSATA_PRX_DTX_N5 MSATA_PRX_DTX_P5 50 50 MSATA_PTX_DRX_N5 MSATA_PTX_DRX_P5 50 50 ODD/HDD3 Bay mSATA B AY5 SATA_COMP AP3 PCH_SATALED# AT1 PCH_GPIO21 AU2 BBS_BIT0_R BD4 SATA_IREF 2 0_0402_1% PCH_SATALED# @ 1 RH41 48 +1.5VS BA2 PAD~D T161 @ PAD~D T155 @ BB2 TP20 SATA Impedance Compensation +1.5VS 1 OF 11 2 RH40 CAD note: Place the resistor within 500 mils of the PCH. Avoid routing next to clock pins. 1 RH29 PCH_AZ_CODEC_SYNC HDD1(Master) BB9 BD9 HDA for Codec PCH_AZ_CODEC_SDOUT RH55 SATA_PRX_DTX_N0 SATA_PRX_DTX_P0 1 SATA_COMP 7.5K_0402_1%~D 45 RH52 2 TP22 LYNXPOINT_BGA695 45 1 C SATA_RXN_0 SATA_RXP_0 AZALIA ME_CLR1 1 A8 G10 5 RTC CH3 2 18P_0402_50V8J~D @ RH30 LPT_PCH_M_EDS UH1A RH2 10M_0402_5%~D 2 1 RH355 2 1 18P_0402_50V8J~D PCH_RTCX1 1 @ +3VS 1 PCH_GPIO21 10K_0402_5%~D 2 BBS_BIT0_R 4.7K_0402_5%~D 1 PCH_SATALED# 10K_0402_5%~D SATA 1 @RH35 @ RH35 PCH_AZ_SDOUT 33_0402_5%~D PCH_AZ_SYNC_Q 33_0402_5%~D 2 PCH_AZ_RST# 33_0402_5%~D 2 PCH_AZ_BITCLK 33_0402_5%~D A Compal Secret Data Security Classification 2 Issued Date 2012/05/28 Deciphered Date 2013/05/27 Title Compal Electronics, Inc. PCH (1/9) RTC,HDA,SATA,XDP THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.1 LA-9332P Date: 5 4 3 2 Friday, December 14, 2012 1 Sheet 16 of 56 5 4 3 2 1 www.laptopblue.vn @ 6 D 1 XDP_DBRESET# 2 0_0402_1% RH195 SYS_RESET# D +3V_PCH 2 SUS_STAT# 10K_0402_5%~D SUSPWRDNACK 10K_0402_5%~D 2 PCIE_WAKE# 10K_0402_5%~D 2 PCH_WAKE# 10K_0402_5%~D 2 PCH_RI# 10K_0402_5%~D 1 @ RH148 1 RH177 1 RH172 U44 +3VS V45 M43 2 PCH_DPC_MDP_CLK 2.2K_0402_5%~D 2 PCH_DPC_MDP_DAT 2.2K_0402_5%~D M45 N42 1 2 1 2 PM_CLKRUN# 8.2K_0402_5%~D ME_RESET# 8.2K_0402_5%~D @ RH152 ME_SUS_PWR_ACK_R RH323 1 2 SUSACK#_R 0_0402_5%~D N44 1 2 649_0402_1%~D RH139 U40 U39 40 5 PCH_EDP_PWM K36 5 5 C DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 5 5 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3 5 5 DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 5 5 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3 5 5 DMI_CRX_PTX_N0 DMI_CRX_PTX_N1 5 5 DMI_CRX_PTX_N2 DMI_CRX_PTX_N3 5 5 DMI_CRX_PTX_P0 DMI_CRX_PTX_P1 5 5 DMI_CRX_PTX_P2 DMI_CRX_PTX_P3 0_0402_1% 2 1 RH43 +1.5VS AW22 AR20 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3 AP17 AV20 DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 AY22 AP20 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3 AR17 AW20 DMI_CRX_PTX_N0 DMI_CRX_PTX_N1 BD21 BE20 DMI_CRX_PTX_N2 DMI_CRX_PTX_N3 BD17 BE18 DMI_CRX_PTX_P0 DMI_CRX_PTX_P1 BB21 BC20 DMI_CRX_PTX_P2 DMI_CRX_PTX_P3 BB17 BC18 DMI_IREF BE16 AW17 @ @ T139 PAD~D AV17 @ T123 PAD~D 2 DMI_RCOMP 7.5K_0402_1%~D 1 +1.5VS RH204 AY17 DMI_RXN_0 DMI_RXN_1 G36 FDI_RXN_0 DMI_RXN_2 DMI_RXN_3 FDI_RXN_1 DMI_RXP_0 DMI_RXP_1 FDI_RXP_0 FDI FDI_RXP_1 DMI_RXP_2 DMI_RXP_3 DMI TP16 DMI_TXN_0 DMI_TXN_1 TP5 TP15 DMI_TXN_2 DMI_TXN_3 TP10 DMI_TXP_0 DMI_TXP_1 FDI_CSYNC FDI_INT DMI_TXP_2 DMI_TXP_3 FDI_IREF DMI_IREF TP17 TP12 TP13 TP7 FDI_RCOMP AJ35 AL35 PCI_PIRQA# AJ36 PCI_PIRQB# L20 AL36 PCI_PIRQC# K17 PCI_PIRQD# M20 AV43 AY45 H20 DGPU_HOLD_RST# A12 AV45 31,36,42 DGPU_SELECT# B13 DGPU_SELECT# AW44 C12 AL39 FDI_CSYNC AL40 FDI_INT FDI_CSYNC FDI_INT @ FDI_IREF 2 0_0402_1% PAD~D AT45 AU42 1 BBS_BIT1 5 5 42 +1.5VS RH42 T145 @ 51 C10 HDMI_IN_PWMSEL#A10 HDMI_IN_PWMSEL# WL_OFF# WL_OFF# AL6 DDPB_CTRLCLK VGA_GREEN DDPB_CTRLDATA VGA_RED DDPC_CTRLCLK VGA_DDC_CLK DDPC_CTRLDATA VGA_DDC_DATA DDPD_CTRLCLK VGA_HSYNC DDPD_CTRLDATA VGA_VSYNC DDPB_AUXN DAC_IREF DDPC_AUXN VGA_IRTN EDP_BKLTCTL EDP_BKLTEN DDPB_AUXP DDPC_AUXP EDP_VDDEN DDPD_AUXP DDPB_HPD PIRQA# DDPC_HPD PIRQB# DDPD_HPD PAD~D PCH_DPB_HDMI_CLK R35 PCH_DPC_MDP_CLK PCH_DPC_MDP_CLK R36 PCH_DPC_MDP_DAT N38 PCH_DPD_DAT 1 RH206 K43 PCH_mDP_AUXN 39 PCH_DPD_DAT 39 PCH_mDP_AUXN 31 H43 K45 PCH_mDP_AUXP PCH_mDP_AUXP PCI PIRQE#/GPIO2 GPIO50 PIRQF#/GPIO3 GPIO52 PIRQG#/GPIO4 GPIO54 PIRQH#/GPIO5 GPIO51 PME# GPIO53 K40 PCH_HDMI_HPD PCH_HDMI_HPD K38 PCH_mDP_HPD PCH_mDP_HPD H39 PCH_DMC_HPD PLTRST# G17 BT_ON# BT_ON# F17 DP_CBL_DET L15 ODD_DA# M15 FFS_INT1 AD10 31 ODD_DA# 50 FFS_INT1 @ T124 49 PAD~D Y11 PCH_PLTRST# +3VS CH144 1 2 RH367 10K_0402_5%~D @ 43 RH320 1 PCH_RSMRST# 43 RH185 1 SUSPWRDNACK 43,6 RH200 1 PBTN_OUT# RH163 @ 1 +PCH_VCCDSW3_3 2 RH156 @ T140 K7 PCH_BATLOW# 8.2K_0402_5%~D PCH_RI# N4 AB10 PAD~D SUS_STAT#/GPIO61 DRAMPWROK SUSCLK/GPIO62 RSMRST# SLP_S5#/GPIO63 SUSWARN#/SUSPWRNACK/GPIO30 SLP_S4# PWRBTN# SLP_S3# ACPRESENT/GPIO31 SLP_A# BATLOW#/GPIO72 SLP_SUS# RI# PMSYNCH TP21 SLP_LAN# U7 SUS_STAT# T129 PAD~D@ Y6 SUSCLK_R T143 PAD~D@ Y7 PM_SLP_S5# 43 T126 C6 PM_SLP_S4# H1 PM_SLP_S3# PM_SLP_S5# T125 PAD~D @ PM_SLP_S4# 43,47 PM_SLP_S3# 43,47 F1 PM_SLP_SUS# H_PM_SYNC T128 PAD~D @ PM_SLP_SUS# T127 PAD~D @ H_PM_SYNC 6 2 IMVP_PWRGD IN2 +3V_PCH OUT 4 4 OF 11 SYS_PWROK MXM_RST_A 1 PCH_PLTRST# 2 1 MC74VHC1G08DFT2G_SC70-5 @RH328 @ RH328 2 BBS_BIT1 1K_0402_1%~D GNT1#/GPIO51 (BBS_BIT1) SATA1GP/GPIO19 (BBS_BIT0) B @ CH147 1 2 0.1U_0402_25V6K~D O A B RH215 100K_0402_5%~D @ 4 PLTRST_VGA# UH6 TC7SH08FU_SSOP5~D PLTRST_VGA# +3VS 29,30 1 RH198 @ 2 0_0402_5%~D STP_A16OVR +3V_PCH 2 1 3 ACIN_PCH 0 1 1 0 PCI * 1 1 SPI 1 2 1 2 1 2 1 2 1 2 1 2 1 RH365 RH362 RH352 RH324 RH325 RH326 RH329 RH327 Reserved (NAND) PCH_RSMRST# 10K_0402_5%~D PCH_HDMI_HPD 100K_0402_5%~D PCH_DMC_HPD 100K_0402_5%~D PM_CLKRUN# @ 2 10K_0402_5%~D @ 1 2 @ 1 RV461 RH351 A 2 A 2 RH366 2 1 R1899 10K_0402_5% 1 1 RH194 LPC RV462 R1900 10K_0402_5% 1 2 LOW = A16 SWAP OVERRIDE HIGH = DEFAULT 1 0 2 @ HIGH = ENABLED (DEFAULT) LOW = DISABLED Boot BIOS Location A16 SWAP OVERRIDE STRAP BT_ON# 8.2K_0402_5%~D ODD_DA# 8.2K_0402_5%~D WL_OFF# 8.2K_0402_5%~D HDMI_IN_PWMSEL# 8.2K_0402_5%~D PCI_PIRQA# 8.2K_0402_5%~D PCI_PIRQB# 8.2K_0402_5%~D PCI_PIRQC# 8.2K_0402_5%~D PCI_PIRQD# 8.2K_0402_5%~D DGPU_HOLD_RST# 10K_0402_5%~D 2 0 43,44,51,53,6 RH201 100K_0402_5%~D RH196 100K_0402_5%~D DSWODVREN - ON DIE DSW VR ENABLE Boot BIOS Strap PLT_RST# 1 P G PLT_RST UH9 VCC IN1 GND 43,6,62 1 3 PCH_PWROK +3VS DSWODVREN 1 2 2 5 43 CH41 0.1U_0402_16V7K 5 @ 4 +RTC_CELL SLP_WLAN#/GPIO29 LYNXPOINT_BGA695 1 O UH3 TC7SH08FU_SSOP5~D +3V_MXM 43 G5 A MXM_RST_A PAD~D@ F3 AY3 2 100K_0402_5%~D 1 0_0402_5%~D 2 0_0402_5%~D @ @ B 3 RH211 1 RH202 2 1 DGPU_HOLD_RST# RH168 MXM_RST 1 2 +3V_MXM 2 D2 APWROK AN7 @RH178 @ RH178 330K_0402_1%~D +3VS CLKRUN# PCH_PLTRST# 43,44,51 RH191 330K_0402_1%~D B 1 PM_DRAM_PWRGD PWROK L13 K3 2 1 RH149 6 WAKE# @ 2 @ DPWROK SYS_PWROK RH167 1 2 0_0402_5%~D PCH_RSMRST#_R 1 2 PCH_DRWROK_R PCH_DPWROK 43 RH186 @ 0_0402_5%~D 1 2 PCH_WAKE# PCIE_WAKE# PCIE_WAKE# RH192 @ 0_0402_5%~D PM_CLKRUN# 1 RH144 System Power Management SYS_RESET# DSWODVREN 1 1 2 AD7 SYS_PWROK_R 0_0402_1% 2 F10 PCH_PWROK_R 0_0402_1% 2 AB7 PM_APWROK_R 0_0402_1% 2 PM_DRAM_PWRGD_R H3 0_0402_5%~D 2 J2 PCH_RSMRST#_R 0_0402_5%~D 2 ME_SUS_PWR_ACK_RJ4 0_0402_5%~D K1 2 SIO_PWRBTN#_R 0_0402_1% E6 ACIN_PCH C8 2 @ DSWVRMEN 39 51 DP_CBL_DET +3VS 5 AM1 @ 1 RH193 SUSACK# 16,31 PCH_DMC_HPD 5 OF 11 P PCH_PWROK R6 36 GPIO55 G 43 SUSACK#_R 0_0402_5%~D SYS_RESET# 31 J44 C PIRQD# 3 SYS_PWROK 2 DMC J42 +1.5VS 2 6 1 @RH114 @ RH114 mDP 31 PCH_DPD_CLK H45 DMI_RCOMP 1 SG_AMD_BKL HDMI 36 31 PCH_DPC_MDP_DAT N40 PCH_DPD_CLK 0.1U_0402_25V6K~D 42,43 36 PCH_DPB_HDMI_DAT T146 @ FDI_RCOMP 2 7.5K_0402_1%~D AR44 R40 PCH_DPB_HDMI_CLK R39 PCH_DPB_HDMI_DAT PIRQC# LYNXPOINT_BGA695 AU44 DDPD_AUXN LVDS LPT_PCH_M_EDS UH1B PCH_EDP_PWM N36 5 VGA_BLUE CRT 1 RV122 1 @RV123 @ RV123 @ +3VS RH138 LPT_PCH_M_EV UH1E T45 1 2 1 RH153 DISPLAY 1 @ RH318 DMN66D0LDW-7_SOT363-6~D QH13B GPIO51 has internal pull up. 4 6 5 ACIN DMN66D0LDW-7_SOT363-6~D QH13A 2 1 29,43,47,57,64 Compal Secret Data Security Classification Issued Date 1 2 RH330 2012/05/28 Deciphered Date 2013/05/27 Title 0_0402_5%~D Rev 0.1 LA-9332P @ Date: 5 Compal Electronics, Inc. PCH (2/9) DMI,FDI,PM,DP,CRT THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 4 3 2 Friday, December 14, 2012 1 Sheet 17 of 56 5 4 3 2 1 www.laptopblue.vn D D 1 +3V_MXM RH235 1K_0402_5% 1 Card Reader CLK_PCIE_CD# CLK_PCIE_CD CDCLK_REQ# +3V_PCH Thunder Bolt +3V_PCH +3V_PCH +3V_PCH AF1 RH158 2 @ 1 0_0402_1% PCIE_LAN# AB43 RH147 2 1 @ 1 0_0402_1% 2 10K_0402_5%~D PCIE_LAN AB45 LANCLK_REQ# AF3 2 2 @ @ 1 0_0402_1% 1 0_0402_1% PCIE_EXP# PCIE_EXP EXPCLK_REQ# AD43 AD45 T3 RH28 RH129 RH124 RH126 RH128 2 1 10K_0402_5%~D 2 1 10K_0402_5%~D AF43 AF45 V3 1 10K_0402_5%~D AE44 AE42 AA2 1 10K_0402_5%~D AB40 AB39 AE4 @ RH132 2 @ RH133 2 @ AJ44 +3V_PCH 29,31 43 Y3 2 @ 1 0_0402_1% CLK_BCLK_ITP# AH43 RH281 2 @ 1 0_0402_1% CLK_BCLK_ITP AH45 CLK_PCI_LPBACK RH169 2 1 22_0402_5%~D CLK_PCI0 D44 CLK_PCI_LPC RH111 2 1 22_0402_5%~D CLK_PCI1 E44 CLK_CPU_ITP CLK_DEBUG RH151 2 1 22_0402_5%~D CLK_PCI2 B42 @ T142 PAD~D CLK_PCI3 F41 @ T138 PAD~D CLK_PCI4 A40 CLKOUT_DMI CLKOUT_PCIE_P_2 CLKOUT_DMI_P PCIECLKRQ2#/GPIO20/SMI# CLKOUT_DP CLKOUT_DP_P CLKOUT_PCIE_N_3 CLKOUT_PCIE_P_3 PCIECLKRQ3#/GPIO25 CLKOUT_DPNS CLKOUT_DPNS_P CLKOUT_PCIE_N_4 CLKOUT_PCIE_P_4 PCIECLKRQ4#/GPIO26 CLKIN_DMI CLKIN_DMI_P CLKOUT_PCIE_N5 CLKOUT_PCIE_P_5 PCIECLKRQ5#/GPIO44 CLKIN_GND CLKIN_GND_P CLKIN_DOT96N CLKIN_DOT96P CLKOUT_PCIE_N_6 CLKOUT_PCIE_P_6 PCIECLKRQ6#/GPIO45 CLKIN_SATA CLKIN_SATA_P CLKOUT_PCIE_N_7 REFCLK14IN CLKIN_33MHZLOOPBACK CLKOUT_PCIE_P_7 PCIECLKRQ7#/GPIO46 XTAL25_IN XTAL25_OUT CLKOUT_ITPXDP CLKOUTFLEX0/GPIO64 CLKOUT_ITPXDP_P CLKOUTFLEX1/GPIO65 CLKOUT_33MHZ0 CLKOUTFLEX2/GPIO66 CLKOUT_33MHZ1 CLKOUTFLEX3/GPIO67 CLKOUT_33MHZ2 ICLK_IREF CLKOUT_33MHZ3 TP19 TP18 CLKOUT_33MHZ4 DIFFCLK_BIASREF CLOCK SIGNAL LYNXPOINT_BGA695 B MXM2_PEG_PCH# 1 5 G 2 S S 1 Y38 MXM2_PEG_PCH U4 MXM2_CLKREQ_R# AF39 CLK_CPU_DMI# AF40 CLK_CPU_DMI AJ40 AJ39 CLK_CPU_SSC_DPLL# CLK_CPU_SSC_DPLL AF35 AF36 CLK_CPU_DPLL# CLK_CPU_DPLL AY24 AW24 CLK_BUF_DMI# CLK_BUF_DMI AR24 AT24 CLK_BUF_BCLK# CLK_BUF_BCLK H33 G33 CLK_BUF_DOT96# CLK_BUF_DOT96 BE6 BC6 CLK_BUF_CKSSCD# CLK_BUF_CKSSCD F45 D17 CLK_PCH_14M CLK_PCI_LPBACK MXM2_PEG_PCH# +3V_MXM1 2 0_0402_5% 1 Y39 30 MXM2_PEG_PCH +3V_PCH CLK_CPU_DMI# 6 CLK_CPU_DMI 6 CLK_CPU_SSC_DPLL# CLK_CPU_SSC_DPLL CLK_CPU_DPLL# CLK_CPU_DPLL RH240 1K_0402_5% +3V_MXM1 30 6 6 RH379 10K_0402_5%~D RH125 10K_0402_5%~D MXM2_CLKREQ# 3 6 6 C 6 1 QH12A DMN66D0LDW-7 1 XTAL25_IN XTAL25_OUT 2 1 RH309 @ RH131 1 0_0402_1% 2 1M_0402_5%~D C40 F38 PAD~D DMC_PCH_DET# F36 PCH_GPIO66 F39 CAM_DET# AM45 ICLK_IREF 0_0402_1% 1 AD39 AD38 PAD~D PAD~D AN44 PCH_CLK_BIASREF 1 7.5K_0402_1%~D 4 QH12B DMN66D0LDW-7 2 0_0402_5% @RH238 @ RH238 AL44 AM43 30 RH239 @ 10K_0402_5%~D T176 @ DMC_PCH_DET# CAM_DET# @ 2 T149 @ T150 @ 2 RH208 51 YH4 25MHZ_10PF_Q22FA2380049900~D 3 1 OUT IN 42 RH54 +1.5VS +1.05V_+1.5V_RUN 4 2 GND GND 2 2 1 1 CH19 8.2P_0402_50V8D~D CLK_DEBUG AJ42 PEGB_CLKRQ#/GPIO56 CLKOUT_PCIE_N_2 QH11A DMN66D0LDW-7 @ RH237 CH18 8.2P_0402_50V8D~D 51 CLK_PCI_LPC 1 10K_0402_5%~D RH280 CLK_CPU_ITP# 6 2 CLKOUT_PEG_B CLKOUT_PEG_B_P PCIECLKRQ1#/GPIO18 1 29 XTAL25_IN_R 6 RH127 DGPU_PWROK CLKOUT_PCIE_N_1 CLKOUT_PCIE_P_1 PEG_CLKREQ_R# 29 CLK_PEG_PCH 1 MINI2CLK_REQ# AA44 AA42 AF6 CLK_PEG_PCH# 2 @ PCIE_MINI2# PCIE_MINI2 CLK_PEG_PCH 5 1 0_0402_1% 1 0_0402_1% 110K_0402_5%~D PEGA_CLKRQ#/GPIO47 CLK_PEG_PCH# AB36 G 2 2 2 PCIECLKRQ0#/GPIO73 AB35 2 53 53 53 RH99 RH98 RH145 CLKOUT_PEG_A_P S 44 C AB1 CLKOUT_PEG_A CLKOUT_PCIE_P_0 D CLK_PCIE_LAN +3VS LANCLK_REQ# MINI1CLK_REQ# @ CLKOUT_PCIE_N_0 S CLK_PCIE_LAN# 44 Y45 G 44 Y43 PCIE_MINI1 1 CLK_PCIE_MINI2# CLK_PCIE_MINI2 +3VS MINI2CLK_REQ# PCIE_MINI1# 1 0_0402_1% 1 10K_0402_5%~D D 2 G 6 1 0_0402_1% @ 2 10/100/1G LAN 51 2 2 2 51 51 DMC (Mini Card 2) 2 RH308 RH142 4 D 51 RH307 D CLK_PCIE_MINI1 +3V_PCH MINI1CLK_REQ# 1 CLK_PCIE_MINI1# 51 29 RH236 @ 10K_0402_5%~D QH11B DMN66D0LDW-7 2 51 3 5 @ MiniWLAN (Mini Card 1) PEG_CLKREQ# 2 1 RH378 10K_0402_5%~D RH76 10K_0402_5%~D 2 LPT_PCH_M_EDS UH1C 2 +3V_MXM +3V_PCH 2 OF 11 B RPH1 +3VS CAM_DET# DMC_PCH_DET# PCH_GPIO66 1 2 3 4 1 2 3 4 CLK_BUF_DMI CLK_BUF_DMI# CLK_BUF_BCLK CLK_BUF_BCLK# RPH2 8 7 6 5 8 7 6 5 CLK_BUF_DOT96# CLK_BUF_DOT96 RH143 1 RH130 1 2 10K_0402_5%~D 2 10K_0402_5%~D CLK_BUF_CKSSCD# CLK_BUF_CKSSCD RH146 1 RH155 1 2 10K_0402_5%~D 2 10K_0402_5%~D CLK_PCH_14M RH205 1 2 10K_0402_5%~D CLOCK TERMINATION for FCIM and need close to PCH A A Compal Secret Data Security Classification Issued Date 2012/05/28 Deciphered Date 2013/05/27 Title Compal Electronics, Inc. PCH (3/9) CLK THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.1 LA-9332P Date: 5 4 3 2 Friday, December 14, 2012 1 Sheet 18 of 56 5 4 3 2 +3VS www.laptopblue.vn 2 +3VS +3VS 6 2.2K_0402_5%~D 5 PCH_SMBCLK EC_SMB_CK2 30,40,43,53,54 EC_SMB_DA2 30,40,43,53,54 DMN66D0LDW-7 4 D QH10B 12,13,14,15,49,50,51,53,6 DMN66D0LDW-7 QH9A DMN66D0LDW-7_SOT363-6~D 3 QH10A 3 SML1DATA 2.2K_0402_5%~D 2 1 5 @ MEM_SMBDATA RH310 2 2 @ 6 MEM_SMBCLK 1 1 1 SML1CLK RH304 D 1 4 PCH_SMBDATA 12,13,14,15,49,50,51,53,6 QH9B DMN66D0LDW-7_SOT363-6~D RH380 1 2 0_0402_5%~D RH381 1 2 0_0402_5%~D +3V_PCH @ +3VS 1 RH337 2 SERIRQ 10K_0402_5%~D LPT_PCH_M_EDS UH1D @ RH368 1 @ PAD~D LPC_AD0 43,51 LPC_AD1 43,51 LPC_AD2 T169 C @ PAD~D T168 @ PAD~D T167 @ PAD~D T166 43,51 43,51 @ PAD~D @ PAD~D LPC_AD3 LPC_FRAME# LPC_AD0 A20 LPC_AD1 C20 LPC_AD2 A18 LPC_AD3 C18 LPC_FRAME# B21 T165 T164 D21 G20 43 SERIRQ AL11 SERIRQ SMBALERT#/GPIO11 LAD_0 SMBus SMBCLK LAD_1 SMBDATA LPC 43,51 LAD_2 SML0ALERT#/GPIO60 LAD_3 SML0CLK LFRAME# SML0DATA LDRQ0# SML1ALERT#/PCHHOT#/GPIO74 LDRQ1#/GPIO23 SML1CLK/GPIO58 SERIRQ SML1DATA/GPIO75 AJ11 PCH_SPI_CS0# AJ7 AL7 AJ10 PCH_SPI_SI AH1 PCH_SPI_SO AH3 PCH_SPI_DO2 AJ4 PCH_SPI_DO3 AJ2 CL_CLK SPI PCH_SPI_CLK SPI_CLK CL_DATA C-Link SPI_CS0# CL_RST# N7 PCH_LID_SW_IN# 2 RH3691 0_0402_1% 20_0402_5%~D @ R10 MEM_SMBCLK U11 MEM_SMBDATA N8 DDR_HVREF_RST_PCH U8 SML0CLK R7 SML0DATA H6 PCH_GPIO74 K6 SML1CLK N11 SML1DATA EC_LID_OUT# 43 LID_SW_IN# 43,45,47,48,53 MEM_SMBCLK 2.2K_0402_5%~D MEM_SMBDATA 2.2K_0402_5%~D DDR_HVREF_RST_PCH 1K_0402_1%~D PCH_GPIO74 10K_0402_5%~D SML1CLK 2.2K_0402_5%~D SML1DATA 2.2K_0402_5%~D 2 1 RH302 2 @ 1 2 1 2 1 1 2 1 2 RH303 RH300 RH301 RH298 RH299 C +3V_PCH 2 SML0CLK 2.2K_0402_5%~D 2 SML0DATA 2.2K_0402_5%~D 1 RH305 1 RH306 AF11 AF10 AF7 SPI_CS1# SPI_CS2# TP1 SPI_MOSI TP2 Thermal SPI_MISO TP4 SPI_IO2 TP3 SPI_IO3 TD_IREF B LYNXPOINT_BGA695 3 OF 11 BA45 PAD~D T130 @ BC45 PAD~D T133 @ BE43 PAD~D T131 @ BE44 PAD~D T132 @ AY43 PCH_TD_IREF 1 RH322 2 B 8.2K_0402_1% 5 +3V_PCH +3V_PCH 1K 2 200 MIL SO8 64Mb Flash ROM RH60 @ 33_0402_5%~D 0.1U_0402_25V6K~D UH14 1 PCH_SPI_SO_R 2 PCH_SPI_DO2 RH3751 2 15_0402_5% PCH_SPI_DO2_R 3 4 /CS VCC DO /HOLD /WP CLK GND DIO 8 7 PCH_SPI_DO3_R RH3741 2 15_0402_5% PCH_SPI_DO3 6 PCH_SPI_CLK_R RH3761 2 15_0402_5% PCH_SPI_CLK 5 PCH_SPI_SI_R RH3771 2 15_0402_5% PCH_SPI_SI 1 @ PCH_SPI_CS0#_R 2 15_0402_5% CH8 22P_0402_50V8J~D 2 0_0402_5%~D RH3721 PCH_SPI_SO CH56 1 2 1 PCH_SPI_CS0# RH3731 +3V_PCH @ PCH_SPI_DO3_R 1K_0402_1%~D PCH_SPI_DO2_R 1K_0402_1%~D 1 2 RH58 3.3K_0402_5% 2 2 PCH_SPI_CLK 1 RH370 1 RH371 2 EN25Q64-104HIP SOP8 Reserve for EMI please close to UH14 15 A Compal Secret Data Security Classification Issued Date A 2012/05/28 2013/05/27 Deciphered Date Title PCH (4/9) SPI, SMBUS,LPC THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.1 LA-9332P Date: 5 4 3 2 Friday, December 14, 2012 Sheet 1 19 of 56 5 4 3 2 1 www.laptopblue.vn D D LPT_PCH_M_EDS UH1I 44 44 10/100/1G LAN 44 44 CARD READER C MiniDMC (Mini Card 2) PCIE_PTX_GLANRX_N1 PCIE_PTX_GLANRX_P1 53 53 PCIE_PRX_CARDTX_N4 PCIE_PRX_CARDTX_P4 53 53 PCIE_PTX_CARDRX_N4 PCIE_PTX_CARDRX_P4 51 51 PCIE_PRX_WLANTX_N5 PCIE_PRX_WLANTX_P5 51 51 PCIE_PTX_WLANRX_N5 PCIE_PTX_WLANRX_P5 51 51 PCIE_PRX_WANTX_N6 PCIE_PRX_WANTX_P6 51 51 PCIE_PTX_WANRX_N6 PCIE_PTX_WANRX_P6 PCIE_PRX_GLANTX_N1 PCIE_PRX_GLANTX_P1 AW33 AY33 CH149 CH150 1 1 2 0.1U_0402_25V6K~D 2 0.1U_0402_25V6K~D PCIE_PTX_GLANRX_N1_C PCIE_PTX_GLANRX_P1_C BE34 BC34 PCIE_PRX_CARDTX_N4 PCIE_PRX_CARDTX_P4 AT33 AR33 CH153 CH154 1 1 2 0.1U_0402_25V6K~D 2 0.1U_0402_25V6K~D PCIE_PTX_CARDRX_N4_C PCIE_PTX_CARDRX_P4_C BE36 BC36 PCIE_PRX_WLANTX_N5 PCIE_PRX_WLANTX_P5 AW36 AV36 PCIE_PTX_WLANRX_N5 PCIE_PTX_WLANRX_P5 BD37 BB37 PCIE_PRX_WANTX_N6 PCIE_PRX_WANTX_P6 AY38 AW38 PCIE_PTX_WANRX_N6 PCIE_PTX_WANRX_P6 BC38 BE38 AT40 AT39 BE40 BC40 AN38 AN39 BD42 BD41 PETN2/USB3TN4 PETP2/USB3TP4 PERN_3 PERP_3 PETN_3 PETP_3 PERN_4 PERP_4 PETN_4 PETP_4 PCIe MiniWLAN (Mini Card 1) PCIE_PRX_GLANTX_N1 PCIE_PRX_GLANTX_P1 PERN2/USB3RN4 PERP2/USB3RP4 PERN_5 PERP_5 PETN_5 PETP_5 USB3RN1 USB3RP1 USB3TN1 USB3TP1 USB3RN2 USB3RP2 USB3TN2 USB3TP2 USB3RN5 USB3RP5 USB3TN5 USB3TP5 USB3RN6 USB3RP6 USB3TN6 USB3TP6 PERN_6 PERP_6 PETN_6 PETP_6 PERN_7 PERP_7 PETN_7 PETP_7 PERN_8 PERP_8 PETN_8 PETP_8 USBRBIAS# USBRBIAS @ +1.5VS +1.5VS 1 2 PCH_PCIE_IREF 0_0402_1% BE30 @ T134 PAD~D BC30 @ T136 PAD~D BB29 RH51 1 RH210 2 PCH_PCIE_RCOMP BD29 7.5K_0402_1%~D B PCIE_IREF TP24 TP23 TP11 OC0#/GPIO59 OC1#/GPIO40 OC2#/GPIO41 OC3#/GPIO42 OC4#/GPIO43 OC5#/GPIO9 OC6#/GPIO10 OC7#/GPIO14 TP6 PCIE_RCOMP LYNXPOINT_BGA695 9 OF 11 USB20_N0 USB20_P0 USB20_N1 USB20_P1 USB20_N2 USB20_P2 USB20_N3 USB20_P3 USB20_N4 USB20_P4 USB20_N5 USB20_P5 USB20_N6 USB20_P6 AR26 AP26 BE24 BD23 AW26 AV26 BD25 BC24 AW29 AV29 BE26 BC26 AR29 AP29 BD27 BE28 USB3RN1 USB3RP1 USB3TN1 USB3TP1 USB3RN2 USB3RP2 USB3TN2 USB3TP2 USB3RN5 USB3RP5 USB3TN5 USB3TP5 USB3RN6 USB3RP6 USB3TN6 USB3TP6 K24 K26 USBRBIAS USB20_N0 USB20_P0 USB20_N1 USB20_P1 USB20_N2 USB20_P2 USB20_N3 USB20_P3 USB20_N4 USB20_P4 USB20_N5 USB20_P5 USB20_N6 USB20_P6 52 52 52 52 53 53 53 53 51 51 51 51 47 47 JUSB1 JUSB2 JUSB3 USBRBIAS JUSB4 Mini Card(WLAN) Mini Card(DMC) ELC LED IR sensor M33 L33 P3 USB_OC0# V1 USB_OC1# U2 USB_OC2# P1 USB_OC3# M3 USB_OC4# T1 USB_OC5# N2 USB_OC6# M1 USB_OC7# CAD NOTE: Route single-end 50-ohms and max 500-mils length. Avoid routing next to clock pins or under stitching capacitors. Recommended minimum spacing to other signal traces is 15 mils. eDP Camera USB20_N12 USB20_P12 USB20_N13 USB20_P13 USB20_N12 USB20_P12 USB20_N13 USB20_P13 USB3RN1 USB3RP1 USB3TN1 USB3TP1 USB3RN2 USB3RP2 USB3TN2 USB3TP2 USB3RN5 USB3RP5 USB3TN5 USB3TP5 USB3RN6 USB3RP6 USB3TN6 USB3TP6 PAD~D PAD~D 42 42 53 53 52 52 52 52 52 52 52 52 53 53 53 53 53 53 53 53 RH160 22.6_0402_1%~D BD33 BB33 PETN1/USB3TN3 PETP1/USB3TP3 B37 D37 A38 C38 A36 C36 A34 C34 B33 D33 F31 G31 K31 L31 G29 H29 A32 C32 A30 C30 B29 D29 A28 C28 G26 F26 F24 G24 1 AT31 AR31 USB2N0 USB2P0 USB2N1 USB2P1 USB2N2 USB2P2 USB2N3 USB2P3 USB2N4 USB2P4 USB2N5 USB2P5 USB2N6 USB2P6 USB2N7 USB2P7 USB2N8 USB2P8 USB2N9 USB2P9 USB2N10 USB2P10 USB2N11 USB2P11 USB2N12 USB2P12 USB2N13 USB2P13 2 BE32 BC32 PERN1/USB3RN3 PERP1/USB3RP3 USB AW31 AY31 C LVDS Camera VPK K/B P1: JUSB1 P2: JUSB2 P5: JUSB3 P6: JUSB4 T135 @ T137 @ USB_OC0# USB_OC1# USB_OC2# USB_OC3# 52 52 53 53 B 5 +3V_PCH USB_OC0# USB_OC1# USB_OC3# USB_OC4# RH154 RH159 RH173 RH180 1 1 1 1 2 2 2 2 10K_0402_5%~D 10K_0402_5%~D 10K_0402_5%~D 10K_0402_5%~D USB_OC5# USB_OC6# USB_OC7# USB_OC2# RH183 RH188 RH189 RH190 1 1 1 1 2 2 2 2 10K_0402_5%~D 10K_0402_5%~D 10K_0402_5%~D 10K_0402_5%~D A A Compal Secret Data Security Classification Issued Date 2012/05/28 Deciphered Date 2013/05/27 Title Compal Electronics, Inc. PCH (5/9) PCIE,USB THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.1 LA-9332P Date: 5 4 3 2 Friday, December 14, 2012 1 Sheet 20 of 56 5 4 3 2 1 www.laptopblue.vn D D +3VS +3VS 1 2 1 2 1 2 2 1 1 2 1 2 RH270 RH271 RH164 RH179 RH267 RH57 1 RH256 1 1 RH258 DMC_RADIO_OFF# 31,36,42 DGPU_EDIDSEL# 36,39 DGPU_HPD_INT# 43 43 41 30 EC_SCI# EC_SMI# DMC_RADIO_OFF# AT8 DGPU_EDIDSEL# F13 DGPU_HPD_INT# A14 EC_SCI# G15 EC_SMI# Y1 K13 EDP_DETECT# MXM2_PRSNT_R# MXM2_PRSNT_R# PCH_GPIO16 30 GPIO22 2 1 1 2 2 1 RH264 PCH_GPIO27 MXM2_PRSNT_R# 1K_0402_1%~D 2 1 RH269 PCH_GPIO27 PCH_GPIO28 ODD_EN# 10K_0402_5%~D 50 ODD_EN# 50 C AN2 BB4 Y10 HDD2_DETECT# 10K_0402_5%~D 30 RH354 AB11 C14 MXM2_PCH_PWROK +3V_PCH RH187 LPT_PCH_M_EDS UH1F 51 PCH_GPIO27 10K_0402_5%~D ODD_DETECT# AN6 ODD_EN# AP1 ODD_DETECT# AT3 PCH_GPIO37 AK1 AT7 29 VGA_PRSNT_R# 29 VGA_PRSNT_L# VGA_PRSNT_L# AM3 FFS_INT2 AN4 KB_DET# AK3 HDD2_DETECT# U12 53 49 FFS_INT2 KB_DET# HDD2_DETECT# DGPU_BKL_PWM_SEL# 42 51 LVDS_CAB_DET# WiGi_RADIO_DIS# DGPU_BKL_PWM_SEL# C16 EDP_CAB_DET# D13 LVDS_CAB_DET# G13 H15 2 @ RH353 1K_0402_1%~D BE41 BE5 C45 A5 RH161 1 RH203 TACH2/GPIO6 CPU/Misc TACH3/GPIO7 GPIO8 LAN_PHY_PWR_CTRL/GPIO12 TP14 GPIO15 PECI SATA4GP/GPIO16 RCIN# GPIO TACH0/GPIO17 PROCPWRGD SCLOCK/GPIO22 THRMTRIP# GPIO24 PLTRST_PROC# GPIO27 VSS AN10 AY1 GATEA20 2 RH184 GATEA20 1 0_0402_5%~D AT6 KB_RST# AV3 H_CPUPWRGD AV1 PCH_THRMTRIP#_R AU4 CPU_PLTRST# 43 H_PECI 43,6 KB_RST# 43 H_CPUPWRGD 6 1 2 RH262 390_0402_5% CPU_PLTRST# H_THERMTRIP# 6 6 N10 GPIO28 GPIO34 GPIO35/NMI# SATA2GP/GPIO36 SATA3GP/GPIO37 C SLOAD/GPIO38 SDATAOUT0/GPIO39 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS SDATAOUT1/GPIO48 SATA5GP/GPIO49 GPIO57 TACH4/GPIO68 TACH5/GPIO69 TACH6/GPIO70 TACH7/GPIO71 VSS VSS VSS VSS NCTF LYNXPOINT_BGA695 PLL ON DIE VR ENABLE 1 TACH1/GPIO1 PCH_GPIO28 1 RH53 4.7K_0402_5%~D 2 42 1 AD11 STP_PCI# VGA_PRSNT_R# 49,50 +3V_PCH R11 BMBUSY#/GPIO0 @ RH257 DMC_RADIO_OFF# 10K_0402_5%~D DGPU_EDIDSEL# 10K_0402_5%~D DGPU_HPD_INT# 10K_0402_5%~D STP_PCI# 10K_0402_5%~D VGA_PRSNT_R# 10K_0402_5%~D VGA_PRSNT_L# 20K_0402_5%~D 2 GPIO22 10K_0402_5%~D 2 LVDS_CAB_DET# 10K_0402_5%~D 2 EDP_CAB_DET# 10K_0402_5%~D 2 GATEA20 10K_0402_5%~D 2 KB_RST# 10K_0402_5%~D 6 OF 11 A2 A41 A43 A44 B1 B2 B44 B45 BA1 BC1 BD1 BD2 BD44 BD45 BE2 BE3 D1 E1 E45 A4 5 +3VS ENABLED - HIGH(DEFAULT) DISABLED - LOW 1 2 2 1 RH272 RH266 2 B RH265 1 @ 2 RH268 1 @ PCH_GPIO16 10K_0402_5%~D KB_DET# 10K_0402_5%~D PCH_GPIO16 10K_0402_5%~D KB_DET# 10K_0402_5%~D B +3VS Config GPIO16,49 2 1 1@ 2 2 @ 1 2 1 RH176 * USB X4,PCIEX8,SATAX6 11 USB X6,PCIEX8,SATAX4 01 RH171 RH174 RH181 ODD_DETECT# 1K_0402_1%~D PCH_GPIO37 200K_0402_5% ODD_DETECT# 10K_0402_5%~D PCH_GPIO37 10K_0402_5%~D SATA2GP/GPIO36 , SATA3GP/GPIO37 SAMPLED AT RISING EDGE OF PWROK. WEAK INTERNAL PULL-DOWN.(WEAK INTERNAL PULL-DOWN IS DISABLED AFTER PLRST_N DE-ASSERTS). NOTE: THIS SIGNAL SHOLD NOT BE PULLED HIGH WHEN STRAP IS SAMPLED. A A Compal Secret Data Security Classification Issued Date 2012/05/28 Deciphered Date 2013/05/27 Title Compal Electronics, Inc. PCH (6/9) GPIO,MISC,NTFC THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.1 LA-9332P Date: 5 4 3 2 Friday, December 14, 2012 1 Sheet 21 of 56 5 4 3 2 1 www.laptopblue.vn D D PCH Power Rail Table Voltage Rail +1.05V_+1.5V_RUN +1.05VS VSS CRT DAC VCCADACBG3_3 VCCVRM FDI VCCIO DCPSUS1 Core VCCSUS3_3 VCCSUS3_3 +1.05V VCCIO VCCVRM SATA VCCIO VCCMPHY +PCH_VCCDSW_R AJ30 AJ32 AJ26 AJ28 AK20 AK26 AK28 2 +PCH_USB_DCPSUS3 +1.05VS +1.05V_+1.5V_RUN +1.05V_+1.5V_RUN AK18 +1.05V_+1.5V_RUN +1.05VS 1 AN11 AK22 1 +1.05VS AM18 AM20 AM22 AP22 AR22 AT22 2 1 2 1 2 1 2 1 2 1 2 2 1.05V 1.29 A 3.629 A VCCADAC1_5 1.5V 0.070 A VCCADAC3_3 3.3V 0.0133 A 0.306 A VCCCLK 1.05V VCCCLK3_3 3.3V 0.055 A VCCVRM 1.5V 0.179 A VCC3_3 3.3V 0.133 A VCCASW 1.05V 0.67 A VCCSUSHDA 3.3V 0.01 A VCCSPI 3.3V 0.022 A VCCSUS3_3 3.3V 0.261 A VCCDSW3_3 3.3V 0.015 A V_PROC_IO 1.05V 0.004 A C +1.05V 1 2 1 0_0603_5%~D @ CH34 1U_0402_6.3V6K~D 2 1 2 @CH39 @ CH39 1U_0402_6.3V6K~D 1 2 1 RH360 @ +1.05V +PCH_USB_DCPSUS3 0_0603_5%~D @CH40 @ CH40 10U_0603_6.3V6M~D 2 2 +PCH_USB_DCPSUS1 0_0402_5%~D +1.05V_+1.5V_RUN RH197 1 VCCIO B @ 2 1 BE22 5 +1.5VS 2 2 @ CH61 1U_0402_6.3V6K~D +PCH_VCCDSW 5.11_0402_1%~D 1 CH44 10U_0603_6.3V6M~D 2 1 +PCH_USB_DCPSUS1 CH45 1U_0402_6.3V6K~D 1 @ RH37 7 OF 11 Y12 CH46 1U_0402_6.3V6K~D LYNXPOINT_BGA695 R30 R32 CH47 1U_0402_6.3V6K~D B +3V_PCH CH86 1U_0402_6.3V6K~D VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO 2 AN35 @ CH85 10U_0603_6.3V6M~D C_0805NEW VCCVRM PCIe/DMI AN34 1 @ CH82 10U_0603_6.3V6M~D 2 DCPSUSBYP VCCASW VCCASW VCCASW VCCASW VCCASW VCCASW VCCASW VCCASW VCCASW VCCASW VCCASW VCCASW +3VS @ CH83 10U_0603_6.3V6M~D 2 1 CH36 1U_0402_6.3V6K~D 1 CH35 1U_0402_6.3V6K~D 2 CH64 22U_0805_6.3V6M~D 1 DCPSUS3 DCPSUS3 VCCIO VCCVRM VCCVRM USB3 +PCH_VCCDSW U14 AA18 U18 U20 U22 U24 V18 V20 V22 V24 Y18 Y20 Y22 1 BB44 CH60 0.1U_0402_10V7K~D VCC3_3_R30 VCC3_3_R32 HVCMOS +1.05VS M31 CH38 0.1U_0402_10V7K~D VCCIO P43 @ CH81 10U_0603_6.3V6M~D 2 VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC P45 CH48 1U_0402_6.3V6K~D 2 1 CH31 1U_0402_6.3V6K~D 2 1 CH33 1U_0402_6.3V6K~D 1 CH32 1U_0402_6.3V6K~D 2 VCCADAC1_5 CH30 10U_0603_6.3V6M~D 1 S0 Iccmax Current (A) 1.05V LPT_PCH_M_EDS UH1G C AA24 AA26 AD20 AD22 AD24 AD26 AD28 AE18 AE20 AE22 AE24 AE26 AG18 AG20 AG22 AG24 Y26 Voltage VCC 1 2 RH209 @ A A Compal Secret Data Security Classification Issued Date 2012/05/28 Deciphered Date 2013/05/27 Title Compal Electronics, Inc. PCH (7/9) Power THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.1 LA-9332P Date: 5 4 3 2 Friday, December 14, 2012 1 Sheet 22 of 56 5 4 3 2 1 www.laptopblue.vn +3V_PCH D D +PCH_VCCDSW3_3 +1.05VS M24 U35 L24 1 L29 L26 M26 AD34 +PCH_VCCCLK AA30 AA32 AD35 +1.05VS +1.05VS_VCC @ AD36 +3V_PCH U36 2 +3V_PCH Azalia DCPSUS2 VCCSUSHDA A26 1 VCCVRM VCC VCCSUS3_3 VCCCLK VCCRTC RTC VCCCLK3_3 DCPRTC DCPRTC K8 P14 P16 +PCH_DCPRTC VCCCLK3_3 VCCCLK3_3 VCCCLK3_3 V_PROC_IO V_PROC_IO CPU VCCCLK3_3 VCCCLK3_3 VCCSPI SPI VCCCLK VCC VCC VCCCLK VCCCLK VCCASW Fuse VCCCLK VCCASW VCCCLK VCCCLK +RTC_CELL 1 2 A6 AJ12 AJ14 CH70 1 2 1 0.1U_0402_10V7K~D +PCH_VPROC +3V_PCH AD12 1 P18 +PCH_VCCCFUSE P20 L17 2 +1.05V R18 2 1 2 1 2 2 C +1.05VS @ VCCVRM VCC3_3 Thermal VCCCLK VCCCLK VCC3_3 +3VS AK30 1 AK32 1 LYNXPOINT_BGA695 8 OF 11 2 +PCH_VPROC +1.05V_+1.5V_RUN 5 2 2 1 2 1 RH219 0_0805_5%~D 1 2 CH71 1U_0402_6.3V6K~D VCCCLK AW40 Place near pin AP45 +1.05VS 1 +1.05VS CH72 0.1U_0402_10V7K~D 2 AE30 AE32 AE14 AF12 AG14 CH76 0.1U_0402_10V7K~D 2 1 CH51 1U_0402_6.3V6K~D 1 +3VS 2 0.1U_0402_10V7K~D CH73 0.1U_0402_10V7K~D 2 +PCH_VCC 0_0603_5%~D CH55 10U_0603_6.3V6M~D LH100 1 2 1 4.7UH_LQM18FN4R7M00D_20%~D RH207 AG30 AG32 VCCIO +PCH_VCCSST 1 CH84 CH74 1U_0402_6.3V6K~D U32 V32 VCC3_3 VCC3_3 VCC3_3 VCCIO VCCIO VCCIO VCCIO ICC 2 M29 +PCH_VCCCLK3_3 @CH87 @ CH87 1U_0402_6.3V6K~D 2 +PCH_USB_DCPSUS2 0_0402_5%~D Y32 VCC3_3 +PCH_VCCDSW3_3 AA14 CH67 1U_0402_6.3V6K~D 2 AP45 +PCH_VCC +PCH_VCCCLK DCPSST VCCUSBPLL A16 CH59 1U_0402_6.3V6K~D 1 VCCDSW3_3 +3VALW @ CH68 0.1U_0402_10V7K~D 1 @ RH361 Y35 AF34 2 GPIO/LPC VSS CH69 0.1U_0402_10V7K~D +1.05V C +PCH_USB_DCPSUS2 +1.05V_+1.5V_RUN CH42 10U_0603_6.3V6M~D 2 CH37 1U_0402_6.3V6K~D 1 R20 R22 +3V_PCH RH213 1 RH253 2 0_0402_5%~D CH90 0.1U_0402_10V7K~D 2 U30 V28 V30 Y30 +1.05VS VCCSUS3_3 VCCSUS3_3 1 1 0_0402_5%~D CH65 0.1U_0402_10V7K~D 1 CH63 0.1U_0402_10V7K~D 2 +3VS VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 USB 1 CH62 0.1U_0402_10V7K~D 2 CH66 0.1U_0402_10V7K~D 1 R24 R26 R28 U26 2 CH155 0.1U_0402_10V7K~D 2 +3V_PCH CH88 0.1U_0402_10V7K~D 1 LPT_PCH_M_EDS UH1H +PCH_VCCCLK @ 1 RH214 2 0_0805_5%~D @ Place near pin AD34 Place near pin AD35,AD36 2 1 2 CH75 1U_0402_6.3V6K~D Place near pin Y32,AA30,AA32 2 1 CH79 1U_0402_6.3V6K~D 2 1 CH78 1U_0402_6.3V6K~D Place near pin AP45 2 1 CH77 1U_0402_6.3V6K~D 2 1 CH50 1U_0402_6.3V6K~D 1 CH49 1U_0402_6.3V6K~D 2 @ CH43 10U_0603_6.3V6M~D 1 B 2 +PCH_VCCCFUSE 0_0805_5%~D 2 0_0805_5%~D 1 RH220 1 RH221 @ +3VS +1.05VS B Place near pin AG30,AG32,AE30,AE32 @ +3VS +PCH_VCCCLK3_3 @ 1 RH212 2 0_0805_5%~D Place near pin M29 Place near pin L29 1 2 Place near pin L26,M26 1 2 CH58 1U_0402_6.3V6K~D 2 CH53 1U_0402_6.3V6K~D 1 CH54 1U_0402_6.3V6K~D 2 CH52 1U_0402_6.3V6K~D 1 Place near pin U32,V32 A A Compal Secret Data Security Classification Issued Date 2012/05/28 Deciphered Date 2013/05/27 Title Compal Electronics, Inc. PCH (8/9) Power THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.1 LA-9332P Date: 5 4 3 2 Friday, December 14, 2012 1 Sheet 23 of 56 5 4 3 2 1 www.laptopblue.vn D D UH1J LPT_PCH_M_EDS AL34 AL38 AL8 AM14 AM24 AM26 AM28 AM30 AM32 AM16 AN36 AN40 AN42 AN8 AP13 AP24 AP31 AP43 AR2 AK16 AT10 AT15 AT17 AT20 AT26 AT29 AT36 AT38 D42 AV13 AV22 AV24 AV31 AV33 BB25 AV40 AV6 AW2 F43 AY10 AY15 AY20 AY26 AY29 AY7 B11 B15 C B VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS UH1K VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS K39 L2 L44 M17 M22 N12 N35 N39 N6 P22 P24 P26 P28 P30 P32 R12 R14 R16 R2 R34 R38 R44 R8 T43 U10 U16 U28 U34 U38 U42 U6 V14 V16 V26 V43 W2 W44 Y14 Y16 Y24 Y28 Y34 Y36 Y40 Y8 AA16 AA20 AA22 AA28 AA4 AB12 AB34 AB38 AB8 AC2 AC44 AD14 AD16 AD18 AD30 AD32 AD40 AD6 AD8 AE16 AE28 AF38 AF8 AG16 AG2 AG26 AG28 AG44 AJ16 AJ18 AJ20 AJ22 AJ24 AJ34 AJ38 AJ6 AJ8 AK14 AK24 AK43 AK45 AL12 AL2 BC22 BB42 LPT_PCH_M_EDS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS B19 B23 B27 B31 B35 B39 B7 BA40 BD11 BD15 BD19 AY36 AT43 BD31 BD35 BD39 BD7 D25 AV7 F15 F20 F29 F33 BC16 D4 G2 G38 G44 G8 H10 H13 H17 H22 H24 H26 H31 H36 H40 H7 K10 K15 K20 K29 K33 BC28 C B LYNXPOINT_BGA695 LYNXPOINT_BGA695 10 OF 11 11 OF 11 5 5 A A Compal Secret Data Security Classification Issued Date 2012/05/28 2013/05/27 Deciphered Date Title Compal Electronics, Inc. PCH (9/9) Power THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.1 LA-9332P Date: 5 4 3 2 Friday, December 14, 2012 Sheet 1 24 of 56 5 4 3 2 1 www.laptopblue.vn D D C C B B A A Compal Secret Data Security Classification Issued Date 2010/08/25 Deciphered Date 2012/08/25 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Title Cactus (1/4) DP/PCIE Size Document Number Custom 4 3 2 Rev 0.1 LA-9332P Date: 5 Compal Electronics, Inc. Friday, December 14, 2012 Sheet 1 25 of 56 5 4 3 2 1 www.laptopblue.vn D D C C B B A A Compal Secret Data Security Classification Issued Date 2010/08/25 Deciphered Date 2012/08/25 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Title Cactus (2/4) CIO Size C Date: 5 4 3 2 Compal Electronics, Inc. Document Number Rev 0,1 LA-9332P Friday, December 14, 2012 Sheet 1 26 of 56 5 4 3 2 1 www.laptopblue.vn D D C C B B A A Compal Secret Data Security Classification 2010/08/25 Issued Date Deciphered Date 2012/08/25 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 4 3 2 Title Compal Electronics, Inc. Cactus (3/4) PWR/VSS/DC-DC Size Document Number Custom Rev 0.1 LA-9332P Date: Friday, December 14, 2012 Sheet 1 27 of 56 5 4 3 2 1 www.laptopblue.vn D D C C B B A A Compal Secret Data Security Classification Issued Date 2010/08/25 Deciphered Date 2012/08/25 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 4 3 2 Title Compal Electronics, Inc. A Size Document Number Custom Rev 0.1 LA-9332P Date: Friday, December 14, 2012 1 Sheet 28 of 56 5 4 3 2 1 www.laptopblue.vn 42 42 VGA_HDMI_CEC VGA_LCD_DAT VGA_LCD_DAT VGA_LCD_CLK VGA_LCD_CLK LVDS DDC Module have 4.7K Pull-UP PEG_GTX_HRX_N7 PEG_GTX_HRX_P7 B PEG_GTX_HRX_N6 PEG_GTX_HRX_P6 PEG_GTX_HRX_N5 PEG_GTX_HRX_P5 PEG_GTX_HRX_N4 PEG_GTX_HRX_P4 PEG_GTX_HRX_N3 PEG_GTX_HRX_P3 64 1 MXM_CUR_VIN+ RV88 2 2 2 1 EC_SMB_DA1 CV5 2 0.1U_0402_25V6K~D 1 3 43,57,64 3 HDMI DMC Place C102, C105, C108 close MXM connector (Pull-UP 10K at PCH) VGA_SMB_DA1 VGA_SMB_DA1 30 VGA_SMB_CK1 30 1 2 QV6 SSM3K7002F_SC59-3~D 1 EC_SMB_CK1 3 VGA_SMB_CK1 QV8 SSM3K7002F_SC59-3~D JMXM1B LVDS TZ 2 1 2 G 43,57,64 43 QV7 SSM3K7002F_SC59-3~D G VCC 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 TH_OVERT# G 2 1 S 1 1 2 3 VGA_TH_OVERT# 1 S 2 2 D 1 2 163 165 PEG_GTX_HRX_N2 UV4 1 167 PEG_GTX_HRX_P2 17,43,47,57,64 ACIN B 4 169 AC_BATT# AC_BATT# 30 Y 2 171 PEG_GTX_HRX_N1 43 EC_AC_BAT# A 173 PEG_GTX_HRX_P1 175 MC74VHC1G09DFT2G_SC70-5 2 1 177 PEG_GTX_HRX_N0 179 PEG_GTX_HRX_P0 181 RV92 @ 0_0402_5%~D 1 2 0_0402_1% 183 CLK_PEG_PCH#_R RV76 @ 18 CLK_PEG_PCH# 1 2 185 VGA_PRSNT_R# CLK_PEG_PCH_R RV77 @ 0_0402_1% VGA_PRSNT_R# 21 18 CLK_PEG_PCH 187 VGA_WAKE# 189 DGPU_PWROK DGPU_PWROK 18,31 191 VR_ON VR_ON 30,43 193 195 197 +3V_MXM 199 LVDS_MXM_TZCLK+3VMXM 41 LVDS_MXM_TZCLK201 AC_BATT# LVDS_MXM_TZCLK+ 41 LVDS_MXM_TZCLK+ 203 VGA_TH_OVERT# J13 @ VGA_TH_OVERT# 30 1 2 2 1 205 207 RV79 10K_0402_5%~D 209 PAD-OPEN 4x4m 211 LVDS_MXM_TZOUT241 LVDS_MXM_TZOUT2213 LVDS_MXM_TZOUT2+ 1 41 LVDS_MXM_TZOUT2+ 215 VGA_SMB_DA1 217 VGA_SMB_CK1 LVDS_MXM_TZOUT141 LVDS_MXM_TZOUT1219 LVDS_MXM_TZOUT1+ SYSTEM 41 LVDS_MXM_TZOUT1+ 2 221 223 VGA_PS_0 LVDS_MXM_TZOUT041 LVDS_MXM_TZOUT0225 VGA_PS_1 LVDS_MXM_TZOUT0+ 41 LVDS_MXM_TZOUT0+ 227 VGA_PS_2 229 GPU_HDMI_TXD236 GPU_HDMI_TXD2+3V_MXM +3V_MXM +3V_MXM 231 GPU_HDMI_TXD2+ 36 GPU_HDMI_TXD2+ 233 235 GPU_HDMI_TXD136 GPU_HDMI_TXD1237 GPU_HDMI_TXD1+ 36 GPU_HDMI_TXD1+ 239 241 GPU_HDMI_TXD0@ @ @ 36 GPU_HDMI_TXD0243 GPU_HDMI_TXD0+ 36 GPU_HDMI_TXD0+ 245 247 GPU_HDMI_TXC36 GPU_HDMI_TXC249 VGA_PS_2 GPU_HDMI_TXC+ 36 GPU_HDMI_TXC+ 251 253 VGA_PS_1 GPU_HDMI_SDATA 36 GPU_HDMI_SDATA 255 GPU_HDMI_SCLK 36 GPU_HDMI_SCLK 257 VGA_PS_0 259 261 263 265 267 269 @ @ @ 271 273 275 277 279 PEG_HTX_C_GRX_N7 281 PEG_HTX_C_GRX_P7 283 VGA_DPD_N0 39 VGA_DPD_N0 285 PEG_HTX_C_GRX_N6 VGA_DPD_P0 39 VGA_DPD_P0 287 PEG_HTX_C_GRX_P6 289 VGA_DPD_N1 39 VGA_DPD_N1 291 PEG_HTX_C_GRX_N5 VGA_DPD_P1 39 VGA_DPD_P1 293 PEG_HTX_C_GRX_P5 295 VGA_DPD_N2 39 VGA_DPD_N2 297 PEG_HTX_C_GRX_N4 VGA_DPD_P2 39 VGA_DPD_P2 299 PEG_HTX_C_GRX_P4 301 VGA_DPD_N3 39 VGA_DPD_N3 303 PEG_HTX_C_GRX_N3 VGA_DPD_P3 39 VGA_DPD_P3 305 PEG_HTX_C_GRX_P3 307 39 VGA_DPD_AUXN/DDC 309 39 VGA_DPD_AUXP/DDC 1 0.01U_0402_16V7K~D 310 VGA_PS_0 @ CV9 2 21 VGA_PRSNT_L# 1 0.01U_0402_16V7K~D VGA_PS_1 @ CV10 2 1 0.01U_0402_16V7K~D 311 VGA_PS_2 @ CV11 2 JAE_MM70-314-310B1-1-R300 CONN@ 2 1 RV86 0_0402_5%~D 1 2 DGPU_ENVDD DGPU_BKL_EN VGA_PNL_PWM +3VALW 1 CV8 4.7U_0805_10V4Z~D 42 42 42 GND GND GND GND GND E4 GND GND GND GND PRSNT_R# WAKE# PWR_GOOD PWR_EN RSVD RSVD RSVD RSVD PWR_LEVEL TH_OVERT# TH_ALERT# TH_PWM GPIO0 GPIO1 GPIO2 SMB_DAT SMB_CLK GND OEM OEM OEM OEM GND PEX_TX15# PEX_TX15 GND PEX_TX14# PEX_TX14 GND PEX_TX13# PEX_TX13 GND PEX_TX12# PEX_TX12 GND PEX_TX11# PEX_TX11 GND PEX_TX10# PEX_TX10 GND PEX_TX9# PEX_TX9 GND PEX_TX8# PEX_TX8 GND PEX_TX7# PEX_TX7 GND PEX_TX6# PEX_TX6 GND PEX_TX5# PEX_TX5 GND PEX_TX4# PEX_TX4 GND PEX_TX3# PEX_TX3 GND 2 4 6 8 10 12 14 16 18 RV93 0_0402_5%~D 1 2 C 2 0_0402_5%~D VGA_DISABLE# GND GND GND GND GND E3 GND GND GND GND 5V 5V 5V 5V 5V GND GND GND GND PEX_STD_SW# VGA_DISABLE# PNL_PWR_EN PNL_BL_EN PNL_BL_PWM HDMI_CEC DVI_HPD LVDS_DDC_DAT LVDS_DDC_CLK GND OEM OEM OEM OEM GND PEX_RX15# PEX_RX15 GND PEX_RX14# PEX_RX14 GND PEX_RX13# PEX_RX13 GND PEX_RX12# PEX_RX12 GND PEX_RX11# PEX_RX11 GND PEX_RX10# PEX_RX10 GND PEX_RX9# PEX_RX9 GND PEX_RX8# PEX_RX8 GND PEX_RX7# PEX_RX7 GND PEX_RX6# PEX_RX6 GND PEX_RX5# PEX_RX5 GND PEX_RX4# PEX_RX4 GND PEX_RX3# PEX_RX3 GND D 1 10K_0402_5%~D 2011/11/25 remove CRT conn RV84 0_0402_5%~D 1 2 RV78 1 2 RV87 0_0402_5%~D 1 2 100mil(2.5A, 5VIA) Add R7 increase NV MXM PEG Swing RV70 +3V_MXM +3VALW D +5V_MXM AC_BATT# 2 3.3K_0402_5% 2 3.3K_0402_5% @ @ S 2 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 1 1 CV4 0.1U_0603_25V7K~D 2 1 CV7 10U_0603_6.3V6M~D 1 CV6 0.1U_0402_16V4Z~D PAD-OPEN 4x4m E2 PWR_SRC PWR_SRC PWR_SRC PWR_SRC PWR_SRC PWR_SRC PWR_SRC PWR_SRC PWR_SRC CV3 68P_0402_50V8J~D 1 PWR_SRC PWR_SRC PWR_SRC PWR_SRC PWR_SRCE1 PWR_SRC PWR_SRC PWR_SRC PWR_SRC CV2 680P_0603_50V7K~D 2 RV64 RV66 400mil(10A) CV1 10U_1206_25V6M~D J12 @ MXM_CURI2C_CLK MXM_CURI2C_DATA B+_MXM JMXM1A 1 3 5 7 9 11 13 15 17 +5V_MXM +5VMXM 4.3K_0402_5% 4.3K_0402_5% 10K_0402_5%~D 10K_0402_5%~D 10K_0402_5%~D 10K_0402_5%~D G B+_MXM @ @ 2 2 1 2 2 2 5 PEG_GTX_HRX_P[0..15] @ RV83 0_0402_5%~D 1 2 PEG_GTX_HRX_P[0..15] 1 1 2 1 1 1 RV85 0_0402_5%~D 1 2 30,5 PEG_GTX_HRX_N[0..15] RV63 RV65 RV67 RV68 RV69 RV75 RV74 4.7K_0402_5%~D PEG_GTX_HRX_N[0..15] +3V_MXM +3V_MXM VGA_LCD_CLK VGA_LCD_DAT DGPU_PWROK VGA_HDMI_CEC VGA_DISABLE# VGA_WAKE# PEG_HTX_C_GRX_P[0..15] RV73 4.7K_0402_5%~D 30,5 +3V_MXM PEG_HTX_C_GRX_N[0..15] RV72 10K_0402_5%~D PEG_HTX_C_GRX_P[0..15] RV71 10K_0402_5%~D PEG_HTX_C_GRX_N[0..15] 30,5 D +3V_MXM 30,5 D GND GND PEX_RX2# PEX_TX2# PEX_RX2 PEX_TX2 GND GND PEX_RX1# PEX_TX1# PEX_RX1 PEX_TX1 GND GND PEX_RX0# PEX_TX0# PEX_RX0 PEX_TX0 GND GND PEX_REFCLK# PEX_CLK_REQ# PEX_REFCLK PEX_RST# GND VGA_DDC_DAT RSVD VGA_DDC_CLK RSVD VGA_VSYNC RSVD VGA_HSYNC RSVD GND RSVD VGA_RED LVDS_UCLK# VGA_GREEN LVDS_UCLK VGA_BLUE GND GND LVDS_UTX3# LVDS_LCLK# LVDS_UTX3 LVDS_LCLK GND GND LVDS_UTX2# LVDS_LTX3# LVDS_UTX2 LVDS_LTX3 GND GND LVDS_UTX1# LVDS_LTX2# LVDS_UTX1 LVDS_LTX2 GND GND LVDS_UTX0# LVDS_LTX1# LVDS_UTX0 LVDS_LTX1 GND GND DP_C_L0# LVDS_LTX0# DP_C_L0 LVDS_LTX0 GND GND DP_C_L1# DP_D_L0# DP_C_L1 DP_D_L0 GND GND DP_C_L2# DP_D_L1# DP_C_L2 DP_D_L1 GND GND DP_C_L3# DP_D_L2# DP_C_L3 DP_D_L2 GND GND DP_C_AUX# DP_D_L3# DP_C_AUX DP_D_L3 RSVD GND RSVD DP_D_AUX# RSVD DP_D_AUX RSVD DP_C_HPD RSVD DP_D_HPD RSVD RSVD RSVD RSVD RSVD RSVD RSVD GND RSVD DP_B_L0# RSVD DP_B_L0 RSVD GND GND DP_B_L1# DP_A_L0# DP_B_L1 DP_A_L0 GND GND DP_B_L2# DP_A_L1# DP_B_L2 DP_A_L1 GND GND DP_B_L3# DP_A_L2# DP_B_L3 DP_A_L2 GND GND DP_B_AUX# DP_A_L3# DP_B_AUX DP_A_L3 DP_B_HPD GND DP_A_HPD DP_A_AUX# 3V3 DP_A_AUX 3V3 PRSNT_L# GND GND 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204 206 208 210 212 214 216 218 220 222 224 226 228 230 232 234 236 238 240 242 244 246 248 250 252 254 256 258 260 262 264 266 268 270 272 274 276 278 280 282 284 286 288 290 292 294 296 298 300 302 304 306 308 PEG_HTX_C_GRX_N2 PEG_HTX_C_GRX_P2 PEG_HTX_C_GRX_N1 PEG_HTX_C_GRX_P1 PEG_HTX_C_GRX_N0 PEG_HTX_C_GRX_P0 PEG_CLKREQ# PLTRST_VGA# PEG_CLKREQ# PLTRST_VGA# 18 17,30 CRT LVDS_MXM_TXCLKLVDS_MXM_TXCLK+ LVDS_MXM_TXCLKLVDS_MXM_TXCLK+ 41 41 C LVDS TX LVDS_MXM_TXOUT2LVDS_MXM_TXOUT2+ LVDS_MXM_TXOUT1LVDS_MXM_TXOUT1+ LVDS_MXM_TXOUT0LVDS_MXM_TXOUT0+ LVDS_MXM_TXOUT2LVDS_MXM_TXOUT2+ 41 41 LVDS_MXM_TXOUT1LVDS_MXM_TXOUT1+ 41 41 LVDS_MXM_TXOUT0LVDS_MXM_TXOUT0+ 41 41 eDP VGA_HDMI_DET VGA_DPC_N0 VGA_DPC_P0 VGA_HDMI_DET 36 VGA_DPC_N0 VGA_DPC_P0 31 31 VGA_DPC_N1 VGA_DPC_P1 VGA_DPC_N1 VGA_DPC_P1 31 31 VGA_DPC_N2 VGA_DPC_P2 VGA_DPC_N2 VGA_DPC_P2 31 31 VGA_DPC_N3 VGA_DPC_P3 VGA_DPC_N3 VGA_DPC_P3 31 31 VGA_DPC_AUXN/DDC VGA_DPC_AUXP/DDC VGA_DPC_HPD VGA_DMC_HPD VGA_DPC_AUXN/DDC VGA_DPC_AUXP/DDC VGA_DPC_HPD 31 VGA_DMC_HPD 39 B mDP 31 31 +3V_MXM 80mil(2A) 312 JAE_MM70-314-310B1-1-R300 CONN@ 0_0402_5%~D 1 CV12 @ .1U_0402_16V7K~D 64 1 MXM_CUR_VINRV89 UV5 2 2 0_0402_5%~D +3V_MXM 1 2 3 4 VIN+ VINGND VS A1 A0 SDA SCL 8 7 6 5 B+_MXM_A1 B+_MXM_A0 MXM_CURI2C_DATA 0_0402_1% MXM_CURI2C_CLK 0_0402_1% @ 2 2 @ 1 1 RV90 RV91 VGA_SMB_DA1 VGA_SMB_CK1 HPA00900AIDCNR_SOT23-8 MXM1 Current Monitor +3V_MXM 2 RV403 2 RV408 A 2 B+_MXM_A1 @ 1 10K_0402_5%~D RV406 1 2 B+_MXM_A0 @ 10K_0402_5%~D RV409 For B+_MXM slave address : 1000010 please placemnet near R-sense 1 10K_0402_5%~D 1 10K_0402_5%~D A @ 2 DV17 1 VGA_PRSNT_R# UCLAMP0511P.TCT_SLP1006P2-2~D @ 2 DV18 1 VGA_PRSNT_L# Compal Secret Data Security Classification UCLAMP0511P.TCT_SLP1006P2-2~D Issued Date 2012/05/28 Deciphered Date 2013/05/27 Title Compal Electronics, Inc. MXMIII Connector THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.1 LA-9332P Date: 5 4 3 2 Friday, December 14, 2012 1 Sheet 29 of 56 3 2 1 +3V_MXM1 +3V_MXM1 +3V_MXM1 1 www.laptopblue.vn RV400 1 @ 2 64 RV423 1 MXM1_CUR_VIN+ 1 RV427 MXM1_CUR_VIN- +3V_MXM1 +3V_MXM1 1 10K_0402_5%~D MXM2_PCH_PWROK @ RV429 1 2 10K_0402_5%~D VGA2_WAKE# UV33 1 2 3 4 VIN+ VINGND VS A1 A0 SDA SCL 8 7 6 5 B+_MXM1_A1 B+_MXM1_A0 MXM_CUR_DAT MXM_CUR_CLK INA219AIDCNRG4_SOT23-8 5 5 PEG_GTX_HRX_N15 PEG_GTX_HRX_P15 PEG_GTX_HRX_N15 PEG_GTX_HRX_P15 5 5 PEG_GTX_HRX_N14 PEG_GTX_HRX_P14 PEG_GTX_HRX_N14 PEG_GTX_HRX_P14 5 5 PEG_GTX_HRX_N13 PEG_GTX_HRX_P13 PEG_GTX_HRX_N13 PEG_GTX_HRX_P13 PEG_GTX_HRX_N12 PEG_GTX_HRX_P12 PEG_GTX_HRX_N12 PEG_GTX_HRX_P12 5 5 2 RV428 MXM2 Current Monitor 2 2 0_0402_5%~D 0.1U_0402_25V6K~D 0.1U_0402_25V6K~D A @ 2 64 1 CV371 @ CV370 1 2 0_0402_5%~D 5 5 PEG_GTX_HRX_N11 PEG_GTX_HRX_P11 PEG_GTX_HRX_N11 PEG_GTX_HRX_P11 2 10K_0402_5%~D D 2 0.01U_0402_16V7K~D 2 0.01U_0402_16V7K~D 2 0.01U_0402_16V7K~D MXM2_PRSNT_R# 21 MXM2_PCH_PWROK 21 AC_BATT# AC_BATT# 29 VGA_TH_OVERT# VGA_TH_OVERT# 29 1 2 +3V_MXM1 RV416 10K_0402_5%~D VGA_SMB_DA2 VGA_SMB_CK2 MXM_PS_3 MXM_PS_4 MXM_PS_5 +3VMXM @ @ @ @ @ @ PEG_HTX_C_GRX_N15 PEG_HTX_C_GRX_P15 PEG_HTX_C_GRX_N14 PEG_HTX_C_GRX_P14 PEG_HTX_C_GRX_N13 PEG_HTX_C_GRX_P13 PEG_HTX_C_GRX_N12 PEG_HTX_C_GRX_P12 PEG_HTX_C_GRX_N11 PEG_HTX_C_GRX_P11 MXM_PS_3 MXM_PS_4 MXM_PS_5 PEG_HTX_C_GRX_N15 PEG_HTX_C_GRX_P15 5 5 PEG_HTX_C_GRX_N14 PEG_HTX_C_GRX_P14 5 5 PEG_HTX_C_GRX_N13 PEG_HTX_C_GRX_P13 5 5 PEG_HTX_C_GRX_N12 PEG_HTX_C_GRX_P12 5 5 PEG_HTX_C_GRX_N11 PEG_HTX_C_GRX_P11 5 5 311 GND GND PEG_HTX_C_GRX_N8 PEG_HTX_C_GRX_P8 PEG_HTX_C_GRX_N8 PEG_HTX_C_GRX_P8 MXM2_CLKREQ# MXM2_RST# 5 5 18 +3VMXM 2 1 RV459 43 21 MXM2_EC_RST# 1 @ 1 @ 10K_0402_5%~D 2 0_0402_5%~D 2 0_0402_5%~D RV449 PCH_GPIO27 RV452 MXM2_RST# +3VALW CV369 1 2 0.1U_0402_25V6K~D 1 MXM2_RST# IN1 MXM2_RST# 4 O 2 IN2 PLTRST_VGA# 17,29 B UV32 SN74AHC1G08DCKR_SC70-5 RV422 100K_0402_5% RV444 1 2 0_0402_5%~D @ +3VALW CV372 1 2 0.1U_0402_25V6K~D 1 MXM2_PCH_PWR_ON IN1 MXM2_PWR_ON 4 O IN2 2 VR_ON 43 29,43 UV34 SN74AHC1G08DCKR_SC70-5 +3V_MXM1 80mil(2A) 312 RV445 1 @ JAE_MM70-314-310B1-1-R300 2 0_0402_5%~D A DELL CONFIDENTIAL/PROPRIETARY Compal Electronics, Inc. PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL. THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. VGA2_DISABLE# 4 5 5 5 5 C Title MXMIII Connector (Slave) Size 3 2 Document Number Rev 1.0 LA-9332P Date: 5 MXM2_CLKREQ# 5 MXM2_PRSNT_R# VGA2_WAKE# MXM2_PCH_PWROK MXM2_PWR_ON 1 1 1 PEG_HTX_C_GRX_N9 PEG_HTX_C_GRX_P9 P MXM_PS_3 @ CV366 MXM_PS_4 @ CV360 MXM_PS_5 @ CV361 PEG_GTX_HRX_N8 PEG_GTX_HRX_P8 0_0402_5%~D 2 MXM2_PEG_PCH#_R 2 MXM2_PEG_PCH_R 0_0402_5%~D PEG_HTX_C_GRX_N10 PEG_HTX_C_GRX_P10 PEG_HTX_C_GRX_N9 PEG_HTX_C_GRX_P9 G PEG_GTX_HRX_N8 PEG_GTX_HRX_P8 MXM2_PEG_PCH# RV407 1 MXM2_PEG_PCH RV412 1 JAE_MM70-314-310B1-1-R300 @ RV430 1 5 5 PEG_HTX_C_GRX_N10 PEG_HTX_C_GRX_P10 3 B PEG_GTX_HRX_N9 PEG_GTX_HRX_P9 5 29 29 PEG_GTX_HRX_N9 PEG_GTX_HRX_P9 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204 206 208 210 212 214 216 218 220 222 224 226 228 230 232 234 236 238 240 242 244 246 248 250 252 254 256 258 260 262 264 266 268 270 272 274 276 278 280 282 284 286 288 290 292 294 296 298 300 302 304 306 308 P VGA_SMB_DA1 VGA_SMB_CK1 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 18 18 5 5 GND GND PEX_RX2# PEX_TX2# PEX_RX2 PEX_TX2 GND GND PEX_RX1# PEX_TX1# PEX_RX1 PEX_TX1 GND GND PEX_RX0# PEX_TX0# PEX_RX0 PEX_TX0 GND GND PEX_REFCLK# PEX_CLK_REQ# PEX_REFCLK PEX_RST# GND VGA_DDC_DAT RSVD VGA_DDC_CLK RSVD VGA_VSYNC RSVD VGA_HSYNC RSVD GND RSVD VGA_RED LVDS_UCLK# VGA_GREEN LVDS_UCLK VGA_BLUE GND GND LVDS_UTX3# LVDS_LCLK# LVDS_UTX3 LVDS_LCLK GND GND LVDS_UTX2# LVDS_LTX3# LVDS_UTX2 LVDS_LTX3 GND GND LVDS_UTX1# LVDS_LTX2# LVDS_UTX1 LVDS_LTX2 GND GND LVDS_UTX0# LVDS_LTX1# LVDS_UTX0 LVDS_LTX1 GND GND DP_C_L0# LVDS_LTX0# DP_C_L0 LVDS_LTX0 GND GND DP_C_L1# DP_D_L0# DP_C_L1 DP_D_L0 GND GND DP_C_L2# DP_D_L1# DP_C_L2 DP_D_L1 GND GND DP_C_L3# DP_D_L2# DP_C_L3 DP_D_L2 GND GND DP_C_AUX# DP_D_L3# DP_C_AUX DP_D_L3 RSVD GND RSVD DP_D_AUX# RSVD DP_D_AUX RSVD DP_C_HPD RSVD DP_D_HPD RSVD RSVD RSVD RSVD RSVD RSVD RSVD GND RSVD DP_B_L0# RSVD DP_B_L0 RSVD GND GND DP_B_L1# DP_A_L0# DP_B_L1 DP_A_L0 GND GND DP_B_L2# DP_A_L1# DP_B_L2 DP_A_L1 GND GND DP_B_L3# DP_A_L2# DP_B_L3 DP_A_L2 GND GND DP_B_AUX# DP_A_L3# DP_B_AUX DP_A_L3 DP_B_HPD GND DP_A_HPD DP_A_AUX# 3V3 DP_A_AUX 3V3 PRSNT_L# G 2 0_0402_5%~D VGA2_DISABLE# 10K_0402_5%~D GND GND GND GND GND E4 GND GND GND GND PRSNT_R# WAKE# PWR_GOOD PWR_EN RSVD RSVD RSVD RSVD PWR_LEVEL TH_OVERT# TH_ALERT# TH_PWM GPIO0 GPIO1 GPIO2 SMB_DAT SMB_CLK GND OEM OEM OEM OEM GND PEX_TX15# PEX_TX15 GND PEX_TX14# PEX_TX14 GND PEX_TX13# PEX_TX13 GND PEX_TX12# PEX_TX12 GND PEX_TX11# PEX_TX11 GND PEX_TX10# PEX_TX10 GND PEX_TX9# PEX_TX9 GND PEX_TX8# PEX_TX8 GND PEX_TX7# PEX_TX7 GND PEX_TX6# PEX_TX6 GND PEX_TX5# PEX_TX5 GND PEX_TX4# PEX_TX4 GND PEX_TX3# PEX_TX3 GND 2 4 6 8 10 12 14 16 18 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203 205 207 209 211 213 215 217 219 221 223 225 227 229 231 233 235 237 239 241 243 245 247 249 251 253 255 257 259 261 263 265 267 269 271 273 275 277 279 281 283 285 287 289 291 293 295 297 299 301 303 305 307 309 310 3 @ 2 0_0402_1% 2 0_0402_1% D 1 2 @ 1 1 VGA_SMB_DA2 2 RV415 1 RV81 1 GND GND GND GND GND E3 GND GND GND GND 5V 5V 5V 5V 5V GND GND GND GND PEX_STD_SW# VGA_DISABLE# PNL_PWR_EN PNL_BL_EN PNL_BL_PWM HDMI_CEC DVI_HPD LVDS_DDC_DAT LVDS_DDC_CLK GND OEM OEM OEM OEM GND PEX_RX15# PEX_RX15 GND PEX_RX14# PEX_RX14 GND PEX_RX13# PEX_RX13 GND PEX_RX12# PEX_RX12 GND PEX_RX11# PEX_RX11 GND PEX_RX10# PEX_RX10 GND PEX_RX9# PEX_RX9 GND PEX_RX8# PEX_RX8 GND PEX_RX7# PEX_RX7 GND PEX_RX6# PEX_RX6 GND PEX_RX5# PEX_RX5 GND PEX_RX4# PEX_RX4 GND PEX_RX3# PEX_RX3 GND E2 PWR_SRC PWR_SRC PWR_SRC PWR_SRC PWR_SRC PWR_SRC PWR_SRC PWR_SRC PWR_SRC PEG_GTX_HRX_N10 PEG_GTX_HRX_P10 RV421 0_0402_5%~D 2 1 +5V_MXM1 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 PWR_SRC PWR_SRC PWR_SRC PWR_SRC PWR_SRCE1 PWR_SRC PWR_SRC PWR_SRC PWR_SRC PEG_GTX_HRX_N10 PEG_GTX_HRX_P10 RV426 0_0402_5%~D 2 1 1 0_0402_5% 1 0_0402_5% 1 3 5 7 9 11 13 15 17 5 5 RV420 0_0402_5%~D 2 1 1 100mil(2.5A, 5VIA) MXM_CUR_DAT RV413 MXM_CUR_CLK RV414 4.7K_0402_5%~D QV30 3 2N7002E-T1-E3_SOT23-3VGA_SMB_CK2 1 EC_SMB_CK2 B+_MXM1 JMXM2A RV425 0_0402_5%~D 2 1 2 2 CV364 CV363 2 1 0.1U_0603_50V7K~D CV365 2 1 68P_0402_50V8J~D CV362 2 RV411 1 EC_SMB_DA2 JMXM2B 680P_0402_50V7K~D 10U_0805_25V6K~D RV404 C 19,40,43,53,54 04/06-118 +3V_MXM1 1 2 B+_MXM1_A1 3.3K_0402_5%~D @ RV410 1 2 B+_MXM1_A0 3.3K_0402_5%~D @ RV405 MXM2_PRSNT_R# UCLAMP0511P.TCT_SLP1006P2-2~D @ 2 B+_MXM1 2 1 19,40,43,53,54 JUMP_43X118 160mil(4A) 1 DV15 2 1 RV419 0_0402_5%~D 2 1 2 1 CV359 2 1 0.1U_0402_25V6K~D 2 1 CV367 1U_0402_6.3V4Z~D CV357@ 4.7U_0603_10V6K~D CV368 1U_0402_6.3V4Z~D 1 2 S 2 D 1 CV387 1U_0402_6.3V4Z~D 2 1 JUMP_43X118 1 D 2 RV401 4.7K_0402_5%~D QV29 3 2N7002E-T1-E3_SOT23-3 2 G +5VMXM J15 RV424 0_0402_5%~D 2 1 2 2 G +5V_MXM1 +3VMXM J14 S 02/21-109 +3V_MXM1 1 4 2 5 Friday, December 14, 2012 Sheet 1 30 of 56 5 4 3 2 1 1 1 6 12 25 32 36 UV6 2 2 2 2 2 1 RV435 @ 1 RV436 @ 1 RV437 @ 1 RV438 1 RV431 DP_PEQ DP_CFG1_INPUT DP_CFG0 DP_POWER_DOWN# DP_RST# 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 2 2 2 2 1 RV432 @ 1 RV440 @ 1 RV441 @ 1 RV443 @ DP_PEQ DP_CFG1_INPUT DP_CFG0 DP_POWER_DOWN# 38 39 41 42 44 45 47 48 CPU_MXM_MDP_P0_C CPU_MXM_MDP_N0_C CPU_MXM_MDP_P1_C CPU_MXM_MDP_N1_C CPU_MXM_MDP_P2_C CPU_MXM_MDP_N2_C CPU_MXM_MDP_P3_C CPU_MXM_MDP_N3_C D 3 4 VGA_DPC_HPD VGA_DPC_HPD IN1 O 1 2 DGPU_PWROK 18,29 @ DP_VGA_HPD_BUF 7 2 RV446 T184 PAD~D MDP_CAB_DET 8 DISP_HPD_SINK 9 DISP_CLKA_AUXP 33 DISP_DATA_AUXN 34 2 RV655 1 0_0402_5%~D SCL_CTL/PEQ SDA_CTL/CFG0 CAD_SNK REXT HPD_SINK CV31 2 CV32 2 1 0.1U_0402_10V6K~D 1 0.1U_0402_10V6K~D 30 29 DISP_mDP_AUXP_C DISP_mDP_AUXN_C VGA_DPC_AUXN/DDC 1 RV450 100K_0402_5%~D 1 ATI D 46 35 DP_RST# CV29 10 CAB_DET_SINK AUX_SNKP AUX_SNKN SCL_DDC SDA_DDC 11 DISP_HPD_SINK_R 28 27 DISP_CLK_AUXP_CONN DISP_DAT_AUXN_CONN 22.2U_0402_6.3V6M~D 1 15 21 37 43 CEXT NC2 NC3 NC4 NC5 AUX_SRCP AUX_SRCN 1 2.2U_0402_6.3V6M~D 2 CV30 DP_MXM_CARD_SEL 2 G VGA_DPC_AUXN/DDC 1 CAB_DET_SINK RV464 1 2 0_0402_5% 1 1 2 1 2 1 DISP_HPD_SINK_R CBTD3306PW_TSSOP8 D 2 G QV9 BSS138_SOT23~D 3 2 0_0402_5% 2 3 1 1 S 2 SN74LVC1G3157DCKR_SC70-6 UV37 2 VGA_DPC_HPD 100K_0402_5%~D PCH_mDP_HPD 100K_0402_5%~D RV656 1 0_0402_5%~D 29,31 @ DGPU_SEL# Chanel Source 0 B1 GPU 1 B2 CPU VGA_DPC_AUXP/DDC 17 17 29,31 PCH_mDP_AUXP PCH_DPC_MDP_CLK VGA_DPC_AUXN/DDC 17 17 PCH_mDP_AUXN PCH_DPC_MDP_DAT 0.1U_0402_25V6K~D 2 1 CV379 VGA_DPC_SW_AUXP 0.1U_0402_25V6K~D 2 1 CV380 PCH_DPC_AUXP_SW PCH_DPC_CLK 0.1U_0402_25V6K~D 2 1 CV381 VGA_DPC_SW_AUXN 0.1U_0402_25V6K~D 2 1 CV382 PCH_DPC_AUXN_SW PCH_DPC_DAT 6 5 4 3 10 11 12 13 1 2 1 2 2B1 2B2 2B3 2B4 1A 2A 2OE 1OE GND S0 S1 29 29 VGA_DPC_P0 VGA_DPC_N0 CV33 2 CV34 2 1 0.1U_0402_10V6K~D 1 0.1U_0402_10V6K~D DISP_C_A0P DISP_C_A0N 42 41 29 29 VGA_DPC_P1 VGA_DPC_N1 CV35 2 CV36 2 1 0.1U_0402_10V6K~D 1 0.1U_0402_10V6K~D DISP_C_A1P DISP_C_A1N 40 39 29 29 VGA_DPC_P2 VGA_DPC_N2 CV37 2 CV38 2 1 0.1U_0402_10V6K~D 1 0.1U_0402_10V6K~D DISP_C_A2P DISP_C_A2N 38 37 29 29 VGA_DPC_P3 VGA_DPC_N3 CV39 2 CV40 2 1 0.1U_0402_10V6K~D 1 0.1U_0402_10V6K~D DISP_C_A3P DISP_C_A3N 36 35 25 24 23 22 8 8 CPU_mDP_P0 CPU_mDP_N0 CV42 2 CV43 2 1 0.1U_0402_10V6K~D 1 0.1U_0402_10V6K~D PCH_DPC_C_P0 PCH_DPC_C_N0 34 33 8 8 CPU_mDP_P1 CPU_mDP_N1 CV44 2 CV45 2 1 0.1U_0402_10V6K~D 1 0.1U_0402_10V6K~D PCH_DPC_C_P1 PCH_DPC_C_N1 32 31 8 8 CPU_mDP_P2 CPU_mDP_N2 CV46 2 CV47 2 1 0.1U_0402_10V6K~D 1 0.1U_0402_10V6K~D PCH_DPC_C_P2 PCH_DPC_C_N2 30 29 8 8 CPU_mDP_P3 CPU_mDP_N3 CV48 2 CV49 2 1 0.1U_0402_10V6K~D 1 0.1U_0402_10V6K~D PCH_DPC_C_P3 PCH_DPC_C_N3 28 27 21 20 19 18 NC0+ NC0- UV38 COM0+ COM0- NC1+ NC1- COM1+ COM1- NC2+ NC2- COM2+ COM2- NC3+ NC3- COM3+ COM3- NC4+ NC4- COM4+ COM4- 2 3 CPU_MXM_MDP_P0_L CPU_MXM_MDP_N0_L CV41 2 CV50 2 1 0.1U_0402_10V6K~D 1 0.1U_0402_10V6K~D CPU_MXM_MDP_P0_C CPU_MXM_MDP_N0_C 4 5 CPU_MXM_MDP_P1_L CPU_MXM_MDP_N1_L CV51 2 CV52 2 1 0.1U_0402_10V6K~D 1 0.1U_0402_10V6K~D CPU_MXM_MDP_P1_C CPU_MXM_MDP_N1_C 7 8 CPU_MXM_MDP_P2_L CPU_MXM_MDP_N2_L CV53 2 CV54 2 1 0.1U_0402_10V6K~D 1 0.1U_0402_10V6K~D CPU_MXM_MDP_P2_C CPU_MXM_MDP_N2_C 9 10 CPU_MXM_MDP_P3_L CPU_MXM_MDP_N3_L CV55 2 CV56 2 1 0.1U_0402_10V6K~D 1 0.1U_0402_10V6K~D CPU_MXM_MDP_P3_C CPU_MXM_MDP_N3_C 1A 2A 2 1 2 1 2 JMDP1 14 2 DP_CBL_DET DGPU_SELECT# 7 9 CONN@ DISP_CLKA_AUXP DISP_DATA_AUXN 17 15 0_0402_5% 1 DP_CBL_DET 2 RV454 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 DISP_HPD_SINK_R CPU_MDP_R_C_P0 CAB_DET_SINK CPU_MDP_R_C_N0 DISP_CEC 8 CPU_MDP_R_C_P1 CPU_MDP_R_C_P3 CPU_MDP_R_C_N1 CPU_MDP_R_C_N3 CPU_MDP_R_C_P2 DISP_CLK_AUXP_CONN CPU_MDP_R_C_N2 DISP_DAT_AUXN_CONN +3VS 1 6 13 26 1 VDD_1 VDD_2 VDD_3 VDD_4 2 CV385 0.1U_0402_16V4Z~D 1 CV386 0.1U_0402_16V4Z~D 2 CV384 0.1U_0402_16V4Z~D 1 CV383 0.1U_0402_16V4Z~D B VCC 1 Mini DP CONN SN74CB3Q3253PWR_TSSOP16 CPU/MXM AUX&LANE SW for mDP +3VS 1B1 1B2 1B3 1B4 16 2 CV377 RV463 +3VS 1 CV374 MDP_CAB_DET 8 3 6 4 0.1U_0402_25V6K~D DGPU_SELECT# 1A VCC 2A 1B 1OE# 2B 2OE# GND 2 1.5A_6V_1206L150PR~D 22U_0805_6.3V6M~D CV376 .1U_0402_16V7K~D 6 5 4 MDP_CAB_DET# 2 5 1 7 C Need apply CIS part CV375 S VCC A UV40 VGA_DPC_AUXN/DDC VGA_DPC_AUXP/DDC 1 +3VS CV378 0.1U_0402_16V4Z~D @ B2 GND B1 2 +3VS_DP FV6 10U_0603_6.3V6M~D 4 VGA_DPC_AUXP/DDC Check BOM PS8330BQFN48GTR2-A0_QFN48_7X7 RV669 2.2K_0402_5%~D 1 2 3 PCH_mDP_HPD DP_VGA_HPD_BUF For Intel CPU 2.2K_0402_5%~D 2 2.2K_0402_5%~D 2 1 @ RV397 1 @ RV668 2.2K_0402_5%~D PCH_mDP_HPD 1 CV518 0.1U_0402_16V4Z~D RV670 100K_0402_5%~D CV373 0.1U_0402_16V4Z~D 1 UV36 For ATI/Nvidia GPU PCH_DPC_MDP_CLK +3VS @ +3VS +3VS QV5B DMN66D0LDW-7_SOT363-6~D 2 1 PCH_DPC_MDP_DAT 1 RV442 waiting to change new symbol 5 1 1 RV439 2.2K_0402_5%~D 2 43 G 2 RV460 2 RV453 2.2K_0402_5%~D 2 0308 change to 0402 type D 16,17 1 100K_0402_5%~D 2 100K_0402_5%~D +3V_MXM S S RV433 2 RV434 1 DISP_DAT_AUXN_CONN DISP_CLK_AUXP_CONN RV360 +5VS A 2 LT7 P/N: SM01000KM00 2 C D DP_CFG1_INPUT QV5A DMN66D0LDW-7_SOT363-6~D 6 2 RV451 100K_0402_5%~D NVDIA CPU_MDP_R_C_P0 CPU_MDP_R_C_N0 CPU_MDP_R_C_P1 CPU_MDP_R_C_N1 CPU_MDP_R_C_P2 CPU_MDP_R_C_N2 CPU_MDP_R_C_P3 CPU_MDP_R_C_N3 0.1U_0402_10V6K~D 0.1U_0402_10V6K~D 0.1U_0402_10V6K~D 0.1U_0402_10V6K~D 0.1U_0402_10V6K~D 0.1U_0402_10V6K~D 0.1U_0402_10V6K~D 0.1U_0402_10V6K~D GND1 GND2 GND3 EPAD VGA_DPC_AUXN/DDC 0 1 1 1 1 1 1 1 1 +3VS HPD_SRC 18 24 31 49 29,31 1 VGA_DPC_AUXP/DDC 2 2 2 2 2 2 2 2 CV14 CV16 CV18 CV20 CV22 CV24 CV26 CV28 CAD_SRC MXM_MFG_SEL GPU Source 29,31 2 +3VS_DP NC PD# 1 CPU_MDP_R_P0 CPU_MDP_R_N0 CPU_MDP_R_P1 CPU_MDP_R_N1 CPU_MDP_R_P2 CPU_MDP_R_N2 CPU_MDP_R_P3 CPU_MDP_R_N3 40 CFG1 @ DISP_CLKA_AUXP DISP_DATA_AUXN VGA_DPC_AUXP/DDC 23 22 20 19 17 16 14 13 OUT0p OUT0n OUT1p OUT1n OUT2p OUT2n OUT3p OUT3n I2C_ADDR 3 G IN2 26 DP_POWER_DOWN# 4.99K_0402_1% 1 P 29 IN0p IN0n IN1p IN1n IN2p IN2n IN3p IN3n RST# 5 UV39 SN74AHC1G08DCKR_SC70-5 4 5 DP_PEQ DP_CFG0 +3V_MXM CV487 0.1U_0402_16V4Z~D 1 2 VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 +3VS 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 10K_0402_1%~D 2 CV389 0.1U_0402_16V4Z~D CPU DP Redriver www.laptopblue.vn CV388 0.1U_0402_16V4Z~D +3VS +3VS S1 S0 Y 0 0 1B1 2B1 MXM_AUX 0 1 1B2 2B2 MXM_DDC 1 0 1B3 2B3 PCH_AUX 1 1 1B4 2B4 PCH_DDC +3VS_DP GND HOT PLUG LANE0_P CONFIG1 LANE0_N CONFIG2 GND GND LANE1_P LANE3_P LANE1_N LANE3_N GND GND LANE2_P AUX_CH_P LANE2_N AUX_CH_N GND DP_PWR B 21 22 23 24 GND1 GND2 GND3 GND4 JAE_DP3RB20SU32JQR400A RV455 1 2 DISP_HPD_SINK_R 1M_0402_5%~D RV456 1 2 CAB_DET_SINK 1M_0402_5%~D RV458 11 12 1 2 DISP_CEC 5.1M_0402_5% NC5+ NC5NO0+ NO0- COM5+ COM5- 14 15 NO1+ NO1NO2+ NO2NO3+ NO3- SEL1 SEL2 16 17 DGPU_SELECT# DGPU_EDIDSEL# RV457 @ 1 NO5+ NO5- MAX14998ETOLFT 2 0_0402_5%~D DGPU_SELECT# DGPU_EDIDSEL# NO4+ NO4EP 43 DGPU_SEL# Chanel DGPU_SELECT# 17,36,42 A 21,36,42 Source 0 NC GPU 1 NO CPU Compal Secret Data Security Classification Issued Date 2012/05/14 Deciphered Date 2013/05/13 Title Compal Electronics, Inc. Mini DP/Thunder Bolt power THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.1 LA-9332P Date: 5 4 3 2 Friday, December 14, 2012 1 Sheet 31 of 56 5 4 3 2 1 www.laptopblue.vn D D C C B B A A Compal Secret Data Security Classification Issued Date 2012/05/14 Deciphered Date 2013/05/13 Title Compal Electronics, Inc. eDP SW-CPU & MXM THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.1 LA-9332P Date: 5 4 3 2 Friday, December 14, 2012 1 Sheet 32 of 56 5 4 3 2 1 www.laptopblue.vn LCD POWER D +LCDVDD_3V D +LCDVDD_5V +3VS +LCDVDD_5V +5VS +LCDVDD_3V SS 3 4 RV391 DV16 LCDVDD_ON 43 LCDVDD_ON 0_0402_5%~D 1 2 LCDVDD_EN 2 0_0402_5%~D 1 2 RV393 3 1 EN APL3512ABI-TRG_SOT23-5 41,42 2 2 2 @ 2 VOUT VIN 2 GND SS LCDVDD_EN @ 3 5 1 4 1 EN 2 APL3512ABI-TRG_SOT23-5 2 CV330 0.1U_0402_16V4Z~D @ GND 1 1 CV331 2200P_0402_50V7K~D 2 1 CV333 10U_0805_10V4Z~D VIN 1 5 CV327 2200P_0402_50V7K~D @ VOUT CV332 0.1U_0402_16V4Z~D 2 UV42 1 CV326 0.1U_0402_16V4Z~D 1 CV328 10U_0805_10V4Z~D 2 CV329 0.1U_0402_16V4Z~D 1 UV43 1 EC_ENVDD BAS40CW_SOT323-3 @ QV11 FDC654P-G_SSOT-6~D B+ 80 mil D 4 S Back light power C +INVPWR_B+ C G 3 1 1 RV157 100K_0402_5%~D 2 CV93 0.1U_0603_50V4Z~D 2 2 CV94 1000P_0402_50V7K~D 1 80 mil 6 5 2 1 PWR_SRC_ON QV12 SSM3K7002FU_SC70-3~D S 3 D 2 1 47K_0402_5%~D 2 G 1 RV158 43 LCD_BKL_EN FDC654P: P CHANNAL Panel backlight power control by EC B B A A Compal Secret Data Security Classification Issued Date 2012/05/14 Deciphered Date 2013/05/13 Title Compal Electronics, Inc. eDP SW-eDP CONN THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.1 LA-9332P Date: 5 4 3 2 Friday, December 14, 2012 1 Sheet 33 of 56 5 4 3 2 1 www.laptopblue.vn D D C C B B A A Compal Secret Data Security Classification Issued Date 2012/05/14 2013/05/13 Deciphered Date Title reserved THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.1 LA-9332P Date: 5 4 3 2 Friday, December 14, 2012 Sheet 1 34 of 56 A B C D E +3VS Close to UV35 VCC pins 2 11 15 21 33 40 46 HDMI_IN_HPD_R HDMI_DAT HDMI_CLK HDMI_DAT HDMI_CLK 37 37 I2C_ADDR0/PC0 I2C_ADDR1/PC1 @ GND/PC2 43 6 REXT 43 HDMI_IN_OUT_DDC HDMI_IN_OUT_DDC 1 RV350 HDMI_IN_OUT_HPD_EC 2 0_0402_5%~D HDMI_IN_OUT_HPD +3VS PS121QFN48G_QFN48_7X7 @ @ @ DMN66D0LDW-7_SOT363-6~D QV34B RV353 5 4 PS121 CFG0/ CFG1 SCLZ/SDAZ output voltage select; CFG1:0=00 LOW-level input voltage: <0.40V LOW-level output voltage: 0.60V PS121 PC0/PC1/PC2 Inputs equalization control, default inputs equalization setting at 12 dB 000: 12 dB, 001: 16 dB, 010: 10 dB, 011: 7 dB 100: 1.5 dB, 101: 4 dB, 110: 9 dB, 111: 7 dB 3 2 +3VS RV394 RV119 100K_0402_5%~D 5 12 18 24 27 31 36 37 43 49 CEXT +5VS 2 +3VS 29 28 SDAZ SCLZ SDA_CTL/CFG1 SCL_CTL/CFG0 1 1 3 SDA SCL CV212 10 1 1 1 RV299 1 7 HPD 2 2 2.2U_0402_6.3V6M~D2 HDMI2_CFG1 HDMI2_CFG0 HDMI2_PC0 HDMI2_PC1 HDMI2_PC2 HDMI2_DDCBUF 100K_0402_5% 2 1 1 1 RV306 @ 1 RV311 @ 1 RV303 @ 1 RV307 @ 1 RV308 @ 2RV313 @ 6 3 4 HDMI2_PC2 2 2 2 2 2 1 RV121 4.7K_0402_5%~D 499_0402_1%~D HDMI2_PC0 HDMI2_PC1 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D HDMI2_CFG1 HDMI2_CFG0 HDMI2_PC0 HDMI2_PC1 HDMI2_PC2 HDMI_IN_OUT_SDATA HDMI_IN_OUT_SCLK HDMI2_DDCBUF CPU/MXM NC/OE# 34 35 HDMI2_CFG1 HDMI2_CFG0 CONN RV120 4.7K_0402_5%~D SSM3K7002FU_SC70-3~D S 37 37 37 37 37 37 37 37 1 RV305 @ 1 RV301 @ 1 RV309 @ 1 RV310 @ 1 RV304 @ 1 RV312 1 RV302 2 RV314 @ NC/DDCBUF_EN# 8 9 HDMI_IN_SDATA_R HDMI_IN_SCLK_R HDMI_IN_R_CKHDMI_IN_R_CK+ HDMI_IN_R_D0HDMI_IN_R_D0+ HDMI_IN_R_D1HDMI_IN_R_D1+ HDMI_IN_R_D2HDMI_IN_R_D2+ 2 2 2 2 2 2 2 1 I2C_CTL_EN# 25 D 2 G HDMI_IN_R_CKHDMI_IN_R_CK+ HDMI_IN_R_D0HDMI_IN_R_D0+ HDMI_IN_R_D1HDMI_IN_R_D1+ HDMI_IN_R_D2HDMI_IN_R_D2+ HPD_SINK QV32 HDMI_SW 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 2.2K_0402_5%~D 2.2K_0402_5%~D 4.7K_0402_5%~D 2 32 +3VS 1 HDMI2_DDCBUF 2 1 26 2 2 4.7K_0402_5%~D 1 2 RV300 1 POW 30 HDMI_SINK_HPD_RR +3VS www.laptopblue.vn 100K_0402_5% 37 23 22 20 19 17 16 14 13 OUT1p OUT1n OUT2p OUT2n OUT3p OUT3n OUT4p OUT4n GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 GND9 GND10 1 RV280 100K_0402_5%~D 2 VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 IN1p IN1n IN2p IN2n IN3p IN3n IN4p IN4n +3VS +3VS 1 CV209 0.01U_0402_16V7K~D 38 39 41 42 44 45 47 48 HDMI_IN_CKHDMI_IN_CK+ HDMI_IN_D0HDMI_IN_D0+ HDMI_IN_D1HDMI_IN_D1+ HDMI_IN_D2HDMI_IN_D2+ 1 2 CV173 0.1U_0402_16V4Z~D UV35 1 CV211 0.1U_0402_16V4Z~D 2 CV210 0.01U_0402_16V7K~D 1 +3VS 2 QV34A DMN66D0LDW-7_SOT363-6~D HDMI Input/Output Connector @ 2 +HDMI_5V_OUT 1 +3VS JHDMI1 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 HDMI_IN_OUT_HPD D0+ D0- 17 1 D1+ D1D2+ D2- D0+B D0-B D1+B D1-B D2+B D2-B D3+B D3-B D3+ D3- 1 RV289 1 RV320 2 3 HDMI_IN_OUT_TXC-_R HDMI_IN_OUT_TXC+_R 4 5 HDMI_IN_OUT_TXD0-_R HDMI_IN_OUT_TXD0+_R 6 7 HDMI_IN_OUT_TXD2-_R HDMI_IN_OUT_TXD2+_R 11 12 HDMI_IN_OUT_TXD1-_R HDMI_IN_OUT_TXD1+_R AUX+ AUX- 13 14 1 RV278 1 RV279 HDMI_IN_OUT_SDATA HDMI_IN_OUT_SCLK 37 37 CEC HPD 16 15 1 RV286 1 RV288 GND-PAD 2 0_0402_5%~D LV11 DLW21SN900HQ2L_0805_4P~D 1 HDMI_IN_OUT_TXD2+_R 2 HDMI_IN_OUT_TXD2+ 2 1 HDMI_IN_OUT_TXD2-_R 3 3 1 @ RV181 HDMI_IN_OUT_TXD1-_R 2 0_0402_5%~D HDMI_IN_OUT_HPD HDMI_IN_OUT_TXD0-_R 8 1A 2A 3A 4A OE# S GND 1B1 1B2 2B1 2B2 3B1 3B2 4B1 4B2 16 2 3 5 6 11 10 14 13 DVI_SDATA HDMI_IN_SDATA_R DVI_SCLK HDMI_IN_SCLK_R HDMI_SINK_HPD_R HDMI_IN_HPD_R HDMI_IN_DET# A H B @ DVI_SDATA 2 36 DVI_SCLK 36 HDMI_SINK_HPD_R HDMI_IN_DET# 1 @ 1 2 CV127 0.1U_0402_16V4Z~D 15 1 Vcc L +5VS CV126 0.1U_0402_16V4Z~D HDMI_SW @ OUTPUT HDMI_IN_OUT_TXD2+ 46@ 0_0402_5%~D HDMI_IN_OUT_TXD1+ 2 36 3 Description RO0000002HM LV12 DLW21SN900HQ2L_0805_4P~D 3 4 HDMI_IN_OUT_TXD13 4 1 ROYALTY HDMI W/LOGO Part Number 2 0_0402_5%~D 1 20 21 22 23 SUYIN_100042GR019M23UZL CONN@ 2 2 HP_DET +5V DDC/CEC_GND SDA SCL Reserved CEC CKGND CK_shield GND CK+ GND D0GND D0_shield D0+ D1D1_shield D1+ D2D2_shield D2+ HDMI_IN_OUT_TXD2- HDMI W/Logo:RO0000002HM HDMI_IN_OUT_TXC- CV349 1@ 2 3.3P_0402_50V8C~D HDMI_IN_OUT_TXC+ CV350 1@ 2 3.3P_0402_50V8C~D HDMI_IN_OUT_TXD0- CV351 1@ 2 3.3P_0402_50V8C~D HDMI_IN_OUT_TXD0+ CV352 1@ 2 3.3P_0402_50V8C~D HDMI_IN_OUT_TXD1- CV353 1@ 2 3.3P_0402_50V8C~D HDMI_IN_OUT_TXD1+ 0_0402_5%~D @ RV186 1 43 SEL 4 4 2 1 @ RV183 2 0_0402_5%~D HDMI_IN_OUT_DDC +5VS UV12 HDMI_IN_OUT_TXD1+ HDMI_IN_OUT_TXD2- @ RV180 1 HDMI_IN_OUT_TXD0+_R HDMI_IN_OUT_SDATA HDMI_IN_OUT_SCLK HDMI_IN_OUT_HPD HDMI_IN_OUT_DDC RV184 1 RV185 1 HDMI_IN_OUT_TXD0+ HDMI_IN_OUT_TXD1- HDMI_IN_OUT_TXD1+_R 4 7 9 12 UART_TX_6038 UART_RX_6038 HDMI_IN_OUT_TXC+ HDMI_IN_OUT_TXD0- 2 0_0402_5%~D HDMI_IN_OUT_SCLK 2 0_0402_5%~D HDMI_IN_OUT_SDATA TS3DV621RUAR_QFN42_9X3P5 4 1 RV368 1 RV369 @ RV182 1 2 0_0402_5%~D 25 2 0_0402_5%~D 23 AUX+A AUX-A 1 RV321 2 0_0402_5%~D 24 HDMI_IN_SCLK_R 1 RV322 2 0_0402_5%~D 22 AUX+B HDMI_IN_SDATA_R AUX-B 19 18 CECA HDMI_IN_DET# 1 RV448 2 0_0402_5%~D CECB 21 HDMI_SINK_HPD_R 1 RV323 2 0_0402_5%~D 1 RV373 2 0_0402_5%~D 20 HPDA HDMI_IN_HPD_R HPDB 2 1 8 +3VS EN RH273 10K_0402_5%~D 9 HDMI_SW 43 HDMI_SW 10 SEL1 SEL2 DVI_SCLK DVI_SDATA 2 2 HDMI CONN 30 VCC 42 40 37 35 33 31 28 26 VCC HDMI_IN_CKHDMI_IN_CK+ HDMI_IN_D0HDMI_IN_D0+ HDMI_IN_D2HDMI_IN_D2+ HDMI_IN_D1HDMI_IN_D1+ D0+A D0-A D1+A D1-A D2+A D2-A D3+A D3-A VCC 41 39 38 36 34 32 29 27 2.2K_0402_5%~D 2.2K_0402_5%~D HDMI_IN_OUT_DDC HDMI_IN_OUT_SDATA HDMI_IN_OUT_SCLK 2 0_0402_5%~D HDMI_UART_TX 2 0_0402_5%~D HDMI_UART_RX HDMI_IN_OUT_TXC- 2 0_0402_5%~D LV13 DLW21SN900HQ2L_0805_4P~D 2 1 HDMI_IN_OUT_TXD0+ 2 1 3 3 1 @ RV187 4 4 HDMI_IN_OUT_TXD0- CV354 1@ 2 3.3P_0402_50V8C~D HDMI_IN_OUT_TXD2- CV355 1@ 2 3.3P_0402_50V8C~D HDMI_IN_OUT_TXD2+ CV356 1@ 2 3.3P_0402_50V8C~D 2 20120531 EMI ADD 0_0402_5%~D @ RV188 1 2 0_0402_5%~D LV14 HDMI_IN_OUT_TXC-_R 3 HDMI_IN_OUT_TXC+_R 2 3 4 4 HDMI_IN_OUT_TXC- 1 HDMI_IN_OUT_TXC+ 2 1 DLW21SN900HQ2L_0805_4P~D 1 2 @ RV189 0_0402_5%~D 4 37 Reserve for EMI please close to JHDMI2 SN74CBT3257CPWR_TSSOP16~D HDMI_IN_OUT_DDC OUTPUT L B1 H SSM3K7002FU_SC70-3~D SEL B2 QV33 1 STDP6038 HDMI_OUT_TXCHDMI_OUT_TXC+ HDMI_OUT_TXD0HDMI_OUT_TXD0+ HDMI_OUT_TXD2HDMI_OUT_TXD2+ HDMI_OUT_TXD1HDMI_OUT_TXD1+ 2 +5VS D 2 G HDMI_IN_OUT_HPD Compal Secret Data Security Classification S Issued Date 3 3 HDMI_OUT_TXCHDMI_OUT_TXC+ HDMI_OUT_TXD0HDMI_OUT_TXD0+ HDMI_OUT_TXD2HDMI_OUT_TXD2+ HDMI_OUT_TXD1HDMI_OUT_TXD1+ 2 1 CV125 0.1U_0402_16V4Z~D UV11 36 36 36 36 36 36 36 36 2 1 CV124 10U_0603_6.3V6M~D 2 CV123 0.1U_0402_16V4Z~D 2 1 CV121 0.1U_0402_16V4Z~D 1 CV120 10U_0603_6.3V6M~D 2 CV119 0.1U_0402_16V4Z~D 1 1 2012/05/28 Deciphered Date 2013/05/27 Title B Rev 0.1 LA-9332P Date: A Compal Electronics, Inc. HDMI In/Out SW/Connector THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C D Friday, December 14, 2012 E Sheet 35 of 56 5 4 3 2 www.laptopblue.vn +3VS +3VS 2 QV16 3 2 3 2 2 HDMI_IN1_PEQ 2 1 D 2 G S UV13 HDMI_TXD2+ HDMI_TXD2HDMI_TXD1+ HDMI_TXD1HDMI_TXD0+ HDMI_TXD0HDMI_TXC+ HDMI_TXC- DGPU_HPD_INT# Close to UV14 VCC pins 21,39 DGPU_HPD_INT# 2 35 HDMI_SINK_HPD_R HDMI_SINK_HPD_R +3VS +3VS RV203 1 2 4.7K_0402_5%~D UV14 PS121 When DDCBUF_EN# is HIGH, the DDC channel is disabled, SCL/SDA and SCLZ/SDAZ are disconnected VDD VDD CV136 2 CV137 2 CV138 2 CV139 2 CV140 2 CV141 2 CV142 2 CV143 2 1 1 1 1 1 1 1 1 .1U_0402_16V7K~D .1U_0402_16V7K~D .1U_0402_16V7K~D .1U_0402_16V7K~D .1U_0402_16V7K~D .1U_0402_16V7K~D .1U_0402_16V7K~D .1U_0402_16V7K~D GPU_HDMI_TXD2-_C GPU_HDMI_TXD2+_C GPU_HDMI_TXD1-_C GPU_HDMI_TXD1+_C GPU_HDMI_TXD0-_C GPU_HDMI_TXD0+_C GPU_HDMI_TXC-_C GPU_HDMI_TXC+_C PWDN_ASQ 44 45 47 48 1 2 4 5 IN1_D1n IN1_D1p IN1_D2n IN1_D2p IN1_D3n IN1_D3p IN1_D4n IN1_D4p HDMI_OE# 25 6 31 CFG_HPD DDCBUF PRE_EMI RTERM 25 PWDN_ASQ 28 HDMI_CFG_HPD 40 34 7 HDMI_DDCBUF RV204 4.7K_0402_5%~D 2 @1 1 @ 8 9 DVI_SDATA_R DVI_SCLK_R HDMI_CFG1 HDMI_CFG0 RV399 4.7K_0402_5%~D 26 32 2 GPU_HDMI_TXD2GPU_HDMI_TXD2+ GPU_HDMI_TXD1GPU_HDMI_TXD1+ GPU_HDMI_TXD0GPU_HDMI_TXD0+ GPU_HDMI_TXCGPU_HDMI_TXC+ GPU_HDMI_TXD2GPU_HDMI_TXD2+ GPU_HDMI_TXD1GPU_HDMI_TXD1+ GPU_HDMI_TXD0GPU_HDMI_TXD0+ GPU_HDMI_TXCGPU_HDMI_TXC+ 30 HDMI_DDCBUF_EN# +3VS 29 29 29 29 29 29 29 29 38 39 41 42 44 45 47 48 +3VS PS8271 PEQ=L, Middle level receiving equalization selection PEQ=H, High level receiving equalization selection PEQ=M, Low level receiving equalization selection HDMI_PC0 HDMI_PC1 3 4 HDMI_PC2 1 2 499_0402_1%~D 34 35 1 RV205 2.2U_0402_6.3V6M~D2 1 6 CV144 10 1 1 1 1 1 1 1 1 CV145 CV146 CV147 CV148 CV149 CV150 CV151 CV152 2 2 2 2 2 2 2 2 29 17 29 29 17 17 .1U_0402_16V7K~D .1U_0402_16V7K~D .1U_0402_16V7K~D .1U_0402_16V7K~D .1U_0402_16V7K~D .1U_0402_16V7K~D .1U_0402_16V7K~D .1U_0402_16V7K~D VGA_HDMI_DET PCH_HDMI_HPD GPU_HDMI_SCLK GPU_HDMI_SDATA PCH_DPB_HDMI_CLK PCH_DPB_HDMI_DAT GPU_HDMI_SCLK GPU_HDMI_SDATA PCH_DPB_HDMI_CLK PCH_DPB_HDMI_DAT +3VS 2.2K_0402_5%~D 2 1 RV207 PCH_DPB_HDMI_DAT 2.2K_0402_5%~D 2 1 RV210 PCH_DPB_HDMI_CLK 8 9 11 12 13 14 16 17 CPU_HDMI_N2_C CPU_HDMI_P2_C CPU_HDMI_N1_C CPU_HDMI_P1_C CPU_HDMI_N0_C CPU_HDMI_P0_C CPU_HDMI_N3_C CPU_HDMI_P3_C IN2_D1n IN2_D1p IN2_D2n IN2_D2p IN2_D3n IN2_D3p IN2_D4n IN2_D4p 46 10 41 42 19 20 DGPU_EDIDSEL#_R DGPU_SEL# 22 21 HDMI_IN1_PEQ HDMI_IN2_PEQ 3 15 B 1 2 OUT_HPD OUT_SCL OUT_SDA 39 38 37 HDMI_SW_DETECT HDMI_SW_SCL HDMI_SW_SDA IN1_PEQ IN2_PEQ 1 18 43 49 GND GND PAD OUT1p OUT1n OUT2p OUT2n OUT3p OUT3n OUT4p OUT4n POW 35 35 35 35 35 35 35 35 CONN I2C_CTL_EN# NC/DDCBUF_EN# NC/OE# HPD SDA SCL SDAZ SCLZ SDA_CTL/CFG1 SCL_CTL/CFG0 7 29 28 HDMI_SINK_HPD HDMI_SW_SDA HDMI_SW_SCL I2C_ADDR0/PC0 I2C_ADDR1/PC1 GND/PC2 REXT CEXT C PS121QFN48G_QFN48_7X7 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 2.2K_0402_5%~D 2.2K_0402_5%~D 2 2 2 2 2 2 2 2 1 RV315 @ 1 RV206 @ 1 RV208 @ 1 RV209 1 RV211 @ 1 RV212 1 RV213 1 RV214 PWDN_ASQ HDMI_CFG1 HDMI_CFG0 HDMI_PC0 HDMI_PC1 HDMI_PC2 HDMI_SW_SDA HDMI_SW_SCL 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 2 2 2 2 2 2 1 RV215 @ 1 RV217 @ 1 RV219 @ 1 RV221 @ 1 RV222 @ 1 RV316 @ HDMI_CFG1 HDMI_CFG0 HDMI_PC0 HDMI_PC1 HDMI_PC2 PWDN_ASQ HDMI_SW_DET 0 1 Y IN1 IN2 MXM PCH 2 1 1 5 P G 3 RV224 DGPU_EDIDSEL#_R @ 1.5K_0402_5% 4 O 2 1 RV227 DGPU_EDIDSEL#_R DVI_SDATA DVI_SCLK DVI_SDATA DVI_SCLK 35 35 39 +HDMI_5V_OUT UV41 W=40mils IN @ 1 2 CV157 1U_0603_10V4Z~D CV158 1U_0603_10V6K~D 2 GND AP2330W-7_SC59-3 @ +3VS CV159 1 2 UV16 SN74AHC1G08DCKR_SC70-5 A P 5 @ IN1 O 4 DGPU_SEL# IN2 G 1 DGPU_SELECT# 3 0.01U_0402_16V7K~D A 3 OUT 1 2 17,31,42 HDMI_OUT_TXD2+ HDMI_OUT_TXD2HDMI_OUT_TXD1+ HDMI_OUT_TXD1HDMI_OUT_TXD0+ HDMI_OUT_TXD0HDMI_OUT_TXC+ HDMI_OUT_TXC- HPD_SINK DVI_SDATA_R DVI_SCLK_R 2 HDMI_OUT_TXD2+ HDMI_OUT_TXD2HDMI_OUT_TXD1+ HDMI_OUT_TXD1HDMI_OUT_TXD0+ HDMI_OUT_TXD0HDMI_OUT_TXC+ HDMI_OUT_TXC- B IN2 +5VS 1 23 22 20 19 17 16 14 13 PS8271QFN48GTR-A1_QFN48_7X7 RV223 IN1 2 0_0402_5%~D D CEXT REXT 1.5K_0402_5% 1 UV15 SN74AHC1G08DCKR_SC70-5 DGPU_EDIDSEL# 2 +HDMI_5V_OUT 0.01U_0402_16V7K~D DGPU_EDIDSEL# 2 1 PS121 CFG0/ CFG1 SCLZ/SDAZ output voltage select; CFG1:0=00 LOW-level input voltage: <0.40V LOW-level output voltage: 0.60V PS121 PC0/PC1/PC2 Inputs equalization control, default inputs equalization setting at 12 dB 000: 12 dB, 001: 16 dB, 010: 10 dB, 011: 7 dB 100: 1.5 dB, 101: 4 dB, 110: 9 dB, 111: 7 dB CV154 @ 2 1 21,31,42 2 1 +3VS SW_DDC SW_MAIN 8/25 change RV218from 430 to 499ohm +3VS HDMI_TXD2HDMI_TXD2+ HDMI_TXD1HDMI_TXD1+ HDMI_TXD0HDMI_TXD0+ HDMI_TXCHDMI_TXC+ 2 GPU_HDMI_SCLK RV218 1 RV220 499_0402_1%~D GPU_HDMI_SDATA 2.2K_0402_5%~D 2 CV153 1 RV216 2.2U_0603_10V7K~D 2.2K_0402_5%~D 2 36 35 33 32 30 29 27 26 IN1_HPD IN2_HPD IN1_SCL IN1_SDA IN2_SCL IN2_SDA 23 24 +3V_MXM OUT_D1n OUT_D1p OUT_D2n OUT_D2p OUT_D3n OUT_D3p OUT_D4n OUT_D4p 1 2 CPU CPU_HDMI_N2 CPU_HDMI_P2 CPU_HDMI_N1 CPU_HDMI_P1 CPU_HDMI_N0 CPU_HDMI_P0 CPU_HDMI_N3 CPU_HDMI_P3 CPU_HDMI_N2 CPU_HDMI_P2 CPU_HDMI_N1 CPU_HDMI_P1 CPU_HDMI_N0 CPU_HDMI_P0 CPU_HDMI_N3 CPU_HDMI_P3 IN1p IN1n IN2p IN2n IN3p IN3n IN4p IN4n 5 12 18 24 27 31 36 37 43 49 C 8 8 8 8 8 8 8 8 2 +3VS QV17 +5VS SSM3K7002FU_SC70-3~D 1 HDMI_OE# 11 15 21 33 40 46 2 G 2 4.7K_0402_5%~D 1 S 2 4.7K_0402_5%~D RV202 1 1 D RV201 1 HDMI_IN2_PEQ 1 2 2 4.7K_0402_5%~D 1 1 RV199 1 HDMI_CFG_HPD RV190 100K_0402_5%~D SSM3K7002FU_SC70-3~D 2 4.7K_0402_5%~D RV198 200K_0402_5% 2 4.7K_0402_5%~D RV197 1 CV135 10U_0603_6.3V6M~D 2 4.7K_0402_5%~D @ RV195 1 CV134 .1U_0402_16V7K~D @ RV194 1 CV133 .1U_0402_16V7K~D D 1 @ DV4 @ BAV99-7-F_SOT23-3 LV15 MBK1608221YZF_2P 1 2 HDMI_SINK_HPD @ 1 2 0_0402_1% VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 1 GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 GND9 GND10 RV196 1 HDMI_SW_DETECT 2 (co-lay) +3VS HDMI_DDCBUF CV131 0.01U_0402_16V7K~D 2 4.7K_0402_5%~D Close to UV13 VCC pins CV130 0.1U_0402_16V4Z~D 2 4.7K_0402_5%~D @ RV192 1 0_0603_5%~D 2 CV132 220P_0402_50V7K~D @ RV191 1 RV200 1 HDMI_DDCBUF_EN# CV129 0.1U_0402_16V4Z~D 24.7K_0402_5%~D CV128 0.01U_0402_16V7K~D RV319 1 @ 3 +3VS MXM 1 Compal Secret Data Security Classification DGPU_SELECT# 0_0402_5%~D 2 1 RV229 DGPU_SEL# DGPU_SEL# 39 Issued Date 2012/05/28 Deciphered Date 2013/05/27 Title Compal Electronics, Inc. HDMI SW-CPU & MXM/Re-driver THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.1 LA-9332P Date: 5 4 3 2 Friday, December 14, 2012 1 Sheet 36 of 56 4 +1.2V_AVDD 1 1 PGOOD GND GND 7 8 9 1 2 1 ADJ 5 6 APE8902CMP-A 1 2 HDMI @RV293 @ RV293 1 @ @ @ 2 0_0402_1% 2 0_0402_1% 2 0_0402_1% HDMI_SPI_CS# HDMI_SPI_CLK HDMI_SPI_SO HDMI_SPI_SI 65 66 67 68 47 55 61 77 83 I2S_0 (S/PDIF) / GPO_12(BS_RESERVED) I2S_AUMCLK / GPO_13(BS_SPI_FUN_SEL) I2S_WS / GPO_14(BS_I2C_SRC_SEL) I2S_SCLK / GPO_15(BS_I2C_ON_SPI_EN) SPI_CSn / IRQ_IN / GPO_8 SPI_CLK / GPO_9(BS_INTERFACE_SEL1) SPI_DI / GPO_10(BS_INTERFACE_SEL0) SPI_DO / GPO_11(BS_UART_FUNCTION_SEL) DPRX_VSSD DPRX_VSSA DPRX_VSSA HDMI_VSSA HDMI_VSSA LVVSS LVVSS CRVSS CRVSS CRVSS CRVSS ADC_VSSA ADC_VSSA ADC_VSSA ADC_VSSD 2 2 RV256 HDMI_SPI_CLK RV257 HDMI_SPI_SI +HDMI_5V_OUT HDMI_IN_BKL_EN HDMI_IN_ENVDD 42 42 1 22_0402_5% 2 C 2 B RV268 E BS_OCM_BOOT_SEL 2 0_0402_1% HDMI_IN_AUD_CODEC RV270 1 HDMI_IN_AUDIO_CODEC 45 HDMI_IN_PWM @ HDMI_IN_PWM 42 BS_I2C_DEV_ID2 2 0_0402_1% BS_OSC_SEL BS_I2C_DEV_ID1 RV273 1 BS_I2C_DEV_ID0 @ 1 2 0_0402_1% DHMI_IN_NV_CLK DHMI_IN_NV_CLK_R DHMI_IN_NV_CLK 2 0_0402_1% DHMI_IN_NV_DAT DHMI_IN_NV_DAT_R RV395 1 @ DHMI_IN_NV_DAT RV396 @ 2011/11/25 remove LVDS conn 2 BS_XTAL_TCLK_SEL RV274 1 @ 0_0402_1% BS_EXTKEY_EN UART_TX_6038 UART_RX_6038 UART_TX_6038 UART_RX_6038 1 1 CV205 0.1U_0402_16V4Z~D 2 UV20 1 2 3 4 E0 E1 E2 VSS 8 7 6 5 VCC WC SCL SDA RV269 1 RV271 1 RV272 1 HDMI_SW_CLK HDMI_SW_DAT 110 HDMI_TOGGLE 1 1 EDID_WP HDMI_CLK HDMI_DAT +3.3V_DDVDD 2Kbit 42 42 35 35 RV298 1 2 HDMI_PLUG_IN_CAB_DET +5VS 8 7 6 5 43 7 34 22 2 1 HDMI_IN_SW_HPD MBK1608221YZF_2P 1 B 2 2 35 HDMI_IN_CAB_DET# 43 +HDMI_5V_OUT D @ @ 2 G QV19 SSM3K7002FU_SC70-3~D S +HDMI_5V_OUT RV283 1K_0402_1%~D RV282 4.7K_0402_5%~D HDMI_IN_HPD_RR UART_RX_6038 HDMI_IN_HPD 1 BAV99-7-F_SOT23-3 DV10 @ 97 94 91 89 35 35 HDMI_IN_DET# 1HDMI_IN_CAB_DET# 33K_0402_5% LV24 115 107 69 37 HDMI_CLK HDMI_DAT 2 0_0402_5%~D 2KBit RV277 1 2 3 4 2 22_0402_5% 2 22_0402_5% 2 22_0402_5% CAT24C02WI-GT3A_SO8 1 HDMI_PLUG_IN_CAB_DET 2 DV9 1SS355TE-17_SOD323-2 +5VS_HDMI_IN_EDID 5 103 104 101 102 2 2 2 1 1 127 126 124 123 122 121 120 119 118 117 DHMI_IN_NV_CLK_R DHMI_IN_NV_DAT_R 1 HDMI_IN_BKL_EN HDMI_IN_ENVDD 2 22_0402_5% 2 22_0402_5% +5VS 2 1 DV8 2 1 1SS355TE-17_SOD323-2 EDID_WP 3 2 RV262 1 RV263 1 1 42 42 42 42 42 42 42 42 2 8 7 6 5 1 LVDS_6038_TZOUT0LVDS_6038_TZOUT0+ LVDS_6038_TZOUT1LVDS_6038_TZOUT1+ LVDS_6038_TZOUT2LVDS_6038_TZOUT2+ LVDS_6038_TZCLKLVDS_6038_TZCLK+ 1 LVDS_6038_TZOUT0LVDS_6038_TZOUT0+ LVDS_6038_TZOUT1LVDS_6038_TZOUT1+ LVDS_6038_TZOUT2LVDS_6038_TZOUT2+ LVDS_6038_TZCLKLVDS_6038_TZCLK+ VCC WC SCL SDA 2 21 20 19 18 17 16 15 14 13 12 E0 E1 E2 VSS CAT24C16WI-GT3_SO8 10K_8P4R_5% VSSA_33 1 RV254 15_0402_5%~D 1 15_0402_5%~D 1 1 UV19 1 2 3 4 1 42 42 42 42 42 42 42 42 2 LVDS_6038_TXOUT0LVDS_6038_TXOUT0+ LVDS_6038_TXOUT1LVDS_6038_TXOUT1+ LVDS_6038_TXOUT2LVDS_6038_TXOUT2+ LVDS_6038_TXCLKLVDS_6038_TXCLK+ CV208 220P_0402_50V7K~D BS_INTERFACE_SEL1 RV295 1 BS_INTERFACE_SEL0 RV296 1 BS_UART_FUNCTION_SEL RV297 1 A 20_0402_5%~D BS_RESERVED_R 39 40 BS_SPI_R 41 BS_I2C_SRC_R 42 BS_I2C_ON_R HDMI_IN_AUD_CODEC QV20 MMST3904-7-F_SOT323-3~D I2S_DAT/SPDIF_IN LVDS_6038_TXOUT0LVDS_6038_TXOUT0+ LVDS_6038_TXOUT1LVDS_6038_TXOUT1+ LVDS_6038_TXOUT2LVDS_6038_TXOUT2+ LVDS_6038_TXCLKLVDS_6038_TXCLK+ RPV1 GPIO_45 45 33 32 31 30 29 28 27 26 25 24 2 LBADC_IN4 / GPIO_35 LBADC_IN3 / GPIO_34 LBADC_IN2 / GPIO_33 / TTL_SYNC4 LBADC_IN1 / GPIO_32 / TTL_SYNC3 2 10K_0402_5%~D 2 HDMI_RXCN HDMI_RXCP HDMI_RX0N HDMI_RX0P HDMI_RX1N HDMI_RX1P HDMI_RX2N HDMI_RX2P HDMI_REXT HDMI_HPD / GPIO_22 HDMI_CEC / GPIO_23 BS_OSC_SEL RV249 1 3 75 76 78 79 81 82 84 85 87 113 114 2 10K_0402_5%~D 2 HDMI_IN_CK-_R 0_0402_1% HDMI_IN_CK+_R 0_0402_1% HDMI_IN_D0-_R 0_0402_1% HDMI_IN_D0+_R 0_0402_1% HDMI_IN_D1-_R 0_0402_1% HDMI_IN_D1+_R 0_0402_1% HDMI_IN_D2-_R 0_0402_1% HDMI_IN_D2+_R 0_0402_1% 2 249_0402_1%~D HDMI_IN_SW_HPD BS_XTAL_TCLK_SEL RV248 1 1 2 2 2 2 2 2 2 2 BS_INTERFACE_SEL0 2 10K_0402_5%~D RV285 100K_0402_5%~D @ @ @ @ @ @ @ @ 2 10K_0402_5%~D RV247 1 16KBit NVRAM 6 CV207 0.1U_0402_16V4Z~D +3.3VS_AVDD RV281 1 RV284 1 RV287 1 RV290 1 RV292 1 RV387 1 RV388 1 RV390 1 RV291 1 VBUFC_RPLL BS_INTERFACE_SEL1 RV246 1 C CV206 .1U_0402_16V7K~D HDMI_IN_R_CKHDMI_IN_R_CK+ HDMI_IN_R_D0HDMI_IN_R_D0+ HDMI_IN_R_D1HDMI_IN_R_D1+ HDMI_IN_R_D2HDMI_IN_R_D2+ 2 300_0402_1% DPRX_AUXN DPRX_AUXP DPRX_ML_L0P DPRX_ML_L0N DPRX_ML_L1P DPRX_ML_L1N DPRX_ML_L2P DPRX_ML_L2N DPRX_ML_L3P TTL_CKOUT / GPIO16(BS_EXTKEY_EN) DPRX_ML_L3N UART_TX / TTL_SYNC1 / GPO_7(BS_XTAL_TCLK_SEL) DPRX_REXT UART_RX / TTL_SYNC2 / GPO_6 DPRX_HPD_OUT / GPO_5 2 10K_0402_5%~D 1 2 1 RV276 GPO_2 / TTL_D7 / PWM2(BS_OCM_BOOT_SEL) STI_TM1 / PWM1 / TTL_D6 / GPO_1 GPO_0 / PWM0 / TTL_D5(BS_OSC_SEL) TTL_D4 / GPIO_21(BS_I2C_DEV_ID2) TTL_D3 / GPIO_20(BS_I2C_DEV_ID1) TTL_D2 / GPIO_19(BS_I2C_DEV_ID0) TTL_D1 / GPIO18 / M_I2C_SCL TTL_D0 / GPIO17 / M_I2C_SDA BS_OCM_BOOT_SEL RV245 1 1 22_0402_5% 2 2 RV294 B E 3 GPIO_44 / S_I2C_SCL GPIO_43 / S_I2C_SDA PBIAS / TTL_D9 / GPO_4 PPOWER / TTL_D8 / GPO_3 BS_EXTKEY_EN 2 10K_0402_5%~D 1 RV275 10K_0402_5%~D +1.2V_AVDD HDMI_IN_R_CKHDMI_IN_R_CK+ HDMI_IN_R_D0HDMI_IN_R_D0+ HDMI_IN_R_D1HDMI_IN_R_D1+ HDMI_IN_R_D2HDMI_IN_R_D2+ A_I2C_SDA A_I2C_SCL D1_I2C_SDA / GPIO_28 D1_I2C_SCL / GPIO_29 D2_I2C_SDA / GPIO_24 D2_I2C_SCL / GPIO_25 RV447 48 49 53 54 56 57 59 60 62 63 51 43 GPIO_57 GPIO_56 GPIO_55 GPIO_54 GPIO_53 GPIO_52 GPIO_51 GPIO_50 GPIO_49 GPIO_48 2 10K_0402_5%~D RV243 1 +3.3V_DDVDD 1 111 112 T60 @ T58 @ VEDID_VDD_3V3 / / / / / / / / / / RV242 1 D +3.3V_DDVDD 2 1 2 PAD~D PAD~D 4.7K_0402_5%~D 71 72 73 74 44 45 TTL_D19 TTL_D18 TTL_D17 TTL_D16 TTL_D15 TTL_D14 TTL_D13 TTL_D12 TTL_D11 TTL_D10 BS_I2C_ON_R 2 1 RV418 70 / / / / / / / / / / 2 10K_0402_5%~D 1 +3.3V_DDVDD 0.1U_0402_16V4Z~D EC_HDMI_DAT EC_HDMI_CLK HDMI_SW_DAT HDMI_SW_CLK E_CH0N_LV E_CH0P_LV E_CH1N_LV E_CH1P_LV E_CH2N_LV E_CH2P_LV E_CLKN_LV E_CLKP_LV E_CH3N_LV E_CH3P_LV BS_I2C_SRC_R RV240 1 8 7 10K_0402_5%~D 2 6 HDMI_SPI_CLK_R 5 HDMI_SPI_SI_R VCC RESET# C D +1.2V_AVDD 1 2 1 2 LVDS ADC_A_N ADC_A_P ADC_B_N ADC_B_P ADC_C_N ADC_C_P HSYNC_IN VSYNC_IN GPIO_67 GPIO_66 GPIO_65 GPIO_64 GPIO_63 GPIO_62 GPIO_61 GPIO_60 GPIO_59 GPIO_58 BS_SPI_R 2 10K_0402_5%~D RV267 4.7K_0402_1%~D 1 RESETn STI_TM2 / / / / / / / / / / BS_RESERVED_R 2 10K_0402_5%~D RV239 1 2 RV266 4.7K_0402_1%~D 0.1U_0402_16V4Z~D 92 0.1U_0402_16V4Z~D 93 0.1U_0402_16V4Z~D 95 0.1U_0402_16V4Z~D 96 0.1U_0402_16V4Z~D 98 0.1U_0402_16V4Z~D 99 0.1U_0402_16V4Z~D 105 0.1U_0402_16V4Z~D 106 TTL_D29 TTL_D28 TTL_D27 TTL_D26 TTL_D25 TTL_D24 TTL_D23 TTL_D22 TTL_D21 TTL_D20 2 10K_0402_5%~D RV238 1 +3.3V_DDVDD RV265 4.7K_0402_1%~D 2 2 2 2 2 2 2 2 64 58 52 QV18 MMST3904-7-F_SOT323-3~D 1 1 1 1 1 1 1 1 NC / / / / / / / / / / RV237 1 RV260 4.7K_0402_1%~D 2 4 125 O_CH0N_LV O_CH0P_LV O_CH1N_LV O_CH1P_LV O_CH2N_LV O_CH2P_LV O_CLKN_LV O_CLKP_LV O_CH3N_LV O_CH3P_LV 2 10K_0402_5%~D BS_UART_FUNCTION_SEL MX25L2006EM1I-12G_SOP8 RVDD_33 RVDD_33 RVDD_33 XTAL TCLK BS_I2C_DEV_ID0 RV235 1 RV259 4.7K_0402_1%~D CV195 CV196 CV198 CV199 CV200 CV201 CV202 CV203 1 CV204 35 35 35 35 35 35 35 35 8 9 36 HDMI_RST# 2 10K_0402_5%~D RV264 1 4.7K_0402_5%~D B VDDA_1V2 2 10K_0402_5%~D CV194 0.1U_0402_16V4Z~D RV261 CV197 2.2K_0402_5%~D 4700P_0402_25V7K~D XTAL TCLK +3.3V_DDVDD @ DPRX_VDDA_1V2 DPRX_VDDA_1V2 DPRX_VDDA_1V2 50 S# Q W# VSS RV258 4.7K_0402_1%~D 38 109 128 +3.3V_DDVDD HDMI_VDDA_3V3 HDMI_VDDA_3V3 ADC_AVDD_3V3 ADC_AVDD_3V3 88 BS_I2C_DEV_ID1 RV233 1 UV18 1 2 3 4 @ 80 86 90 100 +3.3VS_AVDD +3.3V_DDVDD HDMI_IN_EN ADC_DVDD_1V2 DPRX_VDDD_1V2 27MHZ_10PF_X3S027000BA1H-U~D 43 AVDD_OUT_33 AVDD_OUT_33 XTAL 2 G2 G1 11 23 +3.3V_AVDD_LVTX CVDD_12 CVDD_12 CVDD_12 CVDD_12 RV252 15_0402_5%~D 1 HDMI_SPI_CS# 2 HDMI_SPI_CS#_R 1 2 HDMI_SPI_SO HDMI_SPI_SO_R 2 RV253 1 15_0402_5%~D +3.3V_DDVDD RV255 10K_0402_5%~D +1.2V_DVDD 2 C 3 4 VDDA_3V3 116 108 46 35 1 2 YV1 1 2 10 +3.3V_AVDD_RPLL BS_I2C_DEV_ID2 2 10K_0402_5%~D 2Mbit SPI ROM EC_HDMI_CLK EC_HDMI_DAT 3 2 2 22_0402_5% 2 22_0402_5% UV1 1 1 RV250 1 RV251 1 EC_SMB_CK2_R EC_SMB_DA2_R 3 CV193 10P_0402_50V8J~D CV192 10P_0402_50V8J~D TCLK 1 43 2 10K_0402_5%~D RV232 1 CV191 .1U_0402_16V7K~D 43 +3.3V_AVDD_RPLL RV230 1 HDMI_SPI_CLK_R 1 2 EN NC VOUT 2 1 2 1 VIN 2 1 2 1 VDD @ RV244 CV190 15_0402_5%~D 15P_0402_50V8J~D 1 2 2 CV189 0.1U_0603_25V7K~D 1 2 CV188 0.1U_0603_25V7K~D 2 2 CV187 0.1U_0603_25V7K~D 1 2 CV186 0.1U_0603_25V7K~D 2 1 CV185 0.1U_0603_25V7K~D Close to respective power Pins 2 CV183 22U_0805_6.3VAM~D 1 AVDD_RPLL pin10 C610 0.1uF to AVSS_RPLL pin7 LV22 1 2 BLM18AG601SN1D_0603~D 3 @ +3.3V_AVDD_RPLL LV23 1 2 BLM18BD601SN1D_0603~D CV184 0.1U_0603_25V7K~D 1 +3.3VS_AVDD CV182 0.1U_0603_25V7K~D 1 2 CV181 22U_0805_6.3VAM~D 1 2 CV180 0.1U_0603_25V7K~D 2 CV179 0.1U_0603_25V7K~D CV178 0.1U_0603_25V7K~D 2 CV177 22U_0805_6.3VAM~D 1 +1.2V_DVDD 4 2 +1.2VS_HDMI UV17 RV241 20K_0402_5%~D LV21 1 2 BLM18BD601SN1D_0603~D 2 CV176 10U_0805_4VAM~D +3.3V_DDVDD 1 1 +1.2VS @ LV19 2 1 BLM18AG601SN1D_0603~D 2 100K_0402_5%~D RV236 10K_0402_5%~D 1 1 +3.3V_DDVDD +1.2VS_HDMI 1 RV231 CV175 .1U_0402_16V7K~D 1 2 +5VS CV174 1U_0402_6.3V6K~D 1 2 CV169 0.1U_0603_25V7K~D 2 2 CV168 0.1U_0603_25V7K~D 1.2V TDC 0.52A Peak Current 0.73A OCP current 3.5A 2 CV167 0.1U_0603_25V7K~D 1 1 CV166 0.1U_0603_25V7K~D 1 2 +3VS LV18 1 2 BLM18BD601SN1D_0603~D CV165 22U_0805_6.3VAM~D Can not place large capacitor to prevent pulse happened when LVDS 1 power switch off/on 2 1 www.laptopblue.vn +1.2VS_HDMI CV172 0.1U_0603_25V7K~D 1 2 CV171 0.1U_0603_25V7K~D 1 2 LV17 1 2 BLM18BD601SN1D_0603~D CV170 0.1U_0603_25V7K~D 1 2 CV164 0.1U_0402_16V4Z~D 1 2 CV163 0.1U_0603_25V7K~D 2 CV162 0.1U_0603_25V7K~D +3VS CV161 0.1U_0603_25V7K~D CV160 22U_0805_6.3VAM~D 2 D +3.3V_AVDD_LVTX +3.3VS_AVDD LV16 1 2 BLM18BD601SN1D_0603~D 1 2 2 +3.3VS_AVDD +3VS 3 RV234 0_0402_5%~D 2 1 5 HDMI_SINK_HPD_RR 35 C A +HDMI_5V_OUT STDP6038-AC_PQFP128_20X14~D Compal Secret Data Security Classification Issued Date 2012/05/14 Deciphered Date 2013/05/13 Title Compal Electronics, Inc. HDMI to LVDS-STDP6038 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.1 LA-9332P Date: 5 4 3 2 Friday, December 14, 2012 1 Sheet 37 of 56 5 4 3 2 1 www.laptopblue.vn D D C C B B A A Compal Secret Data Security Classification Issued Date 2012/05/14 Deciphered Date 2013/05/13 Title Compal Electronics, Inc. LVDS to eDP-STDP4028 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.1 LA-9332P Date: 5 4 3 2 Friday, December 14, 2012 1 Sheet 38 of 56 5 4 3 2 1 +3VS www.laptopblue.vn +3VMXM 1 RV327 1 RV330 2 VGA_DPD_AUXP/DDC 2.2K_0402_5%~D 2 VGA_DPD_AUXN/DDC 2.2K_0402_5%~D +3VS D 2 UV21 VDD VDD MXM 8 8 8 0.1U_0402_10V6K~D 0.1U_0402_10V6K~D 0.1U_0402_10V6K~D 0.1U_0402_10V6K~D 0.1U_0402_10V6K~D 0.1U_0402_10V6K~D 0.1U_0402_10V6K~D 0.1U_0402_10V6K~D VGA_DPD_SW_P0 VGA_DPD_SW_N0 VGA_DPD_SW_P1 VGA_DPD_SW_N1 VGA_DPD_SW_P2 VGA_DPD_SW_N2 VGA_DPD_SW_P3 VGA_DPD_SW_N3 44 45 47 48 1 2 4 5 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 0.1U_0402_16V4Z~D 0.1U_0402_16V4Z~D 0.1U_0402_16V4Z~D 0.1U_0402_16V4Z~D 0.1U_0402_10V7K~D 0.1U_0402_10V7K~D 0.1U_0402_10V7K~D 0.1U_0402_10V7K~D CPU_DPD_SW_P0 CPU_DPD_SW_N0 CPU_DPD_SW_P1 CPU_DPD_SW_N1 CPU_DPD_SW_P2 CPU_DPD_SW_N2 CPU_DPD_SW_P3 CPU_DPD_SW_N3 8 9 11 12 13 14 16 17 PWDN_ASQ IN1_D1n IN1_D1p IN1_D2n IN1_D2p IN1_D3n IN1_D3p IN1_D4n IN1_D4p CFG_HPD DDCBUF PRE_EMI RTERM 25 DMC_PWDN 28 DMC_CFG_HPD 40 34 7 DMC_DDCBUF DMC_PRE_EMI 36 35 33 32 30 29 27 26 DMC_SW_P0 RV338 DMC_SW_N0 RV339 DMC_SW_P1 RV340 DMC_SW_N1 RV341 DMC_SW_P2 RV342 DMC_SW_N2 RV343 DMC_SW_P3 RV344 DMC_SW_N3 RV345 2.2K_0402_5%~D 2.2K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D DMC_PWDN DMC_CFG_HPD DMC_DDCBUF DMC_PRE_EMI DMC_IN1_PEQ DMC_IN2_PEQ @ RV332 1 @ RV333 1 @ RV334 1 @ RV335 1 @ RV336 1 @ RV337 1 2 2 2 2 2 2 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D D +3VS IN2_D1n IN2_D1p IN2_D2n IN2_D2p IN2_D3n IN2_D3p IN2_D4n IN2_D4p Close to UV22 VCC pins OUT_D1n OUT_D1p OUT_D2n OUT_D2p OUT_D3n OUT_D3p OUT_D4n OUT_D4p 1 1 1 1 1 1 1 1 @ @ @ @ @ @ @ @ 2 2 2 2 2 2 2 2 0_0402_1% 0_0402_1% 0_0402_1% 0_0402_1% 0_0402_1% 0_0402_1% 0_0402_1% 0_0402_1% DP_DMC_ML0P DP_DMC_ML0N DP_DMC_ML1P DP_DMC_ML1N DP_DMC_ML2P DP_DMC_ML2N DP_DMC_ML3P DP_DMC_ML3N 1 2 2 36 36 1 10K_0402_5%~D 1 10K_0402_5%~D RV347 46 10 41 42 19 20 VGA_DMC_HPD_R PCH_DMC_HPD_R DGPU_EDIDSEL#_R DGPU_SEL# DGPU_EDIDSEL#_R DGPU_SEL# 22 21 DMC_IN1_PEQ DMC_IN2_PEQ 3 15 SW_DDC SW_MAIN DMC_SW_DETECT DP_DMC_AUXP DP_DMC_AUXN DP_DMC_HPD DP_DMC_HPD RV61 1 1 +3VS 18 43 49 2 4.7K_0402_5%~D GND GND PAD DMC_SDATA_R DMC_SCLK_R PS8271QFN48GTR-A1_QFN48_7X7 0 IN1 1 IN2 DMC_PC2 1 2 1 G 3 2 S 3 SSM3K7002F_SC59-3~D @ D 2 1 2 CV269 220P_0402_50V7K~D 2 D QV23 SSM3K7002F_SC59-3~D 2 G S 3 C OUT1p OUT1n OUT2p OUT2n OUT3p OUT3n OUT4p OUT4n POW 23 22 20 19 17 16 14 13 CPU_MXM_DMC_P0 CPU_MXM_DMC_N0 CPU_MXM_DMC_P1 CPU_MXM_DMC_N1 CPU_MXM_DMC_P2 CPU_MXM_DMC_N2 CPU_MXM_DMC_P3 CPU_MXM_DMC_N3 CPU_MXM_DMC_P0 CPU_MXM_DMC_N0 CPU_MXM_DMC_P1 CPU_MXM_DMC_N1 CPU_MXM_DMC_P2 CPU_MXM_DMC_N2 CPU_MXM_DMC_P3 CPU_MXM_DMC_N3 51 51 51 51 51 51 51 51 HPD_SINK I2C_CTL_EN# NC/DDCBUF_EN# NC/OE# HPD SDA SCL SDA_CTL/CFG1 SCL_CTL/CFG0 SDAZ SCLZ 7 29 28 DMC_SINK_HPD DP_DMC_AUXN DP_DMC_AUXP I2C_ADDR0/PC0 I2C_ADDR1/PC1 GND/PC2 REXT CEXT PS121QFN48G_QFN48_7X7 +3VS RV367 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 2.2K_0402_5%~D 2.2K_0402_5%~D 2 2 2 2 2 2 2 2 1 RV359 @ 1 RV354 @ 1 RV355 @ 1 RV356 1 RV357 @ 1 RV358 1 RV317 1 RV318 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 2 2 2 2 2 1 RV361 @ 1 RV362 @ 1 RV363 @ 1 RV364 @ 1 RV365 @ DMC_DDCBUF_EN# DMC_CFG1 DMC_CFG0 DMC_PC0 DMC_PC1 DMC_PC2 DP_DMC_AUXN DP_DMC_AUXP DMC_CFG1 DMC_CFG0 DMC_PC0 DMC_PC1 DMC_PC2 A 2 1.5K_0402_5% RV366 1.5K_0402_5% 1 2 Modify 5/17 +3VS 1 IN1p IN1n IN2p IN2n IN3p IN3n IN4p IN4n 5 12 18 24 27 31 36 37 43 49 DMC_OE# 1 DGPU_HPD_INT# 2 1 PS121 CFG0/ CFG1 SCLZ/SDAZ output voltage select; CFG1:0=00 LOW-level input voltage: <0.40V LOW-level output voltage: 0.60V PS121 PC0/PC1/PC2 Inputs equalization control, default inputs equalization setting at 12 dB 000: 12 dB, 001: 16 dB, 010: 10 dB, 011: 7 dB 100: 1.5 dB, 101: 4 dB, 110: 9 dB, 111: 7 dB DGPU_HPD_INT# DMC_SDATA_R DMC_SCLK_R CV268 10 2 B RV349 100K_0402_5%~D +5VS A 1 6 1 1 2 @ DV11 BAV99-7-F_SOT23-3 RV352 200K_0402_5% 1 0_0603_5%~D LV29 MBK1608221YZF_2P 1 2 DMC_SINK_HPD @ 2 0_0402_1% 1 RV62 +3VS 2 B 21,36 34 35 3 4 RV225 1 1 8 9 DMC_CFG1 DMC_CFG0 Co-lay QV22 32 DMC_PC0 DMC_PC1 2.2U_0402_6.3V6M~D2 1 26 Y 499_0402_1%~D RV351 30 25 DMC_OE# SEL DMC_SW_DETECT 38 39 41 42 44 45 47 48 2 +3VS 51 CEXT REXT DMC_DDCBUF_EN# 2 RV348 499_0402_1%~D CV267 2.2U_0603_6.3V6K~D 2 OUT_HPD OUT_SCL OUT_SDA 39 38 37 DP_DMC_ML0P DP_DMC_ML0N DP_DMC_ML1P DP_DMC_ML1N DP_DMC_ML2P DP_DMC_ML2N DP_DMC_ML3P DP_DMC_ML3N IN1_PEQ IN2_PEQ 23 24 1 UV22 IN1_HPD IN2_HPD IN1_SCL IN1_SDA IN2_SCL IN2_SDA 2 VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 29 VGA_DMC_HPD 17 PCH_DMC_HPD VGA_DPD_AUXP/DDC VGA_DPD_AUXN/DDC 17 PCH_DPD_CLK 17 PCH_DPD_DAT 1 GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 GND9 GND10 29 29 11 15 21 33 40 46 RV346 C 2 +3VS CV266 0.01U_0402_16V7K~D CV255 CV256 CV257 CV258 CV259 CV260 CV261 CV262 2 2 2 2 2 2 2 2 1 1 2 2 2 2 2 2 CV265 0.1U_0402_16V4Z~D CPU_DPD_DMC_P0 CPU_DPD_DMC_N0 CPU_DPD_DMC_P1 CPU_DPD_DMC_N1 CPU_DPD_DMC_P2 CPU_DPD_DMC_N2 CPU_DPD_DMC_P3 CPU_DPD_DMC_N3 1 1 1 1 1 1 1 1 RV30 2 CV264 0.1U_0402_16V4Z~D 8 8 8 CV247 CV248 CV249 CV250 CV251 CV252 CV253 CV254 VGA_DPD_P0 VGA_DPD_N0 VGA_DPD_P1 VGA_DPD_N1 VGA_DPD_P2 VGA_DPD_N2 VGA_DPD_P3 VGA_DPD_N3 1 RV31 2 @ RV324 1 @ RV325 1 @ RV326 1 @ RV328 1 @ RV329 1 @ RV331 1 CV263 0.01U_0402_16V7K~D CPU88 29 29 29 29 29 29 29 29 6 31 2 CV246 0.1U_0402_16V4Z~D 1 CV245 10U_0603_6.3V6M~D PCH/GPU AUX&LANE SW for DPB PCH_DPD_CLK PCH_DPD_DAT DMC_PWDN DMC_CFG_HPD DMC_DDCBUF DMC_PRE_EMI DMC_IN1_PEQ DMC_IN2_PEQ CPU_MXM_DMC_AUXN CPU_MXM_DMC_AUXP CPU_MXM_DMC_AUXN CPU_MXM_DMC_AUXP 51 51 Compal Secret Data Security Classification Issued Date 2012/05/14 Deciphered Date 2013/05/13 Title Compal Electronics, Inc. DP SW for DMC THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.1 LA-9332P Date: 5 4 3 2 Friday, December 14, 2012 1 Sheet 39 of 56 5 4 3 +3VS 2 1 +3VS_RT +1.2VS 60 mils www.laptopblue.vn 30mil 1 1 1 2 UV23 MIIC_SCL MIIC_SDA D Close to Pin15 Close to 11 pin EEROM 1 CV275 2 CV274 2 CV273 2 1 +DVCC33 0.1U_0402_16V4Z 2 +SWR_V12 0_0805_5% @ 0.1U_0402_16V4Z 1 RV8 0.1U_0402_16V4Z CV272 2 0_0805_5%~D 22U_0805_6.3V6M RV7 30mil @ RV23 RV24 1 1 0_0402_5% 2 FW_ROM_SCL 2 FW_ROM_SDA 0_0402_5% 2 0_0402_5% 2 0_0402_5% @ @ EDID_CLK RV25 @1 @ EDID_DATA RV26 @ @1 Close to 43 pin 8 7 6 5 VCC WP SCL SDA A0 A1 A2 GND 1 2 3 4 D CAT24C64WI-GT3_SO8 Addr: A8 (1010 100X) @ UV24 RTD2136S +DVCC33 +3VS_RT 22 18 5 17 15 43 +DVCC33 11 2 8 8 Close to LV10 Close to 18 pin DP_V33 SWR_LX TXO1+ TXO1- SWR_VCCK TXO2+ TXO2- VCCK DP_V12 Close to 22 pin8 8 CPU_EDP_P1 CPU_EDP_N1 CPU_EDP_AUX CPU_EDP_AUX# 1 1 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z CPU_EDP_P0_C CPU_EDP_N0_C 7 8 CPU_EDP_P1 CV307 CPU_EDP_N1 CV308 1 1 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z CPU_EDP_P1_C CPU_EDP_N1_C CPU_EDP_AUX CV309 CPU_EDP_AUX#CV310 1 1 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z CPU_EDP_AUX_C 4 CPU_EDP_AUX#_C 3 8 1 CPU_EDP_HPD# CPU_EDP_HPD# 9 10 LANE0P LANE0N LANE1P LANE1N AUX-CH_P AUX-CH_N TXEC+ TXECTXE0+ TXE0TXE1+ TXE1TXE2+ TXE2- DP_HPD 17 21 2 12 PCH_EDP_PWM PCH_EDP_PWM 2 12K_0402_1% PWMIN TESTMODE DP_REXT @ 2 0_0402_5% RV12 1 2 0_0402_5% ENBKL MIIC_SCL 48 MIIC_SDA 47 42,43 TL_INVT_BL 5 @ RV16 100K_0402_5% MC74VHC1G08DFT2G SC70 5P MIIC_SCL 39 40 LVDS_A1 LVDS_A1# 37 38 LVDS_A2 LVDS_A2# LVDS_ACLK LVDS_ACLK# 41 41 LVDS_A0 LVDS_A0# 41 41 LVDS_A1 LVDS_A1# 41 41 LVDS_A2 LVDS_A2# 41 41 25 26 LVDS_BCLK LVDS_BCLK# 31 32 LVDS_B0 LVDS_B0# 29 30 LVDS_B1 LVDS_B1# 27 28 LVDS_B2 LVDS_B2# LVDS_BCLK LVDS_BCLK# 41 41 LVDS_B0 LVDS_B0# 41 41 LVDS_B1 LVDS_B1# 41 41 LVDS_B2 LVDS_B2# 41 41 C PANEL_VCC PWMOUT BL_EN 46 45 EDID_CLK EDID_DATA 20 19 44 TL_ENVDD TL_INVT_PWM TL_BKOFF#_R EDID_CLK EDID_DATA TL_ENVDD TL_INVT_PWM 42 42 42 42 6 DP_GND 16 GND RV15 1 2 0_0402_1% @ 49 PAD RTD2136R-CG_QFN48_6X6 2 1 P 4 RV50 4.7K_0402_5% EEPROM MIIC_SDA B 2 2 A CIICSCL1 CIICSDA1 LVDS_A0 LVDS_A0# 1 UV25 B +3VS_RT @ Y 13 14 CIICSCL CIICSDA +DVCC33 G 1 B 3 2 BKOFF# 2 0_0402_5% 2 0_0402_5% CV284 0.1U_0402_16V7K 1 2 +3VS_RT 42,43 1 RV11 1 RV20 CSCL CSDA 42 MIICSCL0 MIICSDA0 MIICSCL1 MIICSDA1 GND 1 1 TL_BKOFF#_R RV14 OTHERS 1 RV9 LVDS_ACLK LVDS_ACLK# 41 42 23 24 TXE3+ TXE3- Vendor advise reserve it 35 36 33 34 TXO3+ TXO3- DP Close to 5 pin CPU_EDP_P0 CV305 CPU_EDP_N0 CV306 CPU_EDP_P0 CPU_EDP_N0 8 8 C Close to LV9 TXO0+ TXO0- 1 CV283 2 0.1U_0402_16V4Z 2 1 CV282 2 1 0.1U_0402_16V4Z CV281 CV280 2 1 22U_0805_6.3V6M 2 1 0.1U_0402_16V4Z CV279 1 CV278 CV277 2 10U_0603_6.3V6M 1 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z CV276 10U_0603_6.3V6M 1 SWR_VDD LVDS +AVCC33 TXOC+ TXOC- PVCC PWR +SWR_V12 1 +DVCC33 LV30 2 40 mils FBMA-L11-201209-221LMA30T_0805 1 +AVCC33 LV31 2 FBMA-L11-201209-221LMA30T_0805 2 +SW_LX LV32 1 60 mils 4.7UH_PG031B-4R7MS_1.1A_20% 60 mils @ ROMLESS 1 1 RV18 4.7K_0402_5% 2 CPU_EDP_AUX# CPU_EDP_AUX RV46 4.7K_0402_5% RV19 100K_0402_5% 2 Pull-Low 100K +3VS_RT +DVCC33 EDID_DATA RV52 1 2 4.7K_0402_5% EDID_CLK RV21 1 2 4.7K_0402_5% MIIC_SDA RV45 1 2 4.7K_0402_5% CSCL RV47 1 2 4.7K_0402_5% CSDA RV51 1 2 4.7K_0402_5% 2 TL_BKOFF#_R 1 6 RV13 1 2 0_0402_1% EC_SMB_DA2 QV2A DMN66D0LDW-7_SOT363-6~D 4 CSCL EC_SMB_DA2 19,30,43,53,54 5 @ 3 RV17 1 2 0_0402_1% @ EC_SMB_CK2 EC_SMB_CK2 RV22 100K_0402_5% 2 CSDA 1 AUX termination 19,30,43,53,54 QV2B DMN66D0LDW-7_SOT363-6~D A A Compal Secret Data Security Classification Issued Date 2012/05/14 2013/05/13 Deciphered Date Title Translator RTD2136R THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.1 LA-9332P Date: 5 4 3 2 Friday, December 14, 2012 Sheet 1 40 of 56 5 4 3 2 1 www.laptopblue.vn STDP6038 SW STDP4028 PCH/GPU AUX for LVDS D D UV26 SLE1 40 40 29 29 LVDS_BCLK LVDS_BCLK# LVDS_BCLK LVDS_BCLK# LVDS_MXM_TZCLK+ LVDS_MXM_TZCLK- 40 40 LVDS_B2 LVDS_B2# 29 29 LVDS_MXM_TZOUT2+ LVDS_MXM_TZOUT2- 40 40 LVDS_B1 LVDS_B1# 29 29 40 40 29 29 LVDS_MXM_TZCLK+ LVDS_MXM_TZCLK- 80 79 LVDS_B2 LVDS_B2# 78 77 LVDS_MXM_TZOUT2+ LVDS_MXM_TZOUT2LVDS_B1 LVDS_B1# LVDS_MXM_TZOUT1+ LVDS_MXM_TZOUT1- LVDS_MXM_TZOUT1+ LVDS_MXM_TZOUT1- LVDS_B0 LVDS_B0# LVDS_B0 LVDS_B0# LVDS_MXM_TZOUT0+ LVDS_MXM_TZOUT0- LVDS_MXM_TZOUT0+ LVDS_MXM_TZOUT0- 2 1 76 75 73 72 71 70 68 67 66 65 64 63 RTD2136 DGPU_MXM C Input 62 61 0B1 1B1 A0 A1 29 29 40 40 LVDS_ACLK LVDS_ACLK# LVDS_ACLK LVDS_ACLK# LVDS_MXM_TXCLK+ LVDS_MXM_TXCLKLVDS_A2 LVDS_A2# 29 29 LVDS_MXM_TXOUT2+ LVDS_MXM_TXOUT2- 40 40 LVDS_A1 LVDS_A1# 29 29 LVDS_MXM_TXCLK+ LVDS_MXM_TXCLK- 58 57 LVDS_A2 LVDS_A2# 56 55 LVDS_MXM_TXOUT2+ LVDS_MXM_TXOUT2LVDS_A1 LVDS_A1# LVDS_MXM_TXOUT1+ LVDS_MXM_TXOUT1- LVDS_MXM_TXOUT1+ LVDS_MXM_TXOUT1- LVDS_A0 LVDS_A0# 40 40 LVDS_A0 LVDS_A0# 29 29 LVDS_MXM_TXOUT0+ LVDS_MXM_TXOUT0- 60 59 LVDS_MXM_TXOUT0+ LVDS_MXM_TXOUT0- 54 53 51 50 49 48 46 45 44 43 42 41 B 40 39 EDP_DETECT# 5 6 LVDS_MUX_TZCLK+ LVDS_MUX_TZCLK- 8 9 LVDS_MUX_TZOUT2+ LVDS_MUX_TZOUT2- 11 12 LVDS_MUX_TZOUT1+ LVDS_MUX_TZOUT1- 14 15 LVDS_MUX_TZOUT0+ LVDS_MUX_TZOUT0- EDP_DETECT# 21 LVDS_MUX_TZCLK+ LVDS_MUX_TZCLK- 42 42 0B2 1B2 2B1 3B1 A2 A3 LVDS_MUX_TZOUT2+ LVDS_MUX_TZOUT2- 42 42 2B2 3B2 4B1 5B1 A4 A5 LVDS_MUX_TZOUT1+ LVDS_MUX_TZOUT1- 42 42 LVDS_MUX_TZOUT0+ LVDS_MUX_TZOUT0- 42 42 4B2 5B2 6B1 7B1 A6 A7 6B2 7B2 8B1 9B1 A8 A9 17 18 C Output 8B2 9B2 SEL2 40 40 16 10B1 11B1 A10 A11 34 EDP_DETECT# 23 24 LVDS_MUX_TXCLK+ LVDS_MUX_TXCLK- 26 27 LVDS_MUX_TXOUT2+ LVDS_MUX_TXOUT2- 29 30 LVDS_MUX_TXOUT1+ LVDS_MUX_TXOUT1- 32 33 LVDS_MUX_TXOUT0+ LVDS_MUX_TXOUT0- LVDS_MUX_TXCLK+ LVDS_MUX_TXCLK- 42 42 10B2 11B2 12B1 13B1 A12 A13 LVDS_MUX_TXOUT2+ LVDS_MUX_TXOUT2- 42 42 LVDS_MUX_TXOUT1+ LVDS_MUX_TXOUT1- 42 42 LVDS_MUX_TXOUT0+ LVDS_MUX_TXOUT0- 42 42 12B2 13B2 14B1 15B1 A14 A15 14B2 15B2 16B1 17B1 A16 A17 16B2 17B2 18B1 19B1 A18 A19 35 36 B +3VS 18B2 19B2 2 2 G RV370 100K_0402_5%~D D S 3 1 3 13 20 21 31 38 52 74 25 7 GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 OE2# OE1# QV24 SSM3K7002F_SC59-3~D VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 4 10 19 22 28 37 47 69 1 2 1 2 1 2 CV287 4.7U_0603_6.3V6K~D LCDVDD_ON CV286 0.1U_0402_16V4Z~D 33,42 CV285 0.1U_0402_16V4Z~D 1 +3VS PI3LVD1012BE_BQSOP80 SEL L H Y RTD2136 DGPU_MXM A A Compal Secret Data Security Classification Issued Date 2012/05/14 2013/05/13 Deciphered Date Title Compal Electronics, Inc. LVDS SW- 1 to 2 & GPU/PCH THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.1 LA-9332P Date: 5 4 3 2 Friday, December 14, 2012 Sheet 1 41 of 56 3 2 1 PCH/GPU MUX & 6038 MUX SW for LVDS www.laptopblue.vn RV371 10K_0402_5%~D 2 0_0402_5%~D 29 37 40 42,43 VGA_PNL_PWM HDMI_IN_PWM TL_INVT_PWM EC_INV_PWM RV375 1 2 UV28 6 5 4 3 0_0402_1% 2 RV377 1 @ RV402 1 VGA_EC_PWM HDMI_IN_PWM TL_INVT_PWM 2 0_0402_5%~D @ DGPU_BKL_PWM_SEL# 1A 0 0 1B1 2B1 1 1B2 2B2 1 0 1B3 2B3 1 1 1B4 2B4 0 C DGPU_SELECT# 29 37 40 VGA_LCD_DAT DHMI_IN_NV_DAT EDID_DATA 37 37 LVDS_6038_TZOUT0+ LVDS_6038_TZOUT0- LVDS_MUX_TZOUT0+ LVDS_MUX_TZOUT0- 68 67 LVDS_6038_TZOUT0+ LVDS_6038_TZOUT0- 66 65 HDMI IN (D) CPU/MXM(MUX) HDMI IN(6038) DSC Input 62 61 6B1 7B1 RV383 0_0402_5%~D 1 2 +3VS 1 DGPU_EDIDSEL_R# VGA_LCD_CLK DHMI_IN_NV_CLK EDID_CLK 6 5 4 3 2 VGA_LCD_DAT DHMI_IN_NV_DAT EDID_DATA 10 11 12 13 1 1B1 1B2 1B3 1B4 VCC 2B1 2B2 2B3 2B4 1A 2A 2OE 1OE GND S0 S1 16 14 2 HDMI_IN_SELECT# DGPU_EDIDSEL_R# 7 9 I2CC_SCL I2CC_SDA S1 S0 1A 2A 0 0 1B1 2B1 0 1 1B2 2B2 1 0 1B3 2B3 1 1 1B4 2B4 Y HDMI IN (D) DSC HDMI IN (I) UMA 15 41 41 LVDS_MUX_TXCLK+ LVDS_MUX_TXCLK- 37 37 LVDS_6038_TXCLK+ LVDS_6038_TXCLK- 41 41 LVDS_MUX_TXOUT2+ LVDS_MUX_TXOUT2- 37 37 LVDS_6038_TXOUT2+ LVDS_6038_TXOUT2- 41 41 LVDS_MUX_TXOUT1+ LVDS_MUX_TXOUT1- 37 37 LVDS_6038_TXOUT1+ LVDS_6038_TXOUT1- 41 41 LVDS_MUX_TXOUT0+ LVDS_MUX_TXOUT0- 37 37 8 LVDS_6038_TXOUT0+ LVDS_6038_TXOUT0- LVDS_MUX_TXCLK+ LVDS_MUX_TXCLK- 60 59 LVDS_6038_TXCLK+ LVDS_6038_TXCLK- 58 57 LVDS_MUX_TXOUT2+ LVDS_MUX_TXOUT2- 56 55 LVDS_6038_TXOUT2+ LVDS_6038_TXOUT2- 54 53 LVDS_MUX_TXOUT1+ LVDS_MUX_TXOUT1- 51 50 LVDS_6038_TXOUT1+ LVDS_6038_TXOUT1- 49 48 LVDS_MUX_TXOUT0+ LVDS_MUX_TXOUT0- 46 45 LVDS_6038_TXOUT0+ LVDS_6038_TXOUT0- 44 43 TZOUT0+ TZOUT0- 1 8B1 9B1 2 A8 A9 17 18 Output 10B1 11B1 1 2 43 A10 A11 34 2 1 D 8B2 9B2 HDMI_IN_SELECT#_R A12 A13 26 27 TXOUT2+ TXOUT2- 1 SEL L H A14 A15 29 30 TXOUT1+ TXOUT1- A16 A17 32 33 TXOUT0+ TXOUT0- Y 2 B1 B2 1 2 40,43 35 36 55 54 53 52 51 50 49 48 47 46 45 GND11 GND10 GND9 GND8 GND7 GND6 GND5 GND4 GND3 GND2 GND1 2 5 4 S1 S0 0 0 1B1 2B1 HDMI IN 0 1 1B2 2B2 DSC 1 0 1B3 2B3 HDMI IN 1 1 1B4 2B4 UMA 1A 2A CV322 10P_0402_50V8J~D A 2 BKOFF# BKOFF# RV384 1 1 2 @ 2 DISPOFF# 0_0402_1% JLVDS1 A18 A19 1 D S 40 DGPU_ENVDD HDMI_IN_ENVDD TL_ENVDD 1 LVDS Conn. CV298 4.7U_0603_6.3V6K~D G 29 37 2 EN_CAM control circuit Close to JLVDS1 CV297 0.1U_0402_16V4Z~D LCDVDD_ON 1 1 C 16B2 17B2 18B1 19B1 2 +LCDVDD_3V 14B2 15B2 16B1 17B1 1 +3VS 12B2 13B2 14B1 15B1 3 TXCLK+ TXCLK- 10B2 11B2 12B1 13B1 1 2 G EN_CAM S 23 24 CV296 0.1U_0402_16V4Z~D 33,41,42 14 15 44 44 43 43 42 42 41 41 40 40 40 39 +3VS 39 18B2 19B2 39 38 38 37 +3VS 37 36 3 4 VDD1 10 36 35 13 GND1 VDD2 19 35 34 20 GND2 1 1 1 VDD3 22 34 33 RV385 21 GND3 LCDVDD_ON GND4 VDD4 28 33 32 31 100K_0402_5%~D 2 GND5 VDD5 32 31 38 37 GND6 VDD6 31 30 2 2 2 52 47 GND7 VDD7 30 29 74 69 GND8 VDD8 29 28 3 1 25 28 27 7 OE2# OE1# 27 26 QV27 26 25 SSM3K7002F_SC59-3~D 25 24 24 23 PI3LVD1012BE_BQSOP80 23 22 22 21 +3VS +3VS 21 20 DMIC_CLK 20 19 @ 1 19 18 @ 1 18 17 CV299 RV386 17 16 0.1U_0402_16V4Z~D 10K_0402_5%~D 16 15 2 UV30 15 14 2 6 16 VCC 14 13 5 1B1 13 12 4 1B2 14 HDMI_IN_SELECT# S0 2 12 11 3 1B3 DGPU_SELECT# DGPU_SELECT# 17,31,36 1B4 S1 11 10 10 9 10 7 2B1 1A 9 8 11 9 RV389 1 2 0_0402_5%~D LCDVDD_ON LCDVDD_ON 33,41,42 2B2 2A 8 7 12 7 6 13 2B3 15 @ LV33 2B4 2OE 6 5 4 3 USB20_P12 USB20_P12_CONN 20 USB20_P12 4 3 5 4 1 8 1OE GND 4 3 3 2 1 2 USB20_N12 USB20_N12_CONN SN74CB3Q3253PWR_TSSOP16 20 USB20_N12 1 2 2 1 1 DLW21SN900SQ2L_0805_4P~D JAE_FI-TD44SB-VF93-R750~D RV392 1 2 0_0402_5%~D CONN@ 42 41 SN74CB3Q3253PWR_TSSOP16 B 3 6B2 7B2 SEL2 LCD DDC Selector @ RV382 0_0402_5%~D 1 2 A6 A7 +3VS_CAM QV25 SI2301CDS-T1-GE3_SOT23-3~D +LCDVDD_5V 4B2 5B2 HDMI IN (I) UMA TZOUT1+ TZOUT1- +3VS A4 A5 CV295 10U_0805_10V4Z~D 40 LVDS_MUX_TZOUT0+ LVDS_MUX_TZOUT0- 71 70 4B1 5B1 CV294 0.1U_0402_16V4Z~D 37 VGA_LCD_CLK DHMI_IN_NV_CLK EDID_CLK 41 41 LVDS_6038_TZOUT1+ LVDS_6038_TZOUT1- 64 63 UV29 29 LVDS_6038_TZOUT1+ LVDS_6038_TZOUT1- 11 12 2B2 3B2 CV292 0.1U_0402_16V4Z~D DGPU_EDIDSEL# Y CV293 0.1U_0402_16V4Z~D 21,31,36 2 2A 37 37 73 72 A2 A3 D QV26 SSM3K7002F_SC59-3~D S0 40,43 LVDS_MUX_TZOUT1+ LVDS_MUX_TZOUT1- 2B1 3B1 43 CV291 10U_0805_10V4Z~D Deep S3 S1 LVDS_MUX_TZOUT1+ LVDS_MUX_TZOUT1- 76 75 TZOUT2+ TZOUT2- HDMI_IN_SELECT# CV290 0.1U_0402_16V4Z~D GND SN74CB3Q3253PWR_TSSOP16 41 41 LVDS_6038_TZOUT2+ LVDS_6038_TZOUT2- 8 9 2 G S G 8 LVDS_6038_TZOUT2+ LVDS_6038_TZOUT2- 0B2 1B2 QV31 D D ENBKL 15 2OE 1OE INV_PWM ENBKL LVDS_MUX_TZOUT2+ LVDS_MUX_TZOUT2- 37 21 37 78 77 TZCLK+ TZCLK- RV381 100K_0402_5%~D 2 0_0402_5%~D 7 9 41 41 LVDS_MUX_TZOUT2+ LVDS_MUX_TZOUT2- 5 6 CV325 10U_0805_10V4Z~D 1 RV378 SG_AMD_BKL HDMI_IN_PWM_SELECT# 80 79 A0 A1 CV324 0.1U_0402_16V4Z~D 17,43 1A 2A 14 2 RV380 100K_0402_5%~D 1 2B1 2B2 2B3 2B4 2 16 S0 S1 RV379 100K_0402_5%~D DGPU_BKL_EN 37 HDMI_IN_BKL_EN 40 TL_INVT_BL VCC @ RV376 10K_0402_5%~D LVDS_6038_TZCLK+ LVDS_6038_TZCLK- 0B1 1B1 CV289 0.1U_0402_16V4Z~D 10 11 12 13 1B1 1B2 1B3 1B4 LVDS_6038_TZCLK+ LVDS_6038_TZCLK- 2 1 S 29 @ 37 37 LVDS_MUX_TZCLK+ LVDS_MUX_TZCLK- HDMI_IN_SELECT#_R 2 EC_INV_PWM 1 42,43 LVDS_MUX_TZCLK+ LVDS_MUX_TZCLK- 1 1 0_0402_5%~D 41 41 2 @ D +3VS 16 SSM3K7002FU_SC70-3~D 2 0_0402_1% CV288 0.1U_0402_16V4Z~D +3VS RV398 1 HDMI_IN_SELECT# SLE1 2 0_0402_5%~D HDMI_IN_PWM_SELECT# 1 1 RV374 @1 2 @ RV372 HDMI_IN_PWMSEL# 1 DGPU_SELECT# 17 2 UV27 2 LCD Backlight Selector 1 +3VS 1 4 3 5 Link Done Y TXOUT0TXOUT0+ TXOUT1TXOUT1+ TXOUT2TXOUT2+ TXCLKTXCLK+ B TZOUT0TZOUT0+ TZOUT1TZOUT1+ TZOUT2TZOUT2+ TZCLKTZCLK+ INV_PWM DISPOFF# CAM_DET# USB20_P12_CONN USB20_N12_CONN LVDS_CAB_DET# DMIC_CLK DMIC0 I2CC_SDA I2CC_SCL LCD_TEST CAM_DET# 18 LVDS_CAB_DET# 21 DMIC_CLK 45 +3VS_CAM DMIC0 45 LCD_TEST W=60mils +INVPWR_B+ 43 +LCDVDD_5V +3VS +LCDVDD_3V A W=80mils DELL CONFIDENTIAL/PROPRIETARY Compal Electronics, Inc. PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWINGS AND SPECIFICATIONS CONTAINS CONFIDENTIAL, TRADE SECRET, AND OTHER PROPRIETARY INFORMATION OF DELL. ("DELL"). THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 3 2 Title LVDS SW- 6038/SYSTEM & CONN Size Document Number Date: Friday, December 14, 2012 Rev 0.1 LA-9332P Sheet 1 42 of 56 3 2 @ 1 2 1 CLK_PCI_LPC PLT_RST# 21 64 EC_SCI# ACOFF 1 2 EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2_R EC_SMB_DA2_R 19,30,40,53,54 19,30,40,53,54 @ 2 0_0402_5%~D RE75 1 2 0_0402_5%~D RE76 1 EC_SMB_CK2 EC_SMB_DA2 77 78 79 80 EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2 2 0_0402_5%~D PM_SLP_S3#_R 2 0_0402_5%~D PM_SLP_S5#_R EC_SMI# 21 EC_SMI# PS_ID 57 PS_ID EC_ESB_CLK_R @ T182 PAD~D EC_ESB_DAT @ T183 PAD~D SUSPWRDNACK 17 SUSPWRDNACK 54 MXM2_FAN_PWM SYSTEM_FAN_FB 54 SYSTEM_FAN_FB MXM1_FAN_FB 54 MXM1_FAN_FB E51TXD_P80DATA 50 E51TXD_P80DATA E51RXD_P80CLK 50 E51RXD_P80CLK PCH_PWROK 17 PCH_PWROK 1 WLES ON/OFF LED# 2 EC_GPIO19 RE83 SG_AMD_BKL 0_0402_5%~D 17,42 SG_AMD_BKL 17,47 17,47 51,53 Reserve for EMI please close to UE1 WLES ON/OFF LED# PM_SLP_S3# PM_SLP_S5# RE77 1 RE78 1 48 122 123 KSI0/GPIO30 KSI1/GPIO31 KSI2/GPIO32 KSI3/GPIO33 KSI4/GPIO34 KSI5/GPIO35 KSI6/GPIO36 KSI7/GPIO37 KSO0/GPIO20 KSO1/GPIO21 KSO2/GPIO22 KSO3/GPIO23 KSO4/GPIO24 KSO5/GPIO25 Int. K/B KSO6/GPIO26 Matrix KSO7/GPIO27 KSO8/GPIO28 KSO9/GPIO29 KSO10/GPIO2A KSO11/GPIO2B KSO12/GPIO2C KSO13/GPIO2D KSO14/GPIO2E KSO15/GPIO2F KSO16/GPIO48 KSO17/GPIO49 EC_SMB_CK1/GPIO44 EC_SMB_DA1/GPIO45 SM EC_SMB_CK2/GPIO46 EC_SMB_DA2/GPIO47 PM_SLP_S3#/GPIO04 PM_SLP_S5#/GPIO07 EC_SMI#/GPIO08 GPIO0A GPIO0B GPIO0C GPIO0D EC_INVT_PWM/GPIO11 FAN_SPEED1/GPIO14 EC_PME#/GPIO15 EC_TX/GPIO16 EC_RX/GPIO17 PCH_PWROK/GPIO18 SUSP_LED#/GPIO19 NUM_LED#/GPIO1A XCLKI/GPIO5D XCLKO/GPIO5E 1 H_PROCHOT# RE80 2 0_0402_1% VR_HOT# EC_MUTE#/GPIO4A USB_EN#/GPIO4B CAP_INT#/GPIO4C EAPD/GPIO4D TP_CLK/GPIO4E TP_DATA/GPIO4F PS2 Interface CPU1.5V_S3_GATE/GPXIOA00 WOL_EN/GPXIOA01 ME_EN/GPXIOA02 VCIN0_PH/GPXIOD00 GPIO Bus GPIO ENBKL/AD6/GPIO40 PECI_KB930/AD7/GPIO41 FSTCHG/GPIO50 BATT_CHG_LED#/GPIO52 CAPS_LED#/GPIO53 PWR_LED#/GPIO54 BATT_LOW_LED#/GPIO55 SYSON/GPIO56 VR_ON/GPIO57 PM_SLP_S4#/GPIO59 EC_RSMRST#/GPXIOA03 EC_LID_OUT#/GPXIOA04 PROCHOT_IN/GPXIOA05 H_PROCHOT#_EC/GPXIOA06 VCOUT0_PH/GPXIOA07 GPO BKOFF#/GPXIOA08 PBTN_OUT#/GPXIOA09 PCH_APWROK/GPXIOA10 SA_PGOOD/GPXIOA11 AC_IN/GPXIOD01 EC_ON/GPXIOD02 ON/OFF/GPXIOD03 GPI LID_SW#/GPXIOD04 SUSP#/GPXIOD05 GPXIOD06 PECI_KB9012/GPXIOD07 62 2 H_PROCHOT#_EC G SSM3K7002F_SC59-3~D 68 70 71 72 RE68 2 M_THERMAL# EC_ENVDD LCD_TEST 83 84 85 86 87 88 EC_MUTE# IMVP_PWRGD LCD_BKL_EN 97 98 99 109 CPU1.5V_S3_GATE EN_WOL# HDA_SDO VCIN0_PH CPU1.5V_S3_GATE EN_WOL# 44 HDA_SDO 16 VCIN0_PH 57 119 120 126 128 PWRSHARE_EN_EC# PWRSHARE_OE# PWRSHARE_EN_EC# PWRSHARE_OE# VPK_EN 53 3V_F347_ON 47 57,64 RE63 2 RE64 2 1 ECAGND 100P_0402_50V8J~D ENBKL V18R ODD_EJECT# 12,13,14,15 33 42 100 101 102 103 104 105 106 107 108 PCH_RSMRST# VCIN1_PH H_PROCHOT#_EC VCOUT0_PH# BKOFF# PBTN_OUT# PCH_PWR_EN VPK_DET# PCH_RSMRST# MXM2_FAN_FB VCIN1_PH 57 +3VALW_EC RE52 1 2 20mil KB9012QF-A4_LQFP128_14X14 +3VLP 52 AD_BID0 HDMI_MONITOR PCIE_WAKE# 45 17,44,51 PM_SLP_S4# BOARD ID Table Board ID 21,6 HDMI_TOGGLE EC_ESB_CLK 1 HDMI_TOGGLE 2 RST# 3 EC_ESB_DAT 4 DEPOP#_EC 5 42 HDMI_IN_SELECT# HDMI_IN_SELECT# 6 37 HDMI_IN_CAB_DET# HDMI_IN_CAB_DET#7 56 DGPU_PWR_EN 8 9 VR_ON 10 MXM2_PCH_PWR_ON 11 HDMI_IN_OUT_DDC 2 1 3 2 Rb 0 0.2 (PT) 8.2K +/- 5% 0.3 (ST) 18K +/- 5% 0.4 (QT) 33K +/- 5% 56K +/- 5% 1.0 (MP) 100K +/- 5% B TH_OVERT# ESB_CLK GPIO00 1 2 TH_OVERT#_EC 0_0402_5%~D RE79 TEST_EN# GPIO08/CAS_DAT RST# GPIO09 ESB_DAT GPIO0A GPIO01 GPIO0B GPIO02 GPIO0C/PWM0 GPIO03 GPIO0D/PWM1 GPIO04 GPIO0E/PWM2 GPIO05 GPIO0F/PWM3 GPIO06 GPIO07/CAS_CLK GND KC3810_QFN24_4X4 1 1 2 S USBCHG_DET_PWR_EN# 2 G PCB Revision 0.1 (SSI) 0 1 2 3 4 5 6 7 * 12 USBCHG_DET_D CE46 0.1U_0402_16V4Z~D 17 17 54 RE86 100K_0402_5%~D D 1 2 GPIO10/ESB_RUN# GPIO11/BaseAddOpt VCC 13 PAD~D 14 15 58 HDMI_SW HDMI_SW 16 18 @ 35 35 MXM_RST 17 17 MXM2_EC_RST# EC_INV_PWM EC_INV_PWM 42 HDMI_IN_EN 37 19 20 TH_OVERT#_EC 21 DP_MXM_CARD_SEL 22 DP_MXM_CARD_SEL EC_AC_BAT# 23 EN_CAM 24 30 31 29 42 +3VALW_EC 1 2 QE321 SSM3K7002FU_SC70-3~D T181 HDMI_IN_OUT_HPD_EC CE50 0.1U_0402_16V4Z~D RE87 100K_0402_5%~D Rb RE70 UE2 35 A RE67 100K_0402_5%~D Ra PCH_PWR_EN H_PROCHOT#_EC need add 30 100K_0402_5% S 2 G C 52 29 29,30 2 45 +3VALW_EC Please place RE74 close to EC with in 750mil 37 VPK_EN D Board ID +V18R 1 DEPOP# DEPOP# 10 124 1 VL 2 QE21 @ 1100P_0402_50V8J~D CE47 2 ACIN ACIN 17,29,47,57,64 EC_ON EC_ON 58 ON/OFF ON/OFF 55 LID_SW_IN# LID_SW_IN# 19,45,47,48,53 SUSP# SUSP# 10,56,59,60,61 USB_PWR_EN# USB_PWR_EN# 52,53 2 43_0402_1% EC_PECI RE74 1 H_PECI 2 10K_0402_5%~D PCH_PWROK 2 @ 1 RE62 50 110 112 114 115 116 117 118 USBCHG_DET_EC# RE71 1 57,64 17 VCOUT0_PH# 58 BKOFF# 40,42 PBTN_OUT# 17,6 PCH_PWR_EN 56 VPK_DET# 53 1 RE85 10K_0402_5%~D 1 2 57 BATT_TEMP PM_SLP_SUS# EAPD# 45 EC_MUTE# 45 IMVP_PWRGD 17,6,62 LCD_BKL_EN 33 EC_LID_OUT# 19 TP_CLK 53 TP_DATA 53 RE114 1 2 0_0402_5%~D HDMI_MONITOR_EC 2 0_0402_1% PCIE_WAKE#_EC RE82 1 @ PCH_DPWROK PCH_DPWROK 17 BATT_CHG_LED# BATT_CHG_LED# 47 CAPS_LED# CAPS_LED# 53 Power_LED# 53 BATT_LOW_LED# BATT_LOW_LED# 47 SYSON SYSON 56,59,60 IMVP_VR_ON IMVP_VR_ON 62 1 2 PM_SLP_S4#_R RE81 @ 0_0402_1% 73 74 89 90 91 92 93 95 121 127 BKOFF# D 40,42 1 0_0402_5%~D M_THERMAL# EC_ENVDD LCD_TEST TP_CLK TP_DATA 2 100K_0402_5% Reserve for EMI please close to UE2 ECAGND 1 0_0402_5%~D 1 0_0402_5%~D @ RE72 1 2 0_0402_1% QE22 3 USBCHG_DET# ADP_I 54 54 2 CE42 LE44 FBMA-L11-160808-800LMT_0603 DE83 BAT54CW_SOT323-3 52 SPIDI/GPIO5B SPIDO/GPIO5C SPICLK/GPIO58 SPICS#/GPIO5A SPI Flash ROM 1 D S 3 BATT_TEMP EAPD#_R ADP_I AD_BID0 USBCHG_DET_EC# ENBKL SPI Device Interface 2 ECAGND H_PROCHOT# 63 64 65 66 75 76 EN_TPLED# 48 BEEP# 45 SYSTEM_FAN_PWM MXM1_FAN_PWM 1 DEPOP#_EC DAC_BRIG/GPIO3C EN_DFAN1/GPIO3D IREF/GPIO3E CHGVADJ/GPIO3F DA Output @ 57,6 67 AD CLK_PCI_EC PCIRST#/GPIO05 EC_RST# EC_SCII#/GPIO0E GPIO1D 11 24 35 94 113 KP_DET# ADP_SEL BATT_TEMP/AD0/GPIO38 AD1/GPIO39 ADP_I/AD2/GPIO3A Input AD3/GPIO3B AD4/GPIO42 IMON/AD5/GPIO43 EN_TPLED# BEEP# SYSTEM_FAN_PWM MXM1_FAN_PWM CE48 4.7U_0805_10V4Z~D 57 B 6 14 15 16 17 18 19 25 28 29 30 31 32 34 36 PWM Output 21 23 26 27 1 RE41 18K_0402_5%~D 29,57,64 29,57,64 37 37 CE45 22P_0402_50V8J~D 2 55 56 57 58 59 60 61 62 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 81 82 GPIO0F BEEP#/GPIO10 GPIO12 ACOFF/GPIO13 2 RE65 10K_0402_5%~D RE66 @ 33_0402_5%~D C 12 13 37 20 38 KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17 CLK_PCI_LPC 1 CLK_PCI_LPC PLT_RST# EC_RST# EC_SCI# ACOFF GATEA20/GPIO00 KBRST#/GPIO01 SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC & MISC LPC_AD0 EC_VDD/AVCC 18 17,44,51,53,6 1 2 3 4 5 7 8 10 Reserved for KB9012 AGND/AGND 2 GATEA20 KB_RST# SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0 EC_VDD/VCC EC_VDD/VCC EC_VDD/VCC EC_VDD/VCC EC_VDD0 EC_VDD/VCC GATEA20 KB_RST# SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0 69 KSO[0..17] KSO[0..17] 21 21 19 GND/GND GND/GND GND/GND GND/GND GND0 2 1 2 KSI[0..7] KSI[0..7] 19,51 19,51 19,51 19,51 19,51 0_0402_1% 4.7K_0402_5%~D SSM3K7002FU_SC70-3~D 48,53 1 UE1 RST# CE44 .1U_0402_16V7K~D 48,53 2 EC_ESB_CLK_R 0_0402_1% @ +3VALW_EC CE43 0.1U_0402_16V4Z~D 1 EC_ESB_CLK RE61 EC_SMB_CK1 +3VALW_EC EC_SMB_DA1 EC_MUTE# EC_SMI# DEPOP# EC_ESB_CLK EC_ESB_DAT LID_SW_IN# EN_WOL# EAPD#_R WLES ON/OFF LED# EC_RST# 2 @ 2.2K_0402_5%~D 2.2K_0402_5%~D 10K_0402_5%~D 10K_0402_5%~D 100K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 10K_0402_5%~D 10K_0402_5%~D 10K_0402_5%~D 100K_0402_5%~D 1 2 2 2 1 2 2 2 2 1 2 2 @ RE56 47K_0402_5%~D 1 1 1 2 1 1 1 1 2 1 1 RE55 47K_0402_5%~D RE46 RE48 RE51 RE39 RE53 RE54 RE57 RE58 RE59 RE60 RE73 9 22 33 96 111 125 RE47 D +3VLP TP_DATA 1 1 @ RE40 33_0402_5%~D 2 1 1000P_0402_50V7K 0.1U_0402_16V7K CE33 ECAGND 1 2 1 1 RE35 2 2 0.1U_0402_16V7K RE44 0_0402_5% 1000P_0402_50V7K 2 1 2 0.1U_0402_16V7K CE36 4.7K_0402_5%~D 2 2 +3VALW_EC 2 TP_CLK 1 0_0805_5%~D GND RE37 +5VS EC_ESB_CLK LE3 FBMA-L11-160808-800LMT_0603 1 2 +EC_VCCA +3VALW_EC 0.1U_0402_16V7K 0.1U_0402_16V7K 1 1 1 1 2 CE35 CE31 CE32 CE34 CE37 2 2 1 @ 1 @ +3VALW 2 BKOFF# EC_SCI# M_THERMAL# EC_SMB_CK2 EC_SMB_DA2 VPK_DET# 22P_0402_50V8J~D CE39 10K_0402_5%~D 10K_0402_5%~D 10K_0402_5%~D 2.2K_0402_5%~D 2.2K_0402_5%~D 100K_0402_5% @ 2 2 2 2 2 2 @ 1 1 1 1 1 1 1 1 www.laptopblue.vn +3VS RE36 RE38 RE42 RE43 RE45 RE69 2 3 4 25 5 60 mil A RE88 150K_0402_1%~D Compal Secret Data 1 Security Classification Issued Date 2012/05/28 Deciphered Date 2013/05/27 Title Compal Electronics, Inc. EC ENE-KB9012QF,KC3810 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.1 LA-9332P Date: 5 4 3 2 Friday, December 14, 2012 1 Sheet 43 of 56 5 4 3 2 1 UL1 2 CL1 2 CL4 20 2 PCIE_PTX_GLANRX_N1 18 CLK_PCIE_LAN# 18 PCIE_WAKE# 17,43,51,53,6 CLKREQ_LAN#_R 2 RL12 LANCLK_REQ# PLT_RST# 17,43,51 PCIE_PTX_GLANRX_N1 36 CLK_PCIE_LAN 33 CLK_PCIE_LAN# 32 1 CLKREQ_LAN#_R 0_0402_5%~D PLT_RST# 1 5 2 TRXP0 TRXN0 TRXP1 TRXN1 TRXP2 TRXN2 TRXP3 TRXN3 SMCLK SMDATA NC TESTMODE GND XTLI XTLO LX ISOLAT# PPS 38 39 23 LED_0 LED_1 LED_2 RL29 5.1K_0402_1%~D RBIAS 1 40 10 +RBIAS 1 RL14 2 2.37K_0402_1%~D W=20mils CL29 CL53 2 2 1 2 1 CL30 2 1 CL31 2 1 CL32 2 CL33 1 CL26 2 close to Lan pin34 close to Pin 16 C +DVDDL 1 1U_0402_6.3V6K~D 2 1 0.1U_0402_16V7K~D CL28 2 1 0.1U_0402_16V7K~D CL35 1 0.1U_0402_16V7K~D 2 W=20mils close to Lan pin19 2 close to Lan pin9 close to Lan pin13 1 CL34 2 1 CL39 close to Lan pin22 1 CL27 2 2 close to Lan pin37 2 1 1.5M_0402_5%~D 1 D 24 4.7U_0603_6.3V6K~D 2 1 CL41 1U_0402_6.3V6K~D 2 1 CL50 0.1U_0402_16V7K~D 2 1 CL25 10U_0603_6.3V6M~D 2 1 CL24 10U_0603_6.3V6M~D 1 CL23 close to Pin 1 QL2 SSM3K7002FU_SC70-3 RL19 S 1 3 +DVDDL LAN_MDIP0 LAN_MDIN0 LAN_MDIP1 LAN_MDIN1 LAN_MDIP2 LAN_MDIN2 LAN_MDIP3 LAN_MDIN3 +AVDDH 1 close to Lan pin6 1 37 11 12 14 15 17 18 20 21 +AVDDL 1U_0402_6.3V6K~D 2 0.1U_0402_16V7K~D 1 CL22 EN_WOL D 2 G +AVDDH close to Lan pin31 1000P_0402_50V7K~D 2 2 22 9 S IC E2201-BL3A-R QFN 40P E-LAN CTRL 1U_0402_6.3V6K~D CL54 D G 1 +AVDDL 1 470P_0402_50V7K CL52 15P_0402_50V8J~D 4 25MHZ_10PF_7V25000014 GND OSC 2 GND OSC 2 2 30K_0402_5% LAN_ACTIVITY# LAN_LINK#_R LAN_LED2#_R 1A RL17 470K_0402_5%~D 2 DVDDL_REG +LAN_IO 3 2 +LAN_IO 13 19 31 34 6 W=20mils 4 CL21 EN_WOL# CL55 2 1 W=40mils 1 16 WAKE# W=40mils S 6 5 2 1 1 +3VALW 43 PERST# QL1 FDC655BN_NL_SSOT6~D +3VALW RL18 10K_0402_5%~D 3 2 1 0_0402_5% 1 15P_0402_50V8J~D ç›´ç›´Short del W=40mils 1 2 CL51 1 RL13 +LAN_IO 8 7 AVDDH AVDDH_REG CLKREQ# 28 27 41 YL1 B+_BIAS REFCLK_N 25 26 RL28 CL20 1U_0402_6.3V6K~D REFCLK_P 3 XTLI XTLO AVDDL AVDDL AVDDL AVDDL AVDDL_REG RX_N 2 The pull-up resisters might not be necessory due to existence on PCH side. C RX_P 4 PCIE_WAKE# PCIE_WAKE# 35 0.1U_0402_16V7K~D 4.7K_0402_5%~D D CLK_PCIE_LAN 18 PLT_RST# VDD33 AVDD33 TX_N 0.1U_0402_16V7K~D 4.7K_0402_5%~D 2 @ 1 RL10 2 1 RL11 2 @ 1 RL15 TX_P 29 1U_0402_6.3V6K~D 4.7K_0402_5%~D 30 www.laptopblue.vn PCIE_PTX_GLANRX_P1 20 1 PCIE_PRX_GLANTX_P1_C 0.1U_0402_16V7K~D 1 PCIE_PRX_GLANTX_N1_C 0.1U_0402_16V7K~D PCIE_PTX_GLANRX_P1 0.1U_0402_16V7K~D PCIE_PRX_GLANTX_N1 1U_0402_6.3V6K~D PCIE_PRX_GLANTX_P1 20 0.1U_0402_16V7K~D RL7 0_0402_5%~D 0.1U_0402_16V7K~D 20 1 +LAN_IO CL36 0.1U_0402_25V6 2 JLAN1 2 RL26 +LAN_IO B TL1 TCT3 TD3+ TD3TCT4 TD4+ TD4- MCT3 MX3+ MX3MCT4 MX4+ MX4- 21 20 19 RJ45_CT2 RJ45_MDI2+ RJ45_MDI2- 18 17 16 RJ45_CT1 RJ45_MDI1+ RJ45_MDI1- 15 14 13 RJ45_CT0 RJ45_MDI0+ RJ45_MDI0- RL22 1 2 75_0402_1%~D +LAN_IO RL23 1 2 75_0402_1%~D RL25 1 2 75_0402_1%~D 1 LAN_MDIP0 LAN_MDIN0 10 11 12 MCT2 MX2+ MX2- RJ45_CT3 RJ45_MDI3+ RJ45_MDI3- QL3 2N7002_SOT23 RL27 1 2 75_0402_1%~D 3 1 1 2 RL21 +LAN_IO G 2 350UH_GST5009-CLF TIMAG: S X'FORM_ IH-160 LAN , SP050006F00 BOTHHAND: S X'FORM_ GST5009-D LF LAN,SP050006B00 RL30 1K_0402_1%~D 2 LAN_MDIP1 LAN_MDIN1 7 8 9 TCT2 TD2+ TD2- 24 23 22 LAN_LINK#_R CL40 150P_1808_3KV7K~D 2 4 5 6 MCT1 MX1+ MX1- D LAN_MDIP2 LAN_MDIN2 TCT1 TD1+ TD1- S LAN_MDIP3 LAN_MDIN3 1 2 3 +VDDCT_L LAN_LED2#_R LAN_ACTIVITY# 9 1 330_0402_5% RJ45_MDI3- 10 8 RJ45_MDI3+ 7 RJ45_MDI1- 6 RJ45_MDI2- 5 RJ45_MDI2+ 4 RJ45_MDI1+ 3 RJ45_MDI0- 2 RJ45_MDI0+ 1 CONN@ Yellow LEDYellow LED+ B PR4PR4+ PR2PR3PR3+ PR2+ PR1- SHLD2 PR1+ SHLD1 15 14 1 11 LAN_LINK# Green LED130_0402_1%~D 2 1 0_0402_5%~D 12 LED+ RL24 2 1 LAN_LED2# 13 ORANGE_LEDRL20 CL38 130_0402_1%~D TYCO_2041332-1 1 2 2 1 470P_0402_50V7K 2 470P_0402_50V7K 1 CL49 CL48 @ 1 0.1U_0402_16V7K~D 2 2 1000P_0402_50V7K~D 1 CL47 CL46 @ 1 0.1U_0402_16V7K~D 2 2 1000P_0402_50V7K~D 1 CL45 CL43 CL44 @ 1 0.1U_0402_16V7K~D 2 2 1000P_0402_50V7K~D 1 1 0.1U_0402_16V7K~D CL42 @ 1000P_0402_50V7K~D CL37 2 A A Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2012/05/14 Deciphered Date 2013/05/13 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Title GLAN AR8151 AL1A/ RJ45 Size 5 4 3 2 Document Number Rev 0.1 LA-9332P Date: Friday, December 14, 2012 Sheet 1 44 of 56 A B D 1 SURR-R SURR-L CEN LFE CBP CBN JDREF LDO-CAP VREF VRP FRONT-R FRONT-L 1 2 SPDIF-OUT SPDIF-in CPVEE REGREF CA23 28 22 42 49 GPIO/DMIC-CLK GPIO1/DMIC-DATA GPIO2/Combo-Jack1 GPIO3/Combo-Jack2 CPVREF AVSS1 AVSS2 Thermal PAD EAPD 27 26 19 18 HP1_A_R HP1_A_L HP2_D_L HP2_D_R 44 43 2 10K_0402_1% 2 HPOUT2-JD 10K_0402_1% 2 HPOUT-JD 5.1K_0402_1% 1 I2S_DAT/SPDIF_IN DMIC_CLK DMIC0 GPIO2 37 +RTC_CELL 14 EAPD# ESD RA50 1 RA52 1 RA53 1 CONN@ HDMI_MONITOR 43 @ 43 SLEEVE Place closely to Pin 33. HPOUT-JD RA16 2.49K_0402_1%~D 2 1 @ RA15 0_0402_5%~D 5 QA109B DMN66D0LDW-7_SOT363-6~D 1 2 2 +3VS RA18 100K_0402_5%~D Place under codec 2 0_0402_5%~D 2 0_0402_5%~D 2 0_0402_5%~D RA26 1 2 0_1206_5%~D RA29 1 2 0_1206_5%~D RA32 GND G2 G4 G6 TYCO_2041301-1~D 2 2 0.1U_0402_16V7K G1 G3 G5 2 10U_0805_10V4Z~D 19,43,47,48,53 +3.3V_AVDD 42 6 CA83 1 @ 1 CA114 LID_SW_IN# +3VALW 24 26 28 +3VLP 42 1 2 0_1206_5%~D +3VS 2 RA21 1 10K_0402_1% 2 2 QA109A 16,45 PCH_AZ_CODEC_RST# RA24 2 @ 1 10K_0402_1% 1 2 0.1U_0402_16V7K 23 25 27 46 46 ALC3661-CG_MQFN48_6X6~D CA84 1 3 RA22 10K_0402_5%~D INT-SPK-R INT-SPK-L 15 16 12 13 17 3 1 RA23 1 RA11 1 RA12 2 MIC_B_PLUG# 39.2K_0402_1% HP2_D_L HP2_D_R MIC2-VREFO-L MIC2-VREFO-R 2 4 6 8 10 12 14 16 18 20 22 1 SENSE A SENSE B 34 1 33 RA9 QA10 SSM3K7002FU_SC70-3~D 1 3 5 7 9 11 13 15 17 19 21 LINE_B_L_R LINE_B_R_R LINE2-VREFO HP_MUTE# MIC_B_PLUG# HPOUT-JD_B HPOUT2-JD CA60 0.1U_0402_10V7K~D 2 2 10U_0805_10V4Z~D RING2 SLEEVE 2 4 6 8 10 12 14 16 18 20 22 1 2 1 CA13 HP1_A_L HP1_A_R 45 45 2 20 10 CA22 1 MIC2-R MIC2-L 1 1 3 5 7 9 11 13 15 17 19 21 3 24 21 35 40 41 38 MIC2-VREFO LINE2-VREFO MIC1-VREFO CA20 100U_B3_6.3VM_R55M 2 LINE_B_R_R 22U_A_6.3VM_R180M JAUDIO 46 5 QA108A DMN66D0LDW-7_SOT363-6~D DMN66D0LDW-7_SOT363-6~D 4 1 LINE_B_L_R 22U_A_6.3VM_R180M 2 +3.3V_AVDD 1 1U_0603_16V6K~D 1 1U_0603_16V6K~D INT-SUB-SPK SLEEVE 45 RING2 45 6 1 29 30 1 + 37 36 48 47 2 2 1 2 CA19 MIC1-R MIC1-L/MIC-CAP MIC2-R MIC2-L 2 PC_BEEP 0.1U_0402_10V6K~D 2 1 2 1 1U_0402_6.3V6K~D 2.2U_0402_6.3V6M~D 2 CA18 SDATA-IN SDATA-OUT BCLK SYNC RESETB CA119 CA118 1 10U_0805_10V4Z~D 0.1U_0402_10V6K~D 10U_0805_10V4Z~D 20K_0402_1%~D 2 8 4 5 9 6 1 CA5 3 2 RA6 22_0402_5% 1 2 2 22_0402_5% CA15 DVDD DVDD-IO DVDD-IO-CP 2 46 45 32 31 4 1 11 7 25 1 2 CA16 1U_0402_6.3V6K~D 1 CA17 LINE1-R LINE1-L LINE2-IN-R/SLEEVE LINE2-IN-L/RING2 S 2 22P_0402_50V8J~D MIC2-VREFO-L LINE2-VREFO MIC2-VREFO-R RA14 PCBEEP HVDD LDO-IN CA12 D 1 2 1 UA8 23 39 2 G RA8 1 2 PCH_AZ_CODEC_SDIN0 16 PCH_AZ_CODEC_SDOUT 16 PCH_AZ_CODEC_BITCLK 16 PCH_AZ_CODEC_SYNC 16,45 PCH_AZ_CODEC_RST# 1 CA24 1 1 2 100K_0402_5%~D 2 MIC2-L MIC2-R RA63 CA11 2 0_0402_5% 2 0_0402_5% 2 0_0402_5% 1 +3.3V_DVDD H CA21 1 CA10 0.1U_0402_10V6K~D 2 10U_0805_10V4Z~D 0.1U_0402_10V6K~D 1 1 G www.laptopblue.vn 2 2 1 1 1 RA2 RA3 RA4 CA4 +3.3V_DVDD CA9 CA1 0.1U_0402_10V6K~D 4.7U_0805_25V6-K 0.1U_0402_10V6K~D 10U_0805_10V4Z~D 1 CA3 2 1 LA1 FBMA-L11-201209-221LMA30T_0805 2 CA8 F +3.3V_AVDD RA65 1 CA2 1 2 2 2 +3.3V_DVDD 4.7U_0805_25V6-K 2 0_0805_5%~D 16 E +3.3V_DVDD 0.1U_0402_10V6K~D 1 RA1 1 C Close to Pin39 100K_0402_5%~D +5VS +3.3V_DVDD +3VS JACK_SENSE# QA108B DMN66D0LDW-7_SOT363-6~D 1 2 @ CA61 0.1U_0402_25V6K~D Add for solve pop noise and detect issue AGND GND AGND JACK_PLUG Delay cricutis +3.3V_DVDD +3.3V_AVDD +3VS 1 SPK_MUTE# 3 RA66 0_0402_5%~D 1 2 SPK_MUTE# EC_MUTE# EC_MUTE# QA4A DMN66D0LDW-7_SOT363-6 2 RA10 HPOUT-JD_B 1 1 5 100K_0402_5% 2 2 1 1 10K_0402_1% 1 AMP_RIGHT_C 43 16 1 CA40 CA7 10U_0603_6.3V6M RA64 2 1 0.1U_0402_16V4Z~D 2 BEEP# 1 CA38 2 BEEP_C# 0.1U_0402_16V4Z~D 1 RA59 2 100K_0402_5%~D HDA_SPKR 1 CA39 2 PCH_SPKR_C 0.1U_0402_16V4Z~D 1 RA61 2 100K_0402_5%~D RA60 0_0402_5%~D 1 2 1 CA58 CA6 10U_0603_6.3V6M 2 @ HPOUT-JD_B 2 0.1U_0402_16V4Z~D 1 RA96 2 100K_0402_5%~D 0_0402_5% 2 1 RA19 JACK_SENSE# Reserve for cancel Delay cricutis 1 HDMI_IN_AUDIO_CODEC 2 PC_BEEP RA62 @ 10K_0402_5%~D 37 DMN66D0LDW-7_SOT363-6 1K_0402_1%~D 2 46 3 QA4B RA20 43 4 46 2 2 JACK_SENSE# RA7 100K_0402_5% 6 2 1 CA35 10U_0603_6.3V6M~D 2 1 CA37 0.1U_0402_10V6K~D 2 1 CA59 0.1U_0402_10V6K~D 2 1 CA31 10U_0603_6.3V6M~D 2 1 CA30 0.1U_0402_10V6K~D 2 1 CA29 0.1U_0402_10V6K~D 2 1 CA28 0.1U_0402_10V6K~D 3 CA27 0.1U_0402_10V6K~D 1 +3.3V_DVDD Need double check this pin 2 RB751V40_SC76-2 DA11 2 1 RA17 10K_0402_1% 1 HP_MUTE# EAPD# DA10 3 DEPOP# 2 GPIO2 DEPOP# 43 1 4 4 BAT54AW_SOT323-3~D Compal Secret Data Security Classification Issued Date 2012/05/14 Deciphered Date 2013/05/13 Title Compal Electronics, Inc. HD Audio ALC3661 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.1 LA-9332P Date: A B C D E F G Friday, December 14, 2012 Sheet 45 H of 56 5 4 CA88 1 2 1 SPK_CD_R 1U_0603_25V6K CA79 1 2 2 2 1U_0402_6.3V6K~D RA85 GAIN0 AV(inv) INPUT IMPEDANCE 0 20dB 60Kohm 0 1 26dB 30Kohm RA94 100K_0402_1% 1 0 32dB 15Kohm 1 1 36dB 9Kohm 1 0 GIN1 5 GIN1 6 1 EAPD_R 1 SPK_MUTE# RA88 0_0402_5% 2 GIN0 1 RA97 OUTNR BSNR GAIN0 PBTL GAIN1 PLIMIT SD# 2 2 0_0402_5% 13 29 2 2 2 1 2 2 1 1 AMP_RIGHT_C 12 RINP CA81 2 11 1U_0402_6.3V6K~D RINN GVDD FAULT# PGND PGND AGND NC GND LA9 HCB2012KF-121T50_0805 1 2 20mil CA43 SPK_L2+_CONN 2 SPK_L1-_CONN 2 1000P_0402_50V7K 1 5A/120ohm/100MHz 22 BSNL 1 2 17 BSPR 1 2 CA75 0.22U_0603_25V7K CA77 0.22U_0603_25V7K 18 20 21 LA11 HCB2012KF-121T50_0805 1 2 OUTNL OUTNR 1 BSNR PLIMIT 9 +GVDD LA12 HCB2012KF-121T50_0805 1 2 OUTPR +GVDD CA45 D SPK_R2+_CONN 2 SPK_R1-_CONN 2 1000P_0402_50V7K 1 5A/120ohm/100MHz RA86 51K_0402_1% LA13 HCB2012KF-121T50_0805 1 2 OUTNR CA46 1000P_0402_50V7K 1 5A/120ohm/100MHz EMI JSPK1 +GVDD 24 19 8 1000P_0402_50V7K 1 2 14 10 CA44 5A/120ohm/100MHz OUTPR CA82 0.22U_0603_25V7K RA90 100K_0402_5% RA93 100K_0402_1% BSPR Int. Speaker Connector OUTPL CA86 1U_0603_25V6K 1 +5VS GIN0 OUTNL CA85 1U_0603_25V6K 45,46 GAIN1 LINN OUTPR RA87 100K_0402_5% @ 1 2 +3VALW TPA3113 for Speaker @ RA92 100K_0402_1% 23 1 10.7K_0402_5% @ RA91 100K_0402_1% OUTPL LINP 2 4 1U_0402_6.3V6K~D AMP_RIGHT_C 2 1 RA98 1 5.76K_0402_5% 12.4K_0402_1% 3 25 2 INT-SPK-R 45 AMP_LEFT_C BSNL CA74 0.22U_0603_25V7K 2 1 2 RA84 45 2 1U_0402_6.3V6K~D RA99 CA76 1 2 1 5.9K_0402_5% 2 RA83 OUTPL OUTNL 1 BSPL 1 2 3 4 SPK_L2+_CONN SPK_L1-_CONN SPK_R2+_CONN SPK_R1-_CONN 1 10.7K_0402_5% 1 PVCCR PVCCR PVCCL PVCCL 26 1 1 SPK_CD_L 1U_0603_25V6K BSPL 1 2 AVCC 2 CA87 1 INT-SPK-L 7 15 16 27 28 RA89 10K_0402_1% 1 2 3 4 5 6 G5 G6 MOLEX_53398-0471 2 CA78 CA73 2 13.3K_0402_1% 1 +PAVDD +PVDD 2 RA82 45 1 www.laptopblue.vn 2 10_0402_1% Close to UA2 Pin7,15,16,27,28 D 2 UA9 +PVDD 1 RA116 1 1U_0603_25V6K CA72 CA67 0.1U_0402_16V7K 1U_0603_25V6K CA71 2 1 2 1U_0603_25V6K CA70 2 1 2 +PVDD 1U_0603_25V6K CA69 2 1 1 3 40mil 10U_0805_25V6K CA66 10U_1206_25V6M 1 1 Close to LA9 2 B+_BIAS 1U_0603_25V6K CA68 2 1 LA10 FBMA-L11-160808-121LMA30T_0805 1 2 TPA3113D2PWPR_HTSSOP28 RA54 1 2 0_0402_5%~D C C Speaker amp impedance of JBL is 4 ohm. B+_BIAS 1 RA95 2 0_0402_5% 14 1 SPK_MUTE# 2 3 RA117 1 2 9.31K_0402_1% 1 2 10,5K_0402_1% 2 4.99K_0402_1% 1 RA101 1 CA133 1 CA134 1 B+_BIAS 2 0.1U_0402_25V6 2 0.1U_0402_25V6 1 2 RA113 10_0402_1% B CA135 0 0 20 60 0 1 26 30 2 1 RA114 45.3K_0402_1% 7 1 2 10U_1206_25V6 2 10U_1206_25V6 CA128 10U_1206_25V6 CA127 10U_1206_25V6 CA126 CA123 27 28 15 16 1 26 EMI 1 OUTPL 25 2 INPL INNL TPA3110D1 OUTNL 23 INPR INNR BSNL AVCC BSNR 2 22 1 2 RA110 10_0402_1% 1 LA14 2 FBM-11-160808-601-T_0603 2 CA130 330P_0402_50V7K~D 1000P_0402_50V7K CA41 1 W=40mil 21 JWFER1 1 2 SUB_L+ SUB_R- 8 AGND OUTNR GAIN01 5 GAIN11 6 20 1 CA132 BSPR GAIN0 GAIN1 NC CA131 330P_0402_50V7K~D 18 GVDD PLIMIT 1 LA15 17 13 1 RA111 2 10_0402_1% 3 4 2 FBM-11-160808-601-T_0603 2 1 1 2 B G G MOLEX_53398-0271~D CONN@ CA42 1000P_0402_50V7K 2 0.47U_0402_6.3V6K TPA3111D1PWPR_TSSOP28~D GAIN11 RA108 0_0402_5% 1 1 RA107 0_0402_5% RA106 @ 2 W=40mil 10 1 GAIN01 RA115 10K_0402_5% 2 RA105 @ 100K_0402_1% 2 1 9 2 15 36 100K_0402_1% 2 1 32 1 2 0 1 FAULT# OUTPR CA136 1U_0603_25V6K 1 11 9 B+_BIAS 1 CA129 0.47U_0402_6.3V6K PGND PGND GND GAIN(dB) 1 G0 2 Input Impedance (Rl) (Kohm) G1 12 10U_0805_25V6K Woofer Amp Table 2 2 RA118 1 1 INT-SUB-SPK 2 2 INT-SUB-SPK BSPL 19 24 29 45 SD# 1 1 0_1206_5% 1 4 PBTL PVCC PVCC B+_BIAS 45,46 1 10K_0402_1% PVCC PVCC UA10 2 RA112 2 10U_1206_25V6 CA125 1 RC 10U_1206_25V6 CA124 2 RA109 For 32dB design, RA24 populated and RA36 is depopulated. A A Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2011/06/02 Deciphered Date 2012/06/02 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Title Amp TPA6017/subwoofer/ Audio Jack Size 5 4 3 2 Document Number Rev 0.1 LA-9332P Date: Friday, December 14, 2012 Sheet 1 46 of 56 5 4 3 2 1 www.laptopblue.vn +3.3V_F347 0_0603_5%~D @ D 1 20 20 +3.3V_F347 @ @ C14 C15 C16 C17 C18 1 1 1 1 1 1 2 2 2 2 2 2 2 2 0.1U_0402_16V4Z~D 0.1U_0402_16V4Z~D 0.1U_0402_16V4Z~D 0.1U_0402_16V4Z~D 0.1U_0402_16V4Z~D 0.1U_0402_16V4Z~D Cloase to JP1 1 0.1U_0402_16V4Z~D CONN@ GND1 GND2 1 0.1U_0402_16V4Z~D 1 2 3 4 5 6 @ +3.3V_F347 1 2 3 4 5 6 C13 C 18 17 16 15 14 13 12 11 C12 2 9 10 JP1 C10 0.1U_0402_16V4Z 1 2 R8 1K_0402_1%~D C11 +3.3V_F347 1 @ 2 7 8 +3.3V_F347 @ 2 1 C7 0.1U_0402_16V4Z~D C6 1U_0805_10V7 1 4 5 USB20_P6 USB20_N6 USB20_P6 USB20_N6 W=40mils 2 0_0603_5%~D I2C_DAT 4.7K_0402_5%~D 2 1 R2 I2C_CLK 4.7K_0402_5%~D 2 1 R3 U1 6 2 0_0603_5%~D @ +3.3V_F347 place R1564 as close as U602 @ 1 1 @ 1 R6 2 2 @ +5VS R5 2 1 C2 22P_0402_50V8J~D +5VALW 1 D +3.3V_F347_R C4 0.1U_0402_16V4Z~D 2 C3 1U_0805_10V7 1 2 C1 0.1U_0402_16V4Z~D R1 VDD D+ DREGIN VBUS RST#/C2CK P3.0/C2D P2.0 P2.1 P2.2 P2.3 P2.4 P2.5 P2.6 P2.7 P0.0 P0.1 P0.2 P0.3 P0.4 P0.5 P0.6 P0.7 P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 GND 2 1 32 31 30 29 28 27 26 25 24 23 22 21 20 19 C5 C8 C9 1 2 SPI_MOCLK SPI_MOCLK_R SPI_MOSO R4 0_0402_5%~D SPI_MOSI SPI_MOCS# I2C_DAT I2C_DAT 48,53 I2C_CLK I2C_CLK 48,53 2 0.1U_0402_16V4Z~D @ 1 1 2 1K_0402_5%~D R7 +3.3V_F347 SLP_S3 1 R9 BATT_CHG_LED 10K_0402_5% 2 +3.3V_F347 ACIN# 2 1 LID_SW_IN#_D LID_SW_IN# LID_SW_IN# BATT_LOW_LED D70 SLP_S5 SDMK0340L-7-F_SOD323-2~D 2 0.1U_0402_16V4Z~D @ 1 2 0.1U_0402_16V4Z~D @ 1 19,43,45,48,53 3 C8051F347-GQ_LQFP32_7X7 We are Green SA00003IR90 U2 SPI_MOSI 15_0402_5% 2 1 R10 5 SPI_MOCLK_R 15_0402_5% 2 1 R12 6 DI +3.3V_F347 7 8 AMPHE_G846A06201EU 1 2 1 2 1 2 R13 3 8 1 2 C20 22P_0402_50V8J~D 2 C19 0.1U_0402_16V4Z~D 1 2 15_0402_5% SPI_MOSO C WP 10K_0402_5%~D +3.3V_F347 1 HOLD 10K_0402_5%~D R15 R11 CS 7 R14 2 SO CLK 1 SPI_MOCS# 10K_0402_5%~D VCC 4 VSS EN25Q80A-100HIP_SO8 1 +3.3V_F347 +3.3V_F347 1 +3VALW D S 3 1 S 1 2 2 G 3 +3.3V_F347 behavior STATE S0 S3 S4 S5 2 R22 2 2 4 6 5 43 DMN66D0LDW-7_SOT363-6~D Q24A 2 3V_F347_ON 1 AC IN ON ON ON ON BAT only ON ON OFF OFF AC mode battery full in S5:turn off ELC controller Q24B 2 DMN66D0LDW-7_SOT363-6~D 1 1 3 1 2 1 1 2 1 3 D 2 G 1 @ 1 C23 0.1U_0402_25V6K~D S R20 100K_0402_5% R23 300K_0402_5%~D BATT_CHG_LED# SSM3K7002FU_SC70-3~D 43 D 1 2 100K_0402_5% BATT_LOW_LED SSM3K7002FU_SC70-3~D BATT_LOW_LED# BATT_CHG_LED 2 G +3VALW R21 100K_0402_5% 43 B 4 1 2 1 3 +3.3V_F347 Q6 Q8 Q3 6 5 2 1 B+_BIAS +3.3V_F347 R24 100K_0402_5% JUMP_43X118 C22 4.7U_0603_6.3V6M~D S 1 R19 100K_0402_1%~D 2 G SSM3K7002FU_SC70-3~D D 1 C21 0.1U_0402_25V6K~D ACIN# Q4 ACIN S 2 SI3456DDV-T1-GE3_TSOP6~D 1 1 2 G PM_SLP_S5# R18 100K_0402_5% 17,29,43,57,64 D SSM3K7002FU_SC70-3~D 17,43 J11 @ 2 SLP_S5 Q2 ADDRESS 000b 001b 000b +3.3V_F347 R17 100K_0402_5% +3.3V_F347 B SMBUS 0100 0100 1010 R25 100K_0402_5% 2 3 S 2 1 D 2 G SSM3K7002FU_SC70-3~D PM_SLP_S3# 3 2 SLP_S3 Q1 17,43 DEVICE MAXIM - LED MAXIM - GPIO I2C EEPROM R16 100K_0402_5% 8PR4 A A Compal Secret Data Security Classification Issued Date 2012/05/28 Deciphered Date 2013/05/27 Title Compal Electronics, Inc. ELC (1) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.1 LA-9332P Date: 5 4 3 2 Friday, December 14, 2012 1 Sheet 47 of 56 5 4 3 2 1 www.laptopblue.vn 43,53 53 L/R Tron, Logo, Alien Head, TP 7313_INT# +3.3V_F347 1 2 47,53 47,53 I2C_CLK I2C_DAT 1 19 20 I2C_CLK I2C_DAT AD0 AD1 AD2 TP_LED_R_DRV# 14 TP_LED_G_DRV# 15 TP_LED_B_DRV# 16 17 P12 P13 P14 OSC 9 GND 1 2 3 4 5 6 7 8 10 11 12 13 25 LTRON_LED_R_DRV# LTRON_LED_G_DRV# LTRON_LED_B_DRV# RTRON_LED_R_DRV# RTRON_LED_G_DRV# RTRON_LED_B_DRV# ALIEN_LED_R_DRV#_1 ALIEN_LED_G_DRV#_1 ALIEN_LED_B_DRV#_1 LOGO_LED_R_DRV# LOGO_LED_G_DRV# LOGO_LED_B_DRV# JKB3 1 1 Indicator, Power 2 U4 22 AD2_0 AD2_1 AD2_2 18 23 24 HDD_R_7313# HDD_G_7313# HDD_B_7313# 14 15 16 17 9 21 INT#/O16 V+ SCL SDA 1 2 3 4 5 6 7 8 10 11 12 13 25 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 GND AD0 AD1 AD2 P12 P13 P14 OSC GND 1 LED_R_7313#_1 LED_G_7313#_1 LED_B_7313#_1 PWR_R_7313# PWR_G_7313# PWR_B_7313# LED_R_7313#_1 LED_G_7313#_1 LED_B_7313#_1 PWR_R_7313# PWR_G_7313# PWR_B_7313# 53 53 53 1 3 5 7 9 11 13 15 17 19 1 3 5 7 9 11 13 15 17 19 2 4 6 8 10 12 14 16 18 20 2 4 6 8 10 12 14 16 18 20 KP_DET# KSO16 KSI0 KSI5 KSI1 KSI4 KSI2 KSI3 GND GND ACES_50611-0100N-001_10P 2 1 2 3 4 5 6 7 8 9 10 11 12 53 53 53 ALIEN_LED_R_DRV#_1 ALIEN_LED_G_DRV#_1 ALIEN_LED_B_DRV#_1 53 3 HDD_B C +5VS 20mil LID_SW LOGO_LED_R_DRV# LOGO_LED_G_DRV# LOGO_LED_B_DRV# MAX7313DATG+T_TQFN-EP24_4X4~D DMN66D0LDW-7_SOT363-6~D Q9B 4 HDD_R G11 G12 11 12 CONN@ D 1 3 1 S 3 2 G Q15 MAX7313 LID_SW 5 Q12B 0 1 0 Tron Lights,TP A-panel,B-Panel Logo U608 0 1 1 Power Button, Media and Status LED Color U? 1 0 0 Button, Indicator Brightness 4 U605 G 1 2 C33 0.1U_0402_25V6K~D EN_TPLED# D 1 2 R37 1.5M_0402_5%~D 43 SATA_LED_ACT 2 EN_TPLED DMN66D0LDW-7_SOT363-6~D HDD_G_7313# +5VS +5VS S 1 DMN66D0LDW-7_SOT363-6~D Q12A 2 1 3 6 3 LID_SW_IN# Q11 +5VS_TP_LED SI3456DDV-T1-GE3_TSOP6~D 6 5 4 2 1 1 2 LTRON_LED_R_DRV# LTRON_LED_G_DRV# LTRON_LED_B_DRV# 1 2 JTRONL 1 2 1 3 2 4 3 5 4 6 5 6 7 8 GND GND C31 0.1U_0402_16V4Z LID_SW 53 +5VS C30 0.1U_0402_16V4Z 2 1 2 1 6 B+_BIAS SSM3K7002FU_SC70-3~D 4 1 2 3 4 5 6 7 8 9 10 ACES_50228-01071-001 C32 1U_0603_10V4Z~D 1 JTRONF 1 2 3 4 5 6 7 8 9 10 RTRON_LED_R_DRV# RTRON_LED_G_DRV# RTRON_LED_B_DRV# LTRON_LED_R_DRV# LTRON_LED_G_DRV# LTRON_LED_B_DRV# TRON LED Board (F) CONN Q10B AD0 13 14 0.1U_0402_16V4Z C29 HDD_G 19,43,45,47,53 5 AD1 GND GND 53 R36 300K_0402_5%~D DMN66D0LDW-7_SOT363-6~D Q9A 2 +5VALW HDD_R_7313# HDD_G B 1 CONN@ DMN66D0LDW-7_SOT363-6~D Q10A 2 1 2 3 4 5 6 7 8 9 10 11 12 LOGO Board CONN HDD_B_7313# HDD_R SATA_LED_ACT JLOGO1 ACES_50228-01271-001 6 1 GND GND GND GND KP_DET# KSO16 KSI0 KSI5 KSI1 KSI4 KSI2 KSI3 GND GND +5VS R35 100K_0402_5%~D R34 100K_0402_5%~D 2 KP_DET# KSO16 Reserve for Viking +5VS AD2 43 43,53 CONN@ 1 1 R33 4.7K_0402_1%~D 2 19 20 5 Reference JKB2 1 2 3 4 5 6 MOLEX_52559-0652 CONN@ C27 0.1U_0402_16V4Z I2C_CLK I2C_DAT HDD_B 2 KB_LED_R5_DRV# KB_LED_G5_DRV# KB_LED_B5_DRV# KB_LED_R5_DRV# KB_LED_G5_DRV# KB_LED_B5_DRV# 7 8 9 10 C26 0.1U_0402_16V4Z C PCH_SATALED# 1 2 3 4 5 6 +5V_KP_BL 53 53 53 +3.3V_F347 7313_INT# 16 D MAX7313DATG+T_TQFN-EP24_4X4~D 2 2 2 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 GND 2 21 C25 0.1U_0402_16V4Z 4.7K_0402_1%~D R32 1 SCL SDA 18 23 24 4.7K_0402_1%~D 4.7K_0402_1%~D R31 2 TP_LED_R_DRV# TP_LED_G_DRV# TP_LED_B_DRV# INT#/O16 V+ 2 1 53 53 53 R29 4.7K_0402_1%~D R28 4.7K_0402_1%~D R30 1 22 AD0_0 AD0_1 AD0_2 +3.3V_F347 2 1 U3 C24 0.1U_0402_16V4Z~D 4.7K_0402_1%~D R27 1 R26 2 4.7K_0402_1%~D Hot Key Conn. Key Pad Hot Key Conn. PWM +3.3V_F347 D KSI[0..7] KSI[0..7] RTRON_LED_R_DRV# RTRON_LED_G_DRV# RTRON_LED_B_DRV# ACES_50228-0067N-001 CONN@ TRON LED Board (L) CONN DMN66D0LDW-7_SOT363-6~D JTRONR 1 2 1 3 2 4 3 5 4 6 5 6 7 8 GND GND ACES_50228-0067N-001 CONN@ Touchpad LED circuit B TRON LED Board (R) CONN A A Compal Secret Data Security Classification Issued Date 2012/05/28 Deciphered Date 2013/05/27 Title Compal Electronics, Inc. ELC (2) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.1 LA-9332P Date: 5 4 3 2 Friday, December 14, 2012 1 Sheet 48 of 56 A B C D E www.laptopblue.vn 1 1 RF +5VS Close to JHDD1 +3VS 1 2 1 CN10 2 CN5 10U_0805_10V4Z~D 12,13,14,15,19,50,51,53,6 PCH_SMBDATA 12,13,14,15,19,50,51,53,6 PCH_SMBCLK @ 1 47P_0402_50V8J~D FFS_INT1 FFS_INT2 2 @ 2 UN4 LNG3DM 1 14 17 21,50 1 CN3 0.1U_0402_16V4Z~D 2 CN4 1U_0402_6.3V4Z~D @2 1 CN2 1000P_0402_50V7K~D 1 C35 10U_0805_10V4Z~D 2 C34 0.1U_0402_16V4Z~D 1 Free Fall Sensor FFS_INT1 FFS_INT2 11 9 PCH_SMBDATA PCH_SMBCLK 7 6 4 VDD_IO VDD INT 1 INT 2 GND GND SDO/SA0 SDA / SDI / SDO SCL/SPC NC CS NC 8 FFS_INT1 connect to PCH GPIO & EC discuss with BIOS to use which pin RES RES RES RES CONN@ 10 13 15 16 +5VS +5VS 41 5 12 2 3 SATA_PTX_DRX_P0_C SATA_PTX_DRX_N0_C LNG3DMTR_LGA16_3X3~D SATA_PRX_DTX_N0_C SATA_PRX_DTX_P0_C SATA_PRX_DTX_P1_C SATA_PRX_DTX_N1_C 2 SATA_PTX_DRX_N1_C SATA_PTX_DRX_P1_C 21,49 HDD2_DETECT# 49,50 FFS_INT2_CONN FFS_INT2_CONN 39 37 35 33 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 ACES_88279-20041-FN-P01 42 G1 G2 39 37 35 33 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 JHDD1 40 38 36 34 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 40 38 36 34 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 SATA_PTX_DRX_P0_C SATA_PTX_DRX_N0_C SATA_PRX_DTX_N0_C SATA_PRX_DTX_P0_C SATA_PRX_DTX_P1_C SATA_PRX_DTX_N1_C 2 SATA_PTX_DRX_N1_C SATA_PTX_DRX_P1_C HDD2_DETECT# 21,49 FFS_INT2_CONN 49,50 FFS_INT2_CONN +3VS 2 0_0402_5% 18 3 13 21 TEST GND GND EPAD A_OUTp A_OUTn B_INp B_INn CN9 CN8 1 1 2 0.01U_0402_16V7K~D 2 0.01U_0402_16V7K~D SATA_PRX_DTX_P0_RC SATA_PRX_DTX_N0_RC 5 4 +3VS 15 14 SATA_PTX_DRX_P1_RC CN19 1 SATA_PTX_DRX_N1_RC CN20 1 2 0.01U_0402_16V7K~D 2 0.01U_0402_16V7K~D SATA_PTX_DRX_P1_C SATA_PTX_DRX_N1_C 11 12 SATA_PRX_DTX_P1_R SATA_PRX_DTX_N1_R CN21 1 CN22 1 2 0.01U_0402_16V7K~D 2 0.01U_0402_16V7K~D SATA_PRX_DTX_P1_C SATA_PRX_DTX_N1_C RN51 1 RN52 1 @ @ 2 0_0402_5% 2 0_0402_5% RN55 1 @ 2 0_0402_5% HDD_A0_PRE1 HDD_B0_PRE1 19 17 18 3 13 21 EN A_INp A_INn B_OUTp B_OUTn A_PRE1 B_PRE1 TEST GND GND EPAD VDD VDD NC NC A_PRE0 B_PRE0 A_OUTp A_OUTn B_INp B_INn 1 2 2 2 10 20 1 1 2 1 1 2 2 1 2 1 2 1 2 @ RN54 @ SATA_PTX_DRX_P0_R SATA_PTX_DRX_N0_R RN58 1 A_PRE0 B_PRE0 2 0.01U_0402_16V7K~D 2 0.01U_0402_16V7K~D @ 0_0402_5% RN4 A_PRE1 B_PRE1 SATA_PRX_DTX_P0 SATA_PRX_DTX_N0 7 1 1 RN49 2 0_0402_5% HDD_A_PRE1 19 2 0_0402_5% HDD_B_PRE1 17 16 16 2 0_0402_5% CN6 CN7 0_0402_5% @ @ HDD_A_PRE0 HDD_B_PRE0 SATA_PTX_DRX_P0 SATA_PTX_DRX_N0 RN50 1 1 9 8 UN5 RN48 1 16 16 @ 0_0402_5% RN3 RN2 B_OUTp B_OUTn HDD_REXT_SATA 2 0_0402_5% 5 4 NC NC 6 16 1 CN62 0.1U_0402_25V6K SATA_PRX_DTX_P1_RC SATA_PRX_DTX_N1_RC A_INp A_INn +3VS @ RN7 +3VS 2 0.01U_0402_16V7K~D 2 0.01U_0402_16V7K~D 1 2 RN6 CN18 1 CN17 1 SATA_PTX_DRX_P1_R SATA_PTX_DRX_N1_R VDD VDD @ 0_0402_5% SATA_PRX_DTX_P1 SATA_PRX_DTX_N1 2 0.01U_0402_16V7K~D 2 0.01U_0402_16V7K~D EN 10 20 RN46 16 16 3 CN15 1 CN16 1 7 0_0402_5% SATA_PTX_DRX_P1 SATA_PTX_DRX_N1 2 0_0402_5% RN5 16 16 1 2 @ 0_0402_5% UN1 RN1 0_0402_5% 2 CN24 0.1U_0402_25V6K CN23 0.01U_0402_16V7K 2 +3VS 1 CN66 0.01U_0402_16V7K 1 1 1 +3VS 6 16 HDD_REXT_SATA0 9 8 HDD_A0_PRE0 HDD_B0_PRE0 15 14 SATA_PTX_DRX_P0_RC CN65 1 SATA_PTX_DRX_N0_RC CN60 1 2 0.01U_0402_16V7K~D 2 0.01U_0402_16V7K~D SATA_PTX_DRX_P0_C SATA_PTX_DRX_N0_C 11 12 SATA_PRX_DTX_P0_R SATA_PRX_DTX_N0_R CN59 1 CN67 1 2 0.01U_0402_16V7K~D 2 0.01U_0402_16V7K~D SATA_PRX_DTX_P0_C SATA_PRX_DTX_N0_C 3 PS8520CTQFN20GTR2-A_TQFN20_4X4 PS8520CTQFN20GTR2-A_TQFN20_4X4 HDD_B_PRE0 RN8 1 @ 2 0_0402_5% HDD_B_PRE1 RN9 1 @ 2 0_0402_5% HDD_A_PRE1 Pin 20: PARADE PS8250B: Reserve RN46, Mount RN12 Pin 9: PARADE PS8250B: Reserve RN11. PERICOM PI3EQX6741ST: Mount RN46, Reserve RN12 PERICOM PI3EQX6741ST: Reserve RN11 ASMEDIA ASM1466: Mount RN46, Reserve RN12 ASMEDIA ASM1466: Mount RN11 to pull down RN10 1 @ HDD_B0_PRE0 RN53 1 @ 2 0_0402_5% HDD_B0_PRE1 RN56 1 @ 2 0_0402_5% HDD_A0_PRE1 RN47 1 @ 2 0_0402_5% HDD_A0_PRE0 RN29 1 2 0_0402_5% HDD_REXT_SATA0 RN57 1 HDD_A_PRE0 RN11 1 HDD_REXT_SATA 1 RN12 2 2K_0402_5% 2 5.1K_0402_1% Pin 20: PARADE PS8250B: Reserve R49, Mount R57 Pin 9: PARADE PS8250B: Reserve R29. PERICOM PI3EQX6741ST: Mount R49, Reserve R57 PERICOM PI3EQX6741ST: Reserve R29 ASMEDIA ASM1466: Mount R49, Reserve R57 ASMEDIA ASM1466: Mount R29 to pull down 2 2K_0402_5% 2 5.1K_0402_1% 4 4 Compal Secret Data Security Classification Issued Date 2012/05/28 Deciphered Date 2013/05/27 Title Compal Electronics, Inc. SATA HDD1 & HDD2/FFS THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.1 LA-9332P Date: A B C D Friday, December 14, 2012 E Sheet 49 of 56 A B C D E www.laptopblue.vn ODD_DA#_R SATA ODD Conn. RN45 1 ODD_DETECT# 2 0_0402_5%~D SATA_PTX_DRX_N4_C SATA_PTX_DRX_P4_C 2 49,50 +3VS RN15 1 RN14 1 @ @ 2 0_0402_5% ODD_A_PRE1 19 2 0_0402_5% ODD_B_PRE1 17 RN16 1 @ 2 0_0402_5% 18 3 13 21 A_INp A_INn B_OUTp B_OUTn A_PRE1 B_PRE1 TEST GND GND EPAD NC NC A_PRE0 B_PRE0 A_OUTp A_OUTn B_INp B_INn FFS_INT2_CONN FFS_INT2_CONN 2 5 4 1 DN1 +5VS 2 FFS_INT2_CONN SDM10U45-7_SOD523-2~D FFS_INT2_CONN 49,50 2 1 1 2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 1 21 22 23 24 GND1 GND2 GND3 GND4 E-T_0870K-F20C-22L CONN@ @ RN20 1 2 SATA_PRX_DTX_P4_R SATA_PRX_DTX_N4_R 0_0402_5% SATA_PTX_DRX_P4_R SATA_PTX_DRX_N4_R 2 0.01U_0402_16V7K~D 2 0.01U_0402_16V7K~D D 2 0.01U_0402_16V7K~D 2 0.01U_0402_16V7K~D 1 1 10 20 @ RN19 1 1 CN25 CN26 1 0_0402_5% CN27 CN28 VDD VDD 3 ODD_DA#_R SATA_PRX_DTX_P4_C SATA_PRX_DTX_N4_C @ RN28 @RN28 100K_0402_5%~D S SATA_ODD_PRX_DTX_P4 SATA_ODD_PRX_DTX_N4 EN RN18 SATA_ODD_PTX_DRX_P4 SATA_ODD_PTX_DRX_N4 7 0_0402_5% UN2 2 0_0402_5% @ RN17 2 0_0402_5% +3VS 1 CN34 0.1U_0402_25V6K 2 CN33 0.01U_0402_16V7K 1 16 16 ODD_DA# 21 QN3 SSM3K7002FU_SC70-3~D ODD Redriver 16 16 17 +5VS G FFS_INT2 FFS_INT2 +3VS 2 1 1, Host generate Low pulse 40ms to eject ODD 2, After this pulse, signal remain high and no pulse is allowed within 7s +3VS 21,49 RN13 1 JODD1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 +3VS +5VS_ODD 1 2 QN4 2N7002E-T1-E3_SOT23-3 2 1 QN1 SSM3K7002FU_SC70-3~D 1 S 2 G ODD_EJECT# 2 2 1 3 S 2 G 2 43 Placea caps. near ODD CONN. RN27 1.5M_0402_5%~D ODD_EN# 2 1 CN40 0.1U_0402_25V6K~D 21 2 1 D 1 D S G ODD_EN D 1 1 1 2 2 3 2 RN26 300K_0402_5%~D 1 4 CN38 10U_0805_10V4Z~D 1 6 5 2 1 CN37 1U_0402_6.3V4Z~D 1 CN39 1U_0402_6.3V6K~D B+_BIAS QN2 +5VS_ODD SI3456DDV-T1-GE3_TSOP6~D CN36 0.1U_0402_16V4Z~D +5VS CN35 1000P_0402_50V7K~D ODD power 3 +5VS_ODD 6 16 ODD_REXT_SATA 9 8 ODD_A_PRE0 ODD_B_PRE0 15 14 SATA_PTX_DRX_P4_RC CN29 1 SATA_PTX_DRX_N4_RC CN30 1 2 0.01U_0402_16V7K~D 2 0.01U_0402_16V7K~D SATA_PTX_DRX_P4_C SATA_PTX_DRX_N4_C 11 12 SATA_PRX_DTX_P4_RC CN31 1 SATA_PRX_DTX_N4_RC CN32 1 2 0.01U_0402_16V7K~D 2 0.01U_0402_16V7K~D SATA_PRX_DTX_P4_C SATA_PRX_DTX_N4_C ODD_B_PRE0 RN21 1 @ 2 0_0402_5% ODD_B_PRE1 RN22 1 @ 2 0_0402_5% ODD_A_PRE1 RN23 1 @ 2 0_0402_5% ODD_A_PRE0 RN24 1 @ 2 2K_0402_5% 2 4.42K_0402_1% 1 ODD_REXT_SATA RN25 Pin 20: PARADE PS8250B: Reserve RN18, Mount RN25 Pin 9: PARADE PS8250B: Reserve RN24. PERICOM PI3EQX6741ST: Mount RN18, Reserve RN25 PERICOM PI3EQX6741ST: Reserve RN24 ASMEDIA ASM1466: Mount RN18, Reserve RN25 ASMEDIA ASM1466: Mount RN24 to pull down 2 PS8520CTQFN20GTR2-A_TQFN20_4X4 +3VS 1 2 1 2 CN54 10U_0805_10V4Z~D 2 +1.5VS 1 @2 1 @2 CN58 10U_0805_10V4Z~D +3VS +1.5VS 1 @2 CN57 1U_0402_6.3V4Z~D +3VS @2 CN56 0.1U_0402_16V4Z~D 1 Placea caps. near JMSATA1 CONN. CN55 1000P_0402_50V7K~D CN53 1U_0402_6.3V4Z~D 3 1 CN52 0.1U_0402_16V4Z~D 2 CN51 1000P_0402_50V7K~D 1 3 JMSATA 16 16 MSATA_PRX_DTX_P5 MSATA_PRX_DTX_N5 16 16 MSATA_PTX_DRX_N5 MSATA_PTX_DRX_P5 43 T62 @ T63 @ PAD~D PAD~D T61 @ T59 @ 1 3 5 7 9 11 13 15 CN43 CN44 1 1 2 0.01U_0402_16V7K~D 2 0.01U_0402_16V7K~D SATA_PRX_DTX_P5_C SATA_PRX_DTX_N5_C CN42 CN41 1 1 2 0.01U_0402_16V7K~D 2 0.01U_0402_16V7K~D SATA_PTX_DRX_N5_C SATA_PTX_DRX_P5_C E51TXD_P80DATA E51RXD_P80CLK RN43 1 RN44 1 PAD~D T65 @ PAD~D T64 @ 2 0_0402_5%~D EC_TX_DAT 2 0_0402_5%~D EC_RX_CLK 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 1 3 5 7 9 11 13 15 2 4 6 8 10 12 14 16 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 G1 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 G2 2 4 6 8 10 12 14 16 Placea caps. near JMSATA1 CONN. 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 PCH_SMBCLK PCH_SMBDATA PCH_SMBCLK PCH_SMBDATA 12,13,14,15,19,49,51,53,6 12,13,14,15,19,49,51,53,6 2 43 PAD~D PAD~D 1 RN59 100K_0402_5%~D 4 FOX_AS0B221-S90Q-7H 4 CONN@ Compal Secret Data Security Classification Issued Date 2012/05/28 Deciphered Date 2013/05/27 Title Compal Electronics, Inc. SATA ODD/mSATA THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.1 LA-9332P Date: A B C D Friday, December 14, 2012 E Sheet 50 of 56 A B C D E www.laptopblue.vn RF RF +1.5VS 2 1 2 1 2 1 @2 1 @2 1 1 C47 1 47P_0402_50V8J~D C41 0.1U_0402_16V4Z~D @ C40 0.1U_0402_16V4Z~D 2 C48 1 C39 4.7U_0805_10V4Z~D @ 47P_0402_50V8J~D C38 0.1U_0402_16V4Z~D @ 2 C37 0.1U_0402_16V4Z~D WLAN C36 4.7U_0805_10V4Z~D 1 1 +3VS 2 JMINI1 18 18 MINI1CLK_REQ# 17,43,44,51,53,6 18 20 20 PLT_RST# CLK_DEBUG PCIE_PRX_WLANTX_N5 PCIE_PRX_WLANTX_P5 C68 20 20 PCIE_PTX_WLANRX_N5 PCIE_PTX_WLANRX_P5 CLK_PCIE_MINI1# CLK_PCIE_MINI1 CLK_PCIE_MINI1# CLK_PCIE_MINI1 1 1 PCIE_PTX_WLANRX_N5 PCIE_PTX_WLANRX_P5 C60 RE32 1 2 0_0402_1% @ PCIE_PRX_WLANTX_N5 PCIE_PRX_WLANTX_P5 0.1U_0402_10V7K~D 2 PCIE_PTX_WLANRX_N5_C 2 PCIE_PTX_WLANRX_P5_C 0.1U_0402_10V7K~D +3VS 17 BT_ON# 1 BT_ON# 1K_0402_1%~D 2 BT_ON#_R RE119 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 GND GND 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 +3VS RE31 RE26 RE27 RE28 RE29 1 1 1 1 1 +1.5VS @ @ @ @ @ 2 2 2 2 2 0_0402_1% 0_0402_1% 0_0402_1% 0_0402_1% 0_0402_1% LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0 WL_OFF# PLT_RST# WL_OFF# PLT_RST# WiGi_RADIO_DIS#_R RE22 1 2 0_0402_5%~D 19,43 19,43 19,43 19,43 19,43 17 17,43,44,51,53,6 WiGi_RADIO_DIS# USB20_N4 USB20_P4 USB20_N4 USB20_P4 21 +3VS 20 20 WIGI_LED# WLAN_LED# BT_LED# @ 54 WiGi_RADIO_DIS#_R 2 R45 100K_0402_5%~D D3 1 WiGi_RADIO_DIS# WIGI_LED# 1 1 53 WAKE# 3.3V NC GND NC 1.5V CLKREQ# NC GND NC REFCLKNC REFCLK+ NC GND NC NC GND NC NC GND PERST# PERn0 +3.3Vaux PERp0 GND GND +1.5V GND SMB_CLK PETn0 SMB_DATA PETp0 GND GND USB_DNC USB_D+ NC GND NC LED_WWAN# NC LED_WLAN# NC LED_WPAN# NC +1.5V NC GND NC +3.3V 2 18 1 2 0_0402_5%~D @ RE12 2 0_0402_1% R38 1 @ 2 0_0402_1% R39 1 @ MINI1CLK_REQ# 1 PCIE_WAKE# COEX2 COEX1 PCIE_WAKE# 2 17,43,44 R59 100K_0402_5%~D 4 1 2 WLAN_LED# 5 SDMK0340L-7-F BELLW_80003-4041 CONN@ G 3 2 BT_LED# WLES ON/OFF LED# WLES ON/OFF LED# 43,53 2 3 Q23B DMN66D0LDW-7_SOT363-6~D 2 R66 100K_0402_5%~D 6 Q23A DMN66D0LDW-7_SOT363-6~D 2 1 D S Q18 SSM3K7002FU_SC70-3~D Display Mini Card (DMC) +1.5VS +3VS PCIE_PTX_WANRX_N6 PCIE_PTX_WANRX_P6 1 1 PCIE_PTX_WANRX_N6 PCIE_PTX_WANRX_P6 C69 0.1U_0402_10V7K~D 2 PCIE_PTX_WANRX_N6_C 2 PCIE_PTX_WANRX_P6_C 0.1U_0402_10V7K~D +3VS_DMC 18 39 39 39 39 39 39 DMC_PCH_DET# CPU_MXM_DMC_AUXN CPU_MXM_DMC_AUXP CPU_MXM_DMC_N2 CPU_MXM_DMC_P2 CPU_MXM_DMC_N0 CPU_MXM_DMC_P0 DMC_PCH_DET# CPU_MXM_DMC_AUXN CPU_MXM_DMC_AUXP CPU_MXM_DMC_N2 CPU_MXM_DMC_P2 CPU_MXM_DMC_N0 CPU_MXM_DMC_P0 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 53 55 57 59 61 63 65 67 69 71 73 75 54 56 58 60 62 64 66 68 70 72 74 76 GND1 GND2 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 2 DMC_RADIO_OFF# PLT_RST# DMC_RADIO_OFF# MINI2_SMBCLK RE33 1 MINI2_SMBDATA RE34 1 @ @ 1 2 1 2 1 2 1 2 C44 0.1U_0402_16V4Z~D C70 20 20 PCIE_PRX_WANTX_N6 PCIE_PRX_WANTX_P6 1 +1.5VS_DMC C43 0.1U_0402_16V4Z~D 3 PCIE_PRX_WANTX_N6 PCIE_PRX_WANTX_P6 CLK_PCIE_MINI2# CLK_PCIE_MINI2 2 4 6 8 10 12 14 16 C42 4.7U_0805_10V4Z~D 20 20 CLK_PCIE_MINI2# CLK_PCIE_MINI2 2 4 6 8 10 12 14 16 C46 0.1U_0402_16V4Z~D 18 18 18 JDMC1 1 3 1 5 3 7 5 9 7 11 9 13 11 15 13 15 C45 4.7U_0805_10V4Z~D +3VS_DMC 1 2 0_0402_5%~D @ RE30 2 0_0402_1% R40 1 @ 2 0_0402_1% R41 1 @ MINI2CLK_REQ# MINI2CLK_REQ# PCIE_WAKE# COEX2 COEX1 +1.5VS_DMC L1 2 1 BLM18AG601SN1D_0603~D +3VS_DMC L2 2 1 BLM18PG330SN1D_2P~D 21 3 2 0_0402_5%~D PCH_SMBCLK 2 0_0402_5%~D PCH_SMBDATA USB20_N5 USB20_P5 USB20_N5 USB20_P5 PCH_SMBCLK PCH_SMBDATA 12,13,14,15,19,49,50,53,6 12,13,14,15,19,49,50,53,6 20 20 R44 1M_0402_5%~D 1 2 DP_DMC_HPD CPU_MXM_DMC_N3 CPU_MXM_DMC_P3 CPU_MXM_DMC_N1 CPU_MXM_DMC_P1 DP_DMC_HPD CPU_MXM_DMC_N3 CPU_MXM_DMC_P3 39 39 CPU_MXM_DMC_N1 CPU_MXM_DMC_P1 39 39 39 +3VS_DMC CPU_MXM_DMC_AUXN CPU_MXM_DMC_AUXP R42 1 R43 1 @ @ 2 100K_0402_5%~D 2 100K_0402_5%~D 78 LOTES_AAA-PCI-112-K01 CONN@ 4 4 Compal Secret Data Security Classification Issued Date 2012/05/28 Deciphered Date 2013/05/27 Title Compal Electronics, Inc. Mini Card -WLAN/DMC/BT THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.1 LA-9332P Date: A B C D Friday, December 14, 2012 E Sheet 51 of 56 5 4 3 2 1 +5VALW Power share www.laptopblue.vn LI1 3 2 1 3 4 1 USB3RN1_R 4 USB3RP1_R 1 @ RI5 2 USB3TP1_R_C 3 2 1 3 4 1 USB3TN1_R 4 USB3TP1_R 1 RI8 RI10 RI7 1 1 1 USB3_P1_PIN6 USB3_P1_PIN18 2 3.3K_0402_5% 2 3.3K_0402_5% USB3_P0_PIN6 USB3_P0_PIN18 RI421 RI431 RI441 RI411 @ @ @ @ 2 2 2 2 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D USB3_CM_P0 USB3_CM_P1 USB3_ERD_P0 USB3_ERD_P1 RI191 RI201 RI211 RI221 RI261 RI231 RI241 RI251 RI301 RI271 RI281 RI291 @ @ @ @ @ @ @ @ @ @ @ @ 2 2 2 2 2 2 2 2 2 2 2 2 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D USB3_OS2_P0 USB3_DE2_P0 USB3_EQ2_P0 USB3_OS1_P0 USB3_DE1_P0 USB3_EQ1_P0 USB3_OS2_P1 USB3_DE2_P1 USB3_EQ2_P1 USB3_OS1_P1 USB3_DE1_P1 USB3_EQ1_P1 RI871 RI311 RI361 RI401 RI351 RI321 RI331 RI341 RI391 RI371 RI381 RI841 @ @ @ @ @ @ @ @ @ @ @ @ 2 2 2 2 2 2 2 2 2 2 2 2 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D USB3_OS2_P0 USB3_DE2_P0 USB3_EQ2_P0 USB3_OS1_P0 USB3_DE1_P0 USB3_EQ1_P0 USB3_OS2_P1 USB3_DE2_P1 USB3_EQ2_P1 USB3_OS1_P1 USB3_DE1_P1 USB3_EQ1_P1 RI461 RI471 RI481 RI451 @ @ @ @ 2 2 2 2 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D USB3_CM_P0 USB3_CM_P1 USB3_ERD_P0 USB3_ERD_P1 RI49 RI50 1 1 @ @ 2 0_0402_5%~D 2 0_0402_5%~D USB3_P0_PIN6 USB3_P0_PIN18 RI85 RI51 1 1 @ @ 2 0_0402_5%~D 2 0_0402_5%~D USB3_P1_PIN6 USB3_P1_PIN18 20 20 USB3RN1 USB3RP1 USB3RN1 USB3RP1 USB3TN1 USB3TP1 USB3TN1 USB3TP1 CI9 CI8 CI4 CI5 PS8710B (default) AEQ1 OS2 pin16 ADE0 DE2 pin17 AEQ0 EQ2 pin4 BEQ1 OS1 pin3 BDE0 DE1 1 1 2 0.1U_0402_10V6K~D 2 0.1U_0402_10V6K~D USB3RN1_L USB3RP1_L 11 12 1 1 2 0.1U_0402_10V6K~D USB3TN1_L 2 0.1U_0402_10V6K~D USB3TP1_L USB3_OS2_P0 USB3_DE2_P0 USB3_EQ2_P0 15 16 17 VCC VCC NC NC TX2TX2+ RX2RX2+ OS2 DE2 EN_RXD EQ2 CM 8 9 RX1RX1+ 4 3 2 TX1TX1+ OS1 DE1 EQ1 25 PGND 20 USB20_N1 USB20_P1 USB20_N1 4 1 4 3 1 2 3 2 1 USB3RN2 USB3RP2 USB3RN2 CI27 USB3RP2 CI28 1 1 1 USB3TP2_R_C 3 3 4 USB3TN2 USB3TP2 USB3TN2 USB3TP2 1 USB3TN2_R 4 USB3TP2_R 9 USB20_P0_CONN USB3_P0_PIN18 USB20_N0_CONN USBCHG_DET# TAIWI_USB006-107CRL-TWD CONN@ USB3TN1_R_C USB3TP1_R_C CI23 CI24 1 1 11 12 15 16 17 2 0.1U_0402_10V6K~D USB3TN2_L 2 0.1U_0402_10V6K~D USB3TP2_L 8 9 4 3 2 1 1 For ESD request USB3TP1_R 1 10 USB3TP1_R USB3TN1_R 2 9 USB3TN1_R USB3RP1_R 4 7 USB3RP1_R USB3RN1_R 5 6 USB3RN1_R 3 2 2 8 USB3TP2_R VCC VCC NC NC TX2TX2+ RX2RX2+ OS2 DE2 EN_RXD EQ2 CM RX1RX1+ TX1TX1+ OS1 DE1 EQ1 GND GND GND GND PGND 1 1 2 4.99K_0402_1% 2 0_0402_5%~D 7 24 RI77 @ RI76 20 19 USB3RN2_R_C USB3RP2_R_C 5 14 USB3_ERD_P1 USB3_CM_P1 23 22 USB3TN2_RC CI29 USB3TP2_RC CI30 6 10 18 21 USB3_P1_PIN6 USB3TN2_R USB20_P1_CONN USB20_N1_CONN USB3RP2_R USB3RN2_R 9 1 8 3 7 2 6 4 5 SSTX+ VBUS SSTXD+ GND DSSRX+ GND SSRX- B 2.0A 0.1U_0402_16V7K GND GND GND GND 10 11 12 13 1 2 1 2 TAITW_PUBAU5-09FLBS1NN4H0 CONN@ 1 1 2 0.1U_0402_10V6K~D 2 0.1U_0402_10V6K~D USB3TN2_R_C USB3TP2_R_C For ESD request USB3_P1_PIN18 USB20_N1_CONN DI8 USB20_P1_CONN CI36 2 0_0402_5%~D 4.7U_0805_10V4Z 2 DI2 PCB footprint and CIS symbol use TI (SN65LVPE502CPRGER) Compal P/N and value use Parade (PS8710B) +5VALW CI35 2 C PS8713BTQFN24GTR2-A0_TQFN24_4X4 1 EPAD 2 USB3_P0_PIN6 2 0.1U_0402_10V6K~D 2 0.1U_0402_10V6K~D 1 +USB3_VCCB USB3_OS1_P1 USB3_DE1_P1 USB3_EQ1_P1 DLW21SN900HQ2L_0805_4P~D @ RI18 6 10 18 21 USB3RN1_R 43 1 1 1 JUSB2 2 0_0402_5%~D 1 USB3TN1_RC CI11 USB3TP1_RC CI10 UI4 USB20_N1_CONN 2 0_0402_5%~D 2 USB3_ERD_P0 USB3_CM_P0 23 22 11 12 13 14 DI9 L30ESDL5V0C3-2 2 5 14 USB20_N0_CONN USB3RP1_R +USB3_VCCB LI5 USB3TN2_R_C USB3RN1_R_C USB3RP1_R_C +3VS USB3_OS2_P1 USB3_DE2_P1 USB3_EQ2_P1 20 20 +USB3_VCCA SSTX+ VBUS SSTXD+ GND DGND SSRX+ GND GND GND SSRXGND Plug_DET TVWDF1004AD0 25 @ RI17 20 19 USB3TN1_R USB20_P0_CONN ESD 2 0.1U_0402_10V6K~D USB3RN2_L 2 0.1U_0402_10V6K~D USB3RP2_L USB20_P1_CONN WCM2012F2S-900T04_0805 @RI14 @ RI14 2 4.99K_0402_1% 2 0_0402_5%~D CI32 USB20_P1 20 20 D CI34 10U_0603_6.3V6M~D LI6 20 1 1 0.01U_0402_16V7K~D 1 2 1 2 EMI 20 0.1U_0402_16V7K 47U_0805_6.3V4Z~D 2 0_0402_5%~D GND GND GND GND RI56 @RI57 @ RI57 PCB footprint and CIS symbol use TI (SN65LVPE502CPRGER) Compal P/N and value use Parade (PS8710B) 1 13 1 9 1 8 3 7 2 6 4 5 10 7 24 PS8713BTQFN24GTR2-A0_TQFN24_4X4 PS8710 [A(B)_DE1, A(B)_DE0] == LL: 3.5dB de-emphasis LH: No de-emphasis pin2 BEQ0 EQ1 HL: 7dB de-emphasis pin5 PD EN_RXD HH: 5dB with boost output swing pin14 TEST CM [A(B)_EQ1, A(B)_EQ0] == LL: reserved pin18 ADE1 LH: program EQ for channel loss up to 7dB pin6 BDE1 HL: program EQ for channel loss up to 14.5dB [Parade suggest] HH: program EQ for channel loss up to 11.5dB PS8710 AEQ0,BEQ0 adjust 7db, TEST == REXT use 3.3 K well get btter test result. L: Normal operation (default) CI26 H: Test mode enable USB_OC0# CI15 JUSB1 SN65LVPE502 EN== 1:normal operation(default) 0:sleep mode CM== 0:normal operation(default) 1:Compliance test mode TI 2 USB3TP1_R UI3 USB3_OS1_P0 USB3_DE1_P0 USB3_EQ1_P0 Vendor pin pin15 1 USB CONN CI25 .1U_0402_16V7K~D @RI13 @ RI13 DI7 1SS355TE-17_SOD323-2 2 10K_0402_5%~D 2 10K_0402_5%~D 2 10K_0402_5%~D @ @ @ 2 0_0402_1% AP2301MPG-13_MSOP8 1 2 3.3K_0402_5% 2 3.3K_0402_5% @ @ S 2 @ 1 CI20 @ @ 1 1 2 2 80mil RI80 CI22 10U_0603_6.3V6M~D 1 1 2 G CI13 VOUT VOUT VOUT FLG 47U_0805_6.3V4Z~D 20 20 RI53 RI52 2 10K_0402_5%~D 1 D GND VIN VIN EN +USB3_VCCA 1 13 RI55 RI54 1 PWRSHARE_EN_EC# 1 +USB3_VCCA 8 7 6 5 DI3 L30ESDL5V0C3-2 B RI9 PWRSHARE_OE# PWRSHARE_SEL# PWRSHARE_EN CI6 .1U_0402_16V7K~D +3VS C PWRSHARE_SEL# DLW21SN900HQ2L_0805_4P~D 1 2 0_0402_5%~D @ RI6 PWRSHARE_EN_R# +3VS CI7 0.01U_0402_16V7K~D 1 2 1 2 2 0_0402_5%~D LI2 USB3TN1_R_C 2 0_0402_1% +5VALW 43 DLW21SN900HQ2L_0805_4P~D 1 2 0_0402_5%~D @ RI4 @ 1 2 3 4 3 2 USB3RP1_R_C RH86 PWRSHARE_EN 1 2.0A UI2 2 USB3RN1_R_C 1 CI16 0.1U_0402_16V7K 2 0_0402_5%~D RI82 10K_0402_5% 2 3 1 @ RI3 SLGC55584AVTR_TDFN8_2X2 1 2 QI1 SSM3K7002FU_SC70-3~D D 2 1 2 2 0_0402_5%~D CB CEN TDM DM TDP DP VDD SELCDP Thermal Pad +3VALW RI81 +5VALW CI1 0.1U_0402_16V4Z~D 1 PWRSHARE_OE# 20 USB20_N0 20 USB20_P0 PWRSHARE_EN SW_USB20_N0 SW_USB20_P0 PWRSHARE_SEL# USB3RN2_R 1 10 USB3RN2_R USB3RP2_R 2 9 USB3RP2_R USB3TN2_R 4 7 USB3TN2_R USB3TP2_R 5 6 USB3TP2_R 3 8 1 2 43 USB20_N0_CONN 1 2 3 4 9 1 2 DLW21SN900SQ2L_0805_4P~D @ RI2 +5VALW UI1 8 7 6 5 PWRSHARE_OE# USB20_N0 USB20_P0 3 1 USB20_P0_CONN 100K_0402_5% 1 SW_USB20_N0 3 3 1 4 0.1U_0402_16V7K LI3 4 SW_USB20_P0 CI18 4.7U_0805_10V4Z SA00006L600 EMI 1 2 0_0402_5%~D 2 1 @ RI1 +USB3_VCCB TVWDF1004AD0 @ RI15 1 2 0_0402_5%~D LI4 USB3RP2_R_C 3 @ RI16 43,53 2 1 3 4 1 USB3RN2_R 4 USB3RP2_R USB_PWR_EN# USB_PWR_EN# 1 2 DLW21SN900HQ2L_0805_4P~D 1 2 0_0402_5%~D CI37 0.1U_0402_16V7K USB3RN2_R_C 2 GND VIN VIN EN 9 A EPAD UI5 1 2 3 4 VOUT VOUT VOUT FLG 8 7 6 5 ESD 80mil RH83 @ 1 2 0_0402_1% USB_OC1# 1 <BOM Structure> A 20 CI38 AP2301MPG-13_MSOP8 2 0.1U_0402_16V7K Compal Secret Data Security Classification Issued Date 2012/05/24 Deciphered Date 2013/05/23 Title Compal Electronics, Inc. USB 3.0/2.0 x2 (left side) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.1 LA-9332P Date: 5 4 3 2 Friday, December 14, 2012 1 Sheet 52 of 56 4 1 2 0_0402_5%~D 3 L41 USB20_P2 1 USB20_P2 4 3 1 2 3 USB20_N2_CONN 2 USB20_P2_CONN C256 .1U_0402_16V7K~D 1 2 U27 43,52,53 USB_PWR_EN# USB_PWR_EN# GND VIN VIN EN 1 VOUT VOUT VOUT FLG 2 0_0402_5%~D @R342 @ R342 1 USB3TN5_R USB20_P2_CONN USB_OC2# 1 2 0.1U_0402_16V7K 2 USB3RP5 USB3RP5 3 2 3 4 1 USB3RN5_R 4 USB3RP5_R @R391 @ R391 20 20 USB3TN5 USB3TP5 1 1 C61 C62 2 0.1U_0402_10V6K~D USB3TN5_L 2 0.1U_0402_10V6K~D USB3TP5_L 2 0_0402_5%~D 1 USB3TP5_L 3 1 10 USB3RN5_R USB3RP5_R 2 9 USB3RP5_R USB3TN5_R 4 7 USB3TN5_R USB3TP5_R 5 6 USB3TP5_R 3 8 TVWDF1004AD0 2 1 3 4 1 USB3TN5_R 4 USB3TP5_R ESD +USB3_VCCD +5VALW USB_PWR_EN# U28 1 2 3 4 USB_PWR_EN# 2.0A GND VIN VIN EN 8 7 6 5 USB_OC3# 1 AP2301MPG-13_MSOP8 2 L50 20 USB20_N3 20 USB20_P3 USB20_N3 4 USB20_P3 1 4 3 1 2 +USB3_VCCD JUSB4 3 USB20_N3_CONN 2 USB20_P3_CONN 9 1 8 3 7 2 6 4 5 USB3TP6_R USB3TN6_R USB20_P3_CONN 20 USB20_N3_CONN USB3RP6_R C71 9 2 0_0402_5%~D VOUT VOUT VOUT FLG W=60mils 0.1U_0402_16V7K USB3RN6_R SSTX+ VBUS SSTXD+ GND DSSRX+ GND SSRX- GND GND GND GND 10 11 12 13 1 C251 1 +USB3_VCCD C257 .1U_0402_16V7K~D 1 2 2 1 2 C796 10U_0603_6.3V6M~D DLW21SN900HQ2L_0805_4P~D 1 2 0_0402_5%~D 43,52,53 @R347 @ R347 D USB3RN5_R 47U_0805_6.3V4Z~D @R390 @ R390 2 2 0_0402_5%~D EPAD 2 1 DI5 L40 USB3TN5_L 2 For ESD request USB20_N2_CONN USB3TN5 USB3TP5 1 1 1 USB20_P2_CONN 1 DLW21SN900HQ2L_0805_4P~D @R392 @ R392 10 11 12 13 GND GND GND GND 2 0_0402_5%~D 3 USB3RN5 SSTX+ VBUS SSTXD+ GND DSSRX+ GND SSRX- TAITW_PUBAU5-09FLBS1NN4H0 CONN@ DI4 L30ESDL5V0C3-2 20 USB3RN5 USB20_N2_CONN USB3RP5_R C72 L39 20 20 USB3RN5_R AP2301MPG-13_MSOP8 D +USB3_VCCC JUSB3 9 1 8 3 7 2 6 4 5 USB3TP5_R W=60mils 8 7 6 5 9 DLW21SN900SQ2L_0805_4P~D @R344 @ R344 2.0A www.laptopblue.vn 1 2 3 4 C795 10U_0603_6.3V6M~D 20 4 USB20_N2 +USB3_VCCC C250 USB20_N2 1 +USB3_VCCC 47U_0805_6.3V4Z~D 20 2 +5VALW EMI 2 @R343 @ R343 EPAD 5 TAITW_PUBAU5-09FLBS1NN4H0 CONN@ DLW21SN900SQ2L_0805_4P~D @R346 @ R346 C 1 2 0_0402_5%~D USB20_P3_CONN C For ESD request USB20_N3_CONN 2 0_0402_5%~D 20 20 20 USB3RN6 USB3RN6 20 USB3RP6 USB3RP6 2 3 2 3 1 4 1 USB3TN6 USB3TP6 USB3TN6 USB3TP6 C63 C64 1 1 2 0.1U_0402_10V6K~D USB3TN6_L 2 0.1U_0402_10V6K~D USB3TP6_L USB3RN6_R 4 USB3RN6_R 1 10 USB3RN6_R USB3RP6_R 2 9 USB3RP6_R USB3TN6_R 4 7 USB3TN6_R USB3TP6_R 5 6 USB3TP6_R 3 1 1 L42 DI6 L30ESDL5V0C3-2 @R345 @ R345 2 3 DI10 USB3RP6_R 8 TVWDF1004AD0 DLW21SN900HQ2L_0805_4P~D @R403 @ R403 1 2 0_0402_5%~D ESD +5VS_TP_LED +5VS +5V_KP_BL @R394 @ R394 1 2 0_0402_5%~D F5 L43 USB3TN6_L 2 USB3TP6_L 3 2 1 1 1 3 4 4 USB3TP6_R DLW21SN900HQ2L_0805_4P~D 1 1 2 KB_LED_B5_DRV# 43 TP_CLK 43 TP_DATA 12,13,14,15,19,49,50,51,6 12,13,14,15,19,49,50,51,6 48 48 48 2 USB3TN6_R 0.5A_13.2V_NANOSMDC050F-13.2-2 @R393 @ R393 48 C1856 0.1U_0402_25V6K~D 2 0_0402_5%~D 48 48 B TP_CLK TP_DATA PCH_SMBDATA PCH_SMBCLK TP_LED_R_DRV# TP_LED_G_DRV# TP_LED_B_DRV# TP_LED_R_DRV# TP_LED_G_DRV# TP_LED_B_DRV# VPK_DET# VPK_EN 43 VPK_DET# 43 VPK_EN KB_LED_R5_DRV# KB_LED_G5_DRV# +5VS +3VS 30pin Connector to CardReader CONN@ 19,30,40,43,54 19,30,40,43,54 20 20 PCIE_PTX_CARDRX_P4 PCIE_PTX_CARDRX_N4 20 20 PCIE_PRX_CARDTX_P4 PCIE_PRX_CARDTX_N4 18 18 17,43,44,51,6 PLT_RST# 18 CDCLK_REQ# +3VALW +3VS +5VS +5VALW 48 LED_R_7313#_1 48 LED_B_7313#_1 48 LED_G_7313#_1 43 CAPS_LED# 43,51 WLES ON/OFF LED# 48 HDD_R 48 HDD_G 48 HDD_B 55 ON/OFFBTN# 43 Power_LED# 19,43,45,47,48 LID_SW_IN# 48 PWR_G_7313# 48 PWR_R_7313# 48 PWR_B_7313# 2 ON/OFFBTN# 3 CLK_PCIE_CD CLK_PCIE_CD# 1 D72 PESD24VS2UT_SOT23-3~D Place close to JIO2 @ ESD A PCIE_PTX_CARDRX_P4 PCIE_PTX_CARDRX_N4 PCIE_PRX_CARDTX_P4 PCIE_PRX_CARDTX_N4 CLK_PCIE_CD CLK_PCIE_CD# PLT_RST# CDCLK_REQ# Power_LED# LID_SW_IN# 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 G4 G3 G2 G1 EC_SMB_DA2 EC_SMB_CK2 20 20 JIO2 34 33 32 31 USB20_P13 USB20_N13 I2C_CLK I2C_DAT 7313_INT# +3.3V_F347 21 KB_DET# 43,48 43,48 KSI[0..7] KSO[0..17] KSI[0..7] KSO[0..17] E-T_6700K-Y30N-00L Compal Secret Data Security Classification Issued Date 2012/02/28 I2C_CLK I2C_DAT 47,48 47,48 48 Deciphered Date 2013/02/27 Title KB_DET# KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17 CONN@ CVILU_CF25602D0R0-05-NH 60 61 G1 62 59 60 G2 58 59 57 58 56 57 55 56 54 55 53 54 52 53 51 52 50 51 49 50 48 49 47 48 46 47 45 46 44 45 43 44 42 43 41 42 40 41 39 40 38 39 37 38 36 37 35 36 34 35 33 34 32 33 31 32 30 31 29 30 28 29 27 28 26 27 25 26 24 25 23 24 22 23 21 22 20 21 19 20 18 19 17 18 16 17 15 16 14 15 13 14 12 13 11 12 10 11 9 10 8 9 7 8 6 7 5 6 4 5 3 4 2 3 1 2 1 JP3 B A Compal Electronics, Inc. IO BTB CONN THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.1 LA-9332P Date: 5 4 3 2 Friday, December 14, 2012 1 Sheet 53 of 56 A B C D E www.laptopblue.vn +3VS 2 B Q17 MMBT3904WT1G_SC70-3~D SENSOR_DIODE_N1 2 @ R47 1 C50 470P_0402_50V7K~D 2 0_0402_1% +3VS Diode circuit s used for skin temp sensor (placed between CPU and MXM). Place C1814 close to Q276 as possible. R48 3 REMOTE_N1 1 VDD 2 2 4.7K_0402_5%~D 4 SCLK D+ SDATA D- ALERT# THERM# GND EC_SMB_CK2 EC_SMB_DA2 EC_SMB_CK2 19,30,40,43,53 EC_SMB_DA2 19,30,40,43,53 6 2 8 7 2 1 1 E 1 1 2 C 3 1 1 U5 2 REMOTE_P1 1 R51 10K_0402_5%~D 2 0_0402_1% 1 1 R50 10K_0402_5%~D R46 C52 22U_0805_6.3VAM~D 2 @ SENSOR_DIODE_P1 R49 10K_0402_5%~D @ C51 100P_0402_50V8J~D 1 1 +5VS +3VS C49 0.1U_0402_10V7K~D System FAN Controller 2 5 1 JFAN1 CONN@ 43 ADM1032ARMZ-REEL_MSOP8 Address:100_1100 43 SYSTEM_FAN_PWM SYSTEM_FAN_FB SYSTEM_FAN_PWM SYSTEM_FAN_FB 1 2 3 4 2 1 D65 SDMK0340L-7-F_SOD323-2~D 1 2 3 4 G5 G6 5 6 MOLEX_53398-0471~D Pull up resistor on thermtrip pin SMBUS address 1111 4.7k 1011 6.8k 10k 1001 15k 1101 22k 0011 33k 0111 2 2 +5VS +3VS +3VS 2 2 @ R53 1 2 0_0402_1% +3VS R54 C54 470P_0402_50V7K~D 3 2 6.8K_0402_5%~D 4 VDD SCLK D+ SDATA D- ALERT# THERM# GND EC_SMB_CK2 EC_SMB_DA2 6 43 43 MXM1_FAN_PWM MXM1_FAN_FB MXM1_FAN_PWM MXM1_FAN_FB 2 1 8 7 2 2 2 REMOTE_N2 1 U6 1 1 1 1 2 B E Q19 MMBT3904WT1G_SC70-3~D SENSOR_DIODE_N2 1 REMOTE_P2 C 1 3 100P_0402_50V8J~D C55 @ 2 0_0402_1% R55 10K_0402_5%~D 1 R57 10K_0402_5%~D R52 1 R56 10K_0402_5%~D 2 @ SENSOR_DIODE_P2 C56 22U_0805_6.3VAM~D 1 C53 0.1U_0402_10V7K~D MXM1 FAN Controller 2 JFAN2 CONN@ 1 2 3 4 2 1 D66 SDMK0340L-7-F_SOD323-2~D 5 1 2 3 4 5 6 G5 G6 MOLEX_53398-0471~D ADM1032ARMZ-2REEL_MSOP8 Address:100_1101 3 3 +5VS +3VS +3VS 2 2 @ R64 1 2 0_0402_1% +3VS R65 C67 470P_0402_50V7K~D REMOTE_N3 1 2 6.8K_0402_5%~D 2 3 4 VDD SMCLK DP SMDATA DN ALERT THERM#/ADDR GND EC_SMB_CK2 EC_SMB_DA2 6 43 43 MXM2_FAN_PWM MXM2_FAN_FB MXM2_FAN_PWM MXM2_FAN_FB 2 1 8 7 2 2 U7 1 1 1 1 2 B E Q22 MMBT3904WT1G_SC70-3~D SENSOR_DIODE_N3 1 REMOTE_P3 C 1 3 100P_0402_50V8J~D C66 @ 2 0_0402_1% R62 10K_0402_5%~D 1 R61 10K_0402_5%~D R63 1 R60 10K_0402_5%~D 2 @ SENSOR_DIODE_P3 C59 22U_0805_6.3VAM~D 1 C65 0.1U_0402_10V7K~D MXM2 FAN Controller 2 JFAN3 CONN@ 1 2 3 4 2 1 D67 SDMK0340L-7-F_SOD323-2~D 5 1 2 3 4 5 6 G5 G6 MOLEX_53398-0471~D W83L771AWG-2 Address:1001_101Xb 4 4 Compal Secret Data Security Classification Issued Date 2012/05/14 2013/05/13 Deciphered Date Title Compal Electronics, Inc. Thermal Sensor & FAN THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.1 LA-9332P Date: A B C D Friday, December 14, 2012 Sheet E 54 of 56 A B C D E www.laptopblue.vn ON/OFF switch TOP Side SW1 SMT1-05-A_4P 1 3 2 1 +3VLP ON/OFFBTN# 4 Power Button 2 1 1 6 5 R58 100K_0402_5%~D D26 2 1 Bottom Side SW2 SMT1-05-A_4P 1 3 4 43 3 DAN202UT106_SC70-3 6 5 2 2 ON/OFF 1 ON/OFFBTN# ON/OFFBTN# C58 0.1U_0402_25V6K~D 53 2 2 Pop only for SSI debug E @ H27 H_2P6N 1 1 3 1 1 @ H17 @ H16 @H17 H_3P8 H_3P3 1 1 1 1 1 FD1 1 1 1 @ H11 @ H12 @ H14 @ @H15 H15 @ @H18 H18 @ H19 H_3P3 H_3P3 H_3P3 H_3P3 H_3P3 H_3P3 2012/05/28 Deciphered Date 2013/05/27 1 1 @ FIDUCIAL_C40M80 @ FIDUCIAL_C40M80 4 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: B @ FIDUCIAL_C40M80 1 1 1 1 1 Issued Date 1 FD4 Compal Secret Data Security Classification G A FD3 Fiducial Mark PCB-MB 4 @ FIDUCIAL_C40M80 1 @ H28 @ H29 H_2P6X3P6N H_2P1X2P6N 1 ZZZ1 F FD2 @ H30 @H30 H_3P3 1 1 1 1 @ H24 @ H25 @ H26 H_3P0 H_3P0 H_3P0 1 D 1 @ H20 @ H21 @ H22 @ @H23 H23 H_4P0 H_4P0 H_4P0 H_4P0 1 C 1 3 1 @ H9 @ H10 @ H13 H_3P8 H_3P8 H_3P8 1 B 1 @ H1 @ H2 @ H3 @ @H4 H4 @ @H5 H5 @ H6 @ H7 @ H8 H_2P8 H_2P8 H_2P8 H_2P8 H_2P8 H_2P8 H_2P8 H_2P8 1 A C D KB & Power Button & IR Document Number Rev 0.1 LA-9332P Friday, December 14, 2012 Sheet E 55 of 56 C S 3 2 @ 1 4 1 2 1 +5VALW to +5VMXM +1.05V +1.05VS +5VALW to +5VS +5VALW @ +1.5VS +3VMXM 4 1 DGPU_PWR_EN# @ RZ26 2 5 0_0402_5%~D 6 7 Shape 1 ON1 ON2 CT2 VIN2 VIN2 VOUT2 VOUT2 GPAD D S 2 @ 1 2 2 4 1 @ 2 6 1 1 2 @ 1 2 D 1 2 G PCH_PWR_EN 1 1 2 S @ 43 SUSP 2 PCH_PWR_EN# 2 G 3 RZ46 100K_0402_5%~D 3 D 10,43,59,60,61 1 2 G SUSP# 1 2 S 3 2 1 2 1 3 D 43 1 2 S Compal Secret Data 2012/05/28 Deciphered Date 1 2 G DGPU_PWR_EN @ S DGPU_PWR_EN# 1 1 1 Security Classification Issued Date 1 2 SYSON RZ48 100K_0402_5%~D 2 1 2 1 43,59,60 @ 3 2 S 2 G D 2 G 2 2 G QZ13 1 RUN_ON_CPU1.5VS3# D 3 1 1 2 2 10,6 D SYSON# CZ31 0.1U_0603_25V7K~D S @ S +5VALW RZ49 100K_0402_5%~D QZ14 SSM3K7002FU_SC70-3~D SSM3K7002FU_SC70-3~D D SSM3K7002FU_SC70-3~D 2 G QZ19 +5VALW +0.675VS 2013/05/27 Title 3 QZ18 SSM3K7002F_SC59-3~D SUSP 3 1 1 1 CZ29 0.1U_0603_25V7K~D 3 +3VMXM @ 1 RZ51 100K_0402_5%~D 4 @ RZ47 100K_0402_5%~D 1 CZ48 RZ45 100K_0402_5%~D @ RZ44 10K_0402_5%~D CZ28 0.1U_0603_25V7K~D 2 2 +5VALW QZ17 SSM3K7002F_SC59-3~D 6 1 Shape @ CZ30 0.1U_0603_25V7K~D 1 15 2 @ @ RZ50 100K_0402_5%~D S 9 8 TPS22966DPUR_SON14_2X3 2 1 DGPU_PWR_EN# 5 +DDR_CHG D +1.35V_CPU_VDDQ_CHG RZ38 220_0603_5%~D S @ +1.05VS_D 4 RZ41 470_0603_5% 5 G 10 1 +1.05VS QZ11B DMN66D0LDW-7_SOT363-6~D G SUSP @ 2 1 3+5VMXM_D1 G +1.35V_CPU_VDDQ +3VS_D D 2 QZ11A DMN66D0LDW-7_SOT363-6~D +3V_D PCH_PWR_EN# CZ47 11 2 +5VALW 4 S DGPU_PWR_EN# 5 RZ39 22_0603_5%~D RZ43 470_0603_5% 12 2 2 3+3VMXM_D1 S D 4 2 1 3 2 G QZ10 D SSM3K7002FU_SC70-3~D 6 SUSP +3VS RZ42 470_0603_5% GND 2 QZ16 SSM3K7002F_SC59-3~D 1 G +3V_PCH CT1 VBIAS RZ52 100K_0402_5%~D SSM3K7002FU_SC70-3~D 3 QZ15 SSM3K7002F_SC59-3~D 1 2 0_0402_5%~D +3VALW QZ9B DMN66D0LDW-7_SOT363-6~D 3 @ RZ36 470_0603_5% QZ8B DMN66D0LDW-7_SOT363-6~D S 2 SUSP SUSP# 1 @ RZ28 2 +5VMXM RZ35 470_0603_5% +1.5VS_D S D QZ2A DMN66D0LDW-7_SOT363-6~D SYSON# 2 G QZ12 D +5VS_D +1.35V_D 3 RZ40 470_0603_5% 1 RZ34 470_0603_5% 2 RZ37 470_0603_5% 1 Shape 1 2 +5VS 1 +1.35V 2 2 14 13 1000P_0402_50V7K CZ42 Discharge Circuit 1 1 VOUT1 VOUT1 1 2 1 +3VALW @ VIN1 VIN1 CZ50 1U_0603_10V6K @ 2 UZ4 1 2 1 @ 3 +3VS Shape 1 S +3VALW 2 @ @ S G +3VALW to +3VMXM 2 +5VMXM_GATE D 2 DGPU_PWR_EN# 470P_0402_50V7K CZ41 2 G SUSP 1 @ B+_BIAS +5VALW to +5VMXM CZ44 10U_0805_10V6K 1 @ CZ43 10U_0805_10V6K D 2 CZ49 10U_0805_10V6K 4 @ 2 @ 2 CZ40 1U_0603_10V6K 2 +1.05VS_GATE RZ53 330K_0402_5%~D 1 CZ46 10U_0805_10V6K 2 1 B+_BIAS CZ45 10U_0805_10V6K 2 1 2 1 2 RZ32 200K_0402_5% 1 2 1U_0603_10V6K 1 1 @ 10U_0805_10V6K @ @ 470P_0402_50V7K CZ18 CZ33 10U_0805_10V6K CZ34 10U_0805_10V6K @ +5VMXM CZ39 10U_0805_10V6K Shape @ 1 @ RZ54 1M_0402_5%~D CZ36 10U_0805_10V6K 15 2 2 100mil(2.5A) 1 RZ33 0_0402_5%~D GPAD 9 8 TPS22966DPUR_SON14_2X3 2 2 @ CZ38 @ CZ27 0.1U_0603_25V7K~D VOUT2 VOUT2 11 10 1 1 QZ9A DMN66D0LDW-7_SOT363-6~D CT2 1 CZ37 CZ32 100P_0402_50V8J~D CZ35 10U_0805_10V6K GND 12 +5VMXM UZ3 SI4800BDY-T1-E3_SO8~D 8 1 7 2 6 3 5 CZ26 0.1U_0402_16V4Z~D CT1 CZ17 1U_0603_10V4Z~D @ Shape 1 VOUT1 VOUT1 ON1 QZ7 SSM3K7002F_SC59-3~D 2 1 RZ25 VIN1 VIN1 4 VBIAS 5 2 0_0402_5%~DON2 6 7 VIN2 VIN2 @ DGPU_PWR_EN# 3 PAD-OPEN 4x4m @ QZ20 SI4164DY-T1-GE3_SO8~D 8 1 7 2 6 3 5 Shape 1000P_0402_50V7K CZ19 @ 1 @ 2 0_0402_5%~D 2 CZ16 10U_0805_10V4Z~D 2 2 SUSP# 1 RZ27 14 13 1U_0603_10V6K 2 @ +5VALW 1 UZ1 1 2 10U_0805_10V6K 1 +1.05V to +1.05VS +5VS Shape JP6 1 CZ25 10U_0805_10V4Z~D +5VALW CZ24 10U_0805_10V4Z~D @ +3VALW to +3VS 1 @ S 2 G 2 4 2 G 1 2 4 1 @ 2 @ 1 2 4 3 4 1 2 RZ31 0_0402_5%~D DGPU_PWR_EN# D D 1 CZ21 0.1U_0402_16V4Z~D +3V_PCH_GATE 102K_0402_1% PCH_PWR_EN# +3VMXM_GATE CZ22 0.1U_0603_25V7K~D 2 1 CZ23 10U_0805_10V4Z~D RZ30 200K_0402_5% 1 2 80mil(2A) 1 2 3 2 QZ8A DMN66D0LDW-7_SOT363-6~D B+_BIAS RZ5 +3VMXM UZ2 SI4800BDY-T1-E3_SO8~D 8 7 6 5 1 @2 B+_BIAS 1 CZ20 10U_0805_10V4Z~D 2 CZ14 1U_0603_10V4Z~D 2 @ +3VALW 1 RZ6 0_0402_5%~D 2 2 @ 1 CZ15 0.1U_0603_25V7K~D 3 2 2 QZ5 SSM3K7002F_SC59-3~D S 1 1 RZ4 0_0402_5%~D 1 2 G QZ4 SSM3K7002F_SC59-3~D 2 SUSP RZ2 0_0402_5%~D S CZ4 0.1U_0603_25V7K~D 5 G SUSP +3VS_GATE D 1 2 CZ10 0.1U_0603_25V7K~D +5VS_GATE D QZ2B DMN66D0LDW-7_SOT363-6~D 1 2 RZ1 102K_0402_1% B+_BIAS 1 1 1 2 3 CZ13 10U_0805_10V4Z~D 1 B+_BIAS 1 1 2 3 +3VALW to +3VMXM Transfer +3V_PCH QZ6 SI4800BDY-T1-E3_SO8~D 8 7 6 5 CZ12 10U_0805_10V4Z~D 2 RZ3 102K_0402_1% 2 CZ11 10U_0805_10V4Z~D 2 QZ3 SI4800BDY-T1-E3_SO8~D 8 7 6 5 CZ9 1U_0603_10V4Z~D @ 1 +3VS CZ8 10U_0805_10V4Z~D 1 2 @ 1 CZ7 10U_0805_10V4Z~D 2 1 CZ6 10U_0805_10V4Z~D @2 1 CZ3 1U_0603_10V4Z~D 1 +3VALW CZ5 10U_0805_10V4Z~D 2 @ CZ2 10U_0805_10V4Z~D CZ1 10U_0805_10V4Z~D 1 +3VALW +5VS QZ1 SI4800BDY-T1-E3_SO8~D 8 1 7 2 6 3 5 E +3VALW to +3V_PCH +3VALW to +3VSwww.laptopblue.vn DC to DC +5VALW to +5VS +5VALW D 6 B 1 A 4 Compal Electronics, Inc. DC/DC Interface THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.1 LA-9332P Date: A B C D Friday, December 14, 2012 E Sheet 56 of 56 A B C D +3VALW PL4 C8B BPH 853025_2P 1 2 PC9 100P_0402_50V8J 1 2 PR3 2.2K_0402_5% 2 1 S 1 3 2 PR9 15K_0402_1% 1 2 1 +5VALW PQ2 MMST3904-7-F_SOT323~D 3 E @ PD1 SM24_SOT23 +3VLP +5VALW PBATT1 @ EC_SMB_CK1 29,43,64 EC_SMB_DA1 29,43,64 1VSB_N_003 D 3 PR17 0_0402_5% 1 S 2VSB_N_002 2 G 1 POK 2 PR20 100_0402_5% 1 2 MOLEX_87437-1342 +3VALW 58 PR18 100_0402_5% 1 2 PC12 .1U_0402_16V7K PR15 100_0402_5% 1 2 PR14 100K_0402_1% 1 CLK_SMB DAT_SMB BATT_PRS SYS_PRES PR16 10K_0402_1% 1 2 PR13 100K_0402_1% 1 2 43,57,64 2 BATT_TEMP PC11 0.1U_0402_25V6 BAS40CW _SOT323-3 ACES_50271-00201-001 2 B+_BIAS 1 4 B+ 2 V I/O +RTC_CELL 3 V I/O 1 3 G Ground V BUS 5 1 V I/O PC10 0.22U_0603_25V7K V I/O 6 2 2 PR2 PD5 1K_0402_5% 1 2 2 @ JRTC1 1 1 2 2 3 G1 4 G2 PD2 @ 1 SI3457CDV-T1-GE3_TSOP6 6 5 2 4 1 2 1 PR12 100K_0402_1% @ IP4223CZ6_SO6-6 1 2 3 4 5 6 7 8 9 10 11 12 13 1 10K_0402_1% C PQ3 3 1 2 3 4 5 6 7 8 9 10 11 12 13 1 2 G D 1M_0402_1% 2 B PSID-1 SSM6N7002FU-2N_SOT363-6 6 2 1 @ BATT++ PC8 1000P_0402_50V7K 2 1 2 0.1U_0402_25V6 2 @ PR10 @ 43 PR8 2 PSID-2 D PC7 0.01U_0402_25V7K 1 BATT+ 1 1 2 @ @ PC5 5 PS_ID S PC6 100P_0402_50V8J 2 2 BATT++ PL5 SMB3025500YA_2P 1 2 PL3 SMB3025500YA_2P 1 2 PQ1A SSM6N7002FU-2N_SOT363-6 1 @ PR1 200K_0402_1% BATT+ 32 1M_0402_1% ACIN PR6 100K_0402_1% 1 2 1 PSID FOX_JPD113D-DB570-7F 17,29,43,47,64 4 PL2 BLM18BD102SN1D_2P 2 1 @ PQ1B @ PR7 2 4 PR5 3.3K_1206_5%~D 1 2 1 1 2 2 3 1 DC-_2 PR4 33_0402_5% 3 PSID-3 1 2 PQ7 FDV301N_NL_SOT23-3~D 1 2 DC-_1 GND_1 Erp lot6 Circuit VIN 1 6 GND_2 +DCIN_JACK 2 PC4 100P_0402_50V8J DC+_2 7 1 PC3 1000P_0402_50V7K DC+_1 GND_3 5 PC2 100P_0402_50V8J 8 DETECT GND_4 2 1 @ PJPDC1 9 1 PC1 1000P_0402_50V7K rating current = 18A www.laptopblue.vn VIN PL1 C8B BPH 853025_2P 1 2 ADPIN VSB_N_001 PQ4 2N7002KW _SOT323-3 3 3 PBATT1 battery connector (Follow VAS00) ADP_I 330W HIGH PR26 S 1 169K_0402_1% 43 1 VCIN0_PH PR27 196K_0402_1% 1 LOW 2 240W PR25 @ 12.1K_0402_1% 1 VCIN1_PH .1U_0402_16V7K PC13 11 2 43 2 1 PQ8 @ SSM3K7002FU_SC70-3 3 @ PR28 100K_0402_1% ADP_SEL D 2 G 2 43,57,64 @ PC14 1U_0603_25V6K 1 2 BATT_TEMP PR24 12.1K_0402_1% 1 Adapter +3VLP 2 PR23 110K_0402_1% @ D 2N7002KW _SOT323-3 2 G 1 PQ5 ADP_SEL PH1 100K_0402_1%_TSM0B104F4251RZ 43 2 H_PROCHOT# 1 43,6 2 +3VALW 2 43,64 PH1 under CPU botten side : CPU thermal protection at 93 +/- 3 degree C 3 S 4 4 43 Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2012/05/28 Deciphered Date 2013/05/27 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: A B C ECAGND PWR-DCIN / BATT CONN / OTP Document Number Rev 0.1 LA-9332P Friday, December 14, 2012 D Sheet 57 of 66 A B C E www.laptopblue.vn PR100 6.49K_0402_1% 1 2 1 D 2 @ PC122 @ 100P_0402_50V8J PC121 100P_0402_50V8J 1 2 +3VLP PR101 15K_0402_1% 2 1 PR106 68.1K_0402_1% 1 2 16 DRVH1 VBST2 BST_5V 18 SW1 PC111 0.1U_0603_25V7K 1 2 DRVL1 EN1 VREG5 SW1 LG_5V B++ 3 2 1 PR118 0_0603_5%~N 1 2 PC118 1U_0603_10V6K 2 1 4 PC117 0.1U_0603_25V7K 2 1 PC104 10U_0805_25V6K 2 1 2 4 @ 2 PL102 3.3UH +-20% PIMB104T-3R3MS 10A +5VALWP 1 15 5V_EN 20 LG_3V 13 12 VIN DRVL2 SW2 11 5 17 PR107 2.2_0603_5% 1 2 3 2 1 VBST1 8 SW2 4 UG_5V PC102 220U_6.3V_M 9 BST_3V TPS51225_QFN20_3X3 PR110 4.7_1206_5% 2 1 DRVH2 5 PR108 2.2_0603_5% 1 2 @ @ PC119 680P_0603_50V7K 2 1SNUB_5V 10 UG_3V PC112 0.1U_0603_25V7K 1 2 MDV1525URH 1N PDFN33-8 PQ102 19 VCLK 4 5 14 PGOOD MDU1512RH_POWERDFN56-8-5 PQ104 7 POK PC109 10U_0805_25V6K 2 1 21 PAD VO1 57 B++ 1 2 VFB1 VREG3 3 VFB2 EN2 1 2 3 @ 2 PQ103 MDV1526URH 1N PDFN33-8 PC116 PR109 680P_0603_50V7K 4.7_1206_5% 2 1 SNUB_3V 2 1 PC101 150U_B2_6.3VM_R35M + 4 5 5 CS2 6 3V_EN PL101 3.3UH_PCMB063T-3R3MS_6.5A_20% 1 2 1 FB_5V 1 2 3 @ 2 +3VALWP FB_3V PU100 PQ101 MDV1528URH 1N PDFN33-8 PC107 10U_0805_25V6K 2 1 PC110 10U_0805_25V6K 2 1 B+ PC106 2200P_0402_50V7K 2 1 PC105 0.1U_0402_25V6 2 1 PL103 1UH_NRS4018T1R0NDGJ_3.2A_30% 1 2 1 PR104 10K_0402_5% 2 1 CS1 PR105 120K_0402_1% 1 2 B++ @ PR103 0_0603_5%~N 1 2 PR102 10K_0402_5% 1 2 PC114 1U_0603_10V6K 2 1 1 1 + 2 @ VL 3 3 3VALWP TDC 6.08A Peak Current 8.11A OCP current 9.73A TYP MAX H/S Rds(on) 11.2mohm , 14mohm L/S Rds(on) 3.7mohm , 5mohm 1 3V_EN 2 PR111 0_0402_5% 1 5V_EN 2 PR112 0_0402_5% PD102 43 43 2 EC_ON 1 PR113 2.2K_0402_5% 1 2 3 USBCHG_DET_D BAS40CW_SOT323-3 PR114 0_0402_5% 1 2 43 VCOUT0_PH# PJP100 +3VALWP 1 PJP101 2 +3VALW +5VALWP 1 1 2 +5VALW PAD-OPEN 4x4m PJP102 1 2 PC120 4.7U_0603_6.3V6K PAD-OPEN 4x4m 2 1 PR116 200K_0402_1% VIN @ PR115 1M_0402_1% 1 2 2 @ PD101 LL4148_LL34-2 2 1 5VALWP TDC 11A Peak Current 16A OCP current 20A TYP MAX H/S Rds(on) 11.2mohm , 14mohm L/S Rds(on) 3.7mohm , 5mohm PAD-OPEN 4x4m 4 4 2012/05/28 Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2013/05/27 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: A B C D PWR-3VALWP/5VALWP Document Number Rev 0.1 LA-9332P Friday, December 14, 2012 Sheet E 58 of 66 5 4 3 2 www.laptopblue.vn 1 1 1.35V_B+ B 4 VTTREF_1.35V 5 +1.35VP PR205 1M_0402_1% 1 2 SUSP# 2 1 PC214 @ .1U_0402_16V7K S3_1.35V 2 1 1U_0402_6.3VX5R 10,43,56,60,61 C PR204 7.68K_0402_1% 2 1 PR207 10K_0402_1% S5_1.35V PR208 0_0402_5% 1 2 PC209 0.033U_0402_16V7~D PC211 220P_0402_50V8J 1 2 @ PC215 PC208 10U_0603_6.3V6M 3 1.35V_FB 1.35V_B+ 2 1 2 6 S3 7 8 S5 TON 9 1 FB VDDQ 2 VTT VTTREF PC207 10U_0603_6.3V6M 20 19 BOOT VLDOIN 18 17 VDDP VDD GND RT8207MZQW _W QFN20_3X3 21 1 +5VALW UGATE 16 PC210 1U_0603_10V6K PHASE 5 +3VALW VTTSNS PGOOD 1 2 11 VDD_1.35V 1.35V_SUS_PW RGD 1 SYSON 2 PR206 0_0402_5% 1 2 2 43,56,60 6 4 1 PGND CS PAD VTTGND 2 @ PR203 5.1_0603_5% +5VALW 13 CS_1.35V PC213 1U_0603_10V6K 2 1VDDP_1.35V 12 LGATE PU200 1 C 14 1 @ 2 4 PR209 100K_0402_1% 1 2 PC201 330U_2.5V_M 15 PR201 6.04K_0402_1% 1 2 D +0.675VSP SW _1.35V DL_1.35V MDU1511RH 1N POWERDFN56-8 PQ203 1 2 3 5 PC212 PR202 680P_0603_50V7K 4.7_1206_5% 2 1 SNUB_1.35V 2 1 1 1.35VP TDC 13.75A Peak Current 19.64A OCP current 23.57A TYP H/S Rds(on) :12.2mohm , L/S Rds(on) :2.7mohm , BOOT_1.35V PC206 0.22U_0603_10V7K 1 2 3 PL201 1UH_PCMB063T-1R0MS_12A_20% 1 2 + 2 DH_1.35V MDU1516URH 1N POWERDFN56-8 PQ201 1 2 1 2 1 2 PC204 0.1U_0402_25V6 @ PC205 2200P_0402_50V7K @ PC203 10U_0805_25V6K 1 2 PC202 4.7U_0805_25V6-K JUMP_43X118 D +1.35VP PR200 2.2_0603_5% 10 1 +1.35VP 1 PAD-OPEN1x1m PJP200 2 0.675Volt +/- 5% TDC 0.7A Peak Current 1A OCP Current 1.2A PJP201 VLDOIN_1.35V 2 PC216 0.1U_0402_10V7K @ 2 2 B+ 1 +1.35VP @ MAX 15mohm 3.3mohm B @ +0.675VS 2 PJP202 @ PJP203 +0.675VSP 1 1 +1.35V 2 +1.35VP PAD-OPEN 4x4m PAD-OPEN1x1m @ PJP204 1 2 PAD-OPEN 4x4m A A Compal Electronics, Inc. Compal Secret Data Security Classification 2012/05/28 Issued Date Deciphered Date 2013/05/27 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 4 3 2 Title PWR-1.35VP/0.675VSP Size Document Number Rev 0.1 LA-9332P Date: Friday, December 14, 2012 Sheet 1 59 of 66 5 4 3 2 1 www.laptopblue.vn @ 2 +1.05VP_B+ PJP300 2 1 1 B+ JUMP_43X118 1 2 PC305 10U_0805_25V6K @ D 1 @ PC304 4.7U_0805_25V6-K 2 1 @ PR300 100K_0402_5% PC303 2200P_0402_50V7K 2 1 D 5 2 PC302 0.1U_0402_25V6 2 1 +3VS 4 4 RF_+1.05VP 5 DRVH EN SW VFB V5IN TST DRVL TP 10 1 BST_+1.05VP 9 UG_+1.05VP 8 SW _+1.05VP 7 +1.05VP_5V 6 LG_+1.05VP 2 2.2_0603_5% PL301 1UH_PCMB063T-1R0MS_12A_20% 1 2 +1.05VP +5VALW PC308 1 2 1 1 FB_+1.05VP VBST TRIP + 11 1U_0603_10V6K 2 TPS51212DSCR_SON10_3X3 4 PR305 470K_0402_1% 1 PC307 0.22U_0402_16V7K 3 PGOOD PC301 330U_2.5V_M 2 @ PC309 1000P_0402_50V7K 3 2 1 2 PQ303 MDV1525URH 1N PDFN33-8 @ PR304 4.7_1206_5% SNB_1.05VP 2 @ 2 1 SUSP# 1 10,43,56,59,61 SYSON 2 43,56,59 PR302 1 2 TRIP_+1.05VP 69.8K_0402_1% EN_+1.05VP PQ301 MDV1528URH 1N PDFN33-8 5 1 @ PR303 0_0402_5% 1 2 PR308 0_0402_5% 1 2 PR301 3 2 1 PU300 PC306 .1U_0603_25V7K 2 1 C C PR306 2 4.99K_0402_1% 2 1 1 PR307 10K_0402_1% @ PJP301 B 1 +1.05V 2 PAD-OPEN 4x4m +1.05VP +1.05VP TDC 4.56A Peak Current 6.51A OCP current 7.81A TYP MAX H/S Rds(on) 23mohm , 30mohm L/S Rds(on) :10.8mohm , 13.6mohm B A A Compal Electronics, Inc. Compal Secret Data Security Classification 2012/05/28 Issued Date Deciphered Date 2013/05/27 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 4 3 2 Title PWR-+1.05VP Size Document Number Rev 0.1 LA-9332P Date: Friday, December 14, 2012 Sheet 1 60 of 66 A B C D www.laptopblue.vn 1 1 @PR400 @ PR400 2 1 +1.5VSP TDC 0.66A Peak Current 0.88A OCP current 1.06A +3VS 10K_0402_5% 1 2 @ 1 PC405 47P_0402_50V8J 2 1 2 2 1 @ 2 PR405 20K_0402_1% PC404 22U_0805_6.3V6M~N 1 2 PC403 22U_0805_6.3V6M~N 1 PC402 22P_0402_50V8J 2 1 +1.5VSP @ SNUB_1.5VSP NC SYN470DBC_DFN10_3X3 PR402 30.1K_0402_1% 2 1.5VSP_FB 2 FB EN 6 PR401 4.7_0603_5% 1 3 PC407 680P_0402_50V7K 2 2 @ PR404 47K_0402_5% PL401 1UH +-30% NRS4018T1R0NDGJ 3.2A 1 2 1.5VSP_LX SVIN 11 1 PR403 LX 2 1 1 0_0402_5% 1 2EN_1.5VSP LX PVIN PC406 .1U_0402_16V7K SUSP# 5 1 10,43,56,59,60 8 @ PC401 0.1U_0402_25V6 2 1 PC400 22U_0805_6.3V6M~N 2 2 PVIN NC 9 @ PAD-OPEN 1x2m~D TP 10 1.5VSP_VIN 7 1 4 PJP400 2 PG PU400 +3VALW @ 3 3 PJP401 +1.5VS 2 1 @ PAD-OPEN 1x2m~D +1.5VSP 4 4 Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2012/05/28 Deciphered Date 2013/05/27 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: A B C PWR-1.5VSP Document Number Rev 0.1 LA-9332P Friday, December 14, 2012 Sheet D 61 of 66 COMP FB PR525 0_0402_5% 2 2 1 FB2 33 @ 1 1 PC520 680P_0402_50V7K 10 PC504 0.1U_0402_25V6 2 1 PC506 10U_0805_25V6K 2 1 PC503 10U_0805_25V6K 2 1 PC502 10U_0805_25V6K 2 1 63 @ SNB_CPU_P1 62 ISEN1 ISEN1 63 V2N V2N @PR518 @ PR518 1_0402_5% 1 2 63 V3N V3N @PR520 @ PR520 1_0402_5% 1 2 63 V4N V4N @PR522 @ PR522 1_0402_5% 1 2 ISUMP 1 2 PR516 10_0402_1% 1 2 5 MDU1516URH 1N POWERDFN56-8 5 3 2 1 MDU1516URH 1N POWERDFN56-8 1 5 3 2 1 5 PC507 680P_0603_50V7K V1N PR513 10K_0603_1% 2 1 ISUMN 62,63 62,63 C DRCTRL PR528 0_0402_5% 1 1 VCC_core (Base on PDDG rev 0.8) TDC 33A Peak Current 95A DC Load line -1.5mV/A Icc_Dyn_VID1 60A OCP current 114A DCR 0.82m ohm 2CPU_B+ +5VS 2 1 2 PC515 1U_0603_10V6K PC522 0.15U_0603_16V7K 1 2 PR543 11K_0402_1% 1 2 VCCSENSE PC530 1 2 0.01U_0402_50V7K 10 PC528 1 @ 2 330P_0402_50V7K 0.082U_0402_16V7K @ PC526 1 2 ISUMN PC529 0.22U_0402_6.3V6K 2 1 PC531 .1U_0402_16V7K 2 1 +VCC_CORE V1N PC523 0.068U_0603_16V7K 1 2 PC527 0.22U_0402_6.3V6K 2 1 VSSSENSE PR544 PH501 10KB_0402_5%_ERTJ0ER103J 1 2 2.61K_0402_1% 1 2 ISUMP ISUMN ISUMP 62,63 A ISUMN 62,63 Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2012/05/28 2013/05/27 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: 5 2 PC521 0.15U_0402_10V6K 1 2 PC524 0.22U_0402_6.3V6K 2 1 A 3 B PR541 0_0402_5% 1 2 PC525 0.22U_0402_6.3V6K 2 1 @ PWM4 63 PWM3 63 PWM2 63 2 1 2.87K_0402_1% PR539 2K_0402_1% @ PC518 39P_0402_50V8J 4 P1_SW PR537 357_0402_1% 1 PR534 2 PR536 0_0402_5% 2 PC517 1 33P_0402_50V8J 2 301_0402_1% PC516 4700P_0402_50V7K~D 1 30.9K_0402_1% 1 2 2 FB 1 2 2 1 PC519 PR535 4700P_0402_50V7K~D 909_0402_1% 1 2 @ PC514 100P_0402_50V8J 2 1 PR533 1 PQ504 PL501 0.22UH +-20% PCMB104T-R22MS 35A 4 1 PWM1 ISL95816HRTZ-T_QFN32_4X4 PR540 1.5K_0402_1% 2 PR532 2 1 24 23 22 21 20 19 18 17 PR531 1_0402_1% 1 @ 2 1200P_0402_50V7K B EP 9 10 11 12 13 14 15 16 FB2 2 PC513 1 2 PWM4 PWM3 PWM2 NC PWM1 PHASE1 DRCTRL VIN 2 1 COMP VR_ON PGOOD IMON VR_HOT# NTC COMP FB FB2 PR530 0_0402_5% 1 2 1 PC512 1 39P_0402_50V8J ISEN1 1 +5VALW @PC511 @ PC511 39P_0402_50V8J 2 62 PC500 2 1 PR517 10K_0402_1% 1 2 PC510 0.22U_0603_25V7K NTC 3.83K_0402_1% PH500 470K_0402_5%_ TSM0B474J4702RE PR529 27.4K_0402_1% 2 1 @PR527 @ PR527 0_0402_5% 2 ISEN2 PQ503 4 1 2 2 0_0402_5% 1 @PR526 @ PR526 1 PC509 47P_0402_50V8J +1.05VS ISEN3 LGATE1 @ B+ D SCLK ALERT# SDA SLOPE PROG1 PROG2 PROG3 DRSEL 1 2 3 4 5 6 7 8 VCC_PGOOD IMON 2VR_HOT#1 2 VR_HOT# 1 63 5 ISL6208BCRZ-T_QFN8_2X2 ISEN4 ISEN3 ISEN2 ISEN1 RTN ISUMN ISUMP VDD PR538 0_0402_5% 1 2 PR524 63 PHASE1 PL500 FBMA-L11-453215-800LMA90T_1812 1 2 ISUMN SDA ALERT# SCLK PU500 1 ISEN4 LGATE BOOT1 8 IMVP_PWRGD PR523 100K_0402_1% 2 1 63 GND TP 2 @ 1 2 PR515 3.65K_0603_1% 1.91K_0402_1% 1 0.01U_0402_50V7K 43 PWM PHASE UGATE1 2 VR_EN 0_0402_5% PC508 1 2 C 4 9 FCCM BOOT 1 32 31 30 29 28 27 26 25 17,43,6 3 UGATE 4 ISUMP PR521 2 +3VS 7 PWM1 PR512 10K_0402_1% 1 2 1 PR519 IMVP_VR_ON DRCTRL PR509 102K_0402_1% 1 2 VCC PQ502 PR514 4.7_1206_5% 2 1 VIDSCLK PR507 21K_0402_1% 1 2 CPU_B+ 3 2 1 10 4 PU501 6 54.9_0402_1% 1 PR502 2.2_0603_5% 3 2 1 43 VIDALERT_N PR505 154K_0402_1% 1 2 PR508 0_0402_5% 1 2 PR510 0_0402_5% 1 2 PR511 0_0402_5% 1 2 VIDSOUT 10 75_0402_5% 1 @ PQ501 2 PR504 2 PR506 2 10 130_0402_1% 1 PC501 0.22U_0603_16V7K 1U_0603_10V6K 2 @ D PR503 0_0402_5% PR500 2 1 +VCCIO_OUT PR501 4.12K_0402_1% 1 2 1 www.laptopblue.vn 2 +5VS 2 PC505 2200P_0402_50V7K 2 1 3 MDU1511RH 1N POWERDFN56-8 4 MDU1511RH 1N POWERDFN56-8 5 4 3 2 PWR_VCORE_ISL95816 Document Number Rev 0.1 LA-9332P Friday, December 14, 2012 Sheet 1 62 of 66 5 4 3 2 1 CPU_B+ www.laptopblue.vn 2 V1N V1N @ PR552 1_0402_5% 1 2 62,63 V3N V3N @ PR553 1_0402_5% 1 2 62,63 V4N V4N @ PR554 1_0402_5% 1 2 3 2 1 4 100U_25V_M PC536 100U_25V_M PC537 PC535 ISUMN 62,63 62,63 PC548 10U_0805_25V6K 2 1 PC547 10U_0805_25V6K 2 1 PC546 10U_0805_25V6K 2 1 5 4 @ 3 P3_SW 2 +VCC_CORE V3N PR557 10K_0603_1% 2 1 @ SNB_CPU_P3 ISEN3 ISEN3 62,63 V1N V1N @ PR561 1_0402_5% 1 2 62,63 V2N V2N @ PR562 1_0402_5% 1 2 62,63 V4N V4N @ PR563 1_0402_5% 1 2 62 2 ISL6208BCRZ-T_QFN8_2X2 PR551 10_0402_1% 62,63 1 2 PR559 3.65K_0603_1% PQ512 ISUMP PQ511 ISEN2 2 ISEN2 ISUMN 1 62 @ PC551 680P_0603_50V7K LGATE3 1 5 2 LGATE +VCC_CORE V2N PL503 0.22UH +-20% PCMB104T-R22MS 35A 4 1 PR558 4.7_1206_5% 1 GND TP PHASE3 + 2 PR548 10K_0603_1% 2 1 @ SNB_CPU_P2 2 4 9 8 5 PWM PHASE BOOT3 3 2 1 3 PWM3 UGATE3 2 4 MDU1511RH 1N POWERDFN56-8 62 1 UGATE FCCM BOOT 5 VCC 7 3 2 1 PU503 6 2 1 C MDU1516URH 1N POWERDFN56-8 4 PQ509 MDU1511RH 1N POWERDFN56-8 PR556 2.2_0603_5% + CPU_B+ 3 2 1 5 1 1 @ PQ510 2 PC545 2 1 1U_0603_10V6K 2 PR555 0_0402_5% 1 PC544 0.22U_0603_16V7K MDU1516URH 1N POWERDFN56-8 2 +5VS 2 1 100U_25V_M PC534 3 P2_SW ISUMP C + D PL502 0.22UH +-20% PCMB104T-R22MS 35A 4 1 @ 100U_25V_M PC540 10U_0805_25V6K 2 1 PC539 10U_0805_25V6K 2 1 PC538 10U_0805_25V6K 2 1 5 4 1 PR560 10_0402_1% 3 2 1 4 2 ISUMN 1 ISL6208BCRZ-T_QFN8_2X2 + @ 1 2 PR550 3.65K_0603_1% PQ508 ISUMP PQ507 1 LGATE2 2 PHASE2 5 PC543 680P_0603_50V7K LGATE BOOT2 MDU1511RH 1N POWERDFN56-8 PWM PHASE GND TP UGATE2 2 8 5 4 9 1 UGATE FCCM BOOT 3 2 1 PWM2 VCC 4 MDU1511RH 1N POWERDFN56-8 62 3 5 7 3 2 1 PU502 6 MDU1516URH 1N POWERDFN56-8 4 1 PQ506 PR549 4.7_1206_5% 2 1 PR547 2.2_0603_5% CPU_B+ 3 2 1 1 1 @ PQ505 2 PC532 2 1 1U_0603_10V6K 2 PR546 0_0402_5% 1 D PC533 0.22U_0603_16V7K 5 2 MDU1516URH 1N POWERDFN56-8 +5VS ISUMN 62,63 B B A PC556 10U_0805_25V6K 2 1 PC555 10U_0805_25V6K 2 1 PC554 10U_0805_25V6K 2 1 MDU1516URH 1N POWERDFN56-8 5 4 @ 3 2 +VCC_CORE V4N PR566 10K_0603_1% 2 1 @ SNB_CPU_P4 62 62,63 62,63 62,63 ISEN4 ISEN4 V1N V1N @ PR570 1_0402_5% 1 2 V2N V2N @ PR571 1_0402_5% 1 2 V3N @ PR572 1_0402_5% 1 2 V3N ISUMP PR569 10_0402_1% 3 2 1 4 P4_SW 2 ISL6208BCRZ-T_QFN8_2X2 PQ516 ISUMN 1 PQ515 1 2 PR568 3.65K_0603_1% LGATE4 ISUMP 5 @ PL504 0.22UH +-20% PCMB104T-R22MS 35A 4 1 1 LGATE PHASE4 2 GND TP 8 PC559 680P_0603_50V7K 4 9 PWM PHASE UGATE4 BOOT4 5 3 1 2 3 2 1 PWM4 UGATE FCCM BOOT MDU1511RH 1N POWERDFN56-8 62 VCC 5 7 3 2 1 PU504 6 4 PR567 4.7_1206_5% 2 1 2 4 MDU1511RH 1N POWERDFN56-8 PR565 2.2_0603_5% 62,63 CPU_B+ PQ513 3 2 1 1 5 @ PQ514 1 PC552 0.22U_0603_16V7K 1U_0603_10V6K PC553 2 PR564 0_0402_5% 1 2 1 2 +5VS MDU1516URH 1N POWERDFN56-8 ISUMP A ISUMN 62,63 62,63 Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2012/05/28 Deciphered Date 2013/05/27 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Title PWR_VCORE_ISL6208 Size 5 4 3 2 Document Number Rev 0.1 LA-9332P Date: Friday, December 14, 2012 Sheet 1 63 of 66 B 4 2 PC707 2200P_0402_50V7K 2 1 1 1 PC706 0.1U_0603_25V7K 2 1 PC705 4.7U_0805_25V6-K 2 1 PC704 4.7U_0805_25V6-K 2 1 PQ711 DDTC115EUA-7-F_SOT323 2 3 2 1 5 MDU1516URH 1N CSON 17 15 VFB VFB 12 GND 1 PR734 16 NC 29 4 2 @ SNUB_CHG 1 @ BATT+ 100_0402_5% TP @ 3 PC726 1 2 0.22U_0603_25V7K ISL88731CHRTZ-T_QFN28_5X5~D @ PC731 1 2 @ 0.1U_0402_25V6 @ 1 + 2 MXM_CUR_VIN+ MXM_CUR_VIN- @ B+ 4 2 3 29 MXM1_CUR_VIN+ MXM1_CUR_VIN- Deciphered Date 30 4 30 Title Date: C B+ Compal Electronics, Inc. 2013/05/27 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B + 2 Compal Secret Data 2012/05/28 PL704 FBMA-L11-453215800LMA90T_2P 1 2 1 29 Security Classification Issued Date 1 100U 25V M 3 PR741 0.004_1206_1% B+_MXM1 PC739 2 PL703 FBMA-L11-453215800LMA90T_2P 1 2 100U 25V M + 2 4 PC738 PC737 + 2 1 1 100U 25V M PQ716A SSM6N7002FU-2N_SOT363-6 6 2 1 BATT_TEMP PC736 1 100U 25V M V1 A PC723 10U_0805_25V5K~D 2 1 CE 19 18 PC722 10U_0805_25V5K~D 2 1 PGND CSOP PQ714 DL_CHG BATT+ 3 PR731 10_0402_5% 1 VREF 20 2 LGATE 1 3 EAO 2 2 LX_CHG PR728 4.7_1206_5% 23 PR725 PL702 0.01_1206_1% 5.6UH_PCMB104T-5R6MS_8A_20% 1 2 CHG 1 4 PC719 680P_0402_50V7K DH_CHG PR740 0.004_1206_1% 43,57,64 1 PC711 0.1U_0402_25V6K PR709 1 10_0402_5% 2 PR708 1 10_0402_5% 27 24 EAI B+_MXM PQ718B PR737 DMN66D0LDW-7 2N SOT363-6 3.3K_1206_5%~D 1 2 3 5 4 ACOFF VDDP_LDO FBO 5 PC728 0.1U_0402_10V7K 2 1 PR739 33K_0402_1% 2 1 PC708 PHASE 21 @ VIN 43,64 1 UGATE VICM For DT Mode 4 VDDP NC 7 ISL8731_ICREF 2 2 PR738 33K_0402_1% 2 1 PC735 0.01U_0402_25V7K 2 1 PR736 PR735 33K_0402_1% 33K_0402_1% 2 1 2 1 2 PR730 4.7K_0402_5% 2 1 2 1 PC733 0.01U_0402_25V7K 2 1 PC732 .1U_0402_16V7K ISL8731_REF 4 SDA V1 2 1U_0603_10V6K SCL 8 @ 2 VDDSMB 14 ISL8731_REF 1 MDV1525URH 1N @ PR724 0_0402_5% 2 1 28 BOOT 9 2 PQ701 25 BST ACOK 10 PR711 PC716 ACIN 3 2 1 @ PR722 0_0402_5% 2 1 2BST_CHGA 5 2 0.1U_0603_25V7K 1 2 26 ICOUT VIN 100K_0402_1% 1 PC709 1U_0603_10V6K PR716 0_0603_5% 1 CSSN ACSETIN DCIN 4 @ PR705 200K_0402_1% 1 2 PR710 47K_0402_1% PC715 CSSP PU700 22 ISL8731_EAJ ADP_I @ PR713 4.7_0603_5% 1 2 DCIN 1 5 CHG_B+ ISL8731_ICREF 6 3 SI7149DP PQ704 3 2 1 PR721 158K_0402_1% 2 1 PC717 0.1U_0402_10V7K 2 1 EC_SMB_DA1 PC713 0.047U_0603_25V7M 1 2 ICREF 2 VIN 11 29,43,57 Back_G2 1 2 3 2 0.1U_0402_25V6K 1 2 1 PC712 1U_0603_25V6K PR715 232K_0402_1% 4 PR712 10_1206_1% 1 2 13 EC_SMB_CK1 Back_G1 Dis_G +5VALW 29,43,57 4 4 B+ PL701 1UH_PCMB053T-1R0MS_7A_20% 1 2 1 3 PQ716B SSM6N7002FU-2N_SOT363-6 PC710 1 PR719 2 49.9K_0402_1% CV = 13.3V CSIN PC703 5600P_0402_25V7K 1 2 2 1 2 3 CC = 3.52A (Normal) 5 PC721 10U_0805_25V5K~D 2 1 4 0.1U_0402_10V7K 2 1 @ PC714 1000P_0402_50V7K 1 2 1 3 5 BATT_TEMP PR729 100_0402_1% 43,57 4 2 1 2 3 CSIP 1 2 3 4 6 2 1 BATT_TEMP PQ718A DMN66D0LDW-7 2N SOT363-6 ACOFF PQ713 DDTC115EUA-7-F_SOT323 1 2 10K_0402_5% 4 ACIN ACIN PR723 2 PC702 0.1U_0603_25V7K 1 PR720 1 P2 PQ710B PR717 DMN66D0LDW-7 2N SOT363-6 100K_0402_1% 2 1VDDP_LDO 6 3 5 200K_0402_5% 17,29,43,47,57 1 2 1 Back_G2 @ 2 ACIN PR703 0.005 +-1% 2512 PR707 150K_0402_1% 43,57,64 1 2 3 5 P3 SI7149DP PQ706 www.laptopblue.vn ADP_I = 19.9*Iadapter*Rsense 1 2 PQ710A DMN66D0LDW-7 2N SOT363-6 1 2 3 2 PQ709 DDTC115EUA-7-F_SOT323 1 PQ707 PDTA144EU PNP_SOT323 V1 Iada=0~4.62A(90W) 5 1 Back_G1 PR704 200K_0402_1% 2 1 1 2 3 PR702 200K_0402_1% 4 5 P3 SI7149DP PQ703 P2 1 2 3 D P2 PQ705 SI7149DP 2 PQ702 SI7149DP C VIN PC720 10U_0805_25V5K~D 2 1 A VIN PWR-Charger Document Number Rev 0.1 LA-9332P Friday, December 14, 2012 D Sheet 64 of 66 5 4 3 Based on PDDG rev 0.8 Table 5-1. 2 www.laptopblue.vn +VCC_CORE +VCC_CORE 1 D 1 2 1 PC900 10U_0805_4VAM 2 1 2 1 1 PC901 10U_0805_4VAM 1 PC909 10U_0805_4VAM 2 2 1 PC902 10U_0805_4VAM 1 PC910 10U_0805_4VAM 2 2 1 PC903 10U_0805_4VAM 1 PC911 10U_0805_4VAM 2 2 1 PC912 10U_0805_4VAM 2 1 + PC904 10U_0805_4VAM 2 PC905 330U_D2_2.5VY_R9M + 2 1 + PC906 330U_D2_2.5VY_R9M 2 1 + PC907 330U_D2_2.5VY_R9M 2 1 PC908 + 330U_D2_2.5VY_R9M 2 D PC915 330U_D2_2.5VY_R9M 1 PC913 10U_0805_4VAM 2 PC914 10U_0805_4VAM +VCC_CORE 1 2 C 1 PC917 22U_0805_6.3VAM 2 1 2 1 PC922 22U_0805_6.3VAM 2 1 2 2 2 2 2 2 2 2 2 PC921 22U_0805_6.3VAM C 1 PC925 22U_0805_6.3VAM 1 PC937 22U_0805_6.3VAM 1 PC941 22U_0805_6.3VAM 2 1 PC920 22U_0805_6.3VAM 1 PC924 22U_0805_6.3VAM 1 PC936 22U_0805_6.3VAM 1 PC940 22U_0805_6.3VAM 2 1 PC919 22U_0805_6.3VAM 1 PC923 22U_0805_6.3VAM 1 PC935 22U_0805_6.3VAM 1 2 1 PC918 22U_0805_6.3VAM 2 PC926 22U_0805_6.3VAM 1 PC938 22U_0805_6.3VAM 2 PC939 22U_0805_6.3VAM 1 PC942 22U_0805_6.3VAM 2 PC943 22U_0805_6.3VAM B B A A Compal Electronics, Inc. Compal Secret Data Security Classification 2012/05/28 Issued Date Deciphered Date 2013/05/27 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 4 3 2 Title PWR_PROCESSOR DECOUPLING Size Document Number Rev 0.1 LA-9332P Date: Friday, December 14, 2012 Sheet 1 65 of 66 5 4 Version change list (P.I.R. List) Item 3 2 www.laptopblue.vn Reason for change Rev. PG# 1 Page 1 of 1 for PWR Modify List Date Phase 1 Adjust 1.5V output volatge P61 change PR402 to 30.1K_0402_1% PR405 to 20K_0402_1% 2012.7.30 SSI 2 Adjust 3.3V OCP seeting P58 change PR105 to 120K_0402_1%. 2012.7.30 SSI 3 Adjust 3V/5V always OTP seeting P58 modify PD100 to PR114 0_0402_1%. 2012.7.30 SSI 4 Adjust Vcore OTP seeting P62 PR531 connect to +5VS 2012.7.30 SSI 5 Add PD3 PD4 for EMD requirement P57 add PD3 PD4 to PESD24VS2UT_SOT23-3 2012.8.16 SSI 6 hiccup mode issue is not happen so we haven't need solution. P57 remove Erp lot6 Circuit 2012.8.16 SSI 7 change diode for EMI requirement P57 use PD2 (6 PIN) to combine combine PD3(2PIN) PD4(2PIN ). 2012.8.31 SSI 8 adjust the component for the 88731 schematic P64 change PR722 and PR724 to short footprint remove PR701 PR706 PC701 PC734 PR732 2012.9.10 SSI 9 adjust RTC circuit for safety concern P57 add PR2 1K_0402_5% 2012.9.10 SSI 10 change ACIN bead for current limit rating P57 change PL1 PL4 to C8B BPH 853025_2P 2012.9.10 SSI 11 add PR116 for 3v 5v_EN delay time solution P58 add PR116 402K_0402_1% 2012.9.18 SSI 12 change output choke to improve efficiency P59 change PL201 to 1UH_PCMC063T-1R0MN 2012.9.18 SSI 13 change PR500 value to meet INTEL SPEC. P62 change PR500 to 130_0402_1%~D 2012.10.4 SSI D C D C P67 B B 14 15 16 17 A A DELL CONFIDENTIAL/PROPRIETARY Compal Electronics, Inc. Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. PWR_PIR 1 Size 4 3 2 Rev 0.1 LA-7902P Date: 5 Document Number Friday, December 14, 2012 Sheet 1 66 of 66 www.laptopblue.vn www.s-manuals.com