Scilab Textbook Companion for
Microprocessor Architecture, Programming &
Applications with the 8085
by R. S. Goankar1
Created by
Rishabh Jain
B.Tech
Electronics Engineering
Dr. A.P.J. Abdul Kalam Technical University
College Teacher
None
Cross-Checked by
K. V. P. Pradeep
July 31, 2019
1 Funded
by a grant from the National Mission on Education through ICT,
http://spoken-tutorial.org/NMEICT-Intro. This Textbook Companion and Scilab
codes written in it can be downloaded from the ”Textbook Companion Project”
section at the website http://scilab.in
Book Description
Title: Microprocessor Architecture, Programming & Applications with the
8085
Author: R. S. Goankar
Publisher: Penram International, Mumbai
Edition: 4
Year: 1999
ISBN: 978-81-900828-7-7
1
Scilab numbering policy used in this document and the relation to the
above book.
Exa Example (Solved example)
Eqn Equation (Particular equation of the above book)
AP Appendix to Example(Scilab Code that is an Appednix to a particular
Example of the above book)
For example, Exa 3.51 means solved example 3.51 of this book. Sec 2.3 means
a scilab code whose theory is explained in Section 2.3 of the book.
2
Contents
List of Scilab Codes
4
2 Microprocessor Architecture and Microcomputer Systems
6
3 8085 Microprocessor Architecture And Memory Interfacing 13
6 Introduction To 8085 Instructions
19
7 Programming Techniques With Additional Instructions
29
9 Stack And Subroutines
48
10 Code Conversion BCD Arithmetic and 16 bit Data Operations
54
12 Interrupts
67
14 Programmable Interface Devices
71
15 General Purpose Programmable Peripheral Devices
74
19 Appendix A Number System
89
3
List of Scilab Codes
Exa
Exa
Exa
Exa
Exa
Exa
Exa
Exa
Exa
Exa
2.1
2.2
2.3
2.4
2.5
3.2
3.3
3.5
3.6
6.1
Exa 6.2
Exa 6.3
Exa 6.4
Exa 6.5
Exa
Exa
Exa
Exa
Exa
Exa
Exa
6.6
6.7
6.8
6.9
7.1
7.2
7.3
Exa 7.4
Exa 7.5
Exa 7.6
MEMORY ADDRESS RANGE . . . . . . .
MEMORY ADDRESS RANGE . . . . . . .
CALCULATING ADDRESS LINES . . . .
CALCULATING NO OF CHIPS . . . . . .
FETCHING AN INSTRUCTION . . . . . .
EXECUTING THE INSTRUCTION . . . .
TIME REQUIRED FOR EXECUTION . .
MEMORY ADDRESS RANGE OF 6116 . .
MEMORY ADDRESS RANGE OF 8155 . .
LOAD A DATA TO ONE REGISTER AND
MOVE IT TO ANOTHER . . . . . . . . . .
TO SWITCH ON SOME DEVICES . . . .
ADDITION OF TWO NUMBERS . . . . .
CONTINUATION OF PREVIOUS EXAMPLE . . . . . . . . . . . . . . . . . . . . . .
INCRIMENTING ACCUMULATOR CONTENT . . . . . . . . . . . . . . . . . . . . .
SUBTRACTION OF TWO NUMBERS . .
PERFORMING LOGICAL OPERATIONS
KEEPING THE RADIO ON . . . . . . . .
TURN OFF THE AIR CONDITIONER . .
STEPS TO ADD 10 BYTES OF DATA . .
LOADING 16 BIT NUMBER . . . . . . . .
TRANSFER OF DATA BYTES TO ACCUMULATOR . . . . . . . . . . . . . . . . . .
USE OF ADDRESSING MODES . . . . . .
INCREMENT A NUMBER . . . . . . . . .
ARITHEMETIC OPERATIONS . . . . . .
4
6
7
9
10
11
13
14
15
16
19
19
21
21
22
23
25
26
27
29
30
31
32
34
36
Exa
Exa
Exa
Exa
Exa
Exa
Exa
Exa
7.7
7.8
7.9
7.10
7.11
9.1
9.2
9.3
Exa
Exa
Exa
Exa
Exa
10.1
10.2
10.3
10.4
10.5
Exa 10.6
Exa 10.7
Exa 10.8
Exa
Exa
Exa
Exa
12.1
12.2
12.3
14.1
Exa 14.2
Exa 15.1
Exa 15.2
Exa 15.3
Exa 15.4
Exa 15.5
Exa 15.6
Exa 15.8
Exa 19.1
INCREMENT AND DECREMENT . . . .
37
LEFT ROTATION RLC OF BITS . . . . .
39
LEFT ROTATION RAL OF BITS . . . . .
41
RIGHT ROTATION RRC AND RAR OF BITS 43
COMPARISION OF DATA . . . . . . . . .
44
PUSH POP AND DELAY INSTRUCTIONS 48
EXCHANGE OF DATA USING STACK . .
49
EXCHANGE INFORMATION BETWEEN STACK
AND PROGRAM COUNTER . . . . . . . .
53
BCD TO BINARY . . . . . . . . . . . . . .
54
ADDITION OF PACKED BCD NUMBERS
55
EXCHANGE OF DATA . . . . . . . . . . .
57
ADDITION OF TWO 16 BIT NUMBERS .
57
SUBTRACTION OF TWO 16 BIT NUMBERS . . . . . . . . . . . . . . . . . . . . .
59
DISPLAY CONTENTS OF STACK . . . .
62
SUBROUTINE TO SET THE ZERO FLAG
63
TRANSFER A PROGRAM TO AN ADDRESS
IN HL REGISTER . . . . . . . . . . . . . .
64
ENABLE INTERRUPTS . . . . . . . . . .
67
RESET INTERRUPT . . . . . . . . . . . .
68
CHECK PENDING INTERRUPT . . . . .
68
INITIALIZE HYPOTHETICAL CHIP AS OUTPUT BUFFER . . . . . . . . . . . . . . . .
71
ADDRESS DETERMINATION OF GIVEN
FIGURE . . . . . . . . . . . . . . . . . . . .
72
PORT ADDRESS CONTROL WORD ADDRESS AND READ THE DIP SWITCHES
74
BSR CONTROL WORD SUBROUTINE . .
75
INSTRUCTIONS TO GENERATE A PULSE
FROM COUNTER 0 . . . . . . . . . . . . .
78
INSTRUCTIONS TO GENERATE SQUARE
WAVE PULSE FROM COUNTER 1 . . . .
79
SUBROUTINE TO GENERATE AN INTERRUPT . . . . . . . . . . . . . . . . . . . . .
83
EXPLANATION OF INSTRUCTIONS . . .
84
INITIALIZATION INSTRUCTIONS FOR DMA 85
BINARY INTO HEX AND OCTAL . . . .
89
5
Exa
Exa
Exa
Exa
Exa
Exa
Exa
Exa
19.2
19.3
19.4
19.5
19.6
19.7
19.8
19.9
SUBTRACTION OF TWO NUMBERS . .
SUBTRACTION OF TWO NUMBERS . .
2s COMPLIMENT OF BINARY NUMBER
SUBTRACTION OF TWO NUMBERS . .
SUBTRACTION OF TWO NUMBERS . .
SUBTRACTION OF UNSIGNED NUMBERS
SUBTRACTION OF SIGNED NUMBERS .
ADDITION OF TWO POSITIVE NUMBERS
6
89
91
93
94
95
95
97
98
List of Figures
2.1
2.2
2.3
2.4
2.5
MEMORY ADDRESS RANGE . . .
MEMORY ADDRESS RANGE . . .
CALCULATING ADDRESS LINES
CALCULATING NO OF CHIPS . .
FETCHING AN INSTRUCTION . .
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8
10
10
11
12
3.1
3.2
3.3
3.4
EXECUTING THE INSTRUCTION . .
TIME REQUIRED FOR EXECUTION
MEMORY ADDRESS RANGE OF 6116
MEMORY ADDRESS RANGE OF 8155
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14
15
16
18
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
6.9
LOAD A DATA TO ONE REGISTER AND MOVE
ANOTHER . . . . . . . . . . . . . . . . . . . . . . .
TO SWITCH ON SOME DEVICES . . . . . . . . .
ADDITION OF TWO NUMBERS . . . . . . . . . .
CONTINUATION OF PREVIOUS EXAMPLE . . .
INCRIMENTING ACCUMULATOR CONTENT . .
SUBTRACTION OF TWO NUMBERS . . . . . . .
PERFORMING LOGICAL OPERATIONS . . . . .
KEEPING THE RADIO ON . . . . . . . . . . . . .
TURN OFF THE AIR CONDITIONER . . . . . . .
IT TO
. . . .
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20
20
22
22
24
25
27
27
28
7.1
7.2
STEPS TO ADD 10 BYTES OF DATA . . . . . . . . . . .
LOADING 16 BIT NUMBER . . . . . . . . . . . . . . . . .
30
31
7
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7.3
7.4
7.5
7.6
7.7
7.8
7.9
7.10
7.11
7.12
TRANSFER OF DATA BYTES TO ACCUMULATOR
USE OF ADDRESSING MODES . . . . . . . . . . . .
USE OF ADDRESSING MODES . . . . . . . . . . . .
INCREMENT A NUMBER . . . . . . . . . . . . . . .
ARITHEMETIC OPERATIONS . . . . . . . . . . . .
INCREMENT AND DECREMENT . . . . . . . . . . .
LEFT ROTATION RLC OF BITS . . . . . . . . . . .
LEFT ROTATION RAL OF BITS . . . . . . . . . . .
RIGHT ROTATION RRC AND RAR OF BITS . . . .
COMPARISION OF DATA . . . . . . . . . . . . . . .
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33
35
35
36
38
40
42
43
45
47
9.1
9.2
9.3
PUSH POP AND DELAY INSTRUCTIONS . . . . . . . . .
49
EXCHANGE OF DATA USING STACK . . . . . . . . . . .
52
EXCHANGE INFORMATION BETWEEN STACK AND PROGRAM COUNTER . . . . . . . . . . . . . . . . . . . . . . .
53
10.1
10.2
10.3
10.4
10.5
10.6
10.7
10.8
BCD TO BINARY . . . . . . . . . . . . . . . . . . . . . . .
ADDITION OF PACKED BCD NUMBERS . . . . . . . . .
EXCHANGE OF DATA . . . . . . . . . . . . . . . . . . . .
ADDITION OF TWO 16 BIT NUMBERS . . . . . . . . . .
SUBTRACTION OF TWO 16 BIT NUMBERS . . . . . . .
DISPLAY CONTENTS OF STACK . . . . . . . . . . . . .
SUBROUTINE TO SET THE ZERO FLAG . . . . . . . . .
TRANSFER A PROGRAM TO AN ADDRESS IN HL REGISTER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
55
56
58
60
62
63
65
12.1 ENABLE INTERRUPTS . . . . . . . . . . . . . . . . . . .
12.2 RESET INTERRUPT . . . . . . . . . . . . . . . . . . . . .
12.3 CHECK PENDING INTERRUPT . . . . . . . . . . . . . .
68
69
70
66
14.1 INITIALIZE HYPOTHETICAL CHIP AS OUTPUT BUFFER 72
14.2 ADDRESS DETERMINATION OF GIVEN FIGURE . . . .
73
15.1 PORT ADDRESS CONTROL WORD ADDRESS AND READ
THE DIP SWITCHES . . . . . . . . . . . . . . . . . . . . .
76
15.2 BSR CONTROL WORD SUBROUTINE . . . . . . . . . . .
78
15.3 INSTRUCTIONS TO GENERATE A PULSE FROM COUNTER
0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
80
8
15.4 INSTRUCTIONS TO GENERATE SQUARE WAVE PULSE
FROM COUNTER 1 . . . . . . . . . . . . . . . . . . . . . .
15.5 SUBROUTINE TO GENERATE AN INTERRUPT . . . . .
15.6 EXPLANATION OF INSTRUCTIONS . . . . . . . . . . . .
15.7 INITIALIZATION INSTRUCTIONS FOR DMA . . . . . .
15.8 INITIALIZATION INSTRUCTIONS FOR DMA . . . . . .
19.1
19.2
19.3
19.4
19.5
19.6
19.7
19.8
19.9
BINARY INTO HEX AND OCTAL . . . . . .
SUBTRACTION OF TWO NUMBERS . . .
SUBTRACTION OF TWO NUMBERS . . .
2s COMPLIMENT OF BINARY NUMBER .
SUBTRACTION OF TWO NUMBERS . . .
SUBTRACTION OF TWO NUMBERS . . .
SUBTRACTION OF UNSIGNED NUMBERS
SUBTRACTION OF SIGNED NUMBERS . .
ADDITION OF TWO POSITIVE NUMBERS
9
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82
84
86
88
88
90
91
93
94
95
96
97
99
100
Chapter 2
Microprocessor Architecture
and Microcomputer Systems
Scilab code Exa 2.1 MEMORY ADDRESS RANGE
1 // p a g e no 39
2 // e x a m p l e no 2 . 1
3 //MEMORY ADDRESS RANGE.
4 clc ;
5 printf ( ’ A7−A0 a r e
address
6
7
8
9
10
11
12
13
lines for register
select
. \n ’ ) ;
printf ( ’ A15−A8 a r e a d d r e s s l i n e s f o r c h i p s e l e c t . \n
\n ’ ) ;
printf ( ’ A15 A14 A13 A12 A11 A10 A9 A8 \n ’ ) ;
printf ( ’ 0 0
0
0
0
0
0 0
=00H \n \n ’ ) ;
// c h i p s e l e c t b i t s have t o be a c t i v e low a l w a y s
to s e l e c t that chip .
printf ( ’ A7 A6 A5 A4 A3 A2 A1 A0 \n ’ ) ;
printf ( ’ 0 0 0 0 0 0 0 0
=00H \n ’ ) ; // t h i s
s e l e c t s the r e g i s t e r 00.
printf ( ’ The a b o v e c o m b i n a t i o n s e l e c t s t h e memory
a d d r e s s 0 0 0 0H . \n \n ’ ) ;
printf ( ’ A15 A14 A13 A12 A11 A10 A9 A8 \n ’ ) ;
printf ( ’ 0 0
0
0
0
0
0 0
=00H \n \n ’ ) ;
10
14
15
16
17
18
19
20
21
22
23
24
25
// c h i p s e l e c t b i t s have t o be a c t i v e low a l w a y s
to s e l e c t that chip .
printf ( ’ A7 A6 A5 A4 A3 A2 A1 A0 \n ’ ) ;
printf ( ’ 1 1 1 1 1 1 1 1
=FFH \n ’ ) ; // t h i s
s e l e c t s t h e r e g i s t e r FF .
printf ( ’ The a b o v e c o m b i n a t i o n s e l e c t s t h e memory
a d d r e s s 00FFH . \n \n ’ ) ;
// t h u s t h i s c h i p can s e l e c t any memory l o c a t i o n from
0 0 0 0H t o 00FFH .
// t h e memory a d d r e s s e d o f t h e c h i p can be c h a n g e d by
m o d i f y i n g t h e h a r d w a r e . For e x a m p l e i f we remove
t h e i n v e r t e r on l i n e A15 .
printf ( ’ A15 A14 A13 A12 A11 A10 A9 A8 \n ’ ) ;
printf ( ’ 1 0
0
0
0
0
0 0
=80H \n \n ’ ) ;
// c h i p s e l e c t b i t s have t o be a c t i v e low a l w a y s
to s e l e c t that chip .
printf ( ’ A7 A6 A5 A4 A3 A2 A1 A0 \n ’ ) ;
printf ( ’ 0 0 0 0 0 0 0 0
=00H \n ’ ) ; // t h i s
s e l e c t s the r e g i s t e r 00.
printf ( ’ The a b o v e c o m b i n a t i o n s e l e c t s t h e memory
a d d r e s s 8 0 0 0H . \n \n ’ ) ;
// The memory a d d r e s s r a n g e from a b o v e c h a n g e w i l l be
8 0 0 0H t o 80FFH .
// Thus a memory can be a s s i g n e d a d d r e s s i n v a r i o u s
l o c a t i o n s o v e r t h e e n t i r e map o f 0 0 0 0H t o FFFFH .
Scilab code Exa 2.2 MEMORY ADDRESS RANGE
1 // p a g e no 41
2 // e x a m p l e no 2 . 2
3 //MEMORY ADDRESS RANGE.
4 clc ;
5 printf ( ’ A9−A0 a r e
address
11
lines for register
select
Figure 2.1: MEMORY ADDRESS RANGE
12
6
7
8
9
10
11
12
13
14
15
16
17
18
. \n ’ ) ;
printf ( ’ A15−A10 a r e a d d r e s s l i n e s f o r c h i p s e l e c t . \
n \n ’ ) ;
printf ( ’ A15 A14 A13 A12 A11 A10 \n ’ ) ;
printf ( ’ 0 0
0
0
0 0 \n \n ’ ) ; // c h i p s e l e c t
b i t s have t o be a c t i v e low a l w a y s t o s e l e c t t h a t
chip .
printf ( ’ A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 \n ’ ) ;
printf ( ’ 0 0 0 0 0 0 0 0 0 0 \n ’ ) ; // t h i s
s e l e c t s the r e g i s t e r
printf ( ’ The a b o v e c o m b i n a t i o n s e l e c t s t h e memory
a d d r e s s 0 0 0 0H . \n \n ’ ) ;
printf ( ’ A15 A14 A13 A12 A11 A10 \n ’ ) ;
printf ( ’ 0 0
0
0
0 0 \n \n ’ ) ; // c h i p s e l e c t
b i t s have t o be a c t i v e low a l w a y s t o s e l e c t t h a t
chip .
printf ( ’ A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 \n ’ ) ;
printf ( ’ 1 1 1 1 1 1 1 1 1 1 \n ’ ) ; // t h i s
s e l e c t s the r e g i s t e r
printf ( ’ The a b o v e c o m b i n a t i o n s e l e c t s t h e memory
a d d r e s s 03FFH . \n \n ’ ) ;
// t h u s t h i s c h i p can s e l e c t any memory l o c a t i o n from
0 0 0 0H t o 03FFH .
// t h e memory a d d r e s s e d o f t h e c h i p can be c h a n g e d by
m o d i f y i n g t h e h a r d w a r e . L i k e we d i d i n t h e
p r e v i o u s example .
Scilab code Exa 2.3 CALCULATING ADDRESS LINES
1 // p a g e no 43
2 // e x a m p l e no 2 . 3
3 //CALCULATING ADDRESS LINES
4 clc ;
13
Figure 2.2: MEMORY ADDRESS RANGE
Figure 2.3: CALCULATING ADDRESS LINES
5 // number o f a d d r e s s l i n e s a r e g i v e n by x
6 x ={ log (8192) }/{ log (2) };
7 printf ( ’ Number o f a d d r e s s l i n e s = ’ )
8 disp ( x ) ;
Scilab code Exa 2.4 CALCULATING NO OF CHIPS
1
2
3
// p a g e no 43
// e x a m p l e no 2 . 4
//CALCULATING NO OF CHIPS .
14
Figure 2.4: CALCULATING NO OF CHIPS
4 clc ;
5 // c h i p 1 0 2 4 ∗ 1 h a s 1 0 2 4 ( 1 k )
r e g i s t e r s & each r e g i s t e r
can s t o r e one b i t w i t h one d a t a l i n e . We n e e d 8
d a t a l i n e s f o r b y t e s i z e memory . T h e r e f o r e 8
c h i p s a r e n e c e s s a r y f o r 1 k b y t e memory . For 1 k
b y t e memory we w i l l n e e d 64 c h i p s . We can a r r i v e
a t t h e same a n s by d i v i d i n g 8 k b y t e by 1 k ∗1 a s
follows :
6 no =(8192*8) /(1024*1) ;
7 printf ( ’ No o f c h i p s= ’ ) ;
8 disp ( no ) ;
Scilab code Exa 2.5 FETCHING AN INSTRUCTION
1 // p a g e no 44
2 // e x a m p l e no 2 . 5
3 //FETCHING AN INSTRUCTION .
4 clc ;
5 printf ( ’ Memory L o c a t i o n 2 0 0 5H= 4FH \n ’ ) ;
6 printf ( ’ A d d r e s s bus= 2 0 0 5H \n ’ ) // program c o u n t e r
p l a c e s t h e 16− b i t a d d r e s s on t h e a d d r e s s bus .
7 printf ( ’ C o n t r o l bus−−> (MEMR) \n ’ ) ; // c o n t r o l bus
s e n d s memory r e a d c o n t r o l s i g n a l .
8 printf ( ’ Data bus= 4FH \n ’ ) ; // i n s t r u c t i o n 4FH i s
f e t c h e d and t r a n s f e r r e d t o i n s t r u c t i o n d e c o d e r .
15
Figure 2.5: FETCHING AN INSTRUCTION
16
Chapter 3
8085 Microprocessor
Architecture And Memory
Interfacing
Scilab code Exa 3.2 EXECUTING THE INSTRUCTION
1 // p a g e no 78
2 // e x a m p l e no 3 . 2
3 //EXECUTING THE INSTRUCTION .
4 clc ;
5 A =82; // c o n t e n t s o f t h e a c c u m u l a t o r .
6 printf ( ’ A c c u m u l a t o r= ’ ) ;
7 disp ( A ) ;
8 TR = A ; // c o n t e n t s o f t h e a c c u m u l a t o r t r a n f e r r e d t o
9
10
11
12
13
the temporary r e g i s t e r .
printf ( ’ Temporary R e g i s t e r= ’ ) ;
disp ( TR ) ;
C = TR ; // c o n t e n t s o f t h e t e m p o r a r y r e g i s t e r a r e
t r a n s f e r r e d to r e g i s t e r C.
printf ( ’ R e g i s t e r C= ’ ) ;
disp ( C ) ;
17
Figure 3.1: EXECUTING THE INSTRUCTION
Scilab code Exa 3.3 TIME REQUIRED FOR EXECUTION
1 // p a g e no 82
2 // e x a m p l e no 3 . 3
3 //TIME REQUIRED FOR EXECUTION .
4 clc ;
5 A =32; // MVI A, 3 2H l o a d s t h e v a l u e 32 i n a c c u m u l a t o r
6
7
8
9
10
11
12
13
14
15
16
17
18
.
printf ( ’ A c c u m u l a t o r= ’ ) ;
disp ( A ) ;
// c a l c u l a t i n g t h e e x e c u t i o n t i m e f o r i n s t r u c t i o n .
f =2; // c l o c k f r e q u n c y .
printf ( ’ c l o c k f r e q u e n c y= %f MHz \n ’ ,f ) ;
t =1/ f ; // T−s t a t e=c l o c k p e r i o d
printf ( ’T−s t a t e=c l o c k p e r i o d= %f m i c r o s e c \n ’ ,t ) ;
t1 =4* t ; // e x e c u t i o n t i m e f o r o p c o d e f e t c h .
printf ( ’ E x e c u t i o n t i m e f o r o p c o d e f e t c h= %f m i c r o s e c
\n ’ , t1 ) ;
t2 =3* t ; // e x e c u t i o n t i m e f o r memory r e a d .
printf ( ’ E x e c u t i o n t i m e f o r memory r e a d= %f m i c r o s e c
\n ’ , t2 ) ;
t3 =7* t ; // e x e c u t i o n t i m e f o r i n s t r u c t i o n .
printf ( ’ E x e c u t i o n t i m e f o r i n s t r u c t i o n = %f m i c r o s e c
18
Figure 3.2: TIME REQUIRED FOR EXECUTION
\n ’ , t3 ) ;
Scilab code Exa 3.5 MEMORY ADDRESS RANGE OF 6116
1 // // p a g e no 91
2 // e x a m p l e no 3 . 5
3 //MEMORY ADDRESS RANGE OF 6 1 1 6 .
4 clc ;
5 printf ( ’ A10−A0 a r e
address l i n e s
6
7
8
9
10
11
12
for register
s e l e c t . \n ’ ) ;
printf ( ’ A15−A11 a r e a d d r e s s l i n e s f o r c h i p s e l e c t . \
n \n ’ ) ;
printf ( ’ A15 A14 A13 A12 A11 \n ’ ) ;
printf ( ’ 1 0
0
0
1 \n \n ’ ) ; // c h i p s e l e c t
b i t s have t o be a c t i v e low a l w a y s t o s e l e c t t h a t
chip .
printf ( ’ A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 \n ’ ) ;
printf ( ’ 0
0 0 0 0 0 0 0 0 0 0 \n ’ ) ; //
t h i s s e l e c t s the r e g i s t e r
printf ( ’ The a b o v e c o m b i n a t i o n s e l e c t s t h e memory
a d d r e s s 8 8 0 0H . \n \n ’ ) ;
printf ( ’ A15 A14 A13 A12 A11 \n ’ ) ;
19
Figure 3.3: MEMORY ADDRESS RANGE OF 6116
13
14
15
16
17
printf ( ’ 1 0
0
0
1 \n \n ’ ) ; // c h i p s e l e c t
b i t s have t o be a c t i v e low a l w a y s t o s e l e c t t h a t
chip .
printf ( ’ A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 \n ’ ) ;
printf ( ’ 1
1 1 1 1 1 1 1 1 1 1 \n ’ ) ; //
t h i s s e l e c t s the r e g i s t e r
printf ( ’ The a b o v e c o m b i n a t i o n s e l e c t s t h e memory
a d d r e s s 88FFH . \n \n ’ ) ;
// t h u s t h i s c h i p can s e l e c t any memory l o c a t i o n from
8 8 0 0H t o 88FFH .
Scilab code Exa 3.6 MEMORY ADDRESS RANGE OF 8155
1
2
// // p a g e no 95
// e x a m p l e no 3 . 6
20
3 //MEMORY ADDRESS RANGE OF 8 1 5 5 .
4 clc ;
5 printf ( ’ A7−A0 a r e a d d r e s s l i n e s
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
for register
select .
\n ’ ) ;
printf ( ’ A10−A8 a d d r e s s l i n e s a r e d o n t c a r e
c o n d i t i o n s . \n ’ ) ;
printf ( ’ A15−A11 a r e a d d r e s s l i n e s f o r c h i p s e l e c t . \
n \n ’ ) ;
printf ( ’ A15 A14 A13 A12 A11 \n ’ ) ;
printf ( ’ 0 0
1
0
0 \n \n ’ ) ; // c h i p s e l e c t
b i t s have t o be a c t i v e low a l w a y s t o s e l e c t t h a t
chip .
printf ( ’ A10 A9 A8 \n ’ ) ;
printf ( ’ 0 0 1 \n \n ’ ) ; // t h i s i s t h e don ’ t c a r e
condition .
printf ( ’ A7 A6 A5 A4 A3 A2 A1 A0 \n ’ ) ;
printf ( ’ 0 0 0 0 0 0 0 0 \n ’ ) ; // t h i s s e l e c t s
the r e g i s t e r
printf ( ’ The a b o v e c o m b i n a t i o n s e l e c t s t h e memory
a d d r e s s 2 1 0 0H . \n \n ’ ) ;
printf ( ’ A15 A14 A13 A12 A11 \n ’ ) ;
printf ( ’ 0 0
1
0
0 \n \n ’ ) ; // c h i p s e l e c t
b i t s have t o be a c t i v e low a l w a y s t o s e l e c t t h a t
chip .
printf ( ’ A10 A9 A8 \n ’ ) ;
printf ( ’ 0 0 1 \n \n ’ ) ; // t h i s i s t h e don ’ t c a r e
condition .
printf ( ’ A7 A6 A5 A4 A3 A2 A1 A0 \n ’ ) ;
printf ( ’ 1 1 1 1 1 1 1 1 \n ’ ) ; // t h i s s e l e c t s
the r e g i s t e r
printf ( ’ The a b o v e c o m b i n a t i o n s e l e c t s t h e memory
a d d r e s s 21FFH . \n \n ’ ) ;
// t h u s t h i s c h i p can s e l e c t any memory l o c a t i o n from
2 1 0 0H t o 21FFH .
21
Figure 3.4: MEMORY ADDRESS RANGE OF 8155
22
Chapter 6
Introduction To 8085
Instructions
Scilab code Exa 6.1 LOAD A DATA TO ONE REGISTER AND MOVE IT TO ANOTHER
1
2
3
4
5
6
7
// p a g e no 164
// e x a m p l e no 6 . 1
//LOAD A DATA TO ONE REGISTER AND MOVE IT TO ANOTHER
.
clc ;
A = hex2dec ([ ’ 82 ’ ]) ; // s t o r i n g t h e d e c i m a l v a l u e o f
h e x a d e c i m a l no 82 i n a c c u m u l a t o r A
B = dec2hex ([ A ]) ; // s t o r i n g t h e h e x a d e c i m a l v a l u e o f A
in B
print ( %io (2) ,B ) ; // d i s p l a y i n g t h e h e x a d e c i m a l number
in r e g i s t e r B
Scilab code Exa 6.2 TO SWITCH ON SOME DEVICES
23
Figure 6.1: LOAD A DATA TO ONE REGISTER AND MOVE IT TO
ANOTHER
Figure 6.2: TO SWITCH ON SOME DEVICES
1
2
3
4
5
6
7
8
9
10
11
// p a g e no 164
// e x a m p l e 6 . 2
//TO SWITCH ON SOME DEVICES
// l e t t h e s w i t c h e s which a r e ON a r e a t b i t no D0 , D1 ,
D2 , D3 , D6 ;
clc ;
x = hex2dec ([ ’ 4F ’ ]) ; // h e x a d e c i m a l t o d e c i m a l
conversion
y = dec2bin ( x ) ; // d e c i m a l t o b i n a r y c o n v e r s i o n
printf ( ’ At o u t p u t p o r t 01H : ’ ) ; // same i n p u t a p p e a r s
at the putput
disp ( y ) ;
printf ( ’ V a l u e 1 s a r e s h o w i n g t h e d e v i c e s a r e ON. \n ’
)
printf ( ’ V a l u e 0 s a r e s h o w i n g t h e d e v i c e s a r e
s w i t c h e d OFF . ’ ) ;
24
Scilab code Exa 6.3 ADDITION OF TWO NUMBERS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
// p a g e no 174
// e x a m p l e 6 . 3
//ADDITION OF TWO NUMBERS.
// 93H i s s t o r e d i n a c c u m u l a t o r . C o n v e r t i n g i t i n t o
decimal .
clc ;
A = hex2dec ([ ’ 93 ’ ]) ;
//B7H i s s t o r e d i n r e g i s t e r C . C o n v e r t i n g i t i n t o
decimal .
C = hex2dec ([ ’ B7 ’ ]) ;
X = A + C ; // t h e r e s u l t comes o u t t o be 330
Z =X -256;
//X=330; // t h i s i s a d e c i m a l v a l u e . C o n v e r t i n g i t
into hexadecimal
Y = dec2hex ( Z ) ;
printf ( ’ Sum= ’ )
disp ( Y ) ;
if X >255 then
printf ( ’CY=1 ’ )
else
printf ( ’CY=0 ’ )
end
Scilab code Exa 6.4 CONTINUATION OF PREVIOUS EXAMPLE
1
2
3
// p a g e no 175
// e x a m p l e 6 . 4
//CONTINUATION OF PREVIOUS EXAMPLE.
25
Figure 6.3: ADDITION OF TWO NUMBERS
Figure 6.4: CONTINUATION OF PREVIOUS EXAMPLE
4 // t h e sum o f p r e v i o u s e x a m p l e i s added t o 35H
5 clc ;
6 S = hex2dec ([ ’ 4A ’ ]) ; // 4AH i s c o n v e r t e d i n t o d e c i m a l
7
8
9
10
11
12
13
14
15
16
value .
A = hex2dec ([ ’ 35 ’ ]) ; // 35H i s c o n v e r t e d i n t o d e c i m a l
value
s = A + S ; // t h e r e s u l t comes o u t t o be 1 2 7 . i t i s a
decimal value
Y = dec2hex ( s ) ;
printf ( ’ Sum= ’ )
disp ( Y ) ;
if s >255 then
printf ( ’CY=1 ’ )
else
printf ( ’CY=0 ’ )
end
26
Scilab code Exa 6.5 INCRIMENTING ACCUMULATOR CONTENT
1 // p a g e no 175
2 // e x a m p l e no 6 . 5
3 //INCRIMENTING ACCUMULATOR CONTENT.
4 // a c c u m u l a t o r h o l d s t h e d a t a FFH
5 clc ;
6 A = hex2dec ([ ’ FF ’ ]) ; // c o n v e r t i n g FFH i n t o d e c i m a l
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
value
// d e c i m a l v a l u e o f 01H i s 0 1 . Adding 01 t o A
Y = A +1; // t h e r e s u l t comes o u t t o be 256
Z =Y -256;
X = dec2hex ( Z ) ;
printf ( ’ Sum = ’ )
disp ( X ) ;
if Y >255 then
printf ( ’CY=1 \n ’ )
else
printf ( ’CY=0 \n ’ )
end
if Z >127 then
printf ( ’ S=1 \n ’ )
else
printf ( ’ S=0 \n ’ )
end
if Z >0 then
printf ( ’ Z=0 \n ’ )
else
printf ( ’ Z=1 \n ’ )
end
Scilab code Exa 6.6 SUBTRACTION OF TWO NUMBERS
27
Figure 6.5: INCRIMENTING ACCUMULATOR CONTENT
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
// p a g e no 179
// e x a m p l e 6 . 6
//SUBTRACTION OF TWO NUMBERS.
// a c c u m u l a t o r h a s 97H . C o n v e r t i n g i t i n t o d e c i m a l
value
clc ;
A = hex2dec ([ ’ 97 ’ ]) ;
// r e g i s t e r B h a s 65H . F i n d i n g 2 ’ s c o m p l i m e n t o f 65H .
B = hex2dec ([ ’ 65 ’ ]) ;
X =256 - B ;
Y=A+X;
S =Y -256;
Z = dec2hex ( S ) ;
printf ( ’ S u b t r a c t i o n= ’ )
disp ( Z ) ;
if Y >255 then
CY =1;
printf ( ’ The r e s u l t i s p o s i t i v e . \n ’ ) ;
else
CY =0;
printf ( ’ The r e s u l t i s n e g a t i v e . \n ’ )
end
if S >127 then
printf ( ’ S=1 \n ’ )
else
printf ( ’ S=0 \n ’ )
end
if S >0 then
28
Figure 6.6: SUBTRACTION OF TWO NUMBERS
28
printf ( ’ Z=0 \n ’ )
29 else
30
printf ( ’ Z=1 \n ’ )
31 end
Scilab code Exa 6.7 PERFORMING LOGICAL OPERATIONS
1 // p a g e no 185
2 // e x a m p l e no 6 . 7
3 //PERFORMING LOGICAL OPERATIONS .
4 // r e g i s t e r B h o l d s 93H . B i n a r y o f 93H i s 1 0 0 1 0 0 1 1
5 // r e g i s t e r A h o l d s 15H . B i n a r y o f 15H i s 0 0 0 1 0 1 0 1 .
6 clc ;
7 B =[1 0 0 1 0 0 1 1]; // t a k i n g t h e v a l u e o f A i n
8
9
10
11
12
13
14
15
m a t r i x form .
A =[0 0 0 1 0 1 0 1]; // t a k i n g t h e v a l u e o f B i n
m a t r i x form .
Y = bitor (A , B ) ; // g e t t i n g OR o f A & B
printf ( ’OR o f A & B i s ’ )
disp ( Y ) ;
if Y (1 ,1) ==1 then
printf ( ’ S=1 \n ’ ) ;
else
printf ( ’ S=0 \n ’ ) ;
29
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
end
if Y ==0 then
printf ( ’ Z=1 \n ’ ) ;
else
printf ( ’ Z=0 \n ’ ) ;
end
printf ( ’CY=0 \n ’ ) ;
R = bitxor (A , B ) ; // g e t t i n g XOR o f A & B
printf ( ’XOR o f A & B i s ’ )
disp ( R ) ;
if R (1 ,1) ==1 then
printf ( ’ S=1 \n ’ ) ;
else
printf ( ’ S=0 \n ’ ) ;
end
if R ==0 then
printf ( ’ Z=1 \n ’ ) ;
else
printf ( ’ Z=0 \n ’ ) ;
end
printf ( ’CY=0 \n ’ ) ;
K = bitcmp (A ,1) ; // g e t t i n g t h e c o m p l i m e n t o f A
printf ( ’ Compliment o f A i s : \n ’ ) ;
disp ( K ) ;
Scilab code Exa 6.8 KEEPING THE RADIO ON
// p a g e no 186
// e x a m p l e no 6 . 8
//KEEPING THE RADIO ON.
// t o k e e p t h e r a d i o on w i t h o u t a f f e c t i n g t h e o t h e r
a p p l i a n c e s , t h e D4 b i t s h o u l d a l w a y s be 1
5 // a s s u m i n g an i n p u t i n p u t b i n a r y 1 0 1 0 1 0 1 0
1
2
3
4
30
Figure 6.7: PERFORMING LOGICAL OPERATIONS
Figure 6.8: KEEPING THE RADIO ON
6
7
8
9
clc ;
A =[1 0 1 0 1 0 1 0];
B =[0 0 0 1 0 0 0 0];
Y = bitor (A , B ) ; // ORing i n p u t (A) w i t h B t o k e e p t h e
D4 b i t a l w a y s s e t
10 disp ( Y ) ;
11 printf ( ’ D4 b i t w i l l a l w a y s be one w i t h o u t a f f e c t i n g
the o t h e r b i t s ’ );
Scilab code Exa 6.9 TURN OFF THE AIR CONDITIONER
31
Figure 6.9: TURN OFF THE AIR CONDITIONER
1
2
3
4
5
6
7
8
9
10
11
// p a g e no 187
// e x a m p l e no 6 . 9
//TURN OFF THE AIR CONDITIONER .
// t o t u r n OFF t h e a i r c o n d i t i o n e r , r e s e t b i t D7
// Assuming t h e same i n p u t a s e a r l i e r a s i t i s a
c o n t i n u a t i o n o f p r e v i o u s example .
clc ;
A =[1 0 1 0 1 0 1 0];
B =[0 1 1 1 1 1 1 1];
Y = bitand (A , B ) ; // ANDing i n p u t (A) w i t h B t o k e e p t h e
D4 b i t a l w a y s s e t
disp ( Y ) ;
printf ( ’ D7 b i t w i l l a l w a y s be z e r o w i t h o u t a f f e c t i n g
the o t h e r b i t s ’ );
32
Chapter 7
Programming Techniques With
Additional Instructions
Scilab code Exa 7.1 STEPS TO ADD 10 BYTES OF DATA
1 // p a g e no 216
2 // e x a m p l e no 7 . 1
3 //STEPS TO ADD 10 BYTES OF DATA.
4 clc ;
5 disp ( ’ The m i c r i p r o c e s s o r n e e d s : ’ ) ;
6 disp ( ’ a c o u n t e r t o c o u n t 10 d a t a b y t e s ’ ) ;
7 disp ( ’ an i n d e x o r a memory p o i n t e r t o l o c a t e where
8
9
10
11
12
data b y t e s a r e s t o r e d ’ );
disp ( ’ t o t r a n s f e r d a t a from a memory l o c a t i o n t o t h e
m i c r o p r o c e s s o r ’ );
disp ( ’ t o p e r f o r m a d d i t i o n ’ ) ;
disp ( ’ r e g i s t e r s f o r t e m p o r a r y s t o r a g e o f p a r t i a l
answers ’ );
disp ( ’ a f l a g t o i n d i c a t e t h e c o m p l e t i o n o f t h e t a s k ’
);
disp ( ’ t o s t o r e o r o u t p u t t h e r e s u l t ’ ) ;
33
Figure 7.1: STEPS TO ADD 10 BYTES OF DATA
Scilab code Exa 7.2 LOADING 16 BIT NUMBER
1 // p a g e no 219
2 // e x a m p l e no 7 . 2
3 //LOADING 16−BIT NUMBER.
4 // w o r k i n g o f LXI i n s t r u c t i o n .
5 clc ;
6 disp ( ’ LXI H, 2 0 5 0H ’ ) ; // l o a d s HL r e g i s t e r p a i r .
7 disp ( ’ L=50H ’ ) ; // 50H i n L r e g i s t e r .
8 disp ( ’H=20H ’ ) ; // 20H i n H r e g i s t e r p a i r .
9 disp ( ’ LXI i n s t r u c t i o n t a k e s 3 b y t e s o f memory and 10
10
11
12
13
14
clock periods . ’)
// w o r k i n g o f MVI i n s t r u c t i o n .
disp ( ’MVI H, 2 0H ’ ) ;
disp ( ’H=20H ’ ) ; // l o a d 20H i n r e g i s t e r H .
disp ( ’MVI L , 5 0H ’ ) ; // l o a d 50H i n r e g i s t e r L .
disp ( ’ L=50H ’ ) ;
34
Figure 7.2: LOADING 16 BIT NUMBER
15
disp ( ’ 2 MVI i n s t r u c t i o n s t a k e 4 b y t e s o f memory and
14 c l o c k p e r i o d s . ’ )
Scilab code Exa 7.3 TRANSFER OF DATA BYTES TO ACCUMULATOR
1 // p a g e no 220
2 // e x a m p l e no 7 . 3
3 // TRANSFER OF DATA BYTES TO ACCUMULATOR.
4 // Memory l o c a t i o n 2 0 5 0H h a s t h e d a t a F7H .
5 clc ;
6
7 // u s i n g MOV i n s t r u c t i o n .
8 // i n d i r e c t a d d r e s s i n g mode .
9 disp ( ’ LXI H, 2 0 5 0H ’ ) ;
35
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
printf ( ’H=20H
L=50H \n \n ’ ) ; // t h e 16− b i t a d d r e s s
o f t h e d a t a i s l o a d e d i n HL r e g i s t e r p a i r .
M = hex2dec ([ ’ F7 ’ ]) ; // M i s t h e memory l o c a t i o n
p o i n t e r o f a d d r e s s 2 0 5 0H .
printf ( ’MOV A,M \n ’ ) ;
A = dec2hex ( M ) ;
printf ( ’A= ’ ) ;
disp ( A ) ; // t h e c o n t e n t s o f t h e HL r e g i s t e r p a i r a r e
u s e d a s memory p o i n t e r t o t h e l o c a t i o n 2 0 5 0H .
// u s i n g LDAX i n s t r u c t i o n .
// i n d i r e c t a d d r e s s i n g mode .
disp ( ’ LXI B, 2 0 5 0H ’ ) ;
printf ( ’B=20H
C=50H \n \n ’ ) ; // t h e 16− b i t a d d r e s s
o f t h e d a t a i s l o a d e d i n BC r e g i s t e r p a i r .
M = hex2dec ([ ’ F7 ’ ]) ; // M i s t h e memory l o c a t i o n
p o i n t e r o f a d d r e s s 2 0 5 0H .
printf ( ’LDAX B \n ’ ) ;
A = dec2hex ( M ) ;
printf ( ’A= ’ ) ;
disp ( A ) ; // t h e c o n t e n t s o f t h e BC r e g i s t e r p a i r a r e
u s e d a s memory p o i n t e r t o t h e l o c a t i o n 2 0 5 0H .
26
27
28
29
// u s i n g LDA i n s t r u c t i o n .
// d i r e c t a d d r e s s i n g mode .
printf ( ’ \n LDA 2 0 5 0H \n ’ ) ; // d i r e c t l y s e n d s t h e d a t a
o f memory l o c a t i o n 2 0 5 0H t o a c c u m u l a t o r .
30 printf ( ’A= ’ ) ;
31 disp ( A ) ;
Scilab code Exa 7.4 USE OF ADDRESSING MODES
1
// p a g e no 222
36
Figure 7.3: TRANSFER OF DATA BYTES TO ACCUMULATOR
2 // e x a m p l e no 7 . 4
3 // USE OF ADDRESSING MODES.
4 clc ;
5 // r e g i s t e r B c o n t a i n s 32H
6 B =32;
7
8 // u s i n g i n d i r e c t a d d r e s s i n g modes
9 printf ( ’B= %d \n ’ ,B ) ;
10 disp ( ’ 1 ) LXI H, 8 0 0 0H ’ ) ; // l o a d s HL r e g i s t e r p a i r .
11 disp ( ’H=80H
L=00H ’ ) ;
12 disp ( ’MOV M, B ’ ) ; // c o n t e n t s o f r e g i s t e r B a r e moved
i n memory l o c a t i o n p o i n t e d by HL r e g i s t e r p a i r .
13 M = B ;
14 printf ( ’ \n 8 0 0 0H −−> %d \n \n ’ ,M ) ;
15
16 disp ( ’ LXI D, 8 0 0 0H ’ ) ; // l o a d s t h e memory l o c a t i o n
17
18
8 0 0 0H i n DE r e g i s t e r p a i r .
disp ( ’D=80H
E=00H ’ ) ;
disp ( ’MOV A, B ’ ) ;
37
19 A = B ;
20 printf ( ’A= %d \n ’ ,A ) ;
21 disp ( ’STAX D ’ ) ; // s t o r e s
the value of accumulator in
t h e memory l o c a t i o n p o i n t e r by DE r e g i s t e r p a i r .
22 printf ( ’ \n 8 0 0 0H −−> %d \n \n ’ ,A ) ;
23
24
25
26
// u s i n g d i r e c t a d d r e s s i n g mode .
disp ( ’ 2 ) A= F2H ’ ) ;
disp ( ’STA 8 0 0 0H ’ ) ; // t h i s i n s t r u c t i o n s t o r e s t h e
v a l u e o f a c c u m u l a t o r i n t h e memory l o c a t i o n 8 0 0 0H
.
27 disp ( ’ 8 0 0 0H −−> F2H ’ ) ;
28
29
30
31
32
33
// u s i n g i n d i r e c t a d d r e s s i n g mode .
disp ( ’ 3 ) LXI H, 8 0 0 0H ’ ) ; // l o a d s HL r e g i s t e r p a i r .
disp ( ’H=80H
L=00H ’ ) ;
disp ( ’MVI M, F2H ’ ) ; // moving t h e d a t a i n t h e memory .
disp ( ’ 8 0 0 0H −−> F2H ’ ) ;
Scilab code Exa 7.5 INCREMENT A NUMBER
1 // p a g e no 224
2 // e x a m p l e no 7 . 5
3 // INCREMENT A NUMBER.
4 clc ;
5 disp ( ’ LXI B, 2 0 5 0H ’ ) ; // l o a d s t h e d a t a 2 0 5 0H i n BC
register pair .
6 disp ( ’B=20H
C=50H ’ ) ;
7 B =20;
8 C =50;
9 disp ( ’ INX B ’ ) ;
38
Figure 7.4: USE OF ADDRESSING MODES
Figure 7.5: USE OF ADDRESSING MODES
39
Figure 7.6: INCREMENT A NUMBER
10 C = C +1;
11 printf ( ’B= %d C= %d \n ’ ,B , C ) ;
12 disp ( ’ The c o n t e n t s o f BC r e g i s t e r
p a i r w i l l be 2 0 5 1H
’ );
13 disp ( ’ INR B ’ ) ;
14 B = B +1;
15 printf ( ’B= %d \n ’ ,B ) ;
16 disp ( ’ INR C ’ ) ;
17 C =50;
18 C = C +1;
19 printf ( ’C= %d \n ’ ,C ) ;
20 disp ( ’ The c o n t e n t s o f BC r e g i s t e r
’ );
40
p a i r w i l l be 2 1 5 1H
Scilab code Exa 7.6 ARITHEMETIC OPERATIONS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
// p a g e no 228
// e x a m p l e no 7 . 6
// ARITHEMETIC OPERATIONS .
clc ;
disp ( ’A−−>30H ’ ) ;
disp ( ’ 2 0 4 0H−−>68H ’ ) ;
disp ( ’ 2 0 4 1H−−>7FH ’ ) ;
disp ( ’ LXI H, 2 0 4 0H ’ ) ; // l o a d s HL r e g i s t e r p a i r .
disp ( ’H=20H
L=40H
M=68H ’ ) ;
disp ( ’ADD M’ ) ;
A = hex2dec ([ ’ 30 ’ ]) ;
M = hex2dec ([ ’ 68 ’ ]) ;
S = A + M ; // a d d s t h e c o n t e n t s o f A and d a t a a t memory
l o c a t i o n 2 0 4 0H .
s = dec2hex ( S ) ;
printf ( ’ \n C o n t e n t o f A a f t e r a d d i t i o n w i t h 2 0 4 0H= ’
);
disp ( s ) ;
disp ( ’ INX H ’ ) ; // t a k e s t h e program t o t h e n e x t
memory l o c a t i o n .
disp ( ’H=20H
L=41H
M=7FH ’ ) ;
disp ( ’SUB M’ ) ;
M = hex2dec ([ ’ 7F ’ ]) ;
D =S - M ; // s u b t r a c t s t h e c o n t e n t s o f A from t h e d a t a
a t memory l o c a t i o n 2 0 4 1H .
d = dec2hex ( D ) ;
printf ( ’ \n C o n t e n t o f A a f t e r s u b t r a c t i o n w i t h 2 0 4 1H
= ’ );
disp ( d ) ;
Scilab code Exa 7.7 INCREMENT AND DECREMENT
41
Figure 7.7: ARITHEMETIC OPERATIONS
42
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
// p a g e no 229
// e x a m p l e no 7 . 7
// INCREMENT & DECREMENT.
clc ;
disp ( ’ LXI H, 2 0 4 0H ’ ) ; // l o a d s HL r e g i s t e r p a i r .
disp ( ’H=20H
L=40H ’ ) ;
disp ( ’MVI M, 5 9H ’ ) ;
M =59;
M = hex2dec ([ ’ 59 ’ ]) ;
disp ( ’ 2 0 4 0H−−>59H ’ )
disp ( ’ INR M’ ) ;
M = M +1; // i n c r e m e n t s t h e v a l u e a t t h e memory
l o c a t i o n by 1 .
m = dec2hex ( M ) ;
printf ( ’ \n C o n t e n t o f 2 0 4 0H a f t e r i n c r e m e n t= ’ ) ;
disp ( m ) ;
disp ( ’ INX H ’ ) ; // t a k e s t h e program t o t h e n e x t
memory l o c a t i o n .
disp ( ’H=20H
L=41H ’ ) ;
disp ( ’MVI M, 9 0H ’ ) ;
M =90;
M = hex2dec ([ ’ 90 ’ ]) ;
disp ( ’ 2 0 4 1H−−>90H ’ ) ;
disp ( ’DCR M’ ) ;
M =M -1; // d e c r e m e n t s t h e v a l u e a t t h e memory l o c a t i o n
by 1 .
m = dec2hex ( M ) ;
printf ( ’ \n C o n t e n t o f 2 0 4 1H a f t e r d e c r e m e n t= ’ ) ;
disp ( m ) ;
Scilab code Exa 7.8 LEFT ROTATION RLC OF BITS
1
// p a g e no 233
43
Figure 7.8: INCREMENT AND DECREMENT
44
2 // e x a m p l e no 7 . 8
3 // LEFT ROTATION (RLC) OF BITS .
4 clc ;
5 // i n i t i a l l y
6 printf ( ’ A c c u m u l a t o r= AAH \n ’ ) ;
7 printf ( ’ D7 D6 D5 D4 D3 D2 D1 D0 \n ’ ) ;
8 printf ( ’ 1 0 1 0 1 0 1 0
=AAH \n \n ’ ) ;
9 printf ( ’CY= 0 \n \n ’ ) ;
10 printf ( ’RLC \n \n ’ ) ;
11 printf ( ’CY= 1 \n \n ’ ) ;
12 // c a r r y f l a g i s s e t b e c a u s e D7 b i t was 1 .
13 printf ( ’ D7 D6 D5 D4 D3 D2 D1 D0 \n ’ ) ;
14 printf ( ’ 0 1 0 1 0 1 0 1
=55H \n \n ’ ) ; //
15
16
17
18
19
20
21
a f t e r t h e e x e c u t u i o n o f f i r s t RLC .
// RLC i n s t r u c t i o n p l a c e s D7 b i t i n CY f l a g a s w e l l
a s i n D0 b i t .
printf ( ’RLC \n \n ’ ) ;
printf ( ’CY= 0 \n \n ’ ) ;
// c a r r y f l a g i s r e s e t b e c a u s e D7 b i t was 0 .
printf ( ’ D7 D6 D5 D4 D3 D2 D1 D0 \n ’ ) ;
printf ( ’ 1 0 1 0 1 0 1 0
=AAH \n \n ’ ) ; //
a f t e r t h e e x e c u t u i o n o f s e c o n d RLC .
// RLC i n s t r u c t i o n p l a c e s D7 b i t i n CY f l a g a s w e l l
a s i n D0 b i t .
Scilab code Exa 7.9 LEFT ROTATION RAL OF BITS
1 // p a g e no 234
2 // e x a m p l e no 7 . 9
3 // LEFT ROTATION (RAL) OF BITS .
4 clc ;
5 // i n i t i a l l y
6 printf ( ’ A c c u m u l a t o r= AAH \n ’ ) ;
45
Figure 7.9: LEFT ROTATION RLC OF BITS
7
8
9
10
11
12
13
14
15
16
17
18
19
20
printf ( ’ D7 D6 D5 D4 D3 D2 D1 D0 \n ’ ) ;
printf ( ’ 1 0 1 0 1 0 1 0
=AAH \n \n ’ ) ;
printf ( ’CY= 0 \n \n ’ ) ;
printf ( ’RAL \n \n ’ ) ;
printf ( ’CY= 1 \n \n ’ ) ;
// c a r r y f l a g i s s e t b e c a u s e D7 b i t was 1 .
printf ( ’ D7 D6 D5 D4 D3 D2 D1 D0 \n ’ ) ;
printf ( ’ 0 1 0 1 0 1 0 0
=54H \n \n ’ ) ; //
a f t e r t h e e x e c u t u i o n o f f i r s t RAL .
// RAL i n s t r u c t i o n p l a c e s D7 b i t i n CY f l a g & CY
f l a g s b i t i s s e n d t o D0 b i t .
printf ( ’RAL \n \n ’ ) ;
printf ( ’CY= 0 \n \n ’ ) ;
// c a r r y f l a g i s r e s e t b e c a u s e D7 b i t was 0 .
printf ( ’ D7 D6 D5 D4 D3 D2 D1 D0 \n ’ ) ;
printf ( ’ 1 0 1 0 1 0 0 1
=A9H \n \n ’ ) ; //
a f t e r t h e e x e c u t u i o n o f s e c o n d RAL .
46
Figure 7.10: LEFT ROTATION RAL OF BITS
21
// RAL i n s t r u c t i o n p l a c e s D7 b i t i n CY f l a g & CY
f l a g s b i t i s s e n d t o D0 b i t .
Scilab code Exa 7.10 RIGHT ROTATION RRC AND RAR OF BITS
1 // p a g e no 235
2 // e x a m p l e no 7 . 1 0
3 // RIGHT ROTATION (RRC & RAR) OF BITS .
4 clc ;
5 // i n i t i a l l y
6 printf ( ’ A c c u m u l a t o r= 81H \n ’ ) ;
7 printf ( ’ D7 D6 D5 D4 D3 D2 D1 D0 \n ’ ) ;
8 printf ( ’ 1 0 0 0 0 0 0 1
=81H \n \n ’ ) ;
9 printf ( ’CY= 0 \n \n ’ ) ;
47
printf ( ’RRC \n \n ’ ) ;
printf ( ’CY= 1 \n \n ’ ) ;
// c a r r y f l a g i s s e t b e c a u s e D0 b i t was 1 .
printf ( ’ D7 D6 D5 D4 D3 D2 D1 D0 \n ’ ) ;
printf ( ’ 1 1 0 0 0 0 0 0
=C0H \n \n ’ ) ; //
a f t e r t h e e x e c u t u i o n o f RRC.
15 // RRC i n s t r u c t i o n p l a c e s D0 b i t i n CY f l a g a s w e l l
a s i n D7 b i t .
10
11
12
13
14
16
17
18
19
20
21
22
23
24
25
26
27
28
// i n i t i a l l y
printf ( ’ A c c u m u l a t o r= 81H \n ’ ) ;
printf ( ’ D7 D6 D5 D4 D3 D2 D1 D0 \n ’ ) ;
printf ( ’ 1 0 0 0 0 0 0 1
=81H \n \n ’ ) ;
printf ( ’CY= 0 \n \n ’ ) ;
printf ( ’RAR \n \n ’ ) ;
printf ( ’CY= 1 \n \n ’ ) ;
// c a r r y f l a g i s s e t b e c a u s e D0 b i t was 1 .
printf ( ’ D7 D6 D5 D4 D3 D2 D1 D0 \n ’ ) ;
printf ( ’ 0 1 0 0 0 0 0 0
=40H \n \n ’ ) ; //
a f t e r t h e e x e c u t u i o n o f RAR.
29 // RAR i n s t r u c t i o n p l a c e s D0 b i t i n CY f l a g & CY
f l a g s b i t i s s e n d t o D7 b i t .
Scilab code Exa 7.11 COMPARISION OF DATA
1 // p a g e no 241
2 // e x a m p l e no 7 . 1 1
3 // COMPARISION OF DATA.
4 clc ;
5 disp ( ’MVI A, 6 4H ’ ) ; // l o a d s a c c u m u l a t o r w i t h 64H .
6 disp ( ’A−−>64H ’ ) ;
48
Figure 7.11: RIGHT ROTATION RRC AND RAR OF BITS
49
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
disp ( ’ LXI H, 2 0 5 0H ’ ) ; // l o a d s HL r e g i s t e r p a i r .
disp ( ’H=20H
L=50H ’ ) ;
disp ( ’M−−>9AH ’ ) ; // assumed i n t h e s o l u t i o n .
disp ( ’CMP M’ ) ;
// t h i s command c o m p a r e s t h e c o n t e n t s o f A w i t h M by
s u b t r a c t i n g M from A .
A = hex2dec ([ ’ 64 ’ ]) ;
// r e g i s t e r M h a s 9AH. F i n d i n g 2 ’ s c o m p l i m e n t o f 9AH.
M = hex2dec ([ ’ 9A ’ ]) ;
a = dec2bin ( A ) ;
m = dec2bin ( M ) ;
t = isequalbitwise (a , m ) ; // c o m p a r e s t h e two d a t a s
bitwise .
if ( A == M )
// Jump c o n d i t i o n
printf ( ’ \n R e s u l t a f t e r c o m p a r i s i o n i s = ’ ) ;
printf ( ’OUT1 ’ ) ;
else
printf ( ’ \n R e s u l t a f t e r c o m p a r i s i o n i s = ’ ) ;
disp ( t ) ; // t h i s shows t h e f a l s e c o n d i t i o n o f t h e
bitwise comparision .
50
Figure 7.12: COMPARISION OF DATA
51
Chapter 9
Stack And Subroutines
Scilab code Exa 9.1 PUSH POP AND DELAY INSTRUCTIONS
1 // p a g e no 283
2 // e x a m p l e no 9 . 1
3 // PUSH POP AND DELAY INSTRUCTIONS
4 clc ;
5 printf ( ’ LXI SP , 2 0 9 9H \n \n ’ ) ; // t h e s t a c k
6
7
8
9
10
11
12
13
14
15
pointer
i s l o c a t e d a t 2 0 9 9H .
printf ( ’ LXI H, 4 2 F2H \n ’ ) ;
printf ( ’H−−> 42
L−−>F2 \n \n ’ ) ;
printf ( ’PUSH H \n ’ ) ; // s e n d s t h e d a t a o f HL
r e g i s t e r pair in the stack .
// s t a c k p o i n t e r i s d e c r e m e n t e d by one t o 2 0 9 8H and
the contents of the H r e g i s t e r are copied to
memory l o c a t i o n 2 0 9 8H
printf ( ’ 2 0 9 8H−−> 42 \n ’ ) ;
// s t a c k p o i n t e r i s a g a i n d e c r e m e n t e d by one t o 2 0 9 7
H and t h e c o n t e n t s o f t h e L r e g i s t e r a r e c o p i e d
t o memory l o c a t i o n 2 0 9 7H
printf ( ’ 2 0 9 7H−−> F2 \n \n ’ ) ;
printf ( ’ D e l a y C o u n t e r \n \n ’ ) ;
52
Figure 9.1: PUSH POP AND DELAY INSTRUCTIONS
16 n = hex2dec ([ ’ 42 F2 ’ ]) ;
17 for i =1: n
// DELAY LOOP
18
{
19
}
20 end
21
22 printf ( ’ POP H \n ’ ) ; // s e n d s t h e d a t a i n t h e s t a c k
23
24
25
26
back t o t h e HL r e g i s t e r p a i r .
// t h e c o n t e n t s o f t h e t o p o f t h e s t a c k a r e c o p i e d
t o L r e g i s t e r and t h e s t a c k p o i n t e r i s
i n c r e m e n t e d by one t o 2 0 9 8H
printf ( ’ L−−> F2H \n ’ ) ;
// t h e c o n t e n t s o f t h e c u r r e n t l o c a t i o n o f s t a c k a r e
c o p i e d t o H r e g i s t e r and t h e s t a c k p o i n t e r i s
a g a i n i n c r e m e n t e d by one t o 2 0 9 9H .
printf ( ’H−−> 42H \n ’ ) ;
Scilab code Exa 9.2 EXCHANGE OF DATA USING STACK
53
1 // p a g e no 285
2 // e x a m p l e no 9 . 2
3 // EXCHANGE OF DATA USING STACK .
4 clc ;
5 printf ( ’ LXI SP , 2 4 0 0H \n \n ’ ) ; // t h e s t a c k
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
pointer
i s l o c a t e d a t 2 4 0 0H .
printf ( ’ LXI H, 2 1 5 0H \n ’ ) ;
printf ( ’H−−> 21
L−−>50 \n \n ’ ) ;
printf ( ’ LXI B, 2 2 8 0H \n ’ ) ;
printf ( ’B−−> 22
C−−>80 \n \n ’ ) ;
printf ( ’PUSH H \n ’ ) ; // s e n d s t h e d a t a o f HL
r e g i s t e r pair in the stack .
// s t a c k p o i n t e r i s d e c r e m e n t e d by one t o 23FFH and
the contents of the H r e g i s t e r are copied to
memory l o c a t i o n 23FFH
printf ( ’ 23FFH−−> 21 \n ’ ) ;
// s t a c k p o i n t e r i s a g a i n d e c r e m e n t e d by one t o 23
FEH and t h e c o n t e n t s o f t h e L r e g i s t e r a r e c o p i e d
t o memory l o c a t i o n 23FEH
printf ( ’ 23FEH−−> 50 \n \n ’ ) ;
printf ( ’PUSH B \n ’ ) ; // s e n d s t h e d a t a o f BC
r e g i s t e r pair in the stack .
// s t a c k p o i n t e r i s d e c r e m e n t e d by one t o 23FDH and
the contents of the H r e g i s t e r are copied to
memory l o c a t i o n 23FDH
printf ( ’ 23FDH−−> 22 \n ’ ) ;
// s t a c k p o i n t e r i s a g a i n d e c r e m e n t e d by one t o 23
FCH and t h e c o n t e n t s o f t h e L r e g i s t e r a r e c o p i e d
t o memory l o c a t i o n 23FCH
printf ( ’ 23FCH−−> 80 \n \n ’ ) ;
printf ( ’PUSH PSW \n ’ ) ; // s e n d s t h e d a t a o f
accumulator & f l a g r e g i s t e r in the stack .
// s t a c k p o i n t e r i s d e c r e m e n t e d by one t o 23FBH and
the contents of the H r e g i s t e r are copied to
memory l o c a t i o n 23FBH
printf ( ’ 23FBH−−> c o n t e n t s o f a c c u m u l a t o r \n ’ ) ;
// s t a c k p o i n t e r i s a g a i n d e c r e m e n t e d by one t o 23
FAH and t h e c o n t e n t s o f t h e L r e g i s t e r a r e c o p i e d
54
t o memory l o c a t i o n 23FAH
24 printf ( ’ 23FAH−−> c o n t e n t s o f f l a g r e g i s t e r \n \n ’ ) ;
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
printf ( ’ To e x c h a n g e t h e d a t a . \n \n ’ )
printf ( ’ POP PSW \n ’ ) ; // s e n d s t h e d a t a i n t h e
s t a c k back t o t h e a c c u m u l a t o r & f l a g r e g i s t e r .
// t h e c o n t e n t s o f t h e t o p o f t h e s t a c k a r e c o p i e d
t o A r e g i s t e r and t h e s t a c k p o i n t e r i s
i n c r e m e n t e d by one t o 23FBH
printf ( ’A−−> c o n t e n t s o f a c c u m u l a t o r \n ’ ) ;
// t h e c o n t e n t s o f t h e c u r r e n t l o c a t i o n o f s t a c k a r e
c o p i e d t o f l a g r e g i s t e r and t h e s t a c k p o i n t e r i s
a g a i n i n c r e m e n t e d by one t o 23FCH .
printf ( ’ F−−> c o n t e n t s o f f l a g r e g i s t e r \n \n ’ ) ;
printf ( ’ POP H \n ’ ) ; // s e n d s t h e d a t a i n t h e s t a c k
back t o t h e HL r e g i s t e r p a i r .
// t h e c o n t e n t s o f t h e c u r r e n t l o c a t i o n o f t h e s t a c k
a r e c o p i e d t o L r e g i s t e r and t h e s t a c k p o i n t e r
i s i n c r e m e n t e d by one t o 23FDH
printf ( ’ L−−> 80H \n ’ ) ;
// t h e c o n t e n t s o f t h e c u r r e n t l o c a t i o n o f s t a c k a r e
c o p i e d t o H r e g i s t e r and t h e s t a c k p o i n t e r i s
a g a i n i n c r e m e n t e d by one t o 23FEH .
printf ( ’H−−> 22H \n \n ’ ) ;
printf ( ’ POP B \n ’ ) ; // s e n d s t h e d a t a i n t h e s t a c k
back t o t h e BC r e g i s t e r p a i r .
// t h e c o n t e n t s o f t h e c u r r e n t l o c a t i o n o f t h e s t a c k
a r e c o p i e d t o C r e g i s t e r and t h e s t a c k p o i n t e r
i s i n c r e m e n t e d by one t o 23FFH
printf ( ’C−−> 50H \n ’ ) ;
// t h e c o n t e n t s o f t h e c u r r e n t l o c a t i o n o f s t a c k a r e
c o p i e d t o B r e g i s t e r and t h e s t a c k p o i n t e r i s
a g a i n i n c r e m e n t e d by one t o 2 4 0 0H .
printf ( ’B−−> 21H \n ’ ) ;
55
Figure 9.2: EXCHANGE OF DATA USING STACK
56
Figure 9.3: EXCHANGE INFORMATION BETWEEN STACK AND PROGRAM COUNTER
Scilab code Exa 9.3 EXCHANGE INFORMATION BETWEEN STACK AND PROGRAM COUNTER
1
2
3
4
5
6
7
8
9
10
11
12
13
// p a g e no 292
// e x a m p l e no 9 . 3
// EXCHANGE INFORMATION BETWEEN STACK AND PROGRAM
COUNTER
clc ;
printf ( ’ A f t e r t h e CALL i n s t r u c t i o n \n \n ’ ) ;
printf ( ’STACK MEMORY: \n \n ’ ) ;
printf ( ’ 23FFH−−> 20 \n ’ ) ;
printf ( ’ 23FEH−−>43 \n ’ ) ;
printf ( ’ S t a c k p o i n t e r −−> 23FEH \n ’ ) ;
printf ( ’ Program c o u n t e r −−> 2 0 7 0H \n \n ’ ) ;
printf ( ’ A f t e r RET i n s t r u c t i o n \n \n ’ ) ;
printf ( ’ Program c o u n t e r −−> 2 0 4 3H \n ’ ) ;
printf ( ’ S t a c k p o i n t e r −−> 2 4 0 0H ’ ) ;
57
Chapter 10
Code Conversion BCD
Arithmetic and 16 bit Data
Operations
Scilab code Exa 10.1 BCD TO BINARY
1 // p a g e no 310
2 // e x a m p l e 1 0 . 1
3 // BCD TO BINARY
4 // BCD i n t o i t s b i n a r y e q u i v a l e n t .
5 // g i v e n BCD no i s 72
6 clc ;
7 a =72;
8
x = modulo (a ,10) ;
// s e p e r a t i n g t h e u n i t s d i g i t
9
printf ( ’ Unpacked BCD1 ’ )
10
disp ( dec2bin (x ,8) ) ;
11 a = a /10;
// s e p e r a t i n g t h e t e n s p l a c e
digit
12 a = floor ( a ) ;
13 printf ( ’ \n \n Unpacked BCD2 ’ ) ;
14 disp ( dec2bin (a ,8) ) ;
15 printf ( ’ \n \n M u l t i p l y BCD2 by 10 and add BCD1 ’ ) ;
58
Figure 10.1: BCD TO BINARY
Scilab code Exa 10.2 ADDITION OF PACKED BCD NUMBERS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
// p a g e no 321
// e x a m p l e no 1 0 . 2
// ADDITION OF PACKED BCD NUMBERS
clc ;
a =77;
b =48;
x = modulo (a ,10) ;
y = modulo (b ,10) ;
z=x+y;
if z >9 then
f = z +6;
16
17
else
printf ( ’ A f t e r a d d i t i o n BCD1 i s : ’ )
disp ( dec2bin ( f ) ) ;
printf ( ’MSB o f t h i s s e q u e n c e i s t h e c a r r y
g e n e r a t e d a f t e r a d d i t i o n . \n \n ’ )
printf ( ’ A f t e r a d d i t i o n BCD1 i s :
59
’)
Figure 10.2: ADDITION OF PACKED BCD NUMBERS
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
disp ( z ) ;
end
x = a /10;
x = floor ( x ) ;
y = b /10;
y = floor ( y ) ;
z=x+y;
if z >9 then
f = z +6;
f = f +1; // t h i s 1 i s t h e c a r r y o f BCD1 .
printf ( ’ A f t e r a d d i t i o n BCD2 i s : ’ )
disp ( dec2bin ( f ) ) ;
printf ( ’MSB o f t h i s s e q u e n c e i s t h e c a r r y
generated after addition . ’)
else
printf ( ’ A f t e r a d d i t i o n BCD1 i s : ’ )
disp ( z ) ;
end
printf ( ’ \n \n BCD1 :
0 1 0 1 \n \n ’ ) ;
printf ( ’BCD2 :
0010 ’ )
60
Scilab code Exa 10.3 EXCHANGE OF DATA
1 // p a g e no 325
2 // e x a m p l e no 1 0 . 3
3 // EXCHANGE OF DATA
4 clc ;
5 printf ( ’ 2 0 5 0H−−> 3FH \n \n ’ ) ;
6 printf ( ’ 2 0 5 1H−−> 42H \n \n ’ ) ;
7 printf ( ’DE−−> 856FH \n ’ ) ;
8 printf ( ’D−−> 85H
E−−> 6FH \n \n ’ ) ;
9 printf ( ’LHLD 2 0 5 0H \n ’ ) ; // l o a d s t h e HL r e g i s t e r
10
11
12
13
14
15
16
p a i r w i t h d a t a on 2 0 5 0H & 2 0 5 1H .
printf ( ’H−−> 42H
L−−> 3FH \n \n ’ ) ;
printf ( ’XCHG \n ’ ) ; // e x c h a n g e t h e d a t a o f HL
r e g i s t e r p a i r w i t h DE r e g i s t e r p a i r .
printf ( ’D<−−>H
E<−−>L \n ’ ) ;
printf ( ’D−−> 42H
E−−> 3FH \n H−−> 85H
L−−>
6FH \n \n ’ ) ;
printf ( ’SHLD 2 0 5 0H \n ’ ) ; // s t o r e s t h e 16 b i t d a t i n
HL r e g i s t e r p a i r on memory l o c a t i o n 2 0 5 1H & 2 0 5 0H
.
printf ( ’ 2 0 5 0H−−> 6FH \n ’ ) ;
printf ( ’ 2 0 5 1H−−> 85H ’ ) ;
Scilab code Exa 10.4 ADDITION OF TWO 16 BIT NUMBERS
1 // p a g e no 326
2 // e x a m l e no 1 0 . 4
3 // ADDITION OF TWO 16 BIT NUMBERS
4 clc ;
5 printf ( ’B−−> 27H
C−−> 93H \n ’ ) ;
6 printf ( ’D−−> 31H
E−−> 82H \n \n ’ ) ;
7 b = hex2dec ([ ’ 27 ’ ]) ;
61
Figure 10.3: EXCHANGE OF DATA
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
c = hex2dec ([ ’ 93 ’ ]) ;
d = hex2dec ([ ’ 31 ’ ]) ;
e = hex2dec ([ ’ 82 ’ ]) ;
printf ( ’MOV A, C \n \n ’ ) ;
a=c;
printf ( ’ADD E \n ’ ) ;
a=a+e;
Z =a -256;
X = dec2hex ( Z ) ;
printf ( ’ Sum = ’ )
disp ( X ) ;
if a >255 then
printf ( ’CY=1 \n \n ’ ) ;
CY =1;
else
printf ( ’CY=0 \n ’ ) ;
CY =0;
end
printf ( ’MOV L , A \n ’ ) ;
printf ( ’ L−−> ’ ) ;
62
28 disp ( X ) ;
29 printf ( ’ \n \n MOV A, B \n \n ’ ) ;
30 a = b ;
31 printf ( ’ADC D \n ’ ) ;
32 a = a + d + CY ; // CY i s added b e c a u s e o f t h e p r e v i o u s
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
c a r r y a s p e r t h e i n s t r u c t i o n s ADC ( add w i t h c a r r y
)
T = dec2hex ( a ) ;
printf ( ’ Sum = ’ )
disp ( T ) ;
if a >255 then
printf ( ’CY=1 \n \n ’ )
else
printf ( ’CY=0 \n \n ’ )
end
printf ( ’MOV H, A \n ’ ) ;
printf ( ’H−−> ’ ) ;
disp ( T ) ;
printf ( ’ \n \n SHLD 2 0 5 0H \n ’ ) ; // s t o r e s t h e
c o n t e n t s o f HL r e g i s t e r p a i r on memory l o c a t i o n s
2 0 5 1H & 2 0 5 0H .
printf ( ’ 2 0 5 0H−−> ’ ) ;
disp ( X ) ;
printf ( ’ 2 0 5 1H−−> ’ ) ;
disp ( T ) ;
Scilab code Exa 10.5 SUBTRACTION OF TWO 16 BIT NUMBERS
1 // p a g e no 326
2 // e x a m l e no 1 0 . 5
3 // SUBTRACTION OF TWO 16 BIT NUMBERS
4 clc ;
5 printf ( ’B−−> 85H
C−−> 38H \n ’ ) ;
63
Figure 10.4: ADDITION OF TWO 16 BIT NUMBERS
64
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
printf ( ’D−−> 62H
E−−> A5H \n \n ’ ) ;
b = hex2dec ([ ’ 85 ’ ]) ;
c = hex2dec ([ ’ 38 ’ ]) ;
d = hex2dec ([ ’ 62 ’ ]) ;
e = hex2dec ([ ’ A5 ’ ]) ;
printf ( ’MOV A, C \n \n ’ ) ;
a=c;
printf ( ’SUB E \n ’ ) ;
a =a - e ;
Z = a +256;
X = dec2hex ( Z ) ;
printf ( ’ D i f f e r e n c e = ’ )
disp ( X ) ;
if a <0 then
printf ( ’ Borrow=1 \n \n ’ ) ;
B =1;
else
printf ( ’ Borrow=0 \n ’ )
B =0;
end
printf ( ’MOV C , A \n ’ ) ;
printf ( ’C−−> ’ ) ;
disp ( X ) ;
printf ( ’ \n \n MOV A, B \n \n ’ ) ;
a=b;
printf ( ’SBB D \n ’ ) ;
a =a -d - B ; // 1 i s s u b t r a c t e d b e c a u s e o f t h e p r e v i o u s
b o r r o w a s p e r t h e i n s t r u c t i o n s SBB ( s u b t r a c t w i t h
borrow )
T = dec2hex ( a ) ;
printf ( ’ D i f f e r e n c e = ’ )
disp ( T ) ;
if a <0 then
printf ( ’ Borrow=1 \n \n ’ )
else
printf ( ’ Borrow=0 \n \n ’ )
end
printf ( ’MOV B , A \n ’ ) ;
65
Figure 10.5: SUBTRACTION OF TWO 16 BIT NUMBERS
42
43
printf ( ’B−−> ’ ) ;
disp ( T ) ;
Scilab code Exa 10.6 DISPLAY CONTENTS OF STACK
1 // p a g e no 327
2 // e x a m p l e no 1 0 . 6
3 // DISPLAY CONTENTS OF STACK
4 clc ;
5 printf ( ’ LXI H, 0 0 0 0H \n ’ ) ;
// c l e a r s
register pair
66
t h e HL
Figure 10.6: DISPLAY CONTENTS OF STACK
6
7
8
9
10
11
12
13
14
15
printf ( ’H−−> 00H
L−−> 00H \n \n ’ ) ;
printf ( ’DAD SP \n ’ ) ; // p l a c e t h e s t a c k p o i n t e r
c o n t e n t i n HL
printf ( ’H−−> h i g h e r b y t e s o f s t a c k p o i n t e r r e g i s t e r
\n ’ ) ;
printf ( ’ L−−> l o w e r b y t e s o f s t a c k p o i n t e r r e g i s t e r \
n \n ’ ) ;
printf ( ’MOV A, H \n ’ ) ; // c o p i e s t h e c o n t e n t s o f H i n
A.
printf ( ’H−−> A \n \n ’ ) ;
printf ( ’OUT PORT1 \n \n ’ ) ;
printf ( ’MOV A, L \n ’ ) ; // c o p i e s t h e c o n t e n t s o f L i n
A.
printf ( ’ L−−> A \n \n ’ ) ;
printf ( ’OUT PORT2 ’ ) ;
Scilab code Exa 10.7 SUBROUTINE TO SET THE ZERO FLAG
67
1 // p a g e no 327
2 // e x a m p l e no 1 0 . 7
3 // SUBROUTINE TO SET THE ZERO FLAG
4 clc ;
5 printf ( ’CHECK:
PUSH H \n \n ’ ) ; // s e n d s t h e
6
7
8
9
10
11
12
13
14
15
16
17
c o n t e n t s o f H t o t h e l o c a t i o n p o i n t e d by t h e
stack pointer .
printf ( ’
MVI L , FFH \n ’ ) ;
l = hex2dec ([ ’ FF ’ ]) ;
l = dec2bin (l ,8) ;
printf ( ’
L−−> ’ ) ; // s e t a l l b i t s i n L t o
logic 1.
disp ( l ) ;
printf ( ’ \n \n
PUSH PSW \n \n ’ ) ; // s a v e
f l a g s on t o p o f t h e s t a c k
printf ( ’
XTHL \n \n ’ ) ; // s e t a l l b i t s i n
the top s t a c k l o c a t i o n .
printf ( ’
POP PSW \n \n ’ ) ; // now t h e z e r o
flag is set .
printf ( ’
JZ NOEROR \n \n ’ ) ;
printf ( ’
JMP ERROR \n \n ’ ) ;
printf ( ’NOEROR: POP H \n \n ’ ) ; // r e t r i v e s t h e d a t a
from t h e s t a c k i n t o H i f z e r o f l a g i s s e t
printf ( ’
RET ’ ) ;
Scilab code Exa 10.8 TRANSFER A PROGRAM TO AN ADDRESS IN HL REGISTER
1 // p a g e no 328
2 // e x a m p l e no 1 0 . 8
3 // TRANSFER A PROGRAM TO AN ADDRESS IN HL REGISTER
4 clc ;
5 printf ( ’ \n \ nThe program can be t r a n s f e r e d u s i n g
Jump i n s t r u c t i o n . \n \n ’ ) ;
68
Figure 10.7: SUBROUTINE TO SET THE ZERO FLAG
6
printf ( ’PCHL a 1 b y t e i n s t r u c t i o n can a l s o be u s e d
i n p l a c e o f Jump i n s t r u c t i o n \n \n ’ ) ;
69
Figure 10.8: TRANSFER A PROGRAM TO AN ADDRESS IN HL REGISTER
70
Chapter 12
Interrupts
Scilab code Exa 12.1 ENABLE INTERRUPTS
1 // p a g e no 374
2 // e x a m p l e no 1 2 . 1
3 // ENABLE INTERRUPTS
4 clc ;
5 printf ( ’ EI \n \n ’ ) ;
// e n a b l e i n t e r r u p t s
6 printf ( ’MVI A, 0 8H \n ’ ) ;
7 a = hex2dec ([ ’ 8 ’ ]) ;
8 b = dec2bin (a ,8) ;
9 printf ( ’A−−> ’ )
10 disp ( b ) ;
11 printf ( ’ \n SIM \n \n ’ ) ;
// e n a b l e RST 7 . 5 , 6 . 5 , and
12
13
14
15
5.5
printf ( ’ D3=1
printf ( ’ D2=0
printf ( ’ D1=0
printf ( ’ D0=0
SIM f u n c t i o n a l
E n a b l e RST 7 . 5
E n a b l e RST 6 . 5
E n a b l e RST 5 . 5
71
\n ’ ) ;
\n ’ ) ;
\n ’ ) ;
\n ’ ) ;
Figure 12.1: ENABLE INTERRUPTS
Scilab code Exa 12.2 RESET INTERRUPT
1 // p a g e no 374
2 // e x a m p l e no 1 2 . 2
3 // RESET 7 . 5 INTERRUPT
4 clc ;
5 printf ( ’MVI A, 1 8H \n ’ ) ;
6 a = hex2dec ([ ’ 18 ’ ]) ;
7 b = dec2bin (a ,8) ;
8 printf ( ’A−−> ’ )
9 disp ( b ) ;
10 printf ( ’ \n \n SIM ’ ) ;
flip
// s e t D4=1
// R e s e t 7 . 5 i n t e r r u p t
flop
Scilab code Exa 12.3 CHECK PENDING INTERRUPT
1
2
3
// p a g e no 375
// e x a m p l e no 1 2 . 3
// CHECK PENDING INTERRUPT
72
Figure 12.2: RESET INTERRUPT
4 clc ;
5 printf ( ’RIM i n s t r u c t i o n
6 printf ( ’ D7=SID
i n t e r p r e t a t i o n \n \n ’ ) ;
S e r i a l input
d a t a i f any \n ’ ) ;
7 printf ( ’ D6 , D5 , D4= I 7 . 5 , I 6 . 5 , I 5 . 5
i n t e r r u p t s : 1= p e n d i n g \n ’ ) ;
8 printf ( ’ D3=IE
f l a g : 1= e n a b l e d \n ’ ) ;
9 printf ( ’ D2 , D1 , D0= M7 . 5 , M6 . 5 , M5 . 5
1= masked \n \n \n ’ ) ;
10
11
12
13
14
15
16
17
18
19
20
Pending
Interrupt enable
I n t e r r u p t masks :
printf ( ’ I n s t r u c t i o n s \n \n ’ ) ;
printf ( ’
RIM \n ’ ) ;
// Read
i n t e r r u p t mask
printf ( ’
MOV B , A \n ’ ) ;
// s a v e mask
information
printf ( ’
ANI 20H \n ’ ) ;
// c h e c k
w h e t h e r RST 6 . 5 i s p e n d i n g
printf ( ’
JNZ NEXT \n ’ ) ;
printf ( ’
EI \n ’ ) ;
printf ( ’
RET \n ’ ) ;
// RST 6 . 5 i s
n o t p e n d i n g , r e t u r n t o main program
printf ( ’NEXT:
MOV A, B \n ’ ) ;
// g e t b i t
p a t t e r n ; RST 6 . 5 i s p e n d i n g
printf ( ’
ANI 0DH \n ’ ) ;
// e n a b l e s RST
6 . 5 by s e t t i n g D1=0
73
Figure 12.3: CHECK PENDING INTERRUPT
printf ( ’
ORI 08H\n ’ ) ;
s e t t i n g D3=1
22 printf ( ’
SIM \n ’ ) ;
23 printf ( ’
JMP SERV \n ’ ) ;
s e r v i c e r o u t i n e f o r RST 6 . 5
21
74
// e n a b l e SIM by
// jump t o
Chapter 14
Programmable Interface
Devices
Scilab code Exa 14.1 INITIALIZE HYPOTHETICAL CHIP AS OUTPUT BUFFER
1 // p a g e no 414
2 // e x a m p l e no 1 4 . 1
3 // INITIALIZE HYPOTHETICAL CHIP AS OUTPUT BUFFER
4 clc ;
5 printf ( ’MVI A, 0 1H \n ’ ) ;
// S e t D0=1 , D1 t h r o u g h
D7 a r e don ’ t c a r e l i n e s .
6 a = hex2dec ([ ’ 1 ’ ]) ;
7 b = dec2bin (a ,8) ;
8 printf ( ’A−−> ’ )
9 disp ( b ) ;
10 printf ( ’ \n \n OUT FFH \n \n ’ ) ;
// w r i t e i n t h e
control register .
11 printf ( ’MVI A, BYTE1 \n \n ’ ) ;
// l o a d d a t a b y t e .
12 printf ( ’OUT FEH ’ ) ;
// s e n d d a t a o u t .
75
Figure 14.1: INITIALIZE HYPOTHETICAL CHIP AS OUTPUT BUFFER
Scilab code Exa 14.2 ADDRESS DETERMINATION OF GIVEN FIGURE
1 // p a g e no 420
2 // e x a m p l e no 1 4 . 2
3 // ADDRESS DETERMINATION OF GIVEN FIGURE
4 clc ;
5 printf ( ’ To s e l e c t t h e c h i p : \n \n ’ ) ;
6 printf ( ’ A15 A14 A13 A12 A11 \n ’ ) ;
7 printf ( ’ 0
0
0
1
0 \n \n ’ ) ;
8 printf ( ’ A15 , A14
Enable l i n e s o f 8205
9
10
11
12
13
14
15
16
17
18
\n ’
);
printf ( ’ A13 , A12 , A11
Input l o g i c to a c t i v a t e
t h e p u t p u t l i n e O4 o f t h e 8 2 0 5 \n \n ’ ) ;
printf ( ’ A15 , A14 , A13 , A12 , A11 = A7 , A6 , A5 , A4 , A3 , = 2H \
n \n ’ ) ;
printf ( ’AD2
AD1
AD0 = A d d r e s s P o r t s \n ’ ) ;
printf ( ’ 0
0
0
= 20H C o n t r o l o r s t a t u s
r e g i s t e r \n ’ ) ;
printf ( ’ 0
0
1
= 21H P o r t A \n ’ ) ;
printf ( ’ 0
1
0
= 22H P o r t B \n ’ ) ;
printf ( ’ 0
1
1
= 23H P o r t C \n ’ ) ;
printf ( ’ 1
0
0
= 24H Timer LSB \n ’ ) ;
printf ( ’ 1
0
1
= 25H Timer MSB \n \n ’ ) ;
printf ( ’ P o r t numbers i n g i v e n f i g u r e t h u s r a n g e from
20H−25H ’ ) ;
76
Figure 14.2: ADDRESS DETERMINATION OF GIVEN FIGURE
77
Chapter 15
General Purpose
Programmable Peripheral
Devices
Scilab code Exa 15.1 PORT ADDRESS CONTROL WORD ADDRESS AND READ THE DIP SWITCHES
1
2
3
4
5
6
7
8
9
10
11
12
// p a g e no 449
// e x a m p l e no 1 5 . 1
// PORT ADDRESS CONTROL WORD ADDRESS
DIP SWITCHES
clc ;
printf ( ’ 1 P o r t A d d r e s s \n \n ’ ) ;
printf ( ’ P o r t A
=
=0) \n ’ ) ;
printf ( ’ P o r t B
=
=1) \n ’ ) ;
printf ( ’ P o r t C
=
=0) \n ’ ) ;
printf ( ’ C o n t r o l R e g i s t e r
=
=1) \n \n ’ ) ;
printf ( ’ 2 C o n t r o l Word \n \n ’ ) ;
78
AND READ THE
8 0 0 0H
( A1=0 ,A0
8 0 0 1H
( A1=0 ,A0
8 0 0 2H
( A1=1 ,A0
8 0 0 3H
( A1=1 ,A0
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
printf ( ’ D7 D6 D5
printf ( ’ 1 0 0
;
printf ( ’ D7=1
printf ( ’ D6 , D5=0
printf ( ’ D4=0
printf ( ’ D3=0
printf ( ’ D2=0
printf ( ’ D1=1
printf ( ’ D0=1
D4 D3 D2 D1 D0 \n ’ ) ;
0 0 0 1 1
= 83H \n \n ’ )
I /O F u n c t i o n \n ’ ) ;
P o r t A i n Mode 0 \n ’ ) ;
P o r t A= o u t p u t \n ’ ) ;
P o r t C u p p e r= o u t p u t \n ’ ) ;
P o r t B i n Mode 0 \n ’ ) ;
P o r t B= i n p u t \n ’ ) ;
P o r t C1= i n p u t \n \n ’ ) ;
printf ( ’ 3 Program \n \n ’ ) ;
printf ( ’MVI A, 8 3H \n ’ ) ; // l o a d a c c u m u l a t o r w i t h
t h e c o n t r o l word .
printf ( ’STA 8 0 0 3H \n ’ ) ; // w r i t e word i n t h e
c o n t r o l r e g i s t e r to i n i t i a l i z e the ports .
printf ( ’LDA 8 0 0 1H \n ’ ) ; // r e a d s s w i t c h e s a t p o r t B
.
printf ( ’STA 8 0 0 0H \n ’ ) ; // d i s p l a y t h e r e a d i n g a t
port A.
printf ( ’LDA 8 0 0 2H \n ’ ) ; // r e a d s w i t c h e s a t p o r t C .
printf ( ’ ANI 0FH \n ’ ) ;
// mask t h e u p p e r f o u r b i t s
o f port C, t h e s e b i t s are not input data .
printf ( ’RLC \n ’ ) ;
// r o t a t e and p l a c e t h e
data i n the upper h a l f o f the accumulator .
printf ( ’RLC \n ’ ) ;
printf ( ’RLC \n ’ ) ;
printf ( ’RLC \n ’ ) ;
printf ( ’STA 8 0 0 2H \n ’ ) ; // d i s p l a y d a t a a t p o r t C
upper .
printf ( ’HLT \n ’ ) ;
79
Figure 15.1: PORT ADDRESS CONTROL WORD ADDRESS AND READ
THE DIP SWITCHES
80
Scilab code Exa 15.2 BSR CONTROL WORD SUBROUTINE
1 // p a g e no 453
2 // e x a m p l e no 1 5 . 2
3 // BSR CONTROL WORD
4 clc ;
5 printf ( ’BSR C o n t r o l
6 printf ( ’ D7 D6 D5 D4
7 printf ( ’ 0 0 0 0
SUBROUTINE
Words \n
D3 D2 D1
1 1 1
s e t b i t PC7 \n ’ ) ;
8 printf ( ’ 0 0 0 0 1 1 1
r e s e t b i t PC7 \n ’ ) ;
9 printf ( ’ 0 0 0 0 0 1 1
s e t b i t PC3 \n ’ ) ;
10 printf ( ’ 0 0 0 0 0 1 1
r e s e t b i t PC3 \n \n ’ ) ;
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
\n ’ ) ;
D0 \n ’ ) ;
1
= 0FH
To
0
= 0EH
To
1
= 07H
To
0
= 06H
To
printf ( ’ P o r t A d d r e s s \n \n ’ ) ;
printf ( ’ C o n t r o l R e g i s t e r A d d r e s s = 83H \n \n ’ ) ;
printf ( ’ S u b r o u t i n e \n \n ’ ) ;
printf ( ’MVI A, 0 FH \n ’ ) ;
a c c u m u l a t o r t o s e t PC7
printf ( ’OUT 83H \n ’ ) ;
printf ( ’MVI A, 0 7H \n ’ ) ;
a c c u m u l a t o r t o s e t PC3 .
printf ( ’OUT 83H \n ’ ) ;
printf ( ’CALL DELAY \n ’ ) ;
microsec delay .
printf ( ’MVI A, 0 6H \n ’ ) ;
a c c u m u l a t o r t o r e s e t PC3
printf ( ’OUT 83H \n ’ ) ;
printf ( ’MVI A, 0 EH \n ’ ) ;
a c c u m u l a t o r t o r e s e t PC7 .
printf ( ’OUT 83H \n ’ ) ;
printf ( ’RET ’ ) ;
81
// l o a d b y t e i n
// s e t PC7=1
// l o a d b y t e i n
// s e t PC3=1.
// t h i s i s a 10
// l o a d b y t e i n
// r e s e t PC3
// l o a d b y t e i n
// r e s e t PC7
Figure 15.2: BSR CONTROL WORD SUBROUTINE
Scilab code Exa 15.3 INSTRUCTIONS TO GENERATE A PULSE FROM COUNTER 0
1 // p a g e no 483
2 // e x a m p l e no 1 5 . 3
3 // INSTRUCTIONS TO GENERATE A PULSE FROM COUNTER 0
4 clc ;
5 printf ( ’ C o n t r o l Word \n \n ’ ) ;
6 printf ( ’ D7 D6 D5 D4 D3 D2 D1 D0 \n ’ ) ;
7 printf ( ’ 0 0 0 1 0 1 0 0
= 14H \n \n ’ )
;
8 printf ( ’ D7 , D6=0
S e l e c t c o u n t e r 0 \n ’ ) ;
82
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
printf ( ’ D5 , D4=01
printf ( ’ D3 , D2 , D1=010
printf ( ’ D0=0
Load 8 b i t c o u n t \n ’ ) ;
Mode 2 \n ’ ) ;
B i n a r y Count \n \n ’ ) ;
printf ( ’ Count \n \n ’ ) ;
count =(50*10^ -6) /(0.5*10^ -6) ;
printf ( ’ Count= ’ ) ;
disp ( count ) ;
disp ( dec2hex ( count ) ) ;
printf ( ’ i n h e x a d e c i m a l \n \n ’ ) ;
printf ( ’ I n s t r u c t i o n s \n \n ’ ) ;
printf ( ’PULSE : \n ’ )
printf ( ’MVI A, 0 0 0 1 0 1 0 0B \n ’ ) ;
mode 2 & c o u n t e r 0 .
printf ( ’OUT 83H \n ’ ) ;
control register .
printf ( ’MVI A, 6 4H \n ’ ) ;
of the count .
printf ( ’OUT 80H \n ’ ) ;
w i t h low o r d e r b y t e
printf ( ’HLT ’ ) ;
// c o n t r o l word
// w r i t e i n 8 2 5 4
// low o r d e r b y t e
// l o a d c o u n t e r 0
Scilab code Exa 15.4 INSTRUCTIONS TO GENERATE SQUARE WAVE PULSE FROM COUNTER 1
// p a g e no 484
// e x a m p l e no 1 5 . 4
// INSTRUCTIONS TO GENERATE SQUARE WAVE PULSE FROM
COUNTER 1
4 clc ;
5 printf ( ’ C o n t r o l Word \n \n ’ ) ;
1
2
3
83
Figure 15.3:
COUNTER 0
INSTRUCTIONS TO GENERATE A PULSE FROM
84
6
7
printf ( ’ D7 D6 D5 D4 D3
printf ( ’ 0 1 1 1 0
;
printf ( ’ D7 , D6=01
printf ( ’ D5 , D4=11
printf ( ’ D3 , D2 , D1=011
printf ( ’ D0=0
D2 D1 D0 \n ’ ) ;
1 1 0
= 76H \n \n ’ )
8
S e l e c t c o u n t e r 1 \n ’ ) ;
9
Load 16 b i t c o u n t \n ’ ) ;
10
Mode 3 \n ’ ) ;
11
B i n a r y Count \n \n ’ ) ;
12
13
14 printf ( ’ Count \n \n ’ ) ;
15 count =(1*10^ -3) /(0.5*10^ -6) ;
16 printf ( ’ Count= ’ ) ;
17 disp ( count ) ;
18 b = dec2hex (2000) ;
19 disp ( b ) ;
20 printf ( ’ i n h e x a d e c i m a l \n \n ’ ) ;
21
22
23 printf ( ’ I n s t r u c t i o n s \n \n ’ ) ;
24 printf ( ’SQWAVE: \n ’ ) ;
25 printf ( ’MVI A, 0 1 1 1 0 1 1 0B \n ’ ) ;
// c o n t r o l word
26
27
28
29
30
31
mode 3 & c o u n t e r 1 .
printf ( ’OUT 83H \n ’ ) ;
control register .
printf ( ’MVI A, D0H \n ’ ) ;
of the count .
printf ( ’OUT 81H \n ’ ) ;
w i t h low o r d e r b y t e .
printf ( ’MVI A, 0 7H \n ’ ) ;
of the count .
printf ( ’OUT 81H \n ’ ) ;
with high order byte
printf ( ’HLT ’ ) ;
// w r i t e i n 8 2 5 4
// low o r d e r b y t e
// l o a d c o u n t e r 1
// h i g h o r d e r b y t e
// l o a d c o u n t e r 1
85
Figure 15.4: INSTRUCTIONS TO GENERATE SQUARE WAVE PULSE
FROM COUNTER 1
86
Scilab code Exa 15.5 SUBROUTINE TO GENERATE AN INTERRUPT
1 // p a g e no 486
2 // e x a m p l e no 1 5 . 5
3 // SUBROUTINE TO GENERATE AN INTERRUPT
4 clc ;
5 printf ( ’ C o n t r o l Word \n \n ’ ) ;
6 printf ( ’ D7 D6 D5 D4 D3 D2 D1 D0 \n ’ ) ;
7 printf ( ’ 0 1 1 1 0 1 0 0
= 74H
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
C o u n t e r 1 \n ’ ) ;
printf ( ’ 1 0 0 1 0
C o u n t e r 2 \n \n ’ ) ;
printf ( ’ D7 , D6
printf ( ’ D5 , D4
printf ( ’ D3 , D2 , D1=010
printf ( ’ D0=0
1
0
0
= 94H
S e l e c t c o u n t e r 1 \n ’ ) ;
Load c o u n t \n ’ ) ;
Mode 2 \n ’ ) ;
B i n a r y Count \n \n ’ ) ;
printf ( ’ I n s t r u c t i o n s \n \n ’ ) ;
printf ( ’CNT1LO EQU 50H \n ’ ) ;
printf ( ’ CNT1HI EQU C3H \n ’ ) ;
printf ( ’COUNT2 EQU 40H \n ’ ) ;
printf ( ’SECOND MVI A, 0 1 1 1 0 1 0 0B \n ’ ) ;
word mode 2 & c o u n t e r 1 .
printf ( ’
OUT 83H \n ’ ) ;
8254 c o n t r o l r e g i s t e r .
printf ( ’
MVI A, 1 0 0 1 0 1 0 0B \n ’ ) ;
word mode 2 & c o u n t e r 2 .
printf ( ’
OUT 83H \n ’ ) ;
8254 c o n t r o l r e g i s t e r .
printf ( ’
MVI A, CNT1LO \n ’ ) ;
o r d e r byte o f count 50000
printf ( ’
OUT 81H \n ’ ) ;
c o u n t e r 1 w i t h low o r d e r b y t e
printf ( ’
MVI A, CNT1HI \n ’ ) ;
order byte of count 50000.
printf ( ’
OUT 81H \n ’ ) ;
87
// c o n t r o l
// w r i t e i n
// c o n t r o l
// w r i t e i n
// Low
// Load
// h i g h
// l o a d
Figure 15.5: SUBROUTINE TO GENERATE AN INTERRUPT
counter 1 with high order byte
28 printf ( ’
MVI A, COUNT2 \n ’ ) ;
f o r Counter 2 .
29 printf ( ’
OUT 82H \n ’ ) ;
counter 2.
30 printf ( ’
RET ’ ) ;
Scilab code Exa 15.6 EXPLANATION OF INSTRUCTIONS
1
// p a g e no 493
88
// Count
// l o a d
2 // e x a m p l e no 1 5 . 6
3 // EXPLANATION OF INSTRUCTIONS
4 clc ;
5 printf ( ’ 1 ) DI i n s t r u c t i o n d i s a b l e s
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
the i n t e r r u p t s . \
n \n ’ ) ;
printf ( ’ 2 ) Command word 76H s p e c i f i e s t h e f o l l o w i n g
p a r a m e t e r s \n ’ ) ;
printf ( ’ A7 A6 A5 A4 A3 A2 A1 A0 \n ’ ) ;
printf ( ’ 0 1 1 1 0 1 1 0
=76H \n ’ ) ;
printf ( ’ A7 , A6 , A5
Low o r d e r a d d r e s s b i t s \n ’ ) ;
printf ( ’ A3
Edge t r i g g e r e d \n ’ ) ;
printf ( ’ A2
Call address interval i s four
l o c a t i o n s \n ’ ) ;
printf ( ’ A1
S i n g l e 8 2 5 9A \n \n ’ ) ;
printf ( ’ Low o r d e r b y t e o f t h e IR0 c a l l a d d r e s s \n ’ ) ;
printf ( ’ A7 A6 A5 A4 A3 A2 A1 A0 \n ’ ) ;
printf ( ’ 0 1 1 0 0 0 0 0
=60H \n ’ ) ;
printf ( ’ The a d d r e s s b i t s A4−A0 a r e s u p p l i e d by 8 2 5 9A
. \n ’ ) ;
printf ( ’ S u b s e q u e n t a d d r e s s e s a r e f o u r l o c a t i o n s
a p a r t e g . IR1=64H ’ )
printf ( ’ 3 ) P o r t a d d r e s s o f t h e 8 2 5 9SA f o r ICW1 i s 80
H, A0 s h o u l d be a t \n l o g i c 0 & t h e o t h e r b i t s
a r e d e t e r m i n e d by t h e d e c o d e r . \n \n ’ ) ;
printf ( ’ 4 ) Command word ICW2 i s 20H . \n \n ’ ) ;
printf ( ’ 5 ) P o r t a d d r e s s o f ICW2 i s 81H, A0 s h o u l d be
at l o g i c 1 . ’ );
Scilab code Exa 15.8 INITIALIZATION INSTRUCTIONS FOR DMA
1
2
3
// p a g e no 502
// e x a m p l e no 1 5 . 8
// INITIALIZATION INSTRUCTIONS FOR DMA
89
Figure 15.6: EXPLANATION OF INSTRUCTIONS
4 clc ;
5 printf (
6 printf (
7 printf (
8 printf (
9 printf (
10 printf (
11 printf (
12 printf (
13 printf (
14 printf (
15 printf (
16 printf (
17 printf (
18 printf (
’MVI A, 0 0 0 0 0 1 0 0B \n \n ’ ) ;
’ A7 A6 A5 A4 A3 A2 A1 A0 \n ’ ) ;
’ 0 0 0 0 0 1 0 0 \n ’ ) ;
’ A2=1
D i s a b l e DMA \n \n ’ ) ;
’OUT 08H \n ’ ) ;
’MVI A, 0 0 0 0 0 1 1 1B \n \n ’ ) ;
’ A7 A6 A5 A4 A3 A2 A1 A0 \n ’ ) ;
’ 0 0 0 0 0 1 1 1 \n ’ ) ;
’ A7 , A6=00
Demand mode \n ’ ) ;
’ A5=0
I n c r e m e n t a d d r e s s \n ’ ) ;
’ A4=0
D i s a b l e a u t o l o a d \n ’ ) ;
’ A3 , A2=01
W r i t e \n ’ ) ;
’ A1 , A0=11
Ch 3 \n \n ’ ) ;
’OUT 0BH \n ’ ) ;
// Send t o mode r e g
.
19 printf ( ’MVI A, 7 5H \n ’ ) ;
of starting address
20 printf ( ’OUT 06H \n ’ ) ;
// Low o r d e r b y t e
// Output t o CH3
90
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
memory a d d r e s s r e g .
printf ( ’MVI A, 4 0H \n ’ ) ;
// High o r d e r b y t e
of starting address
printf ( ’OUT 06H \n ’ ) ;
// Output t o CH3
memory a d d r e s s r e g .
printf ( ’MVI A, FFH \n ’ ) ;
// Low o r d e r b y t e
o f t h e c o u n t 03FFH
printf ( ’OUT 07H \n ’ ) ;
// Output t o CH3
count reg .
printf ( ’MVI A, 0 3H \n ’ ) ;
// High o r d e r b y t e
o f t h e c o u n t 03FFH
printf ( ’OUT 07H \n ’ ) ;
// Output t o CH3
count reg .
printf ( ’MVI A, 1 0 0 0 0 0 0 0B \n \n ’ ) ;
printf ( ’ A7 A6 A5 A4 A3 A2 A1 A0 \n ’ ) ;
printf ( ’ 1 0 0 0 0 0 0 0 \n ’ ) ;
printf ( ’ A7 , A6=10
DACK DREQ High \n ’ ) ;
printf ( ’ A5=0
L a t e w r i t e \n ’ ) ;
printf ( ’ A4=0
F i x e d p r i o r i t y \n ’ ) ;
printf ( ’ A3=0
Normal t i m e \n ’ ) ;
printf ( ’ A2=0
DMA e n a b l e \n ’ )
printf ( ’ A0=0
D i s a b l e mem t o mem \n \n ’ ) ;
printf ( ’OUT 08H \n ’ ) ;
91
Figure 15.7: INITIALIZATION INSTRUCTIONS FOR DMA
Figure 15.8: INITIALIZATION INSTRUCTIONS FOR DMA
92
Chapter 19
Appendix A Number System
Scilab code Exa 19.1 BINARY INTO HEX AND OCTAL
1
2
3
4
5
6
7
8
9
10
11
12
13
// p a g e no 622
// e x a m p l e no A. 1
// BINARY INTO HEX AND OCTAL
clc ;
printf ( ’ B i n a r y no= 1 0 0 1 1 0 1 0 \n \n ’ ) ;
str = ’ 1 0 0 1 1 0 1 0 ’ ;
h = bin2dec ( str ) ;
H = dec2hex ( h ) ;
printf ( ’ Hex E q u i v a l e n t= ’ ) ;
disp ( H ) ;
O = dec2oct ( h ) ;
printf ( ’ \n O c t a l E q u i v a l e n t= ’ )
disp ( O ) ;
Scilab code Exa 19.2 SUBTRACTION OF TWO NUMBERS
1
// p a g e no 623
93
Figure 19.1: BINARY INTO HEX AND OCTAL
2 // e x a m p l e no A. 2
3 // SUBTRACTION OF TWO NUMBERS
4 clc ;
5 printf ( ’ Minuend : 52 \n ’ ) ;
6 printf ( ’ S u b t r a h e n d : 23 \n \n ’ )
7 printf ( ’BORROW METHOD \n \n ’ ) ;
8
9 m =5*10+2; // minuend
10 s =2*10+3; // s u b t r a h e n d
11 // t o s u b t r a c t 3 from 2 , 10 must be b o r r o w e d from
t h e s e c o n d p l a c e o f t h e minuend .
12
13 m =4*10+12;
14
15 sub =m - s ;
16 printf ( ’ S u b t r a c t i o n= ’ )
17 disp ( sub ) ;
18
19 printf ( ’ \n \n 10 s COMPLEMENT METHOD \n \n ’ ) ;
20
21 // 9 ’ s complement o f 23 i s
22
23 n =99 -23;
24 // add 1 t o t h e 9 ’ s complement t o f i n d t h e 1 0 ’ s
complement
25 t = n +1;
94
Figure 19.2: SUBTRACTION OF TWO NUMBERS
26
27
28
29
30
31
// add t h e 1 0 ’ s complement o f t h e s u b t r a h e n d ( 2 3 ) t o
minuend ( 5 2 ) t o s u b t r a c t 23 from 52
a=m+t;
// s u b t r a c t 100 from a t o c o m p e n s a t e f o r t h e 100
t h a t was added t o f i n d t h e 1 0 ’ s complement o f 23
sub =a -100;
printf ( ’ S u b t r a c t i o n= ’ ) ;
disp ( sub ) ;
Scilab code Exa 19.3 SUBTRACTION OF TWO NUMBERS
1 // p a g e no 624
2 // e x a m p l e no A. 3
3 // SUBTRACTION OF TWO NUMBERS
4 clc ;
5 printf ( ’ Minuend : 23 \n ’ ) ;
6 printf ( ’ S u b t r a h e n d : 52 \n \n ’ )
95
7 printf ( ’BORROW METHOD \n \n ’ ) ;
8
9 m =2*10+3; // minuend
10 s =5*10+2; // s u b t r a h e n d
11 // s u b t r a c t i o n o f t h e d i g i t s i n t h e
f i r s t place
r e s u l t s in
12 a =3 -2;
13 // t o s u b t r a c t t h e d i g i t s i n t h e s e c o n d p l a c e a
b o r r o w i s r e q u i r e d from t h e t h i r d p l a c e . a s s u m i n g
1 at t h i r d place .
14
15 x =12 -5; // w i t h a b o r r o w e d 1 from t h e t h i r d p l a c e
16
17 sub =10* x + a ;
18 printf ( ’ S u b t r a c t i o n= ’ )
19 disp ( sub ) ;
20 printf ( ’ t h i s i s n e g a t i v e 2 9 , e x p r e s s e d i n 10 s
complement . \n n e g a t i v e s i g n i s v e r i f i e d by t h e
b o r r o w e d 1 from t h e t h i r d p l a c e . ’ ) ;
21
22 printf ( ’ \n \n 10 s COMPLEMENT METHOD \n \n ’ ) ;
23
24 // 9 ’ s complement o f 52 i s
25
26 n =99 -52;
27 // add 1 t o t h e 9 ’ s complement t o f i n d t h e 1 0 ’ s
complement
28 t = n +1;
29 // add t h e 1 0 ’ s complement o f t h e s u b t r a h e n d ( 2 3 ) t o
minuend ( 5 2 ) t o s u b t r a c t 23 from 52
30 a = m + t ;
31
32 printf ( ’ S u b t r a c t i o n= ’ ) ;
33 disp ( a ) ;
34 printf ( ’ t h i s i s n e g a t i v e 2 9 , e x p r e s s e d i n 10 s
complement ’ ) ;
96
Figure 19.3: SUBTRACTION OF TWO NUMBERS
Scilab code Exa 19.4 2s COMPLIMENT OF BINARY NUMBER
1
2
3
4
5
6
7
8
9
10
11
12
// p a g e no 625
// e x a m p l e no A. 4
// 2 ’ s COMPLIMENT OF BINARY NUMBER
clc ;
printf ( ’ Given b i n a r y no= 0 0 0 1 1 1 0 0 \n \n ’ ) ;
str = ’ 0 0 0 1 1 1 0 0 ’
d = bin2dec ( str ) ;
x = bitcmp (d ,8) ;
s = x +1;
y = dec2bin ( s ) ;
printf ( ’ 2 s complement= ’ ) ;
disp ( y ) ;
97
Figure 19.4: 2s COMPLIMENT OF BINARY NUMBER
Scilab code Exa 19.5 SUBTRACTION OF TWO NUMBERS
// p a g e no 626
// e x a m p l e no A. 5
// SUBTRACTION OF TWO NUMBERS
clc ;
printf ( ’ S u b t r a h e n d= 32H \n ’ ) ;
printf ( ’ Minuend= 45H \n \n ’ ) ;
// f i n d i n g 2 ’ s complement o f s u b t r a h e n d ( 3 2H) ;
m = hex2dec ([ ’ 45 ’ ]) ;
x = hex2dec ([ ’ 32 ’ ]) ;
y = bitcmp (x ,8) ; // 1 ’ s c o m p l i m e n t o f 32H
z = y +1; // 2 ’ s c o m p l i m e n t o f 32H
s=m+z;
f =s -256; // t o c o m p e n s a t e t h e e f f e c t o f 2 ’ s
compliment
14 e = dec2hex ( f ) ;
15 printf ( ’ S u b t r a c t i o n= ’ ) ;
16 disp ( e ) ;
1
2
3
4
5
6
7
8
9
10
11
12
13
98
Figure 19.5: SUBTRACTION OF TWO NUMBERS
Scilab code Exa 19.6 SUBTRACTION OF TWO NUMBERS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
// p a g e no 626
// e x a m p l e no A. 6
// SUBTRACTION OF TWO NUMBERS
clc ;
printf ( ’ S u b t r a h e n d= 45H \n ’ ) ;
printf ( ’ Minuend= 32H \n \n ’ ) ;
// f i n d i n g 2 ’ s complement o f s u b t r a h e n d ( 3 2H) ;
m = hex2dec ([ ’ 32 ’ ]) ;
x = hex2dec ([ ’ 45 ’ ]) ;
y = bitcmp (x ,8) ; // 1 ’ s c o m p l i m e n t o f 32H
z = y +1; // 2 ’ s c o m p l i m e n t o f 32H
s=m+z;
r = dec2hex ( s ) ;
printf ( ’ S u b t r a c t i o n= ’ ) ;
disp ( r ) ;
printf ( ’ The r e s u l t i s n e g a t i v e & i t i s e x p r e s s e d i n
2 s complement . ’ )
Scilab code Exa 19.7 SUBTRACTION OF UNSIGNED NUMBERS
1
// p a g e no 628
99
Figure 19.6: SUBTRACTION OF TWO NUMBERS
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
// e x a m p l e no A. 7
// SUBTRACTION OF UNSIGNED NUMBERS
clc ;
printf ( ’ P a r t a \n \n ’ )
printf ( ’ S u b t r a h e n d= 62H \n ’ ) ;
printf ( ’ Minuend= FAH \n \n ’ ) ;
// f i n d i n g 2 ’ s complement o f s u b t r a h e n d ( 6 2H) ;
m = hex2dec ([ ’FA ’ ]) ;
x = hex2dec ([ ’ 62 ’ ]) ;
y = bitcmp (x ,8) ; // 1 ’ s c o m p l i m e n t o f 62H
z = y +1; // 2 ’ s c o m p l i m e n t o f 62H
s=m+z;
f =s -256; // t o c o m p e n s a t e t h e e f f e c t o f 2 ’ s
compliment
e = dec2hex ( f ) ;
printf ( ’ S u b t r a c t i o n= ’ ) ;
disp ( e ) ;
printf ( ’ T h i s r e s u l t i s p o s i t i v e \n \n ’ ) ;
printf ( ’ P a r t b \n \n ’ )
printf ( ’ S u b t r a h e n d= FAH \n ’ ) ;
printf ( ’ Minuend= 62H \n \n ’ ) ;
// f i n d i n g 2 ’ s complement o f s u b t r a h e n d (FAH) ;
m = hex2dec ([ ’ 62 ’ ]) ;
x = hex2dec ([ ’FA ’ ]) ;
y = bitcmp (x ,8) ; // 1 ’ s c o m p l i m e n t o f FAH
z = y +1; // 2 ’ s c o m p l i m e n t o f FAH
100
Figure 19.7: SUBTRACTION OF UNSIGNED NUMBERS
29 s = m + z ;
30 r = dec2hex ( s ) ;
31 printf ( ’ S u b t r a c t i o n= ’ ) ;
32 disp ( r ) ;
33 printf ( ’ The r e s u l t i s n e g a t i v e & i t
i s expressed in
2 s complement . ’ )
Scilab code Exa 19.8 SUBTRACTION OF SIGNED NUMBERS
1 // p a g e no 629
2 // e x a m p l e no A. 8
3 // SUBTRACTION OF SIGNED NUMBERS
4 clc ;
5 printf ( ’ P a r t a \n \n ’ )
6 printf ( ’ Minuend= FAH \n \n ’ ) ;
7 printf ( ’ I t i s a n e g a t i v e no s i n c e D7= 1 f o r FAH,
101
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
t h i s must be r e p r e s e n t e d i n \ n 2 s c o m p l i m e n t form .
\n ’ ) ;
// f i n d i n g 2 ’ s complement o f s u b t r a h e n d (FAH) ;
m = hex2dec ([ ’FA ’ ]) ;
x = hex2dec ([ ’ 62 ’ ]) ;
y = bitcmp (m ,8) ; // 1 ’ s c o m p l i m e n t o f FAH
z = y +1; // 2 ’ s c o m p l i m e n t o f FAH
printf ( ’ 2 s c o m p l i m e n t o f minuend i s = ’ ) ;
disp ( z ) ;
printf ( ’ \n \n S u b t r a h e n d= 62H \n ’ ) ;
printf ( ’ I t i s a p o s i t i v e no s i n c e D7= 0 f o r 62H . \n ’
);
// s u b t r a c t i o n can be r e p r e s e n t e d a s
// FAH−62H= ( −06H) −(+62H)
s = -x - z ;
a=-s;
d = dec2hex ( a ) ;
printf ( ’ S u b t r a c t i o n= ’ ) ;
disp ( s ) ;
disp ( d ) ;
printf ( ’ i n h e x a d e c i m a l w i t h a n e g a t i v e s i g n \n \n ’ ) ;
g = bitcmp (a ,8) ; // 1 ’ s c o m p l i m e n t o f r e s u l t
q = g +1; // 2 ’ s c o m p l i m e n t o f r e s u l t
e = dec2hex ( q ) ;
printf ( ’ 2 s c o m p l i m e n t o f r e s u l t would be= ’ ) ;
disp ( e ) ;
Scilab code Exa 19.9 ADDITION OF TWO POSITIVE NUMBERS
1
2
3
// p a g e no 629
// e x a m p l e no A. 9
// ADDITION OF TWO POSITIVE NUMBERS
102
Figure 19.8: SUBTRACTION OF SIGNED NUMBERS
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
clc ;
// t h e g i v e n numbers a r e 41H & 54H .
A = hex2dec ([ ’ 41 ’ ]) ;
B = hex2dec ([ ’ 54 ’ ])
Y=A+B;
X = dec2hex ( Y ) ;
printf ( ’ Sum = ’ )
disp ( X ) ;
if Y >255 then
// c h e c k i n g t h e c a r r y f l a g
.
printf ( ’CY=1 \n \n ’ )
else
printf ( ’CY=0 \n \n ’ )
end
if Y >127 then
// c h e c k i n g t h e s i g n f l a g .
printf ( ’ S=1 \n \n ’ )
else
printf ( ’ S=0 \n \n ’ )
103
Figure 19.9: ADDITION OF TWO POSITIVE NUMBERS
21 end
22 if Y >0 then
23
printf ( ’ Z=0 \n \n ’ )
24 else
25
printf ( ’ Z=1 \n \n ’ )
26 end
// c h e c k i n g t h e z e r o f l a g .
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