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en.evspin32g4-dual-schematics

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C1
10uF
VDDA
C2
100nF
VREF+
TP2
VDDA
C3
100nF
TP3
VREF+
C5
100nF
C4
1uF
2
TP4
VREF+
REG12
M1_VM
C6
1uF
R1
0
1
C7
10uF
25V
C8
100nF
25V
VDD
M2_VM
D
VSS
USER1
2
LED1
YELLOW
C24
1nF
5
SW3
3
4
R29
100k
4
REG12
51k
0
R14
0
R15
N.M.
R16
N.M.
R17
N.M.
OUT
GND
INH1_IN1
INH2_IN2
INH3_IN3
INL1_EN1
INL2_EN2
INL3_EN3
TP12
INL3
TP13
INL2
TP14
INL1
DIS
VDSMON
C14
N.M.
VDD
R10
10k
1%
Ioc~22A (2us)
TP9
M2_OCP
U2
STDRIVE101
24
23
22
21
20
19
R8
1k
1%
R11
N.M.
1%
C19
2.2nF
GLS1
OUT1
GHS1
BOOT1
GLS2
OUT2
M2_SHUNT+
C
M2_GLS1
M2_OUT1
M2_GHS1
M2_BOOT1
M2_GLS2
M2_OUT2
B
U3 LDK715M50R
IN
7
8
9
10
11
12
J4
OPEN
J3
5
5V
GND
TP17
TP16
5V
VCC
VDD
VDD
VDDA
C23
1uF
0
0
0
0
R20
R21
R22
R25
GND
TP15
VREGIN
VBAT
VDDA
VREF+
R27
120
A
LED2
YELLOW
C25
1nF
1
R28
100k
C22
100nF
25V
R24
200
USER2
1
2
1
SW2
3
4
PB2
VDD
R26
120
0
R13
VCC
2
R23
200
VDD
1
2
PB4
R12
4
DAC1_O1
PC13
A
PB7
PB3
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
C21
100nF
M2_INH1
M2_INH2
M2_INH3
INH1 TP8
INH2 TP10
INH3 TP11
M2_SPEED PA4
OPN2
PA5
OPO2
PA6
OPP2
PA7
I2C2_SCL PC4
OPN1
PC5
M1_H3
PB0
M1_VBUS PB1
M2_SW
PB2
VREF+
VDDA
M2_H3
PB10
M1_GLS1
M1_GLS2
M1_GLS3
R19
200
1
2
RESET
PA12 FDCAN1_TX
PA11 FDCAN1_RX
PA10 UART1_RX
PA9 UART1_TX
PA8 I2C2_SDA
M1_GHS1
M1_OUT1
M1_BOOT1
M1_GHS2
M1_OUT2
M1_BOOT2
M1_GHS3
M1_OUT3
M1_BOOT3
PB5
3
4
SW1
48
47
46
45
44
43
42
41
40
39
38
37
36
35
PG10
R18
100k
R9
nFAULT
REG12
VS
SCREF
DT_MODE
CP
PA12
PA11
PA10
PA9
PA8
GHS1
OUT1
BOOT1
GHS2
OUT2
BOOT2
GHS3
OUT3
BOOT3
U1
STSPIN32G4
M2_nFAULT
1
2
R6
10k
1%
6
5
4
3
2
1
REGIN
VCC
SW
VM
PB9
PB8
PB7
PB6
PB5
PB4
PB3
PD2
SCREF
PA15
PA14
PA13
REG3V3/VDD
VBAT
PC13
PC14
PC15
PF0
PF1
PG10
PC0
PC1
PC2
PC3
PA0
PA1
PA2
PA3
65
VDD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
C13
100nF
100V
BOOT3
GHS3
OUT3
GLS3
BOOT2
GHS2
PG10
nRST
M1_NTC PC0
M2_VBUS PC1
M2_NTC PC2
M1_SPEED PC3
M2_H1
PA0
M2_H2
PA1
OPO1
PA2
OPP1
PA3
3
2
4
1
VDD
VBAT
PC13
M1_SW
SPI_CS1 PC14
SPI_CS2 PC15
GND
C20
6.8pF
GND
X1
24.000MHZ
B
TP7
M2_nFAULT
PA4
PA5
PA6
PA7
PC4
PC5
PB0
PB1
PB2
VREFP
VDDA
PB10
GLS1
GLS2
GLS3
PGND
C18
6.8pF
C
D1
STPS1H100A
C12
1uF
100V
R7
10k
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
C17
100nF
25V
VDD
C11
N.M.
D
R4
22k
1%
0
13
14
15
16
17
18
C16
10uF
25V
C15
100nF
25V
R3
DIS
VDSMON
2
VREGIN TP6
VREGIN
R5
10k
1%
J2
VDD
M2_BOOT3
M2_GHS3
M2_OUT3
M2_GLS3
M2_BOOT2
M2_GHS2
2
1
2
J1
OPEN
2
18uH
M2_INH3
M2_INH2
PB7 M2_ENx
M2_nFAULT
PB5 M1_H2
PB4 M1_H1
PB3
PD2 CAN_SD
L1
1
1
VREGIN
VCC
VCC
R2
22k
1%
M2_INH1
PA14 SWCLK
PA13 SWDIO
C9
220nF
100V
VCC
TP5
C10
100nF
SPI1_MOSI
SPI1_MISO
SPI1_SCK
VBAT
Epad/GND
TP1
VDD
3
M2_INL3
M2_INL2
M2_INL1
VDD
4
25
5
Board Title
EVSPIN32G4-DUAL
Sheet Title
STSPIN32G4 and STDRIVE101
Doc No
3
Date
Friday, March 25, 2022
2
Rev
1
This drawing and the
information herein are
property of
STMicroelectronics
and are intended for
evaluation purpose only
Sheet
1 /4
1
R32
33
M1_BOOT1
C29
1uF
25V
M1_OUT1
D3
BAT48
Q1
R36
N.M.
1 2 3
R39
0
R42
0
Q4
R48
N.M.
1 2 3
C30
1uF
25V
M1_GLS2
C27
220nF
100V
R37
N.M.
Q2
1 2 3
D4
BAT48
R43
0
R49
N.M.
Q5
1 2 3
R35
33
C31
1uF
25V
M1_OUT3
C28
220nF
100V
5 6 7 8
R38
N.M.
Q3
1 2 3
D
R41
0
M1_W
D7
BAT48
5 6 7 8
R33
0
4
M1_GHS3
M1_BOOT3
R40
0
4
R45
33
M1_VM
5 6 7 8
M1_V
D6
BAT48
STL110N10F7
R46
33
R31
0
4
R34
33
M1_OUT2
5 6 7 8
4
M1_GLS1
M1_GHS2
M1_BOOT2
M1_U
D5
BAT48
M1_VM
5 6 7 8
4
M1_GHS1
D
R30
0
STL110N10F7
D2
BAT48
C26
220nF
100V
1
STL110N10F7
M1_VM
2
R44
0
5 6 7 8
4
M1_GLS3
R47
33
R50
N.M.
Q6
1 2 3
STL110N10F7
3
STL110N10F7
4
STL110N10F7
5
C
C
R52
0.01
TP41
GND
B
M2_BOOT1
C35
1uF
25V
M2_OUT1
1 2 3
R65
0
R68
33
1
2
Q10
1 2 3
1%
2W
R75
0.01
C36
1uF
25V
M2_GLS2
R60
N.M.
Q8
1 2 3
R63
0
R66
0
R72
N.M.
Q11
1 2 3
C37
1uF
25V
C34
220nF
100V
5 6 7 8
R61
N.M.
Q9
1 2 3
B
R64
0
M2_W
D13
BAT48
R69
0
5 6 7 8
4
M2_GLS3
R70
33
R73
N.M.
Q12
1 2 3
1%
2W
A
TP42
GND
4
R57
33
M2_OUT3
Board Title
EVSPIN32G4-DUAL
Sheet Title
Power stages
Doc No
5
R55
0
4
M2_GHS3
5 6 7 8
4
R67
33
D10
BAT48
M2_BOOT3
M2_V
D12
BAT48
M2_VM
5 6 7 8
4
R58
33
M2_OUT2
5 6 7 8
R71
N.M.
R74
0.01
N.M.
M2_GHS2
M2_BOOT2
R62
0
4
M2_GLS1
M2_SHUNT+
M2_SHUNT-
R59
N.M.
M2_U
D11
BAT48
A
Q7
R54
0
C33
220nF
100V
STL110N10F7
R56
33
D9
BAT48
5 6 7 8
4
M2_GHS1
M2_VM
STL110N10F7
R53
0
C32
220nF
100V
STL110N10F7
M2_VM
D8
BAT48
1%
2W
STL110N10F7
2
1%
2W
STL110N10F7
1
R51
0.01
N.M.
STL110N10F7
M1_SHUNT+
M1_SHUNT-
3
Date
Friday, March 25, 2022
2
Rev
1
This drawing and the
information herein are
property of
STMicroelectronics
and are intended for
evaluation purpose only
Sheet
2 /4
1
5
4
3
2
1
inside STSPIN32G4
CPN2
-
VREF+
CP2
+
D
OPP1
TP18
OPO1
TP19
OP1
R78
14k
1%
M1_SHUNT+
M1_SHUNT-
PC0
GND
TP24
R81
4.7k
1%
C38
N.M.
C39
33nF
M1_VBUS
TP22
M1_VM VDDA
R79
72.3k
1%
D14
BAT30K
R82
3.01k
1%
C40
33nF
R80
0
PB1
M1_SPEED
TP23
VREF+
TR1
100k
PC3
C41
33nF
R84
7k
1%
TP25
OPN1
C
M1_VM
TP21
NTC1
10k
PA2
-
PC5
R83
1k
1%
M1_NTC
TP20
+
PA3
D
VREF+
1
R76
14k
1%
2
R77
1k
1%
C
VREF+
VREF+
OPP2
TP26
inside STSPIN32G4
+
PA7
B
OP2
R87
14k
1%
M2_SHUNT+
M2_SHUNT-
OPO2
TP27
1
R85
14k
1%
NTC2
10k
PA6
-
PA5
R90
4.7k
1%
C42
N.M.
TP33
OPN2
M2_VM
TP30
PC2
GND
TP32
R92
1k
1%
M2_NTC
TP28
2
R86
1k
1%
C43
33nF
M2_VBUS
TP29
M2_VM VDDA
R88
72.3k
1%
D15
BAT30K
R91
3.01k
1%
C44
33nF
R89
0
PC1
M2_SPEED
TP31
VREF+
B
TR2
100k
PA4
C45
33nF
R93
7k
1%
SC1
SC2
SC3
SC4
SC5
SC6
A
A
SP1
5
4
SP2
SP3
SP4
SP5
SP6
Board Title
EVSPIN32G4-DUAL
Sheet Title
Analog
Doc No
3
Date
Friday, March 25, 2022
2
Rev
1
This drawing and the
information herein are
property of
STMicroelectronics
and are intended for
evaluation purpose only
Sheet
3 /4
1
4
PGND
2
1
D
M1_VM
2
1
+ C46
100uF
100V
+ C47
100uF
100V
+ C48
100uF
100V
R94
4.7k
0.5W
M1_V
4
3
2
1
M1_W
1
2
PGND
3
4
1
2
M1_U
4
3
M1_V
2
1
M2_VM
D
3
4
+ C49
100uF
100V
+ C50
100uF
100V
+ C51
100uF
100V
R95
4.7k
0.5W
CON4
LED3
RED
M1_W
M2_U
6
5
M2_V
4
3
2
1
M2_W
GND
TP34
R97
4.7k
0.5W
2
6
5
1
6
5
M2_VM
R96
4.7k
0.5W
CON3
M1_U
M2_VM
CON2
4
3
1
2
4
3
2
M1_VM
CON1
M1_VM
3
6
5
M2_U
4
3
M2_V
2
1
M2_W
LED4
RED
1
5
C
C
VDD
H1
H2
H3
VH
GND
J5
R98
10k
R99
10k
R100
10k
1
2
3
4
5
D16
BAT30K
R104
R107
R110
C55
100nF
25 V
R114
0
5V
TP35
D18
BAT30K
D17
BAT30K
TP36
TP37
10k
10k
10k
R115
N.M.
VCC
VDD
TP38
PA0
PA1
PB10
R116
N.M.
R113
N.M.
C52
1nF
C53
1nF
R117
N.M.
C54
1nF
R118
N.M.
H1
H2
H3
VH
GND
J6
R101
10k
R102
10k
D19
BAT30K
R103
10k
1
2
3
4
5
R105
R108
R111
C56
100nF
25 V
VDD
R119
0
5V
R120
N.M.
VCC
D20
BAT30K
10k
10k
10k
R106
R109
R112
R121
N.M.
C57
1nF
R122
N.M.
C58
1nF
TP39
TP40
D21
BAT30K
R123
N.M.
C59
1nF
0
0
0
PB4
PB5
PB0
R124
N.M.
VDD
J7
PB3
B
VDD
1
3
5
7
9
11
13
PA10
J8
P1
P3
P5
P7
P9
P11
P13
P2
P4
P6
P8
P10
P12
P14
2
4
6
8
10
12
14
PA13
PA14
R125
N.M.
VDD
PA13
PA14
PG10
PG10
PA9
1
3
5
7
9
11
13
15
17
19
2
4
6
8
10
12
14
16
18
20
B
VDD
J9
J10
TX
RX
GND
J13
SCL
SDA
GND
U4
VDD
PA12
A
C60
100nF
PA11
PD2
1
2
3
4
TXD
GND
VCC
RXD
S
CANH
CANL
SHDN
TCAN330DCNT
N.M.
8
7
6
5
1
2
3
4
R128
120
R126
2.2k
1
2
3
R127
2.2k
PC4
PA8
CANH
CANL
GND
SHIELD
4
J11
J14
CS1
MISO
MOSI
SCK
GND
1
2
3
4
5
PC14
PB4
PB5
PB3
J12
CS2
MISO
MOSI
SCK
GND
1
2
3
4
5
PC15
PB4
PB5
PB3
5V
REG12
VCC
VREGIN
VBAT
VDD
VDDA
VREF+
GND
1
2
3
4
5
6
7
8
9
5V
REG12
VCC
VREGIN
VBAT
VDD
VDDA
VREF+
A
Board Title
EVSPIN32G4-DUAL
Sheet Title
Inputs Outputs
Doc No
5
DAC
GND
J15
R130
N.M.
R129
10k
PA9
PA10
PD2
PB7
PC3
PA4
VDD
2x10 header
SAMTEC FTSH-107-01-L-DV-K-A
1
2
3
1
2
3
4
5
3
Date
Friday, March 25, 2022
2
Rev
1
This drawing and the
information herein are
property of
STMicroelectronics
and are intended for
evaluation purpose only
Sheet
4 /4
1
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