¿8|¨ıY 2Ñ⇠ ⌘⌅‡¨ Y¸: Yà: tÑ: 1. (10 points) ‰LX tƒ⇠î ̃⇠\, ̃⇠î tƒ⇠\ ¿XX‹$. (¿X ¸ D Ùt‹$.) (a) (5 points) 27.31510 (å+⇣ tX 4ê¨L¿ \‹X‹$.) (b) (5 points) 10110.01012 2. (30 points) ‰L |¨h⇠– XÏ <L– ıX‹$. F = xy 0 z + x0 y 0 z + w0 xy + wx0 y + wxy (a) (5 points) F X ƒ¨\| ¯¨‹$. (Ö%X ⌧⌧î w, x, y, z\ X‡, Ö%✓@ 0 ⇠ 15 ⌧⌧\ \| ë1X‹$.) (b) (5 points) F X å\| ¯¨‹$. 부울대수 (c) (5 points) Boolean algebra| t©XÏ F ce (d) (5 points) 8⌧ 2(c)X ∞¸– \åX literalD ƒ] ⌅µTX‹$. \ ƒ¨\| ë1X‹$. (Ö%X ⌧⌧î w, x, y, z\ X‡, Ö%✓@ 0 ⇠ 15 ⌧⌧\ XÏ \| ë1X‹$.) (e) (5 points) 8⌧ 2(d)X ∞¸| å\ƒ\ ¯¨‹$. (f) (5 points) 8⌧ 2(d)X ∞¸| Verilog primitive gate| t©XÏ l⌅X‹$. ‰LX ®» ∏D ¨©X‹$. module prob2 (input x, y, z, output F); ... endmodule 3. (20 points) ¯º 1X ƒ¨\– t˘Xî pi|¨å\| $ƒX‹$. ¯º 1: 8⌧ 3 (xî don’t-care conditionD ò¿ƒ) (a) (5 points) ú% X, Y, ZX ⌅µT⌧ |¨›D lX‹$. (b) (5 points) 8⌧ 3(a)X ∞¸| å\\ ¯¨‹$. (c) (10 points) ¯º 1X ƒ¨\| VerilogX if 8¸ ∞∞ê({, })D ¨©XÏ l⌅X‹$. (‰LX ®» X| t©X‹$. ƒ¨\–⌧ ú%t xx Ω∞–î |¨✓ 0D ú%Xƒ] 0 X‹$.) ¿8|¨ıY 2Ñ⇠ ⌘⌅‡¨, Page 2 of 2 module Prob3_c (input D0, D1, D2, D3, output X, Y, Z); 지사 ) ... always @(...) begin 재 ... . ' ( end endmodule 4. (40 points) 4D∏ Ö%D D, Ö%X◦ 2X Ù⇠| ú%Xî å\– XÏ ‰L <L– ıX‹$. (a) (5 points) å\X Ö%D A, B, C, D, ú%D w, x, y, z| ` L, t å\X ƒ¨\| ë1X‹$. (b) (10 points) 8⌧ 4(a)X ∞¸| t©XÏ ú%D exclusive-OR åt∏@ OR åt∏ ÃD ¨©XÏ l⌅X‹$. (c) (5 points) 8⌧ 4(b)X ∞¸| Verilog continuous assignment 8•D t©XÏ l⌅X‹$. (‰LX module X| t©X‹$.) module Prob4_c (input A, B, C, D, output w, x, y, z); endmodule (d) (10 points) 8⌧X å\X ŸëD 0 Xî ‰LX Verilog behavioral description ®»D D1X‹$. 2X Ù⇠| ª0 ⌅t⌧î < 1X Ù⇠| ËX‡, 1X Ù⇠– 1D TXt ⌧‰. 1X Ù⇠| lX0 ⌅ t⌧î 1@ 0<\, 0@ 1\ ∏t ⇠‡, t É@ VerilogX ⇠ ∞D ¨©Xt l⌅ •X‰. (always ]¸ Procedural assignment| ¨©X‹$.) module Prob4_d (in, out); // in[3] = A, in[2] = B, in[1] = C, in[0] = D // out[3] = w, out[2] = x, out[1] = y, out[0] = z input [3:0] in; output [3:0] out; ... endmodule (e) (10 points) 8⌧ 4(d)–⌧ $ƒ⌧ ®»D ‹¨ tXX0 ⌅\ L§∏§X ®»D D1X‹$. ë1⌧ L§∏§X ®»D ‰LD ÃqXÏ| \‰. • ®‡ tXt •\ Ö%– XÏ ‹¨ tX\‰. (Ö%t 4D∏t¿\, 16⌧X Ö%– XÏ ‹¨ •Xƒ] \‰.) • Ö% ¨tX ¿‹⌅@ 10ps\ \‰. • »¿… Ö%t Ö%⌧ ƒ, 100ps ƒ– ‹¨ tXD ÖÃXƒ] $stop h⇠| ¨©\‰. module tb_Prob4_d; ... endmodule