ctivity 1.2.4 Introduction to Sequential Logic A Design: Counters (DMS) Introduction long with combinational logic, sequential logic is a fundamental building block of digital A electronics. The output values of sequential logic depend not only on the current input values (i.e., combinational logic), but also on previous output values. Thus, sequential logic requires a clock signal to control sequencing and memory and to retain previous outputs. In this activity we will use the D flip-flop introduced in Activity 1.1.6 Component Identification: Digital. We are limiting our use to this type of flip-flop in this introductory unit because of its simplicity and ease of use. The D flip-flop is just one of many different types of flip-flops that can be used to implement sequential logic circuits. Equipment ● ● ● ● ircuit Design Software (CDS) C (2) - 74LS74 Integrated Circuits (ICs) #22 Gauge solid wire Breadboard D Flip-Flop Example Circuit: Binary Counter © 2014 Project Lead The Way, Inc. Digital Electronics Activity 1.2.4 Introduction to Sequential Logic Design: Counters (DMS) – Page1 Procedure Let’s begin the study of sequential logic by reviewing the basic operations of the D flip-flop. 1. Using the Circuit Design Software (CDS), create the circuit below. a) Start the simulation. b) S et the input switchesPandCto 5v. Again, sincePR and CLR are active low inputs, this will make them both inactive. Toggle the inputTseveral times. The circuit should behave exactly like the circuit in Activity 1.1.6, c ) Set the input switchPto GROUND andCto 5v. What is the state of the two outputs? NOT que is not able to be activated and que is always active ) Toggle the inputTseveral times. d Record what effect this has on the two outputs. nothing ) Set the input switchPto 5v andCto GROUND. e What is the state of the two outputs? NOT que is always active and que is not able to be activated f) T oggle the inputTseveral times. Record what effect this has on the two outputs. nothing © 2014 Project Lead The Way, Inc. Digital Electronics Activity 1.2.4 Introduction to Sequential Logic Design: Counters (DMS) – Page2 2. L et us examine a simple binary counter. Counters are one of the most common applications of flip-flops. The circuit that we will be observing is called a two-bit binary counter. The counter will count from zero (00 in binary) to three (11 in binary). 3. U sing the Circuit Design Software (CDS), enter the two-bit binary counter shown below. Use a switch for the inputClock-Inand probesfor the outputsAandB. a) Start the simulation. b) In Activity 1.1.6 we learned that the output on the first flip-flop (A) changesonly when the Clock-In goes from low to high. Toggle the inputClock-In(switchT) untilboth outputs A and B are both low and switchTis low. Now cycle switchT(Cycle means to toggle from low to high backto low) and record what effect this has on the two outputs in the table below. Clock-In Initial Values 1 Cycle of switch T 2n d Cycle of switch T 3rd Cycle of switch T th 4 Cycle of switch T 5th Cycle of switch T th 6 Cycle of switch T 7thCycle of switch T th 8 Cycle of switch T 9thCycle of switch T st A 0 B 0 1 1 0 0 0 1 1 0 1 1 0 0 0 1 1 0 1 1 © 2014 Project Lead The Way, Inc. Digital Electronics Activity 1.2.4 Introduction to Sequential Logic Design: Counters (DMS) – Page3 Based on these results, explain the pattern that you observe in the two outputs. For A, every value lasts for two cycles but for B every value lasts for one cycle 4. U sing the Circuit Design Software (CDS), modify the circuit used in step (1) so that it matches that shown below. a. T he first modification is to replace the switch input with aCLOCK_VOLTAGE. This change will result in the input being continuously toggled. Be sure the CLOCK_VOLTAGE is set to 5 volts, 50% duty cycle, 60 Hz. b. T he second modification is to add a four-channel oscilloscope set up to view the three signalsA,B, andClock-In. c. B e sure to set the oscilloscope’s time-base to 20ms/div and the vertical bases of the four channels to 10volts/div. Also, adjust the Y position of the three channels such that the four signals are all clearly visible. A B © 2014 Project Lead The Way, Inc. Digital Electronics Activity 1.2.4 Introduction to Sequential Logic Design: Counters (DMS) – Page4 CLK d. S tart the simulation and let it run until you have captured several periods of each signal. e. U sing the oscilloscope’s markers, measure the period of the three signals. Use this data to calculate the frequency for each signal. Record your data in the table below. Be sure to use the correct units. S Period Frequenc y 16.609 ms 60.208 Hz B 33.218ms 30.104 Hz A 49.827ms 20.069 Hz C f. B ased on these results, explain the relationship of the period and frequency between the three signals. Was this expected? larger period equals a smaller frequency. This was expected A due to the nature of the frequency equation being a fraction 5. A nalyze the 4-bit binary counter shown below to determine the frequency and period for the signals A, B, C, and D. Use the table shown below to record your answers. © 2014 Project Lead The Way, Inc. Digital Electronics Activity 1.2.4 Introduction to Sequential Logic Design: Counters (DMS) – Page5 Signa l Clock -In D C B A Frequ en cy Perio d 1.003 1000 Hz .076 ms 2 3.114 ms 8.997ms 13.149ms 81.696 Hz 4 1.13 Hz 111.148 Hz 76.05 Hz 6. W ith such a fast clock speed (1kHz) it is very difficult to see the binary count. Change the clock frequency to something that allows you to see the 4 probes transition more slowly in the simulation. Can you count to 15 in binary? What was the clock frequency that was best for you? 7. U sing the pin diagram on the datasheet for the 74LS74 D flip-flop, create the 4-Bit counter you explored in this activity on your protoboard. Wire the four outputs to (Y3, Y2, Y1, Y0) of your protoboard. Wire the DIO3 to the CLK input of the first flip-flop. Using the myDAQ to generate a clock signal. © 2014 Project Lead The Way, Inc. Digital Electronics Activity 1.2.4 Introduction to Sequential Logic Design: Counters (DMS) – Page6 8. W ith the protoboard plugged into the myDAQ, the myDAQ provides a number of instruments that assist with design and measurement. We will use the NI ELVISmx Digital Writer “DigOut” to generate a clock signal 9. Open National Instruments > NI ELVISmx Instrument Launcher. Select “DigOut”. 10. Settings: a. Lines to Write (0-3) b. Pattern (Ramp 0-15) c. Run Continuously 11.When you select “Run” the Digital Writer will send a signal that can be used as a clock signal to DIO3. 12.To utilize a faster frequency, switch to DIO2 DIO1 or DIO0. 13.Have your instructor verify the counter is functioning. Conclusion 1. T he 2-Bit and 4-Bit counters you explored in this activity are referred to as “divide by two” counters. Explain the relationship between each consecutive flip flop and the order in which they are laid out in the design from right to left that creates a binary count. each flip flop turns on and stays on for the amount of bits that the clock is set to 2. If you added a 5th bit, what would you guess is the highest number you could count to? © 2014 Project Lead The Way, Inc. Digital Electronics Activity 1.2.4 Introduction to Sequential Logic Design: Counters (DMS) – Page7 2.5 3. C an you think of 3-5 everyday items/products that might have a counter incorporated in them? clocks, computers, headphones, alarm, computer © 2014 Project Lead The Way, Inc. Digital Electronics Activity 1.2.4 Introduction to Sequential Logic Design: Counters (DMS) – Page8
