A NONINVERTING BUCK-BOOST CONVERTER WITH REDUCED COMPONENTS USING A MICROCONTROLLER Kevin M. Torres, Member, IEEE Robert S . Weissbach, Member, IEEE rsw7@psu.edu kevin-torres@psu.edu The Pennsylvania State University at Erie School of Engineering & Engineering Technology Erie, PA 16563-1701 the output voltage relative to the input voltage [l], according to the equation: ABSTRACT * This paper presents a simple method for microcontroller implementation of a noninverting buck-boost converter. The converter requires two switches, but only one set of controls. As compared to a cascaded buck converterhoost converter topology, the noninverting buck-boost converter requires one less capacitor and inductor. The system operates as a buck converter for duty cycles between 0 - 50% in the microcontroller, and as a boost converter (up to a gain of twice the input voltage) for duty cycles between 50 - 100%. The system is therefore also advantageous because the microcontroller algorithm prevents a dead short from occurring during operation in the boost converter mode. Experimental and Pspice results prove that both buck and boost operation are possible using this topology. The effect of the load resistance on the results is discussed. Vout = Vin-d where: Vout is the dc output voltage Vin is the dc input voltage d is the duty cycle The boost converter raises the output voltage relative to the input voltage via the equation: - 1 Vout = Vin 1-d (2) The buck-boost converter allows for dc voltage at one level to be either raised or lower, depending on the switch duty cycle. The equation for this converter is: Vout = -Vin- 1-d (3) Another common buck-boost converter is the Cuk converter. This converter has the same voltage ratio as the buck-boost converter, but has the advantage that the input and output inductors create a smooth current at both sides of the converter while the buck-boost has at least one side with pulsed current. However, both buck-boost configurations result in the output voltage being inverted in magnitude relative to the input voltage. In some situations, this is not desirable. Huang, et. al. [2] presented a multilevel noninverting Cuk converter. This converter is based on the work by Middlebrook [3]. The author in [3] uses multiple stages to reduce component stresses. The authors in [2] modi@ this work by rearranging the direction of current flow to obtain their noninverting converter. KEYWORDS Noninverting buck-boost converter, duty cycle, microcontroller, Pspice I. INTRODUCTION With the use of power electronics devices, high efficiency conversion of energy may be accomplished. One area where these devices are used is in dc-dc converters. These converters act as “dc transformers” due to their ability to change a dc voltage from one level to another with high efficiency. The buck converter reduces 0-7803-6748-0/01/$10.00 02001 IEEE (1) 79 Authorized licensed use limited to: NATIONAL INSTITUTE OF TECHNOLOGY SURATHKAL. Downloaded on August 09,2023 at 16:24:29 UTC from IEEE Xplore. Restrictions apply. The equation for this noninverting buckboost converter is: .cJ out = V iN(n1-d)d (4) 12 - 10 - 8 :": where N is the number of stages. The authors in [2] state that this converter is good for high frequency switching at low duty cycles. As an example, for a 3-stage converter (N=3), the ratio of Vout to Vin can be seen as a function of duty cycle in Fig. 1. As seen in Fig. 1, the system is highly nonlinear. Operation in the buck mode (low duty cycle) allows for accurate control, while accurate control in the boost mode is more difficult. The duty cycle for this 3stage system to achieve a voltage gain of unity is 75%, while to achieve a gain of two requires an 86% duty cycle . In this paper, a noninverting buck-boost converter is provided which reduces the number of components and attempts to linearize the gain as a function of duty cycle. Although two switches are required versus only one in the inverting or Cuk converters, only one capacitor and inductor are necessary (versus two for each in the Cuk converter). In addition, only one set of controls is required to achieve either a bucking or boosting of the output voltage relative to the input voltage. Almost linear control can be theoretically achieved over a gain range of 0 - 200% of the input voltage. c I 4 2 - 0- I , I I I , a , I I - Fig. 1. PIot of dc gain versus duty cycle for the noninverting Cuk converter closed and switch S2 is controlled, the system looks like a boost converter with the exception of the freewheeling diode D1. If switch S1 remains closed while switch S2 remains open, then the output voltage will equal the input voltage (minus the voltage drop across diode D2, assuming an ideal inductor). With this knowledge, a table can be developed which covers all of the possible switching permutations for S1 and S2. This is provided in Table 1. Table 1 shows that if both switches are closed, then switch S2 will short across the load. This is the condition encountered during boost converter operation when the inductor is storing energy. If both switches are open, then no power is provided to the load. This is the condition encountered during buck converter operation when the energy stored in the inductor is freewheeled through the load and diodes D1 and D2. When switch $1 is closed and switch S2 is open, then the supply voltage will be provided directly to the load. This is the condition encountered in the buck converter when energy is flowing from the supply to the load. It is also the condition encountered during boost converter operation when both 11. SYSTEM DESIGN The noninverting buck-boost converter is shown in Fig. 2 . A principal motivation in this design is to minimize the number of required components. Hence, this design requires two controlled switches, two diodes, one inductor and one capacitor. One can see from this design that if switch S2 remains open and switch SI is controlled, the system looks like a buck converter with the exception of the loss across series diode D2. Conversely, if switch S1 remains I I I - 80 Authorized licensed use limited to: NATIONAL INSTITUTE OF TECHNOLOGY SURATHKAL. Downloaded on August 09,2023 at 16:24:29 UTC from IEEE Xplore. Restrictions apply. s1 s2 Open Open Closed Closed Open Closed Open Closed OPERATING MODE Buck NIA Buck-Boost Boost The gating signal logic was provided at a frequency of 1 kHz by an Infineon C504 8bit CMOS microcontroller. Two different load resistors were used to illustrate the effect of the load on the system. The results for the two different load resistors are provided in Fig. 5, with comparison to theoretical values, based on [l]. An output voltage of between 13 and 14 volts was measured at the transition from buck to boost mode, due primarily to the voltage drop across diode D2. Figure 5a indicates that in the buck converter mode, the output voltage rises faster than the theoretical output value, until the microcontroller reaches a DC control of around 40% (corresponding to a buck converter duty cycle of 80%). Above this duty cycle, and into the boost converter mode of operation, the output voltage tends to saturate as the DC control increases. In Fig. 5b, the output voltage in the buck mode with the 1.5kSZ load resistor rises quickly towards approximately 14 volts as the DC control increases. In the boost mode, the output voltage rises to a much higher level in Fig. 5b with the larger load resistance. Clearly, Fig. 5a and 5b indicate that the load resistance will have a significant effect on the output voltage for this converter design. To validate the experimental results, the system was simulated in Pspice As seen in Fig. 6, the output voltage for the two different load resistances tends to follow the curves measured experimentally, rather than the theoretical values. J the supply energy and inductor energy are provided to the load, boosting the load voltage. Finally, it is seen from Table 1 that neither the buck converter nor boost converter includes a condition where switch S1 is open and switch S2 is closed. The flowchart for microcontroller implementation of this system is provided in Fig. 3. A counter is incremented from 0 100% for each period of a pulse width modulation (PWM) wavefonn. At each increment, the counter is compared with a duty cycle (DC) control to determine whether switches S1 and S2 should be open or closed. The microcontroller algorithm allows for a seamless transition from the buck mode to the boost mode at 50% duty cycle. This requires buck operation from 0% - 100% of the output voltage to occur using only 0 - 50% duty cycle of the control system. This is achieved by comparing the counter to twice the DC control level. If the counter is less than twice that level, then switch S1 in Fig. 2 will be on. Switch S2 tums on if the counter exceeds 50% of its maximum value and still remains below the value of the DC control level. The switching of both S1 and S2 for varying duty cycle controls is provided in Fig. 3. Figures 4a and 4b illustrate the gating of the two switches for buck and boost operation, respectively. Table 2. Parameter values used for experimental testing. Parameter Value s1 3 2 MOSFET TP8N08 15 Vdc 18.71mH, R=32.6R C 12.35uF 1N914DI,D~ Load Resistance 3792, 1.5kQ 111. EXPERIMENTAL AND SIMULATION RESULTS The non-inverting buck-boost converter of Figure 2 was constructed using the measured parameters provided in Table 2. 81 Authorized licensed use limited to: NATIONAL INSTITUTE OF TECHNOLOGY SURATHKAL. Downloaded on August 09,2023 at 16:24:29 UTC from IEEE Xplore. Restrictions apply. 0 START YES SWITCH 1 SWITCH 1 ON OFF NO SWITCH 2 OFF 9 SWITCH 2 Fig. 3. Flowchart for switch control of the noninverting buck-boost converter s1 G T Voltage Counter (“Aduty cycle) Counter (% duty cycle) s2 Gate Voltage 5 (v) T s2 Gate Voltage 5 v-l I I I I I I I I I L 20 40 BO 80 100 Counter (% duty cycle) I 20 40 40 80 100 Counter (% duty cycle) Fig. 4b. Gate voltages for a microcontroller duty cycle control of 70%. Fig. 4a. Gate voltages for a microcontroller duty cycle control of 30%. 82 Authorized licensed use limited to: NATIONAL INSTITUTE OF TECHNOLOGY SURATHKAL. Downloaded on August 09,2023 at 16:24:29 UTC from IEEE Xplore. Restrictions apply. , //I Vo (R=375 ohm) -Theoretical vo I I 1 1 0 -. 0 20 40 60 80 100 DC Control (%) Fig. 5a. Output voltage as a function of DC control for a load resistance of 37552. 25 20 15 10 (R=1500 ohm) i ii -Theoretical -Vo vo I 5 0 0 20 40 60 DC Control (%) 80 100 Fig. 5b. Output voltage as a function of DC control for a load resistance of 1.5k52. 40 , I 35 30 25 20 I -- __.__ - Vo (R=375 ohm) +Vo (R=l500 ohm) 15 10 5 0 -Theoretical 0 20 40 60 80 Vo I ~ 100 DC Control (%) Fig. 6. Pspice simulation of noninverting buck-boost converter with different load resistors. 83 Authorized licensed use limited to: NATIONAL INSTITUTE OF TECHNOLOGY SURATHKAL. Downloaded on August 09,2023 at 16:24:29 UTC from IEEE Xplore. Restrictions apply. IV. Robert S . Weissbach received his B.S.E.E. from the University of Florida in 1987, his SUMMARY M.S.E.E. from Rensselaer Polytechnic Institute in 1990, and his Ph.D. in electrical engineering from Arizona State University in 1998. From 1988 - 1994 he was employed by General Dynamics Electric Boat Division in Groton, CT, where he worked on the design, construction and testing of submarine turbine-generator sets. He is currently an assistant professor of engineering at Penn State Erie and a co-director of an applied research center located at the campus. His research interests are in flywheel energy storage systems and power electronics. A noninverting buck-boost converter has been developed. The system requires two switches but only one algorithm for their control. A microcontroller has been used to This implement the control scheme. topology prevents operation in a dead short condition, since the boost converter is limited to at most a gain of twice the input due to the maximum duty cycle provided by the microcontroller. Both buck and boost operation has been achieved. Test and Pspice results indicate that the value of load resistance has a direct influence on the output voltage. Future work in this area includes optimizing the components used in the system, studying the theoretical effect of the load resistance on the output voltage, and implementing feedback control into the system to correct for changes in the load resistance. Kevin M. Torres received the B.E.E. degree (Cum Laude) from Auburn University in 1990, and the M.S.E.E. degree from Georgia Institute of Technology in 1996. From 1990 - 1998 he was employed by the Georgia Tech Research Institute (GTRI) as a research engineer. While at GTRI Mr. Torres was involved in the design and upgrade of military EW systems. He is currently a lecturer of engineering at Penn State Erie, where he teaches electronics, microcontrollers and programming. His interests include high-density electronic packaging specializing in hybrid microelectronics engineering for DC, analog and RF systems. He is a member of IEEE, IMAPS, V. REFERENCES: [ 13 M. H. Rashid, “PowerElectronics: Circuits, Devices, & Applications“, Englewood Cliffs: Prentice Hall, 1992 E23 W. Huang, K. Yen, G. Roig and E. Lee, and ASEE. “Voltage Divided Noninverting Cuk Converter with Large Conversion Ratios,” IEEE Proceedings of Southeastcon 1991, Williamsburg, VA, April 7 - 10, 1991 [3] R. D. Middlebrook, “Transformerless Dcto-Dc Converters with Large Conversion Ratios,” IEEE Transactions on Power Electronics, Vol. 3, No. 4, pp. 484 - 488, October 1988 84 Authorized licensed use limited to: NATIONAL INSTITUTE OF TECHNOLOGY SURATHKAL. Downloaded on August 09,2023 at 16:24:29 UTC from IEEE Xplore. Restrictions apply.