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Europe/Africa
Asia/Oceania
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LED TV
SERVICE MANUAL
CHASSIS : LA41V
MODEL : 55UB8500
55UB8500-UA
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
P/NO : MFL68086406 (1404-REV00)
Printed in Korea
CONTENTS
CONTENTS . ............................................................................................. 2
PRODUCT SAFETY ................................................................................. 3
SPECIFICATION........................................................................................ 6
ADJUSTMENT INSTRUCTION............................................................... 14
EXPLODED VIEW .................................................................................. 26
SCHEMATIC CIRCUIT DIAGRAM ..............................................................
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-2-
LGE Internal Use Only
SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by
in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
General Guidance
Leakage Current Hot Check (See below Figure)
Plug the AC cord directly into the AC outlet.
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.
It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this TV receiver is blown,
replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1 W), keep the resistor 10 mm away from PCB.
Keep wires away from high voltage or high temperature parts.
Do not use a line Isolation Transformer during this check.
Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage
measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
0.5 mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.
Leakage Current Hot Check circuit
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed
metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.
Leakage Current Cold Check(Antenna Cold Check)
With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 MΩ and 5.2 MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-3-
LGE Internal Use Only
SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service
manual and its supplements and addenda, read and follow the
SAFETY PRECAUTIONS on page 3 of this publication.
NOTE: If unforeseen circumstances create conflict between the
following servicing precautions and any of the safety precautions
on page 3 of this publication, always follow the safety precautions.
Remember: Safety First.
General Servicing Precautions
1. Always unplug the receiver AC power cord from the AC power
source before;
a. Removing or reinstalling any component, circuit board module or any other receiver assembly.
b. Disconnecting or reconnecting any receiver electrical plug or
other electrical connection.
c. Connecting a test substitute in parallel with an electrolytic
capacitor in the receiver.
CAUTION: A wrong part substitution or incorrect polarity
installation of electrolytic capacitors may result in an explosion hazard.
2. Test high voltage only by measuring it with an appropriate
high voltage meter or other voltage measuring device (DVM,
FETVOM, etc) equipped with a suitable high voltage probe.
Do not test high voltage by "drawing an arc".
3. Do not spray chemicals on or near this receiver or any of its
assemblies.
4. Unless specified otherwise in this service manual, clean
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable
non-abrasive applicator; 10 % (by volume) Acetone and 90 %
(by volume) isopropyl alcohol (90 % - 99 % strength)
CAUTION: This is a flammable mixture.
Unless specified otherwise in this service manual, lubrication of
contacts in not required.
5. Do not defeat any plug/socket B+ voltage interlocks with which
receivers covered by this service manual might be equipped.
6. Do not apply AC power to this instrument and/or any of its
electrical assemblies unless all solid-state device heat sinks are
correctly installed.
7. Always connect the test receiver ground lead to the receiver
chassis ground before connecting the test receiver positive
lead.
Always remove the test receiver ground lead last.
8. Use with this receiver only the test fixtures specified in this
service manual.
CAUTION: Do not connect the test fixture ground strap to any
heat sink in this receiver.
Electrostatically Sensitive (ES) Devices
Some semiconductor (solid-state) devices can be damaged easily by static electricity. Such components commonly are called
Electrostatically Sensitive (ES) Devices. Examples of typical ES
devices are integrated circuits and some field-effect transistors
and semiconductor “chip” components. The following techniques
should be used to help reduce the incidence of component damage caused by static by static electricity.
1. Immediately before handling any semiconductor component or
semiconductor-equipped assembly, drain off any electrostatic
charge on your body by touching a known earth ground. Alternatively, obtain and wear a commercially available discharging
wrist strap device, which should be removed to prevent potential shock reasons prior to applying power to the unit under test.
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
2. After removing an electrical assembly equipped with ES
devices, place the assembly on a conductive surface such as
aluminum foil, to prevent electrostatic charge buildup or exposure of the assembly.
3. Use only a grounded-tip soldering iron to solder or unsolder ES
devices.
4. Use only an anti-static type solder removal device. Some solder
removal devices not classified as “anti-static” can generate
electrical charges sufficient to damage ES devices.
5. Do not use freon-propelled chemicals. These can generate
electrical charges sufficient to damage ES devices.
6. Do not remove a replacement ES device from its protective
package until immediately before you are ready to install it.
(Most replacement ES devices are packaged with leads electrically shorted together by conductive foam, aluminum foil or
comparable conductive material).
7. Immediately before removing the protective material from the
leads of a replacement ES device, touch the protective material
to the chassis or circuit assembly into which the device will be
installed.
CAUTION: Be sure no power is applied to the chassis or circuit,
and observe all other safety precautions.
8. Minimize bodily motions when handling unpackaged replacement ES devices. (Otherwise harmless motion such as the
brushing together of your clothes fabric or the lifting of your
foot from a carpeted floor can generate static electricity sufficient to damage an ES device.)
General Soldering Guidelines
1. Use a grounded-tip, low-wattage soldering iron and appropriate
tip size and shape that will maintain tip temperature within the
range or 500 °F to 600 °F.
2. Use an appropriate gauge of RMA resin-core solder composed
of 60 parts tin/40 parts lead.
3. Keep the soldering iron tip clean and well tinned.
4. Thoroughly clean the surfaces to be soldered. Use a mall wirebristle (0.5 inch, or 1.25 cm) brush with a metal handle.
Do not use freon-propelled spray-on cleaners.
5. Use the following unsoldering technique
a. Allow the soldering iron tip to reach normal temperature.
(500 °F to 600 °F)
b. Heat the component lead until the solder melts.
c. Quickly draw the melted solder with an anti-static, suctiontype solder removal device or with solder braid.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature
(500 °F to 600 °F)
b. First, hold the soldering iron tip and solder the strand against
the component lead until the solder melts.
c. Quickly move the soldering iron tip to the junction of the
component lead and the printed circuit foil, and hold it there
only until the solder flows onto and around both the component lead and the foil.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
d. Closely inspect the solder area and remove any excess or
splashed solder with a small wire-bristle brush.
-4-
LGE Internal Use Only
IC Remove/Replacement
Some chassis circuit boards have slotted holes (oblong) through
which the IC leads are inserted and then bent flat against the circuit foil. When holes are the slotted type, the following technique
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique
as outlined in paragraphs 5 and 6 above.
3. Solder the connections.
CAUTION: Maintain original spacing between the replaced
component and adjacent components and the circuit board to
prevent excessive component temperatures.
Circuit Board Foil Repair
Excessive heat applied to the copper foil of any printed circuit
board will weaken the adhesive that bonds the foil to the circuit
board causing the foil to separate from or "lift-off" the board. The
following guidelines and procedures should be followed whenever
this condition is encountered.
Removal
1. Desolder and straighten each IC lead in one operation by
gently prying up on the lead with the soldering iron tip as the
solder melts.
2. Draw away the melted solder with an anti-static suction-type
solder removal device (or with solder braid) before removing
the IC.
Replacement
1. Carefully insert the replacement IC in the circuit board.
2. Carefully bend each IC lead against the circuit foil pad and
solder it.
3. Clean the soldered areas with a small wire-bristle brush.
(It is not necessary to reapply acrylic coating to the areas).
At IC Connections
To repair a defective copper pattern at IC connections use the
following procedure to install a jumper wire on the copper pattern
side of the circuit board. (Use this technique only on IC connections).
"Small-Signal" Discrete Transistor
Removal/Replacement
1. Remove the defective transistor by clipping its leads as close
as possible to the component body.
2. Bend into a "U" shape the end of each of three leads remaining
on the circuit board.
3. Bend into a "U" shape the replacement transistor leads.
4. Connect the replacement transistor leads to the corresponding
leads extending from the circuit board and crimp the "U" with
long nose pliers to insure metal to metal contact then solder
each connection.
Power Output, Transistor Device
Removal/Replacement
1. Heat and remove all solder from around the transistor leads.
2. Remove the heat sink mounting screw (if so equipped).
3. Carefully remove the transistor from the heat sink of the circuit
board.
4. Insert new transistor in the circuit board.
5. Solder each transistor lead, and clip off excess lead.
6. Replace heat sink.
Diode Removal/Replacement
1. Remove defective diode by clipping its leads as close as possible to diode body.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and if
necessary, apply additional solder.
1. Carefully remove the damaged copper pattern with a sharp
knife. (Remove only as much copper as absolutely necessary).
2. carefully scratch away the solder resist and acrylic coating (if
used) from the end of the remaining copper pattern.
3. Bend a small "U" in one end of a small gauge jumper wire and
carefully crimp it around the IC pin. Solder the IC connection.
4. Route the jumper wire along the path of the out-away copper
pattern and let it overlap the previously scraped end of the
good copper pattern. Solder the overlapped area and clip off
any excess jumper wire.
At Other Connections
Use the following technique to repair the defective copper pattern
at connections other than IC Pins. This technique involves the
installation of a jumper wire on the component side of the circuit
board.
1. Remove the defective copper pattern with a sharp knife.
Remove at least 1/4 inch of copper, to ensure that a hazardous
condition will not exist if the jumper wire opens.
2. Trace along the copper pattern from both sides of the pattern
break and locate the nearest component that is directly connected to the affected copper pattern.
3. Connect insulated 20-gauge jumper wire from the lead of the
nearest component on one side of the pattern break to the lead
of the nearest component on the other side.
Carefully crimp and solder the connections.
CAUTION: Be sure the insulated jumper wire is dressed so the
it does not touch components or sharp edges.
Fuse and Conventional Resistor
Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.
2. Securely crimp the leads of replacement component around
notch at stake top.
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-5-
LGE Internal Use Only
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.
1. Application range
This spec sheet is applied to the LED TV used LA41U/LA41V/
LA41B chassis
2. Test condition
Each part is tested as below without special notice.
1) Temperature : 25 ºC ± 5 ºC(77±9ºF), CST : 40 ºC±5 ºC
2) Relative Humidity: 65 % ± 10 %
3) Power Voltage
Standard input voltage (100~240V@ 50/60Hz)
* Standard Voltage of each products is marked by models.
4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM.
5) The receiver must be operated for about 20 minutes prior to
the adjustment.
3. Test method
1) Performance: LGE TV test method followed
2) Demanded other specification
- Safety : UL, CSA, CE, IEC specification
- EMC : FCC, ICES, CE, IEC specification
- Wireless : Wireless HD Specification (Option)
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-6-
LGE Internal Use Only
4. General Specification
No
1.
Item
Display Screen Device
Specification
Remark
105” wide color display module
98” wide color display module
84” wide color display module
LC840EQD-SGF1(Flat T240)
79” wide color display module
LC790EQF-FGF1(Flat T240)
(Curved T120)
65” wide color display module
LC650EQF-FGF1
LC650CQN-FHF1(Curved T120)
60”
55” wide color display module
LC550EQF-FGF1(Flat T240)
LC550CQN-FHF1(Curved T120)
LC550EQE-PGF1(Flat T120)
49” wide color display module
(Curved T120)
LC490EQE-XGF2(Flat T120)
40”
2.
Aspect Ratio
16:9
All
3.
LCD Module
105” QWUXGA TFT LCD
98” QWUXGA TFT LCD
84” QWUXGA TFT LCD
LC840EQD-SGF1(Flat T240)
79” QWUXGA TFT LCD
LC790EQF-FGF1(Flat T240)
(Curved T120)
65” QWUXGA TFT LCD
LC650EQF-FGF1
LC650CQN-FHF1(Curved T120)
60” QWUXGA TFT LCD
55” QWUXGA TFT LCD
LC550EQF-FGF1(Flat T240)
LC550CQN-FHF1(Curved T120)
LC550EQE-PGF1(Flat T120)
49” QWUXGA TFT LCD
(Curved T120)
LC490EQE-XGF2(Flat T120)
40”
4.
Operating Environment
TFT
1) Temp. : 0 ~ 40 deg
2) Humidity : 0 ~ 85%
5.
Storage Environment
ALEF
1) Temp. : 0 ~ 50 deg
2) Humidity : 20 ~ 90%
6.
Input Voltage
AC100 ~ 240V, 50/60Hz
7.
Display Colors
1.06 B (10-bit)
Except FHD 60Hz models
16.7 M (8-bit)
Only FHD 60Hz models
Surface Treatment
LGE SPEC
Hard coating (2H), Anti-glare
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-7-
LGE Internal Use Only
5. External input format
5.1. 2D Mode
5.1.1. Component input(Y, CB/PB, CR/PR)
No
Resolution
H-freq(kHz)
V-freq.(Hz)
Pixel clock(MHz)
Proposed
1
720*480
15.73
60
13.5135
SDTV ,DVD 480I
2
720*480
15.73
59.94
13.5
SDTV ,DVD 480I
3
720*480
31.50
60
27.027
SDTV 480P
4
720*480
31.47
59.94
27.0
SDTV 480P
5
1280*720
45.00
60.00
74.25
HDTV 720P
6
1280*720
44.96
59.94
74.176
HDTV 720P
7
1920*1080
33.75
60.00
74.25
HDTV 1080I
8
1920*1080
33.72
59.94
74.176
HDTV 1080I
9
1920*1080
67.500
60
148.50
HDTV 1080P
10
1920*1080
67.432
59.94
148.352
HDTV 1080P
11
1920*1080
27.000
24.000
74.25
HDTV 1080P
12
1920*1080
26.97
23.976
74.176
HDTV 1080P
13
1920*1080
33.75
30.000
74.25
HDTV 1080P
14
1920*1080
33.71
29.97
74.176
HDTV 1080P
5.1.2. HDMI Input (PC/DTV)
No.
Resolution
H-freq(kHz)
V-freq.(kHz)
Pixel clock(MHz)
HDMI-PC
Proposed
DDC
1
640*350
31.468
70.09
25.17
EGA
Х
2
720*400
31.469
70.08
28.32
DOS
O
3
640*480
31.469
59.94
25.17
VESA(VGA)
O
4
800*600
37.879
60.31
40.00
VESA(SVGA)
O
5
1024*768
48.363
60.00
65.00
VESA(XGA)
O
6
1152*864
54.348
60.053
80.00
VESA
O
7
1280*1024
63.981
60.020
108.00
VESA (SXGA)
O
8
1360*768
47.712
60.015
85.50
VESA (WXGA)
O
9
1920*1080
67.5
60
148.5
WUXGA(Reduced Blanking)
O
10
3840*2160
54
24.00
297.00
Only UD Model
O
11
3840*2160
56.25
25.00
297.00
Only UD Model
O
12
3840*2160
67.5
30.00
297.00
Only UD Model
O
14
3840*2160
135
60
594
Only UD Model, Port3
O
15
4096*2160
54
24
297
Only UD Model
O
16
4096*2160
56.25
25
297
Only UD Model
O
17
4096*2160
67.5
30
297
Only UD Model
O
18
4096*2160
135
60
594
Only UD Model, Port3
O
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-8-
LGE Internal Use Only
HDMI-DTV
1
640 * 480
31.469
59.94
25.125
SDTV 480P
2
640 * 480
31.5
60
25.125
SDTV 480P
3
720 * 480
31.5
60
27.027
SDTV 480P
4
720 * 480
31.47
59.94
27.00
SDTV 480P
5
1280*720
45.00
60.00
74.25
HDTV 720P
6
1280*720
44.96
59.94
74.176
HDTV 720P
7
1920*1080
33.75
60.00
74.25
HDTV 1080I
8
1920*1080
33.72
59.94
74.176
HDTV 1080I
9
1920*1080
67.50
60
148.50
HDTV 1080P
10
1920*1080
67.432
59.94
148.35
HDTV 1080P
11
1920*1080
27.000
24.000
74.25
HDTV 1080P
12
1920*1080
26.97
23.976
74.176
HDTV 1080P
13
1920*1080
33.75
30.000
74.25
HDTV 1080P
14
1920*1080
33.71
29.97
74.176
HDTV 1080P
15
3840*2160
67.5
30.00
297.00
UDTV 2160P
16
3840*2160
61.43
29.97
296.703
UDTV 2160P
17
3840*2160
56.25
25.00
297.00
UDTV 2160P
18
3840*2160
54.0
24.00
297.00
UDTV 2160P
19
3840*2160
53.95
23.976
296.703
UDTV 2160P
20
3840*2160
135
59.94
594
UDTV 2160P(HDMI 3 only)
21
3840*2160
135
60
594
UDTV 2160P(HDMI 3 only)
22
4096*2160
53.95
23.98
296.703
UDTV 2160P
23
4096*2160
54
24
297
UDTV 2160P
24
4096*2160
56.25
25
297
UDTV 2160P
25
4096*2160
61.43
29.97
296.703
UDTV 2160P
26
4096*2160
67.5
30
297
UDTV 2160P
27
4096*2160
135
59.94
594
UDTV 2160P(HDMI 3 only)
28
4096*2160
135
60
594
UDTV 2160P(HDMI 3 only)
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-9-
LGE Internal Use Only
5.2. 3D Mode
5.2.1. HDMI Input 1.4b (3D supported mode automatically)
No
Resolution
1
640*480
2
3
4
720*480
1280*720
1920*1080
H-freq(kHz)
V-freq.(Hz)
Pixel clock
(MHz)
VIC
3D input proposed
mode
Proposed
31.469 / 31.5
59.94/ 60
25.175/25.2
1
Top-and-Bottom
Side-by-side(half)
Secondary(SDTV 480P)
Secondary(SDTV 480P)
62.938 / 63
59.94/ 60
50.35/50.4
1
Frame packing
Line alternative
Secondary(SDTV 480P)
(SDTV 480P)
31.469 / 31.5
59.94/ 60
50.35/50.4
1
Side-by-side(Full)
(SDTV 480P)
31.469 / 31.5
59.94 / 60
27.00/27.03
2,3
Top-and-Bottom
Side-by-side(half)
Secondary(SDTV 480P)
Secondary(SDTV 480P)
62.938 / 63
59.94 / 60
54/54.06
2,3
Frame packing
Line alternative
Secondary(SDTV 480P)
(SDTV 480P)
31.469 / 31.5
59.94 / 60
54/54.06
2,3
Side-by-side(Full)
(SDTV 480P)
44.96 / 45
59.94 / 60
74.18/74.25
4
Top-and-Bottom
Side-by-side(half)
Primary(HDTV 720P)
Primary(HDTV 720P)
89.91 / 90
59.94 / 60
148.35/148.5
4
Frame packing
Line alternative
Primary(HDTV 720P)
(HDTV 720P)
44.96 / 45
59.94 / 60
148.35/148.5
4
Side-by-side(Full)
(HDTV 720P)
33.72 / 33.75
59.94 / 60
74.18/74.25
5
Top-and-Bottom
Side-by-side(half)
Secondary(HDTV 1080I)
Primary(HDTV 1080I)
67.432 / 67.5
59.94 / 60
148.35/148.5
5
Frame packing
Field alternative
Primary(HDTV 1080I)
(HDTV 1080I)
33.72 / 33.75
59.94 / 60
148.35/148.5
5
Side-by-side(Full)
(HDTV 1080I)
26.97 / 27
23.97 / 24
74.18/74.25
32
Top-and-Bottom
Side-by-side(half)
Primary(HDTV 1080P)
Primary(HDTV 1080P)
43.94 / 54
23.97 / 24
148.35/148.5
32
Frame packing
Line alternative
Primary(HDTV 1080P)
(HDTV 1080P)
26.97 / 27
23.97 / 24
148.35/148.5
32
Side-by-side(Full)
(HDTV 1080P)
28.125
25
74.25
33
Top-and-Bottom
Side-by-side(half)
Secondary(HDTV 1080P)
Secondary(HDTV 1080P)
56.25
25
148.5
33
Frame packing
Line alternative
Secondary(HDTV 1080P)
(HDTV 1080P)
28.125
25
148.5
33
Side-by-side(Full)
(HDTV 1080P)
33.716 / 33.75
29.976 / 30.00
74.18/74.25
34
Top-and-Bottom
Side-by-side(half)
Primary(HDTV 1080P)
Secondary(HDTV 1080P)
67.432 / 67.5
29.976 / 30.00
148.35/148.5
34
Frame packing
Line alternative
Primary(HDTV 1080P)
(HDTV 1080P)
33.716 / 33.75
29.976 / 30.00
148.35/148.5
34
Side-by-side(Full)
(HDTV 1080P)
67.43 / 67.5
59.94 / 60
148.35/148.50
16
Top-and-Bottom
Side-by-side(half)
Primary(HDTV 1080P)
Secondary(HDTV 1080P)
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 10 -
LGE Internal Use Only
5.2.2. HDMI 1.4/2.0(3D Supported mode manaually)
No
Resolution
H-freq(kHz)
V-freq.(Hz)
Pixel clock
(MHz)
Proposed
3D input proposed mode
2D to 3D, Side by Side(Half), Top & Bottom,
Checker Board, Frame Sequential,
Row Interleaving, Column Interleaving
1.
720*480
31.5
60
27.03
SDTV 480P
2.
1280*720
45.00
60.00
74.25
HDTV 720P
3.
1920*1080
33.75
60.00
74.25
HDTV 1080I
2D to 3D, Side by Side(Half), Top & Bottom
4.
1920*1080
27.00
24.00
74.25
HDTV 1080P
5.
1920*1080
28.12
25
74.25
HDTV 1080P
6.
1920*1080
33.75
30.00
74.25
HDTV 1080P
2D to 3D, Side by Side(Half), Top & Bottom,
Checker Board, Row Interleaving,
Column Interleaving
7.
1920*1080
67.50
60.00
148.5
HDTV 1080P
8.
3840*2160
53.95
23.976
296.703
HDTV 2160P
9.
3840*2160
54
24.00
297.00
HDTV 2160P
10.
3840*2160
56.25
25.00
297.00
HDTV 2160P
11.
3840*2160
61.43
29.970
296.703
HDTV 2160P
12.
3840*2160
67.5
30.00
297.00
HDTV 2160P
13.
4096*2160
53.95
23.976
296.703
HDTV 2160P
14.
4096*2160
54
24.00
297.00
HDTV 2160P
15.
4096*2160
56.25
25.00
297.00
HDTV 2160P
16.
4096*2160
61.43
29.970
296.703
HDTV 2160P
17.
4096*2160
67.5
30.00
297.00
HDTV 2160P
18.
3840*2160
135
60
594
HDTV 2160P
2D to 3D, Top & Bottom(half),
Side by Side(half), Port3 Only
19.
4096*2160
135
60
594
HDTV 2160P
2D to 3D, Top & Bottom(half),
Side by Side(half), Port3 Only
2D to 3D, Side by Side(Half), Top & Bottom,
Checker Board, Single Frame Sequential,
Row Interleaving, Column Interleaving
5.2.3. HDMI-PC Input (3D) (3D Supported Mode Manually)
No
Resolution
H-freq(kHz)
V-freq.(Hz)
Pixel clock
(MHz)
Proposed
1.
1024*768
48.36
60
65
HDTV 768P
2D to 3D,
Side by Side(half), Top & Bottom
2.
1360*768
47.71
60
85.5
HDTV 768P
2D to 3D,
Side by Side(half), Top & Bottom
3.
1920*1080
67.500
60
148.50
HDTV 1080P
2D to 3D,
Side by Side(half), Top & Bottom,
Checker Board, Single Frame Sequential,
Row Interleaving, Column Interleaving
4.
3840*2160
4096*2160
HDTV 2160P
2D to 3D,
Top & Bottom(half), Side by Side(half),
2D to 3D,
Top & Bottom(half), Side by Side(half),
Port3 Only
54
24.00
296.703
56.25
25.00
297
67.5
30.00
296.703
5.
3840*2160
4096*2160
135
60
594
HDTV 2160P
6.
Others
-
-
-
640*350
720*400
640*480
800*600
1152*864
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 11 -
3D input proposed mode
2D to 3D,
Side by Side(half), Top & Bottom
LGE Internal Use Only
5.2.4. RF Input(3D supported mode manually)
No.
Resolution
H-freq(kHz)
V-freq.(Hz)
Pixel clock(MHz)
Proposed
1
1280*720
37.500
50
74.25
HDTV 720P
2D to 3D, Side by Side, Top & Bottom
3D input proposed mode
2
1920*1080
28.125
50
74.25
HDTV 1080I
2D to 3D, Side by Side, Top & Bottom
5.2.5. RF Input (3D supported mode automatically)
No.
Signal
3D input proposed mode
1
Frame Compatible
Side by Side(Half), Top & Bottom
5.2.6. USB, DLNA (Movie) Input (3D supported mode manually)
No.
Resolution
H-freq(kHz)
V-freq.(Hz)
Pixel clock(MHz)
1
Under 704x480
-
-
-
2D to 3D
3D input proposed mode
2
Over 704x480
interlaced
-
-
-
2D to 3D, Side by Side(Half), Top & Bottom
3
Over 704x480
progressive
-
60
-
2D to 3D, Side by Side(Half), Top & Bottom,
Checker Board, Row Interleaving, Column Interleaving,
Frame Sequential
4
Over 704x480
progressive
-
others
-
2D to 3D, Side by Side(Half), Top & Bottom,
Checker Board, Row Interleaving, Column Interleaving
5
Over 2160P
-
24/25/30/60
-
2D to 3D, Side by Side(Half), Top & Bottom, USB Only
5.2.7. USB, DLNA (Photo) Input (3D supported mode manually)
No
Resolution
H-freq(kHz)
V-freq.(Hz)
Pixel clock(MHz)
3D input proposed mode
1
Under 320x240
-
-
-
2D to 3D
2
Over 320x240
-
-
-
2D to 3D, Side by Side(Half), Top & Bottom
5.2.8. USB, DNLA Input (3D supported mode automatically)
No
Resolution
H-freq(kHz)
V-freq.(Hz)
Pixel clock(MHz)
1
1080P
33.75
30
-
2
2160p
67.5
30
297
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 12 -
3D input proposed mode
Side by Side(Half), Top & Bottom, Checker Board,
MPO(Photo)
MPO(Photo), JPS(Photo)
LGE Internal Use Only
5.2.9. Component Input(3D supported mode manually)
No.
Resolution
H-freq(kHz)
V-freq.(Hz)
Pixel clock(MHz)
1
1280*720
45.00
60.00
74.25
HDTV 720P
Proposed
2
1280*720
37.500
50
74.25
HDTV 720P
3
1920*1080
33.75
60.00
74.25
HDTV 1080I
4
1920*1080
28.125
50.00
74.25
HDTV 1080I
5
1920*1080
27.00
24.00
74.25
HDTV 1080P
6
1920*1080
28.12
25
74.25
HDTV 1080P
7
1920*1080
33.75
30.00
74.25
HDTV 1080P
8
1920*1080
67.50
60.00
148.5
HDTV 1080P
9
1920*1080
56.250
50
148.5
HDTV 1080P
10
Others
-
-
-
Remark
2D to 3D,
Side by Side(Half),
Top & Bottom
SDTV
5.2.10. Miracast, Widi (3D supported mode manually)
No
Resolution
H-freq(kHz)
V-freq.(Hz)
Pixel clock(MHz)
1
1024X768p
-
30 / 60
-
2
1280x720p
-
30 / 60
-
3
1920X1080p
30 / 60
4
Others
-
3D input proposed mode
2D to 3D, Side by Side(Half), Top & Bottom
2D to 3D
**Remark: 3D Input mode
No.
Side by Side
Top & Bottom
Checkerboard
Single Frame
Sequential
Frame Packing
Line
Interleaving
Column
Interleaving
1
L
R
LLLLL
R
L
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
R
- 13 -
L
LGE Internal Use Only
ADJUSTMENT INSTRUCTION
1. Application Range
This spec. sheet applies to LA41U/LA41V/LA41B Chassis
applied LED TV all models manufactured in TV factory
2. Specification.
(1) Because this is not a hot chassis, it is not necessary to use
an isolation transformer. However, the use of isolation
transformer will help protect test instrument
(2) Adjustment must be done in the correct order.
(3) The adjustment must be performed in the circumstance of
25 ±5ºC of temperature and 65±10% of relative humidity if
there is no specific designation
(4) The input voltage of the receiver must keep 100~240V,
50/60Hz
(5) The receiver must be operated for about 5 minutes prior to
the adjustment when module is in the circumstance of over
15ºC
▪ In case of keeping module is in the circumstance of 0°C, it
should be placed in the circumstance of above 15°C for 2
hours
▪ In case of keeping module is in the circumstance of below
-20°C, it should be placed in the circumstance of above 15°C
for 3 hours
* Caution) When still image is displayed for a period of 20
minutes or longer (especially where W/B scale is
strong. Digital pattern 13ch and/or Cross hatch
pattern 09ch), there can some afterimage in the
black level area.
3. Adjustment items
3.1. Main PCB check process
▪ MAC Address Download
▪ ADC adjustment : 480i Comp1, 1920*1080 Comp1
▪ EDID/DDC download
Above adjustment items can be also performed in Final
Assembly if needed. Both Board-level and Final assembly
adjustment items can be check using In-Start Menu 1.ADJUST
CHECK.
3.2. Final assembly adjustment
▪ White Balance adjustment
▪ RS-232C functionality check
▪ PING Test
▪ Factory Option setting per destination
▪ Ship-out mode setting (In-Stop)
3.3. Etc.
▪ Ship-out mode
▪ Service Option Default
▪ USB Download(S/W Update, Option, Service only)
▪ ISP Download (Option)
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
4. Automatic Adjustment
4.1. ADC Adjustment
ADC adjustment is needed to find the optimum black level and
gain in Analog-to-Digital device and to compensate RGB
deviation.
4.1.1. Equipment & Condition
(1) USB to RS-232C Jig
(2) M SPG-925 Series Pattern Generator(MSPG-925FA,
pattern -65)
- Resolution : 480i Comp1
1080P Comp1
- Pattern : Horizontal 100% Color Bar Pattern
- Pattern level : 0.7±0.1 Vp-p
- Image
4.1.2. Adjustment method
▪ Using USB, adjust items listed in 3.1 in the other shown in
“4.1.3.3”
4.1.3. 3 Adj. protocol
Protocol
Command
Set ACK
Enter adj. mode
aa 00 00
a 00 OK00x
Source change
xb 00 40
xb 00 60
b 00 OK04x (Adjust 480i, 1080p Comp1 )
b 00 OK06x (Adjust 1920*1080 RGB)
Begin adj.
ad 00 10
Return adj. result
Read adj. data
OKx (Case of Success)
NGx (Case of Fail)
(main)
ad 00 20
(main)
000000000000000000000000007c007b006dx
(sub )
ad 00 21
(Sub)
000000070000000000000000007c0083
0077x
Confirm adj.
ad 00 99
NG 03 00x (Fail)
NG 03 01x (Fail)
NG 03 02x (Fail)
OK 03 03x (Success)
End adj.
ad 00 90
a 00 OK90x
Ref.) ADC Adj. RS232C Protocol_Ver1.0
Adj. order
▪ aa 00 00
▪ xb 00 04
▪ ad 00 10
▪ xb 00 06
▪ ad 00 10
▪ aa 00 90
- 14 -
[Enter ADC adj. mode]
[Change input source to Component1(480i&1080p)]
[Adjust 480i&1080p Comp1]
[Change input source to RGB(1024*768)]
[Adjust 1920*1080 RGB]
End adj.
LGE Internal Use Only
4.2. M
AC address, ESN, Widevine, HDCP2.0
key D/L
4.2.1. Equipment & Condition
4.3. LAN Inspection
4.3.1. Equipment & Condition
▪ Each other connection to LAN Port of IP Hub and Jig
1) Play file: keydownload.exe
4.2.2. Communication Port connection
1) Key Write: Com 1,2,3,4 and 115200 (Baudrate)
2) Barcode: Com 1,2,3,4 and 9600 (Baudrate)
4.2.3. Download process
1) Select the download items.
2) Mode check: Online Only
3) Check the test process : DETECT -> MAC -> Widevine
4) Play: START
5) Check of result: Ready, Test, OK or NG
4.3.2. LAN inspection solution
▪ LAN Port connection with PCB
▪ Network setting at MENU Mode of TV
▪ Setting automatic IP
▪ Setting state confirmation
- If automatic setting is finished, you confirm IP and MAC
Address.
4.2.4. Communication Port connection
1) ) Connect: PCBA Jig -> RS-232C Port == PC -> RS-232C
Port
4.2.5. Download
1) AJ/JA Models (14Y LCD TV + MAC + Widevine + ESN +
HDCP2.0)
4.3.3. LAN PORT INSPECTION (PING TEST)
1) Play the LAN Port Test PROGRAM.
2) Input IP set up for an inspection to Test
Program.
*IP Number : 12.12.2.2.
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 15 -
LGE Internal Use Only
* Manual Download (Model Name and Serial Number)
4.3.4. LAN PORT inspection (PING TEST)
1) Play the LAN Port Test Program.
2) connect each other LAN Port Jack.
3) Play Test (F9) button and confirm OK Message.
4) remove LAN CABLE
If the TV set is downloaded By OTA or Service man,
sometimes model name or serial number is initialized. ( not
always)
It is impossible to download by bar code scan, so It need
Manual download.
a. Press the ‘INSTART’ key of ADJ remote controller.
b. Go to the menu ‘7. Model Number D/L’ like below photo.
c. Input the Factory model name or Serial number like below
photo.
d. Check the model name INSTART menu -> Factory name
displayed
e. Check the Diagnostics (DTV country only) -> Buyer model
displayed
4.5. WIFI MAC ADDRESS CHECK
4.5.1. Using RS232 Command
4.4. Model name & Serial number Download
Transmission
4.4.1. Model name & Serial number D/L
Command
Set ACK
[A][l][][Set ID][][20][Cr]
[O][K][x] or [N][G]
■ Check the menu on in-start
▪ P ress “Power on” key of service remocon.(Baud rate :
115200 bps)
▪ Connect RS-232C Signal to USB Cable to USB.
▪ Write Serial number by use USB port.
▪ Must check the serial number at Instart menu.
■ Method & Notice
A. Serial number D/L is using of scan equipment.
B. S
etting of scan equipment operated by Manufacturing
Technology Group.
C. Serial number D/L must be conformed when it is produced
in production line, because serial number D/L is mandatory
by D-book 4.0
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 16 -
LGE Internal Use Only
5. Manual Adjustment
5.1. ADC adjustment is not needed because of
OTP (Auto ADC adjustment)
5.2.4. EDID DATA
▪ Reference
- HDMI1 ~ HDMI3
- HDMI1 ~ HDMI4
- In the data of EDID, bellows may be different by Input mode
5.2. EDID
(The Extended Display Identification Data)
/ DDC (Display Data Channel) download
5.2.1. Overview
It is a VESA regulation. A PC or a MNT will display an optimal
resolution through information sharing without any necessity of
user input. It is a realization of “Plug and Play”.
5.2.2. Equipment
▪ Since embedded EDID data is used, EDID download JIG,
HDMI cable and D-sub cable are not need.
▪ Adjust remocon
5.2.3. Download method
1) Press Adj. key on the Adjust remocon, then select “12.EDID
D/L”.
By pressing Enter key, enter EDID D/L menu
ⓐ Product ID
ⓑ Serial No: Controlled on production line.
ⓒ Month, Year: Controlled on production line:
ex) Monthly : ‘01’ -> ‘01’
Year : ‘2014’ -> ‘18
ⓓ Model Name(Hex): LGTV
ⓔ Checksum(LG TV): Changeable by total EDID data.
ⓕ Vendor Specific(HDMI)
5.2.4.1. EDID
#DTS HDMI1 (C/S: F7 82)
EDID Block 0, Bytes 0-127
2) Select [Start] button by pressing Enter key, HDMI1 / HDMI2
/ HDMI3 / HDMI4 are Writing and display OK or NG.
EDID Block 1, Bytes 128-255
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 17 -
LGE Internal Use Only
#DTS HDMI2 (C/S: E7 72)
EDID Block 0, Bytes 0-12
# DTS HDMI4 (C/S: E7 52)
EDID Block 0, Bytes 0-127
EDID Block 1, Bytes 128-255
EDID Block 1, Bytes 128-255
#DTS HDMI3 (C/S: A1 81)
EDID Block 0, Bytes 0-127
# AC3 HDMI1 (C/S: E7 8B)
EDID Block 0,
EDID Block 1, Bytes 128-255
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 18 -
LGE Internal Use Only
# AC3 HDMI2 (C/S: E7 7B)
# AC3 HDMI4 (C/S: E7 5B)
# AC3 HDMI3 (C/S: A1 8A)
# PCM HDMI1 (C/S: F7 FD)
EDID Block 0, Bytes 0-127
Copyright ©
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Only for training and service purposes
- 19 -
LGE Internal Use Only
# PCM HDMI2 (C/S: E7 E2)
# PCM HDMI4 (C/S: E7 BD)
# PCM HDMI3 (C/S: A1 FC)
EDID Block 0, Bytes 0-127
* Checksum (HDMI 1/2/3/4)
Input
DTS FFh
(Checksum)
AC3 FFh
(Checksum)
PCM FFh
(Checksum)
HDMI1
E7
82
E7
8B
E7
FD
HDMI2
E7
72
E7
7B
E7
ED
HDMI3
A1
81
A1
8A
A1
FC
HDMI4
E7
52
E7
5B
E7
BD
5.3. Camera Port Inspection
(1) Objective : To check how it connects between Camera and
PCBA normally, and their Function
(2) Test Method : This Inspection is available only Power-Only
Status.
i) Push Camera Up
ii) Camera’s Preview picture appears on TV Set
iii) Push Camera Down
(3) RS-232C Command
RS-232C COMMAND
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 20 -
Explanation
CMD
DATA
ID
Ai
00
23
Camera Function Start.
Ai
00
24
Camera Function End.
LGE Internal Use Only
5.4. V-COM Adjust
(1) RS-232C Command used during auto-adj.
(*) O
NLY FOR GP2 2010year model. GP3 LW Series
[2011year] spec out !
RS-232C COMMAND
Explanation
CMD
DATA
ID
5.5. White Balance Adjustment
wb
00
00
Begin White Balance adj.
wb
00
10
Gain adj.(internal white pattern)
5.5.1.1. W/B adj. Objective & How-it-works
(1) Objective: To reduce each Panel’s W/B deviation
(2) H
ow-it-works: When R/G/B gain in the OSD is at 192, it
means the panel is at its Full Dynamic Range. In order to
prevent saturation of Full Dynamic range and data, one of
R/G/B is fixed at 192, and the other two is lowered to find
the desired value.
(3) Adj. condition: normal temperature
- Surrounding Temperature: 25±5 °C
- Warm-up time: About 5 Min
- Surrounding Humidity: 20% ~ 80%
wb
00
1f
Gain adj. completed
wb
00
20
Offset adj.(internal white pattern)
wb
00
2f
Offset adj. completed
wb
00
ff
End White Balance adj.
(internal pattern disappears )
5.5.1. Overview
5.5.2. Equipment
(1) C
olor Analyzer: CA-210 (LED Module : CH 14)
(2) A dj. Computer (During auto adj., RS-232C protocol is
needed)
(3) Adjust Remocon
(4) V
ideo Signal Generator MSPG-925F 720p/204-Gray
(Model: 217, Pattern: 49)
※ Color Analyzer Matrix should be calibrated using CS-1000
Ex) wb 00 00 -> Begin white balance auto-adj.
wb 00 10 -> Gain adj.
ja 00 ff -> Adj. data
jb 00 c0
...
...
wb 00 1f -> Gain adj. complete
*(wb 00 20(start), wb 00 2f(endc)) -> Off-set adj.
wb 00 ff -> End white balance auto adj.
(2) Adjustment Map
(Applied Model : L A 4 1 U / L A 4 1 V / L A 4 1 B C h a s s i s A L L
MODELS)
5.5.3. Equipment connection MAP
Adj. item
Cool
Medium
Warm
5.5.4. Adj. Command (Protocol)
<Command Format>
START 6E A 50 A LEN A 03 A CMD A 00 A VAL A CS
A STOP
Command
(lower caseASCII)
Data Range
(Hex.)
CMD1
CMD2
MIN
MAX
R Gain
j
g
00
C0
G Gain
j
h
00
C0
B Gain
j
i
00
C0
R Gain
j
a
00
C0
G Gain
j
b
00
C0
B Gain
j
c
00
C0
R Gain
j
d
00
C0
G Gain
j
e
00
C0
B Gain
j
f
00
C0
- LEN: Number of Data Byte to be sent
- CMD : Command
- VAL : FOS Data value
- CS : Checksum of sent data
- A : Acknowledge
Ex) [Send: JA_00_DD] / [Ack: A_00_okDDX]
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 21 -
LGE Internal Use Only
5.5.5. Adjustment method
5.5.5.1. Auto WB calibration
(1) Set TV in adj. mode using POWER ONNY key
(2) Z
ero calibrate probe then place it on the center of the
Display
(3) Connect Cable (RS-232C to USB)
(4) Select mode in adj. Program and begin adj.
(5) W
hen adj. is complete (OK Sign), check adj. status pre
mode(Warm, Medium, Cool)
(6) Remove probe and RS-232C to USB cable to complete adj.
▪ W/B Adj. must begin as start command “wb 00 00” , and
finish as end command “wb 00 ff”, and Adj. offset if need
5.5.5.2. Manual adj. method
1) Set TV in Adj. mode using POWER ON
2) Zero Calibrate the probe of Color Analyzer, then place it on
the center of LCD module within 10cm of the surface..
3) Press ADJ key -> EZ adjust using adj. R/C -> 7. WhiteBalance then press the cursor to the right (KEY►).
( When KEY(►) is pressed 216 Gray internal pattern will be
displayed)
4) One of R Gain / G Gain / B Gain should be fixed at 192, and
the rest will be lowered to meet the desired value.
5) Adj. is performed in COOL, MEDIUM, WARM 3 modes of
color temperature.
** R-fix adjustment
Adjust modes (Cool), Fix the R gain to 210 (default data) and
change the others (G/B Gain ).
- Adjust the R gain more than 210 ( If G gain or B gain is less
than 0 , R gain can adjust more than 210 ) and
change the others ( G/B Gain ).
Adjust two modes (Medium / Warm), Fix the one of R/G/B gain
to 192 (default data) and decrease the others.
5.5.6. Reference (White Balance Adj. coordinate and
color temperature)
▪ Luminance: 206 Gray
▪ Standard color coordinate and temperature using CS-1000
(over 26 inch)
Mode
Y
Temp
△uv
Cool
0.271
0.270
13,000K
0.0000
Medium
0.286
0.289
9,300K
0.0000
Warm
0.313
0.329
6,500K
0.0000
▪ Standard color coordinate and temperature using CA-210
(CH 14)
Mode
Coordinate
X
Y
Temp
△uv
Cool
0.271±0.002
0.270±0.002
13000K
0.0000
Medium
0.286±0.002
0.289±0.002
9300K
0.0000
Warm
0.313±0.002
0.329±0.002
6500K
0.0000
5.5.7. EDGE & IOL LED White balance table
▪ Edge & ALEF LED module change color coordinate because
of aging time
▪ apply under the color coordinate table, for compensated
aging time
(Normal line) Edge & ALEF LED White balance table
- gumi(Mar~Dec) & Global
Model : (normal line)LGD, CMI
▪ If internal pattern is not available, use RF input. In EZ Adj.
menu 7.White Balance, you can select one of 2 Test-pattern:
ON, OFF. Default is inner(ON). By selecting OFF, you can
adjust using RF signal in 216 Gray pattern.
▪ Adj. condition and cautionary items
1) Lighting condition in surrounding area
S
urrounding lighting should be lower 10 lux. Try to isolate
adj. area into dark surrounding.
2) Probe location
- PDP : C
olor Analyzer (CA-100, CA-100+, CA210) probe
should be firmly attached to the Module
- LCD : C
olor Analyzer (CA-210) probe should be within 10cm
and perpendicular of the module surface (80°~ 100°)
3) Aging time
- A fter Aging Start, Keep the Power ON status during 5
Minutes.
- In case of LCD, Back-light on should be checked using no
signal or Full-white pattern.
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Coordinate
X
- 22 -
webOS
Aging time
(Min)
Cool
Medium
Warm
X
Y
X
Y
X
Y
271
270
285
293
313
329
1
0-2
281
287
295
310
320
342
2
3-5
280
285
294
308
319
340
3
6-9
278
284
292
307
317
339
4
10-19
276
281
290
304
315
336
5
20-35
275
277
289
300
314
332
6
36-49
274
274
288
297
313
329
7
50-79
273
272
287
295
312
327
8
80-119
272
271
286
294
311
326
9
Over 120
271
270
285
293
310
325
LGE Internal Use Only
5.7. Magic Motion Remocon test
- gumi Winter table(Jan, Fab) – Gumi producing model use only
Model : (normal line) LGD
webOS
Aging time
(Min)
1
0-2
2
Cool
Medium
X
Y
X
Y
271
270
285
283
292
297
3-5
282
290
296
3
6-9
280
288
4
10-19
277
284
5
20-35
275
6
36-49
274
7
50-79
8
80-119
9
Over 120
- Equipment : RF Remocon for test, IR-KEY-Code Remocon
for test
- You must confirm the battery power of RF-Remocon before
test
(recommend that change the battery per every lot)
- Sequence (test)
a) if you select the ‘start key(OK)’ on the controller, you can
pairing with the TV SET.
b) You can check the cursor on the TV Screen, when select
the ‘OK Key’ on the controller
c) You must remove the pairing with the TV Set by select
‘Mute + OK Key’ on the controller
Warm
X
Y
293
313
329
315
322
347
313
321
345
294
311
319
343
291
307
316
339
279
289
302
314
334
275
288
298
313
330
273
272
287
295
312
327
272
271
286
294
311
326
271
270
285
293
310
325
5.8. 3D function test
(Pattern Generator MSHG-600, MSPG-6100 [SUPPORT
HDMI1.4])
* HDMI mode NO. 872 , pattern No.83
- (Aging Chamver)Edge&ALEF
Model : (aging chamber)LGD,
webOS
Aging time
(Min)
1
0-5
2
3
4
5
Cool
Medium
X
Y
X
Y
271
270
285
280
285
294
6-10
276
280
11-20
272
275
21-30
269
31-40
267
6
41-50
7
51-80
8
9
1) Please input 3D test pattern like below (HDMI mode NO. 872 ,
pattern No.83)
Warm
X
Y
293
313
329
308
319
340
290
303
315
335
286
298
311
330
272
283
295
308
327
268
281
291
306
323
266
265
280
288
305
320
265
263
279
286
304
318
81-119
264
261
278
284
303
316
Over 120
264
260
278
283
303
315
2) When 3D OSD appear automatically , then select green button
5.6. Local Dimming Function Check
Step 1) Turn on TV
Step 2) At the Local Dimming mode, module Edge Backlight
moving right to left
Back light of IOP module moving
Step 3) confirm the Local Dimming mode
Step 4) Press “exit” Key
3) Don’t wear a 3D Glasses, Check the picture like below
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 23 -
LGE Internal Use Only
6. GND and Internal Pressure check
5.9. HDMI ARC Function Inspection
5.9.1. Test equipment
6.1. Method
- Optic Receiver Speaker
- MSHG-600 (SW: 1220 ↑)
- HDMI Cable (for 1.4 version)
1) GND & Internal Pressure auto-check preparation
- Check that Power Cord is fully inserted to the SET. (If loose,
re-insert)
2) Perform GND & Internal Pressure auto-check
- Unit fully inserted Power cord, Antenna cable and A/V arrive
to the auto-check process.
- Connect D-terminal to AV JACK TESTER
- Auto CONTROLLER(GWS103-4) ON
- Perform GND TEST
- If NG, Buzzer will sound to inform the operator.
- If OK, changeover to I/P check automatically.
(Remove CORD, A/V form AV JACK BOX)
- Perform I/P test
- If NG, Buzzer will sound to inform the operator.
- If OK, Good lamp will lit up and the stopper will allow the
pallet to move on to next process.
5.9.2. Test method
(1) Insert the HDMI Cable to the HDMI ARC port from the
master equipment (HDMI1)
(2) Check the sound from the TV Set
(3) C
heck the Sound from the Speaker or using AV & Optic
TEST program (It’s connected to MSHG-600)
5.10. EYE-Q Green Function Inspection
step 1) Turn on the TV..
Step 2) Press 'EYE button' on the adjustment remote-controller.
Step 3) Cover 'Eye Q sensor' on the front of set with your hands,
hold it for 6 seconds.
Step 4) Check "the Sensor Data" on the screen, make certain that
Data is below 10. If Data isn’t below 10 in 6 seconds, Eye
Q sensor would be bad. You should change Eye Q
sensor.
Step 5) Uncover your hands from Eye Q sensor, hold it for 6
seconds.
Step 6) C heck "Back Light(xxx)" on the screen, check data
increase . You should change Eye Q sensor
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Tuner GND is separated.
6.2. Checkpoint
- 24 -
(1) Test voltage
- GND: 1.5KV/min at 100mA
- SIGNAL: 3KV/min at 100mA
(2) TEST time: 1 second
(3) TEST POINT
- GND Test = POWER CORD GND and SIGNAL CABLE GND.
- Hi-pot Test = POWER CORD GND and LIVE & NEUTRAL.
(4) LEAKAGE CURRENT: At 0.5mArms
LGE Internal Use Only
7. AUDIO output check
No
Item
Min
(5) Updating Completed, The TV will restart automatically
Typ
Max
Unit
Remark
1
Audio practical
max Output, L/R
(Distortion=10%
max Output)
10.0
8.10
12.0
10.8
W
Vrms
EQ Off
AVL Off
Clear Voice Off
2
Speaker
(8Ω Impedance)
10
12
W
EQ On
AVL On
Clear Voice On
*Measurement condition:
(1) RF input: Mono, 1KHz sine wave signal, 100% Modulation
(2) CVBS, Component: 1KHz sine wave signal (0.4Vrms)
(3) RGB PC: 1KHz sine wave signal (0.7Vrms)
(6) If your TV is turned on, check your updated version and
Tool option.
* If downloading version is more high than your TV have, TV
can lost all channel data. In this case, you have to channel
recover. If all channel data is cleared, you didn’t have a DTV/
ATV test on production line.
8. USB S/W Download
(optional, Service only)
(1) Put the USB Stick to the USB socket
(2) Automatically detecting update file in USB Stick
- If your downloaded program version in USB Stick is lower
than that of TV set, it didn’t work. Otherwise USB data is
automatically detected.
(3) Show the message “Copying files from memory”
* After downloading, TOOL OPTION setting is needed again.
(1) Push "IN-START" key in service remote controller.
(2) Select "Tool Option 1" and Push “OK” button.
(3) Punch in the number. (Each model has their number.)
(4) Updating is staring
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 25 -
LGE Internal Use Only
EXPLODED VIEW
IMPORTANT SAFETY NOTICE
900
502
200
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Set + Stand
A22
A10
AG1
AT1
820
120
LV1
530
121
504
540
501
500
521
522
503
410
570
910
400
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by
in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
- 26 -
LGE Internal Use Only
System Configuration
Clock for LG1154D
NVRAM
EEPROM_ST
IC102-*1
M24256-BRMN6TP
+3.3V_NORMAL
E0
MAIN Clock(24Mhz)
E1
X-TAL_1
A0
1
A1
VCC
2
7
XO_MAIN
VSS
3
A0’h
4
6
5
7
3
6
4
5
VCC
WC
SCL
SDA
EEPROM_ATMEL
IC102-*2
AT24C256C-SSHL-T
WP
A0
A2
8
2
- Low : Normal Operation
- High : Write Protection
1M
8
1
Write Protection
VSS
R108
GND_1
1
2
C101
E2
4
3
X-TAL_2
8pF
C103
0.1uF
IC102
R1EX24256BSAS0A
XIN_MAIN
GND_2
C100
EEPROM_RENESAS
24MHz
X100
8pF
SCL
A1
SDA
1
8
2
7
3
6
4
5
VCC
WP
I2C_SCL5
AR102
33
A2
I2C_SDA5
GND
SCL
SDA
System Clock for Analog block(24Mhz)
AD33
AU26
AN9
AP11
TCK0
AN11
AN10
TDO0
AM10
AM9
10K
AM12
AL11
AL10
PLLSET0
AE34
BOOT_MODE
W32
W33
CAM_TRIGGER_DET
W34
AT12
SOC_TX
AU13
M_REMOTE_RX
AT13
M_REMOTE_TX
AP12
M_REMOTE_RTS
M_REMOTE_CTS
AR12
SOC_SPI1_CS
AE36
SOC_SPI1_MOSI
AF36
SOC_SPI1_MISO
AF35
AF33
AG33
AG32
SOC_SPI0_SCLK
EPHY_RXD0
EPHY_TXD1
EPHY_RXD1
EPHY_TXD0
EMMC_DATA[1]
U37
EPHY_MDIO
EMMC_DATA[2]
U36
EPHY_MDC
EMMC_DATA[3]
U35
EPHY_EN
EMMC_DATA[4]
V36
EPHY_REFCLK
EMMC_DATA[5]
V37
EMMC_DATA[0]
EMMC_DATA[6]
V35
EMMC_CMD
EMMC_RST
EMMC_CLK
EB_DATA[0]
EB_DATA[2]
EB_DATA[1]
EB_DATA[3]
EB_DATA[4]
EB_DATA[5]
EB_DATA[6]
EB_DATA[7]
EB_ADDR[2]
EB_ADDR[0]
EB_ADDR[3]
EB_ADDR[1]
EB_ADDR[4]
EB_ADDR[5]
EB_ADDR[6]
EB_ADDR[7]
EB_ADDR[8]
EB_ADDR[9]
EB_ADDR[10]
EB_ADDR[11]
EB_ADDR[12]
EB_BE_N0
EB_OE_N
EB_ADDR[14]
EB_ADDR[13]
AR11
R175
3.3K
RMII_RXD0
AU10
AT11
RMII_RXD1
RMII_TXD0
RMII_TXD1
AR10
AT10
RMII_TXEN
RMII_MDC
AT8
AR8
RMII_MDIO
AU8
RMII_REF_CLK
RMII_CRS_DV
AU11
EMMC_DATA0
EMMC_DATA1
EMMC_DATA2
EMMC_DATA3
EMMC_DATA4
EMMC_DATA5
EMMC_DATA6
T36
EMMC_DATA7
Y36
W35
EMMC_CMD
EMMC_RESETN
Y37
EMMC_CLK
EB_DATA0/GPIO114
C34
A36
EB_DATA1/GPIO115
EB_DATA2/GPIO116
B34
EB_DATA3/GPIO117
A34
EB_DATA4/GPIO118
C33
EB_DATA5/GPIO119
A33
C32
B33
EB_DATA6/GPIO104
EB_DATA7/GPIO105
B35
EB_ADDR0/GPIO106
EB_ADDR1/GPIO107
B36
EB_ADDR2/GPIO108
C35
B37
EB_ADDR3/GPIO109
EB_ADDR4/GPIO110
C36
EB_ADDR5/GPIO111
D35
EB_ADDR6/GPIO96
D36
EB_ADDR7/GPIO97
E35
D37
EB_ADDR8/GPIO98
EB_ADDR9/GPIO99
E37
EB_ADDR10/GPIO100
E36
F36
G35
F35
EB_ADDR11/GPIO101
EB_ADDR14/GPIO88
G36
G37
H37
GPIO7
TDI1
GPIO6
TDO1
GPIO5
IC100
LG1154D_H13D
PLLSET1
PLLSET0
EXT_INTR3/GPIO70
EXT_INTR2/GPIO69
EXT_INTR1/GPIO68
GPIO4
GPIO3
GPIO2
GPIO1
AN34
DDCD0_DA
RF_SWITCH_CTL
AL33
HDMI_HPD_2
AR9
AM6
AL6
AK7
AK6
AK5
AJ5
AJ6
AJ7
AH6
AG7
AG6
AG5
AF5
AH30
AG30
For ISP
For connecting
SIC debug tool
AM5
AM7
+3.3V_NORMAL
HDMI_HPD_3
AL32
R107
AUD_LRCH2
100
To surround amp
INSTANT_BOOT
SC_DET
local dimming
AV1_CVBS_DET
I2C port
AMP_RESET_N
COMP1_DET
M_RFModule_RESET
HP_DET
SIL9617_RESET
/TU_RESET1
U14_RESET
D14_HWRESET
FRC_FLASH_WP
/RST_HUB
AN33
AK33
AE30
AD30
/TU_RESET2
MN864778_RESET
AN32
AK32
AC32
DDCD0_CK
/RST_PHY
AK34
GPIO0
AMP_RESET_N_1
AR101
+3.3V_NORMAL
3.3K
AC33
AB33
HPD0
UART0_RXD
AE37
UART0_TXD
PHY0_ARC_OUT_0
UART1_RXD
PHY0_RX0N_0
UART1_TXD
PHY0_RX0P_0
UART1_RTS
PHY0_RX1N_0
UART1_CTS
PHY0_RX1P_0
PHY0_RX2N_0
SPI_CS0/GPIO36
PHY0_RX2P_0
SPI_DO0/GPIO38
PHY0_RXCN_0
SPI_DI0/GPIO39
PHY0_RXCP_0
SPI_SCLK0/GPIO37
AC36
AC37
AB36
AB37
AA36
AA37
AD36
AD37
SPDIF_OUT_ARC
HDMI_RX0HDMI_RX0+
HDMI_RX1HDMI_RX1+
HDMI_RX2HDMI_RX2+
HDMI_CLKHDMI_CLK+
R32
SPI_CS1
HUB_PORT_OVER0
SPI_DO1
/USB_OCD1
R33
SPI_DI1
HUB_VBUS_CTRL0
USB_CTL1
CAM_TRIGGER_DET
SDA2/GPIO77
H13_CONNECT
SCL3
SOC_SPI1_CS
SOC_SPI1_MISO
USB3_REFPADCLKP
SOC_SPI1_SCLK
CAM_SLIDE_DET
GPIO139
GPIO138
GPIO137
GPIO136
NC_4
NC_3
NC_2
AUD_LRCH2
NC_1
USB3_REFPADCLKM
USB3_RESREF
USB3_TX0M
USB3_TX0P
USB3_RX0M
USB3_RX0P
USB3_DM0
USB3_DP0
USB2_0_TXRTUNE
USB2_0_DM
USB2_0_DP
USB2_1_TXRTUNE
USB2_1_DM0
USB2_1_DP0
USB2_2_TXRTUNE
USB2_2_DM0
USB2_2_DP0
JP
SD_DATA0/GPIO134
North.AM.
SD_DATA1/GPIO135
JP
SD_DATA2/GPIO120
CAM_CE1_N
SDA5
SD_DATA3/GPIO121
SCL5
SOC_SPI1_MOSI
SD_WP_N/GPIO122
SDA4
SD_CD_N/GPIO123
SCL4
SD_CMD/GPIO124
SDA3
SD_CLK/GPIO125
AH33
I2C_SDA6
SCL2/GPIO78
SC_DATA/GPIO132
AH34
SDA1/GPIO79
SC_RST/GPIO131
AJ33
Not Used Net (UB85/95/UC89)
SCL1/GPIO64
SC_VCC_SEL/GPIO128
AH32
SDA0/GPIO65
SC_VCCEN/GPIO129
AR6
SCL0/GPIO66
SC_DETECT/GPIO133
AP6
I2C_SCL6
AMP_RESET_N_1
U14_RESET
/RST_HUB
I2C_SCL5
I2C_SDA6
I2C_SCL6
I2C for tuner
J34
K32
J33
J32
M31
AJ31
L33
L32
P32
P33
N34
R37
R36
N37
N36
P36
P37
AP7
AT7
AU7
K33
M36
M37
K34
L36
L37
C24
D24
E24
D25
E25
B25
C25
V34
V33
V32
T32
U33
T33
H33
D34
E33
H32
D33
G34
F32
G33
G32
E32
A25
M_REMOTE_TX
R162
200 1%
M_REMOTE_CTS
Not Used Net (Only OLED)
DPC_CTL
SIL9617_INT
R9531_RESET
DPC_CTL
R9531_FLASH_WP
USB3_TX0M
0.1uF
0.1uF
C105
WIFI_DP
WIFI_DM
R161
200 1%
HUB_DM
R159 200 1%
HUB_DP
CAMERA_DP
C104
USB3_TX0P
USB3_RX0M
I2C for tuner
I2C_SDA5
CAM_REG_N
R147
1.8K
R146
1.8K
R144
1.8K
R145
1.8K
R143
1.8K
R142
1.8K
R141
1.8K
R148
1.8K
I2C_SDA4
I2C_SCL4
USB3_RX0P
T2/C/S2
USB3_DM
T2/C/S2/AT
I2C_SDA2_SOC
I2C_SCL2_SOC
USB3_DP
11
ISDB
Only SMART CARD
interface
ATV_EXT
SMARTCARD_DATA/SD_EMMC_CLK
ATV_SOC
ATV_EXT
SMARTCARD_RST/SD_EMMC_DATA[2]
ATV_SOC
T2/C
+3.3V_NORMAL
SMARTCARD_PWR_SEL/SD_EMMC_DATA[1]
T2/C_PIP
T2/C
I2C_CH1_pullup_3.3K
I2C_SDA_MICOM_SOC
I2C_SCL_MICOM_SOC
SMARTCARD_VCC/SD_EMMC_CMD
T2/C_PIP
T2/C
I2C_SCL1
SMARTCARD_DET/SD_EMMC_DATA[3]
T2/C/S2/ATV_EXT
10
JP
Default
SMARTCARD_CLK/SD_EMMC_DATA[0]
01
BR
ISDB_PIP
CI
ATSC_PIP
CAM_WAIT_N
North.AM
R155
10K
ATSC_PIP
PCM_RESET
KR
Default
I2C_CH1_pullup_3.3K
R148-*1
3.3K
PCM_5V_CTL
CN/HK
T/C
I2C_CH1_pullup_1.8K
I2C_CH1_pullup_1.8K
I2C_SDA1
CAM_IREQ_N
TW/COL
T/C
I2C_SCL2_SOC
R147-*1
3.3K
CAM_CD2_N
AJJA
T/C
R104
M_REMOTE_RX
M_REMOTE_RTS
I2C_SDA2_SOC
/PCM_CE1
EU/CIS
00
I2C_SCL2
R102
/PCM_CE2
BIT(6/7)
R137
1.8K
Non_D9
URSA7/URSA9P
R138
1.8K
KR_PIP_NOT
R135
1.8K
KR_PIP_NOT
R136
1.8K
UHD
Non_U14
KR_PIP
R135-*1 1.5K
FHD
U14
KR_PIP
R136-*1 1.5K
Resolution
Support U14
0
0
I2C_SDA2
I2C_SCL_MICOM_SOC
CAMERA_DM
R157 200 1%
+3.3V_NORMAL
I2C PULL UP
BIT2
BIT3
I2C_SDA_MICOM_SOC
AR100
33
CAM_CD1_N
+3.3V_NORMAL
I2C_SCL_MICOM
CI
R153
10K
Low
+3.3V_TUNER
D32
F33
I2C_SDA_MICOM
+3.3V_LNA_TU
F34
AMP_RESET_N_1
BR
Low
J36
TCK1
SC_CLK/GPIO130
AR17
I2C_SDA5
LCD
J35
GPIO8
CAM_IOIS16_N/GPIO83
AP17
I2C_SDA4
OLED
USB_CTL3
GPIO9
TMS1
CAM_REG_N/GPIO72
AP16
I2C_SCL5
High
EB_BE_N1
TRST_N1
CAM_WAIT_N/GPIO84
AR16
I2C_SDA_MICOM_SOC
20131016 version
D9
EB_WE_N
GPIO10
CAM_RESET
AP15
I2C_SDA1
I2C_SCL_MICOM_SOC
I2C_SCL4
URSA9
H36
TDO0
Compensation_Done
AF30
SPI_SCLK1
I2C_SDA2_SOC
High
H35
GPIO11
AM32
AR15
I2C_SCL2_SOC
KR
L35
GPIO12
TDI0
CAM_IREQ_N/GPIO73
D13 SPI
10K
SOC_SPI0_CS0
SOC_SPI0_MOSI
SOC_SPI0_MISO
OPT
10K
AG34
I2C_SCL1
R132
OPT
R130
R127 LCD 10K
R125BIT7_0
10K
BIT6_0
R123
10K
NOT_D9
R119
10K
URSA7/URSA9P
R121
10K
NON_U14
R115
10K
10K
UHD
R113
R111BIT1_0
10K
BIT0_0
R109
10K
BIT10
BIT10
GPIO13
TCK0
AE35
SOC_SPI1_SCLK
Reserved
TMS0
CAM_VS2_N/GPIO85
BIT9
BIT9
GPIO14
CAM_VS1_N/GPIO86
BIT8
Display
TRST_N0
CAM_CD2_N/GPIO75
U14 SPI
BIT7
BIT8
GPIO15
EXT_INTR0/GPIO67
BIT6
D9 Model
GPIO16
AU12
SOC_RX
R151
10K
BIT5
URSA7/URSA9
H13DA_SDA
CAM_VCCEN_N/GPIO87
R149
10K H13_CONNECT
BIT4
BIT4
GPIO17
CAM_CD1_N/GPIO76
R164
33
BIT3
1/16W
5%
EPHY_INT
BIT2
BIT5
GPIO18
H13DA_SCL
Y33
D13_INT
EU
GPIO19
BOOT_MODE
BIT0
AJJA
GPIO20
OPM0
CAM_CE2_N
R129
AL9
PLLSET1
R131
10K
OLED
R128
10K
BIT7_1
R126
10K
BIT6_1
R124
10K
D9
10K
URSA9
R122
10K
U14
10K
R116
R120
FHD
10K
R114
BIT0_1
R110
10K
BIT1_1
R112
10K
AM11
11
GPIO21
OPM1
AP9
TDI0
+3.3V_NORMAL
GPIO22/UART2_RX
AT26
TMS0
BIT1
GPIO23/UART2_TX
CAM_INPACK/GPIO74
WebOS UHD HW Option
10
GPIO26
AD34
OPM1
TRST_N0
CN/HK
H13DA_XTAL
PORES_N
H13A_SDA
01
GPIO27
CAM_SLIDE_DET
AM33
3.3K
SOC_RESET
H13A_SCL
TW/COL
GPIO28
GPIO24
OPM0
00
GPIO29
XTAL_BYPASS
AU16
C108
0.1uF
ATSC
GPIO30
GPIO25
10
DVB
HDMI_MUX_SEL
AL34
GPIO31
R103
AT37
11
BIT(0/1)
+3.3V_NORMAL
B27
OPT
R163
OPT
R160
10K
9
EB_ADDR12/GPIO102
SOC_RESET
EB_ADDR13/GPIO103
6
OPT
R168
10K
R152-*1 100
OPT
R166
10K
H13D_XTAL_100ohm
TCK0
10K
TDO0
TMS0
5
EB_ADDR15/GPIO89
XOUT
4
8
XIN
EB_OE_N/GPIO82
B26
3
7
A26
560
EB_WAIT/GPIO94
R152
XO_MAIN
EB_BE_N0/GPIO80
H13D_XTAL_560ohm
XIN_MAIN
EB_CS0/GPIO90
TDI0
EB_WE_N/GPIO95
TRST_N0
2
EB_BE_N1/GPIO81
K35
EB_CS3/GPIO93
1
K37
R118
T32
R154
10K
CI
12505WS-10A00
BOOT_MODE0
INSTANT_MODE0
OPT
R167
33
P100
/USB_OCD2
USB_CTL2
/USB_OCD3
BOOT_MODE
INSTANT_BOOT
Jtag I/F
For Main
T32
0.1uF
EMMC_DATA[7]
(internal pull down)
OPT
K36
OPM1
OPM0
+3.3V_NORMAL
BOOT MODE
"0 : EMMC
"1 : TEST MODE
EB_CS1/GPIO91
33
INSTANT boot MODE
"1 : Instant boot
"0 : normal
EB_CS2/GPIO92
R134
R150
33
OPT
+3.3V_NORMAL
OPT
R133
+3.3V_NORMAL
+3.3V_NORMAL
3.3K
OP MODE[1:0]
"00" : Normal Mode
"01/10/11" : Internal Test mode
R117
PLLSET0
OPT
PLLSET1
3.3K
33
OPT
3.3K
R101
Mhz)
Mhz)
Mhz)
Mhz)
W36
EMMC_DATA[0-7]
EB_DATA[0-7]
33
PLL SET[1:0] : internal pull up
"00" : CPU(1200Mhz),M0 / M1 DDR(792,792
"01" : CPU(1056Mhz),M0 / M1 DDR(672,672
"10" : CPU(1056Mhz),M0 / M1 DDR(792,792
"11" : CPU( 960Mhz),M0 / M1 DDR(792,792
EPHY_CRS_DV
EB_ADDR[0-14]
OPT
R100
Not Used Net (Only OLED 77EC98)
AMP_RESET_N
AC-coupling CAP
Place near by LG1154D
Reserved
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
BSD-14Y-UD-001-HD
2013-12-17
H13 D CHIP
LGE Internal Use Only
LG1154A
LG1154D
LG1154A
IC100
LG1154D_H13D
H13A_NON_BRAZIL
+3.3V_Bypass Cap
IC101
LG1154AN_H13A
VREF_M0_0
VREF_M0_1
VDDC10_2
G9
VDDC10_3
H7
VDDC10_4
H12
VDDC10_5
J7
VDDC10_6
J12
K7
K12
VDD10_XTAL
VDDC10_13
T17
AVDD10_CVBS
T18
AVDD10_VSB
M8
AVDD10_LLPLL
G10
DVDD10_APLL_1
G11
DVDD10_APLL_2
G12
GND_70
GND_71
GND_73
VDDC10_12
M12
GND_69
VDDC10_8
VDDC10_11
M7
GND_68
GND_72
VDDC10_10
L12
GND_67
VDDC10_7
VDDC10_9
L7
GND_66
LTX_VDD
GND_74
GND_75
GND_76
GND_77
GND_78
GND_79
GND_80
GND_81
GND_82
GND_83
GND_84
GND_85
GND_86
V5
VSS25_REF
VSS25_REF
C3
GND_1
D3
GND_2
D4
GND_3
D17
E4
F4
GND_92
GND_9
F10
GND_10
F12
GND_11
F13
GND_12
F17
GND_13
F18
GND_14
G4
GND_15
G6
GND_16
G13
GND_17
G14
GND_18
G15
GND_19
G16
GND_20
G17
GND_21
G18
GND_22
H4
GND_23
H5
GND_24
H6
GND_25
H8
GND_26
H9
GND_27
H10
GND_28
H11
GND_90
GND_5
GND_8
F9
GND_89
GND_91
GND_7
F8
GND_88
GND_4
GND_6
F7
GND_87
GND_29
GND_93
GND_94
GND_95
GND_96
GND_97
GND_98
GND_99
GND_100
GND_101
GND_102
GND_103
GND_104
GND_105
GND_106
GND_107
GND_108
GND_109
GND_110
GND_111
GND_112
GND_113
GND_114
GND_115
0.47uF
0.47uF
0.47uF
0.47uF
0.47uF
C2974.7uF
C219
C213
C210
C209
C208
C3514.7uF
C2794.7uF
0.1uF
C2554.7uF
C259
0.1uF
N25
L14
VSS25_REF
AD26
VDDC11_8
VDD33_1
VDDC11_9
VDD33_2
VDDC11_10
VDD33_3
VDDC11_11
VDD33_4
VDDC11_12
VDD33_5
VDDC11_13
VDD33_6
VDDC11_14
VDD33_7
VDDC11_15
VDD33_8
VDDC11_16
VDDC11_17
AVDD33_USB_1
VDDC11_18
AVDD33_USB_2
VDDC11_19
AVDD33_BT_USB_1
VDDC11_20
AVDD33_BT_USB_2
VDDC11_21
AVDD33_HDMI_1
1005 size bead
Bottom side of chip
Bottom side of chip
L16
VDDC11_26
VDDC11_27
VDD25_LVRX_1
VDDC11_28
VDD25_LVRX_2
VDDC11_29
VTXPHY_VDD25_1
VDDC11_30
VTXPHY_VDD25_2
VDDC11_31
VDD25_DR3PLL
VDDC11_32
L17
H11
VDD12_VTXPHY
L18
+1.5V
H12
L201
BLM18PG121SN1D
M1
H13
M2
M3
+2.5V_Normal
M5
+2.5V_Normal
VDD25_LTX
M4
L207
BLM18PG121SN1D
M9
M11
M14
M15
M16
N4
VDD25_AUD
L200
BLM18PG121SN1D
M10
VDDC11_33
VDDC11_34
H10
+1.2V_VDD
H14
H15
VDDC15_M0
H16
H17
H18
H19
H20
H21
H22
H23
H24
N5
H25
VDD15_M0_1
C5
+1.1V
N22
C26
C27
D5
N23
D26
E5
P15
E6
E7
P16
E8
E22
P17
E23
E26
P18
F7
R15
F22
F8
F23
+1.2V_VDD
T15
F24
F25
T22
F26
F27
T23
F31
G7
T24
G8
U15
G10
G9
G11
U22
G12
G13
U23
G14
U24
G16
G15
G17
V15
G18
G19
V22
G20
V23
G22
G21
G23
V24
G24
W22
G26
G25
G27
W23
G28
G29
W24
G30
G31
AB15
H9
H26
AB24
H27
H28
AC15
H29
AC24
H31
H30
J7
AD15
J30
J31
AD16
K7
K30
AD17
K31
L30
AD18
L31
AD21
M12
M7
M13
AD22
M14
M15
AD23
M16
AD24
M18
M17
M19
VDDC11_35
M20
M24
VDD15_M0_2
M25
M26
VDD15_M0_3
M30
VDD12_VTXPHY
VDD15_M0_4
M32
M33
M34
VDD15_M0_5
AB14
VDD15_M0_6
VTXPHY_VDD11_1
VDD15_M0_7
VTXPHY_VDD11_2
VDD15_M0_8
N12
N13
AC14
N14
N15
AD14
N16
VDDC12_XTAL
VTXPHY_VDD11_3
N17
N18
N19
VDD15_M0_9
P25
VDD15_M0_10
AVDD11_DR3PLL
VDD15_M0_11
AVDD11_DCO
VDD15_M0_12
GPLL_VDD11
N20
N24
AA15
AC26
N30
N31
+1.2V_VDD
N32
N33
P7
P12
VDD15_M0_13
P13
VDD15_M0_14
P14
VDD15_M0_15
P20
P19
P21
P22
VDD15_M0_16
N14
P23
P24
N15
H7
N17
H8
P4
J8
P5
K8
P6
L7
P7
L8
P8
+3.3V_Bypass Cap
P9
P10
M8
VDDC15_M1
N7
+3.3V_NORMAL
N8
VDD33
P11
P8
P14
R7
L203
BLM18PG121SN1D
P15
R8
P16
R4
R7
+1.0V_Bypass Cap
R8
R9
+1.0V_VDD
R10
VDD10_XTAL
T8
U8
V8
W8
P30
P31
VDD15_M1_1
R12
R13
VDD15_M1_2
R14
VDD15_M1_3
R16
VDD15_M1_4
R18
VDD15_M1_5
R20
VDD15_M1_6
R22
R17
R19
R21
R23
R24
VDD15_M1_7
R25
VDD15_M1_8
R26
VDD15_M1_9
R34
R30
T7
T12
VDD15_M1_10
T13
VDD15_M1_11
T14
VDD15_M1_12
T17
T16
T18
T19
VDD15_M1_13
T20
T21
VDD15_M1_14
T25
T26
VDD15_M1_15
T30
T31
VDD15_M1_16
T34
U7
U12
U13
R11
U14
U16
R12
L211
BLM18PG121SN1D
R13
U17
U18
U19
R14
R15
R16
R17
T4
T7
Place at the bottom side
U20
U21
U25
U26
P17
T8
AAD_ADC_SIF
XIN_SUB
AUDA_VBG_EXT
N18
T9
D18
M18
T10
M17
+1.0V_VDD
VDDC10
XTAL_BYPASS
AUDA_OUTL
CLK_24M
AUDA_OUTR
XTAL_SEL0
AUD_SCART_OUTL
XTAL_SEL1
AUD_SCART_OUTR
AUAD_L_CH4_IN
+2.5V_Bypass Cap
T12
AUAD_R_CH4_IN
E3
AUAD_L_CH3_IN
PORES_N
AUAD_R_CH3_IN
K3
L206
BLM18PG121SN1D
U4
U6
U18
V4
V16
GND_116
V12
+2.5V_Normal
+2.5V_Normal
K2
VDD25_XTAL
AUAD_L_CH2_IN
OPM0
AUAD_R_CH2_IN
OPM1
(1)
VDD25_LVDS(4)
AUAD_L_CH1_IN
A8
B8
AUAD_R_CH1_IN
H13A_SCL
AUAD_R_REF
H13A_SDA
L234
BLM18PG121SN1D
L238
BLM18PG121SN1D
AUAD_M_REF
AUAD_L_REF
V14
V13
ANTCON
CVBS_IN2
CVBS_IN1
RFAGC
CVBS_VCM
IFAGC
BUF_OUT1
ADC_I_INCOM
BUF_OUT2
ADC_I_INP
GPIO0
U7
V6
T5
T6
U8
V8
V9
U9
V10
U11
V11
U12
+1.5V_Bypass Cap
P2
V19
N1
V20
N2
V21
N3
V25
P1
V26
V30
P3
V31
R1
W5
R2
W6
T1
W7
U2
W12
U3
W13
V2
W14
V3
W15
U1
W16
T3
W17
T2
W18
R3
W19
W20
K17
W21
K18
W25
J18
W26
W30
U16
W31
U17
Y3
Y4
V17
GND_1
GND_185
GND_2
GND_186
GND_3
GND_187
GND_4
GND_188
GND_5
GND_189
GND_6
GND_190
GND_7
GND_191
GND_8
GND_192
GND_9
GND_193
GND_10
GND_194
GND_11
GND_195
GND_12
GND_196
GND_13
GND_197
GND_14
GND_198
GND_15
GND_199
GND_16
GND_200
GND_17
GND_201
GND_18
GND_202
GND_19
GND_203
GND_20
GND_204
GND_21
GND_205
GND_22
GND_206
GND_23
GND_207
GND_24
GND_208
GND_25
GND_209
GND_26
GND_210
GND_27
GND_211
GND_28
GND_212
GND_29
GND_213
GND_30
GND_214
GND_31
GND_215
GND_32
GND_216
GND_33
GND_217
GND_34
GND_218
GND_35
GND_219
GND_36
GND_220
GND_37
GND_221
GND_38
GND_222
GND_39
GND_223
GND_40
GND_224
GND_41
GND_225
GND_42
GND_226
GND_43
GND_227
GND_44
GND_228
GND_45
GND_229
GND_46
GND_230
GND_47
GND_231
GND_48
GND_232
GND_49
GND_233
GND_50
GND_234
GND_51
GND_235
GND_52
GND_236
GND_53
GND_237
GND_54
GND_238
GND_55
GND_239
GND_56
GND_240
GND_57
GND_241
GND_58
GND_242
GND_59
GND_243
GND_60
GND_244
GND_61
GND_245
GND_62
GND_246
GND_63
GND_247
GND_64
GND_248
GND_65
GND_249
GND_66
GND_250
GND_67
GND_251
GND_68
GND_252
GND_69
GND_253
GND_70
GND_254
GND_71
GND_255
GND_72
GND_256
GND_73
GND_257
GND_74
GND_258
GND_75
GND_259
GND_76
GND_260
GND_77
GND_261
GND_78
GND_262
GND_79
GND_263
GND_80
GND_264
GND_81
GND_265
GND_82
GND_266
GND_83
GND_267
GND_84
GND_268
GND_85
GND_269
GND_86
GND_270
GND_87
GND_271
GND_88
GND_272
GND_89
GND_273
GND_90
GND_274
GND_91
GND_275
GND_92
GND_276
GND_93
GND_277
GND_94
GND_278
GND_95
GND_279
GND_96
GND_280
GND_97
GND_281
GND_98
GND_282
GND_99
GND_283
GND_100
GND_284
GND_101
GND_285
GND_102
GND_286
GND_103
GND_287
GND_104
GND_288
GND_105
GND_289
GND_106
GND_290
GND_107
GND_291
GND_108
GND_292
GND_109
GND_293
GND_110
GND_294
GND_111
GND_295
GND_112
GND_296
GND_113
GND_297
GND_114
GND_298
GND_115
GND_299
GND_116
GND_300
GND_117
GND_301
GND_118
GND_302
GND_119
GND_303
GND_120
GND_304
GND_121
GND_305
GND_122
GND_306
GND_123
GND_307
GND_124
GND_308
GND_125
GND_309
GND_126
GND_310
GND_127
GND_311
GND_128
GND_312
GND_129
GND_313
GND_130
GND_314
GND_131
GND_315
GND_132
GND_316
GND_133
GND_317
GND_134
GND_318
GND_135
GND_319
GND_136
GND_320
GND_137
GND_321
GND_138
GND_322
GND_139
GND_323
GND_140
GND_324
GND_141
GND_325
GND_142
GND_326
GND_143
GND_327
GND_144
GND_328
GND_145
GND_329
GND_146
GND_330
GND_147
GND_331
GND_148
GND_332
GND_149
GND_333
GND_150
GND_334
GND_151
GND_335
GND_152
GND_336
GND_153
GND_337
GND_154
GND_338
GND_155
GND_339
GND_156
GND_340
GND_157
GND_341
GND_158
GND_342
GND_159
GND_343
GND_160
GND_344
GND_161
GND_345
GND_162
GND_346
GND_163
GND_347
GND_164
GND_348
GND_165
GND_349
GND_166
GND_350
GND_167
GND_351
GND_168
GND_352
GND_169
GND_353
GND_170
GND_354
GND_171
GND_355
GND_172
GND_356
GND_173
GND_357
GND_174
GND_358
GND_175
GND_359
GND_176
GND_360
GND_177
GND_361
GND_178
GND_362
GND_179
GND_363
GND_180
GND_364
GND_181
GND_365
GND_182
GND_366
GND_183
GND_367
GND_184
GND_368
Y8
Y12
Y13
Y14
Y15
Y16
Y17
Y18
Y19
Y20
Y21
Y22
Y23
Y24
Y25
Y26
Y31
Y35
AA8
AA12
AA13
AA14
AA16
AA17
AA18
AA19
AA20
AA21
AA22
AA23
AA24
AA25
AA26
AA31
AB6
AB8
AB12
AB13
AB16
AB17
AB18
AB19
AB20
AB21
AB22
AB23
AB25
AB26
AB30
AB31
AC8
AC12
AC13
AC16
AC17
AC18
AC19
AC20
AC21
AC22
AC23
AC25
AC30
AC31
AD8
AD12
AD13
AD19
AD20
AD25
AD31
AE12
AE13
AE15
AE16
AE17
AE18
AE19
AE20
AE21
AE22
AE24
AE25
AE26
AE31
AF12
AF13
AF15
AF16
AF17
AF18
AF19
AF20
AF21
AF22
AF24
AF31
AG8
AG31
AH8
AH31
AJ8
AJ30
AK8
AK9
AK10
AK14
AK15
AK16
AK17
AK18
AK19
AK20
AK21
AK22
AK23
AK26
AK27
AK28
AK29
AK30
AK31
AL8
AL12
AL13
AL14
AL15
AL16
AL17
AL18
AL19
AL20
AL21
AL22
AL23
AL24
AL25
AL26
AL27
AL28
AL29
AL30
AL31
AM8
AM13
AM14
AM15
AM16
AM17
AM18
AM19
AM20
AM21
AM22
AM23
AM24
AM25
AM26
AM27
AM28
AM29
AM30
AM31
AN6
AN12
AN13
AN15
AN16
AN17
AN18
AN19
AN20
AN21
AN22
AN23
AN24
AN25
AN26
AN27
AN28
AN29
AN30
AN31
F3
V12
VDDC15_M0
V18
ADC_I_INN
U10
+1.5V_DDR
CVBS_IN3
U15
U14
V16
V17
AUAD_REF_PO
U13
V15
H18
H17
AAD_ADC_SIFM
XO_SUB
VSB_AUX_XIN
T16
V7
V14
J17
T15
U31
V13
P18
T11
U30
H13A_BRAZIL
IC101-*1
LG1154AN_H13A_ISDB-T (LG1154AN-IT)
Place at the bottom side
VDDC15_M0
REFT
GPIO1
REFB
GPIO2
ADC1_COM
GPIO3
ADC2_COM
GPIO4
ADC3_COM
GPIO5
SC1_SID
GPIO6
SC1_FB
GPIO7
PB1_IN
GPIO8
GPIO10
PR1_IN
GPIO11
PB2_IN
GPIO12
Y2_IN
GPIO13
SOY2_IN
GPIO14
PR2_IN
GPIO15
+1.5V_DDR
VDDC15_M0
GPIO9
Y1_IN
SOY1_IN
VDDC15_M1
F2
F1
G3
G2
G1
H3
H2
H1
J3
E18
E17
H16
J2
J1
K1
VDDC15_M1
VDDC15_M1
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
R302
1K 1%
R300
1K 1%
VREF_M1_1
0.1uF
1%
1K
R303
OPT
C310
0.1uF
1%
1K
R301
OPT
C304
0.1uF
BLM18PG121SN1D
C299 22uF
0.1uF
1%
1K
R203
OPT
C307
R202
L228
C344
0.1uF
1%
1K
C296
VREF_M1_0
VREF_M0_1
1K 1%
VREF_M0_0
OPT
R201
0.1uF
0.1uF
C372
0.1uF
C371
0.1uF
C370
0.1uF
C369
C367
0.1uF
0.1uF
C366
C365
0.1uF
0.1uF
C363
0.1uF
C362
C361
0.1uF
0.1uF
C360
0.1uF
C359
0.1uF
C358
0.1uF
C357
C356
0.1uF
0.1uF
C354
C355
0.1uF
0.1uF
C353
0.1uF
C352
C350
OPT
0.1uF
0.1uF
C314
OPT
0.1uF
C313
OPT
C312
OPT
0.1uF
0.1uF
C311
OPT
0.1uF
C309
0.1uF
OPT
C305
0.1uF
C308
0.1uF
C306
MDS62110217
C302
MDS62110209
SMD_GASKET_12.5T
GASKET_8.0X6.0X12.5H
M200-*1
C303 22uF
JP204
JP205
JP203
BLM18PG121SN1D
SMD_GASKET_8.5T
GASKET_8.0X6.0X8.5H
M200
1K 1%
R200
SMD TOP for EMI
L230
JP202
VDDC11_23
VDDC11_25
V7
GND JIG POINT
VDDC11_22
GPLL_AVDD25
L15
0.1uF
VDDC10_1
G8
L13
0.1uF
G7
GND_65
AF14
C217
VDD10_XTAL
VDD25_XTAL
C3784.7uF
GND_64
R18
VDDC10
GND_63
AE14
C381
SDRAM_VDDQ_5
VDD10_XTAL
L11
L226
BLM15BD121SN1
0.1uF
K16
GND_62
L10
AF23
C215
SDRAM_VDDQ_4
L9
0.1uF
K15
GND_61
VDDC11_7
AE23
C368
SDRAM_VDDQ_3
GND_60
L8
0.1uF
SDRAM_VDDQ_2
J16
VDDC11_6
SP_VQPS
VDD25_LVDS
C212
J15
GND_59
L6
OPT
SDRAM_VDDQ_1
GND_58
XTAL_VDD
R31
0.1uF
LTX_LVDD_2
H15
GND_57
VDDC11_5
VDDC11_24
C207
LTX_LVDD_1
F16
L5
0.1uF
F15
GND_56
VDDC11_4
+2.5V
C203
VDD25_AAD
GND_55
VDDC11_3
M1_DDR_VREF2
AVDD33_HDMI_2
C3644.7uF
VDD25_AUD_2
M13
L225
BLM15BD121SN1
L220
BLM18PG121SN1D
AF26
C301
VDD25_LTX
L3
L4
L227
BLM18PG121SN1D
VDD25_REF
AVDD25
0.1uF
N6
GND_54
+2.5V_Normal
L2
C206
VDD25_AUD_1
AF25
C2014.7uF
M6
GND_53
VDDC12_XTAL
C298 4.7uF
VDD25_APLL
GND_52
AK12
L1
C205 4.7uF
VDD25_COMP_3
F14
AFE 3CH Power
0.1uF
N9
GND_51
K14
C300
VDD25_COMP_2
GND_50
AK11
+1.2V_VDD
0.1uF
N8
GND_49
K13
M23
C204
VDD25_COMP_1
GND_48
+2.5V_Bypass Cap
K11
0.1uF
VDD25_REF
N7
GND_47
M1_DDR_VREF1
M22
C288
VDD25_VSB_2
U5
VDD25_AUD
GND_46
VDD25_VSB_1
N13
VDD25_LTX
VDD25_CVBS_2
AK25
K10
4.7uF
N12
GND_45
AF8
K9
C202
N11
VDD25_CVBS_1
AE8
Place at the bottom side
C200 4.7uF
GND_44
N10
VDD25_REF
GND_43
Y30
AK24
1uF
AVDD33_CVBS_2
VDD33
K6
0.1uF
T14
GND_42
VDDC11_2
M21
AA30
K8
M0_DDR_VREF2
+3.3V
AK13
C2704.7uF
AVDD33_CVBS_1
GND_41
VDDC11_1
XTAL_VDDP
K5
C274
VDD33_XTAL
T13
K4
N21
M0_DDR_VREF1
P26
N26
0.1uF
N16
GND_40
Y1
C246
VDD33_11
GND_39
A2
VDD25_XTAL
0.1uF
VDD33_10
R6
GND_38
A4
VDDC12_XTAL
C251
VDD33_9
R5
J14
C2424.7uF
P13
GND_37
J11
0.1uF
VDD33_8
GND_36
J10
C223
VDD33_7
P12
J9
C2394.7uF
J13
GND_35
C2144.7uF
VDD33_6
J8
C2114.7uF
H13
GND_34
J6
C2164.7uF
VDD33_5
GND_33
J5
B5
VREF_M1_1
+1.2V_VDD
L222
BLM18PG121SN1D
Y5
A27
A24
VREF_M1_0
AVDD33_CVBS(2)
L216
BLM18PG121SN1D
0.1uF
VDD33_4
G5
GND_32
L209
BLM18PG121SN1D
J4
C218
GND_31
C2754.7uF
GND_30
VDD33_2
VDD33_3
F11
AVDD25
VDD33_1
C2414.7uF
F6
AVDD33_XTAL
AVDD33_CVBS
AVDD33_XTAL(1)
H14
F5
C224
E11
(2)
+1.24V_Bypass Cap
+3.3V_NORMAL
+3.3V_NORMAL
0.1uF
AVDD33
C283
+3.3V_NORMAL
C222 4.7uF
AVDD33
IC100
LG1154D_H13D
+0.75V
BSD-14Y-UD-003-HD
2013-12-17
MAIN POWER
11/05/31
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
IC101
LG1154AN_H13A
OP MODE Setting
& Select XTAL Input
Clock for H13A
CLK_54M_VTT
+3.3V_NORMAL
INTR_GBB
INTR_AFE3CH
+3.3V_NORMAL
IC100
LG1154D_H13D
H13A_NON_BRAZIL
E1
AT16
E2
AU17
D1
AT17
1M
R459
R460
XTAL SEL[1:0] : SW[4:3]
00 => Xtal Input
01 => CLK 24M from H13D
10 => XTAL Bypass from H13D
R461
R462
10K
10K
10K
AUD_FS20CLK
R484 OPT
AUD_FS21CLK
R483
R441
OP MODE[0:1] : SW[2:1]
00 => Normal Operaiton Mode
/T32 Debug Mode
01 => Internal Test Purpose
10 => Internal Test Purpose
11 => Internal Test Purpose
XOUT_SUB
R482 OPT
OPT
10K
C427
R481 OPT
X-TAL_1
GND_1
1
3
12pF
1/16W
1%
R466
82
X-TAL_2
DAC_START_PULLDOWN
XIN_SUB
4
2
C426
GND_2
12pF
C404
0.01uF
50V
24MHz
X400
1/16W
1%
MAIN Clock(24Mhz)
1/16W
1%
R465
390
R464
1K
INTR_AGPIO
AUD_FS23CLK
AUD_FS24CLK
AUD_FS25CLK
100
OPM[1]
100
AUD_DAC1_LRCK
XTAL_SEL[0]
100
AUD_DAC1_SCK
XTAL_SEL[1]
AUD_DAC1_LRCH
AUD_DAC0_SCK
AUD_DAC0_LRCH
AUD_ADC_LRCK
Place SOC Side
R434
AV1_CVBS_IN
BB_SCL
C462
150pF
EU
0.047uF
D18
SC_CVBS_IN_SOY
M18
XTAL_SEL[0]
100
C423
M17
XTAL_SEL[1]
0.047uF
10K EU
SCART_FB_DIRECT
EU
R436
2.7K
R422
75
C415
0.1uF
NON_EU
R436-*1
0
B8
R405
V14
V15
33
C418
0.047uF
C428
1000pF
33 C419
COMP1_PB_IN_SOC
COMP1_Y_IN_SOC
C453
AUAD_L_CH2_IN
OPM1
AUAD_R_CH2_IN
AUAD_L_CH1_IN
H13A_SCL
AUAD_R_CH1_IN
H13A_SDA
AUAD_R_REF
2.2uF
N2
N3
AUDA_OUTL
BB_TP_DATA7
AUDA_OUTR
BB_TP_DATA6
EU 100
EU 100
P1
R479
SCART_Lout_SOC
BB_TP_DATA5
R480
SCART_Rout_SOC
BB_TP_DATA4
33
C420
0.047uF
33
C421
0.047uF
C429
1000pF
COMP2_PB_IN_SOC
COMP2_Y_IN_SOC
ANTCON
CVBS_IN1
RFAGC
CVBS_VCM
IFAGC
U14
BUF_OUT1
ADC_I_INCOM
C439
100pF
50V
0.047uF
0.047uF
V7
68 C441
0.047uF
U10
R449
68 C442
0.047uF
V12
T5
T6
SC_FB_SOC
COMP2_PR_IN_SOC
U8
COMP1_PB_IN_SOC
V8
COMP1_Y_IN_SOC
V9
COMP1_Y_IN_SOC_SOY
U9
COMP1_PR_IN_SOC
V10
COMP2_PB_IN_SOC
U11
COMP2_Y_IN_SOC
V11
COMP2_Y_IN_SOC_SOY
Near Place Scart AMP
EU R442
22K
EU R426
22K
T1
AUAD_R_CH3_IN
U2
AUAD_L_CH2_IN
U3
U12
COMP2_PR_IN_SOC
BB_TP_DATA3
BB_TP_DATA2
BB_TP_DATA1
V2
CVBS_GC2
CVBS_GC1
CVBS_GC0
AUAD_R_REF
T3
CVBS_UP
AUAD_M_REF
T2
Close to IC4300
AUAD_REF_PO
FS00CLK
AUDCLK_OUT
BUF_OUT2
ADC_I_INP
NON_TU_W_BR/TW/CO
K18
GPIO0
REFT
GPIO1
REFB
GPIO2
ADC1_COM
GPIO3
ADC2_COM
GPIO4
ADC3_COM
GPIO5
SC1_SID
GPIO6
SC1_FB
GPIO7
PB1_IN
GPIO8
Y1_IN
GPIO9
SOY1_IN
GPIO10
PR1_IN
GPIO11
PB2_IN
GPIO12
Y2_IN
GPIO13
SOY2_IN
GPIO14
PR2_IN
GPIO15
DAC_START
R487
J18
IF_AGC
C454
C459
0.1uF
TU_W_BR/TW/CO
0.1uF
U17
ADC_I_INP
V17
DAC_DATA4
DAC_DATA3
DAC_DATA2
DAC_DATA1
ADC_I_INN
DAC_DATA0
EU
F2
AAD_GC4
BIT1
F1
G3
G2
AAD_GC3
BIT2
TU_W_BR/TW/CO
R487-*1
BIT3
10K
AAD_GC1
AAD_GC2
BIT4
G1
BIT5
BIT6
H3
H2
H1
J3
E18
AAD_DATA9
BIT7
AAD_DATA8
BIT8
AAD_DATA7
BIT9
BIT10
AAD_DATA6
AAD_DATA5
E17
AAD_DATA4
H16
AAD_DATA3
J2
AAD_DATA2
J1
AAD_DATA1
K1
SC_FB_BUF
AAD_DATA0
+2.5V_Normal
HSR_AP0
HSR_AM0
Placed as close as possible to IC4300
HSR_BP0
+3.3V_NORMAL
AUDIO IN
L407
27K
C432
4.7uF
OPT
C447
1uF
25V
IC400
NJM2561BF1
AUAD_L_CH3_IN
AUAD_L_REF
R419
SC_R_IN
C433
27K
4.7uF
R438
1
6
V+
EU
AUAD_R_CH3_IN
VOUT
10K 1%
EU
2
5
C412
0.1uF
GND
3
4
VIN
DTV/MNT_V_OUT_SOC
HSR_DP0
B2
AU20
B1
AT19
C2
AU19
C1
AT18
D2
AU18
B4
AU22
A3
AT21
AU21
B3
A7
AT25
B7
AU25
E8
AP23
D8
AR23
C8
AP22
E7
AR22
D7
AP21
C7
AR21
AP20
E6
D6
AR20
C6
AP19
E5
AR19
D5
AP18
C5
AR18
CLK_54M_VTT
R467 82
STPI0_ERR/GPIO44
AUD_FS20CLK
STPI0_DATA/GPIO43
AUD_FS21CLK
STPI1_CLK/GPIO42
AUD_FS23CLK
STPI1_SOP/GPIO41
AUD_FS24CLK
STPI1_VAL/GPIO40
AUD_FS25CLK
STPI1_ERR/GPIO55
HSR_DM0
HSR_EP0
1/16W 1%
AR24
B9
AU27
A9
AT27
D9
AP24
E9
AR25
Close to LG1154A
B11 R492
330
A11 R407
330
AU29
AT29
DAC_START_PULLDOWN
D11
AP27
C11
AR27
E10
AP26
D10
AR26
C10
AP25
A10 R451
TP_DVB_SOP
AUD_DAC1_LRCK
TP_DVB_VAL
AUD_DAC1_SCK
TP_DVB_ERR
AUD_DAC1_LRCH
TP_DVB_DATA0
AUD_DAC0_LRCK
TP_DVB_DATA1
AUD_DAC0_SCK
TP_DVB_DATA2
AUD_DAC0_LRCH
TP_DVB_DATA3
AUD_ADC_LRCK
TP_DVB_DATA4
AUD_ADC_SCK
TP_DVB_DATA5
AUD_ADC_LRCH
TP_DVB_DATA6
C434
BB_SCL
TPI_CLK
BB_TPI_CLK
TPI_SOP
BB_TPI_ERR
TPI_VAL
BB_TPI_SOP
TPI_ERR
BB_TPI_VAL
TPI_DATA0
BB_TPI_DATA7
TPI_DATA1
BB_TPI_DATA6
TPI_DATA2
BB_TPI_DATA5
TPI_DATA3
BB_TPI_DATA4
TPI_DATA4
BB_TPI_DATA3
TPI_DATA5
BB_TPI_DATA2
TPI_DATA6
BB_TPI_DATA1
TPI_DATA7
TPIO_CLK/GPIO53
AT28
330
CLK_54M
TPIO_SOP/GPIO52
CVBS_GC2
TPIO_VAL/GPIO51
CVBS_GC1
TPIO_ERR/GPIO50
CVBS_GC0
TPIO_DATA0/GPIO58
CVBS_UP
TPIO_DATA1/GPIO59
CVBS_DN
TPIO_DATA2/GPIO60
TPIO_DATA3/GPIO61
FS00CLK
TPIO_DATA4/GPIO62
H13A_AUDCLK_OUT
TPIO_DATA5/GPIO63
TPIO_DATA6/GPIO48
DAC_START
R421
R439
27K
10K 1%
C435
4.7uF
DAC_DATA3
AUDCLK_OUT
DAC_DATA2
DACLRCH
DAC_DATA1
DACSLRCH/GPIO127
DAC_DATA0
PCMI3SCK/GPIO112
DACSCK
AR30
C13
AP29
E12
AR29
D12
AP28
C12
AR28
AAD_GC4
DACLRCK
AAD_GC3
PCMI3LRCK/GPIO113
AAD_GC2
PCMI3LRCH
AAD_GC1
DACCLFCH/GPIO126
AAD_GC0
C17
AP35
E16
AR35
D16
AP34
C16
AR34
E15
AP33
D15
AR33
C15
AP32
E14
AR32
D14
AP31
C14
AR31
E13
AP30
B18
AT36
IEC958OUT
DACSUBMCLK
AAD_DATA9
DACSUBLRCH
AAD_DATA8
DACSUBSCK
AAD_DATA7
DACSUBLRCK
AAD_DATA6
TEST1
AAD_DATA5
TEST2
AAD_DATA4
R440
AUAD_R_CH2_IN
L/DIM0_MOSI
C448 OPT
4.7uF
10V
10K 1%
C456
4.7uF
10V
NON_TU_W_BR/TW
R443
+12V
TX0N
AAD_DATA2
TX0P
AAD_DATA1
TX1N
AAD_DATA0
TX1P
AAD_DATAEN
TX2N
TX2P
TX3N
SCART_FB_BUFFER
R446
4.7K
+3.3V_NORMAL
SCART_Lout_SOC
EU
100K
R409
EU
C406
SCART_Rout_SOC
2.2uF
10V
SCART_FB_BUFFER
R401
SC_FB
470
B
AUDA_OUTL
C400
0.01uF
OPT
R6451
100
AUDA_OUTR
1/16W
5%
SCART_FB_BUFFER
1K R406
R6450
100
Tuner IF Filter
C401
0.01uF
OPT
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
AT32
B14
AU32
A15
AT33
B15
AU33
A16
AT34
B16
AU34
AT35
A17
AU35
B17
TX4P
HSR_BP
TX5N
HSR_BM
TX5P
HSR_CP
TX6N
HSR_CM
TX6P
HSR_CLKP
TX7N
HSR_CLKM
TX7P
HSR_DP
TX8N
HSR_DM
TX8P
HSR_EP
TX9N
HSR_EM
R402
AU15
AN5
33
AR14
AR404
33
AP14
AN14
AP13
L/DIM0_VS
L/DIM0_MOSI
BPL_IN
TX9P
TX10N
AUD_HPDRV_LRCH
TX10P
AUD_HPDRV_LRCK
TX11N
AUD_HPDRV_SCK
TX11P
TX12N
FRC_LR_O_SYNC_FLAG
AF7
PWM2
AD7
AE6
AN8
0.01uF
AR7
AFE 3CH REF Setting
L406
OPT
DIM0_SCLK
TX13N
DIM0_MOSI
TX13P
DIM1_SCLK
TX14N
DIM1_MOSI
TX14P
TX15N
PWM0
TX15P
PWM1
TX16N
PWM2
TX16P
PWM_IN
TX17N
TX17P
AN7
EPI_EO
TX18N
EPI_VST
TX18P
EPI_DPM
TX19N
EPI_MCLK
TX19P
EPI_GCLK
TX20N
TX20P
TX21N
Placed as close as possible to IC4300
TX21P
TX22N
C444
Placed as close as possible to IC100
REFT
TX22P
0.1uF
HP_OUT
L400
BLM18PG121SN1D
HP_LOUT_AMP
TX23N
C446
0.1uF
HP_OUT
L401
BLM18PG121SN1D
HP_OUT
C407
0.22uF
10V
HP_LOUT
HP_ROUT_AMP
D13_STPO_VAL
AG35
D13_STPO_ERR
AG36
D13_STPO_DATA
FE_DEMOD1_TS_CLK
AL36
FE_DEMOD1_TS_SYNC
AL35
FE_DEMOD1_TS_VAL
AL37
AM35
FE_DEMOD1_TS_ERROR
AN36
FE_DEMOD1_TS_DATA[0]
FE_DEMOD1_TS_DATA[1]
AN37
FE_DEMOD1_TS_DATA[2]
AN35
FE_DEMOD1_TS_DATA[3]
AP37
FE_DEMOD1_TS_DATA[4]
AP36
FE_DEMOD1_TS_DATA[5]
AR37
FE_DEMOD1_TS_DATA[6]
AR36
FE_DEMOD1_TS_DATA[7]
B29
B28
C28
B32
FE_DEMOD1_TS_DATA[1-7]
TPI_CLK
TPI_SOP
TPI_ERR
TP402
TPI_VAL
TPI_ERR
TPI_DATA[0-7]
TPI_DATA[0]
C31
TPI_DATA[1]
B31
TPI_DATA[2]
TPI_DATA[3]
A31
C30
TPI_DATA[4]
A30
TPI_DATA[5]
B30
TPI_DATA[6]
C29
TPI_DATA[7]
D30
TPO_CLK
D31
TPO_SOP
F30
TPO_VAL
TPO_ERR
TP400
TPO_ERR
E31
E30
TPO_DATA[0]
F29
TPO_DATA[1]
E29
TPO_DATA[2]
TPO_DATA[0-7]
TPO_DATA[3]
F28
E28
TPO_DATA[4]
D28
TPO_DATA[5]
E27
TPO_DATA[6]
D27
TPO_DATA[7]
I2S_I/F
AD5
R495
100
AD6
R496
100
Y6
R452
100
AC6
R497
100
AC5
R498
100
Must be used
AUD_MASTER_CLK
To front, woofer,
AUD_LRCH1 center amp FOR UB98/UB9
AUD_LRCH
Y7
To height amp FOR UB98/UB9
AB7
AB5
AUD_SCK
AUD_LRCK
C411
10pF
50V
OPT
AA6
URSA_RESET_SoC
AU14
SPDIF_OUT
AA32
AA34
AA33
AB34
AR403
33
1/16W
+3.3V_NORMAL
AE32
AE33
AU6
TXB0P/TX5P
TXB0N/TX5N
AT5
AU5
AT4
AU4
AU3
AU2
AT2
AT1
AR4
AR3
AP1
AP2
AP4
AP3
AN4
TXB1P/TX4P
TXB1N/TX4N
TXB2P/TX3P
TXB2N/TX3N
TXBCLKP/TX2P
TXBCLKN/TX2N
TXB3P/TX1P
TXB3N/TX1N
TXB4P/TX0P
TXB4N/TX0N
TXA0P/TX11P
TXA0N/TX11N
TXA1P/TX10P
TXA1N/TX10N
TXA2P/TX9P
AN3
AM4
AM3
TXA2N/TX9N
TXACLKP/TX8P
TXACLKN/TX8N
AL4
AL3
AK1
AK2
AK4
AK3
AJ3
AH4
TXA3P/TX7P
TXA3N/TX7N
TXA4P/TX6P
TXA4N/TX6N
TXD0P/TX17P
TXD0N/TX17N
TXD1P/TX16P
TXD1N/TX16N
TXD2P/TX15P
AH3
AG4
AG3
AF1
TXD2N/TX15N
TXDCLKP/TX14P
TXDCLKN/TX14N
TXD3P/TX13P
AF2
AF4
AF3
AE4
TXD3N/TX13N
TXD4P/TX12P
TXD4N/TX12N
TXC0P/TX23P
AE3
AD4
AD3
AC4
AC3
AB1
TXC0N/TX23N
TXC1P/TX22P
TXC1N/TX22N
TXC2P/TX21P
TXC2N/TX21N
TXCCLKP/TX20P
AB2
AB4
AB3
AA4
AA3
TX23P
TXCCLKN/TX20N
TXC3P/TX19P
TXC3N/TX19N
TXC4P/TX18P
TXC4N/TX18N
AR5
C445
TX_LOCKN
REFB
HP_OUT
C409
0.22uF
10V
D13_STPO_SOP
AH36
AJ4
C438
0.01uF
D13_STPO_CLK
AH37
TX12P
L_VSOUT_LD
AF6
PWM1
BPL_IN
SC_FB_BUF
MMBT3904(NXP)
Q400
E SCART_FB_BUFFER
AU31
A14
TX4N
HSR_AM
IF_P
51
C
AT31
B13
AP8
ADC_I_INP
1/16W
1%
2.2uF
10V
A13
TX3P
HSR_AP
AP5
51
NON_TU_W_BR/TW
C436
22pF
NON_TU_W_BR/TW
R444
100K
R408
EU
EU
AU30
IF_N
To ADC
C403
AT30
B12
C437
ADC_I_INN
SCART_Lout
A12
L/DIM0_SCLK
TU_W_BR/TW TU_W_BR/TW TU_W_BR/TW
R443-*1
R444-*1
C436-*1
100pF
220
220
FE_DEMOD2_TS_DATA
AH35
AT6
AAD_DATA3
ADCO_OUT_CLK
AT15
1%
R458
47K
FE_DEMOD2_TS_ERROR
AJ36
TPIO_DATA7/GPIO49
DAC_DATA4
AC7
AUAD_L_CH2_IN
FE_DEMOD2_TS_VAL
AJ35
A28
BB_SDA
AT14
AUAD_M_REF
4.7uF
FE_DEMOD2_TS_SYNC
AK37
TP_DVB_DATA7
AU28
C9
HSR_EM0
L/DIM0_VS
L/DIM0_SCLK
FE_DEMOD2_TS_CLK
AK36
AM36
TP_DVB_CLK
BB_TPI_DATA0
NC
1/10W
5%
27K
1%
COMP1/AV1/DVI_R_IN
100K
R403
EU
STPI0_VAL/GPIO45
AUD_HDMI_MCLK
AUAD_R_REF
OPT
R454
2
R420
HSR_CLKM0
1%
R457
51K
1%
COMP1/AV1/DVI_L_IN
100K
R404
EU
AT20
EU
DTV/MNT_V_OUT
VSAG
47K R456 1%
POWER_SAVE
1%
HSR_CLKP0
C455
10uF
10K 1%
C414
0.1uF
R437
1%
R455
51K
4.7uF C449
R418
SC_L_IN
HSR_CP0
HSR_CM0
AUAD_REF_PO
R430
22K
OPT
INTR_AGPIO
R6006
EU
1%
R445
22K
OPT
AU36
A2
ADCO_OUT_CLK
HSR_BM0
HP_ROUT_MAIN
C18
AAD_DATAEN
10K
1uF 25V 10K
R6005
C6001
HP_LOUT_MAIN
STPI0_SOP/GPIO46
STPI1_DATA/GPIO54
AAD_GC0
EU
SCART_AMP_L_FB
SCART_Rout
C4
D13
BIT0
SCART_AMP_R_FB
25V 1uF
C6006
AT22
CVBS_DN
AUAD_L_REF
R3
AU23
A4
B10
CLK_F54M
V3
U1
B5
BB_TP_DATA0
AUAD_R_CH2_IN
F3
R448
SC_ID_SOC
COMP2_Y_IN_SOC_SOY
AUAD_L_CH3_IN
ADC_I_INN
V6
68 C440
R2
U16
U7
REFB
R1
K17
CVBS_IN2
U15
OPT
COMP1_PR_IN_SOC
BB_TP_SOP
BB_TP_VAL
N1
AUAD_REF_PO
CVBS_IN3
BB_TP_CLK
BB_TP_ERR
0
DTV/MNT_V_OUT_SOC
COMP1_Y_IN_SOC_SOY
0.047uF
33 C422
R431
R417 1% 75
R415 1% 75
50V 10pF
C431
R413 1% 75
COMP1_Y
50V 10pF
C470
0.047uF
R447
R425
50V 10pF
C417
0.047uF V13
REFT
R424
C430
AUAD_R_CH3_IN
OPM0
Placed as close as possible to SOC
COMP1_Pb
D406
33
C443
R450 68
EU
EU
1% 75
R412
R414 1% 75
EU
R416 1% 75
OPT 50V 10pF
C473
OPT 50V 10pF
C474
OPT 50V 10pF
R427
C472
AUAD_L_CH3_IN
AUAD_L_REF
SC_B
D403
AUAD_R_CH4_IN
U13
TU_CVBS_SOC
5.5V
AUD_SCART_OUTR
AUAD_M_REF
SC_G
D401
XTAL_SEL1
A8
H13A_SCL
H13A_SDA
SC_CVBS_IN_SOY
5.5V
K2
SC_CVBS_IN_SOC
5.5V
AUD_SCART_OUTL
K3
OPM[0]
OPM[1]
AV1_CVBS_IN_SOC
EU
XTAL_SEL0
PORES_N
SC_ID_SOC
R400
COMP1_Pr
AUDA_OUTR
TU_SIF
C457
1000pF
OPT
P3
SC_FB_SOC
SC_R
AUDA_OUTL
CLK_24M
E3
SCART_FB_DIRECT
R423
100
0
0.1uF
10uF
P2
AUDA_VBG_EXT
XTAL_BYPASS
AUAD_L_CH4_IN
SC_FB
NON_EU
R422-*1
0.1uF
C451
C452
TU_CVBS_SOC
SOC_RESET
R435
C450
H17
AAD_ADC_SIFM
VSB_AUX_XIN
SC_CVBS_IN_SOC
C402
150pF
50V
OPT
SC_ID
AAD_ADC_SIF
XO_SUB
N18
R411
75
1%
3216
R432
TU_CVBS
100 C425
XIN_SUB
EU
R433
330P18
J17
R453
BB_SDA
H18
0.01uF
XIN_SUB
XOUT_SUB
SC_CVBS_IN
EU
P17
AT23
AUD_ADC_LRCH
AV1_CVBS_IN_SOC
R410
75
1%
3216
L409 1uH
C408
150pF
50V
EU
IC101 H13A_NON_BRAZIL
LG1154AN_H13A
0.01uF
C410
150pF
0.047uF
AUD_ADC_SCK
C458
EU
C460
C405
150pF
50V
5.5V
D404
100 C424
AU24
A5
AUD_HDMI_MCLK
OPM[0]
100
AUD_DAC0_LRCK
L408 1uH
AT24
B6
STPI0_CLK/GPIO47
INTR_AFE3CH
AUDCLK_OUT_SUB
FOR EMI
Place JACK Side
A6
AK35
INTR_GBB
0.1uF
HP_ROUT
Not Used Net (UB85/95/UC89)
AUD_LRCH1
DIMMING
Place at JACK SIDE
NON_OLED
AR402
33
1/16W
LG1154A
PWM_DIM
PWM2
PWM_DIM2
PWM1
LG1154D
BSD-14Y-UD-004-HD
2013-12-17
MAIN AUDIO/VIDEO
LGE Internal Use Only
DDR_VTT
IC100
LG1154D_H13D
F15
M0_DDR_A[0]
M0_DDR_A[1]
M0_DDR_A[2]
M0_DDR_A[3]
M0_DDR_A[4]
M0_DDR_A[5]
M0_DDR_A[6]
M0_DDR_A[7]
M0_DDR_A[8]
M0_DDR_A[9]
M0_DDR_A[10]
M0_DDR_A[11]
M0_DDR_A[12]
M0_DDR_A[13]
M0_DDR_A[14]
M0_DDR_A0
F13
M0_DDR_A3
E10
M0_DDR_A4
E18
M0_DDR_A5
E11
M0_DDR_A6
F18
M0_DDR_A7
F11
M0_DDR_A8
F16
M0_DDR_A9
E9
M0_DDR_A10
E12
M0_DDR_A11
E13
M0_DDR_A12
E16
M0_DDR_A13
M0_DDR_A14
F12
F14
M0_DDR_A15
M0_DDR_BA1
E15
M0_DDR_BA2
M0_DDR_BA[2]
B10
M0_DDR_U_CLK
M0_DDR_U_CLKN
M0_DDR_D_CLK
M0_DDR_D_CLKN
M0_U_CLK
A10
M0_U_CLKN
A19
M0_D_CLK
B19
M0_DDR_CKE
F21
M0_DDR_RASN
M0_DDR_CASN
M0_DDR_ODT
E21
M0_DDR_CASN
F20
M0_DDR_WEN
M0_DDR_WEN
E17
M0_DDR_RESET_N
M0_DDR_RESET_N
F9
M0_DDR_ZQCAL
M0_DDR_DQS[1]
M0_DDR_DQS_N[1]
M0_DDR_DQS[2]
M0_DDR_DQS_N[2]
M0_DDR_DQS[3]
M0_DDR_DM[2]
A20
C19
M0_DDR_DQ[2]
M0_DDR_DQ[3]
M0_DDR_DQ[4]
M0_DDR_DQ[5]
M0_DDR_DQ[6]
M0_DDR_DQ[7]
M0_DDR_DQ[8]
M0_DDR_DQ[9]
M0_DDR_DQ[10]
M0_DDR_DQ[11]
M0_DDR_DQ[12]
M0_DDR_DQ[13]
M0_DDR_DQ[14]
M0_DDR_DQ[15]
M0_DDR_DQ[16]
M0_DDR_DQ[17]
M0_DDR_DQ[18]
M0_DDR_DQ[19]
M0_DDR_DQ[20]
M0_DDR_DQ[21]
M0_DDR_DQ[22]
M0_DDR_DQ[23]
M0_DDR_DQ[24]
M0_DDR_DQ[25]
M0_DDR_DQ[26]
M0_DDR_DQ[27]
M0_DDR_DQ[28]
M0_DDR_DQ[29]
M0_DDR_DQ[30]
K7
N3
N7
A10/AP
VDD_2
A11
VDD_3
A12/BC
VDD_4
A13
VDD_5
VDD_6
A14
J7
M0_DDR_A15
A15
VDD_7
VDD_8
J2
M0_DDR_BA0
BA0
K8
M0_DDR_BA1
D7
M0_DDR_A11
G2
M0_DDR_A12
G8
M0_DDR_A13
K1
M0_DDR_A14
K9
M0_DDR_A15
G9
M9
M0_DDR_BA0
CK
VDDQ_2
CK
VDDQ_3
CKE
VDDQ_4
C1
M0_D_CLK
E2
C559
0.1uF
M0_D_CLKN
E9
C560
0.1uF
M0_DDR_CKE
CS
M0_DDR_RASN
RAS
G3
M0_DDR_CASN
CAS
H3
M0_DDR_WEN
M0_DDR_ODT
ODT
F3
M0_DDR_RASN
L2
M8
M2
N8
M3
H7
M7
K7
N3
N7
J7
J3
A3
G7
L3
M0_DDR_A2
E1
K2
M0_DDR_A3
VREFDQ
L8
M0_DDR_A4
A4
A5
240
1%
A7
A8
VDD_2
A11
VDD_3
A12/BC
VDD_4
A13
VDD_5
A14
VDD_6
A15
VDD_7
BA0
N8
M0_DDR_A8
M3
M0_DDR_A9
A9
H7
M0_DDR_A10
D7
M7
M0_DDR_A11
G2
K7
M0_DDR_A12
G8
N3
M0_DDR_A13
K1
N7
M0_DDR_A14
K9
J7
M0_DDR_A15
M1
VDD_8
M2
M0_DDR_A7
A2
VDD_1
A10/AP
M8
M0_DDR_A6
ZQ
A9
L2
M0_DDR_A5
VDDC15_M0
R560
H8
A6
M9
BA1
M0_DDR_BA1
BA2
M0_DDR_BA2
B9
VDDQ_1
CK
VDDQ_2
CK
VDDQ_3
CKE
VDDQ_4
C1
E2
C583
0.1uF
E9
C574
0.1uF
M0_DDR_WEN
WE
N2
M0_DDR_RESET_N
RESET
G1
F3
G3
H3
A0
AR9
56
AR8
56
AR7
56
AR10
56
AR11
56
AR12
56
IC505
H5TQ4G83AFR-PBC
R3104
56
K8
J3
A3
G7
M0_U_CLKN
G9
M0_DDR_CKE
ODT
M0_DDR_ODT
RAS
M0_DDR_RASN
CAS
M0_DDR_CASN
G1
F3
G3
H3
M0_DDR_WEN
WE
N2
K2
M0_DDR_A3
R559
H8
A6
A7
A8
VDD_2
A11
VDD_3
A12/BC
VDD_4
A13
VDD_5
A14
VDD_6
A15
VDD_7
VDD_8
BA0
M8
M0_DDR_A6
M2
M0_DDR_A7
A2
VDD_1
A10/AP
L2
M0_DDR_A5
240
1%
A9
L8
M0_DDR_A4
VDDC15_M0
ZQ
N8
M0_DDR_A8
A9
M3
M0_DDR_A9
D7
H7
M0_DDR_A10
G2
M7
M0_DDR_A11
G8
K7
M0_DDR_A12
K1
N3
M0_DDR_A13
K9
N7
M0_DDR_A14
M1
J7
M0_DDR_A15
M9
VDD_9
BA1
M0_DDR_BA0
BA2
M0_DDR_BA1
B9
VDDQ_1
CK
VDDQ_2
CK
VDDQ_3
CKE
VDDQ_4
C1
E2
C568
E9
C569
A0
K8
J3
J8
VREFCA
A1
A2
E1
A3
VREFDQ
A4
A5
ZQ
240
1%
A7
A8
A2
A9
VDD_1
A10/AP
VDD_2
A11
VDD_3
A12/BC
VDD_4
A13
VDD_5
A14
VDD_6
A15
VDD_7
VDD_8
BA0
0.1uF
G7
M0_U_CLKN
G9
CS
D7
G2
G8
K1
K9
M1
M9
BA1
B9
VDDQ_1
F7
M0_U_CLK
0.1uF
A9
VDD_9
BA2
M0_DDR_CKE
VDDC15_M0
R561
H8
A6
J2
M0_DDR_BA2
CK
VDDQ_2
CK
VDDQ_3
CKE
VDDQ_4
C1
E2
C572
0.1uF
E9
C577
0.1uF
H2
ODT
G1
M0_DDR_ODT
RAS
CAS
M0_DDR_RASN
WE
M0_DDR_CASN
F3
G3
H3
M0_DDR_WEN
N2
M0_DDR_RESET_N
RESET
L3
M0_DDR_A2
VREFDQ
A5
H2
CS
L7
M0_DDR_A1
A4
DDR3
4Gbit
K3
M0_DDR_A0
E1
F7
M0_U_CLK
VREFCA
A2
M0_1_DDR_VREFCA_T
M0_1_DDR_VREFDQ_T
J8
A1
J2
M0_DDR_BA0
VDD_9
F7
G9
L7
M0_DDR_A1
A2
J2
K8
M0_DDR_A0
VREFCA
A1
H2
G1
M0_DDR_CASN
L8
A0
B9
H2
M0_DDR_ODT
K2
M1
M0_DDR_BA2
VDDQ_1
G7
M0_D_CLKN
M0_DDR_A10
M0_DDR_BA1
F7
M0_DDR_CKE
M0_DDR_A9
A9
VDD_9
BA2
M0_D_CLK
M0_DDR_A8
A2
BA1
J3
M0_DDR_BA2
M0_DDR_DQS1
D19
M0_DDR_DQS_N1
A11
M0_DDR_DQS0
M0_DDR_DQS_N1
DQS
B7
A1
A7
M0_DDR_DQS3
D10
M0_DDR_DQS1
DQS
D3
M0_DDR_DM0
M0_DDR_DQS_N2
C10
C3
M0_DDR_DQS_N0
M0_DDR_DQS2
B11
DM/TDQS
VSS_1
NF/TDQS
VSS_2
VSS_3
M0_DDR_DQS_N3
VSS_4
VSS_5
M0_DDR_DM0
C20
M0_DDR_DM1
D9
C11
M0_DDR_DQ1
C23
M0_DDR_DQ2
D16
E7
M0_DDR_DQ7
M0_DDR_DQ4
B15
D2
M0_DDR_DQ6
M0_DDR_DQ3
B24
E8
M0_DDR_DQ5
M0_DDR_DQ5
D23
A15
C16
D21
DQ4
VSS_11
DQ5
VSS_12
M0_DDR_DQ6
F1
M0_DDR_DQ7
F9
M0_DDR_DQ8
H1
H9
M0_DDR_DM1
A8
C3
D3
DQS
M0_DDR_DQS2
DQS
M0_DDR_DQS_N2
B7
A7
A1
DM/TDQS
VSS_1
NF/TDQS
VSS_2
B1
CS
ODT
RAS
CAS
WE
RESET
N2
RESET
J1
M0_DDR_DQ8
J9
M0_DDR_DQ9
L1
M0_DDR_DQ10
L9
M0_DDR_DQ11
N1
M0_DDR_DQ12
N9
M0_DDR_DQ13
M0_DDR_DQ14
DQ7
M0_DDR_DQ15
C7
C2
C8
E3
E8
D2
E7
DQ0
VSS_7
DQ1
VSS_8
DQ2
VSS_9
DQ3
VSS_10
DQ4
VSS_11
DQ5
VSS_12
NC_1
VSSQ_2
NC_2
VSSQ_3
NC_3
VSSQ_4
NC_4
VSSQ_5
C9
F1
D1
F9
D9
H1
H9
VSS_5
F8
J1
J9
N1
VSSQ_3
NC_3
VSSQ_4
NC_4
VSSQ_5
E3
M0_DDR_DQ20
N9
E8
M0_DDR_DQ21
B2
NC_2
C8
M0_DDR_DQ19
M0_DDR_DQ23
VSSQ_2
C2
M0_DDR_DQ18
L9
VSSQ_1
C7
M0_DDR_DQ17
L1
D2
E7
DQ0
VSS_7
DQ1
VSS_8
DQ2
VSS_9
DQ3
VSS_10
DQ4
VSS_11
DQ5
VSS_12
C9
F1
D1
F9
D9
H1
H9
VSSQ_3
NC_3
VSSQ_4
NC_4
VSSQ_5
VSS_2
VSS_3
F8
VSS_5
J1
J9
L1
C7
M0_DDR_DQ25
L9
C2
M0_DDR_DQ26
N1
C8
M0_DDR_DQ27
N9
E3
M0_DDR_DQ28
E8
D2
E7
M0_DDR_DQ31
B8
VSS_6
B3
M0_DDR_DQ24
B2
NC_2
VSS_1
NF/TDQS
VSS_4
M0_DDR_DQ30
VSSQ_2
A1
DM/TDQS
F2
DQ7
NC_1
A7
D8
M0_DDR_DQ29
VSSQ_1
B7
M0_DDR_DM3
B1
DQS
DQS
A8
DQ6
A3
B8
NC_5
NC_5
VSS_6
B3
M0_DDR_DQ16
DQ7
NC_1
VSS_2
VSS_3
M0_DDR_DQ22
A3
B8
VSS_1
NF/TDQS
D3
M0_DDR_DQS_N3
A1
DM/TDQS
VSS_4
DQ6
B2
B7
A7
C3
M0_DDR_DQS3
DQS
F2
VSS_6
B3
DQS
D8
VSS_5
F8
D3
B1
VSS_4
F2
C3
M0_DDR_DM2
A8
VSS_3
D8
DQ6
VSSQ_1
M0_DDR_DQ10
C22
VSS_10
A3
M0_DDR_DQ9
D17
VSS_9
DQ3
E3
M0_DDR_DQ4
VSS_8
DQ2
C8
M0_DDR_DQ3
VSS_7
DQ1
C2
M0_DDR_DQ2
M0_DDR_DQ0
C15
DQ0
C7
M0_DDR_DQ1
M0_DDR_DM3
VSS_6
B3
M0_DDR_DQ0
M0_DDR_DM2
D22
M0_DDR_DQ[1]
M7
M0_DDR_A11
M0_DDR_A13
M0_DDR_A14
M0_DDR_DQS_N0
M0_DDR_DM[3]
M0_DDR_DQ[0]
M0_DDR_A10
VDD_1
M0_DDR_A7
L3
DDR3
4Gbit
K3
M0_DDR_RESET_N
D18
M0_DDR_DM[1]
A9
H7
M0_DDR_A6
240
1%
A8
M3
M0_DDR_A5
VDDC15_M0
R558
ZQ
A7
N8
M0_DDR_A9
H8
A6
M2
M0_DDR_A8
M0_DDR_A4
A5
M8
M0_DDR_A7
M0_DDR_A3
VREFDQ
A4
L2
M0_DDR_A6
L7
J8
M0_DDR_DQS0
M0_DDR_DQS_N[3]
M0_DDR_DM[0]
A3
L8
M0_DDR_A5
M0_DDR_RESET_N
B20
M0_DDR_DQS_N[0]
M0_DDR_A3
M0_DDR_A4
M0_DDR_A0
M0_DDR_A1
M0_DDR_A2
E1
DDR3
4Gbit
K3
M0_DDR_VREFCA_T
M0_DDR_VREFDQ_T
M0_1_DDR_VREFDQ
VREFCA
A2
K2
R500
240
1%
M0_DDR_DQS[0]
M0_DDR_VREFCA
J8
A1
L3
M0_DDR_RASN
E20
A0
L7
M0_DDR_A1
M0_D_CLKN
E14
M0_DDR_CKE
M0_DDR_ODT
M0_DDR_A0
M0_DDR_A2
M0_DDR_A12
M0_DDR_BA0
F10
DDR3
4Gbit
K3
IC504
H5TQ4G83AFR-PBC
M0_1_DDR_VREFCA
M0_DDR_VREFDQ
M0_DDR_A2
F19
E19
M0_DDR_BA[1]
IC502
H5TQ4G83AFR-PBC
M0_DDR_A1
F17
M0_DDR_A[15]
M0_DDR_BA[0]
IC500
H5TQ4G83AFR-PBC
DQ0
VSS_7
DQ1
VSS_8
DQ2
VSS_9
DQ3
VSS_10
DQ4
VSS_11
DQ5
VSS_12
C9
F1
F9
H1
NC_5
H9
D8
F2
F8
J1
J9
L1
L9
N1
N9
B2
VSSQ_1
A3
D9
B1
DQ6
DQ7
D1
A8
NC_1
VSSQ_2
NC_2
VSSQ_3
NC_3
VSSQ_4
NC_4
VSSQ_5
B8
C9
D1
D9
NC_5
M0_DDR_DQ11
C18
M0_DDR_DQ12
C21
M0_DDR_DQ13
C17
M0_DDR_DQ14
D20
M0_DDR_DQ15
C13
M0_DDR_DQ16
M0_DDR_DQ17
D7
D13
M0_DDR_DQ18
C6
M0_DDR_DQ19
D14
M0_DDR_DQ20
D6
M0_DDR_DQ21
C14
M0_DDR_DQ22
A5
M0_DDR_DQ23
C7
M0_DDR_DQ24
D12
Real USE : 1Gbit
M0_DDR_DQ25
D8
H5TQ1G63DFR-PBC(x16)
M0_DDR_DQ26
B13
M0_DDR_DQ27
C9
M0_DDR_DQ28
C12
1Gbit : T7(NC_6)
M0_DDR_DQ29
C8
DDR_SAMSUNG
IC501
K4B4G1646B-HCK0
M0_DDR_DQ30
D11
M0_DDR_DQ31
M0_DDR_DQ[31]
DDR_SAMSUNG
IC503
K4B4G1646B-HCK0
4Gbit : T7(A14)
DDR_HYNIX
IC501-*1
M1_DDR_VREFCA
DDR_HYNIX
IC503-*1
M1_1_DDR_VREFCA
H5TQ4G63AFR-PBC
H5TQ4G63AFR-PBC
M8
N3
P7
M8
N3
M1_DDR_A1
M1_DDR_A2
M1_DDR_A3
M1_DDR_A4
IC100
LG1154D_H13D
M1_DDR_A5
M1_DDR_A6
M1_DDR_A7
M1_DDR_A8
M1_DDR_A[1]
M1_DDR_A[2]
M1_DDR_A[3]
M1_DDR_A[4]
M1_DDR_A[5]
M1_DDR_A[6]
M1_DDR_A[7]
M1_DDR_A[8]
M1_DDR_A[9]
M1_DDR_A[10]
M1_DDR_A[11]
M1_DDR_A[12]
M1_DDR_A[13]
M1_DDR_A[14]
R6
L6
J6
U5
J5
T5
M1_DDR_A0
M1_DDR_A1
M1_DDR_A10
M1_DDR_A2
M1_DDR_A11
M1_DDR_A3
M1_DDR_A12
M1_DDR_A4
M1_DDR_A13
M1_DDR_A5
M1_DDR_A14
VDDC15_M0
M0_DDR_CKE
M1_DDR_A6
K6
M1_DDR_A15
M1_DDR_A7
U6
M6
V5
M1_DDR_A8
R520
M1_DDR_A9
10K
R541
M1_DDR_BA0
10K
M1_DDR_BA1
M1_DDR_BA2
M1_DDR_A10
R5
M0_DDR_RESET_N
M1_DDR_A11
P5
L5
T6
M1_DDR_CKE
VDDC15_M1
M1_DDR_A12
M1_D_CLK
M1_DDR_A13
M1_D_CLKN
R540
M1_DDR_A14
P6
M0_U_CLK
M0_D_CLK
M1_DDR_A15
M1_DDR_A[15]
M1_DDR_CKE
10K
R521
V6
M1_DDR_BA1
M5
M1_DDR_BA2
M1_DDR_BA[2]
R2
M1_DDR_WEN
M0_U_CLK
M0_D_CLK
M1_D_CLK
F2
M1_D_CLKN
N5
M0_U_CLKN
M0_D_CLKN
M1_DDR_ODT
M1_DDR_CASN
M1_DDR_RESET_N
M1_D_CLKN
M1_U_CLKN
M1_DDR_DQS_N0
M1_DDR_ODT
F5
G5
H6
M1_DDR_RASN
M1_DDR_DQS1
M1_DDR_CASN
M1_DDR_DQS_N1
M1_DDR_WEN
M1_DDR_WEN
M1_DDR_DM[2]
P3
M1_DDR_DM[3]
R531
1K 1%
M1_DDR_DQ6
0.1uF
1%
R532
1K
M1_DDR_DQ8
M1_DDR_DQ9
M1_DDR_DQ10
C508
0.1uF
R510
1K 1%
1%
R511
1K
M1_DDR_DQ5
M1_DDR_DQ7
C500
0.1uF
R554
1K 1%
1%
R555
1K
0.1uF
1K 1%
R550
0.1uF
1%
R536
1K 1%
M1_DDR_DM2
C552
T4
M1_DDR_DM1
R551
E3
1K
M1_DDR_DM[1]
M1_DDR_DM0
C550
G4
M1_DDR_DM[0]
M1_DDR_DQS3
M1_DDR_DQS_N3
C512
R4
1%
R3
M1_DDR_DQS_N[3]
M1_DDR_DQ3
M1_DDR_VREFCA
M1_DDR_DQ4
M1_DDR_DQS_N2
R537
M1_DDR_DQS[3]
P2
M1_DDR_DQS2
M1_1_DDR_VREFCA
M0_1_DDR_VREFCA_T
M0_DDR_VREFCA_T
1K
M1_DDR_DQS_N[2]
P1
M1_DDR_DQS_N1
0.1uF
M1_DDR_DQS[2]
F4
M1_DDR_DQS1
R514
M1_DDR_DQS_N[1]
F3
M1_DDR_DQ1
M1_DDR_DQ2
M0_DDR_VREFCA
M1_DDR_DQS_N0
1K 1%
M1_DDR_DQS[1]
E1
1%
M1_DDR_DQS[0]
M1_DDR_DQS_N[0]
VDDC15_M0
VDDC15_M1
VDDC15_M1
VDDC15_M0
M0_1_DDR_VREFCA
M1_DDR_DQS0
R515
E2
M1_DDR_DQ0
VDDC15_M0
VDDC15_M0
1%
1K
M1_DDR_ZQCAL
R501
240
C504
F6
M1_DDR_DQ11
M1_DDR_DQ12
M1_DDR_DQ13
M1_DDR_DM3
M1_DDR_DQ14
M1_DDR_DQ[17]
M1_DDR_DQ[18]
M1_DDR_DQ[19]
M1_DDR_DQ[20]
M1_DDR_DQ[21]
M1_DDR_DQ[22]
M1_DDR_DQ[23]
M1_DDR_DQ[24]
M1_DDR_DQ[25]
M1_DDR_DQ[26]
M1_DDR_DQ[27]
M1_DDR_DQ[28]
M1_DDR_DQ[29]
M1_DDR_DQ[30]
M1_DDR_DQ[31]
M4
W3
L4
W4
L3
Y2
V3
N4
U4
M2
T3
N3
U3
P4
M7
A5
M3
K1
J3
K3
L3
A9
VDD_1
A10/AP
VDD_2
A11
VDD_3
A12/BC
VDD_4
A13
VDD_5
A14
VDD_6
A15
VDD_7
VDD_8
BA0
VDDQ_2
VDDQ_3
CKE
VDDQ_4
VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
CAS
VDDQ_8
H8
G2
H7
C8
C2
A7
A2
B8
A3
D9
A8
C1
M1_DDR_A5
C9
D2
E9
M1_DDR_A6
F1
H2
H9
M1_DDR_A7
J1
NC_1
NC_2
J9
L1
M1_DDR_A8
L9
NC_4
DQSL
DQSL
G7
K2
DQSU
VSS_2
VSS_4
VSS_3
K8
N1
N9
R1
R9
A8
C1
C9
D2
E9
F1
H2
C529
0.1uF
H9
C530
0.1uF
DMU
J9
L1
L9
NC_4
F2
F8
H3
H8
G2
H7
VSS_1
DML
VSS_5
VSS_6
E3
F7
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
A7
A2
B8
A3
M1_DDR_A10
E1
G8
J2
J8
M1_DDR_A11
M1
M9
P1
M1_DDR_A12
P9
T1
T9
VSS_12
M1_DDR_A13
B1
VSSQ_1
D7
C3
C8
B3
DQL6
DQL7
C2
M1_DDR_A9
A9
DQSU
E7
D3
J1
NC_2
M1_DDR_A4
DQU0
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
DQU4
VSSQ_5
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
B9
M1_DDR_A14
D1
D8
E2
M1_DDR_A15
E8
F9
M1_DDR_BA0
M1_DDR_BA1
M1_DDR_BA2
M1_U_CLK
M1_U_CLKN
M1_DDR_CKE
M1_DDR_ODT
M1_DDR_RASN
M1_DDR_CASN
M1_DDR_WEN
M1_DDR_RESET_N
VSS_1
VSS_2
VSS_3
VSS_4
DMU
VSS_5
VSS_6
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
A5
L2
K9
L8
A6
K1
J3
K3
L3
A9
M1_DDR_DQS3
B3
M1_DDR_DQS_N3
M1_DDR_DM2
J2
M1_DDR_DM3
M1_DDR_DQ16
M9
M1_DDR_DQ17
P1
M1_DDR_DQ18
P9
M1_DDR_DQ19
T1
M1_DDR_DQ20
T9
M1_DDR_DQ21
DQL6
M1_DDR_DQ22
DQL7
M1_DDR_DQ23
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
B9
M1_DDR_DQ24
D1
M1_DDR_DQ25
D8
M1_DDR_DQ26
E2
M1_DDR_DQ27
E8
M1_DDR_DQ28
F9
M1_DDR_DQ29
G1
M1_DDR_DQ30
G9
M1_DDR_DQ31
L8
ZQ
B2
VDD_1
VDD_2
VDD_3
A12/BC
VDD_4
A13
VDD_5
A14
VDD_6
A15
VDD_7
BA0
VDD_9
VDD_8
CK
VDDQ_2
VDDQ_3
CKE
VDDQ_4
CS
VDDQ_6
VDDQ_5
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
VDD_1
A10/AP
VDD_2
A11
VDD_3
A12/BC
VDD_4
A13
VDD_5
VDD_6
A14
VDD_7
VDD_8
BA0
VDDQ_2
VDDQ_3
CKE
VDDQ_4
VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
NC_1
RESET
NC_2
D9
DML
DMU
G7
K2
K8
N1
N9
R1
R9
A8
C1
C9
D2
E9
F1
H2
C561
0.1uF
H9
C562
0.1uF
J9
L1
L9
F7
F2
H3
H8
G2
H7
VSS_4
VSS_5
VSS_6
E3
F8
VSS_1
VSS_2
VSS_3
E7
D3
NC_4
F3
F1
H2
H9
J9
L1
L9
A9
DQSU
DQSU
J1
T2
C9
D2
E9
NC_4
DQSL
C7
B7
A1
VDDQ_1
A8
C1
DQSL
BA1
CK
NC_2
NC_3
VDD_9
CK
R1
R9
J1
NC_1
RESET
B2
A9
K8
N1
N9
A1
VDDQ_1
CK
T2
G3
D9
G7
K2
BA1
F3
A8
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
DQL7
C8
C2
A7
A2
B8
A3
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
VSSQ_1
D7
C3
B3
E1
DQL6
DQU0
DQU1
DQU2
VSSQ_2
VSSQ_3
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
B9
D1
D8
E2
E8
F9
G1
G9
DQSL
DQSL
C7
B7
A9
DQSU
VSS_1
DQSU
VSS_2
VSS_3
E7
D3
DML
VSS_4
DMU
VSS_5
VSS_6
E3
F7
F2
F8
H3
H8
G2
H7
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
DQL7
C8
C2
A7
A2
B8
A3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
VSSQ_1
D7
C3
B3
DQL6
B1
VSSQ_1
DQU0
A9
A10/AP
A11
WE
J8
M1
J3
K3
VDDC15_M1
E1
G8
K1
240
L3
A7
WE
G3
R545
ZQ
BA2
K9
H1
VREFDQ
A5
A6
A7
A8
BA2
J7
K7
VREFCA
A2
A3
A4
J7
M2
M3
M3
K7
A15
N8
A0
A1
M2
N8
A4
NC_3
DQSL
DML
P2
T7
VREFDQ
L2
M1_DDR_DQS2
DQSU
P8
T3
M7
H1
A3
G9
M1_DDR_DQS_N2
DQSU
N2
A2
R3
L7
R7
N7
G1
DQSL
D7
C3
VDDQ_9
C7
VDDQ_9
NC_1
E3
H3
G3
B7
A1
VDDQ_1
CK
C7
F8
B2
VDD_9
CK
RESET
F2
CAS
WE
BA1
F3
F7
K3
L3
VDDQ_6
VDDQ_7
VDDQ_8
NC_3
T2
B7
VDDQ_5
CS
ODT
RAS
RESET
WE
G3
K1
J3
F3
BA2
K9
240
VDDQ_2
VDDQ_3
VDDQ_4
T2
A8
J7
K7
CK
CK
CKE
L2
R543
VDDC15_M1
A7
M2
N8
L8
ZQ
A1
VDD_9
VDDQ_1
J7
K7
M1_DDR_A3
R1
BA1
BA2
K9
N1
N9
R9
P3
R8
R2
T8
DQU0
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
B9
D1
D8
E2
E8
F9
G1
G9
1uF
VDDC15_M0
C516
C502
1uF
0.1uF
R533
1K 1%
1%
R534
1K
0.1uF
R512
1K 1%
1%
R513
1K
0.1uF
R556
R552
1K 1%
1%
R557
M1_DDR_DQ14
M1_DDR_DQ16
M1_DDR_DQ17
1K 1%
1K 1%
R538
M1_DDR_DQ12
M1_DDR_DQ13
M1_DDR_DQ15
VDDC15_M1
* DDR_VTT
C509
V4
T7
BA0
M1_DDR_A2
A1
P2
M1_DDR_VREFDQ
C501
M3
1K
E4
M1_DDR_DQ11
0.1uF
H3
T3
VDD_6
VDD_7
VDD_8
G7
K2
K8
P7
M1_1_DDR_VREFDQ
M8
VREFCA
M1_1_DDR_VREFDQ
M0_1_DDR_VREFDQ_T
M0_DDR_VREFDQ_T
1%
D3
M1_DDR_DQ9
M1_DDR_DQ10
VDDC15_M1
VDDC15_M1
VDDC15_M0
VDDC15_M0
C553
M1_DDR_DQ[16]
G3
M1_DDR_DQ8
R553
M1_DDR_DQ[15]
C3
N7
N8
A4
A6
A14
A15
VREFDQ
VDD_2
VDD_3
VDD_4
VDD_5
D9
DDR3
4Gbit
(x16)
M0_1_DDR_VREFDQ
M0_DDR_VREFDQ
1K
M1_DDR_DQ[14]
H4
R7
M7
A10/AP
A11
A12/BC
A13
M2
M1_DDR_A1
B2
VDD_1
A0
VDDC15_M0
VDDC15_M0
M1_DDR_DQ7
C551
M1_DDR_DQ[13]
D4
M1_DDR_DQ5
0.1uF
M1_DDR_DQ[12]
J3
L7
T7
H1
A7
A8
A9
N3
M1_DDR_DQ3
M1_DDR_DQ4
M1_DDR_DQ6
C513
M1_DDR_DQ[11]
K1
1%
M1_DDR_DQ[9]
M1_DDR_DQ[10]
B4
R539
M1_DDR_DQ[8]
K2
1K
M1_DDR_DQ[7]
A3
0.1uF
M1_DDR_DQ[6]
R516
M1_DDR_DQ[5]
1K 1%
M1_DDR_DQ[4]
R3
R7
N7
T3
M1_DDR_A0
L8
ZQ
M1_DDR_DQ2
1%
M1_DDR_DQ[3]
J4
T8
T8
R3
L7
P3
N2
P8
A4
A5
A6
M1_DDR_DQ1
R517
M1_DDR_DQ[2]
B3
M1_DDR_DQ15
M1_DDR_DQ0
1K
M1_DDR_DQ[1]
K3
C505
C4
M1_DDR_DQ[0]
R2
D3
M1_DDR_DM1
M1_DDR_RESET_N
M1_DDR_RESET_N
R8
R2
M3
E7
M1_DDR_DM0
K5
P2
A3
P8
P2
R8
VREFCA
NC_3
M1_DDR_DQS0
M1_DDR_CKE
G6
M1_U_CLK
M1_D_CLK
M1_U_CLKN
F1
M1_DDR_CKE
M1_DDR_RASN
M1_DDR_CASN
100
R530
M1_DDR_D_CLK
M1_DDR_D_CLKN
M1_DDR_RASN
M0_U_CLKN
100
R518
M1_DDR_U_CLKN
M1_DDR_RESET_N
M0_D_CLKN
M1_U_CLK
R1
M1_DDR_ODT
200
R581
M1_DDR_U_CLK
200
R535
M1_DDR_BA0
200
R580
M1_DDR_BA[1]
200
R519
H5
P8
A2
L2
10K
M1_DDR_BA[0]
N2
A1
M1_DDR_VREFDQ
+3.3V_NORMAL
IC506
TPS51200DRCR
R546
10K 1%
[EP]
L501
UBW2012-121F
M1_DDR_DQ18
R549
10K
1%
M1_DDR_DQ19
M1_DDR_DQ20
C510
1000pF
REFIN
1
M1_DDR_DQ21
M1_DDR_DQ22
VLDOIN
M1_DDR_DQ23
M1_DDR_DQ24
DDR_VTT
C511
22uF
10V
M1_DDR_DQ25
M1_DDR_DQ26
M1_DDR_DQ27
M1_DDR_DQ28
Place at the bottom side
VO
PGND
L500
UBW2012-121F
2
10
11
M1_DDR_A[0]
M1_DDR_A9
P3
A0
M8
H1
VREFDQ
THERMAL
N6
P7
DDR3
4Gbit
(x16)
DDR3 1.5V bypass Cap - Place these caps near Memory
M1_DDR_A0
N3
VREFCA
A0
A1
A2
A3
DDR3 1.5V bypass Cap - Place these caps near Memory
P7
P3
N2
9
3
8
4
7
5
6
VIN
PGOOD
C515
4700pF
GND
DDR_VTT
EN
M1_DDR_DQ29
VOSNS
M1_DDR_DQ30
M1_DDR_DQ31
C503
22uF
10V
C506
22uF
10V
C507
22uF
10V
REFOUT
C519
0.47uF
6.3V
C514
0.1uF
C520
0.47uF
6.3V
C521
0.47uF
6.3V
C522
0.47uF
6.3V
Close to REFOUT pin
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
BSD-14Y-UD-005-HD
2013-12-17
MAIN DDR
LGE Internal Use Only
+5V_CI_ON
C703
4.7uF
10V
CI
CI_DATA[0-7]
CI_UB85/95
JK700
10125901-015LF
CI_TS_DATA[3]
100
CI
CI_DATA[5]
4
39
5
CI_DATA[6]
40
6
41
7
CI_DATA[7]
CI R721
42
8
43
9
CI_IN_TS_DATA[0-7]
R709
10K
CI
CI_ADDR[11]
CI_ADDR[9]
12
13
48
14
CI_IN_TS_DATA[2]
49
15
CI_IN_TS_DATA[3]
50
16
51
17
52
18
53
19
54
20
CI_IN_TS_DATA[6]
55
21
CI_IN_TS_DATA[7]
56
22
57
23
58
24
33 CI
33 CI
/PCM_REG
CI_TS_VAL
CI_TS_SYNC
CI_TS_DATA[0]
CI_TS_DATA[1]
CI_TS_DATA[2]
/CI_CD2
R717 CI 100
CI_ADDR[11]
+5V_CI_ON
CI_ADDR[8]
CI_ADDR[13]
R723
10K
CI
CI_ADDR[13]
CI_ADDR[14]
CI_ADDR[14]
0.1uF
CI
EB_DATA[0]
EB_DATA[1]
EB_DATA[2]
CI_DATA[3]
EB_DATA[3]
33
33
CI
AR713
EB_DATA[4]
CI_DATA[5]
/PCM_IRQA
CI
CI
AR712
CI_DATA[2]
CI_DATA[4]
/PCM_WE
C706
CI_DATA[0]
CI_DATA[1]
CI_ADDR[9]
CI_ADDR[8]
EB_DATA[5]
CI_DATA[6]
EB_DATA[6]
CI_DATA[7]
EB_DATA[7]
C707
0.1uF
16V
EB_DATA[0-7]
CI_DATA[0-7]
CI_ADDR[12]
CI_ADDR[7]
CI_ADDR[6]
CI_ADDR[5]
CI_ADDR[4]
59
25
60
26
61
27
62
28
63
29
64
30
65
31
CI_DATA[1]
66
32
CI_DATA[2]
67
33
CI_ADDR[3]
CI_ADDR[2]
CI_ADDR[1]
CI_ADDR[0]
CI_ADDR[12]
CI_ADDR[7]
CI_ADDR[6]
CI_ADDR[5]
CI_ADDR[4]
CI_ADDR[3]
CI_ADDR[2]
CI_ADDR[1]
CI_ADDR[0]
CI_DATA[0]
34
68
/PCM_CE2
/PCM_OE
11
46
CI_TS_CLK
CI_ADDR[10]
10
47
CI_IN_TS_DATA[4]
CI_ADDR[10]
44
CI_IN_TS_DATA[0]
CI_IN_TS_DATA[5]
33
45
CI_IN_TS_DATA[1]
+5V_CI_ON
/PCM_WAIT
CI_DATA[4]
38
/PCM_CE2
R702
CI_DATA[3]
3
CI_TS_DATA[6]
CI_TS_DATA[7]
/PCM_IORD
/PCM_IOWR
R701
1
2
37
CI_TS_DATA[5]
CI_TS_DATA[4]
PCM_RESET
/PCM_CE1
35
36
@netLa
R716
/CI_CD1
CI_DATA[0-7]
C702
0.1uF
CI
G2
69
G1
CI_IN_TS_VAL
CI_IN_TS_CLK
CI_IN_TS_SYNC
C705
12pF
50V
OPT
TPO_DATA[0-7]
CI
AR701
TPO_DATA[0]
33
CI_IN_TS_DATA[0]
TPO_DATA[1]
CI_IN_TS_DATA[1]
TPO_DATA[2]
CI_IN_TS_DATA[2]
TPO_DATA[3]
CI_IN_TS_DATA[3]
TPO_DATA[4]
CI_IN_TS_DATA[4]
TPO_DATA[5]
CI_IN_TS_DATA[5]
TPO_DATA[6]
CI_IN_TS_DATA[6]
TPO_DATA[7]
CI_IN_TS_DATA[7]
AR706 CI
33
33
TPO_CLK
CI
AR705
CI_IN_TS_CLK
TPO_SOP
CI_IN_TS_SYNC
CI_IN_TS_VAL
TPO_VAL
33
CI
AR707
33
CI
AR711
EB_ADDR[12]
EB_ADDR[3]
CI_ADDR[12]
CI_ADDR[0]
EB_ADDR[0]
CI_ADDR[13]
EB_ADDR[13]
CI_ADDR[2]
EB_ADDR[2]
CI_ADDR[14]
/PCM_REG
EB_ADDR[14]
CI_ADDR[3]
EB_ADDR[1]
CI_ADDR[1]
CI_ADDR[4]
33
CAM_REG_N
CI
AR708
EB_ADDR[4]
CI_ADDR[5]
EB_ADDR[5]
/PCM_OE
CI_ADDR[6]
EB_ADDR[6]
/PCM_WE
CI_ADDR[7]
EB_ADDR[7]
33
CI
AR710
JK700-*1
10125901-115LF
EB_OE_N
1
EB_WE_N
EB_BE_N1
/PCM_IORD
/PCM_IOWR
EB_BE_N0
+5V_NORMAL
CI_ADDR[8]
CI_ADDR[9]
CI_ADDR[11]
AR702
10K
10K
R705
R703
CI_ADDR[10]
/PCM_WAIT
EB_ADDR[8]
EB_ADDR[9]
EB_ADDR[10]
EB_ADDR[11]
CAM_WAIT_N
CAM_IREQ_N
/PCM_IRQA
/CI_CD2
/CI_CD1
33
CI
AR709
100
CAM_CD2_N
CAM_CD1_N
CI
C700
0.1uF
16V
CI
C701
0.1uF
16V
CI_UB98/D9
35
2
36
3
37
4
38
5
39
6
40
7
41
8
42
9
43
10
44
11
45
12
46
13
47
14
48
15
49
16
50
17
51
18
52
19
53
20
54
21
55
22
56
23
57
24
58
25
59
26
60
27
61
28
62
29
63
30
64
65
31
66
32
67
33
AR703 CI
68
34
G1
CI_TS_CLK
CI_TS_VAL
69
G2
TPI_CLK
100
CI_TS_SYNC
TPI_VAL
TPI_SOP
C704
12pF
50V
OPT
CI slot body (33mm)
for UB98 / D9
AR704 CI
CI_TS_DATA[7]
TPI_DATA[7]
TPI_DATA[6]
CI_TS_DATA[6]
CI_TS_DATA[5]
CI_TS_DATA[4]
100
TPI_DATA[5]
CI POWER ENABLE CONTROL
TPI_DATA[4]
IC700
AP2151WG-7
+5V_NORMAL
+5V_CI_ON
AR700 CI
CI_TS_DATA[3]
CI_TS_DATA[2]
CI_TS_DATA[1]
CI_TS_DATA[0]
IN
TPI_DATA[3]
TPI_DATA[2]
100
C709
0.1uF
50V
CI
TPI_DATA[1]
TPI_DATA[0]
1
CI
2
CI
R704
100
PCM_5V_CTL
5
OUT
EN
4
3
GND
FLG
C708
1uF
25V
CI
R706
10K
CI
R700
10K
CI
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
BSD-14Y-UD-007-HD
2013-12-17
PCMCIA
LGE Internal Use Only
RESET_IC_DIODES
IC2307-*1
Power_DET
APX803D29
RESET
2
3
VCC
1
GND
PD_20_24V_DIODES
+3.5V_ST
PD_+3.5V
R2330
0
5%
VDD
PD_20V
R2327-*1
5.6K
1%
PD_UHD_24V
R2328-*2
1.6K
1%
+2.5V
2
2
3
VCC
1
GND
POWER_DET
VOUT
GND
PD_20_24V
R2336
100K
C2365
0.1uF
16V
not to RESET
at 8kV ESD
C2362
0.1uF PWR_DET_SEPARATE
16V
PD_20_24V_ROHM
IC2308
PD_24V
R2327
8.2K
1%
BD48K28G
VDD
PD_20V
R2328-*1
1.3K
1%
3
RESET
1
+24V
PD_UHD_24V
R2327-*2
9.1K
1%
APX803D29
BD48K28G
C2355
0.1uF
16V
PD_+12V
R2326
1.2K
1%
IC2308-*1
R2338
10K
OPT
RESET_IC_ROHM
IC2307
R2315
0
PD_+12V
R2325
2.7K
1%
+3.5V_ST
R2337
100K
PWR_DET_MERGE
+12V
PD_24V
R2328
1.5K
1%
3
2
R2316
0
VOUT
C2356
0.1uF
16V
PD_20_24V
POWER_DET_1
PWR_DET_SEPARATE
1
GND
24V-->3.48V
20V-->3.51V
12V-->3.58V
ST_3.5V-->3.5V
+12V
T2 : Max 1.7A
else : Max 0.7A
Main +1.5V
+1.5V_DDR
L2301
ADJ
3
2A
4
UB95/95/UC97_H13_DDR_Voltage
R2303 R2305
5
NC
C2342
10uF
10V
B
EAN61387601
1.5K
R2342
R1
18K
1%
4.3K
1%
9
7
3
6
4
5
VIN
VBST
C2315-*1
3300pF
50V
UB98/UC9_H13_DDR_Voltage
R2305-*1
Vout=0.6*(1+R1/R2)
4.99K
1%
FB
1
8
2
3
7
6
SS
VIN
SW
BOOT
SW
GND
16V
0.1uF
C2318
L2308
2.2uH
NR5040T2R2N
SS
1.0V_DCDC_TI
Q2303
2SC3052
EN
VREG
C2303
100pF
50V
C2337
1uF
E
22
R2333 LD2300
2
THERMAL
1.2K
VOUT
+5V_NORMAL
8
1
POWER_ON/OFF2_3
R2313
10K
VCTRL
C
C2300
22uF
10V
+3.5V_ST
C2305
0.1uF
16V
R2346
11K
R2341
10K
VFB
[EP]FIN
VREG5
6
VIN
C2327
0.1uF
16V
EN
IC2303
BD9D320EFJ
R1
OPT
L2302
BLM18PG121SN1D
DCDC_ROHM
9
EN
+3.3V_NORMAL
GND
7
IC2303-*1
TPS54327DDAR [EP]GND
C2360
0.1uF
ZD2302
5V
3.3V_EMMC
DCDC_TI
C2302
10uF
16V
R2
THERMAL
PG
2
+3.3V_NORMAL
9
+3.3V_NORMAL
8
THERMAL
eMMC POWER
1
R2322
C2341
0.1uF
BLM18PG121SN1D
[EP]
10K
3.9K
R2312
POWER_ON/OFF2_2
+2.5V_Normal
R2321
IC2302
AP2132MP-2.5TRG1
4
3A
R2307
22K
1%
R2
C2313
1uF
10V
5
GND
C2320
22uF
10V
C2321
22uF
10V
ZD2303
2.5V
OPT
C2315
2200pF
50V
1.0V_DCDC_ROHM
Vout=0.765*(1+R1/R2)=1.516V
+12V
LG1154A
4
5
R2356
POWER_ON/OFF2_4
16V
0.1uF
GND
R2355
2K
C2369
0.1uF
16V
+1.2V_VDD
Vout=0.765*(1+R1/R2)
C2372
1/16W
5%
ZD2304
2.5V
OPT
L2321
1uH
C2361
22uF
C2353
22uF
C2366
22uF
C2371
470pF
50V
THERMAL
29
IC2309
TPS53513RVER
GND
21
MODE
VBST
4
20
VREG
NC_1
5
19
VDD
SW_1
6
18
NC_2
SW_2
7
17
VIN_3
SW_3
8
16
VIN_2
SW_4
9
15
VIN_1
8A
1/16W
1%
R2363
5.1K
1/16W
1%
20K
R2365
FB
22
1%
1/16W
23
1/16W
1%
TRIP
NC_3
GND1
GND2
VO
24
3
25
EN
26
2
27
28
[EP]
91K
R2361
27K
R2360
1K
SW
1
+12V
L2322
C2374
1uF
10V
C2375
10uF
16V
C2376
10uF
16V
14
6
RF
PGOOD
R2
PGND_5
7
3
VBST
13
SS
2
VIN
PGND_4
VREG5
8
12
C2312
2200pF
50V
1.0V_DCDC_ROHM
VFB
PGND_3
R2
C2310
1uF
10V
C2348
22uF
10V
11
1%
C2340
22uF
10V
PGND_2
33K
3A
5
1
10
R2306
4
1%
1/16W
ZD2300
2.5V
OPT
DCDC_TI
IC2300-*1
TPS54327DDAR [EP]GND
1/16W
5%
PGND_1
1.0V_DCDC_TI
GND
1%
1/16W
SW
EN
SS
R2358
4.7
6
C2370
1000pF
50V
NR5040T2R2N
L2307
2.2uH
1/10W
5%
3
BOOT
30V
VREG
11K
C2308
100pF
50V
7
16V
0.1uF
C2314
R2357
3.3
2
R2302
VIN
R1
R2362
39K
9
FB
8
[EP]FIN
THERMAL
1%
R1
1
9
EN
THERMAL
R2304
10K
POWER_ON/OFF2_3
C2312-*1
3300pF
50V
R2359
10K
DCDC_ROHM
IC2300
BD9D320EFJ
D2301
C2359
0.1uF
C2301
10uF
16V
R2368
100
+1.2V_CORE
+1.0V_VDD
BLM18PG121SN1D
R2364
4.87K
+1.0V_VDD
L2300
C2373
2200pF
50V
Vout=0.6*(1+R1/R2)
POWER UP SEQUENCE
5V/3.3V->2.5V->1.5V/1.1V->1.0V
LG1154D
: 3.3V->2.5V->1.5V->1.1V
LG1154AN : 3.3V->2.5V->1.0V
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
BSD-14Y-UD-023-HD
2013-12-17
POWER
LGE Internal Use Only
3
19
LX_1
PGND_2
5
17
SW_IN2
PGND_3
6
16
SW_IN1
V7V
7
15
NFAULT1
IC2304
BST
18
SN1302001(TPS65286RHDR)
14
13
/USB_OCD2
NFAULT2
USB_CTL3
USB_CTL2
SW_EN1
12
11
SW_EN2
+5V_USB_3
10
SW_OUT1
+5V_USB_2
SW_OUT2
POWER_ON/OFF1
9
EN
R2345
10K
C2335
0.0068uF
50V
MODE/SYNC
R2343
0
8
6A
R2350
0
C2350
10uF
1%
1/16W
C2346
0.047uF
25V
+5V_NORMAL
C2349
1uF
10V
/USB_OCD3
4
L2311
4.7uH
C2358
22uF
10V
51K
R2353
LX_2
1/16W
LX_3
20
5%
100K
R2351
21
5%
100K
VIN_3
C2329
0.1uF
50V PGND_1
THERMAL
29
1%
1/16W
2
R2354
1/16W
SS
1
C2351
22uF
10V
R1
82pF
50V
VIN_2
6.8K
R2352
R2
C2344
0.047uF
25V
C2347
22
FB
23
COMP
24
1%
R2348150K 1%
R2347 16K
OPT
C2343
100pF
50V
R2349
10K
25
AGND
RLIM
26
27
[EP]
C2338
2200pF
50V
VIN_1
5%
1/16W
C2311
10uF
35V
25V
1uF
C2324
C2309
10uF
35V
OPT
28
L2310
120-ohm
RSET2
+24V
RSET1
R2344 16K 1%
+5.0V normal & USB for UB model
Vout=0.6*(1+R1/R2)=5.1V
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
+12V
MMBT3906(NXP)
PANEL_POWER
L2313
PANEL_VCC
C2317
10uF
25V
OPT
+3.3V_NORMAL
3
2
L2314
MLB-201209-0120P-N2
C2322
0.1uF
25V
C2330
0.01uF
50V
Q2302
AO4423
S1
P13002
SMAW200-H24S5
R2310
1K
C2331
10uF
25V
R2318
10K
C2307
0.1uF
16V
1
2
INV CTL
PDIM#1
3
4
PDIM#2
3.5V
5
6
GND
3.5V
7
8
3.5V
GND
+12V
UBW2012-121F
12V
12V
12V
C2306
0.1uF
50V
L2303
UBW2012-121F
10
GND
11
12
12V
13
14
12V
15
16
GND
9
GND
17
18
24V
24V
19
20
24V
21
22
24V
23
24
GND
24V
GND
R2309
100
INV_CTL
C2333
10uF
25V
S2
S3
G
1
AO4423
8
2
7
3
6
4
5
D4
D3
D2
D1
R2329
2K
OPT
R2332
2K
OPT
PWM_DIM2
C2336
10uF
25V
OPT
C2339
0.1uF
25V
R2324
1.8K
R2317
10K
L2306
UBW2012-121F
L2315
UBW2012-121F
+24V
PANEL_CTL
C2316
0.1uF
50V
OPT
PWM_DIM
PWR ON
R2314
0
+3.5V_ST
L2304
UBW2012-121F
TYP 6000mA
MLB-201209-0120P-N2
Q2300
R2300
10K
RL_ON
1
10K
R2301
+3.5V_ST
C2334
10uF
25V
C
B
Q2301
2SC3052
E
OPT
Q2302-*1
AO4447A
S_1
S_2
S_3
G
1
AO4447
8
2
7
3
6
4
5
D_4
D_3
D_2
D_1
L2312
25
+12V
C2352
10uF
16V
C2354
10uF
16V
C2357
10uF
16V
’14 UHD POWER
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Renesas MICOM
For Debug
8pF
1
32.768KHz
2
MICOM_DEBUG
HDMI_WAUP:HDMI_INIT
R3020
LOGO_LIGHT
MICOM_DEBUG
X3000
LOGO_LIGHT
C3003
MICOM_RESET
C3002
Don’t remove R3014,
not making float P40
8pF
CAM_PWR_ON_CMD
R3013 1K
P3000
12507WS-04L
R3010 10K
MICOM_DEBUG
MICOM_DEBUG
+3.5V_ST
+3.5V_ST
3
4
MHL_DET
MICOM_RESET
4.7M
OPT
TP3009
10K
5
P120/ANI19
37
MICOM_RESET_SW
SW3000
JTP-1127WEM
270K
OPT
R3023
R3022
P41/TI07/TO07
41
P40/TOOL0
P124/XT2/EXCLKS
42
38
P123/XT1
43
+3.5V_ST
39
P137/INTP0
44
MICOM_RESET_22OHM
R3021
22
P122/X2/EXCLK
45
C3001
C3000
0.1uF
C3004
0.1uF
16V
RESET
P121/X1
46
CAM_PWR_ON_CMD
REGC
47
0.47uF
VSS
48
+3.5V_ST
40
POWER_DET_1
10K
GND
VDD
R3019
MHL_DET
2
1
4
3
CAM_RESET
CAM_RESET
MICOM_RESET_33OHM
R3021-*1 33
R3018
10K
GP4 High/MID Power SEQUENCE
P60/SCLA0
1
36
P140/PCLBUZ0/INTP6
P61/SDAA0
2
35
P00/TI00/TXD1
P62
3
34
P01/TO00/RXD1
33
P130
IC3000
32
P20/ANI0/AVREFP
R5F100GEAFB
31
P21/ANI1/AVREFM
30
P22/ANI2
29
P23/ANI3
I2C_SCL_MICOM
POWER_ON/OFF!
I2C_SDA_MICOM
MODEL1_OPT_4
P63
PANEL_CTL
5
P75/KR5/INTP9/SCK01/SCL01
6
WOL/WIFI_POWER_ON
8
P72/KR2/SO21
9
28
P24/ANI4
P22/ANI2
MICOM_LEAD_Cu
12
25
P27/ANI7
P147/ANI18
P146
P10/SCK00/SCL00
P12/SO00/TXD0/TOOLTXD
P11/SI00/RXD0/TOOLRXD/SDA00
1
P13/TXD2/SO20
1
1
P14/RXD2/SI20/SDA20
0
P15/PCLBUZ1/SCK20/SCL20
H13/H14 UHD LCD
H13/H14 UHD OLED
P16/TI01/TO01/INTP5
13
0
P17/TI02/TO02
0
1
P51/INTP2/SO11
0
M14 FHD OLED
P50/INTP1/SI11/SDA11
MODEL_OPT_1 MODEL_OPT_3
M14 FHD LCD
24
P26/ANI6
P30/INTP3/RTC1HZ/SCK11/SCL11
23
26
22
11
21
P25/ANI5
P70/KR0/SCK21/SCL21
20
27
19
10
18
P71/KR1/SI21/SDA21
17
P24/ANI4
MODEL1_OPT_3
16
P23/ANI3
28
15
29
9
14
8
P72/KR2/SO21
P146
P10/SCK00/SCL00
24
P147/ANI18
CAM_CTL
30
CAM_CTL
7
EDID_WP
P21/ANI1/AVREFM
P74/KR4/INTP8/SI01/SDA01
AMP_MUTE
31
MODEL1_OPT_2
MODEL1_OPT_1
For CEC
EDID_WP
R5F100GEAFB#30
SOC_RX
6
P11/SI00/RXD0/TOOLRXD/SDA00
P120/ANI19
37
P20/ANI0/AVREFP
P75/KR5/INTP9/SCK01/SCL01
P13/TXD2/SO20
P41/TI07/TO07
38
32
P12/SO00/TXD0/TOOLTXD
P40/TOOL0
39
5
SOC_TX
RESET
40
P130
P31/TI03/TO03/INTP4
IC3000-*1
33
INV_CTL
P124/XT2/EXCLKS
41
4
P14/RXD2/SI20/SDA20
P123/XT1
P01/TO00/RXD1
P63
P15/PCLBUZ1/SCK20/SCL20
P137/INTP0
P00/TI00/TXD1
34
MODEL1_OPT_2
MICOM_NON_LOGO_LIGHT
R3012
10K
MICOM_LCD/UHD
R3007
10K
MICOM_NON_EPI
R3005
10K
MICOM_M14
R3003
10K
P140/PCLBUZ0/INTP6
35
3
P73/KR3/SO01
MODEL1_OPT_4
MICOM_NON_GED
R3001
10K
36
2
P62
SIDE_HP_MUTE
C3005
0.1uF
MODEL1_OPT_1
1
P61/SDAA0
SOC_RESET
GED
NON_GED
P60/SCLA0
LED_R
MODEL_OPT_4
P122/X2/EXCLK
H13 / H14
42
EPI
M14
P121/X1
NON_EPI
43
MODEL_OPT_2
MODEL_OPT_3
REGC
Need to Assign ADC port
44
OLED
VSS
LCD / UHD
45
MODEL_OPT_1
VDD
For LOGO LIGHT
46
LOGO
47
NON LOGO
WOL_CTL
MODEL1_OPT_0
MODEL_OPT_0
48
MICOM_OLED_FRC
R3006-*2
22K
MICOM_OLED_MAIN
R3006-*1
56K
MICOM_LOGO_LIGHT
R3011
10K
MICOM_OLED
R3006
10K
MICOM_EPI
R3004
10K
MICOM_GED
R3000
10K
MICOM_H13/H14
R3002
10K
1
0
+3.5V_ST
LED_R
MICOM MODEL OPTION
P16/TI01/TO01/INTP5
MICOM MODEL OPTION
POWER_ON/OFF1
13
P50/INTP1/SI11/SDA11
+3.5V_ST
23
P27/ANI7
22
25
21
12
20
P30/INTP3/RTC1HZ/SCK11/SCL11
CAM_SLEEP
AR3000
3.3K
EYE_Q_10P
TP3002
19
P26/ANI6
18
P25/ANI5
26
17
27
11
16
10
15
P71/KR1/SI21/SDA21
EYE_SCL
CAM_SLEEP
MODEL1_OPT_3
MODEL1_OPT_0
P70/KR0/SCK21/SCL21
EYE_SDA
SOC_RESET
KEY2
KEY1
7
MICOM_LEAD_Au
SCART_MUTE
POWER_ON/OFF2_4
POWER_ON/OFF2_1
P73/KR3/SO01
POWER_ON/OFF2_3
POWER_ON/OFF2_4
SCART_MUTE
POWER_ON/OFF2_4
P74/KR4/INTP8/SI01/SDA01
HDMI_CEC
14
POWER_ON/OFF2_3
POWER_ON/OFF2_2
P17/TI02/TO02
IR
P51/INTP2/SO11
POWER_ON/OFF2_2
4
P31/TI03/TO03/INTP4
POWER_DET
PANEL_CTL
WOL/ETH_POWER_ON
POWER_ON/OFF2_1
RL_ON
+3.5V_ST
R3025
120K
G
R3024
27K
D3000
BAT54_SUZHO
HDMI_CEC
S
D
CEC_REMOTE
Q3000
RUE003N02
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
BSD-14Y-UD-030-HD
2014.03.11
MICOM
30
LGE Internal Use Only
5V_HDMI_1
MN864778_RESET
I2C_SCL5
I2C_SDA5
10K
R3243
10K
R3244
0
0
R3258
19
90
P1RX0M
P0TX1P
20
89
AVDD11_9
AVDD11_3
21
88
P1RXCP
P0TX1M
22
87
P1RXCM
23
86
AVDD33_4
24
85
NC[ANA_MON1]
P0TX0M
25
84
CEC0
P0TXCP
26
83
CEC2
AVDD11_4
CEC3
81
CEC4
29
80
RX0SCL
R3263
VDD33_1
R1XCN
R1XCP
R1X0N
R1X0P
R1X1N
R1X1P
R1X2N
R1X2P
RSVD_9
RSVD_10
RSVD_11
RSVD_12
RSVD_13
AVDD10_2
58
59
60
61
62
63
64
65
66
67
68
69
38
37
36
DSCL1
35
DSDA1
34
RSVDL_5
33
RSVDL_4
32
RSVDH_4
31
RSVDH_3
30
RSVDL_3
29
RSVDL_2
28
RSVDH_2
27
RSVDH_1
CK-_HDMI1
CK+_HDMI1
D2+_HDMI1
D1+_HDMI1
76
TPVDD10
T0XC-
T0X0-
T0XC+
77
78
17
59
RSVD_4
4.7K R3288
RSVDNC_2
18
58
RSVD_3
4.7K R3290
RSVDNC_3
19
57
RSVDNC_24
RSVDNC_4
20
56
RSVD_2
RSVDNC_5
21
55
RSVD_1
4.7K R3291
RSVDNC_6
22
54
CSDA
4.7K R3292
RSVDNC_7
23
53
CSCL
+5V_NORMAL
50
VCC33_OUT
49
48
47
DSCL0
R0PWR5V
CBUS_HPD0
DDC_SCL_1_R9531
R3252
10K
MMBD6100
D3210
C3274
0.1uF
16V
PWRMUX_OUT
C3277
0.1uF
16V
R3254
10
C3275
1uF
AVDD33_R9531
C3273
10uF
10V
C3276
10uF
10V
HDMI_HPD_1
46
44
45
INT
DSDA0
CI2CA_TPWR
10K
4.7K
R3282
DVDD10_R9531 AVDD33_R9531
R3283
CVDD10_R9531
DDC_SDA_1_R9531
43
RESET_N
RSVDNC_23
RSVDNC_22
RSVDNC_21
RSVDNC_20
42
SBVCC5V
41
51
40
25
39
RSVDNC_9
38
52
PWRMUX_OUT
DDC_SCL_1
I2C_SCL2
24
RSVDL_2
Q3202
SI1012CR-T1-GE3
DDC_SDA_1
I2C_SDA2
RSVDNC_8
A2
A1
79
T0X0+
T0X1-
TDVDD10
80
81
82
83
T0X1+
T0X284
RSVDNC_1
G
A2
A1
A2
A1
D2-_HDMI1
D1-_HDMI1
D0+_HDMI1
D0-_HDMI1
85
T0X2+
CVDD10_3
86
87
ARCRX_TX
RSVDNC_28
88
RSVDNC_29
89
RSVDNC_30
90
RSVDNC_31
91
92
RSVDNC_32
RSVD_5
AVDD33_R9531
5
RSVD_14
RSVDNC_25
60
C
TMDS_DATA0-
8
OPT
70
RSVD_6
61
16
+5V_NORMAL
MMBD6100
D3209
MMBD6100
D3219
MMBD6100
D3208
C
4
26
62
15
AVDD33_1
D
+3.5V_ST
5V_HDMI_4
C
TMDS_CLK+
DSCL4[VGA]
14
AVDD10_1
5.1
RSVDNC_10
+5V_NORMAL
5V_HDMI_3
A2
MMBD6100
D3218
CK+_HDMI4_JACK
3
A1
CK-_HDMI4_JACK
TMDS_CLK_SHIELD
RSVDNC_33
CVDD10_1
R3299
C3232
+5V_NORMAL
C
9
RSVD_15
63
26
0.1uF
C3231 0.33uF
C3230 0.33uF
4.7uF
C3261 0.33uF
C3260
0.1uF
0.1uF
C3225
C3223
C3221
10
2
71
4.7K R3287
13
D
1
25
0
RSVD_7
OPT
VA3212
ESD_HDMI
TMDS_CLK-
SDI_GPIO11
0
R3913
4.7K R3286
12
R0X2+
+3.3V_NORMAL
5V_HDMI_2
A2
CEC_REMOTE
CEC
SS_GPIO8
[EP]
R3912
RSVD_8
R0X2-
S
A1
RESERVED
99
RSVDNC_26
64
11
5.1
R3277 5.1
DDC pull-up
+5V_NORMAL
5V_HDMI_1
VA3215 D3200
ESD_HDMI
IP4294CZ10-TBR
5V_HDMI_1
R3253
5.1K
7
D0-_HDMI4_JACK
TMDS_DATA0+
DDC_SDA_1_R9531
TMDS_DATA1-
1
10
2
9
3
8
TMDS_DATA1+
TMDS_DATA2-
4
OPT
DDC_SCL_2
DDC_SCL_3
IC3204
AP2132MP-2.5TRG1
DDC_SDA_MHL
1
R3279
6
D2+_HDMI4_JACK
PG
10K
05008WR-H19C.
2
C3243
0.1uF
E MMBT3906(NXP)
Q3206
R3262
10K
C
R3260
1K
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
1/16W
5%
B
MHL_DET
C3240
0.1uF
16V
MMBT3904(NXP) E
EN
L3215
BLM18PG121SN1D
C3279
10uF
10V
C3284
0.1uF
16V
C3289
0.1uF
16V
C3292
10uF
10V
C3294
10uF
10V
R2
C3298
0.1uF
16V
C3299
0.1uF
16V
C3271
0.1uF
16V
SPI FLASH (2MBit)
+3.3V_NORMAL
GND
ADJ
APLL10_R9531
R1
L3213
BLM18PG121SN1D
L3207
BLM18PG121SN1D
IC3203
W25X20CLSNIG
XTAL_VCC33_R9531
C3239
0.1uF
6
VOUT
4
+5V_NORMAL
C3246
10uF
10V
[EP]
7
VIN
2A
C3244
10uF
10V
5
C3290
10uF
10V
C3282
0.1uF
16V
NC
VCTRL
Q3205
R3232
180K
C3234
0.1uF
16V
OPT
R3259
120K
HDMI4 with MHL
C
AVDD33_R9531
HDMI_3.3V
CVDD10_R9531
L3210
BLM18PG121SN1D
+1.0V_R9531
8
3
B
JK3202
else : Max 0.7A
DDC_SCL_MHL
+3.5V_ST
D2-_HDMI4_JACK
5
TMDS_DATA2+
DDC_SCL_1_R9531
D1+_HDMI4_JACK
7
TMDS_DATA2_SHIELD
DDC_SDA_3
+3.3V_NORMAL
D1-_HDMI4_JACK
TMDS_DATA1_SHIELD
DDC_SDA_2
+1.0V_R9531
R9531 +1.0V
EAN61387601
(CD_SENCE)
C3293
0.1uF
16V
CS
SPI_CS_R9531
R3275
33 DO[IO1]
SPI_DO_R9531
C3262
10uF
10V
ZD3202
2.5V
OPT
1
8
2
7
3
6
4
5
VCC
HOLD
R3278
10K
D0+_HDMI4_JACK
D3201
IP4294CZ10-TBR
1.8K
6
TMDS_DATA0_SHIELD
R3280
1
65
R0X1+
R3276
DDC_SCL_MHL
SCL
1.2K
2
1.8K R3296
DDC_SDA_MHL
SDA
R3281
3
DDC/CEC_GND
9
4
1.8K R3293
RSVDNC_27
IC3202
R9531AN
+5V_NORMAL
R3285
10
R9531_RESET
THERMAL
5
TX_DSDA0
66
9
APLL10_R9531
4.7K R3284
R0X1-
G
6
67
8
R0X0+
RSVDNC_19
4.7uF
S
7
68
TX_DSCL0 4.7K
5.1
C3235
10uF
10V
AR3203
47K
1/16W
8
AR3206
33
1/16W
VDD[+5V]
AR3202
47K
1/16W
9
TX_HPD0
R9531_XTAL_IN
R9531_XTAL_OUT
XTAL_VCC33_R9531
R3274 5.1
AO3438
Q3204
C3269
22uF
10V
C3268
100uF
6.3V
AR3200
47K
1/16W
10
HOT_PLUG_DETECT
5V_HDMI_4
R3221
0
C
11
RSVD_9
69
R3264 5.1
P_PVDD33
AR3201
47K
1/16W
12
APLL10
70
7
R3273
HDMI_3.3V
R3261
10K
13
0.33uF
VA3200
ADLC 5S 02 015
VA3211
ADLC 5S 02 015 OPT
HDMI_HPD_4_MHL
20
14
71
6
R0XC+
R0X0-
HDMI_3.3V
L3204
BLM18PG121SN1D
BODY_SHIELD
15
5
R0XC5.1
R3208
10K
C3205
D2+_HDMI3
P_AVDDH33
16
RSVDL_1
37
+5V_NORMAL
HDMI3
HDMI_3.3V
17
XTALVCC33
AVDD33_R9531
+3.3V_NORMAL
OPT
9
18
XTALOUT
CVDD10_R9531
0.33uF
5
JK3201
19
XTALIN
R3257 5.1
DVDD10_R9531
3.3V Power Separation
C3265
6
4
R3214
0
C3258
3
D2-_HDMI3
05008WR-H19C.
R9531_XTAL_OUT
C3270
18pF
50V
72
RSVDNC_18
L3201
BLM18PG121SN1D
D1+_HDMI3
0.33uF
7
0.33uF
2
TMDS_DATA2+
X-TAL_2
4
GPIO6
36
D2+_HDMI1_R9531
D1-_HDMI3
TMDS_DATA2_SHIELD
D2-_HDMI1_R9531
P_AVDD33
C3217
TMDS_DATA2-
HDMI_3.3V
P_VDD33
3
XTALGND
THERMAL
101
RSVDNC_17
D1+_HDMI1_R9531
HDMI_3.3V
4
2
GND_1
C3267
18pF
50V
DVDD10_R9531
73
3
35
OPT
9
GND_2
1
74
2
RSVDNC_16
D1-_HDMI1_R9531
D3207
RCLAMP0544T.TCT
6.5VTO11.0V
1
8
X-TAL_1
R9531_XTAL_IN
75
1
GPIO5
SD0_IN_SPDIF0_IN
34
D0-_HDMI1_R9531
D0+_HDMI1_R9531
D0+_HDMI3
TMDS_DATA1_SHIELD
TMDS_DATA1+
CVDD10_R9531
AVDD33_R9531
X3201
27MHz
DVDD10_R9531
SPI_DO_R9531
AVDD33_2
D2-_HDMI2
CK-_HDMI1_R9531
100
R3204
33
SCLK_GPIO9
SPI_CK_R9531
R3242
47K
R3239
47K
D2+_HDMI2
D1+_HDMI2
D1-_HDMI2
D0+_HDMI2
D0-_HDMI2
CK+_HDMI2
D2+_HDMI1
CK-_HDMI2
D2-_HDMI1
D1+_HDMI1
D1-_HDMI1
D0+_HDMI1
D0-_HDMI1
CK+_HDMI1
CK-_HDMI1
4.7uF
1000pF
1000pF
1000pF
1000pF
1000pF
1000pF
1000pF
OPT
C3259
CK+_HDMI3
D0-_HDMI3
OPT
C3252
5
OPT
C3251
6
4
TMDS_DATA1-
SPI_CS_R9531
AR3208
33
27
Test2_ANA_MON2
R3237
47K
R3240
0
RSVDNC_11
1000pF
OPT
C3256
OPT
1000pF
1000pF
1000pF
OPT
C3254
OPT
C3255
1000pF
1000pF
1000pF
OPT
C3253
OPT
C3227
1000pF
C3222
R3238
0
CK+_HDMI1_R9531
C3250
3
TMDS_DATA0+
C3263
4.7uF
10V
OPT
TMDS_DATA0_SHIELD
OPT
7
OPT
C3248
2
C3208
TMDS_DATA0-
OPT
C3229
CK-_HDMI3
C3215
1
D3206
RCLAMP0544T.TCT
6.5VTO11.0V
8
0.33uF
2
1
TMDS_CLK+
C3212
3
TMDS_CLK_SHIELD
4.7uF
5
4
TMDS_CLK-
C3216
6
R3236
0
L3203
BLM18PG121SN1D
L3200
BLM18PG121SN1D
OPT
C3228
7
R3231
10K
P_AVDD11
+1.1V_VDD_D14
Solder Preform
Attach at R9531 thermal pad
5V_HDMI_4
5V_HDMI_3
5V_HDMI_2
CEC
0.1uF
8
P_VDD11
0.1uF
9
+1.1V_VDD_D14
RSVD_16
R3297
120K
S3202
RAC33437501
P_VDD33
CEC_REMOTE
C3207
10
RESERVED
VA3213
ESD_HDMI
C3206
11
VA3210
ESD_HDMI
72
S3201
RAC33437501
S3204
RAC33437501
C3264
4.7uF
10V
DDC_SCL_3
SCL
1000pF
13
12
DDC_SDA_3
SDA
C3204
14
DDC/CEC_GND
0.33uF
15
AR3205
33
1/16W
VDD[+5V]
C3202
0.33uF
24
S3200
RAC33437501
L3205
BLM18PG121SN1D
C3272
22uF
10V
VDD33_2
DDC_SDA_1
P_AVDDH11
HDMI1
16
HOT_PLUG_DETECT
73
DDC_SCL_2
DDC_SCL_1
HDMI2
17
ESD_HDMI
VA3206
20
+1.1V_VDD_D14
23
DDC_SDA_3
DDC_SDA_2
P_PVDD33
+1.1V_VDD_D14
R3248
4.7K
HDMI_EXT_EDID
OPT
C3226
R3245
B 1K
OPT
C3224
C
Q3201
MMBT3904(NXP)
R3203
100K
E
BODY_SHIELD
R3220
4.7K
HDMI_INT_EDID
HDMI_HPD_3
74
DDC_SCL_3
S3203
RAC33437501
VA3202
ESD_HDMI
75
[EP]GND
AR3209
47K
1/16W
5V_HDMI_3
R3219
1K
76
+3.3V_NORMAL
RX0P5V
RX1P5V
VDD33_3
RX2P5V
NC[VDDQ]
VDD11_3
P2RX2P
P2RX2M
AVDDH33_2
P2RX1P
P2RX1M
P2RX0P
AVDD11_8
P2RX0M
AVDD11_7
P2RXCP
P2RXCM
P3RX2P
P3RX2M
P3RX1P
P3RX1M
AVDD11_6
P3RX0P
P3RX0M
AVDD11_5
P3RXCP
P3RXCM
PVDD33
AVDDH33_1
NC[ANA_MON2]
NTEST
TX0HPD
TX1HPD
HDMI2 with ARC
NIRQA1
D2+_HDMI2
OPT
9
NIRQA0
5
VDD33_2
4
JK3200
+5V_NORMAL
72
71
70
69
68
67
66
65
64
63
62
61
D1+_HDMI2
60
6
59
RX3SDA
7
3
58
73
VDD11_2
D1-_HDMI2
2
TMDS_DATA2+
57
36
TMDS_DATA2TMDS_DATA2_SHIELD
56
RX3SCL
55
74
54
35
CH0ASD0
53
75
TMDS_DATA1+
52
34
RX2SDA
CH0ASD1
D3205
RCLAMP0544T.TCT
6.5VTO11.0V
1
8
51
RX2SCL
TMDS_DATA1_SHIELD
50
76
49
RX1SDA
33
48
77
CH0ASD2
47
RX1SCL
32
TMDS_DATA1-
46
RX0SDA
78
45
79
31
44
30
CH0ASD3
43
CH0ABCLK
CH0ALRCLK
D0+_HDMI2
R3250
5.1K
R3224 R3226 R3229 R3246
47K
47K
47K
47K
R3211 47K
R3212 5.1K
82
28
OPT
D
+5V_NORMAL
27
C3220
1uF
10V
+3.3V_NORMAL
R3223 47K
Test1_ANA_MON1
P0TXCM
HDMI_HPD_4_MHL
DDC_SCL_MHL
DDC_SDA_MHL
PWRMUX_OUT_SIL9617
P_AVDDH33
P0EXT_SWING
HDMI_0_CLK-
SIL9617_INT
+3.3V_NORMAL
93
HDMI_0_CLK+
R3251
10
S
Q3203
SI1012CR-T1-GE3
33
HDMI_0_RX0-
10
R3222 47K
G
AVDDH33_3
TMDS_DATA0+
9
CK+_HDMI3
CK-_HDMI3
P0TX0P
HDMI_0_RX0+
TMDS_DATA0_SHIELD
D0-_HDMI3
AVDD10_2
HDMI_0_RX1-
5V_HDMI_4
+5V_NORMAL
R3249
D0+_HDMI3
94
HDMI_0_RX1+
R1PWR5V
P0TX2M
D1-_HDMI3
R3217 5.1K
P1RX0P
CBUS_HPD1
AVDD11_10
91
R3216 5.1K
P1RX1M
92
18
D2+_HDMI3
D2-_HDMI3
D1+_HDMI3
PWRMUX_OUT_SIL9617
C3213
I2C_SCL2
10uF
I2C_SDA2
R3215 5.1K
93
17
CK-_HDMI4_MHL
R3213 47K
16
P0TX2P
AVDD33_3
CK+_HDMI4_MHL
DSDA4[VGA]
NC[ANA_MON3]
DSDA0
CD_SENSE
P1RX1P
DSCL0
39
MHL_DET
94
CBUS_HPD0
40
19
RESET_N
15
41
18
TXCN
CK-_HDMI4_MHL
22
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
P1EXT_SWING
17
TXCP
CK+_HDMI4_MHL
21
P1RX2M
14
TX0N
D0-_HDMI4_MHL
D0-_HDMI4_MHL
20
95
P1TXCM
D0+_HDMI4_MHL
INT
P1RX2P
R0PWR5V
RSVDL_1
P0RXCM
96
SBVCC5
42
32
ARC
P0RXCP
97
PWRMUX_OUT
43
16
RSVDNC_34
P_AVDD33
98
13
44
15
TX0P
CVDD10_2
OPT
C3201
0.1uF
16V
IC3200
MN864778P
12
14
TX1N
TPWR_CI2CA
11
P1TXCP
TX1P
D1+_HDMI4_MHL
R3210
4.7K
P1TX0M
AVDD11_11
D1-_HDMI4_MHL
RSVDNC_35
SPDIF_OUT_ARC
134
P0RX0M
99
AVDD11_2
D0-_HDMI2
5
P0RX0P
100
CSDA
95
10V
CK-_HDMI2
4
101
CSCL
45
31
C3200
1uF
CK+_HDMI2
TMDS_DATA0-
D1-_HDMI4_MHL
D0+_HDMI4_MHL
9
R3227
SPDIF_IN 10K
46
13
RSVDNC_15
6
AVDD11_12
8
47
12
TX2N
RSVDNC_36
7
3
P0RX1M
102
P1TX0P
11
TX2P
IOVCC33
2
TMDS_CLK+
103
7
P1TX1M
10
TAVDD10
96
TMDS_CLK_SHIELD
VA3208
ESD_HDMI
ARC
IC3206
SIL9617
D0+_HDMI4_JACK
D0-_HDMI4_JACK
5.1
CK+_HDMI4_JACK
CK-_HDMI4_JACK
VDD10_1
D2+_HDMI4_MHL
D2-_HDMI4_MHL
D1+_HDMI4_MHL
6
HDMI_0_RX2-
510
R3228
TMDS_CLK-
D3204
RCLAMP0544T.TCT
6.5VTO11.0V
1
8
CEC_REMOTE
CEC
OPT
R3207
3.9K
SCL
RESERVED
48
D2+_HDMI4_MHL
D2-_HDMI4_MHL
97
OPT
R3206
1K
SDA
VDD10_2
30
5V_HDMI_2
49
P1TX1P
Test3_ANA_MON3
DDC/CEC_GND
9
AVDD11_1
HDMI_0_RX2+
VA3214
ESD_HDMI
RSVD_8
29
VDD[+5V]
DDC_SDA_2
VA3209
ESD_HDMI
R3256
R0XCN
P0RX1P
HDMI_1_CLK-
DDC_SCL_2
HDMI_HPD_2
R3247
4.7K
HDMI_EXT_EDID
R3255 5.1
R0XCP
50
P0RX2M
HDMI_1_RX0-
HDMI TX port 0
R3233
B 1K
E
VA3201
ESD_HDMI
HOT_PLUG_DETECT
AR3204
33
1/16W
R3218
4.7K
HDMI_INT_EDID
R0X0N
51
104
10
D1-_HDMI4_JACK
52
105
AVDD33_2
RSVD_5
8
106
HDMI_1_CLK+
510
R3225
R3205
1K
05008WR-H19C.
18
TP3203
D2+_HDMI4_JACK
7
P_AVDDH11
D2-_HDMI2
19
10uF
10V
D2-_HDMI4_JACK
D1+_HDMI4_JACK
6
5
HDMI_1_RX1-
R0X0P
RSVD_7
4
HDMI_1_RX0+
53
RSVD_6
3
HDMI_1_RX1+
R0X1N
5
RSVDNC_14
6
R0X1P
54
RSVDNC_13
7
R0X2N
55
R3201
10K
OPT
R0X2P
56
AVDDH33_4
P1TX2M
HDMI_1_RX2-
77
CEC5
TX1ARCIN
TX0ARCIN
VDD33_4
NIRQ1
CEC1
HSCL0
HSDA0
RSVD_4
57
THERMAL
77
R3209
47K
SYSCLK/XI
NC/XO
RX3P5V
NRESET
VDD11_5
VSS
CH1ASD0
CH1ALRCLK
CH1ABCLK
LPSA1
LPSA0
NC_1
NC_2
NC_3
4
VDD11_4
AVDD33_1
HDMI_1_RX2+
D1+_HDMI1_R9531
42
1
3
RSVD_3
107
P0RX2P
41
2
2
RSVD_2
R3200
47K
8
THERMAL
145
40
3
1
RSVD_1
108
P1TX2P
39
4
2
38
6
5
1
VDD11_1
37
7
AVDD10_1
SPI_DI_R9531
9
3
D2+_HDMI1_R9531
C
8
C3211
0.1uF
16V
SDO_GPIO10
10
2
5
Q3200
MMBT3904(NXP)
R3202
100K
9
C3210
0.1uF
16V
98
TMDS_DATA2+
20
10
C3209
0.1uF
16V
28
1
D1-_HDMI1_R9531
BODY_SHIELD
11
10uF
10V
RSVDNC_12
TMDS_DATA2TMDS_DATA2_SHIELD
VA3205
ESD_HDMI
12
VDD33_1
TMDS_DATA1+
P_AVDD33
15
R3268
1.8K
R3230
D3203
IP4294CZ10-TBR
135
D0+_HDMI1_R9531
TMDS_DATA1TMDS_DATA1_SHIELD
136
6
137
5
TMDS_DATA0+
5V_HDMI_2
13
C3203
P_AVDDH33
D0-_HDMI1_R9531
HDMI1
14
NC_4
7
NC_5
8
OPT
NC_6
4
NC_7
3
TMDS_DATA0_SHIELD
NC_8
TMDS_DATA0-
JK3203
16
R3265
1.8K
R3266
1.8K
CK-_HDMI1_R9531
CK+_HDMI1_R9531
NC_9
9
NC_10
10
2
CH0AMCLK
1
TMDS_CLK+
VDD11_6
TMDS_CLK_SHIELD
NC_11
TMDS_CLK-
D2-_HDMI1_R9531
17
C3242
100K
20K
R3295
FAULT
4
30V
OPT
R3289
1%
ILIM
#MHL_OCP
D3202
IP4294CZ10-TBR
4
18
3
D3211
OUT
CEC_REMOTE
CEC
05008WR-H19C.
19
5
RESERVED
SIL9617_RESET
1
6
2
R3294
10K
3.3V_Sil9617
+1.0V_R9531
HDMI4
3
2
P_VDD33
HDMI3
4
1
#MHL_OCP
TX1SCL
138
6
5
MHL_DET
0
139
7
R3272
GND
EN
0
SCL
140
8
P_VDD11
ZD3200
5V
OPT
P_VDD33
SDA
TX1SCL
9
P_AVDD33
IN
C3249
0.1uF
16V
C3236
0.1uF
16V
C3219
22uF
10V
R3914
BLM31PG500SN1
50-ohm
IC3207
TPS2553DBV
5V_MHL
R3235
47K
C3218
0.1uF
16V
5V_HDMI_4
5V_MHL
L3208
BLM18PG121SN1D
L3202
BLM18PG121SN1D
TX1SDA
TX1SDA
10
0
141
11
R3270
R3271
VA3207
ESD_HDMI
VA3204
ESD_HDMI
0
Current Limit
+5V_NORMAL
R3234
0
TX0SCL
142
12
P_AVDD11
P_XIN
20pF
DDC/CEC_GND
TX1SDA
TX1SCL
R3269
TX0SDA
C3214
DDC_SDA_1_R9531
DDC_SCL_1_R9531
143
13
Test3_ANA_MON3
[EP]
14
Test2_ANA_MON2
X-TAL_2
TX0SCL
15
3
TX0SDA
16
VDD[+5V]
4
2
144
17
HOT_PLUG_DETECT
Test1_ANA_MON1
20pF
GND_2
1
GND_1
HDMI TX port 1
18
VA3203
ESD_HDMI
19
X3200
27MHz
X-TAL_1
R3241
2.2M
AR3207
33
1/16W
R3267
1.8K
P_XOUT
BODY_SHIELD
20
TX0SDA
TX0SCL
P_XIN
+5V_NORMAL
C3233
P_XOUT
VA3216
ESD_HDMI
HDMI_HPD_1
3.3V_Sil9617
HDMI_3.3V
5V_HDMI_1
R3298
33
C3281
0.1uF
WP
DVDD10_R9531
R9531_FLASH_WP
L3211
BLM18PG121SN1D
C3241
1uF
GND
C3257
10uF
10V
C3278
2.2uF
10V
C3280
0.1uF
16V
C3288
0.1uF
16V
C3245
0.1uF
16V
CLK
SPI_CK_R9531
DIO[IO0]
SPI_DI_R9531
C3266
0.1uF
16V
Vout=0.6*(1+R1/R2)
BSD-14Y-UD-032-HD
2013.12.17
HDMI
32
LGE Internal Use Only
JK3401
JSTIB15
R3400
33
VIN
A
VCC
B
GND
C
SPDIF_OUT
C3400
0.1uF
16V
VA3400
5.5V
1/10W
5%
HP_OUT
R3409
100
4
OPT
JK3403
PEJ038-3B61
+3.3V_NORMAL
GND
5
R3406
10K
HP_OUT
HP_DET
1/16W
5%
SHIELD
C3402
47pF
50V
R3404
150
HP_LOUT
Fiber Optic
+3.3V_NORMAL
SPDIF OUT
L
4
DETECT
3
R
1
R3405
150
HP_ROUT
ADUC 5S 02 0R5L
EAG61030015
1/10W
5%
COMPONENT 1 PHONE JACK
VA3405
5.6V
CVBS 1 PHONE JACK
+3.3V_NORMAL
OPT
+3.3V_NORMAL
C3401
18pF
R3402
10K
R3407
100
R3403
330K
R3408
100
COMP1_DET
AV1_CVBS_DET
1/16W
5%
VA3401
5.6V
VA3402
5.6V
JK3400
PEJ038-3B6111
JK3402
PEJ038-3B611
5
M5_GND
4
M4
3
1
6
M6
for audio Hum noise (L)
5
M5_GND
4
M4
M3_DETECT
3
M3_DETECT
M1
1
M1
6
M6
COMP1_Y
COMP1/AV1/DVI_L_IN
VA3403
5.6V
EAG61030017
1/16W
5%
C3403
0.1uF
16V
C3405
0.01uF
25V
EAG61030016
COMP1_Pb
COMP1/AV1/DVI_R_IN
VA3404
5.6V
C3404
0.01uF
25V
COMP1_Pr
AV1_CVBS_IN
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
BSD-14Y-UD-034-HD
JACK HIGH/MID
2013.12.17
LGE Internal Use Only
UB85/95/UC97 only
EMI Shield for H13D / URSA9
HDMI1_DDC_DA
H13D
HDMI1_DDC_CK
HUB_DP
[EP]GND
3.3K
R3505
42
14
HPD
D2-B
24
15
CEC
D3+B
23
16
SEL1
D3-B
22
17
SEL2
H13 DDR VDD Decap (For EMI)
4Layer
VDDC15_M0
VDDC15_D14
MGJ64103502
+1.5V_U_DDR
D14 DDR VDD Decap (For EMI)
4Layer
URSA9 DDR VDD Decap (For EMI)
4Layer
C3341
330pF
C3345
330pF
330pF
330pF
C3333
C3337
OPT
330pF
330pF
C3306
OPT
C3312
330pF
330pF
OPT
C3351
OPT
330pF
330pF
330pF
OPT
C3348
OPT
C3344
OPT
C3340
OPT
C3336
Function
CH A (HEVC decoder) enable
CH B (HDMI S/W) enable
330pF
SEL2(GPIO30)
Low
High
330pF
HDMI_MUX_SEL
C3331
HDMI_1_CLK-
330pF
HDMI_1_RX0HDMI_1_CLK+
+3.3V_NORMAL
C3311
SCL_A
SDA_A
SDA_B
SCL_B
41
40
39
25
C3305
R3319
10K
D2+B
330pF
21
18
CEC_A
HPD_A
CEC_B
HPD_B
HDMI_MUX_SEL
13
HDMI_1_RX1HDMI_1_RX0+
330pF
SEL2
26
D3-
C3353
SEL1
17
B1-B
C3352
CEC
16
22
HDMI_1_RX1+
HDMI_RX0-_URSA9_1_RP
330pF
15
23
D3-B
HDMI_CLK-_URSA9_1_RP
D3+
330pF
24
D3+B
D2-
12
C3349
D2-B
HDMI_0_CLK-
HDMI_0_RX0-
11
27
330pF
HDMI_0_CLK+
28
B1+B
C3346
HPD
HDMI_CLK+_URSA9_1_RP
D0-B
HDMI_1_RX2+
HDMI_1_RX2-
HDMI_RX1-_URSA9_1_RP
HDMI_RX0+_URSA9_1_RP
C3342
D3-
14
D2+
330pF
13
25
NC_1
10
330pF
26
D2+B
D1-
9
29
C3338
B1-B
HDMI_0_RX1-
8
30
D0+B
330pF
D3+
31
NC_2
EMI shield for URSA9_Non_Korea domestic
M2323-*1
MGJ63912902
USB_DM3
CAMERA_DM
RXASDA_URSA9
C3334
12
HDMI_CLK+_URSA9_0_RP
HDMI_CLK-_URSA9_0_RP
+3.3V_NORMAL
32
D3-A
EMI shield for H13D_Non_Korea domestic
M2322-*1
R4420
0
RXASCL_URSA9
C3313
27
19
D2-
20
11
HDMI OUTPUT to Splitter
10
28
HDMI_0_RX0+
HDMI1_TXCN
HDMI_RX1-_URSA9_0_RP
29
B1+B
HDMI1_TXCP
HDMI_RX1+_URSA9_0_RP
USB_DP3
33
33
330pF
HDMI_RX0+_URSA9_0_RP
HDMI_RX0-_URSA9_0_RP
CAMERA_DP
330pF
NC_1
HDMI_RX2-_URSA9_1_RP
HDMI_RX1+_URSA9_1_RP
OPT
R3508
10K
C3303
D1-
9
HDMI_RX2+_URSA9_1_RP
D3+A
R4421
0
C3309
D1+
8
30
OPT
R3504
OPT
R3506
10K
7
31
HDMI1_TX0N
HDMI OUTPUT_0 DDC to URSA9
43
32
D0-B
HDMI_0_RX1+
33
HDMI1_TX0P
HDMI_RX2+_URSA9_0_RP
HDMI_RX2-_URSA9_0_RP
HDMI_0_RX2-
7
D1+
34
D2-A
D0-
HDMI_0_RX2+
D0-
D2+A
D0+
6
D2+
D0+
6
HDMI1_TX1N
SDA
5
D0+B
5
RXBSDA_URSA9
4
OPT
R3507
10K
R3509
NC_2
SDA
MGJ64103501
MGJ63912901
HDMI OUTPUT_1 DDC to URSA9
18
D3-A
SCL
4
35
CEC_A
D3+A
HDMI0_TXCN
EN
3
36
D1-A
19
33
2
37
D1+A
HDMI1_TX1P
HDMI1_TX2P
20
34
D2-A
43
35
D2+A
1
D0-A
HDMI1_TX2N
RXBSCL_URSA9
33
33
VCC
USB_DM2
+3.3V_NORMAL
HDMI OUTPUT to URSA9_1
D1-A
HDMI0_TX0N
HDMI0_TXCP
OPT
R3500
OPT
R3501
38
21
SCL
HUB_DM
C3503
10uF
10V
EMI shield for URSA9_Korea domestic
M2323
EMI shield for H13D_Korea domestic
M2322
R4418
0
C3502
0.1uF
16V
D0+A
HPD_A
EN
3
OPT
R3503
10K
CEC_B
SCL_A
42
VCC
2
36
IC3501
TS3DV642A0RUAR
HPD_B
SDA_A
41
1
37
D1+A
HDMI0_TX1N
HDMI0_TX0P
3.3K
R3318
SCL_B
40
38
D0-A
C3314
22uF
10V
+3.3V_NORMAL
OPT
R3502
10K
USB_DP2
+3.3V_MUX
THERMAL
D0+A
THERMAL
HDMI0_TX2P
HDMI0_TX2N
[EP]GND
SDA_B
39
+3.3V_MUX
HDMI0_TX1P
C3300
10uF
10V
C3301
0.1uF
16V
URSA9
R4419
0
+3.3V_MUX
L13413
BLM18PG121SN1D
IC3302
TS3DV642A0RUAR
From D13
+3.3V_MUX
+3.3V_NORMAL
TI 2:1 Mux
From MN864778
TX1SDA
+3.3V_MUX
HDMI0_DDC_CK
TX1SCL
TX0SCL
TX0SDA
USB NET Change: UB85/95/UC97
HDMI0_DDC_DA
PS8407_URSA9_0
R3325
4.7K
OPT
R3323
4.7K
OPT
PS8407_URSA9_1
R3327
4.7K
R3329
4.7K
OPT
R3346
4.7K
OPT
R3348
4.7K
OPT
330pF
C3350
330pF
330pF
C3343
C3347
C3339
330pF
330pF
330pF
C3335
330pF
C3321
+3.3V_PS8401
Jitter Cleaning Repeater
C3310
C3304
330pF
VDDC15_M1
R3350
4.7K
OPT
I2C_CTL_EN
ISET
+1.2V_PS8401
+3.3V_PS8401
+1.2V_PS8401
ISET
+1.2V_PS8401
+3.3V_PS8401
+1.2V_PS8401
DDCBUF
DCIN_EN
SMD bottom for ESD_UB85
EQ/I2CADDR_0
ISET
OUT_D2P
29
OUT_D2N
28
HPD_SNK
SDA_SRC
SCL_SRC
VDD33_2
PD
GND_2
ISET
SDA_SNK
SCL_SNK
VDDTX_2
36
35
34
33
32
31
VDDRX_2
21
20
22
19
23
9
10
18
24
8
REXT
7
OUT_D0N
VDDRA
OUT_D0P
VDDTX_1
OUT_D1N
25
17
26
PS8401A
16
OUT_D1P
IC3303
6
15
27
5
PRE
4
GND_1
IN_D1P
IN_D1N
C3307
0.1uF
16V
OPT
3
30
IN_D0P
HDMI_RX0+_URSA9_1_RP
IN_D0N
HDMI_RX0-_URSA9_1_RP
I2C_CTL_EN
I2C_CTL_EN
IN_CKP
HDMI_CLK+_URSA9_1_RP
IN_CKN
HDMI_CLK-_URSA9_1_RP
HDMI_RX1+_URSA9_1_RP
HDMI_RX1-_URSA9_1_RP
C3322
0.1uF
16V
I2C_SCL2
SMD_GASKET_for_ESD_UB85
GASKET_8.0X6.0X10.5H
M2315
SMD_GASKET_for_ESD_UB85
GASKET_8.0X6.0X10.5H
M2318
SMD_GASKET_for_ESD_UB85
GASKET_8.0X6.0X10.5H
M2321
MDS62110225
MDS62110225
MDS62110225
MDS62110225
R3330
4.7K
R3347
4.7K
R3349
4.7K
R3351
4.7K
SMD_GASKET_for_ESD_UB85
GASKET_8.0X6.0X10.5H
M2301
SMD_GASKET_for_ESD_UB85
GASKET_8.0X6.0X10.5H
M2303
SMD_GASKET_for_ESD_UB85
GASKET_8.0X6.0X10.5H
M2306
SMD_GASKET_for_ESD_UB85
GASKET_8.0X6.0X10.5H
M2311
SMD_GASKET_for_ESD_UB85
GASKET_8.0X6.0X10.5H
M2313
SMD_GASKET_for_ESD_UB85
GASKET_8.0X6.0X10.5H
M2316
SMD_GASKET_for_ESD_UB85
GASKET_8.0X6.0X10.5H
M2319
MDS62110225
MDS62110225
MDS62110225
MDS62110225
MDS62110225
MDS62110225
MDS62110225
SMD_GASKET_for_ESD_UB85
GASKET_8.0X6.0X9.5H
M2307
SMD_GASKET_for_ESD_UB85
GASKET_8.0X6.0X9.5H
M2314
1K
HDMI_RX1-_URSA9_1
HDMI_RX0+_URSA9_1
HDMI_RX0-_URSA9_1
CFG/I2C_ADDR1
CFG/I2C_ADDR1
OUT_CKP
HDMI_CLK+_URSA9_1
OUT_CKN
HDMI_CLK-_URSA9_1
R3333
4.99K
1%
OPT
GASKET_8.0X6.0X10.5H
M2304
OPT
GASKET_8.0X6.0X10.5H
M2309
OPT
GASKET_8.0X6.0X10.5H
M2310
OPT
GASKET_8.0X6.0X10.5H
M2317
OPT
GASKET_8.0X6.0X10.5H
M2320
MDS62110225
MDS62110225
MDS62110225
MDS62110225
MDS62110225
MDS62110214
9.5T Center of B/D
IC3304
+3.3V_NORMAL
+1.2V
AZ1117EH-1.2TRG1
IN
3
2
OUT
SMD bottom for ESD_65UB95
R3352
1
1
ADJ/GND
C3325
10uF
10V
C3308
0.1uF
16V
R3331
22
C3326
10uF
10V
C3332
0.1uF
16V
R3332
22
OPT
8.5T
SMD_GASKET_for_ESD_65UB95
GASKET_8.0X6.0X8.5H
M2300-*1
SMD_GASKET_for_ESD_65UB95
GASKET_8.0X6.0X8.5H
M2302-*1
SMD_GASKET_for_ESD_65UB95
GASKET_8.0X6.0X8.5H
M2306-*1
SMD_GASKET_for_ESD_65UB95
GASKET_8.0X6.0X8.5H
M2308-*1
SMD_GASKET_for_ESD_65UB95
GASKET_8.0X6.0X8.5H
M2312-*1
SMD_GASKET_for_ESD_65UB95
GASKET_8.0X6.0X8.5H
M2314-*1
SMD_GASKET_for_ESD_65UB95
GASKET_8.0X6.0X8.5H
M2318-*1
SMD_GASKET_for_ESD_65UB95
GASKET_8.0X6.0X8.5H
M2321-*1
MDS62110216
MDS62110216
MDS62110216
MDS62110216
MDS62110216
MDS62110216
MDS62110216
MDS62110216
SMD_GASKET_for_ESD_65UB95
GASKET_8.0X6.0X8.5H
M2301-*1
SMD_GASKET_for_ESD_65UB95
GASKET_8.0X6.0X8.5H
M2303-*1
SMD_GASKET_for_ESD_65UB95
GASKET_8.0X6.0X8.5H
M2307-*1
SMD_GASKET_for_ESD_65UB95
GASKET_8.0X6.0X8.5H
M2311-*1
SMD_GASKET_for_ESD_65UB95
GASKET_8.0X6.0X8.5H
M2313-*1
SMD_GASKET_for_ESD_65UB95
GASKET_8.0X6.0X8.5H
M2315-*1
SMD_GASKET_for_ESD_65UB95
GASKET_8.0X6.0X8.5H
M2319-*1
MDS62110216
MDS62110216
MDS62110216
MDS62110216
MDS62110216
MDS62110216
MDS62110216
+1.2V_PS8401
+1.2V_PS8401
PRE
EQ/I2CADDR_0
DDCBUF
DCIN_EN
+3.3V_PS8401
C3330
0.1uF
16V
+1.2V_PS8401
+1.2V_PS8401
+1.2V_PS8401
PRE
EQ/I2CADDR_0
DDCBUF
DCIN_EN
SMD_GASKET_for_ESD_UB85
GASKET_8.0X6.0X10.5H
M2312
MDS62110225
I2C_SDA2
C3320
0.1uF
16V
+1.2V_PS8401
SMD_GASKET_for_ESD_UB85
GASKET_8.0X6.0X10.5H
M2308
MDS62110225
R3334
HDMI_RX1+_URSA9_1
OPT
+3.3V_PS8401
SMD_GASKET_for_ESD_UB85
GASKET_8.0X6.0X10.5H
M2305
MDS62110225
+5V_NORMAL
HDMI_RX2+_URSA9_1
HDMI_RX2-_URSA9_1
I2C_SCL2
I2C_SDA2
R3336
22
OPT
R3328
4.7K
OPT
R3326
4.7K
ZD3300
2.5V
C3316
0.1uF
16V
R3300
22
37
VDDTX_2
31
R3335
4.99K
1%
HPD_SRC
THERMAL
41
EQ/I2C_ADDR0
HDMI_RX0-_URSA9_0
CFG/I2C_ADDR1
CFG/I2C_ADDR1
OUT_CKP
HDMI_CLK+_URSA9_0
OUT_CKN
HDMI_CLK-_URSA9_0
2
14
SCL_SNK
32
18
REXT
HDMI_RX1-_URSA9_0
HDMI_RX0+_URSA9_0
1
IN_D2N
DDCBUF/SDA_CTL
SDA_SNK
33
17
20
16
PRE
19
15
GND_1
EQ/I2C_ADDR0
VDDRA
14
DDCBUF/SDA_CTL
VDDTX_1
13
[EP]GND
ISET
34
12
21
11
22
10
VDDRX_1
23
9
VDD33_1
8
1K
HDMI_RX1+_URSA9_0
38
OUT_D0N
39
OUT_D0P
24
40
OUT_D1N
25
IN_D2P
13
OUT_D1P
26
HDMI_RX2-_URSA9_1_RP
12
27
HDMI_RX2+_URSA9_1_RP
R3353
SMD_GASKET_for_ESD_UB85
GASKET_8.0X6.0X10.5H
M2302
MDS62110225
MDS62110214
+5V_NORMAL
HDMI_RX2+_URSA9_0
HDMI_RX2-_URSA9_0
R3324
4.7K
OPT
C3315
0.1uF
16V
HPD_SNK
11
GND_2
35
PS8401A
7
OUT_D2N
28
VDDRX_1
PD
36
IC3301
6
OUT_D2P
29
VDD33_1
VDD33_2
5
IN_D0P
1K
SCL_SRC
4
IN_D1N
HDMI_RX1+_URSA9_0_RP
30
SMD_GASKET_for_ESD_UB85
GASKET_8.0X6.0X10.5H
M2300
CFG/I2C_ADDR1
C3329
0.1uF
16V
HDMI OUTPUT to URSA9_1
IN_D1P
IN_D0N
HDMI_RX0-_URSA9_0_RP
I2C_CTL_EN
I2C_CTL_EN
IN_CKP
HDMI_CLK+_URSA9_0_RP
IN_CKN
HDMI_CLK-_URSA9_0_RP
HDMI_RX1-_URSA9_0_RP
HDMI_RX0+_URSA9_0_RP
THERMAL
41
HDMI OUTPUT to URSA9_0
2
3
C3328
0.1uF
16V
C3327
0.1uF
16V
R3322
OPT
SDA_SRC
37
VDDRX_2
38
[EP]GND
39
40
1
IN_D2N
HPD_SRC
HDMI_RX2-_URSA9_0_RP
DCIN_EN/SCL_CTL
1K
R3354
OPT
IN_D2P
HDMI_RX2+_URSA9_0_RP
C3319
0.1uF
16V
DCIN_EN/SCL_CTL
C3318
0.1uF
16V
C3317
0.1uF
16V
10.5T
PRE
+3.3V_NORMAL
C3302
10uF
10V
+3.3V_PS8401
L3301
120-ohm
+1.2V
+1.2V_PS8401
L3302
120-ohm
C3323
0.1uF
C3324
0.1uF
SMD_GASKET_for_ESD_65UB95
GASKET_8.0X6.0X8.5H
M2305-*1
MDS62110216
OPT
GASKET_8.0X6.0X8.5H
M2304-*1
OPT
GASKET_8.0X6.0X8.5H
M2309-*1
OPT
GASKET_8.0X6.0X8.5H
M2310-*1
OPT
GASKET_8.0X6.0X8.5H
M2317-*1
OPT
GASKET_8.0X6.0X8.5H
M2320-*1
MDS62110216
MDS62110216
MDS62110216
MDS62110216
MDS62110216
SMD_GASKET_for_ESD_65UB95
GASKET_8.0X6.0X8.5H
M2316-*1
MDS62110216
8.5T Center of B/D
Separation of +3.3_NORMAL(For CST)
MAX
A
+3.3V_NORMAL
SMD bottom for ESD_UC97
10.5T/6T/5.5T
SMD_GASKET_for_ESD_UC97
SMR-T-6-6.5-8
M2300-*3
SMD_GASKET_for_ESD_UC97
SMR-T-6-6.5-8
M2306-*3
SMD_GASKET_for_ESD_UC97
SMR-T-6-6.5-8
M2308-*3
SMD_GASKET_for_ESD_UC97
SMR-T-6-6.5-8
M2313-*3
SMD_GASKET_for_ESD_UC97
SMR-T-6-6.5-8
M2315-*3
SMD_GASKET_for_ESD_UC97
SMR-T-6-6.5-8
M2318-*3
SMD_GASKET_for_ESD_UC97
SMR-T-6-6.5-8
M2321-*3
MDS62110206
MDS62110206
MDS62110206
MDS62110206
MDS62110206
MDS62110206
MDS62110206
SMD_GASKET_for_ESD_UC97
SMR-T-6-6.5-8
M2305-*3
SMD_GASKET_for_ESD_UC97
SMR-T-6-6.5-8
M2307-*3
SMD_GASKET_for_ESD_UC97
SMR-T-6-6.5-8
M2311-*3
SMD_GASKET_for_ESD_UC97
SMR-T-6-6.5-8
M2314-*3
SMD_GASKET_for_ESD_UC97
SMR-T-6-6.5-8
M2316-*3
SMD_GASKET_for_ESD_UC97
SMR-T-6-6.5-8
M2319-*3
SMD bottom for ESD_55UB95
8.5T/7.5T
+3.3V_NORMAL
+12V
FB
6
3
4
6A
5
EN
COMP
R2308
6.8K
C2328
0.1uF
16V
R2311
10K
C2323
100uF
6.3V
POWER_ON/OFF2_1
Vout=0.8*(1+R1/R2)
R2319
C2332
0.0068uF
50V
C2319
10uF
10V
C2345
47pF
50V
OPT
MDS62110206
MDS62110206
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
MDS62110206
MDS62110206
MDS62110206
R2
SMD_GASKET_for_ESD_55UB95
GASKET_8.0X6.0X8.5H
M2300-*2
SMD_GASKET_for_ESD_55UB95
GASKET_8.0X6.0X8.5H
M2302-*2
SMD_GASKET_for_ESD_55UB95
GASKET_8.0X6.0X8.5H
M2305-*2
SMD_GASKET_for_ESD_55UB95
GASKET_8.0X6.0X8.5H
M2311-*2
SMD_GASKET_for_ESD_55UB95
GASKET_8.0X6.0X8.5H
M2315-*2
SMD_GASKET_for_ESD_55UB95
GASKET_8.0X6.0X8.5H
M2318-*2
MDS62110216
MDS62110216
MDS62110216
MDS62110216
MDS62110216
MDS62110216
6T
R1
SMD_GASKET_for_ESD_UC97
GASKET_8.0X6.0X10.5H
M2301-*3
SMD_GASKET_for_ESD_UC97
GASKET_8.0X6.0X10.5H
M2303-*3
OPT
GASKET_8.0X6.0X5.5H
M2304-*3
OPT
SMR-T-6-6.5-8
M2309-*3
OPT
SMR-T-6-6.5-8
M2320-*3
MDS62110225
MDS62110225
MDS62110204
MDS62110206
MDS62110206
SMD_GASKET_for_ESD_UC97
GASKET_8.0X6.0X10.5H
M2302-*3
SMD_GASKET_for_ESD_UC97
GASKET_8.0X6.0X10.5H
M2312-*3
OPT
GASKET_8.0X6.0X5.5H
M2317-*3
OPT
SMR-T-6-6.5-8
M2310-*3
MDS62110225
MDS62110225
10.5T
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
MDS62110206
1.5K
1%
SW_1
ZD2301
5V
OPT
C2326
0.1uF
16V
OPT
SW_2
1/16W
1%
C2325
10uF
16V
7
L2309
2uH
[EP]
R2320
30K
AGND
C2304
10uF
16V
2
9
VIN
THERMAL
Placed on SMD-TOP
8
1
1%
IC2301
BD86106EFJ
PGND
R2323
10K
L2305
BLM18PG121SN1D
MDS62110204
5.5T OPT
MDS62110206
SMD_GASKET_for_ESD_55UB95
GASKET_8.0X6.0X8.5H
M2301-*2
SMD_GASKET_for_ESD_55UB95
GASKET_8.0X6.0X8.5H
M2303-*2
SMD_GASKET_for_ESD_55UB95
GASKET_8.0X6.0X8.5H
M2308-*2
SMD_GASKET_for_ESD_55UB95
GASKET_8.0X6.0X8.5H
M2312-*2
SMD_GASKET_for_ESD_55UB95
GASKET_8.0X6.0X8.5H
M2316-*2
SMD_GASKET_for_ESD_55UB95
GASKET_8.0X6.0X8.5H
M2319-*2
MDS62110216
MDS62110216
MDS62110216
MDS62110216
MDS62110216
MDS62110216
OPT
GASKET_8.0X6.0X8.5H
M2304-*2
OPT
GASKET_8.0X6.0X8.5H
M2309-*2
OPT
GASKET_8.0X6.0X8.5H
M2310-*2
OPT
GASKET_8.0X6.0X8.5H
M2317-*2
OPT
GASKET_8.0X6.0X8.5H
M2320-*2
MDS62110216
MDS62110216
MDS62110216
MDS62110216
MDS62110216
SMD_GASKET_for_ESD_55UB95
GASKET_8.0X6.0X7.5H
M2306-*2
SMD_GASKET_for_ESD_55UB95
GASKET_8.0X6.0X7.5H
M2314-*2
MDS62110205
MDS62110205
SMD_GASKET_for_ESD_55UB95
GASKET_8.0X6.0X7.5H
M2307-*2
SMD_GASKET_for_ESD_55UB95
GASKET_8.0X6.0X7.5H
M2321-*2
MDS62110205
MDS62110205
SMD_GASKET_for_ESD_55UB95
GASKET_8.0X6.0X7.5H
M2313-*2
7.5T
MDS62110205
6T OPT
BSD-14Y-UD-033_02-HD
2013.12.17
HDMI
LGE Internal Use Only
UB85/95/UC97 only
Place Near Micom
LOGO_LIGHT
AR4000
33
1/16W
+3.5V_ST
10K
R4000
OPT
LOGO_LIGHT_WAFER
C
Q4000
MMBT3904(NXP)
LOGO_LIGHT
B
LOGO_LIGHT
LOGO_LIGHT
R4003
10K
LOGO_LIGHT
C4000
0.1uF
16V
1K
R4004
LOGO_LIGHT
E
P4000
SMAW200-H18S5
+3.5V_WOL
120-ohm
L4000
BLM18PG121SN1D
C4006
6
USB_DP
7
8
GND
10
GND
+3.5V_ST
R4005
10K
5%
11
12
KEY1
GND
13
14
KEY2
IR
15
16
+3.5V_ST
D4001
LED_R
LOGO_LIGHT
R4012
0
LOGO_LIGHT_WAFER
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
OPT
C4009
0.1uF
16V
17
18
D4002
LED_R
OPT 5.5V
C4007
100pF
50V
OPT 5.5V
IR
NON_LOGO_LIGHT
R4015
1.8K
9
SCL
19
+3.5V_ST
R4008
10K
5%
OPT
R4009
10K
5%
R4006
100
KEY1
R4007
100
KEY2
GND
+3.5V_ST
C4008
1000pF
50V
OPT
D4005
R4011
100
WIFI_DP
Place Near Wafer
C4015
C4016
5pF
5pF
50V
50V
D4004
OPT 5.5V
WOL
WIFI_DM
OPT 5.5V
EYE_SCL
4
5
SDA
C4004
0.1uF
EYE_SDA
3
NC
22uF
10V
C4005
0.1uF
C4001
0.1uF
OPT
C4002
0.1uF
OPT
GND
R4010
100
BT_RESET
+3.5V_WOL
USB_DM
D4000
RCLAMP0502BA
R4002
100
WOL/WIFI_POWER_ON
2
D4003
C4003
0.1uF
1
C4010
3300pF
OPT 5.5V
R4001
100
M_RFModule_RESET
GND
BSD-14Y-UD-040_02-HD
IR / KEY
2013.12.17
LGE Internal Use Only
OCP USB1
USB3 (2.0)
MAX 1.0A
+5V_USB_1
+5V_NORMAL
3AU04S-385-ZC-(LG).
JK4302
3AU04S-385-ZC-(LG).
JK4300
10uF
10V
USB_CTL1
D4302-*1
RCLAMP0582B
R4400
10K
21
GND_2
THERMAL
25
22
HOST_TX223
HOST_TX2+
24
R4412
OPT 4.7K
R4414
OPT 4.7K
R4416
OPT 4.7K
R4413
OPT 4.7K
R4415
OPT 4.7K
R4417
OPT 4.7K
2
10uF
10V
VCC_2
13
DE1
EQ1
14
NC_4
11
C4415
22uF
10V
OPT
DEVICE_TX110
DEVICE_TX1+
9
0.1uF
C4412
C4402
10uF
10V
JK4400
PC2R009NJA1.
GND_1
8
VBUS
DEVICE_RX2-
NC_3
EQ2
DE2
VCC_1
D-
6
5
4
3
2
1
+3.3V_NORMAL
USB3_DM
D+
USB3_DP
GND
STDA_SSRX+
R4407
4.7K OPT
R4405
4.7K
STDA_SSRX-
+3.3V_NORMAL
GND_DRAIN
+3.3V_NORMAL
STDA_SSTX-
C4410
0.1uF
C4411
0.01uF
RCLAMP0582B
D4402-*1
RCLAMP0582B
C4408
1uF
RCLAMP0582B
D4401-*1
RCLAMP0582B
C4406
1uF
RCLAMP0582B
D4400-*1
RCLAMP0582B
C4405
0.01uF
RCLAMP0502BA
RCLAMP0502BA
D4402
C4404
0.1uF
RCLAMP0502BA
RCLAMP0502BA
D4401
C4403
1uF
RCLAMP0502BA
RCLAMP0502BA
D4400
STDA_SSTX+
C4400
1uF
1
7
+3.3V_NORMAL
NC_2
3
ZD4301
5V
DEVICE_RX2+
NC_1
4
ZD4302
5V
USB1 (3.0)
MAX 1.2A
C4413
0.1uF
12
NC_6
[EP]GND
C4310
R4404
4.7K
OPT
R4406
4.7K
OPT
USB3_RX0P
22uF
10V
OPT
20
HOST_RX1+
USB3_RX0M
15
IC4402
SN65LVPE502A
16
OS1
EN_RXD
19
HOST_RX1-
USB3_TX0M
C4416
+5V_USB_1
17
NC_5
18
USB3_TX0P
C4407
0.1uF
R4410
OPT 4.7K
+3.3V_NORMAL
-> EQ2: Low / DE1: Low
C4409
0.1uF
R4411
4.7K
+3.3V_NORMAL
USB3.0 redriver IC EQ setting
ZD4300
5V
5
C4322
RCLAMP0582B
22uF
10V
RCLAMP0502BA
RCLAMP0502BA
D4300
3
C4414
D4300-*1
RCLAMP0582B
4
USB_DP3
OPT
2
USB_DP2
4
OC
USB_DM3
5
3
USB_DM2
ILIM
RCLAMP0582B
/USB_OCD1
5
RCLAMP0502BA
RCLAMP0502BA
D4302
EN
2
VOUT
OPT
GND
6
1%
C4401
0.1uF
16V
1
14K
R4402
VIN
R4401
4.7K
USB DOWN STREAM
1
IC4400
BD2242G
1
+3.3V_NORMAL
USB2 (2.0)
MAX 1.0A
+5V_USB_3
USB DOWN STREAM
+5V_USB_2
2
3
4
5
6
7
8
9
10
SHIELD
Place under DUT Near SN65LVPE502CP PIN VCC
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
BSD-14Y-UD-044-HD
2013-12-17
USB JACK
LGE Internal Use Only
+3.3V_NORMAL
Full Scart(18 Pin Gender)
EU
R4801
10K
CLOSE TO JUNCTION
EU
R4802
100
EU
C4804
0.1uF
VA4801
5.6V
EU
SC_DET
1/16W
5%
SC_CVBS_IN
VA4807
5.5V
EU
SHIELD
19
AV_DET
18
17
16
15
14
13
12
11
75
COM_GND
R4800
EU
VA4808
5.5V
OPT
SYNC_IN
DTV/MNT_V_OUT
SYNC_OUT
SYNC_GND
RGB_IO
SC_FB
R_OUT
VA4802
5.6V
EU
R_GND
G_OUT
10
G_GND
SC_R
9
ID
8
VA4803
5.5V
EU
B_OUT
7
AUDIO_L_IN
6
B_GND
5
SC_G
AUDIO_GND
4
VA4804
5.5V
EU
AUDIO_L_OUT
3
AUDIO_R_IN
2
AUDIO_R_OUT
1
SC_B
VA4805
5.5V
EU
DA1R018H91E
JK4800
EU
SC_ID
SC_L_IN
VA4809
5.6V
EU
VA4800
20V
EU
SC_R_IN
VA4806
5.6V
EU
BLM18PG121SN1D
L4800
EU
EU
C4800
1000pF
50V
DTV/MNT_L_OUT
EU
C4802
4700pF
BLM18PG121SN1D
L4801
EU
EU
C4801
1000pF
50V
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
EU
C4803
4700pF
DTV/MNT_R_OUT
BSD-14Y-UD-048-HD
2013.12.17
SCART GENDER
LGE Internal Use Only
Ethernet Block
LAN_JACK_POWER
C5100
0.1uF
16V
C5101
0.01uF
50V
C5102
0.1uF
16V
C5103
0.01uF
50V
JK5100
BS-R570098
LAN_UDE
1
2
3
4
5
6
P1[CT]
P2[TD+]
EPHY_TDP
P3[TD-]
EPHY_TDN
P4[RD+]
EPHY_RDP
P5[RD-]
EPHY_RDN
P6[CT]
VA5100
5.5V
7
8
9
10
11
D1
D2
D3
D4
VA5101
5.5V
VA5102
5.5V
VA5103
5.5V
P7
P8
9
EMI
P10[GND]
R5100
0
P11
YL_C
YL_A
GN_C
GN_A
12
SHIELD
JK5100-*1
TLA-6T764
LAN_TDK
1
2
3
4
5
6
7
8
9
10
11
D1
D2
D3
D4
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10[GND]
R11
YL_C
YL_A
GN_C
GN_A
12
SHIELD
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
BSD-14Y-UD-051-HD
LAN_VERTICAL
2012.12.17
51
LGE Internal Use Only
Ethernet Block
R5215
3.3K
+3.5V_WOL
EPHY_ACTIVITY
R5217 3.3K
ET_RXER
LAN_JACK_POWER
Place this cap. near IC
EPHY_CRS_DV
C5203
0.1uF
16V
ET_RXER
XTAL_1
IN
5
1
33
1/16W
5%
R5219
10K
1/16W
1%
3.3K
R5212
1.5K
LED1/PHYAD[1]
R5205
C5212
0.1uF
OPT
EPHY_TXD1
16
15
TXD[0]
TXC
14
51
13
DVDD33
R5209
C5202
EPHY_INT
R5208
3.3K
EPHY_RXD1
EPHY_EN
+3.5V_WOL
C5211
0.1uF
16V
5pF
RXD[3]/CLK_CTL
RXC
C5209
OPT
10
RXD[1]
AR5200
33
R5201
RXD[0]
12
8
33pF
IC5201
AP2191WG-7
25
17
TXD[1]
7
EPHY_RXD0
+3.5V_WOL
+3.5V_ST
CRS/CRS_DV
18
TXD[2]
9
3.3K
R5200
COL
TXD[3]
EPHY_MDIO
Place near IC
WOL POWER ENABLE CONTROL
26
TXEN
19
IC5200
RTL8201F-VB-CG
3.3K
+3.5V_WOL
RXER/FXEN
20
6
THERMAL
33
11
RXDV
27
5
MDI-[1]
R5203
DVDD10OUT
/RST_PHY (from SOC)
MDI+[1]
AVDD33_1
28
PHYRSTB
4
+3.5V_WOL
29
EPHY_MDC
21
MDI-[0]
EPHY_TDN
AVDD33_2
MDC
3
EPHY_TDP
CKXTAL1
22
MDI+[0]
EPHY_RDN
30
MDIO
2
Route Single 50 Ohm, Differential 100 Ohm
WOL/ETH_POWER_ON
LED0/PHYAD[0]/PMEB
23
1
EPHY_RDP
+3.5V_WOL
24
RSET
AVDD10OUT
33 RXD[2]/INTB
R5204
2.49K 1%
32
[EP]
50V
Place this Res. near IC
31
CKXTAL2
C5207
8pF
Place this cap. near IC
C5205
0.1uF
16V
R5210
R5218
0
1M R5202
OPT
GND_1
1
2
XTAL_2
3
4
25MHz
X5200
+3.5V_WOL
GND_2
C5206
8pF
50V
ET_COL/SNI
Place 0.1uF close to each power pins
EPHY_TXD0
C5201
0.1uF
16V
EPHY_REFCLK
C5200
4.7uF
10V
EPHY_ACTIVITY
C5208
0.1uF
16V
ET_COL/SNI
OPT
ZD5201
5V
+3.5V_WOL
OUT
C5204
0.1uF
WOL_CTL
R5211
2
33
EN
4
3
GND
FLG
R5213
10K
OPT
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
BSD-14Y-UD-052-HD
2013-12-17
ETHERNET
LGE Internal Use Only
+12V
EU
AUD_OUT >> EU/CHINA_HOTEL_OPT
IC6000
AZ4580MTR-E1
L6000
EU
EU
OUT1
R6000
C6000
1uF
25V
EU
OPT
OPT
R6002
C6002
470K
6800pF
33K
EU
R6004
C6003
33pF
EU
IN1-
IN1+
VEE
SCART_AMP_L_FB
1
8
2
7
4
C6004
EU
0.1uF
OUT2
R6011
2.2K
50V
SIGN60000003
[SCART AUDIO MUTE]
EU
C6008
DTV/MNT_R_OUT
EU
3
VCC
6
IN2-
R6008
EU
OPT
R6010
33K
470K
5
OPT
1uF
C6007
25V
DTV/MNT_L_OUT
6800pF
EU
IN2+
C
C6005 EU
33pF
Q6000
MMBT3904(NXP)
SCART_AMP_R_FB
B
EU_SCART_MUTE_ISAHAYA
Q6002
RT1P141C-T112
EU
SCART_Lout
SCART_MUTE
B
C
E
R6013
1K
E
2.2K
DTV/MNT_L_OUT
SCART_Rout
DTV/MNT_R_OUT
Q6001
MMBT3904(NXP)
E
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
E
R6014
1K
B
B
PDTA114ET
Q6002-*1
C
EU
C
EU
EU_SCART_MUTE_NXP
BSD-14Y-UD-060-HD
SCART AUDIO AMP
2012.12.17
60
LGE Internal Use Only
HP_OUT_H13
HP_OUT_H13
C6109-*1
18pF
C6104-*1
18pF
EARPHONE AMP
IC6100
TPA6138A2
HP_OUT
C6100
R6100
1uF
10V
HP_OUT 10K
+INR
HP_OUT_MTK
C6104
180pF
HP_OUT
R6106
43K
HP_OUT
-INR
HP_ROUT_MAIN
1%
R6103
33K
HP_OUT_MTK
HP_OUT_H13
R6103-*1
43K
C6108
10pF
50V
OUTR
1
14
2
13
3
12
+INL
HP_OUT_MTK
HP_OUT
R6104
-INL HP_OUT
43K
C6109
180pF
HP_OUT
R6101
10K
C6101
1uF
10V
HP_OUT
HP_LOUT_MAIN
OUTL
C6106
10pF
50V
1%
R6102
33K
HP_OUT_MTK
HP_LOUT_AMP
HP_ROUT_AMP
GND_1
+3.3V_NORMAL
4
11
UVP
+3.3V_NORMAL
HP_OUT_H13
R6102-*1
43K
1%
MUTE
SIDE_HP_MUTE
HP_OUT
4.7K
R6105
VSS
5
10
6
9
7
8
GND_2
VDD
HP_OUT
C6102
1uF
10V
HP_OUT
1%
HP_OUT
CN
CP
L6100
120-ohm
BLM18PG121SN1D
C6105
1uF
10V
HP_OUT
C6107
0.1uF
16V
C6103
1uF
10V
HP_OUT
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
BSD-14Y-UD-061-HD
HEADPHONE AMP
2013.12.17
61
LGE Internal Use Only
B-CAS (SMART CARD) INTERFACE
+3.3V_NORMAL
INT
CMDVCC :
STATUS
--------------------------------HIGH
HIGH
CARD PRESENT
LOW
HIGH
CARD not PRESENT
+3.3V_NORMAL
IC6300
TDA8024TT
OPT
2.7K
JAPAN
R6306
OPT
R6304
R6300 22
R6302
SMARTCARD_PWR_SEL/SD_EMMC_DATA[1]
5V/3V
PGND
+5V_NORMAL
S2
JAPAN
2
27
3
26
4
25
5
24
AUX2UC
AUX1UC
JAPAN
R6316
1.2K
28
OPT
R6319
1.2K
CLKDIV2
JAPAN
1
JAPAN
R6315
1.2K
CLKDIV1
OPT
R6318
1.2K
CLKDIV1 CLKDIV2 : F_CRD_CLK
----------------------------1
0
CLKIN
JAPAN
R6317
1.2K
2.7K
JAPAN
OPT
R6305
R6301
2.7K
JAPAN
R6303
SIGN63000018
I/OUC
JAPAN
R6307
22
SMARTCARD_DATA/SD_EMMC_CLK
XTAL2
JAPAN
R6308
22
SMARTCARD_CLK/SD_EMMC_DATA[0]
XTAL1
JAPAN
R6309
22
SMARTCARD_DET/SD_EMMC_DATA[3]
OFF
JAPAN
R6310
22
SMARTCARD_RST/SD_EMMC_DATA[2]
L6300
VDDP
JAPAN
C6300
0.1uF
16V
JAPAN
C6301
10uF
10V
JAPAN
C6303
0.1uF
16V
S1
6
23
7
22
JAPAN
R6311
22
GND
VUP
JAPAN
C6302
0.1uF
16V
PRES
PRES
I/O
AUX2
AUX1
CGND
8
21
9
20
10
19
11
18
12
17
13
16
14
15
SMARTCARD_VCC/SD_EMMC_CMD
L6301 JAPAN
BLM18PG121SN1D
JAPAN
VDD
RSTIN
JAPAN
C6305
0.1uF
16V
JAPAN
C6306
0.1uF
16V
CMDVCC
+3.3V_NORMAL
BLM18PG121SN1D
B-CAS SLOT
P6300
10057542-1311FLF(B CAS Slot)
PORADJ
VCC
VCC
JAPAN
C6307
0.33uF
16V
RST
RST
Place CLK C3 far from C2,C7,C4 and C8
CLK
CLK
JAPAN
C6304
0.1uF
16V
RESERVED_1
GND
VPP
JAPAN
R6313
75
I/O
C1
C2
C3
C4
C5
JAPAN
C6
C7
75 ohm in I/O is for short circuit Protection
RESERVED
JAPAN
+3.3V_NORMAL
R6314
1K
JAPAN
ZD6300
5V
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
SW2
JAPAN
10K
R6312
JAPAN
SW1
C8
S1
S2
ZD6301
5V
BSD-14Y-UD-063-HD
2012.12.17
JAPAN_BCAS
63
LGE Internal Use Only
1. should be guarded by ground
2. No via on both of them
3. Signal Width >= 12mils
Signal to Signal Width = 12mils
Ground Width >= 24mils
+3.3V_TU
L6500
BLM18PG121SN1D
RF_SWITCH_CTL
C6501
15pF
50V
OPT
R6515-*1
200
I2C_SCL6
TU_H/W/W_KR/US/BR/TW
R6510-*1
200
I2C_SDA6
R6516
IF_P_TU
7
IF_N_TU
IF_P
be guarded by ground,Match GND VIA
IF_N
TU_CVBS_TU
9
TU_SIF_TU
TU_CVBS
E
B
TU_SIF
0
C
R6518-*1
+3.3V_TUNER
12
FE_DEMOD1_TS_ERROR
FE_DEMOD1_1_TS_CLK
15
FE_DEMOD1_TS_SYNC
R6514TU_M 0
TU_M/W
FE_DEMOD1_TS_SYNC
0
0
FE_DEMOD1_TS_DATA[7]
0
18
FE_DEMOD1_TS_DATA[1]
19
FE_DEMOD1_TS_DATA[2]
TU_M/W
C6513
0.1uF
TU_M/W
C6517
0.1uF
16V
FE_DEMOD1_TS_VAL
R6513
1
PG
2
TU_M/W
R6507
10K
EN
TU_M // W_AJ
ADJ
6
for Global
T/C Half NIM Horizontal Type
T/C/S2 Combo Horizontal type
T2/C/S2 Combo Horizontal Type
T2/C/S2 Combo Vertical Type
China NIM with Isolater Type
Japan Dual NIM
Brazil 2Tuner
Taiwan 2Tuner
Colombia DVB-T2 2Tuner
2A
R2
R1
5
NC
EAN61387601
20
FE_DEMOD1_TS_DATA[3]
21
FE_DEMOD1_TS_DATA[4]
22
FE_DEMOD1_TS_DATA[5]
23
FE_DEMOD1_TS_DATA[6]
24
FE_DEMOD1_TS_DATA[7]
25
/TU_RESET1_TU
26
+3.3V_DEMOD_TU
27
I2C_SCL4_TU
28
D_Demod_Core
TU_M/W
C6514
10uF
10V
FE_DEMOD1_TS_DATA[1]
FE_DEMOD1_TS_DATA[2]
FE_DEMOD1_TS_DATA[3]
TU_M/W
C6508
1uF
FE_DEMOD1_TS_DATA[5]
FE_DEMOD1_TS_DATA[6]
Vout=0.6*(1+R1/R2)
FE_DEMOD1_TS_DATA[7]
R6500
100
+3.3V_TU
L6503
BLM18PG121SN1D
TU_M/W
R6520
33
L6505
BLM18PG121SN1D
29
LNB_TX
30
I2C_SDA4_TU
31
LNB_OUT
34
FE_DEMOD2_TS_ERROR
36
FE_DEMOD2_TS_SYNC
37
FE_DEMOD2_TS_CLK_TU
38
+2.5V_DEMOD
39
FE_DEMOD2_TS_VAL
40
FE_DEMOD2_TS_DATA
45
/TU_RESET2_TU
LNB_TX
Demod_Core
TU_M/W
C6504
0.1uF
TU_M/W
C6512
15pF
50V
OPT
C6510 TU_M/W
0.1uF
TU_M/W
/TU_RESET1
TU_M/W_NonBr
C6505
16V
0.1uF
TU_M/W_NonBr
I2C_SCL4
TU_M/W
R6519
33
LNB_OUT
C6520
0.1uF
LNB
FE_DEMOD2_TS_ERROR
C6511
15pF
50V
OPT
I2C_SDA4
C6521
18pF
LNB
FE_DEMOD2_TS_SYNC
R6522
0
FE_DEMOD2_TS_CLK
FE_DEMOD2_TS_VAL
L6506 +2.5V_Normal
BLM18PG121SN1D
C6518
0.1uF
TU_JP
TU_JP
FE_DEMOD2_TS_DATA
R6501
100
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Demod_Core
VOUT
4
VCTRL
Example of Option name
TU_Q_T2 = apply TDSQ type tuner and T2 country
TU_M/W = apply TDSM&TDSW Type Tuner
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
GND
7
VIN
+5V_NORMAL
FE_DEMOD1_TS_DATA[1-7]
FE_DEMOD1_TS_DATA[4]
13’ Tuner Type
TDS’S’-G501D :
TDS’Q’-G501D :
TDS’Q’-G601D :
TDS’Q’-G651D :
TDS’M’-C601D :
TDS’W’-J551F :
TDS’W’-B651F :
TDS’W’-A651F :
TDS’W’-K651F :
8
3
FE_DEMOD1_TS_DATA[0]
TU_W_AJ
Global F/E Option Name
1. TU
2. Tuner Name = TDS’S’,TDS’Q’...
3. Country Name = T,T2,S2,KR,US,BR ...
[EP]
0
TU_W
TU_W_Non_AJ
R6511
IC6500
AP2132MP-2.5TRG1
FE_DEMOD1_TS_CLK
FE_DEMOD1_TS_VAL
17 FE_DEMOD1_1_TS_DATA[0]
R6521
C6509
0.1uF
TU_M/W
FE_DEMOD1_TS_ERROR
R6512
FE_DEMOD1_2_TS_CLK
FE_DEMOD1_2_TS_DATA[0]
T2 : Max 1.7A
else : Max 0.7A
+3.3V_NORMAL
14
16
TU_ALL_2178B
Q6500
MMBT3906(NXP)
TU_M/W
+3.3V_TU
L6501
BLM18PG121SN1D
150
TU_H/M_KR/US/TW/BR/EU
11
R6506 TU_ALL_2178B
200
R6510-*2
300
TU_ALL_2178B
R6518
C6515
0.1uF
16V
TU_W_AJ
TU_W_AJ
8
C6506
22uF
10V
85C
1608 perallel
because of derating
R6505
TU_ALL_2178B 200
R6515-*2
300
10
TU_ALL_IntDemod
should
R6517
10
16V
TU_H/W/W_KR/US/BR/TW
TU_ALL_IntDemod
6
TU_ALL_2178B C6516
0.1uF
1/16W
1%
I2C_SDA6_TU
TU_Non_BR/TW
R6515 33
C6503
15pF TU_Non_BR/TW
R6510 33
50V
OPT
+3.3V_TU
1/16W
1%
5
+3.3V_TU
TU_M/W_1.1V TU_M/W_1.1V
R6509-*1 R6508-*1
18K
16K
I2C_SCL6_TU
+3.3V_NORMAL
IF_AGC
R6508
10K
4
R6503
100
TU_ALL_IntDemod
close to Tuner
1/16W
1/16W
1%
1%
TU_M/W_1.2V
TU_M/W_1.2V
TU_ALL_IntDemod
C6500
0.1uF
16V
R6504 1K
TU_M/W_TW/BR/CO/CN
R6502
10K
R6509
10K
IF_AGC_TU
C6502
0.1uF
9
3
TU_M/W_TW/BR/CO/CN
TU_M/W_TW/BR/CO/CN
THERMAL
RF_SWITCH_CTL_TU
L6502
BLM18PG121SN1D
2
close to TUNER
C6519
0.1uF
TU_ALL_2178B
+3.3V_LNA_TU
L6504
BLM18PG121SN1D
1
C6507
16V
0.1uF
TU_W
/TU_RESET2
TU_W
BSD-14Y-UD-065-HD
TUNER
2013.12.17
65
LGE Internal Use Only
4
5
6
7
8
9
10
11
12
13
2
NC_2
3
SCL_RF
4
SDA_RF
5
NC_3
6
NC_4
7
M_SIF
8
M_CVBS
9
NC_5
10
B2[+3.3V]
11
NC_6
12
GROUND_1
13
B1[+3.3V]
B1[+3.3V]
1
NC_1
2
NC_2
29
SDA_DEMOD
30
31
32
33
34
35
36
37
38
39
40
41
42
NC_8
33
M_ERROR
34
GROUND_2
35
M_SYNC
36
M_MCLK
37
NC_9
38
M_VALID
39
M_DATA
40
S_ERROR
41
S_SYNC
42
28
NC_9
30
B1[+3.3V]
M_DIF_AGC
S_VALID
44
SCL_RF
SDA_RF
A1
A1
M_DIF[P]
A1
M_ERROR
A1
FE_DEMOD2_TS_ERROR
B1
B1
47
GND_3
M_SYNC
FE_DEMOD2_TS_SYNC
M_MCLK
FE_DEMOD2_TS_CLK_TU
B5[+2.5V]
+2.5V_DEMOD
SHIELD
M_DIF[N]
S_CVBS
B2[+3.3V]
A1
+3.3V_TUNER
51
52
53
A1
A1
B1
B1
S_MCLK
FE_DEMOD1_1_TS_CLK
S_DATA_4
FE_DEMOD1_TS_DATA[4]
S_DATA_5
FE_DEMOD1_TS_DATA[5]
S_DATA_6
FE_DEMOD1_TS_DATA[6]
SHIELD
B1
B1
S_SYNC
FE_DEMOD1_TS_SYNC
SHIELD
S_VAILD
FE_DEMOD1_TS_VAL
S_DATA
FE_DEMOD1_1_TS_DATA[0]
NC_3
FE_DEMOD1_TS_DATA[1]
NC_4
FE_DEMOD1_TS_DATA[2]
NC_5
FE_DEMOD1_TS_DATA[3]
NC_6
FE_DEMOD1_TS_DATA[4]
NC_7
FE_DEMOD1_TS_DATA[5]
NC_8
FE_DEMOD1_TS_DATA[6]
NC_9
FE_DEMOD1_TS_DATA[7]
S_RESET_DEMOD
/TU_RESET1_TU
B3[+3.3V]
+3.3V_DEMOD_TU
SCL_DEMOD
I2C_SCL4_TU
B4[+1.1V]
D_Demod_Core
NC_10
LNB_TX
SDA_DEMOD
I2C_SDA4_TU
B1
B1
SHIELD
FE_DEMOD2_TS_DATA
S_ERROR
FE_DEMOD1_TS_ERROR
S_SYNC
DEV_KR_T2
1
2
3
4
5
6
12
13
TDJM_C351D
1
FE_DEMOD1_TS_SYNC
FE_DEMOD1_2_TS_CLK
S_VALID
FE_DEMOD1_TS_VAL
3
4
5
6
7
C6700-*1
B1
3300pF
0
0
9
C6701
1000pF
630V
TU_ALL_1000pF
C6703
1000pF
630V
TU_NON_AJ
C6705
3300pF
630V
OPT
C6707
1000pF
630V
TU_W_AJ_1000pF
10
11
0 R6701
FE_DEMOD1_2_TS_DATA[0] TU_M_EU
R6703
S_DATA
C6700
1000pF
630V
R6702
/TU_RESET2_TU
C6702
1000pF
630V
B1[+3.3V]
1
SWITCH_CTR
2
NC_1
3
SCL_RF
4
SDA_RF
5
NC_2
6
NC_3
7
S_SIF
8
S_CVBS
9
NC_4
10
B2[+3.3V]
11
NC_5
12
GND_1
13
M_RESET_DEMOD
25
B3[+3.3V]
26
SCL_DEMOD
27
TU6800-*3
TDJW-B251F
TDJW-B251F
B1[+3.3V]
1
NC_1
2
M_DIF_AGC
3
SCL_RF
4
SDA_RF
5
M_DIF[P]
6
M_DIF[N]
7
S_SIF
8
S_CVBS
9
NC_2
10
B2[+3.3V]
11
NC_3
12
GND_1
13
B1[+3.3V]
RF_S/W_CTL
NC_1
SCL_RF
SDA_RF
NC_2
NC_3
M_SIF
M_CVBS
NC_4
B2[+3.3V]
NC_5
GND_1
TU6701-*1
TDJM-C351D
S_MCLK
S_RESET_DEMOD
TU6800-*2
TDJW-H151F
TU6800-*1
TDJW-K152F
TDJW_K152F
11
FE_DEMOD1_TS_DATA[2]
FE_DEMOD1_TS_DATA[3]
TU_CVBS_TU
FE_DEMOD1_TS_ERROR
GND_1
M_DATA
47
S_DATA_3
CVBS
47
10
630V
S_DATA_2
A1
S_ERROR
9
TU_H/M_KR/US/JP/EU
50
A1
TU_SIF_TU
NC_2
FE_DEMOD2_TS_VAL
TU_H/M_KR/US/JP/EU
49
A1
IF_N_TU
SIF
9
8
FE_DEMOD1_1_TS_DATA[0]
FE_DEMOD1_TS_DATA[1]
DIF[N]
8
M_VALID
S_DATA_0
S_DATA_1
IF_P_TU
7
S_SIF
7
TU_M/W_CN/HK/TW/BR_1000pF
48
46
I2C_SDA6_TU
DIF[P]
6
47
NC_10
TU_M/W_CN/HK/TW/BR_3300pF
47
S_DATA_7
I2C_SCL6_TU
SDA
5
LNB_OUT
GND_2
32
TU_GND_B
46
45
TU_GND_A
45
IF_AGC_TU
SCL
4
8
S_RESET_DEMOD
RF_SWITCH_CTL_TU
DIF_AGC
3
TU_GND_B
44
43
+3.3V_LNA_TU
NC
2
2
43
S_MCLK
B1[+3.3V]
1
NC_1
LNB
31
GND_2
29
SDA_DEMOD
30
LNB
28
F22_OUTPUT
29
SDA_DEMOD
27
B4[+1.1V]
TU_GND_B
30
NC_7
26
SCL_DEMOD
TU_GND_A
29
28
25
B3[+3.3V]
27
B4[+1.2V]
24
RESET_DEMOD
26
SCL_DEMOD
23
D7
25
TU_GND_A
28
27
22
D6
24
B4[+1.2V]
21
D5
23
SCL_DEMOD
20
D4
22
27
19
D3
21
B3[+3.3V]
18
D2
20
26
17
D1
19
B3[+3.3V]
16
D0
18
26
15
VAILD
17
25
14
SYNC
16
25
13
MCLK
15
M_RESET_DEMOD
12
GND_1
13
14
M_RESET_DEMOD
11
ERROR
12
GND_1
10
B2[+3.3V]
11
NC_8
9
NC_5
10
B2[+3.3V]
8
CVBS
9
NC_7
7
SIF
8
NC_6
6
NC_4
7
NC_5
5
NC_3
6
NC_4
4
SDA_RF
5
NC_3
3
SCL_RF
4
SDA_RF
2
NC_2
3
SCL_RF
1
NC_1
TU_GND_B
3
1
NC_1
TDJH_H251F
TU6703
TDJH-H251F
TU_GND_B
2
B1[+3.3V]
TDJM_H151F
TU6701
TDJM-H151F
TU_GND_A
1
TDJM_G251D
TU6707
TDJM-G251D
TU_GND_A
TDJW-J251F
TU6700
TDJW-J251F
TU_GND_B
TDJW_A152D
TU6800
TDJW-A152D
12
13
14
15
16
C6701-*1
C6703-*1
3300pF
3300pF
630V
630V
TU_ALL_3300pF TU_W_AJ_3300pF
17
C6707-*1
3300pF
630V
TU_W_AJ_3300pF
18
19
20
21
22
C6703-*2
3300pF
630V
TU_W_AJ_2.2nF
23
24
25
26
27
28
GND_3
29
30
B1[+3.3V]
RF_SW_CTL
NC_1
SCL_RF
SDA_RF
NC_2
NC_3
SIF
CVBS
25
NC_4
26
NC_5
27
GND_1
29
MCLK
30
A1
B1
47
SHIELD
B4[+1.2V]
28
NC_6
29
SDA_DEMOD
30
NC_7
33
M_ERROR
34
GND_2
35
M_SYNC
36
M_MCLK
37
NC_8
38
M_VALID
39
M_DATA
40
S_ERROR
41
S_SYNC
42
S_MCLK
43
S_VALID
44
S_RESET_DEMOD
45
S_DATA
46
25
B3[+3.3V]
26
SCL_DEMOD
27
B4[+1.1V]
28
NC_4
29
SDA_DEMOD
30
M_RESET_DEMOD
B3[+3.3V]
SCL_DEMOD
B4[+1.1V]
NC_6
SDA_DEMOD
SYNC
VAILD
D0
33
D1
34
D2
35
D3
36
D4
37
D5
38
D6
39
D7
40
RESET_DEMOD
41
B2[+3.3V]
42
SCL_DEMOD
43
B3[+1.1V]
44
NC_6
45
SDA_DEMOD
46
for tuner EMS (S4) testing
A1
28
ERROR
RESET1_DEMOD
B1
A1
A1
B1
B1
A1
A1
B1
47
47
SHIELD
NC_5
33
NC_6
34
GND_2
35
NC_7
36
NC_8
37
NC_9
38
NC_10
39
NC_11
40
ERROR
41
SYNC
42
MCLK
43
VALID
44
RESET2_DEMOD
45
DATA
B1
46
A1
A1
B1
NC_7
M_ERROR
GND_2
M_SYNC
M_MCLK
NC_8
M_VALID
M_DATA
S_ERROR
S_SYNC
S_MCLK
S_VALID
S_RESET_DEMOD
S_DATA
B1
47
SHIELD
SHIELD
B1
SHIELD
TU_GND_B
TU_GND_A
54
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
BSD-14Y-UD-067-HD
TU_SYMBOL
2013.12.17
LGE Internal Use Only
RS-232C Control INTERFACE
JK6801
SPG14-DC-0101
5
9
4
8
R6820
100
3
+3.5V_ST
7
R6821
100
2
6
1
C6812
OPT
ZD6802
ADUC 20S 02 010L
20V
0.33uF
OPT
10
OPT
ZD6803
ADUC 20S 02 010L
20V
C6813
0.1uF
IC6801
MAX3232CDR
C1+
C6808
0.1uF
C6809
0.1uF
V+
C1-
C2+
C6810
0.1uF
C2-
VC6811
0.1uF
DOUT2
RIN2
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
VCC
GND
DOUT1
RIN1
ROUT1
SOC_RX
DIN1
SOC_TX
DIN2
ROUT2
EAN41348201
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
BSD-14Y-UD-068-HD
RS232C
2013.12.17
68
LGE Internal Use Only
DVB-S2 LNB Part Allegro
(Option:LNB)
Input trace widths should be sized to conduct at least 3A
3A
Ouput trace widths should be sized to conduct at least 2A
+12V
2A
D6904-*1
D6902-*1
LNB_DIODE_TSC
Max 1.3A
40V
LNB_SX34
SP-7850_15
15uH
L6900
LNB
GNDLX
LX
16
NC_3
BOOST
NC_2
17
18
15
VIN
14
GND
13
VREG
12
ISET
11
TCAP
LNB
5
A_GND
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
A_GND
LNB
R6903
39K
C6912
1/16W
1%
LNB
0.1uF
LNB
LNB_TX
I2C_SDA4
I2C_SCL4
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
R6904
0
LNB
C6911
A_GND
TDO
D6903-*1
LNB_SX34
40V
IC6900
4
A8303SESTR-T
Caution!! need isolated GND
C6910
0.1uF
50V
10
C6902
0.22uF
25V
TDI
9
LNB
C6904
0.1uF
50V
TONECTRL
Close to Tuner
Surge protectioin
LNB
2
3
ADD
D6900
LNB
R6900
2.2K
1W
LNB
LNB
NC_1
8
C6901
33pF
LNB
D6903
LNB_SMAB34
40V
THERMAL
21
SDA
30V
LNB_DIODE_ONSEMI
1
R6902 33
LNB_OUT
19
VCP
7
30V
LNB_DIODE_TSC
D6901
MBR230LSFT1G
SCL
A_GND
close to VIN pin(#15)
LNB
R6901 33
D6901-*1
SS23L
C6909
10uF
25V
LNB
A_GND
A_GND
[EP]GND
close to Boost pin(#1)
20
C6907
10uF
25V
LNB
6
C6906
10uF
25V
LNB
IRQ
C6905
10uF
25V
LNB
LNB
C6903
0.01uF
50V
LNB
C6908 0.1uF
40V
LNB_SMAB34
0.22uF
30V
C6900
18pF
LNB
3.5A
D6904
LNB
30V
D6902
LNB_DIODE_ONSEMI
BSD-14Y-UD-069-HD
LNB
2013.12.17
69
LGE Internal Use Only
eMMC I/F
A5
B2
B3
3.3V_EMMC
B4
B5
47K
B6
NC_23
DAT1
NC_24
DAT2
NC_25
DAT3
NC_26
DAT4
NC_27
DAT5
NC_28
DAT6
NC_29
DAT7
NC_30
R8116
10K
M6
M5
C5
B4
B3
EMMC_DATA[6]
B5
EMMC_SERIAL_22
AR8101
22
1/16W
EMMC_DATA[7]
B6
DAT2
NC_27
DAT3
NC_28
DAT4
NC_29
DAT5
NC_30
DAT6
NC_31
DAT7
NC_32
NC_33
NC_34
M6
M5
CLK
NC_35
CMD
NC_36
NC_37
NC_38
A6
A7
C5
E5
E8
EMMC_SERIAL_22
EMMC_CLK
E9
22
E10
EMMC_CMD
F10
EMMC_RST
G3
G10
H5
OPT
C8107
10pF
50V
K6
K7
K10
EMMC_SERIAL_100
AR8100-*1 AR8101-*1 AR8102-*1
100
100
100
1/16W
1/16W
1/16W
EMMC_SERIAL_100
EMMC_SERIAL_100
eMMC serial 100 ohm option
J5
P7
P10
NC_39
NC_4
NC_40
NC_23
NC_41
NC_42
NC_46
NC_43
NC_47
NC_44
NC_48
NC_45
NC_49
NC_52
NC_50
NC_58
NC_51
NC_59
NC_53
NC_66
NC_54
NC_73
NC_55
NC_80
NC_56
NC_81
NC_57
NC_82
NC_60
NC_116
NC_61
NC_119
NC_62
NC_63
NC_64
K5
RESET
OPT
C8100
0.1uF
16V
NC_65
NC_67
NC_68
C6
M4
3.3V_EMMC
N4
P3
VCCQ_2
VCCQ_3
VCCQ_4
VCCQ_5
EMMC_RESET_BALL
EMMC_CLK_BALL
EMMC_CMD_BALL
DAT6
DAT5
DAT4
DAT3
P5
VCCQ_1
E6
F5
J10
K9
VCC_1
VCC_2
VCC_3
VCC_4
EMMC_VDDI
C2
VDDI
C8104
1uF
10V
E7
G5
H10
K8
C4
N2
N5
P4
P6
VSS_1
VSS_2
VSS_3
VSS_4
NC_69
HYNIX_EMMC_4GB
AR8102
NC_3
NC_70
NC_71
NC_72
NC_74
NC_75
NC_76
NC_77
NC_78
NC_79
NC_83
NC_84
NC_85
NC_86
NC_87
NC_88
NC_89
NC_90
NC_91
NC_92
VSSQ_1
NC_93
VSSQ_2
NC_94
VSSQ_3
NC_95
VSSQ_4
NC_96
VSSQ_5
NC_97
NC_98
NC_99
DAT3
DAT4
A1
A2
A8
A9
A10
A11
A12
A13
A14
B1
B7
B8
B9
B10
B11
B12
Don’t Connect Power At VDDI
B13
EMMC_VDDI
B14
C1
(Just Interal LDO Capacitor)
DAT5
NC_100
C3
C7
NC_1
NC_101
NC_2
NC_102
NC_5
NC_103
NC_6
NC_104
NC_7
NC_105
NC_8
NC_106
NC_9
NC_107
NC_10
NC_108
NC_11
NC_109
NC_12
NC_110
NC_13
NC_111
NC_14
NC_112
NC_15
NC_113
NC_16
NC_114
NC_17
NC_115
NC_18
NC_117
NC_19
NC_118
NC_20
NC_120
NC_21
NC_121
NC_22
NC_122
NC_24
C9
E8
C10
E9
C11
E10
C12
F10
C13
G3
C14
G10
D1
D2
DAT5
H5
J5
K6
D3
K7
D4
K10
D12
D13
P7
D14
P10
E1
RFU_2
NC_38
NC_21
NC_39
RFU_3
NC_40
RFU_4
NC_41
RFU_5
NC_42
RFU_6
NC_43
RFU_7
NC_44
RFU_8
NC_45
RFU_9
NC_46
RFU_10
NC_47
RFU_11
NC_48
RFU_12
NC_49
RFU_13
NC_50
RFU_14
NC_51
RFU_15
NC_52
RFU_16
NC_53
E2
K5
E3
RST_N
E12
E13
C6
E14
F1
F2
DAT6
M4
N4
P3
F3
P5
F12
VCCQ_1
VCCQ_2
VCCQ_3
VCCQ_4
VCCQ_5
F13
F14
G1
E6
G2
F5
J10
G12
K9
G13
VCC_1
VCC_2
VCC_3
VCC_4
G14
H1
C2
H2
VDDI
H3
H12
H13
E7
H14
G5
J1
H10
J2
K8
C4
J3
J12
N2
J13
N5
J14
EMMC_RESET_BALL
P4
P6
K1
K2
VSS_1
DU6
DU7
DU8
DUMMY_6
DUMMY_7
DUMMY_8
DUMMY_14
DUMMY_15
DUMMY_16
NC_69
NC_70
NC_71
NC_72
NC_73
NC_74
NC_75
NC_82
VSSQ_5
NC_83
NC_84
NC_85
K12
K14
A2
L1
A8
L2
A9
L3
A10
L12
A11
L13
A12
L14
A13
M1
A14
M2
B1
M3
B7
M7
B8
M8
B9
M9
B10
M10
B11
M11
B12
M12
B13
M13
B14
M14
C1
C3
N1
N3
NC_86
A1
K13
EMMC_CMD_BALL
N6
C7
NC_1
NC_87
NC_2
NC_88
NC_3
NC_89
NC_4
NC_90
NC_5
NC_91
NC_6
NC_92
NC_7
NC_93
NC_8
NC_94
NC_9
NC_95
NC_10
NC_96
NC_11
NC_97
NC_12
NC_98
NC_13
NC_99
NC_14
NC_100
NC_15
NC_101
NC_16
NC_102
NC_17
NC_103
NC_18
NC_104
NC_19
NC_105
NC_20
NC_106
NC_22
NC_107
C12
B3
C13
B4
C14
B5
D1
B6
D2
DAT2
NC_27
DAT3
NC_28
DAT4
NC_29
DAT5
NC_30
DAT6
NC_31
DAT7
NC_32
NC_33
D3
NC_34
M6
D4
M5
D12
D13
CLK
NC_35
CMD
NC_36
NC_37
D14
E1
A6
E2
A7
E3
C5
E12
E5
E13
E8
E9
E14
E10
F1
F2
F10
F3
G3
G10
F12
F13
H5
F14
J5
G1
K6
K7
G2
K10
G12
G13
P7
G14
P10
H1
NC_38
NC_3
NC_39
NC_4
NC_40
NC_23
NC_41
NC_42
NC_46
NC_43
NC_47
NC_44
NC_48
NC_45
NC_49
NC_52
NC_50
NC_58
NC_51
NC_59
NC_53
NC_66
NC_54
NC_73
NC_55
NC_80
NC_56
NC_81
NC_57
NC_82
NC_60
NC_116
NC_61
NC_119
NC_62
H2
K5
H3
RESET
H12
H13
C6
H14
M4
J1
J2
N4
J3
P3
P5
J12
VCCQ_1
VCCQ_2
VCCQ_3
VCCQ_4
VCCQ_5
J13
J14
K1
E6
K2
F5
K3
J10
K9
K12
VCC_1
VCC_2
VCC_3
VCC_4
K13
K14
C2
L1
VDDI
L2
L3
L12
E7
L13
G5
H10
L14
K8
M1
C4
M2
M3
N2
M7
N5
M8
P4
M9
P6
M10
VSS_1
VSS_2
VSS_3
VSS_4
NC_63
NC_64
NC_65
NC_67
NC_68
NC_69
NC_70
NC_71
NC_72
NC_74
NC_75
NC_76
NC_77
NC_78
NC_79
NC_83
NC_84
NC_85
NC_86
NC_87
NC_88
NC_89
NC_90
NC_91
NC_92
VSSQ_1
NC_93
VSSQ_2
NC_94
VSSQ_3
NC_95
VSSQ_4
NC_96
VSSQ_5
NC_97
NC_98
M11
NC_99
M12
NC_100
A1
M13
M14
A2
N1
A8
N3
A9
N6
A10
N7
A11
N8
A12
N9
A13
N10
A14
N11
B1
N12
B7
N13
B8
N14
B9
B10
P1
P2
B11
P8
B12
P9
B13
P11
B14
P12
C1
C3
P13
C7
P14
NC_1
NC_101
NC_2
NC_102
NC_5
NC_103
NC_6
NC_104
NC_7
NC_105
NC_8
NC_106
NC_9
NC_107
NC_10
NC_108
NC_11
NC_109
NC_12
NC_110
NC_13
NC_111
NC_14
NC_112
NC_15
NC_113
NC_16
NC_114
NC_17
NC_115
NC_18
NC_117
NC_19
NC_118
NC_20
NC_120
NC_21
NC_121
NC_22
NC_122
NC_24
NC_123
C8
A3
C9
A4
C10
A5
C11
B2
C12
B3
C13
B4
C14
B5
D1
B6
D2
DAT2
NC_27
DAT3
NC_28
DAT4
NC_29
DAT5
NC_30
DAT6
NC_31
DAT7
NC_32
NC_33
NC_34
M6
M5
D12
D13
CLK
NC_35
CMD
NC_36
NC_37
D14
E1
A6
E2
A7
E3
C5
E12
E5
E13
E8
NC_38
E9
E14
E10
F1
F2
F10
F3
G3
G10
F12
F13
H5
F14
J5
G1
K6
K7
G2
K10
G12
G13
P7
G14
P10
H1
NC_3
NC_39
NC_4
NC_40
NC_23
NC_41
NC_42
NC_46
NC_43
NC_47
NC_44
NC_48
NC_45
NC_49
NC_52
NC_50
NC_58
NC_51
NC_59
NC_53
NC_66
NC_54
NC_73
NC_55
NC_80
NC_56
NC_81
NC_57
NC_82
NC_60
NC_116
NC_61
NC_119
NC_62
NC_63
H2
NC_64
K5
H3
RSTN
H12
H13
C6
H14
VDD_1
M4
J1
J2
N4
J3
P3
VDD_2
VDD_3
VDD_4
P5
J12
VDD_5
J13
J14
K1
E6
K2
F5
K3
J10
VDDF_1
VDDF_2
VDDF_3
K9
K12
VDDF_4
K13
K14
C2
L1
VDDI
L2
L3
L12
C4
L13
E7
VSS_1
VSS_2
G5
L14
VSS_3
H10
M1
K8
M2
M3
N2
M7
N5
M8
P4
M9
P6
M10
NC_65
NC_67
NC_68
NC_69
NC_70
NC_71
NC_72
NC_74
NC_75
NC_76
NC_77
NC_78
NC_79
NC_83
NC_84
NC_85
NC_86
NC_87
NC_88
NC_89
NC_90
NC_91
VSS_4
NC_92
VSS_5
NC_93
VSS_6
NC_94
VSS_7
NC_95
VSS_8
NC_96
VSS_9
NC_97
NC_98
M11
NC_99
M12
NC_100
A1
M13
M14
A2
N1
A8
N3
A9
N6
A10
N7
A11
N8
A12
N9
A13
N10
A14
N11
B1
N12
B7
N13
B8
N14
B9
B10
P1
P2
B11
P8
B12
P9
B13
P11
B14
P12
C1
C3
P13
C7
P14
NC_1
NC_101
NC_2
NC_102
NC_5
NC_103
NC_6
NC_104
NC_7
NC_105
NC_8
NC_106
NC_9
NC_107
NC_10
NC_108
NC_11
NC_109
NC_12
NC_110
NC_13
NC_111
NC_14
NC_112
NC_15
NC_113
NC_16
NC_114
NC_17
NC_115
NC_18
NC_117
NC_19
NC_118
NC_20
NC_120
NC_21
NC_121
NC_22
NC_122
NC_24
NC_123
A4
C9
A5
C10
B2
C11
B3
C12
B4
C13
B5
C14
B6
D1
C8
DAT0
NC_23
DAT1
NC_24
DAT2
NC_25
DAT3
NC_26
DAT4
NC_27
DAT5
NC_28
DAT6
NC_29
DAT7
NC_30
D2
NC_31
D3
NC_32
M6
D4
M5
D12
CLK
NC_33
CMD
NC_34
D13
NC_35
D14
NC_36
A6
E1
A7
E2
C5
E3
E5
E12
E8
E13
E9
E14
E10
F1
F10
F2
G3
F3
G10
F12
H5
F13
J5
F14
K6
G1
K7
G2
K10
G12
P7
G13
P10
G14
RFU_1
NC_37
RFU_2
NC_38
NC_21
NC_39
RFU_3
NC_40
RFU_4
NC_41
RFU_5
NC_42
RFU_6
NC_43
RFU_7
NC_44
RFU_8
NC_45
RFU_9
NC_46
RFU_10
NC_47
RFU_11
NC_48
RFU_12
NC_49
RFU_13
NC_50
RFU_14
NC_51
RFU_15
NC_52
RFU_16
NC_53
H1
NC_54
H2
NC_55
K5
H3
RSTN
H12
H13
C6
H14
M4
J1
N4
J2
P3
J3
P5
J12
VCCQ_1
VCCQ_2
VCCQ_3
VCCQ_4
VCCQ_5
J13
J14
E6
K1
F5
K2
J10
K3
K9
K12
VCC_1
VCC_2
VCC_3
VCC_4
K13
K14
C2
L1
VDDI
L2
L3
E7
L12
G5
L13
H10
L14
K8
M1
C4
M2
N2
M3
N5
M7
P4
M8
P6
M9
VSS_1
VSS_2
VSS_3
VSS_4
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
M10
M11
M12
A1
M13
A2
M14
A8
N1
A9
N3
A10
N6
A11
N7
A12
N8
A13
N9
A14
N10
B1
N11
B7
N12
B8
N13
B9
N14
B10
P1
B11
P2
B12
P8
B13
P9
B14
P11
C1
P12
C3
P13
C7
P14
NC_1
NC_56
NC_57
NC_58
NC_59
NC_60
NC_61
NC_62
NC_63
NC_64
NC_65
NC_66
NC_67
NC_68
NC_69
NC_70
NC_71
NC_72
NC_73
NC_74
NC_75
NC_76
NC_77
NC_78
NC_79
NC_80
NC_81
NC_82
NC_83
NC_84
NC_85
NC_86
NC_87
NC_2
NC_88
NC_3
NC_89
NC_4
NC_90
NC_5
NC_91
NC_6
NC_92
NC_7
NC_93
NC_8
NC_94
NC_9
NC_95
NC_10
NC_96
NC_11
NC_97
NC_12
NC_98
NC_13
NC_99
NC_14
NC_100
NC_15
NC_101
NC_16
NC_102
NC_17
NC_103
NC_18
NC_104
NC_19
NC_105
NC_20
NC_106
NC_22
NC_107
C9
C10
C11
C12
C13
C14
D1
D2
D3
D4
D12
D13
D14
E1
E2
E3
E12
E13
E14
F1
F2
F3
F12
F13
F14
G1
G2
G12
G13
G14
H1
H2
H3
H12
H13
H14
J1
J2
J3
J12
J13
J14
K1
K2
K3
K12
K13
K14
L1
L2
L3
L12
L13
L14
M1
M2
M3
M7
M8
M9
M10
M11
M12
M13
M14
N1
N3
N6
N7
N8
N9
N10
N11
N12
N13
N14
P1
P2
P8
P9
P11
P12
P13
P14
N9
N10
N11
N12
N13
N14
P1
P2
P8
IC8100-*8
H26M42002GMR
IC8100-*5
KLM4G1FE3B-B001
EMMC_CLK_BALL
P9
B2
B4
B5
B6
C8
DAT0
NC_25
DAT1
NC_26
DAT2
DAT5
DAT6
DAT7
P12
M6
M5
CLK
CMD
P13
A6
P14
A7
C5
E5
E8
NC_3
NC_4
NC_23
NC_42
NC_43
NC_44
NC_45
NC_52
NC_58
NC_59
NC_66
NC_73
NC_80
NC_81
NC_82
NC_116
K5
RSTN
DU10
C6
M4
DU11
N4
P3
P5
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
DU12
E6
F5
DU13
DU14
DU15
J10
K9
VDDF_2
VDDF_3
C2
VDDI
E7
H10
DU16
VDDF_1
VDDF_4
G5
K8
C4
N2
N5
VSS_2
VSS_3
VSS_4
VSS_5
VSS_1
VSS_6
VSS_7
VSS_8
VSS_9
A1
A2
A8
A9
A10
A11
A12
A13
A14
B1
B7
B8
B9
B10
B11
B12
B13
B14
C1
C3
C7
NC_27
DAT3
DAT4
NC_1
NC_2
NC_5
NC_6
NC_7
NC_8
NC_9
NC_28
NC_29
NC_30
NC_31
NC_32
NC_33
NC_34
NC_35
NC_36
NC_37
NC_38
NC_39
NC_40
NC_41
NC_46
NC_47
NC_48
NC_49
NC_50
NC_51
NC_53
NC_54
NC_55
NC_56
NC_57
NC_60
NC_61
NC_62
NC_63
NC_64
NC_65
NC_67
NC_68
NC_69
NC_70
NC_71
NC_72
NC_74
NC_75
NC_76
NC_77
NC_78
NC_79
NC_83
NC_84
NC_85
NC_86
NC_87
NC_88
NC_89
NC_90
NC_91
NC_92
NC_93
NC_94
NC_95
NC_96
NC_97
NC_98
NC_99
NC_100
NC_101
NC_102
NC_103
NC_104
NC_105
NC_106
NC_107
NC_10
NC_108
NC_11
NC_109
NC_12
NC_110
NC_13
NC_111
NC_14
NC_112
NC_15
NC_113
NC_16
NC_114
NC_17
NC_115
NC_18
NC_117
NC_19
NC_118
NC_20
NC_120
NC_21
NC_121
NC_22
NC_122
NC_24
NC_123
A3
C9
A4
C10
A5
C11
B2
C12
B3
C13
B4
C14
B5
D1
B6
C8
DAT0
NC_23
DAT1
NC_24
DAT2
DAT5
DAT6
DAT7
D2
D3
D4
M6
D12
M5
CLK
CMD
D13
D14
E1
A6
E2
A7
E3
C5
E12
E5
E13
E8
E14
E9
F1
E10
F2
F10
F3
G3
F12
G10
F13
H5
F14
J5
G1
K6
G2
K7
G12
K10
G13
P7
G14
P10
RFU_1
RFU_2
NC_21
RFU_3
RFU_4
RFU_5
RFU_6
RFU_7
RFU_8
RFU_9
RFU_10
RFU_11
RFU_12
RFU_13
RFU_14
RFU_15
RFU_16
H1
H2
H3
K5
RSTN
H12
H13
H14
C6
J1
M4
J2
N4
J3
P3
J12
P5
VCCQ_1
VCCQ_2
VCCQ_3
VCCQ_4
VCCQ_5
J13
J14
K1
E6
K2
F5
K3
J10
K12
K9
VCC_1
VCC_2
VCC_3
VCC_4
K13
K14
L1
C2
VDDI
L2
L3
L12
E7
L13
G5
L14
H10
M1
M2
K8
C4
M3
N2
M7
N5
M8
P4
M9
P6
VSS_1
VSS_2
VSS_3
VSS_4
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
M10
M11
M12
M13
A1
M14
A2
N1
A8
N3
A9
N6
A10
N7
A11
N8
A12
N9
A13
N10
A14
N11
B1
N12
B7
N13
B8
N14
P1
P2
B9
B10
B11
P8
B12
P9
B13
P11
B14
P12
C1
P13
C3
P14
C7
NC_25
DAT3
DAT4
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_26
NC_27
NC_28
NC_29
NC_30
NC_31
NC_32
NC_33
NC_34
NC_35
NC_36
NC_37
NC_38
NC_39
NC_40
NC_41
NC_42
NC_43
NC_44
NC_45
NC_46
NC_47
NC_48
NC_49
NC_50
NC_51
NC_52
NC_53
NC_54
NC_55
NC_56
NC_57
NC_58
NC_59
NC_60
NC_61
NC_62
NC_63
NC_64
NC_65
NC_66
NC_67
NC_68
NC_69
NC_70
NC_71
NC_72
NC_73
NC_74
NC_75
NC_76
NC_77
NC_78
NC_79
NC_80
NC_81
NC_82
NC_83
NC_84
NC_85
NC_86
NC_87
NC_88
NC_89
NC_90
NC_91
NC_92
NC_93
NC_8
NC_94
NC_9
NC_95
NC_10
NC_96
NC_11
NC_97
NC_12
NC_98
NC_13
NC_99
NC_14
NC_100
NC_15
NC_101
NC_16
NC_102
NC_17
NC_103
NC_18
NC_104
NC_19
NC_105
NC_20
NC_106
NC_22
NC_107
IC8100-*9
THGBMAG5A1JBAIR
IC8100-*10
THGBMAG6A2JBAIR
IC8100-*11
THGBMAG7A2JBAIR
IC8100-*7
KLMAG2GE4A-A001
A3
B3
P11
IC8100-*6
THGBM5G6A2JBAIR
A4
A3
A4
A5
P4
A3
C9
A4
C10
A5
C11
B2
C12
B3
C13
B4
C14
B5
D1
B6
C8
DAT0
DAT1
DAT2
DAT3
DAT4
DAT5
DAT6
DAT7
D2
D3
D4
M6
D12
M5
CLK
CMD
D13
D14
E1
A6
E2
A7
E3
C5
E12
E5
E13
E8
E14
E9
F1
E10
F2
F10
F3
G3
F12
G10
F13
H5
F14
J5
G1
K6
G2
K7
G12
K10
G13
P7
G14
P10
RFU_1
RFU_2
RFU_3
RFU_4
RFU_5
RFU_6
NC_39
RFU_7
RFU_8
RFU_9
RFU_10
RFU_11
RFU_12
RFU_13
RFU_14
RFU_15
NC_104
H1
H2
H3
K5
RESET
H12
H13
H14
C6
J1
M4
J2
N4
J3
P3
J12
P5
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
J13
J14
K1
E6
K2
F5
K3
J10
K12
K9
VDDF_1
VDDF_2
VDDF_3
VDDF_4
K13
K14
L1
C2
VDDI
L2
L3
L12
E7
L13
G5
L14
H10
M1
M2
K8
C4
M3
N2
M7
N5
M8
P4
M9
P6
VSS_2
VSS_3
VSS_4
VSS_9
VSS_1
VSS_5
VSS_6
VSS_7
VSS_8
M10
M11
M12
M13
A1
M14
A2
N1
A8
N3
A9
N6
A10
N7
A11
N8
A12
N9
A13
N10
A14
N11
B1
N12
B7
N13
B8
N14
P1
P2
B9
B10
B11
P8
B12
P9
B13
P11
B14
P12
C1
P13
C3
P14
C7
NC_1
NC_2
NC_3
NC_4
NC_22
NC_23
NC_24
NC_25
NC_26
NC_27
NC_28
NC_29
NC_30
NC_31
NC_32
NC_33
NC_34
NC_35
NC_36
NC_37
NC_38
NC_40
NC_41
NC_42
NC_43
NC_44
NC_45
NC_46
NC_47
NC_48
NC_49
NC_50
NC_51
NC_52
NC_53
NC_54
NC_55
NC_56
NC_57
NC_58
NC_59
NC_60
NC_61
NC_62
NC_63
NC_64
NC_65
NC_66
NC_67
NC_68
NC_69
NC_70
NC_71
NC_72
NC_73
NC_74
NC_75
NC_76
NC_77
NC_78
NC_79
NC_80
NC_81
NC_82
NC_83
NC_84
NC_85
NC_86
NC_87
NC_88
NC_89
NC_90
NC_5
NC_91
NC_6
NC_92
NC_7
NC_93
NC_8
NC_94
NC_9
NC_95
NC_10
NC_96
NC_11
NC_97
NC_12
NC_98
NC_13
NC_99
NC_14
NC_100
NC_15
NC_101
NC_16
NC_102
NC_17
NC_103
NC_18
RFU_16
NC_19
NC_105
NC_20
NC_106
NC_21
NC_107
C9
C10
A5
B2
C11
B3
C12
B4
C13
C14
B5
B6
D1
D4
M6
D12
M5
DU2
DU3
DU4
DU5
DU6
DU7
DU8
DUMMY_2
DUMMY_10
DUMMY_3
DUMMY_11
DUMMY_4
DUMMY_12
DUMMY_5
DUMMY_13
DUMMY_6
DUMMY_14
DUMMY_7
DUMMY_15
DUMMY_8
DUMMY_16
DAT5
DAT6
CLK
CMD
D14
E2
E3
E12
A6
A7
C5
E13
E5
E14
E8
F1
E9
F2
F3
E10
F12
F10
F13
G3
F14
G10
G1
G2
H5
J5
G12
G13
G14
H1
K6
K7
K10
H2
P7
H3
P10
NC_3
NC_4
NC_23
NC_42
NC_43
NC_44
NC_45
NC_52
NC_58
NC_59
NC_66
NC_73
NC_80
NC_81
NC_82
NC_116
NC_119
H12
H13
H14
J1
K5
RESET
J2
J3
J12
J13
C6
M4
J14
K1
N4
K2
P3
K3
P5
VCCQ_1
VCCQ_2
VCCQ_3
VCCQ_4
VCCQ_5
K12
K13
K14
E6
L1
L2
L3
L12
F5
J10
K9
VCC_1
VCC_2
VCC_3
VCC_4
L13
L14
M1
C2
M2
VDDI
M3
M7
M8
E7
M9
G5
M10
M11
H10
K8
M12
M13
M14
C4
N2
N1
N5
N3
P4
N6
P6
VSS_1
VSS_2
A9
P1
A10
P8
A11
P9
A12
P11
A13
P12
A14
B1
P14
B7
DU10
NC_41
NC_46
NC_47
NC_48
NC_49
NC_50
NC_51
NC_53
NC_54
NC_55
NC_56
NC_57
NC_60
NC_61
NC_62
NC_63
NC_64
NC_65
NC_67
NC_68
NC_69
NC_70
NC_71
NC_72
NC_74
NC_75
NC_76
NC_77
NC_78
NC_79
NC_83
NC_84
NC_85
NC_86
NC_87
NC_88
NC_89
NC_90
VSSQ_1
NC_93
VSSQ_2
NC_94
VSSQ_3
NC_95
VSSQ_4
NC_96
NC_97
NC_100
A1
A2
A8
B11
B12
DU11
DU12
NC_39
NC_40
NC_99
N12
P13
NC_37
NC_38
NC_98
N13
P2
NC_35
NC_36
NC_91
N9
N14
NC_33
NC_34
NC_92
N10
N11
NC_30
NC_31
NC_32
VSS_3
VSSQ_5
N7
NC_28
NC_29
VSS_4
N8
B10
DUMMY_9
DAT3
DAT4
E1
DU9
DUMMY_1
NC_26
NC_27
D2
D13
NC_25
DAT1
DAT2
D3
B8
DU1
DAT0
DAT7
B9
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
NC_26
N8
P6
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
NC_25
DAT1
D3
D4
A3
C8
DAT0
N7
DU9
DUMMY_13
NC_68
VSSQ_4
NC_119
DUMMY_5
NC_67
NC_81
P10
DU5
NC_66
VSSQ_3
K7
DUMMY_12
NC_65
NC_80
P7
DUMMY_4
NC_64
VSSQ_2
K10
DUMMY_11
NC_63
NC_79
J5
DUMMY_3
NC_62
VSSQ_1
K6
DU4
NC_61
NC_78
G3
DU3
NC_60
VSS_4
H5
DUMMY_10
NC_59
NC_77
G10
DUMMY_2
NC_58
VSS_3
E10
DUMMY_9
NC_57
NC_76
F10
DUMMY_1
NC_56
VSS_2
E9
DU2
NC_55
K3
NC_123
DU1
NC_54
B2
NC_26
B13
DU13
B14
DU14
C1
DU15
C3
DU16
C7
NC_1
NC_101
NC_2
NC_102
NC_5
NC_103
NC_6
NC_104
NC_7
NC_105
NC_8
NC_106
NC_9
NC_107
NC_10
NC_108
NC_11
NC_109
NC_12
NC_110
NC_13
NC_111
NC_14
NC_112
NC_15
NC_113
NC_16
NC_114
NC_17
NC_115
NC_18
NC_117
NC_19
NC_118
NC_20
NC_120
NC_21
NC_121
NC_22
NC_122
NC_24
NC_123
C8
A3
C9
A4
C10
A5
C11
B2
C12
B3
C13
B4
C14
B5
D1
B6
DAT0
NC_24
NC_25
DAT3
NC_26
DAT4
NC_27
DAT5
DAT6
DAT7
D2
D3
D4
M6
D12
M5
CLK
CMD
D13
D14
E1
A6
E2
A7
C5
E3
E12
E5
E13
E8
E9
E14
F1
E10
F2
F10
F3
G3
F12
G10
F13
H5
F14
J5
G1
K6
K7
G2
K10
G12
G13
P7
G14
P10
RFU_1
RFU_2
NC_21
RFU_3
RFU_4
RFU_5
RFU_6
RFU_7
RFU_8
RFU_9
RFU_10
RFU_11
RFU_12
RFU_13
RFU_14
RFU_15
RFU_16
H1
H2
K5
H3
RST_N
H12
H13
C6
H14
J1
M4
J2
N4
J3
P3
J12
P5
VCCQ_1
VCCQ_2
VCCQ_3
VCCQ_4
VCCQ_5
J13
J14
E6
K1
K2
F5
K3
J10
K9
K12
VCC_1
VCC_2
VCC_3
VCC_4
K13
K14
C2
L1
VDDI
L2
L3
L12
E7
L13
G5
L14
H10
K8
M1
M2
C4
M3
N2
M7
N5
M8
P4
P6
M9
VSS_1
VSS_2
VSS_3
VSS_4
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
M10
M11
M12
A1
M13
M14
A2
N1
A8
N3
A9
N6
A10
N7
A11
N8
A12
N9
A13
N10
A14
N11
B1
N12
B7
N13
B8
N14
B9
P1
B10
P2
B11
P8
B12
P9
B13
P11
B14
P12
C1
P13
C3
P14
C7
NC_23
DAT1
DAT2
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_28
NC_29
NC_30
NC_31
NC_32
NC_33
NC_34
NC_35
NC_36
NC_37
NC_38
NC_39
NC_40
NC_41
NC_42
NC_43
NC_44
NC_45
NC_46
NC_47
NC_48
NC_49
NC_50
NC_51
NC_52
NC_53
NC_54
NC_55
NC_56
NC_57
NC_58
NC_59
NC_60
NC_61
NC_62
NC_63
NC_64
NC_65
NC_66
NC_67
NC_68
NC_69
NC_70
NC_71
NC_72
NC_73
NC_74
NC_75
NC_76
NC_77
NC_78
NC_79
NC_80
NC_81
NC_82
NC_83
NC_84
NC_85
NC_86
NC_87
NC_88
NC_89
NC_90
NC_91
NC_92
NC_93
NC_94
NC_95
NC_96
NC_97
NC_98
NC_99
NC_100
NC_101
NC_102
NC_103
NC_18
NC_104
NC_19
NC_105
NC_20
NC_106
NC_22
NC_107
C8
A3
C9
A4
C10
A5
C11
B2
C12
B3
C13
B4
C14
B5
D1
B6
DAT0
NC_24
NC_25
DAT3
NC_26
DAT4
NC_27
DAT5
DAT6
DAT7
D2
D3
D4
M6
D12
M5
CLK
CMD
D13
D14
E1
A6
E2
A7
E3
C5
E12
E5
E13
E8
E14
E9
F1
E10
F2
F10
F3
G3
F12
G10
F13
H5
F14
J5
G1
K6
G2
G12
K7
K10
G13
P7
G14
P10
RFU_1
RFU_2
NC_21
RFU_3
RFU_4
RFU_5
RFU_6
RFU_7
RFU_8
RFU_9
RFU_10
RFU_11
RFU_12
RFU_13
RFU_14
RFU_15
RFU_16
H1
H2
H3
K5
RST_N
H12
H13
H14
C6
J1
M4
J2
N4
J3
P3
J12
P5
VCCQ_1
VCCQ_2
VCCQ_3
VCCQ_4
VCCQ_5
J13
J14
K1
E6
K2
F5
K3
J10
K12
K9
VCC_1
VCC_2
VCC_3
VCC_4
K13
K14
L1
C2
VDDI
L2
L3
L12
E7
L13
G5
L14
H10
M1
K8
M2
C4
M3
N2
M7
N5
M8
P4
M9
P6
VSS_1
VSS_2
VSS_3
VSS_4
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
M10
M11
M12
M13
A1
M14
A2
N1
A8
N3
A9
N6
A10
N7
A11
N8
A12
N9
A13
N10
A14
N11
B1
N12
B7
N13
B8
N14
B9
P1
B10
P2
B11
P8
B12
P9
B13
P11
B14
P12
C1
P13
C3
P14
C7
NC_23
DAT1
DAT2
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_28
NC_29
NC_30
NC_31
NC_32
NC_33
NC_34
NC_35
NC_36
NC_37
NC_38
NC_39
NC_40
NC_41
NC_42
NC_43
NC_44
NC_45
NC_46
NC_47
NC_48
NC_49
NC_50
NC_51
NC_52
NC_53
NC_54
NC_55
NC_56
NC_57
NC_58
NC_59
NC_60
NC_61
NC_62
NC_63
NC_64
NC_65
NC_66
NC_67
NC_68
NC_69
NC_70
NC_71
NC_72
NC_73
NC_74
NC_75
NC_76
NC_77
NC_78
NC_79
NC_80
NC_81
NC_82
NC_83
NC_84
NC_85
NC_86
NC_87
NC_88
NC_89
NC_90
NC_91
NC_92
NC_93
NC_94
NC_95
NC_96
NC_97
NC_98
NC_99
NC_100
NC_101
NC_102
NC_103
NC_18
NC_104
NC_19
NC_105
NC_20
NC_106
NC_22
NC_107
C8
A3
C9
A4
C10
A5
C11
B2
C12
B3
C13
B4
C14
B5
D1
B6
C8
DAT0
DAT3
DAT4
DAT5
DAT6
DAT7
D2
D3
D4
M6
D12
M5
CLK
CMD
D13
D14
E1
A6
E2
A7
C5
E3
E12
E5
E13
E8
E9
E14
F1
E10
F2
F10
F3
G3
F12
G10
F13
H5
F14
J5
G1
K6
K7
G2
K10
G12
G13
P7
G14
P10
RFU_1
RFU_2
NC_21
RFU_3
RFU_4
RFU_5
RFU_6
RFU_7
RFU_8
RFU_9
RFU_10
RFU_11
RFU_12
RFU_13
RFU_14
RFU_15
RFU_16
H1
H2
K5
H3
RST_N
H12
H13
C6
H14
J1
M4
J2
N4
J3
P3
J12
P5
VCCQ_1
VCCQ_2
VCCQ_3
VCCQ_4
VCCQ_5
J13
J14
E6
K1
K2
F5
K3
J10
K9
K12
VCC_1
VCC_2
VCC_3
VCC_4
K13
K14
C2
L1
VDDI
L2
L3
L12
E7
L13
G5
L14
H10
K8
M1
M2
C4
M3
N2
M7
N5
M8
P4
P6
M9
VSS_1
VSS_2
VSS_3
VSS_4
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
M10
M11
M12
A1
M13
M14
A2
N1
A8
N3
A9
N6
A10
N7
A11
N8
A12
N9
A13
N10
A14
N11
B1
N12
B7
N13
B8
N14
B9
P1
B10
P2
B11
P8
B12
P9
B13
P11
B14
P12
C1
P13
C3
P14
C7
NC_23
DAT1
DAT2
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_18
NC_19
NC_24
TOSHIBA_EMMC_16GB_V4.5
EMMC_DATA[5]
NC_26
E5
NC_37
A5
C11
NC_25
DAT1
TOSHIBA_EMMC_8GB_V4.5
EMMC_DATA[3]
EMMC_DATA[4]
B2
DAT1
C8
RFU_1
C10
DAT0
TOSHIBA_EMMC_4GB_V4.5
A5
NC_25
NC_36
A4
HYNIX_EMMC_8GB
EMMC_DATA[2]
DAT0
NC_34
A3
C9
SAMSUNG_EMMC_16G
EMMC_DATA[1]
A4
CMD
A6
A7
A3
NC_33
NC_35
IC8100
H26M31002GPR
EMMC_DATA[0]
CLK
TOSHIBA_EMMC_4GB
R8117
10K
10K
10K
10K
10K
R8107
R8106
R8105
R8104
10K
10K
10K
10K
R8103
R8102
EMMC DATA LINE
10K PULL/UP
FOR M13
NC_32
SAMSUNG_EMMC_4GB
EMMC_DATA[0-7]
R8100
EMMC_SERIAL_22
AR8100
22
1/16W
R8101
R8107-*1
R8106-*1
R8105-*1
R8104-*1
R8103-*1
R8102-*1
R8101-*1
R8100-*1
NC_31
C8
TOSHIBA_EMMC_8GB
47K
47K
47K
47K
47K
47K
47K
EMMC DATA LINE 47K PULL/UP
DAT0
IC8100-*4
THGBM5G7A2JBAIR
IC8100-*3
KLM2G1HE3F-B001
TOSHIBA_EMMC_16GB
A4
HYNIX_EMMC_2GB
A3
IC8100-*2
H26M21001ECR
SAMSUNG_EMMC_2GB
IC8100-*1
THGBM5G5A1JBAIR
NC_25
NC_26
NC_27
NC_28
NC_29
NC_30
NC_31
NC_32
NC_33
NC_34
NC_35
NC_36
NC_37
NC_38
NC_39
NC_40
NC_41
NC_42
NC_43
NC_44
NC_45
NC_46
NC_47
NC_48
NC_49
NC_50
NC_51
NC_52
NC_53
NC_54
NC_55
NC_56
NC_57
NC_58
NC_59
NC_60
NC_61
NC_62
NC_63
NC_64
NC_65
NC_66
NC_67
NC_68
NC_69
NC_70
NC_71
NC_72
NC_73
NC_74
NC_75
NC_76
NC_77
NC_78
NC_79
NC_80
NC_81
NC_82
NC_83
NC_84
NC_85
NC_86
NC_87
NC_88
NC_89
NC_90
NC_91
NC_92
NC_93
NC_94
NC_95
NC_96
NC_97
NC_98
NC_99
NC_100
NC_101
NC_102
NC_103
NC_104
NC_105
NC_20
NC_106
NC_22
NC_107
C9
C10
C11
C12
C13
C14
D1
D2
D3
D4
D12
D13
D14
E1
E2
E3
E12
E13
E14
F1
F2
F3
F12
F13
F14
G1
G2
G12
G13
G14
H1
H2
H3
H12
H13
H14
J1
J2
J3
J12
J13
J14
K1
K2
K3
K12
K13
K14
L1
L2
L3
L12
L13
L14
M1
M2
M3
M7
M8
M9
M10
M11
M12
M13
M14
N1
N3
N6
N7
N8
N9
N10
N11
N12
N13
N14
P1
P2
P8
P9
P11
P12
P13
P14
BSD-14Y-UD-081-HD
eMMC
2013.12.17
81
LGE Internal Use Only
XTAL(24.75MHz)
1
4
2
3
GND_1
C12000
24pF
50V
SW12000
JTP-1127WEM
GND_2
12507WS-08L
R12022
330
X-TAL_2
+3.3V_NORMAL
D14_HWRESET
XTAL_OUT
D14_DEBUG
P12001
12507WS-10L
C12008
0.1uF
16V
1K
D14_DEBUG
4
2
C12010
0.1uF
16V
1
R12068
C12003
0.1uF
16V
C12001
24pF
50V
+3.3V_NORMAL
P12006
Serial Flash Boot Test
3
XTAL_IN
JTAG2 for HEVC
+3.3V_NORMAL
1
X-TAL_1
JTAG1 for HEVC
SPI/I2C For Aardvak Interface
R12004
1M
X12000
24.75MHz
2
1
TDI_1
TDI_2
2
3
4
R12027
10
5
D13_INT
GPIO[5]
- 1 : Serial Flash Boot
- 0 : Live Boot
+3.3V_NORMAL
6
R12063
0
R12064
0
R12065
0
R12066
0
0
A8
H21
TRST_N_1
K22
TMS_1
H20
TCK_1
J21
TDI_1
J20
TDO_1
P19
TRST_N_2
M19
TMS_2
L19
TCK_2
TDI_2
TMS_0
TDO_2
N19
K19
TCK_0
TDI_0
UART_RX_0
TDO_0
UART_TX_0
R21
T20
UART_RX_1
T21
R12010
33
N20
SOC_SPI0_CS0
R12011
33
P22
33
P20
SOC_SPI0_MISO
R12013
33
P21
SPI_SCLK_M
R12014
33
M22
R12012
SOC_SPI0_MOSI
SPI_CS_M
R12015
33
M21
SPI_MOSI_M
R12016
33
N21
M20
SPI_MISO_M
33
L20
R12019
33
L21
I2C_SCL2
R12020
33
K20
I2C_SDA2
R12021
33
K21
HDMI0_DDC_CK
TRST_1
HDMI0_DDC_DA
TMS_1
HDMI0_HPD
TCK_1
HDMI0_REXT
TDI_1
HDMI0_CEC
TDO_1
TRST_2
HDMI0_TX0N
TCK_2
HDMI0_TX0P
TDI_2
HDMI0_TX1N
TDO_2
HDMI0_TX1P
HDMI0_TX2N
UART_RXD0
HDMI0_TX2P
UART_TXD0
HDMI0_TXCN
UART_RXD1
HDMI0_TXCP
HDMI1_DDC_DA
SPI_CS_S
HDMI1_HPD
SPI_MOSI_S
HDMI1_REXT
SPI_MISO_S
SPI_SCK_M
HDMI1_CEC
C20
D13_STPO_SOP
D20
D13_STPO_VAL
D21
D13_STPO_ERR
E21
D13_STPO_DATA
E20
F22
F21
F20
G21
G20
HDMI1_TX1N
SCL_S
HDMI1_TX1P
SDA_S
HDMI1_TX2N
SCL_M
HDMI1_TX2P
SDA_M
HDMI1_TXCN
SMODE[0]
STPI_VAL
SMODE[1]
STPI_ERR
R12098 15K
R12097 15K
R12096 15K
2K
1K
R12032
R12039 27K
2K
UART0 For system
UART1 For HEVC
+3.3V_NORMAL
P12007
12507WS-04L
C15
B16
C16
B17
A17
B14
C14
HDMI0_TX0N
+3.3V_NORMAL
HDMI0_TX0P
HDMI0_TX1N
HDMI0_TX1P
HDMI0_TX2N
HDMI0_TX2P
HDMI0_TXCN
HDMI0_TXCP
A12
B12
C13
B10
C10
B11
A11
B8
C8
A20
R12103
1
HDMI1_TX0N
HDMI1_TX0P
HDMI1_TX1N
HDMI1_TX1P
HDMI1_TX2N
R12089
4.7K
4.7K
2
+3.3V_NORMAL
UART_RX_0
UART_RX_1
SPI FLASH(4MByte)
3
HDMI1_DDC_CK
R12060
HDMI1_DDC_DA
10K
IC12002
MX25L3206EM2I-12G
SPI_CS_M
B13
C9
HDMI1_DDC_DA
CS#
C11
+3.3V_NORMAL
HDMI1_DDC_CK
R12062
SO/SIO1
SPI_MISO_M
R12054
0
1
8
2
7
3
6
VCC
HOLD#
33
UART_TX_0
UART_TX_1
5
C12011
0.1uF
16V
C12009
0.1uF
16V
R12073
3.3K
WP#
FLASH_WP
R12061
10K
OPT
4
C12005
0.1uF
GND
4
5
SCLK
SPI_SCLK_M
SI/SIO0
SPI_MOSI_M
HDMI1_TX2P
HDMI1_TXCN
HDMI1_TXCP
SMODE[0]
SMODE[1]
C21
STPI_DATA[0]
TMODE[0]
STPI_DATA[1]
TMODE[1]
STPI_DATA[2]
TMODE[2]
STPI_DATA[3]
TMODE[3]
B20
B21
B22
STPI_DATA[4]
STPI_DATA[5]
STPI_DATA[6]
+3.3V_NORMAL
R12005
1K
OPT
R12024
1K
GPIO[5]
SMODE[1]
SMODE[0]
I2C_SCL2
HDMI0_DDC_DA
A21
STPI_SOP
0
C19
HDMI1_TXCP
STPI_CLK
+3.3V_NORMAL
+3.3V_NORMAL
R12001
1K
OPT
HDMI1_TX0P
R12072
10
11
STPI_DATA[7]
R12050
0
OPT
H22
HDMI1_TX0N
I2C_SDA2
HDMI0_DDC_CK
B9
SPI_MOSI_M
FLASH_WP
0
B19
HDMI1_DDC_CEC
SPI_CS_M
0
C17
C12
HDMI1_DDC_CK
SPI_SCLK_S
9
HDMI0_DDC_DA
B18
B15
TMS_2
TRST_N_1
HDMI0_DDC_CK
A18
HDMI0_DDC_CEC
D22
D13_STPO_CLK
GPIO[0]
C18
TDO_0
SPI_MISO_M
R12018
GPIO[1]
U21
GPIO[0]
TDI_0
UART_TXD1
SOC_SPI0_SCLK
U20
R12003
TCK_0
T22
UART_TX_1
R12002
1K
GPIO[1]
GPIO[3]
GPIO[2]
1.6K 1%
Closed to D13
C7
TDO_0
TMS_0
GPIO[4]
V22
R12044
TCK_0
TDI_0
GPIO[2]
V21
TDO_1
TRST_N_2
8
0
GPIO[5]
V20
1K
C6
TRST_0
OPT
R12071
9
R12042 27K
B7
TMS_0
TRST_N_0
GPIO[3]
R12037 2K
TRST_N_0
R12000
GPIO[4]
R12070
8
+3.3V_NORMAL
FLASH_WP
OPT
TDO_2
7
SPI_DL_MODE
R12069
TCK_1
6
SPI_MISO_M
7
R12099
PORES_N
B6
W21
R12041
10K
GPIO[5]
A6
C12002
W20
R12036 2K
0.1uF
GPIO[6]
1.6K 1%
Closed to D13
AR12000
33
SPI_DL_MODE
GPIO[7]
XTALO
R12045
D14_HWRESET
Y22
XTALI
R12095 15K
A3
R12038 15K
B3
XTAL_IN
XTAL_OUT
GPIO[5]
GPIO[4]
GPIO[3]
GPIO[2]
GPIO[1]
GPIO[0]
TMS_1
TCK_2
5
SPI_SCLK_M
R12067
TMS_2
4
SPI_MOSI_M
+3.3V_NORMAL
IC12000
LG1512D
R12023
3.3K
OPT
3
SPI_CS_M
R12006
1K
SMODE[1:0]
- 00 : Normal Mode
- Other : Test Mode
R12025
1K
OPT
GPIO[5]
- 1 : Serial Flash Boot
- 0 : Live Boot
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
BSD-14Y-UD-119-HD
2013.12.17
LGE Internal Use Only
IC12101
H5TQ1G63EFR-PBC
IC12000
LG1512D
VDDC15_D14
M0_DDR_CKE_D14
P7
M0_DDR_A1_D14
P3
M0_DDR_A2_D14
V13
M0_DDR_A0_D14
V15
W17
W9
W16
M0_DDR_A9_D14
W18
M0_DDR_A10_D14
W15
V7
DDR0_ODT
W7
DDR0_CAS_N
V8
W10
R12124
1K 1%
K9
M0_DDR_CKE_D14
0.1uF
OPT
C12107
1%
R12125
1K
K1
M0_DDR_ODT_D14
J3
M0_DDR_RASN_D14
K3
M0_DDR_CASN_D14
L3
M0_DDR_WEN_D14
V6
VDD_2
A11
VDD_3
A12/BC
VDD_4
NC_7
VDD_5
VDD_6
VDD_7
VDD_8
BA0
CKE
VDDQ_4
VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
NC_2
NC_3
M0_DDR_CASN_D14
NC_4
F3
G3
DQSL
B7
DDR0_DQS[0]
M0_DDR_DQS0_D14
Y7
DDR0_DQS_N[0]
VSS_1
DQSU
VSS_2
AA9
DDR0_DQS[1]
AA16
DDR0_DQS[2]
Y16
DDR0_DQS_N[2]
AA18
DDR0_DQS[3]
AB18
AB7
AB19
DDR0_DM[2]
M0_DDR_DQ0_D14
M0_DDR_DQS2_D14
M0_DDR_DQ1_D14
AB16
DDR0_DM[3]
M0_DDR_DQS_N2_D14
DDR1_A[0]
M0_DDR_DQS3_D14
DDR1_A[1]
DDR1_A[4]
M0_DDR_DM1_D14
DDR1_A[5]
M0_DDR_DM2_D14
DDR1_A[6]
M0_DDR_DM3_D14
DDR1_A[7]
DDR1_A[8]
M0_DDR_DQ0_D14
AA12
DDR0_DQ[1]
DDR0_DQ[2]
DDR0_DQ[3]
DDR0_DQ[5]
DDR0_DQ[6]
Y4
M0_DDR_DQ2_D14
Y11
M0_DDR_DQ3_D14
AB12
M0_DDR_DQ5_D14
AA4
M0_DDR_DQ6_D14
DDR0_DQ[9]
DDR0_DQ[10]
DDR0_DQ[12]
DDR0_DQ[13]
DDR0_DQ[14]
DDR0_DQ[15]
DDR0_DQ[16]
DDR0_DQ[17]
M0_DDR_DQ9_D14
Y10
M0_DDR_DQ10_D14
DDR0_DQ[19]
DDR0_DQ[20]
Y9
M0_DDR_DQ12_D14
AB6
M0_DDR_DQ13_D14
AA10
M0_DDR_DQ14_D14
Y6
M0_DDR_DQ15_D14
AA14
M0_DDR_DQ16_D14
Y20
M0_DDR_DQ17_D14
DDR0_DQ[22]
DDR0_DQ[23]
M0_DDR_DQ19_D14
AB13
M0_DDR_DQ20_D14
DDR0_DQ[25]
DDR0_DQ[26]
AA13
M0_DDR_DQ22_D14
Y21
M0_DDR_DQ23_D14
DDR0_DQ[28]
DDR0_DQ[29]
M0_DDR_DQ25_D14
Y19
M0_DDR_DQ26_D14
H4
Y18
M0_DDR_DQ28_D14
AB15
M0_DDR_DQ29_D14
DDR1_BA[1]
DDR1_D_CK
DDR1_D_CK_N
DDR1_CAS_N
K5
U4
P4
N4
K4
P5
Y15
R12101
10K
10K
F8
H3
H8
G2
H7
VSS_6
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
A8
C8
C2
A7
A2
B8
A3
N8
M3
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
L8
A6
K7
M0_U_CLKN_D14
C9
K9
M0_DDR_CKE_D14
D2
240
1%
A7
A8
B2
A9
VDD_1
A10/AP
VDD_2
A11
VDD_3
A12/BC
VDD_4
NC_7
VDD_5
VDD_6
F1
H2
H9
C12110
0.1uF
C12111
0.1uF
K1
M0_DDR_ODT_D14
J3
M0_DDR_RASN_D14
K3
M0_DDR_CASN_D14
L3
M0_DDR_WEN_D14
J9
BA0
VDDQ_2
CK
VDDQ_3
CKE
VDDQ_4
VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
NC_2
NC_3
G8
B7
M1
D3
F7
M0_DDR_DQ17_D14
P1
F2
M0_DDR_DQ18_D14
P9
F8
M0_DDR_DQ19_D14
T1
H3
M0_DDR_DQ20_D14
T9
H8
M0_DDR_DQ21_D14
G2
H7
M0_DDR_DQ23_D14
B9
C8
M0_DDR_DQ26_D14
E2
C2
M0_DDR_DQ27_D14
E8
A7
M0_DDR_DQ28_D14
F9
A2
M0_DDR_DQ29_D14
G1
B8
M0_DDR_DQ30_D14
G9
VSS_3
DML
VSS_4
DMU
VSS_5
VSS_6
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
R9
A8
C1
C9
D2
E9
F1
H2
C12114
0.1uF
H9
C12115
0.1uF
J9
L1
L9
T7
VSS_12
A3
M0_DDR_DQ31_D14
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
DQL6
DQL7
C3
M0_DDR_DQ25_D14
D8
VSS_2
B1
VSSQ_1
D7
M0_DDR_DQ24_D14
D1
R1
A9
VSS_1
DQSU
E3
M0_DDR_DQ16_D14
M9
N9
NC_6
DQSU
E7
M0_DDR_DM3_D14
J8
DQSL
C7
M0_DDR_DM2_D14
J2
N1
DQSL
M0_DDR_DQS_N3_D14
E1
NC_4
F3
M0_DDR_DQS3_D14
B3
K8
J1
NC_1
RESET
G3
K2
A1
VDDQ_1
CK
WE
M0_DDR_DQS2_D14
G7
BA1
L9
T7
D9
VDD_9
T2
M0_DDR_RESET_N_D14
L1
VDD_7
VDD_8
L2
E9
R12129
ZQ
J7
M0_U_CLK_D14
C1
B1
VSSQ_1
DQU0
VDDC15_D14
A5
BA2
M0_DDR_DQ22_D14
DQL7
C3
VREFDQ
A4
M2
M0_DDR_BA0_D14
DQL6
D7
M0_DDR_DQ15_D14
DQU0
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
B9
D1
D8
E2
E8
F9
G1
G9
M1_DDR_BA0_D14
M1_DDR_BA1_D14
M1_DDR_BA2_D14
DDR1_DQS[0]
DDR1_DQS_N[0]
M1_U_CLKN_D14
M1_D_CLK_D14
M1_D_CLKN_D14
M4
M1_DDR_CKE_D14
F4
F5
DDR1_DQS[1]
DDR1_DQS_N[1]
DDR1_DQS[2]
H2
H1
R2
R3
U2
U1
F1
V1
R1
DDR1_DQ[1]
DDR1_DQ[2]
DDR1_DQ[4]
DDR1_DQ[5]
DDR1_DQ[6]
DDR1_DQ[7]
M1_D_CLK_D14
DDR1_DQ[8]
M1_U_CLK_D14
100
R12104
DDR1_DQ[9]
DDR1_DQ[10]
DDR1_DQ[11]
DDR1_DQ[12]
M1_U_CLKN_D14
M1_D_CLKN_D14
DDR1_DQ[13]
DDR1_DQ[14]
DDR1_DQ[15]
VDDC15_D14
DDR1_DQ[16]
VDDC15_D14
VDDC15_D14
DDR1_DQ[17]
M1_1_DDR_VREFCA_D14
DDR1_DQ[19]
DDR1_DQ[20]
1K 1%
R12109
1K 1%
DDR1_DQ[21]
DDR1_DQ[22]
OPT 0.1uF
1%
1K
C12104
R12116
0.1uF
OPT
C12102
1%
R12110
0.1uF
OPT
C12101
1%
DDR1_DQ[18]
DDR1_DQ[23]
1K
1K 1%
M1_DDR_VREFDQ_D14
R12115
M1_1_DDR_VREFDQ_D14
DDR1_DQ[24]
DDR1_DQ[25]
DDR1_DQ[26]
DDR1_DQ[27]
DDR1_DQ[28]
DDR1_DQ[29]
DDR1_DQ[30]
DDR1_DQ[31]
L2
C3
M1_DDR_A0_D14
M1_DDR_A1_D14
E4
F3
IC12100
H5TQ1G63EFR-PBC
M1_U_CLK_D14
M1_DDR_ODT_D14
M1_DDR_A2_D14
M1_DDR_RASN_D14
M1_DDR_A3_D14
M1_DDR_CASN_D14
M1_DDR_A4_D14
M1_DDR_WEN_D14
M1_DDR_A5_D14
M1_DDR_RESET_N_D14
M1_DDR_A7_D14
M1_DDR_A6_D14
M1_DDR_A8_D14
R12123
240
M1_DDR_A9_D14
1%
M1_DDR_RESET_N_D14
R12105
M0_DDR_DQ14_D14
G2
F2
DDR1_DQ[3]
R12106
M1_DDR_A13_D14
G3
D2
1K
M0_DDR_DQ12_D14
M0_DDR_DQ13_D14
T2
U5
M0_DDR_DQ31_D14
R12107
0.1uF
M1_DDR_A11_D14
M1_DDR_A12_D14
L4
DDR1_ZQ_CALIB
DDR1_DQ[0]
OPT
M0_DDR_DQ11_D14
J4
M1_DDR_CKE_D14
100
R12100
M1_DDR_A10_D14
T5
DDR1_DM[3]
C12100
M0_DDR_DQ9_D14
M0_DDR_DQ10_D14
M5
J1
R12102
F2
M0_DDR_DQ7_D14
M1_DDR_A8_D14
DDR1_RST_N
DDR1_DM[2]
1K 1%
F7
M0_DDR_DQ8_D14
M1_DDR_A9_D14
DDR1_WE_N
DDR1_DM[1]
1%
M1_DDR_A7_D14
R5
VSS_5
E3
M1_DDR_A6_D14
H5
E5
DDR1_ODT
DDR1_RAS_N
DDR1_DM[0]
R12130
M1_DDR_A5_D14
R4
DDR1_DQS_N[3]
1K
M0_DDR_DQ6_D14
DDR1_CKE
DDR1_DQS[3]
M1_DDR_VREFCA_D14
M0_DDR_DQ5_D14
T3
DDR1_U_CK
DDR1_U_CK_N
DDR1_DQS_N[2]
VDDC15_D14
M1_DDR_A3_D14
M1_DDR_A4_D14
DDR1_BA[2]
M0_DDR_DQ30_D14
DDR0_DQ[31]
VDDC15_D14
M0_DDR_DQ4_D14
G4
DDR1_BA[0]
M0_DDR_DQ27_D14
AA19
DDR0_DQ[30]
T4
M1_DDR_A2_D14
M0_DDR_DQ24_D14
AA15
Y14
DDR0_DQ[27]
G5
M0_DDR_DQ2_D14
M0_DDR_DQ3_D14
VSS_4
DMU
H1
A3
DDR1_A[15]
M0_DDR_DQ21_D14
AA20
DDR0_DQ[24]
DDR1_A[14]
M0_DDR_DQ18_D14
AA21
AB21
DDR0_DQ[21]
DDR1_A[13]
J5
M1_DDR_A0_D14
M1_DDR_A1_D14
DML
A2
M0_DDR_DQ11_D14
Y13
DDR0_DQ[18]
DDR1_A[12]
M0_DDR_DQ8_D14
AA6
Y5
DDR0_DQ[11]
DDR1_A[11]
N5
R9
M8
VREFCA
M0_DDR_DQ7_D14
AA11
DDR0_DQ[8]
DDR1_A[10]
M0_DDR_DQ4_D14
Y12
DDR0_DQ[7]
DDR1_A[9]
M0_DDR_DQ1_D14
AB4
DDR0_DQ[4]
DDR1_A[2]
M0_DDR_DM0_D14
AA5
DDR0_DQ[0]
L5
DDR1_A[3]
AB10
DDR0_DM[1]
M0_DDR_DQS_N1_D14
M0_DDR_DQS_N3_D14
DDR0_DQS_N[3]
DDR0_DM[0]
D3
M0_DDR_DM1_D14
M0_DDR_DQS1_D14
AB9
DDR0_DQS_N[1]
VSS_3
A1
NC_5
R1
A9
DQSU
A0
M7
M0_DDR_DQS_N2_D14
E7
M0_DDR_DM0_D14
IC12000
LG1512D
M0_DDR_DQS_N0_D14
T3
N9
NC_6
C7
M0_DDR_DQS1_D14
M0_DDR_DQS_N1_D14
N7
M0_DDR_A13_D14
N1
DQSL
1%
AA7
K8
J1
NC_1
RESET
R7
M0_DDR_A12_D14
A1
VDDQ_3
WE
M0_DDR_DQS0_D14
K2
M0_DDR_BA1_D14
VDDQ_2
L7
M0_DDR_A11_D14
M0_DDR_BA2_D14
VDDQ_1
R3
M0_DDR_A10_D14
G7
BA2
CK
T8
M0_DDR_A8_D14
BA1
CK
R2
M0_DDR_A9_D14
D9
VDD_9
M0_DDR_RASN_D14
R12108
240
A10/AP
R8
M0_DDR_A7_D14
B2
VDD_1
T2
M0_DDR_RESET_N_D14
M0_DDR_RESET_N_D14
DDR0_ZQ_CALIB
A7
L2
0.1uF
R12121
0.1uF
R12118
1K 1%
1%
R12119
K7
M0_DDR_DQS_N0_D14
DDR0_RST_N
240
1%
A9
P2
M0_DDR_A6_D14
ZQ
A8
P8
M0_DDR_A5_D14
R12127
L8
A6
N2
M0_DDR_A4_D14
VDDC15_D14
J7
M0_D_CLK_D14
M0_D_CLKN_D14
M0_DDR_WEN_D14
DDR0_WE_N
M3
M0_DDR_BA2_D14
M0_DDR_ODT_D14
W6
DDR0_RAS_N
R12122
M0_DDR_CKE_D14
DDR0_CKE
OPT
W13
OPT
AA8
C12103
M0_D_CLK_D14
M0_D_CLKN_D14
1%
M0_U_CLKN_D14
Y8
1K
AA17
R12114
M0_U_CLK_D14
N8
M0_1_DDR_VREFDQ_D14
1K
Y17
A4
A5
P3
M0_DDR_A3_D14
VREFDQ
M2
M0_DDR_BA1_D14
VDDC15_D14
VDDC15_D14
M0_DDR_VREFDQ_D14
C12105
M0_DDR_BA2_D14
DDR0_BA[2]
0.1uF
W12
DDR0_D_CK_N
R12113
M0_DDR_BA1_D14
1K 1%
M0_DDR_VREFCA_D14
M0_DDR_BA0_D14
V18
DDR0_D_CK
T3
P7
M0_DDR_A2_D14
H1
A3
DDR3
1Gbit
(x16)
N3
M0_DDR_A0_D14
M0_DDR_A1_D14
A2
M7
VDDC15_D14
VDDC15_D14
W8
DDR0_U_CK_N
N7
M0_DDR_BA0_D14
M0_1_DDR_VREFCA_D14
DDR0_U_CK
R7
M0_U_CLKN_D14
V14
DDR0_BA[1]
L7
M0_DDR_A13_D14
DDR0_A[15]
DDR0_BA[0]
R3
A1
M0_DDR_VREFDQ_D14
M8
VREFCA
NC_5
M0_DDR_A13_D14
V16
DDR0_A[14]
T8
M0_DDR_A12_D14
W11
DDR0_A[13]
R2
M0_DDR_A12_D14
M0_D_CLKN_D14
M0_DDR_A11_D14
W14
DDR0_A[12]
R8
M0_DDR_A11_D14
OPT
DDR0_A[11]
P2
M0_DDR_A10_D14
C12106
DDR0_A[9]
M0_U_CLK_D14
M0_D_CLK_D14
M0_DDR_A8_D14
V12
DDR0_A[10]
M0_DDR_A9_D14
M0_DDR_A7_D14
V17
DDR0_A[8]
M0_DDR_A7_D14
M0_DDR_A8_D14
M0_DDR_A5_D14
M0_DDR_A6_D14
V10
DDR0_A[7]
M0_DDR_A3_D14
M0_DDR_A4_D14
1K 1%
DDR0_A[6]
P8
M0_DDR_A6_D14
1%
DDR0_A[5]
N2
M0_DDR_A5_D14
M0_DDR_RESET_N_D14
1K
DDR0_A[4]
M0_DDR_A4_D14
M0_DDR_A2_D14
V9
DDR0_A[3]
10K
M0_DDR_A1_D14
V11
DDR0_A[2]
10K
100
R12117
DDR0_A[1]
M0_DDR_A3_D14
100
R12111
DDR0_A[0]
R12112
R12120
A0
M0_1_DDR_VREFCA_D14
M0_1_DDR_VREFDQ_D14
DDR3
1Gbit
(x16)
N3
M0_DDR_A0_D14
IC12103
H5TQ1G63EFR-PBC
M0_DDR_VREFCA_D14
M1_DDR_A10_D14
M1_DDR_DQS0_D14
M1_DDR_A11_D14
M1_DDR_DQS_N0_D14
M1_DDR_A12_D14
M1_DDR_DQS1_D14
M1_DDR_A13_D14
M1_DDR_DQS_N1_D14
M1_DDR_DQS3_D14
M1_DDR_BA0_D14
M1_DDR_DQS_N3_D14
M1_DDR_BA1_D14
M1_DDR_BA2_D14
M1_DDR_DM0_D14
M1_DDR_DM1_D14
M1_D_CLK_D14
M1_DDR_DM2_D14
M1_D_CLKN_D14
M1_DDR_DM3_D14
M1_DDR_CKE_D14
M1_DDR_ODT_D14
M1_DDR_DQ2_D14
K3
M1_DDR_RASN_D14
M1_DDR_DQ3_D14
C1
M1_DDR_CASN_D14
M1_DDR_DQ4_D14
M1_DDR_DQ5_D14
M1_DDR_DQ6_D14
L3
M1_DDR_DQ7_D14
K2
E2
J3
D3
H3
M1_DDR_WEN_D14
M1_DDR_RESET_N_D14
M1_DDR_DQ9_D14
M1_DDR_DQ10_D14
M1_DDR_DQS0_D14
M1_DDR_DQS_N0_D14
M1_DDR_DQ12_D14
M1_DDR_DQS1_D14
M1_DDR_DQ13_D14
M1_DDR_DQS_N1_D14
M1_DDR_DQ15_D14
M1_DDR_DQ16_D14
W3
M1_DDR_DQ17_D14
M3
M1_DDR_DQ18_D14
M1
Y1
M1_DDR_DM0_D14
M1_DDR_DM1_D14
M1_DDR_DQ0_D14
M1_DDR_DQ19_D14
M1_DDR_DQ1_D14
M1_DDR_DQ20_D14
M1_DDR_DQ2_D14
M1_DDR_DQ21_D14
M2
M1_DDR_DQ3_D14
M1_DDR_DQ22_D14
Y3
M1_DDR_DQ4_D14
M1_DDR_DQ23_D14
W2
M1_DDR_DQ5_D14
M1_DDR_DQ24_D14
P2
M1_DDR_DQ6_D14
M1_DDR_DQ25_D14
V3
M1_DDR_DQ7_D14
M1_DDR_DQ26_D14
N3
M1_DDR_DQ27_D14
U3
M1_DDR_DQ8_D14
M1_DDR_DQ28_D14
M1_DDR_DQ9_D14
P1
M1_DDR_DQ29_D14
V2
M1_DDR_DQ10_D14
M1_DDR_DQ30_D14
P3
M1_DDR_DQ11_D14
M1_DDR_DQ31_D14
M1_DDR_DQ12_D14
M1_DDR_DQ13_D14
M1_DDR_DQ14_D14
M1_DDR_DQ15_D14
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
R8
R2
T8
R3
L7
R7
N7
T3
M3
M1_DDR_A1_D14
A5
A6
L8
K1
J3
K3
L3
VDD_1
A10/AP
VDD_2
A11
VDD_3
A12/BC
VDD_4
NC_7
VDD_5
VDD_6
VDD_7
VDD_8
M1_DDR_A9_D14
G7
M1_DDR_A10_D14
K2
M1_DDR_A11_D14
K8
M1_DDR_A12_D14
N1
M1_DDR_A13_D14
N9
VDDQ_2
VDDQ_3
CKE
VDDQ_4
VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
R9
M1_DDR_BA0_D14
NC_1
NC_2
NC_4
DQSL
C9
M1_U_CLKN_D14
D2
M1_DDR_CKE_D14
E9
F1
H2
C12108
0.1uF
H9
C12109
0.1uF
G2
H7
VSS_2
VSS_3
DML
VSS_4
DMU
VSS_5
VSS_6
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
C2
A7
A2
B8
A3
M1_DDR_RESET_N_D14
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
A1
M3
T7
M1_DDR_DQS2_D14
B3
M1_DDR_DQS3_D14
E1
M1_DDR_DQS_N3_D14
G8
J2
M1_DDR_DM2_D14
J8
M1_DDR_DM3_D14
M1
M9
M8
VREFCA
A2
A3
H1
VREFDQ
A4
VDDC15_D14
A5
A6
L8
240
1%
A8
B2
A9
VDD_1
A10/AP
VDD_2
A11
VDD_3
A12/BC
VDD_4
NC_7
VDD_5
VDD_6
VDD_7
VDD_8
BA0
K1
J3
K3
L3
M1_DDR_DQ16_D14
P1
M1_DDR_DQ17_D14
P9
M1_DDR_DQ18_D14
T1
M1_DDR_DQ19_D14
T9
M1_DDR_DQ20_D14
M1_DDR_DQ21_D14
M1_DDR_DQ23_D14
B9
D1
M1_DDR_DQ24_D14
D8
M1_DDR_DQ25_D14
E2
M1_DDR_DQ26_D14
E8
M1_DDR_DQ27_D14
F9
M1_DDR_DQ28_D14
G1
M1_DDR_DQ29_D14
G9
M1_DDR_DQ30_D14
M1_DDR_DQ31_D14
K2
K8
N1
N9
R1
R9
A1
VDDQ_1
CK
VDDQ_2
CK
VDDQ_3
CKE
VDDQ_4
VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
WE
RESET
NC_2
NC_4
F3
DQSL
A8
C1
C9
D2
E9
F1
H2
C12112
0.1uF
H9
C12113
0.1uF
J1
NC_1
T2
G3
G7
VDD_9
BA2
K9
D9
BA1
J7
K7
R12128
ZQ
A7
M2
N8
DDR3
1Gbit
(x16)
NC_3
M1_DDR_DQ22_D14
DQU0
N2
L9
B1
VSSQ_1
D7
C8
M1_DDR_WEN_D14
J9
DQL6
DQL7
C3
M1_DDR_RASN_D14
A9
VSS_1
DQSU
E3
H8
M1_DDR_ODT_D14
M1_DDR_CASN_D14
L1
P3
A0
L2
M1_DDR_DQS_N2_D14
DQSU
E7
H3
M1_U_CLK_D14
C1
NC_6
C7
F8
M1_DDR_BA2_D14
A8
J1
P7
NC_5
A1
VDDQ_1
N3
M7
R1
DQSL
F2
M1_DDR_A8_D14
D9
M1_DDR_BA1_D14
CK
F3
F7
M1_DDR_A7_D14
VDD_9
CK
RESET
D3
M1_DDR_A6_D14
BA1
T2
B7
M1_DDR_A5_D14
B2
A9
WE
G3
R12126
240
1%
A8
BA0
M1_DDR_A4_D14
ZQ
A7
J7
K9
M1_DDR_A3_D14
VDDC15_D14
BA2
K7
M1_DDR_A2_D14
H1
VREFDQ
A4
M2
N8
M1_DDR_VREFDQ_D14
M1_DDR_A0_D14
M1_DDR_DQ11_D14
M1_DDR_DQ14_D14
Y2
P2
A3
M1_1_DDR_VREFCA_D14
M1_1_DDR_VREFDQ_D14
M8
VREFCA
A2
M1_DDR_DQ8_D14
J2
N2
P8
DDR3
1Gbit
(x16)
NC_3
E1
E3
N2
A1
L2
M1_DDR_DQ0_D14
C2
P3
A0
NC_5
M1_DDR_DQS_N2_D14
L1
P7
M7
M1_DDR_DQS2_D14
M1_DDR_DQ1_D14
N3
IC12102
H5TQ1G63EFR-PBC
M1_DDR_VREFCA_D14
J9
L1
L9
T7
NC_6
DQSL
C7
B7
A9
DQSU
VSS_1
DQSU
VSS_2
VSS_3
E7
D3
DML
VSS_4
DMU
VSS_5
VSS_6
E3
F7
F2
F8
H3
H8
G2
H7
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
C2
A7
A2
B8
A3
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
VSSQ_1
D7
C8
E1
DQL6
DQL7
C3
B3
DQU0
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
B9
D1
D8
E2
E8
F9
G1
G9
BSD-14Y-UD-121-HD
2013.12.17
D14_DDR
LGE Internal Use Only
+1.1V_VDD
20
VREG
VDD
18
NC_2
SW_2
7
17
VIN_3
SW_3
8
16
VIN_2
15
VIN_1
VDDC15_D14
1/16W
1%
+1.1V_VDD_D14
VDDC15_D14
J13
J14
C12223
10uF
16V
J11
C12209 4.7uF
C12202 10uF
J9
J15
K9
K15
L9
L15
M9
4th layer
4th layer
4th layer
C12268 0.1uF
22uF
C12267 0.1uF
C12264
C12201 10uF
C12258 0.1uF
22uF
C12255 0.1uF
H9
C12250
C12207 10uF
C12210 0.1uF
C12211 10uF
C12200 0.1uF
C12239 0.1uF
C12236 0.1uF
C12230 10uF
C12227 22uF
14
C12220
2200pF
50V
C12233 1uF
J12
C12226 22uF
C12221
C12222
1uF
10uF
10V
16V
PGND_5
13
PGND_4
12
10
D12200
IC12000
LG1512D
+1.1V_VDD_D14
19
C12215
470pF
50V
R12216
4.87K
+1.1V_Bypass Cap
6
9
+1.5V_Bypass Cap
L12201
5
8A
20K
R12222
MODE
+12V
1%
1/16W
GND
21
1/16W
1%
TRIP
NC_3
GND1
GND2
[EP]
VO
24
25
26
27
FB
22
SW_1
30V
22uF
1/10W
5%
22uF
IC12200
TPS53513RVER
23
C12217 NC_1
SW_4
R12202
3.3
22uF
3
THERMAL
29
4
1/16W
5%
C12203 C12205 C12212
EN
R2
VBST
L12200
1uH
ZD12200
2.5V
OPT
+1.1V_VDD_D14
2
PGND_1
0.1uF
16V
1
PGND_3
R12200
2K
C12213
R12203
4.7
16V
0.1uF
RF
PGOOD
11
POWER_ON/OFF2_4
28
1%
1/16W
1K
R1
1/16W
5%
PGND_2
R12201
27K
R12205
C12214
1000pF
50V
91K
R12206
1%
1/16W
R12207
39K
R12217
4.99K
R12204
10K
M15
VDDC11_XTAL_D14
N15
VREF_M0_0_D14
L12203
BLM18PG121SN1D
P9
VREF_M1_0_D14
P10
1uF
P11
R12208
R12210
1K 1%
1K 1%
R12212
R12214
1K 1%
1K 1%
P12
VDDC11_XTAL_D14
P13
C12216
P15
C12251
0.1uF
OPT
B4
C12265
0.1uF
OPT
A4
VDDC15_D14
E10
AVDD11_HDMI0_1
VSS_26
AVDD11_HDMI0_2
VSS_27
AVDD11_HDMI1_1
VSS_28
AVDD11_HDMI1_2
VSS_29
DVDD11_1
VSS_30
DVDD11_2
VSS_31
DVDD11_3
VSS_32
DVDD11_4
VSS_33
DVDD11_5
VSS_34
DVDD11_6
VSS_35
DVDD11_7
VSS_36
DVDD11_8
VSS_37
DVDD11_9
VSS_38
DVDD11_10
VSS_39
DVDD11_11
VSS_40
DVDD11_12
VSS_41
DVDD11_13
VSS_42
DVDD11_14
VSS_43
DVDD11_15
VSS_44
DVDD11_16
VSS_45
DVDD11_PLL
VSS_46
DVDD11_XTAL
VSS_47
VSS_48
T9
T10
T11
+12V
VREF_M0_1_D14
+1.5V
T13
T14
VDDC15_D14
L12213
POWER_ON/OFF2_3
IC12201-*1
TPS54327DDAR [EP]GND
VREG5
DCDC_ROHM
IC12201
BD9D320EFJ
R12221
10K
SS
2
9
VFB
8
1
THERMAL
EN
C12204
0.1uF
R12209
R12211
R12213
R12215
1K 1%
1K 1%
1K 1%
1K 1%
VDDC15_D14
DCDC_TI
BLM18PG121SN1D
C12277
10uF
16V
T12
VREF_M1_1_D14
7
3
6
4
5
T16
T17
VIN
C12252
0.1uF
OPT
VBST
SW
T15
+3.3V_Bypass Cap
G7
C12266
0.1uF
OPT
H7
J7
K7
GND
L7
[EP]FIN
M7
N7
L12205
BLM18PG121SN1D
R2
+2.5V_Normal
F13
H10
4th layer
L12210
BLM18PG121SN1D
H16
J16
C12219 4.7uF
L12206
BLM18PG121SN1D
K16
L16
M16
VDD33_XTAL_D14
N16
P16
VREF_M0_0_D14
T8
A5
VDD25_XTAL_D14
L12209
BLM18PG121SN1D
4th layer
VREF_M1_0_D14
VREF_M1_1_D14
DVDD15_DDR0_4
VSS_52
DVDD15_DDR0_5
VSS_53
DVDD15_DDR0_6
VSS_54
DVDD15_DDR0_7
VSS_55
DVDD15_DDR0_8
VSS_56
DVDD15_DDR0_9
VSS_57
DVDD15_DDR1_1
VSS_58
DVDD15_DDR1_2
VSS_59
DVDD15_DDR1_3
VSS_60
DVDD15_DDR1_4
VSS_61
DVDD15_DDR1_5
VSS_62
DVDD15_DDR1_6
VSS_63
DVDD15_DDR1_7
VSS_64
DVDD15_DDR1_8
VSS_65
DVDD15_DDR1_9
VSS_66
VSS_67
AVDD25_HDMI0_1
VSS_68
AVDD25_HDMI0_2
VSS_69
AVDD25_HDMI1_1
VSS_70
AVDD25_HDMI1_2
VSS_71
DVDD25_OTP
VSS_72
DVDD25_PLL
VSS_73
4.7uF
C12257 0.1uF
C12254
VSS_74
DVDD33_1
VSS_75
DVDD33_2
VSS_76
DVDD33_3
VSS_77
DVDD33_4
VSS_78
DVDD33_5
VSS_79
DVDD33_6
VSS_80
DVDD33_7
VSS_81
DVDD33_8
VSS_82
DVDD33_9
VSS_83
DVDD33_10
VSS_84
DVDD33_11
VSS_85
DVDD33_12
VSS_86
DVDD33_XTAL
VSS_87
VSS_88
AB3
AA22
B1
AA1
VREF0_DDR0
VSS_89
VREF1_DDR0
VSS_90
VREF0_DDR1
VSS_91
VREF1_DDR1
VSS_92
VSS_93
VSS_94
A2
A14
B2
C4
C5
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
E6
E7
E8
E9
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
VSS_51
F8
VDD25_D14
VREF_M0_1_D14
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
VSS_50
DVDD15_DDR0_3
VDD33_D14
F12
VDD33_XTAL_D14
Vout=0.765*(1+R1/R2)=1.516V
H15
B5
C12208 10uF
1%
C12279 C12280
2200pF
1uF
50V
10V
1.0V_DCDC_ROHM
ZD12201
2.5V
OPT
C12259 0.1uF
22K
C12283
22uF
10V
C12256 10uF
R12220
C12282
22uF
10V
H12
VDD25_XTAL_D14
22uF
3A
5
H11
+2.5V_Bypass Cap
C12253
4
GND
H14
C12206 10uF
L12214
2.2uH
C12228 0.1uF
6
DVDD15_DDR0_2
H13
NR5040T2R2N
SS
1.0V_DCDC_TI
C12280-*1
3300pF
50V
3
SW
R7
VSS_49
VDD25_D14
C12224 10uF
C12278
100pF
50V
VREG
BOOT
16V
0.1uF
C12281
VDD33_D14
C12225 0.1uF
3.6K
1%
7
+3.3V_NORMAL
22uF
18K
1%
2
P7
VIN
C12218
R1
FB
8
9
R12218 R12219
1
THERMAL
EN
DVDD15_DDR0_1
VSS_1
VSS_95
VSS_2
VSS_96
VSS_3
VSS_97
VSS_4
VSS_98
VSS_5
VSS_99
VSS_6
VSS_100
VSS_7
VSS_101
VSS_8
VSS_102
VSS_9
VSS_103
VSS_10
VSS_104
VSS_11
VSS_105
VSS_12
VSS_106
VSS_13
VSS_107
VSS_14
VSS_108
VSS_15
VSS_109
VSS_16
VSS_110
VSS_17
VSS_111
VSS_18
VSS_112
VSS_19
VSS_113
VSS_20
VSS_114
VSS_21
VSS_115
VSS_22
VSS_116
VSS_23
VSS_117
VSS_24
VSS_118
VSS_25
VSS_119
E11
E12
E13
E14
E15
E16
E17
E18
E19
F6
F7
F9
F10
F11
F14
F15
F16
F17
F18
F19
G6
G18
G19
H6
H18
H19
J6
J10
J18
J19
K6
K10
K11
K12
K13
K14
K18
L6
L10
L11
L12
L13
L14
L18
M6
M10
M11
M12
M13
M14
M18
N6
N9
N10
N11
N12
N13
N14
N18
P6
P14
P18
R6
R18
R19
R20
T6
T7
T18
T19
U6
U7
U8
U9
U10
U11
U12
U13
U14
U15
U16
U17
U18
U19
V4
V5
V19
W4
W5
W19
AA2
AA3
AB2
BSD-14Y-UD-122-HD
2013.12.17
LGE Internal Use Only
UB85/95/UC89 only
+3.3V_NORMAL
VDDP
4st Layer
L2100
BLM18PG121SN1D
C2106
10uF
10V
C2111
10uF
10V
C2128
1uF
10V
C2120
10uF
10V
C2143
0.1uF
16V
C2139
0.1uF
16V
C2134
0.1uF
16V
C2145
0.1uF
16V
C13314
0.1uF
16V
C13315
10uF
10V
Close to Chip side
4st Layer
AVDD_PLL
L2101
BLM18PG121SN1D
C2105
10uF
10V
C2109
0.1uF
16V
C2151
10uF
10V
C13302
0.1uF
16V
IC2500
LGE7411(URSA9)
TXB0N/TX5N
TXB0P/TX5P
TXB1N/TX4N
TXB1P/TX4P
TXB2N/TX3N
TXB2P/TX3P
AG1
AH3
AH1
AH2
AJ3
AJ2
TXBCLKN/TX2N
TXBCLKP/TX2P
AK2
TXB3N/TX1N
TXB3P/TX1P
AL1
TXB4N/TX0N
AK1
AM2
AL2
TXB4P/TX0P
RB0P
AK4
TXA1N/TX10N
AL4
TXA1P/TX10P
TXA2N/TX9N
AM4
TXA2P/TX9P
AK5
AM5
TXACLKN/TX8N
AL5
TXACLKP/TX8P
TXA3N/TX7N
AK6
TXA3P/TX7P
TXA4N/TX6N
TXA4P/TX6P
AL6
AK7
AL7
RB1P
RB2N
RBCKN
RBCKP
AM17
RB3N
VX1_0-
RB3P
VX1_0+
RB4N
VX1_1-
RB4P
VX1_1+
VX1_2+
RC0N
VX1_3-
RC0P
VX1_3+
RC1N
VX1_4-
RC1P
VX1_4+
RC2N
VX1_5-
RC2P
VX1_5+
RCCKN
VX1_6-
RCCKP
VX1_6+
RC3N
VX1_7-
RC3P
VX1_7+
RC4N
VX1_8-
RC4P
VX1_8+
RD0N
VX1_10-
RD0P
VX1_10+
RD1N
VX1_11-
RD1P
VX1_11+
RD2N
VX1_12-
RD2P
VX1_12+
RDCKN
VX1_13-
RDCKP
VX1_13+
RD3N
VX1_14-
RD3P
VX1_14+
VX1_9-
TXD0P/TX17P
TXD1N/TX16N
TXD1P/TX16P
TXD2N/TX15N
TXD2P/TX15P
TXDCLKN/TX14N
TXDCLKP/TX14P
TXD3N/TX13N
TXD3P/TX13P
TXD4N/TX12N
AK8
AM8
AL8
AK9
AL9
AK10
AL10
AM10
AK11
AM11
AL11
TXD4P/TX12P
VX1_9+
RD4N
VX1_15-
RD4P
VX1_15+
VX1_16VX1_16+
AK12
TXC0N/TX23N
TXC0P/TX23P
TXC1N/TX22N
TXC1P/TX22P
TXC2N/TX21N
TXC2P/TX21P
TXCCLKN/TX20N
TXCCLKP/TX20P
TXC3N/TX19N
TXC3P/TX19P
TXC4N/TX18N
AL12
AK13
AL13
AM13
AK14
AM14
AL14
AK15
AL15
AK16
AL16
C2104
10uF
10V
RB2P
AM7
TXD0N/TX17N
RE0N
VX1_17-
RE0P
VX1_17+
RE1N
VX1_18-
RE1P
VX1_18+
RE2N
VX1_19-
RE2P
VX1_19+
C2110
10uF
10V
HDMI_CLK+_URSA9_0
AM19
D3
AL19
HDMI_CLK-_URSA9_0
E3
AL20
HDMI_RX0+_URSA9_0
AM20
AK22
0.1uF
C13008
AL21
0.1uF
C13009
AK23
0.1uF
C13010
TXDBN6_L
AM22
0.1uF
C13011
TXDBP6_L
AK24
0.1uF
C13012
TXDBN5_L
0.1uF
C13013
TXDBP5_L
AL25
0.1uF
C13014
TXDBN4_L
AK25
0.1uF
C13015
TXDBP4_L
AM26
0.1uF
C13016
TXDBN3_L
AK26
0.1uF
C13017
TXDBP3_L
AL27
0.1uF
C13018
AC2
AD3
AC3
AC1
HDMI_RX1+_URSA9_0
E2
HDMI_RX1-_URSA9_0
F1
HDMI_RX2+_URSA9_0
F2
HDMI_RXCN_0
Close to Chip side
HDMI_RX0P_0
HDMI_RX0N_0
HDMI_RX1P_0
0.1uF
C13019
TXDBP2_L
AM28
0.1uF
C13020
TXDBN1_L
AL28
0.1uF
C13021
AL29
0.1uF
C13022
TXDBN0_L
AM29
0.1uF
C13023
TXDBP0_L
AM31
0.1uF
C13024
TXDAN7_L
AL30
0.1uF
C13025
TXDAP7_L
AL32
0.1uF
C13026
TXDAN6_L
0.1uF
HDMI_RX2P_0
C2101
10uF
10V
C2114
10uF
10V
AA3
Y3
Y1
C13027
TXDAP6_L
AK31
0.1uF
C13028
TXDAN5_L
AK32
0.1uF
C13029
TXDAP5_L
AJ30
0.1uF
C13030
TXDAN4_L
AJ31
0.1uF
C13031
TXDAP4_L
AH30
0.1uF
C13064
TXDAN3_L
AH32
0.1uF
C13065
TXDAP3_L
AG30
0.1uF
C13066
TXDAN2_L
U2
V3
U3
U1
C2147
0.1uF
16V
C2146
0.1uF
16V
C2148
0.1uF
16V
C2149
0.1uF
16V
C13307
0.1uF
16V
C2150
10uF
10V
C2107
10uF
10V
Close to Chip side
G1
HDMI_CLK+_URSA9_1
G3
HDMI_CLK-_URSA9_1
H3
HDMI_RX0+_URSA9_1
G2
HDMI_RX0-_URSA9_1
J3
HDMI_RX1+_URSA9_1
0.1uF
C13067
TXDAP2_L
HDMI_RX1-_URSA9_1
0.1uF
C13068
TXDAN1_L
AF30
HDMI_RX2+_URSA9_1
0.1uF
C13069
TXDAP1_L
AD32
0.1uF
C13070
TXDAN0_L
AE30
0.1uF
C13071
TXDAP0_L
H2
J1
J2
HDMI_RXCP_1
C2115
0.1uF
16V
HDMI_RXCN_1
HDMI_RX0P_1
C2123
0.1uF
16V
C13311
10uF
10V
C2154
10uF
10V
HDMI_RX1P_1
Close to Chip side
HDMI_RX1N_1
AVDDL_DRV
HDMI_RX2P_1
4th Layer
HDMI_RX2N_1
HDMI_RX2-_URSA9_1
C13305
0.1uF
16V
HDMI_RX0N_1
L2105
BLM18PG121SN1D
RECKN
RECKP
AH29
RE3N
VX1_HTDPN
RE3P
VX1_LOCKN
C2116
0.1uF
16V
HTPDAn
AG29
RE4N
R1938
10K
URSA_TX_HTPD_pulldown
VBY1_RXM[0]
C2124
0.1uF
16V
C13310
10uF
10V
C13304
0.1uF
16V
C2153
10uF
10V
Close to Chip side
DVDD_DDR
4th Layer
HDMI_TX_DDC_SDA
VBY1_RXP[0]
VBY1_RXP[1]
VBY1_RXP[2]
22
N4
R1997
22
M4
HDMI_TX_DDC_SDA
N1
+3.3V_NORMAL
VBY1_RXM[4]
VBY1_RXP[4]
VBY1_RXM[5]
VBY1_RXP[5]
VBY1_RXM[6]
VBY1_RXP[6]
VBY1_RXM[7]
VBY1_RXM[8]
VBY1_RXP[8]
R1996
HDMI_TX_DDC_CLK
VBY1_RXM[2]
VBY1_RXM[3]
L2106
BLM18PG121SN1D
LOCKAn
VBY1_RXM[1]
R1939
10K
HDMI_CLK+
P1
HDMI_CLK-
N3
HDMI_RX0+
N2
HDMI_RX0-
M3
HDMI_RX1+
M2
HDMI_RX1-
L1
HDMI_RX2+
L2
HDMI_RX2-
HDMITX_SCL
C2117
0.1uF
16V
HDMITX_SDA
HDMI_TXCP
VBY1_RXM[10]
C13312
4.7uF
10V
C2152
10uF
10V
C13303
0.1uF
16V
C13313
4.7uF
10V
HDMI_TX0P
HDMI_TX0N
Close to Chip side
HDMI_TX1P
AVDDL_HDMI_TX_RX
HDMI_TX1N
HDMI_TX2P
L2107
BLM18PG121SN1D
HDMI_TX2N
VBY1_RXM[9]
VBY1_RXP[9]
C2125
0.1uF
16V
HDMI_TXCN
C2118
0.1uF
16V
220
R1943
W3
C2144
0.1uF
16V
4th Layer
AE31
VBY1_RXP[7]
V2
C2137
1uF
10V
L2104
BLM18PG121SN1D
AG31
W2
W1
C2132
10uF
10V
AVDDL_MOD
22
R1952
Y2
C2122
10uF
10V
TXDBP1_L
LD1900
SML-512UW
AB3
4th Layer
VDDC
VDDC
HDMI_RX1N_0
C2100
10uF
10V
AB2
AA2
C13306
0.1uF
16V
C2142
0.1uF
16V
HDMI_RX2N_0
HDMI_RX2-_URSA9_0
VBY1_RXP[3]
AB1
C2138
0.1uF
16V
HDMI_RXCP_0
TXDBN2_L
AK27
AL31
F3
TXDBP7_L
AL23
D2
HDMI_RX0-_URSA9_0
TXDBN7_L
HDMI OUTPUT to H13
AE3
C2133
0.1uF
16V
D1
AK18
HDMI_TX_DDC_CLK
AD2
C2127
0.1uF
16V
AL18
AE2
AE1
C2119
10uF
10V
AK17
RE4P
TXC4P/TX18P
4th Layer
L2102
BLM18PG121SN1D
RB1N
AK3
AL3
AVDD_MOD
RB0N
VX1_2TXA0N/TX11N
TXA0P/TX11P
Close to Chip side
IC2500
LGE7411(URSA9)
AG2
VBY1_RXP[10]
C2126
0.1uF
16V
C2131
0.1uF
16V
C13301
0.1uF
16V
C13308
10uF
10V
C13309
10uF
10V
VBY1_RXM[11]
VBY1_RXP[11]
E Q1901
MMBT3906(NXP)
GND Connection at Vx1 41pin wafer
B
AVDDL_LVDSRX
C
R12900 0
GND_Vx1_2
Non_LGD_Module
(pin 8)
R12901 0
GND_Vx1
(pin 5,11,14)
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
L13300
BLM18PG121SN1D
C13300
0.1uF
16V
Non_UB95
BSD-14Y-UD-128-02-HD
2013.12.17
U_LVDS INPUT
LGE Internal Use Only
+1.8V
+3.3V_NORMAL
Vx1 LOCKAn/HTPDn
+1.8V
[51P Vx1
output wafer]
IN
LOCKAn
D
S
FI-RE51S-HF-J-R1500
33
R13042
[41P Vx1
output wafer]
Q1404
AO3438
G
P13000
LOCKn_IN
OUT
ADJ/GND
51pin_Wafer
75
R13036
R1504
1.5K
R1505
4.7K
IC13000
AZ1117EH-ADJTRG1
1
R13035
1
C13034
10uF
10V
C13035
10uF
10V
41pin_Wafer
2
TXDAP7_L
3
+1.8V
P13001
FI-RE41S-HF-J-R1500
TXDAN6_L
7
8
TXDAP5_L
9
TXDAN5_L
R209
4.7K
11
TXDAP4_L
12
TXDAN4_L
R221
0
URSA_TX_HTPD_Pullup
HTPDn_IN
R222
10K
URSA_TX_HTPD_Pullup
D9_I2C_SDA
Not Used Net (UB85/95/UC89)
HTPDAn
Q203
AO3438
URSA_TX_HTPD_Pullup
GND_Vx1
6
TXDBP11_L
7
TXDBN11_L
TXDBP11_L
TXDBN11_L
TXDBP10_L
8
GND_Vx1_2
TXDBN10_L
14
R220
0
OPT
TXDAP3_L
15
TXDAN3_L
17
TXDAP2_L
18
TXDAN2_L
+3.3V_NORMAL
19
20
R13034
10K
OPT
R13037
TXDAP1_L
+3.3V_NORMAL
21
9
TXDBP10_L
10
TXDBN10_L
TXDAN1_L
12
TXDBP9_L
13
TXDBN9_L
TXDBP8_L
TXDBN8_L
14
L/D_EN(Pin30)
- T-Con L/D Function
HIGH : Enable
LOW or NC : Disable
*LGD_120Hz: T240 module (UB98/95,D9)
0
TXDBP9_L
TXDBN9_L
11
16
GND_Vx1
L_DIM_EN
15
TXDBP8_L
16
TXDBN8_L
GND_Vx1_2
17
Non_AUO_Module
TXDAN0_L
25
HTPDn_IN
R13061
NON_D9_I2C
10K
Non_INX_Module
29
R13033
10K
R13019
4.7K
OPT
R13012 0
33
*Pin35(PCID)
High:PCID enable
Low or NC : PCID diable
3D_EN
3D_EN_LGD_120Hz
Non_AUO_Module
R13062
NON_D9_I2C
I2C_SDA1
R13059
37
R13005
Non_LGD_60Hz
*Pin38
Non_LGD_60Hz: T120 module(UB85)
0
INV_CTL
Non_OLED & Non_AUO_Module
42
43
44
45
46
47
48
49
R13009
0
R13002
Non_OLED & Non_AUO_Module
OLED
TXDBN4_L
30
TXDBP3_L
31
TXDBN3_L
33
TXDBP2_L
34
TXDBN2_L
0
36
TXDBP1_L
37
TXDBN1_L
Data_Format_1
Compensation_Done
PANEL_VCC
51
R13016
0
38
LGD_Module
OLED
R13010
0
50
TXDBP4_L
28
35
R13044
10K
OPT
40
R13001
27
+3.3V_NORMAL
39
41
TXDBN5_L
32
33 OPT
0
TXDBP5_L
25
29
0
Non_AUO_Module
Q13005
2N7002A
36
38
24
TCON_I2C_EN
S
34
0
TXDBN6_L
23
D9_I2C_SDA
0
32
R13006
TXDBP6_L
22
26
+3.3V_NORMAL
D9_I2C
*Pin31(BIT_SEL)
HIGH or NC : 10Bit
LOW : 8Bit
I2C_SCL1
21
33 OPT
L13001
BLM18PG121SN1D
OLED
R13017
OPT
31
0
Q13004
2N7002A
R13055
EL_VDD_DETECT_22V
30
TXDBN7_L
20
D
R13011
TXDBP7_L
19
TCON_I2C_EN
D
LOCKn_IN
27
R13018
4.7K
OPT
R13013 0
R13004
10K
LGD_Module
S
26
18
D9_I2C_SCL
+3.3V_NORMAL
G
24
R13007
10K
Non_AUO_Module
G
R13003
10K
OPT
TXDAP0_L
D9_I2C
23
R13014 0
22
35
D9_I2C_SCL
3
5
13
28
2
4
S
10
1
R211
1.5K
G
6
+3.3V_NORMAL
D
TXDAP6_L
URSA_TX_HTPD_Pullup
5
URSA_TX_HTPD_Pullup
TXDAN7_L
4
R13045
10K
LGD_Module
Data Input Format[1:0]
39
TXDBP0_L
40
TXDBN0_L
41
*Mode 3 (4 Division)
- Data Format 0(Pin37) = Low
Data Format 1(Pin36) = High
42
+3.3V_NORMAL
*Mode 2 (2 Division)
- Data Format 0(Pin37) = High
Data Format 1(Pin36) = Low
R13040
10K
OPT
R13015
0
Data_Format_0
52
LGD_Module
L13000
MLB-201209-0120P-N2
51pin_12V
C13032
10uF
25V
51pin_12V
C13033
10uF
25V
51pin_12V
R13041
10K
LGD_Module
EL_VDD_DETECT_22V
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
BSD-14Y-UD-130-HD
2013.12.17
Output_wafer
LGE Internal Use Only
IC2500
LGE7411(URSA9)
DDR PHY VREF
B_DDR3_A[0-15]
F14
D13
A_DDR3_A[3]
C14
A_DDR3_A[4]
F13
A_DDR3_A[5]
C13
A_DDR3_A[6]
B10
A_DDR3_A[7]
A12
A_DDR3_A[8]
C10
A_DDR3_A[9]
A14
A_DDR3_A[10]
B12
A_DDR3_A[11]
F15
A_DDR3_A[12]
C11
A_DDR3_A[13]
C12
A_DDR3_A[14]
D17
A_DDR3_A[15]
E14
A_DDR3_BA[0]
B14
A_DDR3_BA[1]
E15
A_DDR3_BA[2]
H27
A_DDR3_A0
B_DDR3_A0
A_DDR3_A1
B_DDR3_A1
A_DDR3_A2
B_DDR3_A2
A_DDR3_A3
B_DDR3_A3
A_DDR3_A4
B_DDR3_A4
A_DDR3_A5
B_DDR3_A5
A_DDR3_A6
B_DDR3_A6
A_DDR3_A7
B_DDR3_A7
A_DDR3_A8
B_DDR3_A8
A_DDR3_A9
B_DDR3_A9
A_DDR3_A10
B_DDR3_A10
A_DDR3_A11
B_DDR3_A11
A_DDR3_A12
B_DDR3_A12
A_DDR3_A13
B_DDR3_A13
A_DDR3_A14
B_DDR3_A14
A_DDR3_A15
B_DDR3_A15
A_DDR3_BA0
B_DDR3_BA0
A_DDR3_BA1
B_DDR3_BA1
A_DDR3_BA2
B_DDR3_BA2
C17
A_DDR3_CASZ
C16
A_DDR3_WEZ
F17
A_DDR3_ODT
C15
A_DDR3_CKE
B11
A_DDR3_RESET
A_DDR3_MCLK
B16
A16
A_DDR3_MCLKZ
C9
A_DDR3_CSB1
A9
A_DDR3_CSB2
A_DDR3_DQ[0-15]
A_DDR3_DQ[0]
D23
A_DDR3_DQ[1]
A19
A_DDR3_DQ[2]
E22
A_DDR3_DQ[3]
B18
A_DDR3_DQ[4]
C23
A_DDR3_DQ[5]
C18
B22
A_DDR3_DQ[6]
A18
A_DDR3_DQ[7]
A_DDR3_DQ[8]
E19
A_DDR3_DQ[9]
B21
A_DDR3_DQ[10]
F18
A_DDR3_DQ[11]
C22
A_DDR3_DQ[12]
D20
A_DDR3_DQ[13]
A_DDR3_DQ[14]
A_DDR3_DQ[15]
F22
E18
D22
B19
A_DDR3_DM0
E21
B_DDR3_A[2]
G29
B_DDR3_A[3]
H30
B_DDR3_A[4]
G27
B_DDR3_A[5]
G30
B_DDR3_A[6]
+1.5V_U_DDR
U_MVREFCA_A0
U_MVREFCA_A1
DDR_VTT_URSA_1
R13110
1K
1%
R13120
1K
1%
IC2600
H5TQ1G63EFR-RDC
B_DDR3_A[8]
D30
B_DDR3_A[9]
H32
B_DDR3_A[10]
F31
C13210
1000pF
C13222
0.1uF
R13121
1K
1%
C13230
1000pF
A_DDR3_RASZ
B_DDR3_RASZ
A_DDR3_CASZ
B_DDR3_CASZ
A_DDR3_WEZ
B_DDR3_WEZ
A_DDR3_ODT
B_DDR3_ODT
A_DDR3_CKE
A_DDR3_RESETB
A_DDR3_A[2]
B_DDR3_A[13]
A_DDR3_A[3]
A_DDR3_A[4]
L29
B_DDR3_A[15]
A_DDR3_MCLK
A_DDR3_MCLKZ
A_DDR3_CSB1
B_DDR3_CSB1
A_DDR3_CSB2
B_DDR3_CSB2
A_DDR3_DQ0
B_DDR3_DQ0
A_DDR3_DQ1
B_DDR3_DQ1
A_DDR3_DQ2
B_DDR3_DQ2
A_DDR3_DQ3
B_DDR3_DQ3
A_DDR3_DQ4
B_DDR3_DQ4
A_DDR3_DQ5
B_DDR3_DQ5
A_DDR3_DQ6
B_DDR3_DQ6
A_DDR3_DQ7
B_DDR3_DQ7
A_DDR3_DQ8
B_DDR3_DQ8
A_DDR3_DQ9
B_DDR3_DQ9
A_DDR3_DQ10
B_DDR3_DQ10
A_DDR3_DQ11
B_DDR3_DQ11
A_DDR3_DQ12
B_DDR3_DQ12
A_DDR3_DQ13
B_DDR3_DQ13
A_DDR3_DQ14
B_DDR3_DQ14
A_DDR3_DQ15
B_DDR3_DQ15
A_DDR3_DM0
P2
R8
R2
A_DDR3_A[7]
B_DDR3_BA[1]
A_DDR3_A[8]
B_DDR3_BA[2]
A_DDR3_A[9]
B_DDR3_RASZ
L27
T8
R3
L7
R7
A_DDR3_A[11]
B_DDR3_CASZ
A_DDR3_A[12]
B_DDR3_WEZ
A_DDR3_A[13]
B_DDR3_CKE
E31
N7
T3
A0
K32
+1.5V_U_DDR
A1
U_MVREFCA_B0
U_MVREFCA_B1
A_DDR3_MCLK
C13233
B_DDR3_CSB2
U29
B_DDR3_DQ[0]
N32
B_DDR3_DQ[1]
T28
B_DDR3_DQ[2]
M31
B_DDR3_DQ[3]
B_DDR3_DQ[0-15]
R13108
1K
1%
0.01uF
R13118
1K
1%
H1
A3
K7
K9
A_DDR3_CKE
R13109
1K
1%
C13201
0.1uF
R13119
1K
1%
C13221
0.1uF
C13229
1000pF
A_DDR3_CSB1
T31
B_DDR3_DQ[6]
A_DDR3_RASZ
M32
B_DDR3_DQ[7]
A_DDR3_CASZ
N28
B_DDR3_DQ[8]
A_DDR3_WEZ
R31
B_DDR3_DQ[9]
A5
L8
A6
T27
L3
VDD_1
A10/AP
VDD_2
A11
VDD_3
A12/BC
VDD_4
NC_7
VDD_5
VDD_8
BA0
A_DDR3_DQS1
B7
C20
A_DDR3_DQS1
C19
A_DDR3_DQ[16-31]
A_DDR3_DQS1
B_DDR3_DQS1
A_DDR3_DQS1B
A_DDR3_DQS1B
A_DDR3_DQ[16]
B27
A_DDR3_DQ[17]
A24
A_DDR3_DQ[18]
C27
A_DDR3_DQ[19]
C24
A_DDR3_DQ[20]
A28
A_DDR3_DQ[21]
E24
A_DDR3_DQ[22]
B28
A_DDR3_DQ[23]
B23
A_DDR3_DQ[24]
D25
A_DDR3_DQ[25]
E27
A_DDR3_DQ[26]
C25
A_DDR3_DQ[27]
D28
A_DDR3_DQ[28]
E26
A_DDR3_DQ[29]
E28
A_DDR3_DQ[30]
E25
A_DDR3_DQ[31]
C28
B24
A_DDR3_DM2
B26
N30
B_DDR3_DQS1B
A_DDR3_DQ16
B_DDR3_DQ16
A_DDR3_DQ17
B_DDR3_DQ17
A_DDR3_DQ18
B_DDR3_DQ18
A_DDR3_DQ19
B_DDR3_DQ19
A_DDR3_DQ20
B_DDR3_DQ20
A_DDR3_DQ21
B_DDR3_DQ21
A_DDR3_DQ22
B_DDR3_DQ22
A_DDR3_DQ23
B_DDR3_DQ23
A_DDR3_DQ24
B_DDR3_DQ24
A_DDR3_DQ25
B_DDR3_DQ25
A_DDR3_DQ26
B_DDR3_DQ26
A_DDR3_DQ27
B_DDR3_DQ27
A_DDR3_DQ28
B_DDR3_DQ28
A_DDR3_DQ29
B_DDR3_DQ29
A_DDR3_DQ30
B_DDR3_DQ30
A_DDR3_DQ31
B_DDR3_DQ31
A_DDR3_DM2
D26
A_DDR3_DQS3
C26
B_DDR3_DQS1B
A_DDR3_DQ[1]
F7
A_DDR3_DQ[2]
F2
A_DDR3_DQ[3]
F8
A_DDR3_DQ[4]
H3
A_DDR3_DQ[5]
H8
A_DDR3_DQ[6]
G2
A_DDR3_DQ[7]
H7
AA31
B_DDR3_DQ[16]
V32
B_DDR3_DQ[17]
AA30
B_DDR3_DQ[18]
V30
B_DDR3_DQ[19]
AB32
B_DDR3_DQ[20]
V28
B_DDR3_DQ[21]
AB31
B_DDR3_DQ[22]
U31
B_DDR3_DQ[23]
W29
B_DDR3_DQ[24]
AA28
B_DDR3_DQ[25]
W30
B_DDR3_DQ[26]
AB29
B_DDR3_DQ[27]
Y28
B_DDR3_DQ[28]
AB28
B_DDR3_DQ[29]
W28
B_DDR3_DQ[30]
AB30
B_DDR3_DQ[31]
B_DDR3_DQ[16-31]
+1.5V_U_DDR
CK
VDDQ_2
CK
VDDQ_3
CKE
VDDQ_4
VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
A_DDR3_DQS3
R13112
1K
R13102
1K
A_DDR3_RESET
A_DDR3_DQ[8]
D7
A_DDR3_DQ[9]
C3
A_DDR3_DQ[10]
C8
A_DDR3_DQ[11]
A_DDR3_DQ[12]
A_DDR3_DQ[13]
A_DDR3_DQ[14]
A_DDR3_DQ[15]
A_DDR3_A[10]
K2
A_DDR3_A[11]
K8
A_DDR3_A[12]
N1
A_DDR3_A[13]
N9
A_DDR3_A[14]
R1
L7
R7
N7
T3
NC_2
NC_4
DQSL
C2
A7
A2
B8
A3
A2
A3
A5
A6
A8
M3
VDD_1
A10/AP
VDD_2
A11
VDD_3
A12/BC
VDD_4
NC_7
VDD_5
VDD_6
VDD_8
BA0
C9
K7
A_DDR3_MCLKZ
D2
K9
A_DDR3_CKE
H2
A_DDR3_ODT
H9
A_DDR3_RASZ
K1
J3
K3
L3
CK
VDDQ_3
CKE
VDDQ_4
VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
WE
A_DDR3_WEZ
J9
RESET
A_DDR3_RESET
NC_2
L9
NC_3
T7
NC_4
A_DDR3_A[14]
NC_6
F3
A_DDR3_DQS2
G3
K8
N1
N9
R1
R9
DQSL
A8
C1
C9
D2
E9
F1
H2
H9
J1
NC_1
T2
L1
K2
+1.5V_U_DDR
VDDQ_2
L2
A_DDR3_CSB2
G7
A1
CK
E9
F1
+1.5V_U_DDR
D9
VDD_9
VDDQ_1
J7
A_DDR3_MCLK
240
1%
BA1
A8
C1
VDD_7
BA2
A_DDR3_BA[2]
R13134
B2
A9
M2
A_DDR3_BA[1]
L8
ZQ
A7
R9
N8
H1
VREFDQ
A4
NC_5
A_DDR3_BA[0]
VREFCA
A1
M7
A_DDR3_A[15]
J1
NC_1
M8
A0
J9
L1
L9
T7
A_DDR3_A[14]
NC_6
DQSL
A9
DQSU
VSS_1
VSS_2
VSS_3
DML
VSS_4
DMU
VSS_5
VSS_6
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
C7
B3
A_DDR3_DQS3
E1
A_DDR3_DQS3B
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
DQSU
VSS_2
VSS_3
E7
J2
A_DDR3_DM2
J8
A_DDR3_DM3
M1
A_DDR3_DQ[16-31]
M9
P1
P9
T1
T9
B1
DQU0
VSS_1
G8
DQL6
VSSQ_1
B7
A9
DQSU
D3
A_DDR3_DQ[16]
E3
A_DDR3_DQ[17]
F7
A_DDR3_DQ[18]
F2
A_DDR3_DQ[19]
F8
A_DDR3_DQ[20]
H3
A_DDR3_DQ[21]
H8
A_DDR3_DQ[22]
G2
A_DDR3_DQ[23]
H7
DML
VSS_4
DMU
VSS_5
VSS_6
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
B9
D8
E2
E8
F9
G1
G9
A_DDR3_DQ[24]
D7
A_DDR3_DQ[25]
C3
A_DDR3_DQ[26]
C8
A_DDR3_DQ[27]
C2
A_DDR3_DQ[28]
A7
A_DDR3_DQ[29]
A2
A_DDR3_DQ[30]
B8
A_DDR3_DQ[31]
A3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
DQL6
DQL7
D1
B3
B1
VSSQ_1
DQU0
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
B9
D1
D8
E2
E8
F9
G1
G9
B_DDR3_CKE
B_DDR3_DM2
R13113
B_DDR3_DM3
1K
R13103
1K
B_DDR3_DQS2
B_DDR3_RESET
B_DDR3_DQS2B
Y29
B_DDR3_DQS3
R3
A_DDR3_CASZ
A_DDR3_CKE
+1.5V_U_DDR
W32
B_DDR3_DQS2B
T8
A_DDR3_A[9]
G7
A1
VDDQ_1
DQL7
W31
B_DDR3_DQS2
A_DDR3_DQS2B
A_DDR3_DQS3B
A_DDR3_DQS3B
B_DDR3_DQS1
E3
B_DDR3_DM3
A_DDR3_DQS2
D3
A_DDR3_DQ[0]
Y31
B25
A25
A_DDR3_DQ[0-15]
V31
B_DDR3_DM2
A_DDR3_DM3
A_DDR3_DM3
A_DDR3_DQS2
A_DDR3_DQS2B
A_DDR3_DM0
A_DDR3_DM1
B_DDR3_DQS0B
P30
R2
A_DDR3_A[7]
A_DDR3_A[8]
D9
+1.5V_U_DDR
DQSU
A_DDR3_DQS1B
B_DDR3_DQS0
P31
B_DDR3_DQS0B
R8
A_DDR3_A[6]
BA1
B_DDR3_DM1
B_DDR3_DQS0
A_DDR3_DQS0B
P2
VDD_9
C7
R32
A_DDR3_DQS0
P8
A_DDR3_DQS2B
B_DDR3_DM0
R28
VDD_7
E7
B20
N2
DQSL
A_DDR3_DQS0B
B_DDR3_DQ[15]
B_DDR3_DM1
VDD_6
NC_3
N31
A21
A_DDR3_DQS0
A_DDR3_DQS0B
1%
B2
A9
RESET
G3
P3
A_DDR3_A[5]
+1.5V_U_DDR
A8
WE
A_DDR3_DQS0
240
A7
F3
B_DDR3_DQ[14]
T29
K3
A_DDR3_RESET
B_DDR3_DQ[13]
M28
J3
R13126
ZQ
T2
B_DDR3_DQ[10]
B_DDR3_DQ[12]
K1
A_DDR3_ODT
P7
A_DDR3_A[4]
L2
C13209
1000pF
N3
A_DDR3_A[3]
J7
B_DDR3_DQ[4]
B_DDR3_DQ[11]
IC2700
H5TQ1G63EFR-RDC
AR13112
100
A_DDR3_A[2]
VREFDQ
A4
BA2
A_DDR3_MCLKZ
B_DDR3_DQ[5]
P29
M3
A_DDR3_BA[2]
M30
T30
N8
A_DDR3_BA[1]
U30
M27
AR13110
100
A_DDR3_A[1]
A2
NC_5
A_DDR3_BA[0]
B_DDR3_CSB1
C32
AR13108
100
A_DDR3_A[0]
M2
+1.5V_U_DDR
B_DDR3_MCLKZ
C30
AR13106
100
VREFCA
M7
A_DDR3_A[15]
B_DDR3_RESET
B_DDR3_MCLK
K31
AR13104
100
M8
B_DDR3_ODT
J30
B_DDR3_DM0
P8
A_DDR3_A[10]
K30
B_DDR3_MCLKZ
N2
A_DDR3_A[5]
B_DDR3_BA[0]
L30
B_DDR3_MCLK
P3
A_DDR3_A[6]
J28
B_DDR3_RESETB
P7
A_DDR3_A[1]
B_DDR3_A[11]
B_DDR3_A[12]
B_DDR3_A[14]
H28
B_DDR3_CKE
N3
A_DDR3_A[0]
F30
H31
AR13102
100
U_MVREFCA_A1
C13202
0.1uF
R13111
1K
1%
E30
J27
AR13100
100
U_MVREFCA_A0
B_DDR3_A[7]
F32
L28
A_DDR3_DM1
A_DDR3_DM1
+1.5V_U_DDR
B_DDR3_A[1]
G28
D31
E17
A_DDR3_RASZ
B_DDR3_A[0]
G31
56
E13
56
B13
A_DDR3_A[1]
R13123R13122
A_DDR3_A[0]
A_DDR3_A[2]
B_DDR3_DQS3
Y30
B_DDR3_DQS3B
B_DDR3_DQS3B
* DDR_VTT
DDR_VTT_URSA_0
+1.5V_U_DDR
+3.3V_NORMAL
IC13100
TPS51200DRCR
REFIN
VLDOIN
DDR_VTT_URSA
C13123
22uF
10V
VO
VOSNS
C13110
10uF
2
9
3
8
4
7
5
6
L13101
CIS21J121
C13199
10uF
10V
AR13101
100
PGOOD
EN
B_DDR3_A[1]
B_DDR3_A[2]
REFOUT
B_DDR3_A[3]
C13147
0.1uF
B_DDR3_A[4]
B_DDR3_A[5]
B_DDR3_A[6]
B_DDR3_A[7]
B_DDR3_A[8]
B_DDR3_A[9]
B_DDR3_A[10]
B_DDR3_A[11]
B_DDR3_A[12]
B_DDR3_A[13]
DDR_VTT_URSA
DDR_VTT_URSA_0
L13102
BLM18PG121SN1D
B_DDR3_A[15]
C13189
0.1uF
16V
C13151
0.1uF
16V
B_DDR3_BA[0]
0.01uF
56
C13234
DDR_VTT_URSA_1
L13103
BLM18PG121SN1D
56
B_DDR3_MCLK
DDR_VTT_URSA
N3
P7
P3
N2
B_DDR3_BA[1]
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
C13158
0.1uF
16V
C13174
0.1uF
16V
A3
N8
M3
K9
C13106
0.1uF
16V
B_DDR3_CASZ
L8
ZQ
K1
J3
K3
L3
A9
VDD_1
A10/AP
VDD_2
A11
VDD_3
A12/BC
VDD_4
NC_7
VDD_5
VDD_6
VDD_7
VDD_8
VDDQ_1
VDDQ_2
VDDQ_3
CKE
VDDQ_4
VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
B_DDR3_DQS0
G3
NC_2
NC_4
B7
D3
Close to DDR Power pin
C13117
0.1uF
16V
C13128
0.1uF
16V
C13137
0.1uF
16V
C13146
0.1uF
16V
C13156
0.1uF
16V
C13164
0.1uF
16V
C13172
1uF
25V
C13178
0.1uF
16V
C13186
0.1uF
16V
C13194
10uF
10V
C13198
0.1uF
16V
C13206
0.1uF
16V
C13214
0.1uF
16V
C13218
0.1uF
16V
C13226
1uF
25V
B_DDR3_DQ[0]
E3
B_DDR3_DQ[1]
F7
B_DDR3_DQ[2]
F2
B_DDR3_DQ[3]
F8
B_DDR3_DQ[4]
H3
B_DDR3_DQ[5]
H8
B_DDR3_DQ[6]
G2
B_DDR3_DQ[7]
H7
B_DDR3_DQ[8]
D7
B_DDR3_DQ[10]
B_DDR3_DQ[11]
B_DDR3_DQ[12]
B_DDR3_DQ[13]
B_DDR3_DQ[14]
B_DDR3_DQ[15]
+1.5V_U_DDR
C13102
0.1uF
16V
Close to DDR Power pin
C13107
0.1uF
16V
C13115
1uF
25V
C13126
0.1uF
16V
C13135
0.1uF
16V
C13144
0.1uF
16V
C13154
0.1uF
16V
C13162
10uF
10V
C13170
0.1uF
16V
C13176
0.1uF
16V
C13184
0.1uF
16V
C13192
0.1uF
16V
C13196
0.1uF
16V
C13204
0.1uF
16V
C13212
1uF
25V
C13216
0.1uF
16V
C13224
0.1uF
16V
C13232
0.1uF
16V
C13100
10uF
10V
T3
B_DDR3_A[14]
B_DDR3_A[15]
N1
VSS_2
VSS_3
DML
VSS_4
VSS_5
VSS_6
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
C3
C8
C2
A7
A2
B8
A3
A1
A2
A3
A5
A6
R1
R9
B_DDR3_BA[1]
N8
M3
A9
VDD_1
A10/AP
VDD_2
A11
VDD_3
A12/BC
VDD_4
NC_7
VDD_5
VDD_6
A1
A8
B_DDR3_MCLKZ
K7
K9
B_DDR3_CKE
C1
C9
D2
E9
B_DDR3_ODT
F1
B_DDR3_RASZ
H2
B_DDR3_CASZ
H9
B_DDR3_WEZ
K1
J3
K3
L3
VDDQ_2
CK
VDDQ_3
CKE
VDDQ_4
VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
RESET
NC_2
NC_3
NC_4
F3
L9
B_DDR3_DQS2
T7
B_DDR3_DQS2B
G3
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
DQSL
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
N9
R1
R9
+1.5V_U_DDR
A8
C1
C9
D2
E9
F1
H2
H9
J9
L1
L9
T7
NC_6
B_DDR3_A[14]
B_DDR3_A[14]
A9
DQSU
VSS_1
DQSU
VSS_2
VSS_3
E7
E1
B_DDR3_DM2
G8
B_DDR3_DM3
J2
B7
B_DDR3_DQS3B
B3
B_DDR3_DQ[16-31]
D3
B_DDR3_DQ[16]
E3
J8
B_DDR3_DQ[17]
F7
M1
B_DDR3_DQ[18]
F2
M9
B_DDR3_DQ[19]
F8
P1
B_DDR3_DQ[20]
H3
P9
B_DDR3_DQ[21]
T1
B_DDR3_DQ[22]
T9
B_DDR3_DQ[23]
VSS_12
VSSQ_1
N1
DQSL
H8
G2
H7
DML
VSS_4
DMU
VSS_5
VSS_6
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
DQL7
B_DDR3_DQ[24]
D7
B1
B_DDR3_DQ[25]
C3
B9
B_DDR3_DQ[26]
C8
D1
D8
E2
E8
F9
G1
B_DDR3_DQ[27]
B_DDR3_DQ[28]
B_DDR3_DQ[29]
B_DDR3_DQ[30]
B_DDR3_DQ[31]
C2
A7
A2
B8
A3
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
DQL6
DQL6
DQU0
K8
J1
NC_1
J9
L1
K2
A1
CK
WE
B_DDR3_RESET
G7
VDD_9
VDDQ_1
L2
B_DDR3_CSB2
D9
BA1
J7
B_DDR3_MCLK
VDD_7
VDD_8
BA0
240
1%
B2
BA2
B_DDR3_BA[2]
R13135
+1.5V_U_DDR
A8
M2
B_DDR3_BA[0]
L8
ZQ
A7
NC_5
N9
H1
VREFDQ
A4
M7
A9
VSS_1
DQL7
B_DDR3_DQ[9]
N7
B_DDR3_A[13]
K8
B_DDR3_DQS3
DQSU
DMU
B_DDR3_DM1
+1.5V_U_DDR
R7
VREFCA
C7
DQSU
E7
B_DDR3_DQ[0-15]
L7
B_DDR3_A[12]
K2
NC_6
C7
B_DDR3_DQS1B
B_DDR3_DM0
B_DDR3_A[9]
DQSL
B_DDR3_DQS0B
B_DDR3_DQS1
R3
B_DDR3_A[11]
G7
J1
NC_1
DQSL
T8
M8
A0
T2
NC_3
Decap removed
R2
+1.5V_U_DDR
CK
F3
R8
B_DDR3_A[10]
VDD_9
CK
RESET
B_DDR3_RESET
P2
B_DDR3_A[8]
D9
BA1
T2
P8
B_DDR3_A[7]
240
1%
B2
WE
B_DDR3_WEZ
R13127
+1.5V_U_DDR
A8
L2
B_DDR3_CSB1
N2
B_DDR3_A[5]
A7
BA0
P3
B_DDR3_A[6]
A5
A6
P7
B_DDR3_A[2]
VREFDQ
BA2
K7
B_DDR3_RASZ
C13109
0.1uF
16V
N3
B_DDR3_A[4]
H1
A4
J7
B_DDR3_ODT
C13104
0.1uF
16V
IC2900
H5TQ1G63EFR-RDC
AR13113
100
B_DDR3_A[3]
A2
NC_5
B_DDR3_CKE
C13132
0.1uF
16V
AR13111
100
B_DDR3_A[1]
VREFCA
A1
M7
B_DDR3_BA[2]
B_DDR3_MCLKZ
C13112
1uF
25V
AR13109
100
U_MVREFCA_B1
M8
A0
M2
C13105
0.1uF
16V
R13125R13124
C13179
0.1uF
16V
AR13107
100
B_DDR3_A[0]
Close to REFOUT pin
C13181
1uF
25V
AR13105
100
U_MVREFCA_B0
C13150
4700pF
GND
C13111 C13113
10uF
10uF
AR13103
100
IC2800
H5TQ1G63EFR-RDC
VIN
B_DDR3_A[0]
PGND
L13100
CIS21J121
[EP]
10
1
11
R13101 C13122
10K
1000pF
1%
THERMAL
R13100
10K 1%
B1
VSSQ_1
DQU0
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
B9
D1
D8
E2
E8
F9
G1
G9
G9
C13101
10uF
10V
4th layer
+1.5V_U_DDR
Close to DDR Power pin
Decap removed
C13103
0.1uF
16V
C13108
0.1uF
16V
C13116
0.1uF
16V
BSD-14Y-UD-131-HD
+1.5V_U_DDR
Close to DDR Power pin
Decap removed
C13195
0.1uF
16V
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
2013.12.17
4th layer
URSA7_DDR
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
+3.3V_NORMAL
URSA_BIT1_1
R1915 10K
URSA_BIT2_1
R1917 10K
URSA_BIT1_0
R1916
10K
URSA_BIT2_0
R1918
10K
LGD_Module
R1911 10K
4
URSA_BIT0_1
R1913 10K
3
URSA_BIT0_0
R1914
10K
X-TAL_1
XIN_URSA
URSA_OPT_0
Rx Interface
URSA_OPT_1
Module Type
R1919
10K
URSA9_RST_PULLUP
URSA_BIT0
Tx Lane
URSA_BIT2
0
R1924
BIT [2/1/0]
100V
R1923
10K
Tx Lane
URSA_RESET_SoC
0
R1930
0/0/0
XO_URSA
4K@120 (16lane)
0/0/1
4k@60 (8lane)
0/1/0
5k@120 (20lane)
0/1/1
OLED ULTRA HD
1/0/0
FHD@120 (4lane)
1/0/1
FHD@60 (2lane)
1/1/0
Reserved
1/1/1
Reserved
URSA_RX_VX1
R1910
10K
D1900
1N4148W
24MHz
X1900
R1925
1M
URSA_BIT1
URSA_RESET
GND_2
X-TAL_2
+3.3V_NORMAL
OPT
C1902
22uF
10V
2
4
3
SW1901
JTP-1127WEM
1
1
2
GND_1
C1903
5pF
50V
Option Name
UB98/UC9_URSA9_crystalcap
C1904
5pF
50V
URSA Reset
+3.3V_NORMAL
URSA_RX_LVDS
R1909 10K
Clock for URSA9
OS_Module
R1912
10K
URSA Option
Option Name
UB85/95/UC97_URSA9_crystalcap
C1904-*1
8pF
50V
IC2500
LGE7411(URSA9)
C1903-*1
8pF
50V
AF29
URSA_RESET
IC1901-*1
W25Q32BVSSIG
SPI Flash
/CS
DO[IO1]
/WP[IO2]
1
8
2
7
3
6
4
5
R4
XO_URSA
GND
IC1901
MX25L3206EM2I-12G
CS#
R1904
SO/SIO1
33
SPI_DO
1
8
SPI_4MB_MACRONIX
2
7
I2CS_SDA
I2CS_SCL
/HOLD[IO3]
AR13201
33
AH24
3
6
FLASH_WP_URSA
GND
1K
R1932
4
5
SPI2_DI/PWM1/GPIO57
SPI3_CK/DIM10/GPIO54
I2CM_SDA
A4
VCC
SPI3_DI/DIM11/GPIO55
SPI4_CK/DIM8/GPIO52
GPIO[0][UART2_TX]
GPIO[1][UART2_RX]
A5
GPIO[3][UART1_RX]
HOLD#
SPI_CK
1K
SI/SIO0
R1954
SPI_DI
OPT
DIM2/GPIO[34]
SPI_CK
SPI_DI
AD30
AR13200
33
AC31
AD29
SPI_CZ
DIM3/GPIO[35]
SPI_CK
DIM4/GPIO[36]
SPI_DI
DIM5/GPIO[37]
SPI_DO
SPI_DO
33
R1981
AE28
OPT 33
10K
R1955
R1933
AE27
DIM6/GPIO[38]
INT_R20/GPIO[42]
GPIO45/TCON2
GPIO46/TCON3
URSA9 UART1_RX
GPIO48/TCON5
GPIO49/TCON6
AC27
AD27
GND_1
B6
Debugging for URSA9
B7
C5
C6
C7
I2C_S Port
D4
D5
P1905
12507WS-04L
D6
WAFER-STRAIGHT
URSA_DEBUG
OPT
10K
R1901
10K
R1900
E4
10K
E5
2
1
I2C_SCL1
33
SCL2_+3.3V_DB
URSA_DEBUG
10K
4
R1907
R1921
10K
R1906
5
I2CS_SCL
R1958
0
URSA_MP
R1960
0
OPT
33
SDA2_+3.3V_DB
URSA_DEBUG
DIM2
OPT
D7
SW1902
JS2235S
1
R1922
SCL2_+3.3V_DB
2
6
5
URSA_DEBUG_SW
3
4
I2C_SDA1
R1959
0
URSA_MP
I2CS_SDA
R1961
0
OPT
SDA2_+3.3V_DB
E6
E7
F4
F5
M5
M6
M7
N5
R7
P7
N7
N6
NC_1
GPIO[19]/TCON9
NC_2
GPIO[20]/TCON10
NC_3
GPIO[21]/TCON11
NC_4
GPIO[22]/TCON12
NC_5
GPIO[23]/TCON13
NC_6
GPIO24/TCON14
NC_7
GPIO25/TCON15
NC_8
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
3D_EN
R1937
10K
L_DIM_EN
OPT
R13203
33
DIM0
AG20
+3.3V_NORMAL
DIM1
AH23
OPT
R13204
10K
DIM2
AH20
AG21
URSA_OPT_1
AH22
R13205
10K
URSA_BIT0
AG22
URSA_BIT1
AH21
URSA_BIT2
B3
A2
C3
Not Used Net (UB98/D9)
B2
RXASCL_URSA9
RXASDA_URSA9
B1
C2
RXBSCL_URSA9
RXBSDA_URSA9
C1
AG5
HDMI OUTPUT_1 DDC to URSA9
AH4
RXASCL_URSA9
AH5
RXASDA_URSA9
AH6
AJ4
AJ5
AJ6
AH16
NC_9
GPIO[4]
NC_10
GPIO[5]
NC_11
GPIO[6]
NC_12
GPIO[7]
NC_13
GPIO[8]
NC_14
GPIO[9]
NC_15
GPIO[10]/PWM_DIM_IN[0]
NC_16
GPIO[11]/PWM_DIM_IN[1]
NC_17
GPIO[12]
NC_18
GPIO[13]
NC_19
GPIO[14]
NC_20
GPIO[15]
NC_21
GPIO[16]
NC_22
GPIO[17]
Data_Format_1
AG16
Data_Format_0
HDMI OUTPUT_0 DDC to URSA9
Y5
RXBSCL_URSA9
Y4
RXBSDA_URSA9
AB4
AB5
AG17
AH17
AG18
AJ20
AH18
For DFT JIG
OPT
R13207
OPT
R13208
33
R13206
100K
R13209
100K
33
10K
R13201
URSA_RX_Vx1_HTPDn
R13200
10K
URSA_RX_Vx1_HTPDn
URSA9_Vx1_RX_HTPD_GPIO
URSA9_CONNECT
AG19
URSA_LOCK_O
AH19
URSA_LOCK_V
Not Used Net (UB85/95/UC89)
AJ21
FLASH_WP_URSA
URSA9_CONNECT
NC_23
NC_24
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
33
33
AG4
GPIO[18]/TCON8
A7
3
R1934
GPIO50/TCON7
GND_2
DIM1
AG26
A3
GPIO43/TCON0
GPIO47/TCON4
R1908
R1935
AG27
DIM7/GPIO[39]
IRE
10K
R1902
OPT
R1936
10K
AH27
INT_R21/GPIO[41]
C4
OPT
AG28
AG23
DIM0/GPIO[32]
DIM1/GPIO[33]
AD28
+3.3V_NORMAL
SCLK
DIM0
+3.3V_NORMAL
AF27
AF28
GPIO44/TCON1
+3.3V_NORMAL
URSA_OPT_0
33
VSYNC_LIKE/PWM5/GPIO40
GPIO[2][UART1_TX]
Change pin from A5 to C4
TCON_I2C_EN
Debug/ISP ADDR
Slave (Debug Port:0XB4,ISP:0X98)
CHIP_CONF:{DIM2,DIM1,DIM0}
CHIP_CONF=3’d7:111:boot from SPI Flash
OPT
R13202
AJ29
B5
C1901
0.1uF
16V
U_SPI_WP_f_SoC
Chip Config
AJ27
SPI4_DI/DIM9/GPIO53
B4
U_SPI_WP_f_URSA
FRC_FLASH_WP
SPI2_CK/PWM0/GPIO56
I2CS_SCL
I2CM_SCL/VSYNC_LIKE1
DI[IO0]
SPI_CZ
WP#
1K
I2CS_SDA
AH26
CLK
AH25
AH28
SPI1_CK/PWM2/GPIO58
SPI1_DI/PWM3/GPIO59
AJ24
10K R1903
R1905
XTALO
XTALI
VCC
SPI_4MB_Winbond
SPI_CZ
I2C_HSC_SDA/VSYNC_LIKE2
I2C_HSC_SCL/VSYNC_LIKE3
R3
XIN_URSA
AG24
+3.3V_NORMAL
AG25
RESET
URSA_LOCK_O
URSA_LOCK_V
BSD-14Y-UD-132-HD
2013.12.17
LGE Internal Use Only
IC2500
LGE7411(URSA9)
IC2500
LGE7411(URSA9)
D18
A8
B8
C8
D8
E8
F8
G8
H8
J8
K8
IC2500
LGE7411(URSA9)
L8
M8
N8
VDDC
P8
A6
M9
M10
M11
N9
N10
N11
P9
P10
P11
R9
R10
R11
T9
T10
T11
U9
U10
U11
V9
V10
V11
W9
W10
W11
Y9
VDDC_1
VSS_1
VDDC_2
VSS_2
VDDC_3
VSS_3
VDDC_4
VSS_4
VDDC_5
VSS_5
VDDC_6
VSS_6
VDDC_7
VSS_7
VDDC_8
VSS_8
VDDC_9
VSS_9
VDDC_10
VSS_10
VDDC_11
VSS_11
VDDC_12
VSS_12
VDDC_13
VSS_13
VDDC_14
VSS_14
VDDC_15
VSS_15
VDDC_16
VSS_16
VDDC_17
VSS_17
VDDC_18
VSS_18
VDDC_19
VSS_19
VDDC_20
VSS_20
VDDC_21
VSS_21
VDDC_22
VSS_22
VDDC_23
VSS_23
VDDC_24
VSS_24
VDDC_25
VSS_25
VDDC_26
VSS_26
VSS_27
VSS_28
AVDDL_HDMI_TX_RX
K1
R8
T1
T8
K2
U8
P2
V8
T2
AF2
K3
W8
Y8
AA8
T3
AF3
AD8
G4
AE8
H4
AF8
J4
AG8
K4
AH8
P4
AJ8
U4
V4
B9
D9
E9
W4
F9
AA4
G9
AC4
H9
AD4
J9
AE4
K9
AF4
L9
G5
J5
L4
AVDDL_LVDSRX
AA9
AA10
AB9
AVDDL_HDMITX_2
VSS_31
AVDDL_RX_1
VSS_32
AVDDL_RX_2
VSS_33
AVDDL_RX_3
VSS_34
Y11
AE9
L5
AF9
R5
AH9
AJ9
DVDD_DDR
VSS_35
AVDDL_DVI_2
VSS_36
VSS_37
M14
N14
AVDDL_MOD
DVDD_DDR_1
VSS_38
DVDD_DDR_2
VSS_39
VSS_40
Y20
Y21
Y22
AA19
AA20
AVDDL_DRV
AA21
AA22
AB20
AB21
AB22
AVDDL_MOD_1
VSS_41
AVDDL_MOD_2
VSS_42
AVDDL_MOD_3
VSS_43
AVDDL_MOD_4
VSS_44
AVDDL_MOD_5
VSS_45
AVDDL_DRV_1
VSS_46
U5
D10
V5
E10
AVDDL_DRV_3
AVDDL_DRV_4
AVDDL_DRV_5
AC20
AC21
AD21
AD20
VDDP
AD18
AC12
AC13
AD15
AC16
AC17
AD16
VSS_49
VSS_51
AVDD_MOD_2
VSS_52
AVDD_MOD_3
VSS_53
AVDD_MOD_LDO
VSS_54
VSS_55
VDDP_1
VSS_56
VDDP_2
VSS_57
VDDP_3
VSS_58
VSS_59
AD11
AD12
VSS_48
AVDD_MOD_1
AC18
AD17
VSS_47
VSS_50
AVDD_MOD
AVDD_DVI_1
AA5
H10
AC5
J10
AD5
K10
AE5
L10
AF5
AB10
F6
AC10
G6
AD10
H6
AE10
J6
AF10
K6
L6
AG10
AH10
P6
A11
R6
D11
T6
E11
U6
F11
V6
G11
W6
H11
Y6
J11
AA6
K11
AB6
AC6
AD6
L11
AA11
AB11
AE6
AC11
AF6
AE11
AG6
VSS_60
AF11
AG11
AVDD_DVI_2
AVDD_HDMITX_1
VSS_61
AVDD_HDMITX_2
VSS_62
AVDD_RX_1
VSS_63
AVDD_RX_2
VSS_64
AVDD_RX_3
VSS_65
AVDD_RX_4
VSS_66
F7
AH11
G7
AJ11
H7
J7
K7
L7
AD14
AC14
E12
F12
AC15
M18
M19
M20
M21
M16
M17
P22
R22
N21
N22
J12
AVDD_PLL_2
VSS_67
AVDD_DDR0_1
VSS_68
AVDD_DDR0_2
VSS_69
AVDD_DDR0_3
VSS_70
AVDD_DDR0_4
VSS_71
AVDD_DDR0_5
VSS_72
AVDD_DDR0_6
VSS_73
VSS_74
P21
R21
H12
AVDD_XTAL
AVDD_PLL_1
AVDD_DDR1_1
VSS_75
AVDD_DDR1_2
VSS_76
AVDD_DDR1_3
VSS_77
AVDD_DDR1_4
VSS_78
AVDD_DDR1_5
VSS_79
AVDD_DDR1_6
VSS_80
VSS_190
VSS_86
VSS_191
VSS_87
VSS_192
VSS_88
VSS_193
VSS_89
VSS_194
VSS_90
VSS_195
VSS_91
VSS_196
VSS_92
VSS_197
VSS_93
VSS_198
VSS_94
VSS_199
VSS_95
VSS_200
VSS_96
VSS_201
VSS_97
VSS_202
VSS_98
VSS_203
VSS_99
VSS_204
VSS_100
VSS_205
VSS_101
VSS_206
VSS_207
VSS_102
VSS_208
VSS_103
VSS_209
VSS_104
VSS_210
VSS_105
VSS_211
VSS_106
VSS_212
VSS_107
VSS_213
VSS_108
VSS_214
VSS_109
VSS_215
VSS_110
VSS_216
VSS_111
VSS_217
VSS_112
VSS_218
VSS_113
VSS_219
VSS_114
VSS_220
VSS_115
VSS_221
VSS_116
VSS_222
VSS_117
VSS_223
T7
K12
U7
L12
V7
M12
W7
N12
Y7
P12
AA7
R12
AB7
T12
AC7
U12
AD7
V12
AE7
W12
AF7
Y12
AG7
AA12
AH7
AB12
AJ7
N13
M13
U13
V13
W13
Y13
AA13
AB13
AD13
AE13
AF13
AG13
AH13
AJ13
G14
H14
J14
K14
L14
P14
R14
T14
U14
V14
W14
Y14
AA14
AB14
AE14
AF14
AG14
AH14
AJ14
A15
B15
D15
G15
VSS_118
VSS_225
VSS_119
VSS_226
VSS_120
VSS_227
VSS_121
VSS_228
VSS_122
VSS_229
AE12
AF12
AG12
AH12
AJ12
VSS_230
VSS_231
VSS_124
VSS_232
VSS_125
VSS_233
VSS_126
VSS_234
VSS_127
VSS_235
VSS_128
VSS_236
VSS_129
VSS_237
VSS_130
VSS_238
VSS_131
VSS_239
VSS_132
VSS_240
VSS_133
VSS_241
VSS_134
VSS_242
VSS_135
VSS_243
VSS_136
VSS_244
VSS_137
VSS_245
VSS_138
VSS_246
VSS_139
VSS_247
VSS_140
VSS_248
VSS_141
VSS_249
G18
H18
J18
L18
N18
P18
R18
T18
U18
V18
W18
Y18
AA18
AB18
AE18
AF18
AJ18
F19
G19
H19
J19
K19
L19
N19
P19
R19
T19
U19
V19
W19
Y19
AB19
AC19
AD19
AE19
AF19
AK19
A20
E20
VSS_143
H15
J15
K15
L15
M15
N15
P15
R15
T15
U15
V15
W15
Y15
G20
H20
J20
L20
N20
P20
R20
T20
U20
V20
W20
AE20
AF20
AK20
AA15
AE15
AF15
AG15
AH15
AJ15
E16
F16
G16
H16
J16
L16
VSS_250
VSS_144
VSS_251
VSS_145
VSS_252
VSS_146
VSS_253
VSS_147
VSS_254
VSS_148
VSS_255
VSS_149
VSS_256
VSS_150
VSS_257
VSS_151
VSS_258
VSS_152
VSS_259
VSS_153
VSS_260
VSS_154
VSS_261
N16
P16
F21
G21
H21
J21
K21
L21
T21
U21
V21
AE21
AF21
AK21
R16
V16
W16
Y16
VSS_159
VSS_265
VSS_160
VSS_266
VSS_161
VSS_267
VSS_162
VSS_268
VSS_163
VSS_269
VSS_164
VSS_270
VSS_165
VSS_271
VSS_166
VSS_272
VSS_167
VSS_273
VSS_168
VSS_274
VSS_169
VSS_275
VSS_170
VSS_276
VSS_171
VSS_277
VSS_172
VSS_278
VSS_173
VSS_279
VSS_174
VSS_280
VSS_175
VSS_281
VSS_176
VSS_282
H22
J22
AE16
AF16
M22
AM16
A17
B17
G17
H17
J17
V22
W22
AC22
AD22
AE22
AF22
AL22
K17
N17
P17
R17
T17
U17
V17
W17
E23
F23
G23
H23
J23
K23
Y17
AA17
J13
K13
L13
VSS_395
VSS_292
VSS_396
VSS_293
VSS_397
VSS_294
VSS_398
VSS_295
VSS_399
VSS_296
VSS_400
VSS_297
VSS_401
VSS_298
VSS_402
VSS_299
VSS_403
VSS_300
VSS_404
VSS_301
VSS_405
VSS_302
VSS_406
VSS_303
VSS_407
VSS_304
VSS_408
VSS_305
VSS_409
VSS_306
VSS_410
VSS_307
AE17
VSS_411
VSS_309
VSS_412
VSS_310
VSS_413
VSS_311
VSS_414
VSS_312
VSS_415
VSS_313
VSS_416
VSS_314
VSS_417
VSS_315
VSS_418
VSS_316
VSS_419
VSS_317
VSS_420
VSS_318
VSS_421
VSS_319
VSS_422
VSS_320
VSS_423
VSS_321
VSS_424
VSS_322
VSS_425
VSS_323
VSS_426
VSS_324
VSS_427
VSS_325
VSS_428
VSS_326
VSS_429
VSS_327
VSS_430
VSS_328
VSS_431
VSS_329
VSS_432
VSS_330
VSS_433
VSS_331
VSS_434
VSS_332
VSS_435
VSS_333
VSS_436
VSS_334
VSS_437
VSS_335
VSS_438
VSS_336
VSS_439
VSS_337
VSS_440
VSS_338
VSS_441
VSS_339
VSS_442
VSS_443
VSS_340
VSS_444
VSS_341
VSS_445
VSS_342
VSS_446
VSS_343
VSS_447
VSS_344
VSS_448
VSS_345
VSS_449
VSS_346
VSS_450
VSS_347
VSS_451
VSS_348
VSS_452
VSS_349
VSS_453
VSS_350
VSS_454
VSS_351
VSS_455
VSS_352
VSS_456
VSS_353
VSS_457
VSS_460
VSS_354
VSS_461
VSS_355
VSS_462
VSS_356
VSS_463
VSS_464
VSS_357
VSS_465
VSS_358
VSS_466
VSS_359
VSS_467
VSS_360
VSS_468
VSS_361
VSS_469
VSS_362
VSS_470
VSS_364
VSS_471
VSS_365
VSS_472
VSS_366
VSS_473
VSS_367
VSS_474
AJ17
AL17
VSS_476
VSS_368
VSS_477
VSS_369
VSS_478
VSS_370
VSS_479
VSS_371
VSS_480
VSS_372
VSS_481
VSS_373
VSS_482
VSS_374
VSS_483
VSS_484
W23
Y23
VSS_181
AC23
VSS_182
AD23
VSS_183
AE23
VSS_184
AF23
VSS_185
AJ23
AM23
VSS_485
VSS_486
VSS_376
AF17
G24
H24
J24
K24
L24
M24
N24
P24
R24
T24
U24
V24
W24
Y24
AA24
AB24
AC24
AD24
AE24
AF24
F25
G25
H25
J25
K25
L25
M25
N25
P25
R25
T25
U25
V25
W25
Y25
AA25
AB25
AC25
AD25
AE25
AF25
AM25
A26
F26
G26
H26
J26
K26
L26
M26
N26
P26
R26
T26
U26
V26
W26
Y26
AA26
AB26
AC26
AD26
AE26
AF26
AJ26
AL26
D27
F27
K27
N27
P27
R27
U27
V27
W27
Y27
AA27
AB27
F28
VSS_363
P23
F24
AL24
VSS_308
VSS_375
AB17
AB23
H13
VSS_291
M23
AA23
G13
VSS_394
A23
V23
VSS_284
VSS_290
VSS_475
VSS_178
VSS_180
VSS_393
L17
T23
VSS_283
VSS_289
L22
VSS_177
VSS_179
VSS_392
G22
AA16
AJ16
VSS_264
VSS_288
U16
U22
VSS_158
VSS_391
VSS_459
VSS_156
VSS_263
VSS_390
VSS_287
VSS_458
VSS_155
VSS_262
VSS_389
VSS_286
T16
T22
VSS_157
D24
VSS_285
D21
W21
VSS_142
D12
G12
AVDD_PLL
+1.5V_U_DDR
G10
AJ10
AVDDL_DRV_2
VSS_189
VSS_85
VSS_123
T5
W5
AVDDL_DVI_1
VSS_84
AD9
F10
Y10
VSS_188
P13
F20
AG9
VSS_30
VSS_83
R13
VSS_224
K5
P5
AVDDL_HDMITX_1
VSS_187
H5
VSS_29
L3
VSS_186
VSS_82
AC8
AG3
T4
T13
VSS_81
VSS_487
VSS_488
VSS_377
VSS_489
VSS_378
VSS_490
VSS_379
VSS_491
VSS_380
VSS_492
VSS_381
VSS_493
VSS_382
VSS_494
VSS_383
VSS_495
VSS_384
VSS_496
VSS_385
VSS_497
VSS_386
VSS_498
VSS_387
VSS_499
VSS_388
VSS_500
VSS_501
VSS_502
VSS_503
VSS_504
VSS_505
VSS_506
K28
P28
U28
AC28
AK28
A29
C29
D29
E29
F29
J29
M29
R29
V29
AA29
AC29
AK29
A30
B30
AC30
AK30
AM30
A31
B31
C31
J31
L31
AD31
AF31
AH31
B32
E32
J32
L32
P32
U32
Y32
VSS_507
AE32
VSS_508
AG32
VSS_509
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
BSD-14Y-UD-133-HD
2013.12.17
U_Power
LGE Internal Use Only
MAX 4.7A
+12V
P13401
+1.5V_U_DDR
POWER_ON/OFF2_1
DCDC_TI
IC13403-*1
TPS54327DDAR [EP]GND
R13401
1.0V_DCDC_TI
4
3A
R13423
22K
1%
R2
5
GND
C13448
22uF
10V
C13449
22uF
10V
ZD13401
2.5V
OPT
C13402 R13400
2K
C13445 C13446
2200pF
1uF
10V
50V
1.0V_DCDC_ROHM
0.1uF
16V
VDDC
OPT
ZD13400
2.5V
C13400 C13401
22uF
22uF
C13411
22uF
7
17
VIN_3
SW_3
8
16
VIN_2
SW_4
9
15
VIN_1
8A
20K
R13410
NC_2
SW_2
1/16W
1%
VDD
18
IC13402
TPS53513RVER
1%
1/16W
19
6
SW_1
THERMAL
29
R13408
4.87K
TRIP
VO
24
5
C13405 NC_1
C13404
470pF
50V
NC_3
GND1
GND2
[EP]
28
VREG
4
1/16W
5%
27
1%
1/16W
1%
1/16W
91K
R13406
MODE
20
VBST
L13403
1uH
Vout=0.765*(1+R1/R2)=1.516V
GND
21
3
16V
0.1uF
POWER_ON/OFF2_3
22
2
EN
1K
+12V
L13402
C13407
C13408
1uF
10uF
10V
16V
C13409
10uF
16V
14
SS
PGOOD
L13412
2.2uH
NR5040T2R2N
FB
1
PGND_5
SW
R2
23
RF
11
6
16V
0.1uF
C13447
PGND_2
3
7
BOOT
27K
R13405
2
C13403
1000pF
50V
VIN
10
VREG
8
PGND_1
3.6K
1%
1
R1
1/16W
5%
1/16W 1/16W
1%
1%
R13407
39K
GND
D13400
18K
1%
C13444
100pF
50V
FB
SS
[EP]FIN
R13411R13409
100 5.1K
SW
25
5
R13404
10K
VBST
R13403
4.7
R1
C13446-*1
3300pF
50V
4
VIN
30V
R13421 R13422
C13442
0.1uF
25V
6
1/10W
5%
EN
5
9
10K
4
C13434
10uF
25V
7
3
R13402
3.3
IC13403
BD9D320EFJ
R13424
L13409
MLB-201209-0120P-N2
6
2
DCDC_ROHM
3
L13410
MLB-201209-0120P-N2
C13440
C13435
10uF
0.1uF
25V
25V
OPT
8
1
13
VREG5
PGND_4
C13410
0.1uF
THERMAL
PANEL_VCC
C13443
10uF
16V
26
EN
VFB
2
12
1
PGND_3
BLM18PG121SN1D
9
T-con power
L13411
THERMAL
20037WR-05A00
+1.15V URSA9 Core
+1.5V URSA DDR
TCON_PWR_5pin_Wafer
C13406
2200pF
50V
Vout=0.6*(1+R1/R2)
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
BSD-14Y-UD-134-HD
2013.12.17
LGE Internal Use Only
UB85/95/UC97 only
Front speaker
+3.3V_NORMAL
R5613
AMP_RESET_N 100
R5614
4.7K
L5602
10uH
C5627
1000pF
50V
SPK_L+
SP-7850_10
10K
22000pF
PVDD1B
31
OUT1A
PVDD1A
32
33
C5606
BST1A
35
RESET
CLK_I
AD
36
37
GND_IO
26
NC_4
DVDD
6
NTP7514
25
AGND
SDATA
7
24
VDR2
23
BST2A
20
OUT2A
PVDD2A
PGND2A
21
19
22
10
18
9
SDA
OUT2B
BCK
PVDD2B
8
17
WCK
22000pF
50V
C5621
0.1uF
50V
R5610
4.7K
L5605
10uH
SPK_LSP-7850_10
C5610
22000pF
50V
C5612
1uF
10V
C5613
1uF
10V
C5611
22000pF
50V
SPK_R+
+24V_AMP
R5607
5.6
1/10W
C5625
0.1uF
50V
C5616
390pF
50V
C5619
0.47uF
50V
C5617
390pF
50V
R5608
5.6
1/10W
L5604
10uH
C5622
R5611
0.1uF
50V
4.7K
C5623
R5612
0.1uF
50V
4.7K
SPEAKER_R
SPK_RSP-7850_10
I2S_AMP
WOOFER_MUTE
E
SPEAKER_L
L5603
10uH
C5609
C5607
4.7K
SP-7850_10
10uF
35V
100
C5600
Q5600
1000pF
MMBT3904(NXP)
50V
I2S_AMP
C
IC5600
16
R5604
B
5
PGND2B
R5601
10K
R5600
VDR1
NC_3
SCL
+3.3V_NORMAL
AMP_MUTE
BST1B
27
BST2B
C5602
33pF
50V
C5601
33pF
50V
28
4
15
R5603
100
3
GND
MONITOR_2
I2C_SDA2
I2C_SCL2
NC_2
14
R5602
100
PGND1B
MONITOR_1
AUD_SCK
OUT1B
29
13
AUD_LRCK
30
0x54
R5609
C5618
0.47uF
50V
C5615
390pF
50V
R5606
5.6
1/10W
2
THERMAL
41
C5620
0.1uF
50V
C5614
390pF
50V
C5624
0.1uF
50V
1
12
From DACLRCH
AUD_LRCH
C5608
10uF
35V
NC_1
FAULT
C5604
1uF
10V
R5605
5.6
1/10W
VDD_PLL
11
C5603
1uF
10V
38
16V
39
0.1uF
40
10V
+24V_AMP
MONITOR_0
10uF
L5600
UBW2012-121F
C5605
[EP]GND
C5626
VDD_IO
+24V_AMP
+24V
50V
AUD_MASTER_CLK
PGND1A
1/16W
34
L5601
BLM18PG121SN1D
4P Boxtype
WAFER-ANGLE
SPK_L+
SPK_L-
SPK_R+
SPK_R-
4
3
2
1
P5400
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
BSD-14Y-UD-056-02-HD
2013.12.17
LGE Internal Use Only
UB95 : Woofer Amp
UC97 : Height Amp
UB85/95/UC97 only
OPTION Selection
Woofer/Height_Amp
Woofer_Amp
Height_Amp
UB95
UC97
+3.3V_NORMAL
+3.3V_NORMAL
NTP7514
25
AGND
SDATA
7
24
VDR2
23
BST2A
0x56
22
PGND2A
10
21
OUT2A
20
9
SDA
PVDD2A
BCK
19
8
PVDD2B
4.7K
Woofer/Height
C5717
0.1uF
50V
SP-7850_10
R5706
4.7K
SPK_WOOFER_L-
WCK
18
R5705
C5709
22000pF
50V
C5711
1uF
10V
C5714
1uF
10V
C5710
22000pF
50V
SPK_WOOFER_R+
+24V_AMP_WOOFER_L
C5708
C5719
0.1uF
50V
R5707
4.7K
R5709
3.3
Height_Amp
1/10W
C5706
Height_Amp
SP-7850_10
C5726 Height_Amp
390pF
50V
C5721
390pF Height_Amp
50V
10uF
35V
L5704
10uH
L5705
10uH
SP-7850_10 Height_Amp
50V
Height_Amp
C5722
0.47uF
50V
0.1uF
50V
Height_Amp
C5724
0.1uF
50V
R5710
3.3
Height_Amp
1/10W
22000pF
Height_Amp
C5723
R5711
4.7K
R5712
4.7K
Height_Amp
PVDD1A
OUT1A
PVDD1B
31
32
33
34
PGND1A
BST1A
35
6
C5716
0.1uF
50V
C5715
0.47uF
50V
L5703
10uH
Height
Height_Amp
C5705
22000pF
4.7K R5702
RESET
AD
CLK_I
NC_4
DVDD
SPK_WOOFER_L+
L5702
10uH
SP-7850_10
C5713
390pF
50V
R5704
5.6
1/10W
Woofer_Amp
WOOFER_MUTE
C5701
33pF
50V
26
17
C5700
33pF
50V
IC5700
OUT2B
R5701
100
I2C_SCL2
5
16
I2C_SDA2
VDR1
NC_3
BST2B
R5700
100
BST1B
27
PGND2B
AUD_SCK
28
4
15
AUD_LRCK
3
GND
MONITOR_2
Woofer_Amp
NC_2
14
AUD_LRCH
PGND1B
THERMAL
41
13
R5716
0
From DACLRCH
OUT1B
29
MONITOR_1
Height_Amp
30
MONITOR_0
AUD_LRCH1
1
12
C5703
1uF
10V
C5712
390pF
50V
2
FAULT
R5715
0
R5703
5.6
1/10W
NC_1
11
UB95 : Woofer Amp(LRCH)
UC97 : Height Amp(LRCH1)
C5718
0.1uF
50V
VDD_PLL
SCL
C5702
1uF
10V
-.Separation Of I2S
36
40
16V
+24V_AMP_WOOFER_L
C5707
10uF
35V
37
0.1uF
38
C5704
GND_IO
10V
L5700
UBW2012-121F
C5725
1000pF
50V
VDD_IO
10uF
R5714
4.7K
[EP]GND
C5720
+24V_AMP_WOOFER_L
+24V
1/16W
AUD_MASTER_CLK
39
L5701
BLM18PG121SN1D
50V
R5713
AMP_RESET_N 100
R5708
4.7K
I2S_WOOFER
Woofer_Amp
SPK_WOOFER_R-
WAFER-ANGLE
I2S_WOOFER
SPK_WOOFER_L+
SPK_WOOFER_L-
SPK_WOOFER_R+
WAFER-ANGLE
4
2
3
1
2
FW25001-02(SPK 2P)
SPK_WOOFER_R-
P5701
1
P5700
Woofer_Amp
UB95
Height_Amp
UC97
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
BSD-14Y-UD-057-02-HD
2013.12.17
LGE Internal Use Only
O
Overview
i
for
f ’14 ULTRA HD M
Model
d l
(
(Hardware)
)
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
`14 ULTRA HD New Feature 1. HDMI
HDMI1.4
HDMI2.0 3Gbps
HDMI2.0 6Gbps
4K@60Hz
4:2:2 10bit
HDCP2.2
ARC
MHL2.1
HDMI1.4
Legacy
HDMI 4
O
O
X
X
X
O
X
HDMI 3
O
O
O
X
X
X
O
HDMI 2
O
O
X
X
O
X
X
HDMI 1
O
O
X
O
X
X
X
구 분
It is different form each HDMI port spec.
spec
We offer a HDMI cable for HDMI 1.4 legacy issue.
HDMI2.0
HDMI1.4
DVI
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
`14 ULTRA HD New Feature 2. Audio
UB95
Woofer
UB85/UB83
: 내장 speaker
(woofer/stereo)
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
`14 ULTRA HD New Feature 3. Sub Assy (Joy stick button, Color sensor)
1. 조이스틱 메뉴 설정
조이스틱 버튼은 TV 밑면에 위치합니다.
조이스틱 버튼을 좌, 우로 움직여 메뉴를 선택 할 수 있습니다.
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
2. 조도센서
주변 환경에 따라 화질과 밝기를 조정합니다.
2014 model : Intelligent sensor + Color sensor
LGE Internal Use Only
`14 ULTRA HD New Feature 3. Sub Assy (WiFi)
UC9
105”
BT
WiFi
’13
13 Carry
Over
802 11
802.11ac
21:9
98”
84”
UB98
79”
65”
55”
UB95
UB85
16:9
65”
55”
55
55”
802.11n
(BT Combo)
49”
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
LCD TV Repair
p Guide
`14 years New Models
< Applicable Model >
65UB9500 NA
65UB9500-NA
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Main PCB
65UB9500-NA
W f
Woofer
Power
From PSU
1
1
T-CON B/D
7
Main processor_Digital(LG1154D),
DDR Memory
eMMC Memory
2
Main processor
processor_analog(LG1152AN)
analog(LG1152AN)
3
Micom for Key/IR sensing
4
HDMI switch
5
Audio AMP
6
Video processor (LGE7411:URSA9),
DDR Memory
2
6
Audio
5
4
B/T Wifi
Local Key +IR
3
7
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
4K processor_Digital(LG1512),
DDR Memory
LGE Internal Use Only
`14Y ULTRA HD Block Diagram
목차
0.
1.
2.
3
3.
4.
5.
6.
7
7.
8.
9.
10.
System Overview (Main External)
H13 Block Diagram (External)
H13 Block Diagram (Internal)
H13 Data Path Diagram
D14 Block Diagram
URSA9 Block Diagram
Tuner
Video & Audio IN/OUT
Audio OUT
HDMI2.0 Block
USB / Wi-Fi / M-REMOTE / UART
표지
2014년 03월17일
TV사업부
TV제품개발1팀
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Signal Path (UB95/85 보급형 모델 )
HDMI
HDMI UD 3840x2160
3840 2160 @24
@24,25,30
25 30 P
Path
th
HSLVDS 1ch
Vx1 4lane
2:1 Mux
3840x2160
@24 25 30
@24,25,30
3840x2160
@24,25,30
HDMI 2.0
SW(P)
H13
GPIO30
GPIO30 High
3840x2160
@24,25,30
Audio 처리
2:1 Mux
HDMI
OUT
Video 처리
4K
Decoder
D14
3840x2160
URSA 9
GPIO30 High
※ 단, UD Resize case 인 경우
Video path는
FHD 와 동일 path 로 출력됨.
HDMISW Æ H13 Æ U14ÆURSA9
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
H13 UD Block Diagram
TS
AUDA/D
SPDIF
CVBS
Tuner
SIF
OPTIC
BB_TP_DATA
H/P Audio
A di L/R
H/P AMP
H/P
CVBS
LNB
H13
LG1154AN
SC_CVBS, RGB, Audio L/R
SCART
DTV/MNT_LR/V_OUT
Audio AMP
(4.2ch~7.2ch)
CI
SPK
CI
RS-232C
HSR_P/M
Comp1 Y,Pb,Pr
COMP1
DAC_DATA
I2S
AAD_DATA
AV1_CVBS
COMP1/AV1/DVI_ L/R
AV1
H13
LG1154D
DDR3
16x2
Logo Light
Logo Light
IR/Joy key
Logo Light
HDMI_CEC
792MH
792MHz
4Gb×6 (1600)
8x4
WOL / WOW
LAN
RMII
PHY
USB 2.0 (WIFI11ac & BT)
Motion-R & USB_WI-Fi
8
eMMC
USB 3.0
USB1(USB3.0)
USB2(USB2.0)
USB
HUB
USB3(USB2.0)
USB 2.0
S
FHD HS-LVDS
HDMI output
HDMI 2.0
Switch
HDMI1~4
2:1 Mux
TS output
From H13D
Vx1
D14
16x4
792MHz
OSD HS-LVDS
USB 2.0
USB_CAM
2:1 Mux
URSA9
DDR3
16x4
800MHz
DDR3
1Gb x 4 (1866)
1Gb x 4 (1866)
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
H13 UD Block Diagram
Digital Chip Total Pin : 491w/o Power
Analog Chip Total Pin : 183w/o Power
AtoDPin : 79
Audio L/R(4ch)
SCART out
Line Out
1ch L/R
Audio-ADC
24b@48KHz
Audio DAC
(48KHz )
H13D
TS(S)
TS(S)
Video Decoder
M lti STD
Multi-STD
HD Decoder
(Boda950)
System
Demux
AAD
(THAT)
2D GFX
JPG/PNG Decoder
Audio DSP
Audio
Mux
I2S(External)
GPU Rogue
g Han
JPG Encoder
Multi-STD
Audio Decoder
LX4 HiFi EP
Video Encoder
TrustZone
Audio DAC (48KHz)
CPU
Clear Voice II
I2S
Perceptual
Volume Control
Secure Engine
CPU
ARMCA9 Core
Dual 1.2GHz
48KB ROM
64KB SRAM
OTP
I2S(HPD)
3ch Video
10x3ch
Capture
AFE
10b@148.5MHz Block
(3CH)
w/ LLPLL
I2Cx1
LVDS
Tx
Audio PLL
w/ DCO
I2Cx1
HDMI
Mux
SW
CVBS AFE(2-ch)
12b@54MHz
GPIOIx16
CVBS
Encoder
CVD
Y/C
CVBS
LVDS
Rx
DE
MCU
HDMI
(1-Link)
HDMI-Rx 1.4
((1-port
p
PHY))
3D, ARC, 4kx2k
SCI
USB3.0 x1
eMMC
DMAC(8ch)
Timer
WDT
SRAM 16KB
Timer
BE
MCU
DDR3 Controller
DDR3 Controller
DDR3 PHY
DDR3 PHY
16
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
EMAC
TCO
ON
Component(2ch)
SW
CVBS-Out
CVBS DAC
1MB L2 $
Bluetooth
UART
H3D
D
FRC
C
SRE
E
VCR
R
PE1
1
OSD
D
LED
D
Output formatter
5x1ch (1ch)
CVBS(3ch)
DivX
Source Mux
TNR
R
De-interrlacer
Main/Sub Scaler
SPDIF
Digital
Audio
Output
32KBI$ 32KBD$
Mux
Digital AMP
Slim SPK
GPIOx136
I2C 10
I2Cx10
I2S
I2S
UARTx3
SPIx2
1080p@30fps
p@ p
Sound DSP
USB2.0x3
PHY
TS(P)
TS (P)
Global
Gl
b lB
Baseband
b d
V/Q, DVB-T/C ISDB-T
BTSC AFE
10b@18.432MHz
w/ PLL
SW
SIF
SW
Tuner
GBB AFE
1ch@30MHz
w/ PLL
TS(P)
SDRAM
(MCP)
Vx1/E
EPI/LVDS Combo
(120Hz)
H13A
DIF
DVB-CI/CI+
CPLL
DCO
x2
SPLL
DPLL
DDR
PLL
DDR
PLL
8
LGE Internal Use Only
Data Path Diagram
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
D14 Block Diagram
+3.3V
+2.5V
+1.5V
+1.15V
+3.3V
IC12000
D14
+2.5V
+1.5V
+1.15V
IC12101
DDR3
1G bit
M0_DDR_DQ015_D14(16bit)
M0_DDR_DQS01 D14(2bit)
1_D14(2bit)
M0_D_CLK_D14
M0_DDR_DM0M0_D_CLKN_D14
1_D14(2bit)
M0_DDR_A0-13_D14(14bit)
M0_DDR_BA0-2_D14(3bit)
M0_DDR_CKE_D14
M0_DDR_ODT_D14
M0_DDR_RASN_D14
M0_DDR_CASN_D14
M0_DDR_WEN_D14
M0 DDR RESET N D14
M0_DDR_RESET_N_D14
D13_STPO_CLK
D13_STPO_VAL
D13_STPO_DATA
D13_STPO_SOP
D13_STPO_ERR
SOC_SPI0_SCLK
SOC_SPI0_CS0
SOC_SPI0_MOSI
IC100
H13D
SOC_SPI0_MISO
SPI_SCLK_M
SPI_MOSI_M
SPI_CS_M/
FLASH WP/
FLASH_WP/
IC12002
SPI FLASH
4MByte
SPI_MISO_M
IC12103
DDR3
1G bit
IC12100
DDR3
1G bit
IC12102
DDR3
1G bit
M0_DDR_DQ16-31_D14(16bit)
M0_DDR_DQS2-3_D14(2bit)
M0_DDR_DM2-3_D14(2bit)
M0_U_CLK_D14
M0_U_CLKN_D14
M1_DDR_DQ0-15_D14(16bit)
M1_DDR_DQS0-1_D14(2bit)
M1_DDR_DM0-1_D14(2bit)
M1_D_CLK_D14
M1_D_CLKN_D14
M1_DDR_A0-13_D14(14bit)
M1_DDR_BA0-2_D14(3bit)
M1_DDR_CKE_D14
M1_DDR_ODT_D14
M1_DDR_RASN_D14
M1_DDR_CASN_D14
M1_DDR_WEN_D14
M1_DDR_RESET_N_D14
M1_DDR_DQ0-15_D14(16bit)
M1_DDR_DQS0-1_D14(2bit)
M1 DDR DM0-1 D14(2bit)
M1_DDR_DM0-1_D14(2bit)
HDMI0_TX0N
HDMI0_TX0P
HDMI0_TX1N
HDMI0_TX1P
HDMI0_TX2N
HDMI0_TX2P
HDMI0_TXCN
HDMI0_TXCP
1920x2160@60p
IC3302
DEV_HDMI_MUX0
HDMI0_DDC_DA
HDMI0_DDC_CK
HDMI1_TX0N
HDMI1_TX0P
HDMI1_TX1N
HDMI1_TX1P
HDMI1_TX2N
HDMI1 TX2P
HDMI1_TX2P
HDMI1_TXCN
HDMI1_TXCP
M1_U_CLK_D14
M1_U_CLKN_D14
1920x2160@60p
IC3501
DEV_HDMI_MUX1
HDMI1_DDC_DA
HDMI1_DDC_CK
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
+1.15V
UART
SCL2_+3.3V_DB
(URSA)
SDA2_+3.3V_DB
I2C_SDA1
I2CS_SCL
8 lane
I2CS_SDA
51P
(+12V)
V x1
I2C_SCL1
DC-DC Converterr
D
(BD86106_6A)
UART2_R
UART2 R
X
UART2_T
X
I2C_SCL1
I2C_SDA1
HTPDn_IN
DC-DC Converterr +1.5V_U_DDR
D
(TPS54327 3A) (URSA DDR)
(TPS54327_3A)
URSA
DEBUG
Switch
LOCKn_IN
Power +12V
PANEL_VCC
URSA9 B/E Board Block Diagram (EAX65684601 Rev1.0)
V x1
8 lane
41P
I2C_S Port
4 Pin
Jig Download
H13
XO_
_URSA
XIN_
_URSA
X-Tal
(24Mhz)
HS-LVDS 4link
HDMI CLK/RX0/RX1/RX2
LOCK
n
HTPD
n
TCON_I2C_E
N
L_DIM_EN
3D_EN
SPI_DI
URSA9
SPI_DO/CK/CS
SPI FLASH
(4MB)
UART2_RX
UART2_TX
I2CS SCL
I2CS_SCL
T-CON POWER
5 Pin
PANEL_VCC
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
DDR3 SDRAM
DDR3 SDRAM
- 1Gbit (x16)
- 1Gbit (x16)
- 800MHz
- 800MHz
B_DDR3_DQ[31:0]
HDMI CLK/RX0/RX1/RX2
B_DDR3_A[15:0]/
2:0]/CLK/CKE
BA[2
2 : 1 MUX
A_DDR3_A[15:0]/
2:0]/CLK/CKE
BA[2
HDMI CLK/RX0/RX1/RX2
DDR3_DQ[31:0]
A_D
I2CS_SDA
2 : 1 MUX
DDR3 SDRAM
DDR3 SDRAM
- 1Gbit (x16)
- 1Gbit (x16)
- 800MHz
- 800MHz
LGE Internal Use Only
Tuner/CI Block Diagram
TDJM-H151F
+3.3V_LNA_TU
+1.1V_D_Demod_Core
+3.3V_TUNER
+3.3V_NORMAL
+3.3V
LNA_TU
[+3 3V] B1 1
[+3.3V]
LG1154A
1.8KΩ
[+1.1V]B4 28
[+3.3V]B2 11
U17 [ADC_I_INP]
V17 [ADC_I_INN]
J18 [IF_AGC]
1.8KΩ
S_DIF_AGC 3
M DIF[P] 6
M_DIF[P]
M_DIF[N] 7
[+3.3V]B3 26
LG1154
AP6 [SCL3]
AR6 [SDA3]
M_RESET_DEMOD 25
/TU_RESET1_TU
AG6[GPIO10]
SCL_RF 4
SDA_RF 5
33Ω
AH34 [SCL5]
AH33 [SDA5]
SDA_DEMOD 30
M_ERROR 12
M_SYNC 15
M_MCLK 14
M_VALID 16
FE_DEMOD1_TS_ERROR
FE_DEMOD1_TS_SYNC
FE_DEMOD1_TS_CLK
FE_DEMOD1_TS_VAL
M_CVBS 9
M_SIF 8
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
CVBS
TUNER_SIF
AM36[TP_DVB_ERR]
AL36 [TP_DVB_SOP]
AL35 [TP_DVB_VAL]
AL37 [TP_DVB_CLK]
V15[CVBS_IN1]
H18[AAD_ADC_SIF]
LGE Internal Use Only
Video & Audio IN/OUT
Jack Side
SOC Side
AV1
Phone JACK
AV1_CVBS_IN
COMP1/AV1/DVI_L/R_IN
AV1_CVBS_IN_SOC
[CVBS_IN3]
AUAD_L/R_CH2_IN
[AUAD_L/R_CH2_IN]
FULL
SCART
(18P)
SC_CVBS_IN
SC_R
SC_G
SC_B
SC_CVBS_IN_SOY
SC_FB
SC
FB
SC_ID
SC_L/R_IN
SC_CVBS_IN_SO
C
COMP1_PR_IN_SOC
COMP1_Y_IN_SOC
COMP1_PB_IN_SOC
COMP1_Y_IN_SOC_SOY
SC_FB_SOC
SC
FB SOC
SC_ID_SOC
[CVBS IN2]
[CVBS_IN2]
[PR1/Y1/PB1/SOY1_IN]
[SC1_SID]
[SC1_FB]
H13
(LG1154AN)
AUAD_L/R_CH3_IN
[AUAD_L/R_CH3_IN]
Component
1
Phone
JACK
COMP1_Y/Pb/
Pr
COMP2_PB_IN_SOC
COMP2_Y_IN_SOC
COMP2_Y_IN_SOC_SOY
COMP2_PR_IN_SOC
[PB2/Y2/SOY2/PR2_IN]
HP_L/ROUT_MAIN
Tuner
TU_CVBS
TUNER_SIF_TU
DIF[P/N]
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
AUDA_OUTL/R
TU_CVBS_ISOC
[CVBS_IN1]
TUNER_SIF
ADC_I_INP/INN
[AAD_ADC_SIF]
[ADC_I_INP/INN]
LGE Internal Use Only
Audio OUT
MICOM
SC
CART_MUTE
Mute
CTRL
[TR]
COMP1/AV1/DVI_L_IN
[AUAD_L_CH2_IN]
[AUD_SCART_OUTL/OUTR]
SCART_Lout/Rout
AZ4580MTR
OP AMP
DTV/MNT_L/R_OUT
SCART
filter
AUDIO L/R OUT
SC_L/R_IN
[AUAD_L_CH3_IN]
[DACSCK]
[DACLRCK]
AUD_SCK/LRCK/LRCH
[DACLRCH]
MAIN
2P wafer
f
NTP7514
(Woofer)
[SCL0/SDA0] I2C_SCL1/SDA1
LPF
LPF
AMP_RESET_N
H13
LG1154
WOOFER_MUTE
4P wafer
AUD_SCK/LRCK/LRCH
NTP7514
(L/P)
I2C_SCL2/SDA2
AMP_RESET_N
LPF
LPF
Tuner
AMP_MUTE
MICOM
TU SIF
TU_SIF
SIDE_HP_MUTE
[AAD_ADC_SIF]
[AUDA_OUTL]
HP_L/ROUT_MAIN
[PHY0_ARC_OUT_0] [IEC958OUT]
TPA6138A2
Headphone
AMP
HEADPHONE
LPF
Phone Jack
LINE OUT
SPDIF_OUT
SPDIF_OUT_ARC
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
HDMI2.0 Block
HDMI_HPD_1 ~ 4
SPDIF_OUT_ARC
P_PVDD33
HDMI1
HDCP
(IC3202 / R9531AN)
RESET
TMDS Link 8bits
CEC_REMOTE
Panasonic
HDMI_HPD_1
DDC_I2C 2bits
I2C_SCL/SDA 5 2bits
5V_HDMI_1
HDMI2
TMDS Link 8bits
MUX_SEL
CEC_REMOTE
HDMI_1
IC3501
H13D
(IC100 /
LG1154D)
HDMI Switch
(IC3200 / MN864778)
HDMI_1
5V HDMI 2
5V_HDMI_2
DDC 1
DDC_1
D14
DDC_0 IC12000
IC3302
HDMI_HPD_2
DDC_I2C 2bits
HDMI3
TMDS Link 8bits
CEC_REMOTE
HDMI_0
DDC_I2C 2bits
HDMI_0
HDMI HPD 3
HDMI_HPD_3
HDMI4
5V_HDMI_2
TMDS Link 8bits
HDMI_1
HDMI4
CEC_REMOTE
HDMI_0
DDC_I2C 2bits
HDMI_HPD_4
URSA9
HDMI_OUTPUT
X-TAL
27MHZ
MHL_DET
5V_HDMI_4
CEC_REMOTE
MICOM
(IC3000 / R5F100GEAFB)
MHL OCP
(IC3206 /SIL1292CNUC)
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
USB / WIFI / M-REMOTE / UART
[USB3_DM0]
[USB3_DP0]
USB1(3.0)
USB3_DM
+5V_USB_1
USB3_DP
[USB3_RX0M]
USB3_RX0M
[USB3_RX0P]
USB3_RX0P
[USB3 TX0M]
[USB3_TX0M]
USB3 TX0M
USB3_TX0M
[USB3_TX0P]
USB3_TX0P
[HUB_PORT_OVER0]
[HUB_VBUS_CTRL0]
/USB_OCD1
USB_CTL1
USB2
USB_DM2
[USB2_1_DM0]
[USB2_1_DP0]
OCP
+5V_USB_2
USB_DP2
[GPIO93]
[GPIO92]
[USB2_2_DM0]
[USB2 2 DP0]
[USB2_2_DP0]
USB3
USB_DM3
5V 6A
DCDC
IC2304
+5V_USB_3
USB DP3
USB_DP3
[GPIO91]
[GPIO90]
[USB2_0_DM]
[USB2_0_DP]
[GPIO13]
WIFI_DM
WIFI_DP
Wifi Combo
M_RFModule_RESET
SOC_RX
[UART0_RXD]
[UART0_TXD]
SOC_TX
RS-232C Jack
LG1154D_H13D
RENESAS MICOM
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Interconnection – sub PCB (XXUB95 series)
65UB9500-NA
[PCBs]
2
1
6
3
5
BT/Wifi C
Combo
b ASSY
1
Main PCB
2
PSU
3
T - CON
4
IR Jog Key ASSY
5
BT/Wifi Combo ASSY
4
IR Jog
J Key
K ASSY
6
To Main
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Contents of LCD TV Standard Repair Process
No.
Error symptom (High category)
Error symptom (Mid category)
Page
1
No video/Normal audio
1
2
No video/No audio
2
Picture broken/ Freezing
3
4
Color error
4
5
Vertical/Horizontal bar
bar, residual image
image,
light spot, external device color error
5
6
No power
6
7
Off when
h on, off
ff while
hil viewing,
i i
power
auto on/off
7
8
No audio/Normal video
8
9
Wrecked audio/discontinuation/noise
9
10
Remote control & Local switch checking
10
11
MR13 operating
i
checking
h ki
11
Wifi operating checking
12
13
Camera operating checking
13
14
External device recognition error
14
3
A. Video error
B Power error
B.
Remarks
C. Audio error
12
D. Function error
15
E. Noise
Circuit noise, mechanical noise
15
16
F. Exterior error
Exterior defect
16
First of all, Check whether there is SVC Bulletin in GCSC System for these model.
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Standard Repair Process
Error
symptom
LCD TV
A. Video error
Established
date
No video/ Normal audio
Revised date
2013.01.31
1/16
First of all, Check whether all of cables between board is inserted properly or not.
(Main B/D↔ Power B/D, LVDS Cable, Speaker Cable, IR B/D Cable,,,)
☞A1
No video
Normal audio
Normal
audio
Y
☞A18
Check Back Light
On with naked eye
N
Move to No
video/No audio
Y
On
Check Power
Board
24V, 12V,3.5V etc.
N
☞A18
Y
Replace T-con/Main
Board or module
And Adjust VCOM
N
Repair Power
Board or parts
Check Power Board 24V output
Normal
voltage
Normal
voltage
Y
Replace Inverter
or module
End
N
Repair Power
Board or parts
※Precaution
☞A4 & A2
Always check & record S/W Version and White
Balance value before replacing the Main Board
Replace Main Board
Re-enter White Balance value
1
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Standard Repair Process
LCD TV
Error
symptom
A. Video error
Established
date
No video/ No audio
Revised date
2013.01.31
2/16
☞A18
No Video/
No audio
Check various
voltages of Power
Board ( 3.5V,12V,20V
or 24V…)
Normal
voltage?
Y
N
Check and
replace
MAIN B/D
End
Replace Power
Board and repair
parts
2
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Standard Repair Process
Error
symptom
LCD TV
☞ A3
Check RF Signal level
Normal
Signal?
Y
A. Video error
Established
date
Picture broken/ Freezing
Revised date
2013.01.31
3/16
. By using Digital signal level meter
. By using Diagnostics menu on OSD
( Setting→ Quick Setting → Programmes → Programme Tuning → Manual Tuning → Check the Signal )
- Signal strength (Normal : over 50%)
- Signal Quality (Normal: over 50%)
Check whether other equipments have problem or not.
(By connecting RF Cable at other equipment)
,Set Top Box, Different maker TV etc`
etc
→ DVD Player ,Set-Top-Box,
N
☞ A4
Check RF Cable
Connection
1. Reconnection
2. Install Booster
Normal
Picture?
Y
Check
S/W Version
Normal
Picture?
N
Y
Check
T
Tuner
soldering
ld i
Close
N
Y
N
N
SVC
Bulletin?
S/W Upgrade
Contact with signal distributor
or broadcaster (Cable or Air)
Normal
Picture?
Y
N
Replace
Main B/D
Y
Close
Close
3
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Standard Repair Process
LCD TV
Error
symptom
A. Video error
Established
date
Color error
Revised date
2013.01.31
4/16
☞ A7
☞A6
Check color by input
-External Input
-COMPONENT
COMPONENT
-AV
-HDMI
Color
error?
N
Y
※ Check
and replace
Link Cable
(V by one)
and contact
condition
Y
Color
error?
Y
Color
error?
Replace Main B/D
N
N
End
Check error
color input
mode
☞A8
Ch k T
Check
Testt pattern
tt
Replace module
External Input/
C
Component
t
error
Check
external
device and
cable
External device Y
/C bl
/Cable
normal
R l
Replace
M
Main/T-con
i /T
B/D
N
Request repair
for external
device/cable
N
HDMI
error
Check external
device and
cable
External device Y
/Cable
normal
Replace Main/T-con B/D
4
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Standard Repair Process
LCD TV
Error
symptom
A. Video error
Established
date
Vertical / Horizontal bar, residual image,
light spot, external device color error
Revised date
2013.01.31
5/16
Vertical/Horizontal bar, residual image, light spot
Replace
Module
☞A6
☞ A7
Check color condition by input
-External Input
-Component
-HDMI
HDMI
Screen Y
normal?
Check external
device
connection
condition
Normal?
Check and
replace Link
Cable
N
N
Check Test pattern
Screen N
normal?
Y
Request repair
for external
device
Replace
module
☞A8
A8
Y
N
End
Screen
normal?
Replace Main/T-con B/D
(adjust VCOM)
For LGD panel
Y
Replace Main B/D
End
For other panel
External device screen error-Color error
Check S/W Version
Check N
version
Y
External
Input
error
Component
error
S/W Upgrade
Normal
screen?
Check screen
condition by input
-External Input
-Component
-HDMI/DVI
HDMI/
DVI
N
Y
End
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
Connect other external
device and cable
(Check normal operation of
External Input, Component,
RGB and HDMI/DVI by
connecting Jig, pattern
Generator ,Set-top Box etc.
Connect other external
device and cable
(Check normal operation of
E t
External
l Input,
I
t Component,
C
t
RGB and HDMI/DVI by
connecting Jig, pattern
Generator ,Set-top Box etc.
Screen
normal?
N
Replace
Main/T-con
B/D
Y
Request repair for
external device
Y
Screen
normal?
N
Replace
Main /T-con
B/D
5
LGE Internal Use Only
Standard Repair Process
LCD TV
Error
symptom
B. Power error
Established
date
No power
Revised date
☞A17
Check
Logo LED
2013.01.31
6/16
☞A18
DC Power on
by pressing Power Key
On Remote control
Y
Power LED
On?
. Stand-By: Red or Turn On
N
. Operating: Turn Off
Normal N
operation?
Check Power
On ‘”High”
OK?
R l
Replace
Power
B/D
Y
Y
Check Power cord
was inserted properly
Replace Main B/D
☞A18
Normal?
Measure voltage of each output of Power B/D
N
Y
Close
Y
※
Check ST-BY 3.5V
Normal
Y
voltage?
☞A18
Normal
voltage?
g
Y
Replace Main B/D
N
Replace Power B/D
N
Replace Power
B/D
6
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Standard Repair Process
LCD TV
Error
symptom
B. Power error
Established
date
Off when on
on, off while viewing,
viewing power auto on/off
Revised date
2013.01.31
7/16
Check outlet
☞A19
Check A/C cord
Error?
N
Check Power Off
Mode
CPU
Abnormal
Normal?
Replace Main B/D
Y
End
N
Check for all 3- phase
power out
Y
Abnormal
1
☞A18
Fix A/C cord & Outlet
and check each 3
phase out
(If Power Off mode
is not displayed)
Check Power B/D
voltage
※ Caution
Ch k and
Check
d fix
fi exterior
i
of Power B/D Part
* Please refer to the all cases which
can be displayed on power off mode.
Replace Power B/D
Normal
voltage?
Y
Replace Main B/D
N
Replace Power B/D
Status
Power off List
"POWEROFF_REMOTEKEY"
"POWEROFF
REMOTEKEY"
"POWEROFF_OFFTIMER"
"POWEROFF_SLEEPTIMER"
"POWEROFF_INSTOP"
"POWEROFF_AUTOOFF"
N
Normal
l "POWEROFF_ONTIMER"
"POWEROFF ONTIMER"
"POWEROFF_RS232C"
"POWEROFF_RESREC"
"POWEROFF_RECEND"
"POWEROFF_SWDOWN"
"POWEROFF UNKNOWN"
"POWEROFF_UNKNOWN"
"POWEROFF_ABNORMAL1"
Abnormal
"POWEROFF_CPUABNORMAL"
Power
P
Power
Power
Power
Power
P
Power
Power
Power
Power
Power
P
Power
Power
Power
off
ff
off
off
off
off
off
ff
off
off
off
off
off
ff
off
off
Explanation
by
b REMOTE CONTROL
by OFF TIMER
by SLEEP TIMER
by INSTOP KEY
by AUTO OFF
by
b ON TIMER
by RS232C
by Reservated Record
by End of Recording
by S/W Download
by
b unknown
k
status
t t exceptt lilisted
t d case
by abnormal status except CPU trouble
by CPU Abnormal
7
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Standard Repair Process
LCD TV
Error
symptom
C. Audio error
Established
date
No audio/ Normal video
Revised date
☞A20
No audio
Screen normal
Check user
menu >
Speaker off
2013.01.31
8/16
☞A21+A18
Off
N
Check audio B+
24V of Power
Board
Normal
voltage
Y
N
Cancel OFF
Check
Speaker
disconnection
Y
Replace Power Board and repair parts
Disconnection
N
Replace MAIN Board
End
Y
Replace Speaker
8
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Standard Repair Process
LCD TV
Error
symptom
C. Audio error
Established
date
Wrecked audio/ discontinuation/noise
Revised date
2013.01.31
9/16
→ abnormal audio/discontinuation/noise is same after “Check input signal” compared to No audio
Check input
signal
-RF
-External Input
signal
Wrecked audio/
Discontinuation/
Noise for
all audio
Signal
normal?
☞A21+A18
Check and replace
speaker and
connector
Check audio
B+ Voltage (24V)
Y
Y
Wrecked audio/
Discontinuation/
Noise only
for D-TV
N
N
Wrecked audio/
Discontinuation/
Noise only
for Analog
(When RF signal is not
received)
Request repair to external
cable/ANT provider
(In case of
External Input
signal error)
Check and fix
external device
Normal
voltage?
Replace Main B/D
Replace Power B/D
Replace Main B/D
Wrecked audio/
Discontinuation/
Noise only
for External Input
Connect and check
other external
device
Normal
audio?
End
N
Y
Check and fix external device
9
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Standard Repair Process
D. Function error
Error
symptom
LCD TV
Established
date
Remote control & Local switch checking
2013.01.31
Revised date
10/16
1. Remote control(R/C) operating error
☞A22
Check R/C itself
Operation
☞A22
Check & Repair
Cable connection
Connector solder
Normal Y
operating?
N
Normal
operating?
N
Y
Check R/C Operating
When turn off light
in room
Check & Replace
Baterry of R/C
If R/C operate,
Explain the customer
cause is interference
from light in room.
Y
Normal
operating?
Replace
Main B/D
Check B+
3.5V
On Main B/D
☞A18
Close
Normal
Voltage?
Y
☞A22
A22
Check IR
Output signal
N
Check 3.5v on Power B/D
Replace Power B/D or
Replace Main B/D
(Power B/D don’t have problem)
Normal
Signal?
Y
N
Repair/Replace
IR B/D
Close
N
Replace R/C
10
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Standard Repair Process
D. Function error
Error
symptom
LCD TV
Established
date
MR13 operating checking
2013.01.31
Revised date
11/16
2. MR13(Magic Remocon) operating error
☞A4
Check the
INSTART menu
RF Receiver ver
is “00.00”?
N
Check MR13
itself Operation
Normal Y
operating?
Press the
wheel
N
☞A23
Y
Y
Check & Replace
Battery of MR13
Check & Repair
RF assy
connection
Y
Normal
operating?
☞A4
RF Receiver ver
is “00.00”?
N
Y
Cl
Close
Turn off/on the
set and press
the wheel
Is show ok N
message?
N
Close
Close
Is show ok
message?
N
Press the back
y about 5sec
key
Y
Replace
MR13
Close
Down load the Firmware
* If you conduct the loop at 3times, change the M4.
* INSTART MENUÆ14.RF
Remocon TestÆ3. Firmware
download
11
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Standard Repair Process
LCD TV
D. Function error
Error
symptom
Established
date
Wifi operating checking
2013.01.31
Revised date
12/16
3.Wifi operating error
☞A4
Check the
INSTART menu
☞A24
Wi-Fi Mac value
is “NG”?
☞A24
N
Check the Wifi wafer
1pin
Normal
Voltage?
N
Replace
Main B/D
Y
Y
Close
Check & Repair
Wifi cable
connection
☞A4
Wi-Fi Mac value
is “NG”?
N
Close
Y
Change the Wifi
assy
12
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Standard Repair Process
LCD TV
D. Function error
Error
symptom
Established
date
Camera operating checking
2013.01.31
Revised date
13/16
4.Camera operating error
☞A4
Check the
INSTART menu
☞A25
Camera Ver.
is “NULL”?
☞A25
N
Check the Camera wafer
P4200 12,13pin
Normal
Voltage?
N
Replace
Main B/D
Y
Y
Close
Check & Repair
Camera cable
connection
☞A4
Camera Ver.
is “NULL”?
N
Close
Y
Change the
Camera assy
13
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Standard Repair Process
LCD TV
Check
input
signal
Error
symptom
Signal
input?
Y
N
D. Function error
Established
date
External device recognition error
Revised date
Check technical
information
- Fix information
- S/W Version
Check and fix
external device/cable
Technical
information?
N
External Input and
Component
Recognition error
2013.01.31
14/16
Replace Main B/D
Y
Fix in
accordance
with technical
information
HDMI/
DVI, Optical
Recognition error
Replace Main B/D
14
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Standard Repair Process
LCD TV
Identify
nose
type
Error
symptom
Circuit
noise
Mechanical
noise
E. Noise
Established
date
Circuit noise
noise, mechanical noise
Revised date
Check
location of
noise
2013.01.31
15/16
Replace PSU
Check location of
noise
※ Mechanical
M h i l noise
i iis a natural
t l
phenomenon, and apply the 1st level
description. When the customer does not
agree, apply the process by stage.
※ Describe the basis of the description
i “P
in
“Partt related
l t d tto nose”” in
i th
the O
Owner’s
’
Manual.
OR
OR
※ When the nose is severe, replace the module
(For models with fix information, upgrade the
provide the description)
p
)
S/W or p
※ If there is a “Tak Tak” noise from the
cabinet, refer to the KMS fix information and
then proceed as shown in the solution manual
((For models without anyy fix information,,
provide the description)
15
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Standard Repair Process
LCD TV
F. Exterior defect
Error
symptom
Zoom part with
Z
ih
exterior damage
Exterior defect
Module
damage
Replace module
Cabinet
damage
Replace cabinet
Remote
controller
damage
Stand
dent
Established
date
Revised date
2013.01.31
16/16
Replace remote controller
Replace
ep ace sta
stand
d
16
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Contents of LCD TV Standard Repair Process Detail Technical Manual
No.
1
Error symptom
Content
Page
Check LCD back light with naked eye
A1
Check White Balance value
A2
TUNER input signal strength checking
method
A3
LCD-TV Version checking method
A4
Tuner Checking Part
A5
LCD TV connection
ti
diagram
di
A6
Check Link Cable (EPI) reconnection
condition
A7
9
Adj
Adjustment
Test pattern - ADJ
A J Key
K
A8
10
Exchange Main Board (1)
A-1/5
Exchange Main Board (2)
A-2/5
Exchange Power Board (PSU)
A-3/5
Exchange Module (1)
A-4/5
Exchange Module (2)
A-5/5
A
5/5
2
A. Video error
A
error_ No video/Normal
audio
4
5
A. Video error
A
error_ video error /Video
lag/stop
6
7
8
11
12
13
A. Video error _Vertical/Horizontal
Vertical/Horizontal bar,
residual image, light spot
A. Video error_ Color error
<Appendix>
Appendix
Defected Type caused by T-Con/
Inverter/ Module
14
Remarks
Continue to the next page
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Contents of LCD TV Standard Repair Process Detail Technical Manual
Continued from previous page
No.
Error symptom
16
Content
Page
Check front display LED
A17
Check power input Voltage & ST-BY 3.5V
A18
POWER
POW
R OFF MODE
MO
checking method
A19
Checking method in menu when there is
no audio
A20
Voltage and speaker checking method
when there is no audio
A21
Remote controller operation checking
method
A22
Motion Remote operation checking
method
A23
23
Wifi operation checking method
A24
24
Camera operation checking method
A25
Tool option changing method
A26
Remarks
B. Power error_ No power
17
18
19
20
B. Power error_Off when on, off
while
hil viewing
i i
C. Audio error_ No audio/Normal
video
21
22
25
D. Function error
E. Etc
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
Not Used
LGE Internal Use Only
Standard Repair Process Detail Technical Manual
LCD TV
Error
symptom
A. Video error_No video/Normal audio
Content
Check LCD back light with naked eye
Established
date
Revised
date
2013.01.31
A1
<65UB9500-NA>
After turning on the power and disassembling the case, check with the naked eye,
whether you can see light from locations.
A1
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Standard Repair Process Detail Technical Manual
LCD TV
Error
symptom
A. Video error_No video/Normal audio
Content
Check White Balance value
Established
date
Revised
date
2014.02.14
A2
<ALL MODELS>
Entry
Entrymethod
method
1.1.Press
Pressthe
theADJ
ADJbutton
buttonononthe
theremote
remotecontroller
controllerforforadjustment.
adjustment.
2.2.Enter
Enterinto
intoWhite
WhiteBalance
Balanceofofitem
item6.10.
3.3.Aft
3
After
di the
ththeR,
RR,G
G,G,B B(GAIN,
(GAIN
Cut)
t) value
l offofC
Color
l T
Temp
Afterrecording
recording
(GAIN,C
Cut)
value
Color
Temp
(Cool/Medium/Warm),
re-enter
the
value
after
replacing
(Cool/Medium/Warm), re-enter the value after replacingthe
theMAIN
MAINBOARD.
BOARD.
A2
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Standard Repair Process Detail Technical Manual
LCD TV
Error
symptom
A. Video error_Video error, video lag/stop
Content
TUNER input signal strength checking method
Established
date
Revised
date
2014.02.14
A3
<ALL MODELS>
간편설정Æ 채널 Æ 채널설정 Æ 수동 채널
When the signal is strong,
use the
th attenuator
tt
t (-10dB,
( 10dB 15dB, -20dB etc.)
A3
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Standard Repair Process Detail Technical Manual
LCD TV
Error
symptom
A. Video error_Video error, video lag/stop
Content
LCD TV Version checking method
LCD-TV
<ALL MODELS>
Established
date
Revised
date
2014.02.14
A4
1. Checking method for remote controller for adjustment
Version
Press the IN-START with the remote
controller
t ll for
f adjustment
dj t
t
A4
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Standard Repair Process Detail Technical Manual
LCD TV
Error
symptom
A. Video error_Video error, video lag/stop
Content
TUNER checking part
Established
date
Revised
date
2014.02.14
A5
<ALL MODELS>
Checking method:
1. Check the signal strength or check whether the screen is normal when the external device is connected.
g each voltage
g from p
power supply,
pp y, finally
y replace
p
the MAIN BOARD.
2. After measuring
A5
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Standard Repair Process Detail Technical Manual
LCD TV
Error
symptom
Content
A. Video error _Vertical/Horizontal bar,
residual image, light spot
LCD TV connection
ti di
diagram (1)
Established
date
Revised
date
2014.02.14
A6
<ALL MODELS>
As the part connecting to the external input, check
the screen condition by signal
A6
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Standard Repair Process Detail Technical Manual
LCD TV
Error
symptom
A. Video error_Color error
Content
Ch k Li
Check
Link
kC
Cable
bl (LVDS) reconnection
ti condition
diti
Established
date
Revised
date
2014.02.14
A7
<ALL MODELS>
Check the contact condition of the Link Cable,
Cable especially dust or mis insertion
insertion.
A7
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Standard Repair Process Detail Technical Manual
LCD TV
Error
symptom
A. Video error_Color error
Content
Adjustment Test pattern - ADJ Key
Established
date
Revised
date
2014.02.14
A8
You can view 6 types of patterns using the ADJ Key
Checking item : 1. Defective pixel 2. Residual image 3. MODULE error (ADD-BAR,SCAN BAR..)
4.Video error (Classification of MODULE or Main-B/D!)
A8
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Appendix : Exchange Main Board (1)
Solder defect, CNT Broken
Solder defect, CNT Broken
Solder defect, CNT Broken
Solder defect, CNT Broken
T-Con
T-Con
Defect,
Defect,
CNT
CNT
Broken
Broken
Solder
defect,CNT
CNTBroken
Broken
T-Con
Defect,
Abnormal Power Section
Solder defect, Short/Crack
Abnormal Power Section
Solder defect, Short/Crack
A - 1/5
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Appendix : Exchange Main Board (2)
Abnormal Power Section
Solder defect, Short/Crack
GRADATION
Abnormal Power Section
Solder defect
defect, Short/Crack
Fuse Open, Abnormal power section
Abnormal Display
Noise
GRADATION
A - 2/5
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Appendix : Exchange Power Board (PSU)
No Light
Dim Light
Dim Light
Dim Light
No picture/Sound Ok
A - 3/5
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Appendix : Exchange the Module (1)
Panel Mura, Light leakage
Crosstalk
Panel Mura, Light leakage
Press damage
Press damage
Crosstalk
Un-repairable Cases
In this case p
please exchange
g the module.
Press damage
A - 4/5
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Appendix : Exchange the Module (2)
Vertical Block
Source TAB IC Defect
Horizontal Block
Gate TAB IC Defect
Vertical Line
S
Source
TAB IC D
Defect
f t
Horizontal Block
Gate TAB IC Defect
Gate TAB IC Defect
Vertical Block
S
Source
TAB IC D
Defect
f t
Horizontal line
Gate TAB IC Defect
Gate TAB IC Defect
Un-repairable Cases
In this case p
please exchange
g the module.
Horizontal Block
Gate TAB IC Defect
Gate TAB IC Defect
A - 5/5
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Standard Repair Process Detail Technical Manual
LCD TV
Error
symptom
Content
B. Power error _No power
Ch k ffrontt P
Check
Power IIndicator
di t
Established
date
Revised
date
2014.02.07
A17
<65UB9500-NA>
ST-BY
ST
BY condition:
diti
O
On or Off
Power ON condition: Turn Off
A17
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Standard Repair Process Detail Technical Manual
LCD TV
Error
symptom
Content
B. Power error _No power
Check power input voltage and ST-BY
ST BY 3
3.5V
5V
Established
date
Revised
date
2014.02.05
A18
Check the DC 24V, 12V, 3.5V.
P_main
P
main
Maker : Yeonho
28Pin SMAW200-H28S5K
’14년 적용 28Pin map (LPB)
1
PWR ON
2
DVR_ON
3
P_DIM #1
4
PDIM #2
5
3.5V
6
GND
7
3.5V
8
3.5V
9
GND
10
GND
11
12V
12
12V
13
12V
14
12V
15
12V
16
GND
17
GND
18
24V
19
24V
20
24V
21
24V
22
24V
23
GND
24
GND
25
SCLK
26
GND
27
SIN
28
VSYNC
A18
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Standard Repair Process Detail Technical Manual
LCD TV
Error
symptom
Content
B. Power error _Off when on, off whiling viewing Established
date
POWER OFF MODE checking
h ki method
th d
Revised
date
2014.02.05
A19
<ALL MODELS>
Entry method
1. Press the IN-START button of the remote
controller for adjustment
2. Check the entry into adjustment item 3
A19
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Standard Repair Process Detail Technical Manual
LCD TV
Error
symptom
C. Audio error_No audio/Normal video
Content
Ch ki method
Checking
th d in
i menu when
h there
th
is
i no audio
di
Established
date
Revised
date
2014.02.05
A20
<ALL MODELS>
Checking method
1. Press the Setting
g button on the remote controller
2. Select the Sound function of the Menu
3. Select the Sound Out
p
4. Select TV Speaker
A20
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Standard Repair Process Detail Technical Manual
LCD TV
Error
symptom
C. Audio error_No audio/Normal video
Content
Voltage and speaker checking method
when there is no audio
Established
date
Revised
date
2014.02.05
A21
<65UB9500-NA>
② ②
1
PWR ON
2
DVR_ON
3
P_DIM #1
4
PDIM #2
5
3 5V
3.5V
6
GND
7
3.5V
8
3.5V
9
GND
10
GND
11
12V
12
12V
13
12V
14
12V
15
12V
16
GND
17
GND
18
24V
19
24V
20
24V
21
24V
22
24V
23
GND
24
GND
25
SCLK
26
GND
27
SIN
28
VSYNC
①
③
1
SPK_R-
2
SPK_R+
3
SPK_L-
4
SPK L+
SPK_L+
Checking order when there is no audio
1.Check the contact condition of or 24V connector of Main Board
2. Measure the 24V input voltage supplied from Power Board
(If there is no input voltage, remove and check the connector)
3.Connect the tester RX1 to the speaker terminal and if you hear the Chik Chik sound when you touch the
GND and output terminal, the speaker is normal.
A21
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Standard Repair Process Detail Technical Manual
LCD TV
Error
symptom
D. Function error
Content
Remote controller operation checking method
Established
date
Revised
date
2014.02.07
A22
<65UB9500-NA>
①
③
②
1
GND
2
+3.5V WOL
3
BT_RESET
4
USB_DM
5
NC
6
USB_DP
7
WOL
8
GND
9
SDA
10
GND
11
SCL
12
KEY1
13
GND
14
KEY2
15
IR
16
+3.5V_ST
17
LED_R
18
GND
Checking order to check remote controller
Checking
g order
1.Check IR cable condition between IR & Main board.( Check picture number① and ②)
2.Check the standby 3.5V on the terminal 16 pin (③)
3.AS checking the Pre-Amp(IR LED light) , the power is in ON condition, an Analog Tester
needle should move slowly,
slowly otherwise
otherwise, it’s
it s defective
defective.
A22
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Standard Repair Process Detail Technical Manual
LCD TV
Error
symptom
D. Function error
Content
Remote controller operation checking method
Established
date
Revised
date
2014.02.07
A22
<65UB9500-NA>
①
③
②
1
GND
2
+3.5V WOL
3
BT_RESET
4
USB_DM
5
NC
6
USB_DP
7
WOL
8
GND
9
SDA
10
GND
11
SCL
12
KEY1
13
GND
14
KEY2
15
IR
16
+3.5V_ST
17
LED_R
18
GND
Checking order to check motion remote/wifi
Checking
g order
1.Check BT/Wifi cable condition between BT/Wifi assy & Main board.
2.Check the 3.5V on the terminal 16
A22
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Standard Repair Process Detail Technical Manual
Error
symptom
LCD TV
Content
E. Etc
T l option
Tool
ti
changing
h
i method
th d
Established
date
Revised
date
2014.02.05
A26
<65UB9500-NA>
②
①
Changing method
1.
Contact the USB memory. (USB 1,2,3 jack)
2.
Enter the password. (ex. 000000)
* Access USB Memory has each password.
A30
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only