International Journal of Electronics Theoretical and
Experimental
ISSN: 0020-7217 (Print) 1362-3060 (Online) Journal homepage: https://www.tandfonline.com/loi/tetn20
A simple frequency multiplier
K. A. KRISHNAMURTHY , G. K. DUBEY & G. N. REVANKAR
To cite this article: K. A. KRISHNAMURTHY , G. K. DUBEY & G. N. REVANKAR (1977) A simple
frequency multiplier, International Journal of Electronics Theoretical and Experimental, 43:2,
201-205, DOI: 10.1080/00207217708900714
To link to this article: https://doi.org/10.1080/00207217708900714
Published online: 16 Jan 2007.
Submit your article to this journal
Article views: 127
View related articles
Full Terms & Conditions of access and use can be found at
https://www.tandfonline.com/action/journalInformation?journalCode=tetn20
INT. J. ELECTRONICS,
1077, VOL. 43,
YO.
2, 201-205
A simple frequency multiplier
K . A . KltISHNAhlURTHYt, G. K. D U B E Y t and
G. N. REVANKART
The pnpor describes n schemo of n frequcncy multiplier that can be used for multiplying
tho frequcncy by n times. By connecting such rn circuits in soqueneo it ia posaibla
to achieva frequency rnultiplicntian of mn.
I.
Introduction
Freqnency multiplication is extensively used in the generation of Walsh
functions. I n pulse techniques i t is often required t o double, trehleor multiply
the input frequency by a factor n, without losing synchronization with the
original waveform. I n thyristor circuits with pulse width modulation techniques, frequency multiylict~tionschemes are widely used. The most common
method of multiplying the frequency is by the use of phase-locked loops.
However, such n scheme is costly and compl~cated. A few frequency doubler
and tripler circuits are available in the literature. A freqnency doubler
circuit (Shivaprasad 1072) can be realized by using a monostable-multivibrator
\\.it11 simple logic gates. Preqncncy tripler circuit (Rno a n d Krishnamorthy
1976) can be constructed by using integrators and logic gates. The present
paper discusses the principle of operation of a n n times frequency multiplier.
Frequency tripler
'rho principle of operation of the frequency n~nltiplicris explained with
refcrence to Fig. I , where frequency mnltiplicntion is 3. The frequency
multiplication system consists o f a sq~lnre-wavegenerator S, integrator TI,
2.
Figure 1.
Block diagram of thc frequcncy tripler.
Received 18 October 1976.
t Department of Electrical Engineering, Indian Institute of Technology, Bombay,
Ponai, Bombay 40007G, India.
amplifier AA, comparators C, C, ; and exclusive-OR gates EX and FX, all
connected as shown in Fig. I . The output waveforms corresponding to circuit
blocks of Fig. 1 are given in Fig. 2. The input signal is converted into a
sqnare-wave by the square-wave generator S. The square-wave is converted
into a triangular wave of requimd amplitude by the integrator 11 and amplifier
Figure 2. Timing dingram uf Lhc fmqucncy tripler
AA. The tr~angular waveform is Lhen compared with thc predctermined
voltage reference V,,, and V,, in the comparators C, and C,. The output of
the comparators C, and C, are givcn by waveforms D and E. These outputs
are then exclusively-ORed in the gate EX, nod finally the outpnt of the gate
EX is exclusively-0Red with the squarc-ursve A . Output of the gate F X is
givcn by F. The out.put waveform F w ~ l lhuve a frequency equal to thrice the
input freqnency nnd will also be in synchronism with the input square-wave A .
The reference voltages V,,, and V,,, arc t1.c. voltages and their magnitudes are
equal to 5 and f of Lhc triangular wave amplitude.
3.
n-Times frequency multiplier
The above principle can be used to realize frequency multiplication of n .
Howevcr, (n- I ) coniparators and (n- I ) reference voltagcs are required.
l ' l ~ crcfcrcncc volt:~gcs will have magnitudes of V / n , 21'/n, . . ., ( T I - I ) V / n ,
where V rcprcscntr t,llc nmplitndc of the triting~~lar
wave. ( x - 1 ) Outputs
of t2hecon~l~arators
w e then prn~nrl,ycon~binedin logic gates to yet the output
,
are connected
frcqnency which isa-times the inpnt frcqucncy. I f such ~ nstages
ill sequence, outpnt frcqucocy~willbe a i n .
Hence high frequency mult,iplication can bc achiuvetl choosing proper integrating elements.
A simple lreqliency mulliplier
Figure 3. Timing diagram of the frequency quadruplcr.
Figures 3 and 4 show the timing diagrams for frequency multiplication of
A is the input waveform. B, C, D and E are the
outputs of the comparators. Table 1 and 2 represent the truth table to
realize frequency multiplication of 4 and 5. In the truth table F shows the
output function.
4 and 5, respectively.
A
B
C
D
F
A
B
C
D
Table 2
From the truth table : for n = 4,
F=AE. @ E + c D ) + & .
(BC+BE)
E
F
K. A . Krishnamurthy e t al
204
and for n = 5,
The timing diagrams of Figs. 3 and 4 indicate the various waveforms
required to realisc the output function F.
Figure 4. Timing diagram of the frequency multiplier by a factor of 5,
4.
Circuit diagram of the frequency tripler
In order to verify the above principle, the circuit diagram shown in Fig. 5
was constructed. Thc operation of the circuit was quite satisfactory. The
circuit adjustments were found to be simpler as compared with the earlier
circuit (Rao and Krishnamurthy 1976). In addit,ion the present circuit has
thc following additional advantages.
( I ) In the proposed cifcuit the question of achieving synchronized tri-
angular waveforms starting from the same common reference does not.
arise.
( 2 ) Drift problem associated with two triangu1:lr-\s~aveform amplifiers are
ovcrcome.
(3) It is easy to extend the present method for multiplying the frequency
by any order.
A simple frequency n~ulliplier
Figure 5. Circuit diagram of the frequency tripler.
Conclusions
In this paper a scheme as well as circuit details for multiplying the frequency by an order of 3 are given. Detailed logic and timing diagrams required
to get frequency multiplication by orders of 4 and 5 are given. The principle
can easily be extended to get frequency multiplication n. By cascading m
such stages in sequence, a frequency multiplication of mn can he achieved.
The circuit adjustments are simpler and operation is more reliable.
5.
REFERENCES
Rno, B. V., and KRISHSAMURTHY,
li. A., 1976, I d . J . Eledron., 40, 587.
S H I V ~ P R AA.~ P.,
A ~1972,
,
In(. J . Electron., 32, 233.