UNIVERSITY OF MKAR, MKAR
NAME:
ANTEM JOSHUA TERYIMA
MATRICULATION NUMBER:
UMM/SAE/22/1256
DEPARTMENT:
MATH AND COMPUTER SCIENCE
COURSE TITLE:
INTRODUCTION TO COMPUTER SYSTEMS
COURSE CODE:
1204
NATURE OF WORK:
ASSIGNMENT.
QUESTION:
Discuss the following functions performed by the CPU Model
1.
2.
3.
4.
5.
6.
Clock and CPU Control Unit
Address Decodes
Address and Data us buffers
Buffer Control
Bus Arbitration Control
Memory management
ANSWER
1. Clock and CPU Control Unit:
The clock and CPU control unit are responsible for managing the timing and
synchronization of the CPU's operations. The clock generates a regular electrical signal
that serves as a timing reference for the CPU's operations. It ensures that instructions
and data are processed at the correct speed and in the correct order.The CPU control
unit coordinates and controls the execution of instructions. It fetches instructions from
memory, decodes them, and issues signals to the other components of the CPU to
execute the instructions. The control unit also manages the flow of data between
different parts of the CPU and external devices.
2. Address Decoding:
Address decoding is a function performed by the CPU to interpret memory addresses
and determine the appropriate memory location to access or write data. When the CPU
wants to read or write data from/to memory, it provides an address specifying the
location. The address decoding circuitry translates this address into the appropriate
memory chip and location. Address decoding typically involves comparing the address
bits against predefined patterns or using logic gates to determine the appropriate
memory chip's enable signal. By decoding the address, the CPU can select the correct
memory location or device to perform the desired operation.
3. Address and Data Buffers:
Address and data buffers are temporary storage areas used to hold address and data
values during processing by the CPU. The buffers allow for efficient data transfer
between different parts of the CPU and external devices.The address buffer holds the
memory address that the CPU wants to access. It can temporarily store the address
while other operations are being performed, such as fetching instructions or accessing
data from memory.The data buffer, on the other hand, holds the data being transferred
between the CPU and memory or other devices. It allows for faster data transfer by
temporarily holding the data before it is processed or stored.
4. Buffer Control:
Buffer control refers to the management and control of the address and data buffers
within the CPU. The buffer control circuitry ensures that data is transferred to and from
the buffers at the correct time and in the correct sequence.Buffer control involves
coordinating the flow of data between different parts of the CPU, such as the ALU
(Arithmetic Logic Unit), control unit, and memory. It ensures that data is properly stored
in the buffers, retrieved when needed, and transferred to the appropriate components
for processing.
5. Bus Arbitration Control:
Bus arbitration control is the process of managing access to the system bus, which is a
shared communication pathway between the CPU and other devices such as memory,
input/output devices, and peripherals. Since multiple devices may request access to the
bus simultaneously, bus arbitration control determines the priority and timing of these
requests.The CPU's bus arbitration control unit handles requests from various devices
and determines which device gets access to the bus at any given time. It ensures fair
and efficient use of the bus by managing requests, prioritizing certain devices over
others, and resolving conflicts when multiple devices request bus access simultaneously.
6. Memory Management:
Memory management is the function performed by the CPU to control and organize the
system's memory resources. It includes allocating memory to different processes,
keeping track of which memory locations are in use or available, and managing data
transfer between the CPU and memory.The CPU's memory management unit (MMU) is
responsible for translating virtual addresses used by the CPU into physical addresses
that correspond to specific memory locations. It also handles memory protection,
ensuring that each process can access only its allocated memory and preventing
unauthorized access.Memory management involves techniques such as virtual memory,
caching, and paging to optimize memory usage, improve performance, and provide a
larger addressable space for programs than the physical memory available.
REFERENCES:
1. "Computer Organization and Design: The Hardware/Software Interface" by David A.
Patterson and John L. Hennessy.
2. "Digital Design and Computer Architecture" by David Harris and Sarah Harris.
3. "Computer Architecture: A Quantitative Approach" by John L. Hennessy and David A.
Patterson.