®
INA145
INA
145
For most current data sheet and other product
information, visit www.burr-brown.com
Programmable Gain
DIFFERENCE AMPLIFIER
FEATURES
DESCRIPTION
● DIFFERENTIAL GAIN = 1V/V TO 1000V/V:
Set with External Resistors
● LOW QUIESCENT CURRENT: 570µA
The INA145 is a precision, unity-gain difference
amplifier consisting of a precision op amp and onchip precision resistor network. Two external resistors
set the gain from 1V/V to 1000V/V. The input common-mode voltage range extends beyond the positive
and negative rails.
● WIDE SUPPLY RANGE:
Single Supply: 4.5V to 36V
Dual Supplies: ±2.25V to ±18V
● HIGH COMMON-MODE VOLTAGE:
+8V at VS = +5V
±28V at VS = ±15V
On-chip precision resistors are laser-trimmed to achieve
accurate gain and high common-mode rejection. Excellent TCR tracking of these resistors assures continued high precision over temperature.
● LOW GAIN ERROR: 0.01%
● HIGH CMR: 86dB
The INA145 is available in the SO-8 surface-mount
package specified for the extended industrial temperature range, –40°C to +85°C.
● SO-8 PACKAGE
APPLICATIONS
● CURRENT SHUNT MEASUREMENTS
● SENSOR AMPLIFIER
● DIFFERENTIAL LINE RECEIVER
● BATTERY POWERED SYSTEMS
RG1
RG2
V+
RG
7
VIN–
2
5
R2
40kΩ
R1
40kΩ
R5
10kΩ
(1%)
G=1
A2
6
A1
VO
+
–
VO = (VIN – VIN)(1 + RG2/RG1)
+
VIN
3
R3
40kΩ
R4
40kΩ
INA145
4
V–
1
8
Ref
V01
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111
Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
®
©1999 Burr-Brown Corporation
SBOS120
PDS-1567B
1
INA145
Printed in U.S.A. March, 2000
SPECIFICATIONS: VS = ±2.25V to ±18V
Boldface limits apply over the specified temperature range, TA = –40°C to +85°C
At TA = +25°C, G = 1, RL = 10kΩ connected to ground and ref pin connected to ground unless otherwise noted.
INA145UA
PARAMETER
CONDITION
OFFSET VOLTAGE, VO
Input Offset Voltage
vs Temperature
vs Power Supply
vs Time
Offset Voltage, V01
INPUT VOLTAGE RANGE
Common-Mode Voltage Range
Common-Mode Rejection
Over Temperature
VOS
∆VOS /∆T
PSRR
MIN
RTI(1, 2)
VCM = VO = 0V
VS = ±1.35V to ±18V
RTI(1, 2)
VCM
CMRR
INPUT BIAS CURRENT(2)
Bias Current
Offset Current
(VIN+) – (VIN–) = 0V, VO = 0V
VCM = 2(V–) to 2(V+) – 2V, RS = 0Ω
VS = ±15V
TYP
MAX
UNITS
±0.2
See Typical Curve
±20
±0.3
±0.4
±1
mV
±60
µV/V
µV/mo
mV
2(V+) –2
86
80
V
dB
dB
±50
±5
nA
nA
80
27
40
kΩ
kΩ
kΩ
2
90
µVp-p
nV/√Hz
G = 1 to 1000
G = 1 + RG2 /RG1
1
±0.01
±2
±0.01
±2
±0.0002
V/V
V/V
%
ppm /°C
%
ppm /°C
% of FS
2(V–)
76
70
VCM = VS /2
IB
IOS
INPUT IMPEDANCE
Differential (non-inverting input)
Differential (inverting input)
Common-Mode
NOISE
Voltage Noise, f = 0.1Hz to 10Hz
Voltage Noise Density, f = 1kHz
RTI(1, 3)
en
GAIN
Gain Equation
Initial(1)
Gain Error
vs Temperature
RL = 100kΩ, VO = (V–)+0.15 to (V+)–1, G = 1
RL = 100kΩ, VO = (V–)+0.25 to (V+)–1, G = 1
RL = 10kΩ, VO = (V–)+0.3 to (V+)–1.25, G = 1
RL = 10kΩ, VO = (V–)+0.5 to (V+)–1.25, G = 1
RL = 10kΩ, VO = (V–)+0.3 to (V+)–1.25, G = 1
vs Temperature
Nonlinearity
FREQUENCY RESPONSE
Small Signal Bandwidth
G=1
G = 10
Slew Rate
Settling Time, 0.1%
0.01%
Overload Recovery
RL = 100kΩ, G = 1
RL = 100kΩ, G = 1
RL = 10kΩ, G = 1
RL = 10kΩ, G = 1
Continuous to Common
Stable Operation
Over Temperature
Short-Circuit Current
Capacitive Load
POWER SUPPLY
Specified Voltage Range, Dual Supplies
Operating Voltage Range
Quiescent Current
Over Temperature
TEMPERATURE RANGE
Specified Range
Operating Range
Storage Range
Thermal Resistance
500
50
0.45
40
90
40
G = 1, 10V Step
G = 1, 10V Step
50% Input Overload
OUTPUT, VO
Voltage Output
Over Temperature
(V–) + 0.15
(V–) + 0.25
(V–) + 0.3
(V–) + 0.5
kHz
kHz
V/µs
µs
µs
µs
(V+) – 1
(V+) – 1
(V+) – 1.25
(V+) – 1.25
V
V
V
V
mA
pF
±18
±18
±700
±800
V
V
µA
µA
+85
+125
+125
°C
°C
°C
°C/W
±15
1000
±2.25
±1.35
VIN = 0, IO = 0
±570
–40
–55
–55
θJA
±0.1
±10
±0.1
±10
±0.005
150
NOTES: (1) Referred to input pins (VIN+ and VIN–), Gain = 1V/V. Specified with 10kΩ in feedback of A2. (2) Input offset voltage specification includes effects of amplifier’s
input bias and offset currents. (3) Includes effects of input bias current noise and thermal noise contribution of resistor network.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
®
INA145
2
SPECIFICATIONS: VS = +5V Single Supply
Boldface limits apply over the specified temperature range, TA = –40°C to +85°C
At TA = +25°C, G = 1, RL = 10kΩ connected to ground and ref pin connected to 2.5V unless otherwise noted.
INA145UA
PARAMETER
CONDITION
OFFSET VOLTAGE, VO
Input Offset Voltage
VOS
vs Temperature
∆VOS /∆T
vs Power Supply Rejection Ratio
PSRR
vs Time
Offset Voltage, V01
INPUT VOLTAGE RANGE
Common-Mode Voltage Range(3)
Common-Mode Rejection Ratio
Over Temperature
VCM
CMRR
INPUT BIAS CURRENT(2)
Bias Current
Offset Current
MIN
RTI(1, 2)
VCM = VO = 2.5V
VS = ±1.35V to ±18V
RTI(1, 2)
VIN+ – VIN– = 0V, VO = 2.5V
VCM = –2.5V to +5.5V, RS = 0Ω
–2.5
76
IB
IOS
INPUT IMPEDANCE
Differential (non-inverting input)
Differential (inverting input)
Common-Mode
NOISE
Voltage Noise, f = 0.1Hz to 10Hz
Voltage Noise Density, f = 1kHz
MAX
UNITS
±0.35
See Typical Curve
±20
±0.3
±0.55
±1
mV
±60
µV/°C
µV/mo
mV
5.5
86
80
V
dB
dB
±50
±5
nA
nA
80
27
40
kΩ
kΩ
kΩ
2
90
µVp-p
nV/√Hz
G = 1 to 1000
G = 1 + RG2 /RG1
1
±0.01
±2
±0.01
±2
±0.001
V/V
V/V
V/V
%
ppm /°C
%
ppm /°C
% of FS
RTI(1, 4)
en
GAIN
Gain Equation
Initial(1)
Gain Error
vs Temperature
RL = 100kΩ, VO = 0.15V to 4V, G = 1
RL = 100kΩ, V O = 0.25V to 4V, G = 1
RL = 10kΩ, VO = 0.3V to 3.75V, G = 1
RL = 10kΩ, VO = 0.5V to 3.75V, G = 1
R L = 10kΩ, VO = +0.3 to +3.75, G = 1
vs Temperature
Nonlinearity
FREQUENCY RESPONSE
Small Signal Bandwidth
G = 0.1
G=1
Slew Rate
Settling Time, 0.1%
0.01%
Overload Recovery
RL = 100kΩ, G = 1
RL = 100kΩ, G = 1
RL = 10kΩ, G = 1
RL = 10kΩ, G = 1
Continuous to Common
Stable Operation
Over Temperature
Short-Circuit Current
Capacitive Load
POWER SUPPLY
Specified Voltage Range, Single Supply
Operating Voltage Range
Quiescent Current
Over Temperature
0.15
0.25
0.3
0.5
kHz
kHz
V/µs
µs
µs
µs
4
4
3.75
3.75
V
V
V
V
mA
pF
+36
+36
700
800
V
V
µA
µA
+85
+125
+125
°C
°C
°C
°C/W
±15
1000
+4.5
+2.7
VIN = 0, IO = 0
550
–40
–55
–55
θJA
±0.1
±10
±0.1
±10
±0.005
500
50
0.45
40
90
40
G = 1, 10V Step
G = 1, 10V Step
50% Input Overload
OUTPUT, VO
Voltage Output
Over Temperature
TEMPERATURE RANGE
Specified Range
Operating Range
Storage Range
Thermal Resistance
TYP
150
NOTES: (1) Referred to input pins (VIN+ and VIN–), Gain = 1V/V. Specified with 10kΩ in feedback of A2. (2) Input offset voltage specification includes effects of
amplifier’s input bias and offset currents. (3) Common-mode voltage range with single supply is 2(V+) – 2V – VREF to –VREF. (4) Includes effects of input current
noise and thermal noise contribution of resistor network.
®
3
INA145
AMPLIFIER A1, A2 PERFORMANCE
Boldface limits apply over the specified temperature range, TA = –40°C to +85°C
At TA = +25°C, G = 1, RL = 10kΩ connected to ground and ref pin connected to ground unless otherwise noted.
INA145UA
PARAMETER
CONDITION
MIN
TYP
MAX
UNITS
RTI(1, 2)
OFFSET VOLTAGE, VO
Input Offset Voltage
vs Temperature
VOS
∆VOS /∆T
VS = ±15V, VCM = VO = 0V
±0.5
±1
mV
µV/°C
VCM
CMRR
VIN+ – VIN– = 0V, VO = 0V
VCM = (V–) to (V+) –1
(V–) to (V+) –1
90
V
dB
AOL
110
dB
IB
IOS
±50
±5
nA
nA
10
±0.2
±50
kΩ
%
ppm/°C
INPUT VOLTAGE RANGE
Common-Mode Voltage Range
Common-Mode Rejection Ratio
OPEN-LOOP GAIN
Open Loop Gain
CURRENT(2)
INPUT BIAS
Bias Current
Offset Current
RESISTOR AT A1 OUTPUT, VO1
Initial
Error
Temperature Drift Coefficient
ELECTROSTATIC
DISCHARGE SENSITIVITY
PIN CONFIGURATION
Top View
SO-8
Ref
1
8
VO1
–
VIN
2
7
V+
+
VIN
3
6
VO
V–
4
5
RG
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
ABSOLUTE MAXIMUM RATINGS(1)
Supply Voltage, V+ to V– .................................................................... 36V
Signal Input Terminals, Voltage ........................................................ ±80V
Current ....................................................... ±1mA
Output Short Circuit (to ground) .............................................. Continuous
Operating Temperature .................................................. –55°C to +125°C
Storage Temperature ..................................................... –55°C to +150°C
Junction Temperature .................................................................... +150°C
Lead Temperature (soldering, 10s) ............................................... +240°C
NOTE: (1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods may degrade
device reliability.
PACKAGE/ORDERING INFORMATION
PRODUCT
PACKAGE
PACKAGE
DRAWING
NUMBER
INA145UA
SO-8
182
–40°C to +85°C
INA145UA
"
"
"
"
"
SPECIFIED
TEMPERATURE
RANGE
PACKAGE
MARKING
ORDERING
NUMBER(1)
TRANSPORT
MEDIA
INA145UA
INA145UA/2K5
Rails
Tape and Reel
NOTE: (1) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /2K5 indicates 2500 devices per reel). Ordering 2500 pieces
of “INA145UA/2K5” will get a single 2500-piece Tape and Reel.
®
INA145
4
TYPICAL PERFORMANCE CURVES
At TA = +25°C, VS = ±15V, G = 1, RL = 10kΩ connected to ground and Ref pin connected to ground, unless otherwise noted.
GAIN vs FREQUENCY
GAIN vs FREQUENCY
60
60
VS = ±15V
CL = 1000pF
G = 100
40
Voltage Gain (dB)
Voltage Gain (dB)
40
20
G = 10
0
G = 10
20
0
G=1
G=1
–20
–20
100
1K
10K
100K
1M
10M
100
1K
Frequency (Hz)
10K
100K
1M
10M
Frequency (Hz)
POWER SUPPLY REJECTION vs FREQUENCY
COMMON-MODE REJECTION vs FREQUENCY
100
Power Supply Rejection (dB)
100
Common-Mode Rejection (dB)
VS = ±15V
CL = 200pF 10kΩ
G = 100
80
60
40
20
PSR+
(VS = ±15V)
80
PSR+
(VS = +5V)
60
40
20
PSR–
(VS = ±15V)
0
0
10
100
1k
10k
100k
1M
1
10M
10
100
1k
10k
Frequency (Hz)
Frequency (Hz)
INPUT VOLTAGE NOISE DENSITY
0.1Hz to 10Hz VOLTAGE NOISE (RTI)
100k
G=1
500nV/div
Input Voltage Noise (nV/√Hz
1k
100
G = 100
G = 10
10
0.1
1
10
100
1k
10k
100k
500ms/div
Frequency (Hz)
®
5
INA145
TYPICAL PERFORMANCE CURVES
(Cont.)
At TA = +25°C, VS = ±15V, G = 1, RL = 10kΩ connected to ground and Ref pin connected to ground, unless otherwise noted.
QUIESCENT CURRENT AND
SHORT-CIRCUIT CURRENT vs TEMPERATURE
SLEW RATE vs TEMPERATURE
18
0.55
630
16
610
14
590
12
570
10
IQ
550
8
G=1
0.5
0.45
0.4
0.35
530
6
510
4
490
2
0.25
0
0.2
470
–60
–40 –20
20
0
40
60
0.3
100 120 140
80
–60
–40 –20
0
Temperature (°C)
GAIN AND PHASE vs FREQUENCY
Op Amp A1 and A2
60
80
100 120 140
SETTLING TIME vs LOAD CAPACITANCE
G
140
RL = 10kΩ || 200pF
G=1
0.01%
120
Φ
–90
RL = 1nF
40
30
20
10
–135
Settling Time (µs)
90
80
70
60
50
G = 10
0.01%
100
80
G = 10
0.1%
G=1
0.1%
60
40
20
0
–10
0
–180
1
10
100
1k
10k
100k
1M
1
10
100
Frequency (Hz)
Load Capacitance (nF)
MAXIMUM OUTPUT VOLTAGE SWING
vs OUTPUT CURRENT
OFFSET VOLTAGE
PRODUCTION DISTRIBUTION
15
VS = ±2.25V
10
–25°C
+25°C
+85°C
5
–55°C
0
–55°C
+125°C
–5
–25°C
+85°C
–10
Typical Production
Distribution of
Packaged Units.
Relative Frequency
+125°C
+25°C
16
Offset Voltage, RTI (mV)
®
INA145
6
1
14
0.8
12
0.6
10
0.4
8
0.2
6
Output Current (mA)
0
4
–0.4
2
–0.6
0
–0.8
–15
–1
Output Voltage Swing (V)
40
160
Phase (°)
Open-Loop Gain (dB)
110
100
20
Temperature (°C)
–0.2
IQ (µA)
ISC
0.6
Sew Rate (V/µs)
G=1
650
20
ISC (mA)
670
TYPICAL PERFORMANCE CURVES
(Cont.)
At TA = +25°C, VS = ±15V, G = 1, RL = 10kΩ connected to ground and Ref pin connected to ground, unless otherwise noted.
OFFSET VOLTAGE DRIFT
PRODUCTION DISTRIBUTION
OFFSET VOLTAGE
PRODUCTION DISTRIBUTION
20
VS = ±15V
VS = ±15V
Relative Frequency
Relative Frequency
Typical Production
Distribution of
Packaged Devices
15
10
5
–10
–9
–8
–7
–6
–5
–4
–3
–2
–1
0
1
2
3
4
5
6
7
8
9
10
1
0.8
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1
0
Offset Voltage Drift, RTI (µV/°C)
Offset Voltage, RTI (mV)
SMALL-SIGNAL STEP RESPONSE
(G = 1, RL = 10kΩ, CL = 200pF)
(G = 1, CL = 1000pF)
50mV/div
50mV/div
SMALL-SIGNAL STEP RESPONSE
5µs/div
SMALL-SIGNAL STEP RESPONSE
LARGE-SIGNAL STEP RESPONSE
(G = 10, CL = 1000pF)
(G = 10, RL = 10kΩ, CL = 200pF)
5V/div
50mV/div
5µs/div
50µs/div
5µs/div
®
7
INA145
APPLICATION INFORMATION
SETTING THE GAIN
The gain of the INA145 is set by using two external
resistors, RG1 and RG2, according to the equation:
The INA145 is a programmable gain difference amplifier
consisting of a gain of 1 difference amplifier and a programmable-gain output buffer stage. Basic circuit connections are
shown in Figure 1. Power supply bypass capacitors should
be connected close to pins 4 and 7, as shown. The amplifier
is programmable in the range of G = 1 to G = 1000 with two
external resistors.
G = 1 + RG2 / RG1
For a total gain of 1, A2 is connected as a buffer amplifier
with no RG1. A feedback resistor, RG2 = 10kΩ, should be
used in the buffer connection. This provides bias current
cancellation (in combination with internal R5) to assure
specified offset voltage performance. Commonly used values are shown in the table of Figure 1. Resistor values for
other gains should be chosen to provide a 10kΩ parallel
resistance.
The output of A1 is connected to the noninverting input of
A2 through a 10kΩ resistor which is trimmed to ±1%
absolute accuracy. The A2 input is available for applications
such as a filter or a precision current source. See application
figures for examples.
COMMON-MODE RANGE
OPERATING VOLTAGE
The input resistors of the INA145 provides an input common-mode range that extends well beyond the power supply
rails. Exact range depends on the power supply voltage and
the voltage applied to the Ref terminal (pin 1). To assure
proper operation, the voltage at the non-inverting input of
A1 (an internal node) must be within its linear operating
range. Its voltage is determined by the simple 1:1 voltage
divider between pin 3 and pin 1. This voltage must be
between V– and (V+) – 1V.
The INA145 is fully specified for supply voltages from
±2.25V to ±18V, with key parameters guaranteed over the
temperature range –40°C to +85°C. The INA145 can be
operated with single or dual supplies, with excellent performance. Parameters that vary significantly with operating
voltage, load conditions, or temperature are shown in the
typical performance curves.
+VS
RG1
RG2
0.1µF
RB
7
5
R1
40kΩ
VIN–
R2
40kΩ
+
–
VO = (VIN – VIN)(1 + RG2/RG1)
R5
10kΩ
(1%)
2
A2
VO
6
A1
STANDARD 1% RESISTORS
R3
40kΩ
+
VIN
R4
40kΩ
INA145
3
4
1
8
0.1µF
V01
–VS
FIGURE 1. Basic Circuit Connections.
®
INA145
8
TOTAL GAIN
(V/V)
A2 GAIN
(V/V)
RG1
(W)
RG2
(W)
RB
(W)
1
2
5
10
20
50
100
200
500
1000
1
2
5
10
20
50
100
200
500
1000
(None)
20k
12.4k
11.0k
10.5k
10.2k
10.2k
499
100
100
10k
20k
49.9k
100k
200k
499k
1M
100k
49.9k
100k
—
—
—
—
—
—
—
9.53k
10k
10k
OFFSET TRIM
INPUT IMPEDANCE
The INA145 is laser-trimmed for low offset voltage and
drift. Most applications require no external offset adjustment. Figure 2 shows an optional circuit for trimming the
offset voltage. A voltage applied to the Ref terminal will
be summed with the output signal. This can be used to null
offset voltage. To maintain good common-mode rejection,
the source impedance of a signal applied to the Ref
terminal should be less than 10Ω and a resistor added to
the positive input terminal should be 10 times that, or
100Ω. Alternatively, the trim voltage can be buffered with
an op amp such as the OPA277.
The input impedance of the INA145 is determined by the
input resistor network and is approximately 40kΩ. The
source impedance at the two input terminals must be nearly
equal to maintain good common-mode rejection. A 5Ω
mismatch in impedance between the two inputs will cause
the typical common-mode rejection to be degraded to approximately 72dB. Figure 7 shows a common application
measuring power supply current through a shunt resistor.
The source impedance of the shunt resistor, RS, is balanced
by an equal compensation resistor, RC.
Source impedances greater than 300Ω are not recommended,
even if they are perfectly matched. Internal resistors are laser
trimmed for accurate ratios, not to absolute values. Adding
equal resistors greater than 300Ω can cause a mismatch in
the total resistor ratios, degrading CMR.
10kΩ
5
40kΩ
40kΩ
40kΩ
A1
–
VIN
10kΩ
10Ω
A2
VO
6
+
VIN
40kΩ
INA145
1
Offset Adjustment Range = ±15mV, RTI
(±1.5mV at pin 1)
+15V
VO1
RT
100kΩ
100kΩ
10Ω
NOTE: Increasing the trim resistor
RT will decrease the trim range
–15V
FIGURE 2. Optional Offset Trim Circuit.
RG1
10.2kΩ
V+
+5V
RG2
1MΩ
5
7
RS
1Ω
2
G = 100
IL
VB
10kΩ
VO = 100 ILRS
6
Load
3
INA145
4
1
8
V+
Max VB
+5V
+7V
+10V
+15V
8V
12V
18V
28V
FIGURE 3. Measuring Current with Shunt Resistor.
®
9
INA145
10kΩ
Pole at
106Hz
G=1
1500pF
5
RG2
1MΩ
RG1
10kΩ
2
–
VIN
6
5
–
VIN
VO
2
10kΩ
6
3
+
VIN
VO
INA145
1
+
VIN
8
R4
3
INA145
1
G=
R3
R3
R3 + R4
8
G≤1
22nF
Pole at
720Hz
FIGURE 5. Creating Gains Less Than Unity.
FIGURE 4. Noise Filtering.
RG2
10kΩ
5
2
–
VIN
R1
R2
0V ≤ VO ≤ 5V
10kΩ
6
VO
Alternate
Soft Clamp
To Pin 8
3
+
VIN
R3
R4
INA145
1
8
1N914
1N4684
(3.3V)
1N914
Voltage
Reference
(1)
5.0V
or Analog-to-Digital VS
1N914
(1)
NOTE: (1) 1/2 OPA2342 with VS connected to +5V and GND.
FIGURE 6. Clamp Circuits.
®
INA145
10
RG2
100kΩ
RG1
11kΩ
Power
Supply
5
2
For sense resistors (RS)
greater than 5Ω, use
series
compensation
resistor (RC) for good
common-mode rejection.
Sense resistors greater
than 200Ω are not
recommended.
G = 10
RC
10Ω
VO
6
RS
10Ω
3
INA145
1
Load
8
VO1
FIGURE 7. Current Monitor, G = 1.
+5V
24V
8.4kΩ
Feedback
7
5
2
8kΩ
1V
6
SHUNT
R-I Lamp/10
e.g., 0.1Ω for 1A
VO
10kΩ
1V – 50mV
3
2kΩ
INA145
4
1
8
10MΩ
Lamp
FIGURE 8. Comparator Output with Optional Hysteresis Application to Sense Lamp Burn-Out.
RG2
100kΩ
RG1
11kΩ
RG2
10kΩ
5
–
VIN
2
5
6
–
VIN
2
VO
6
10kΩ
+
VIN
3
INA145
1
R1
1MΩ
8
+
C1
0.1µF
VIN
3
INA145
1
f=
Pole at
1
= 1.6Hz
2πR1RC
VO
8
+
–
IOUT = (VIN
– VIN
)/10kΩ
OPA277
FIGURE 9. AC Coupling (DC Restoration).
FIGURE 10. Precision Current Source.
®
11
INA145
PACKAGE OPTION ADDENDUM
www.ti.com
16-Feb-2009
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
INA145UA
ACTIVE
SOIC
D
8
INA145UA/2K5
ACTIVE
SOIC
D
INA145UA/2K5E4
ACTIVE
SOIC
INA145UAE4
ACTIVE
SOIC
75
Lead/Ball Finish
MSL Peak Temp (3)
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
D
8
CU NIPDAU
Level-3-260C-168 HR
75
Green (RoHS &
no Sb/Br)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Mar-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
INA145UA/2K5
Package Package Pins
Type Drawing
SOIC
D
8
SPQ
Reel
Reel
Diameter Width
(mm) W1 (mm)
2500
330.0
12.4
Pack Materials-Page 1
A0 (mm)
B0 (mm)
K0 (mm)
P1
(mm)
6.4
5.2
2.1
8.0
W
Pin1
(mm) Quadrant
12.0
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Mar-2008
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
INA145UA/2K5
SOIC
D
8
2500
346.0
346.0
29.0
Pack Materials-Page 2
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