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CA Tut2 ANS

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Course No: CS F342
TUTORIAL 2
Week: #02
Course Title: Computer
Architecture
Solution
1
Sl.No
1
2
3
4
Instr Class
Arith
Load
Store
Branch
No of
Instr(ICi)
500
150
100
250
1000
CPU Clock =
A
Total
Instruction
Count(B) =
B
i)
Avg CPI (C) =
C
ii)
Total Exec
Time (Sec)=
%Time (us)
Arith
Load
Store
Branch
CPIi * ICi
1
4
4
2
%Time (S)
500 0.00000025
600 0.0000003
400 0.0000002
500 0.00000025
2000
0.000001
2GHz
4
CPU Clock
Cycles =
iii)
CPIi
∑ 𝐢𝑃𝐼𝑖 × πΆπ‘–
𝑖=1
2000
4
∑ 𝐢𝑖
1000
𝑖=1
A/B
2
2000/2GHz 0.000001
1us
(us)
0.25
0.3
0.2
0.25
(us)
0.25
0.3
0.2
0.25
1
2. We have the instruction count: 109 instructions. The clock time can be computed
quickly from the clock rate to be 0.5×10-9 seconds. So we only need to to compute clocks
per instruction as an effective value:
Value Frequency
3
0.5
1.5
4
0.3
1.2
5
0.2
1.0
CPI = 3.7
Then we have
Product
Execution time = 1.0×109 × 3.7 × 0.5×10-9 sec = 1.85 sec.
3.
a) Which processor has the highest performance expressed in Instructions per second?
𝐼𝐢 ∗ 𝐢𝑃𝐼
πΆπ‘ƒπ‘ˆ π‘‡π‘–π‘šπ‘’ =
𝐢𝑅
𝐼𝐢
𝐢𝑅
πΌπ‘›π‘ π‘‘π‘Ÿπ‘’π‘π‘‘π‘–π‘œπ‘›
=
=
𝑠𝑒𝑐
πΆπ‘ƒπ‘ˆ π‘‡π‘–π‘šπ‘’ 𝐢𝑃𝐼
3𝐺𝐻𝑧
πΉπ‘œπ‘Ÿ 𝑃1:
= 2 × 109 = 2000 𝑀𝐼𝑃𝑆
1.5
P2: 2.5GHz / 1.0 = 2.5 * 10^9 instructions per second
P3: 4GHz / 2.2 = 1.82 * 10^9 instructions per second
So P2 has the highest performance among the three
b) If the processor executes a program in 10 sec, find the no of cycles and no of instructions executed.
πΆπ‘ƒπ‘ˆ π‘‡π‘–π‘šπ‘’ = πΆπ‘ƒπ‘ˆ 𝐢𝑦𝑐𝑙𝑒𝑠 ∗ πΆπ‘™π‘œπ‘π‘˜ 𝐢𝑦𝑐𝑙𝑒 π‘‡π‘–π‘šπ‘’
πΆπ‘ƒπ‘ˆ π‘‡π‘–π‘šπ‘’
πΆπ‘ƒπ‘ˆ 𝐢𝑦𝑐𝑙𝑒𝑠 =
= πΆπ‘ƒπ‘ˆ π‘‡π‘–π‘šπ‘’ × πΆπ‘…
πΆπ‘™π‘œπ‘π‘˜ 𝐢𝑦𝑐𝑙𝑒 π‘‡π‘–π‘šπ‘’
πΉπ‘œπ‘Ÿ 𝑃1: πΆπ‘ƒπ‘ˆ 𝐢𝑦𝑐𝑙𝑒𝑠 = 10 𝑠 × 3 𝐺𝐻𝑧 = 30 𝐺 𝐢𝑦𝑐𝑙𝑒𝑠
Cycles:
πΆπ‘ƒπ‘ˆ π‘‡π‘–π‘šπ‘’ = 𝐼𝐢 × πΆπ‘ƒπΌ × πΆπ‘™π‘œπ‘π‘˜ 𝐢𝑦𝑐𝑙𝑒 π‘‡π‘–π‘šπ‘’
πΆπ‘ƒπ‘ˆ π‘‡π‘–π‘šπ‘’
πΆπ‘ƒπ‘ˆ π‘‡π‘–π‘šπ‘’
𝐼𝐢 =
=
× πΆπ‘…
𝐢𝑃𝐼 × πΆπ‘™π‘œπ‘π‘˜ 𝐢𝑦𝑐𝑙𝑒 π‘‡π‘–π‘šπ‘’
𝐢𝑃𝐼
10 𝑠
πΉπ‘œπ‘Ÿ 𝑃1: 𝐼𝐢 =
× 3 𝐺𝐻𝑧 = 20 𝐺 πΌπ‘›π‘ π‘‘π‘Ÿπ‘’π‘π‘‘π‘–π‘œπ‘›π‘ 
1.5
P2: 2.5GHz * 10 = 2.5 * 10^10 cycles
P3: 4GHz * 10 = 4 * 10^10 cycles
No. of instructions
P2: 2.5GHz * 10 / 1.0 = 2.5 * 10^10 instructions
P3: 4GHz * 10 / 2.2 = 1.82 * 10^10 instructions
c) For each of the processors, what should be the clock rate, if the execution time reduced by 30%,
but leads to an increase in CPI by 20%.
𝐼𝐢 ∗ 𝐢𝑃𝐼
,
𝐢𝑅
πΆπ‘ƒπ‘ˆ π‘‡π‘–π‘šπ‘’π‘›π‘’π‘€ = 0.7 × πΆπ‘ƒπ‘ˆ π‘‡π‘–π‘šπ‘’π‘œπ‘™π‘‘
𝐢𝑃𝐼𝑛𝑒𝑀 = 1.2 × πΆπ‘ƒπΌπ‘œπ‘™π‘‘
𝐼𝐢 × πΆπ‘ƒπΌπ‘œπ‘™π‘‘
πΆπ‘ƒπ‘ˆ π‘‡π‘–π‘šπ‘’π‘œπ‘™π‘‘
πΆπ‘…π‘œπ‘™π‘‘
=
𝐼𝐢
× πΆπ‘ƒπΌπ‘œπ‘™π‘‘
πΆπ‘ƒπ‘ˆ π‘‡π‘–π‘šπ‘’π‘›π‘’π‘€
𝐢𝑅𝑛𝑒𝑀
𝐼𝐢 × πΆπ‘ƒπΌπ‘œπ‘™π‘‘
πΆπ‘ƒπ‘ˆ π‘‡π‘–π‘šπ‘’π‘œπ‘™π‘‘
3𝐺𝐻𝑧
πΉπ‘œπ‘Ÿ 𝑃1:
=
𝐼𝐢 × 1.2 × πΆπ‘ƒπΌπ‘œπ‘™π‘‘
0.7 × πΆπ‘ƒπ‘ˆ π‘‡π‘–π‘šπ‘’π‘œπ‘™π‘‘
𝐢𝑅𝑛𝑒𝑀
1.2 × 3 𝐺𝐻𝑧
𝐢𝑅𝑛𝑒𝑀 =
= 5.14 𝐺𝐻𝑧
0.7
πΆπ‘ƒπ‘ˆ π‘‡π‘–π‘šπ‘’ =
P2: 2.5GHz * 1.71 = 4.27 GHz; P3: 4GHz * 1.71 = 6.84 GHz
Percent increase = [(new value - original value)/original value] * 100
Percent decrease = [(original value - new value)/original value] * 100
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