Table des matières
tp cle 2
QT110(H)
MC145026
1 1 Introduction
2 2 Electrical Specifications
3 3 Operating Characteristics
3.1 3.1 MC145026
3.2 3.2 MC145027
3.3 3.3 MC145028
4 4 Pin Descriptions
4.1 4.1 MC145026 Encoder
4.2 4.2 MC145027 and MC145028 Decoders
5 5 MC145027 and MC145028 Timing
6 6 Package Dimensions
tx_saw_ia(1)
bc-nbk
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Projet d’électronique
Licence professionnelle CCSEE
SYSTEME D’ACCES SANS CLEF
BRUNO ESTIBALS
FLORIAN LARRAMENDY
HELENE LEYMARIE
-1-
« Système d’accès sans clé »
VOITURE
Capteur
(QT110)
Décodeur
MC145027
DEVEROUILLE
Emetteur/Récepteur
Emetteur/Récepteur
Encodeur
MC145027
UTILISATEUR
Fig. 1: Schéma synoptique de la serrure intelligente
1. Principe de fonctionnement
Le système est composé de deux parties, l’une dans la voiture et l’autre sur
l’utilisateur comme représentées sur la figure 1.
-2-
L’utilisateur s’approche de la poignée de sa voiture. Le capteur détecte la présence d’une
personne et envoie une requête pour savoir si cette personne possède une « clé » qui
permettrait d’ouvrir la voiture (transmission 1 : voiture/utilisateur).
Une fois cette requête reçue, l’encodeur, qui se trouve sur la clé, envoie son code
d’identification à la voiture (transmission 2 : utilisateur /voiture).
Le message est reçu par le décodeur qui vérifie la correspondance avec sa propre
identification. S’ils sont identiques alors la porte de la voiture se déverrouille.
Dans ce TP ne sera réalisée que la carte voiture. La carte clé est déjà réalisée et
sera distribuée en début de TP. La face avant et le schéma électrique de la carte sont donnés
en annexe 0.
Afin d’économiser les piles de la carte clé veuillez éteindre (OFF) l’alimentation de la
carte après chaque mesure.
2. Le capteur capacitif
Le QT110 est un capteur capacitif. Ce capteur permet de détecter une présence lors de son
approche ou d’un « touché ».
Figure 2 : principe du capteur capacitif
Ce capteur permet de détecter une personne voulant ouvrir la voiture. Le principe physique
repose sur la capacité que présente notre corps (de l’ordre de quelques picofarads) qui, en
fermant le circuit représenté sur la figure 2, induit un courant et active la sortie du capteur à
l’état bas.
Pour augmenter ou diminuer la sensibilité, il existe 3 modes de sensibilité « médium, low,
touché » ajustés par la capacité Cs. Il y a également 4 modes de fonctionnement (sortie à
l’état haut au repos) :
DC out 10 ou 60 : Après détection, ce mode met la sortie à l’état bas durant
10s ou 60s.
-3-
Toggle : Une détection change l’état de la sortie (Qn+1= /Qn).
Pulse : Ce mode envoie une impulsion de 75 ms pour chaque détection.
En vous appuyant sur le document constructeur donné en annexe1, choisissez le mode de
fonctionnement le plus approprié sachant que le signal de sortie doit servir de signal de
détection. C’est une impulsion à l’état bas au toucher de l’électrode. Proposer un schéma de
câblage sur lequel on pourra visualiser le toucher grâce à une DEL rouge active à l’état bas.
Exploitation expérimentale :
Réalisez votre montage. Simulez la poignée de la porte par un grippe fil connecté à la place de
l’électrode. Mesurez la distance d’approche maximale selon différentes capacités Cs (10nF <
Cs < 30nF).En gardant une capacité Cs de 10nF, changez le type d’électrode. Que peut-on en
déduire de la forme et des dimensions de l’électrode par rapport à la sensibilité ? Quel est
l’effet de la pluie sur l’électrode?
3. L’encodeur et le décodeur
Du coté de la carte clé, le code de la voiture est envoyé crypté grâce à l’encodeur. Le
décodeur est alors nécessaire du côté du récepteur pour décrypter l’information. L’encodeur et
le décodeur utilisés sont deux composants de chez Motorola respectivement le MC145026 et
le MC145027 (documents constructeur en annexe 2).
3a) L’encodeur
Le MC145026 encode deux informations successivement :
- une adresse (mot binaire A de 5 bits)
- des données (mot binaire D de 4 bits).
Un mot est ainsi constitué de 9 bits « AD ».
Chaque bit est fixé
- pour le mot adresse : soit à l’état haut (dit high), soit à l’état bas (dit low) soit à l’état
ouvert (dit open)
- pour le mot de données soit à l’état ouvert (dit open), soit à l’état bas (dit low).
Une représentation du codage de l’information est donnée sur la figure 3.
Figure 3 : codage des informations sur 9 bits « AD ». (doc. Constructeur)
-4-
Ces informations sont séquencées par une horloge ajustable par trois composants externes
RTC, CTC et RS. Elles sont envoyées en continu grâce à l’entrée TE fixée à l’état bas comme
indiquée figure 3.
Exploitation expérimentale
Dans cette étude on n’utilise pas l’émetteur et le récepteur. Otez tous les cavaliers de
la carte clé sauf le cavalier TE câblé à la masse. Visualisez à partir de la carte, le signal
encodé. Modifiez les mots A et D de la carte clé et observez les modifications du signal codé.
Vérifiez le codage de l’adresse et des données transmises. Mesurez la fréquence d’horloge.
OFF
3b) Le décodeur
Le MC145027 reçoit l’adresse et les données envoyées en série successivement. La partie
correspondante à l’adresse est comparée avec sa propre adresse locale. Si les deux adresses
sont identiques alors le décodeur restitue les données en parallèle. De plus, si deux mots
consécutifs envoyés sont égaux, ce qui garantit une bonne réception, le décodeur valide la
transmission grâce à la sortie Vt qui bascule à l’état haut. Cette sortie est utilisée pour le
déverrouillage de la portière.
Exploitation expérimentale
Déterminez les valeurs des composants R1, C1, et R2 et C2 pour obtenir un débit à 1.71Khz
égal à celui de l’encodeur. Proposez un schéma de câblage sur lequel la sortie VT du décodeur
sera visualisable avec une DEL verte. Réalisez le montage. Fixez le même mot A que celui de
la carte clé. Reliez à l’aide d’un fil la sortie de l’encodeur à l’entrée du décodeur. Testez votre
montage.
Que se passe-t-il si les adresses ne correspondent pas ou si la transmission des informations
est erronée? A quoi peuvent servir les données (mot D) ? OFF
4. L’émetteur et récepteur
L’émetteur et le récepteur sont deux composants qui permettent à deux systèmes distants, non
reliés physiquement, de pouvoir communiquer entre eux en utilisant les ondes radios par
modulation d’amplitude en tout ou rien (OOK). L’émetteur et le récepteur utilisés est un
module RTL-DATA-SAW qui fonctionne à 433.92Mhz : c’est la fréquence sur laquelle
l’information va être transmise. Ce module peut à la fois émettre et recevoir. C’est un
transciever ou « émetteur/récepteur ».
Exploitation expérimentale
On teste la transmission 2 (clé/voiture). Le signal à transmettre est le code de la voiture et les
données envoyés, en série, à un débit qui doit être inférieur à 3 KHz (voir documentation
constructeur en annexe 3).
L’émetteur /récepteur sur la carte clé est déjà précâblé.
Proposez un schéma de câblage de l’émetteur/récepteur situé sur la voiture de façon à ce qu’il
soit en mode récepteur (contrôle des alimentations). Faîtes valider et réalisez le montage.
-5-
Portée du dispositif :
Dans un premier temps, on doit recevoir les données issues de l’encodeur et envoyées par la
carte clé. Reliez par un cavalier la sortie de l’encodeur et l’entrée de l’émetteur. Déplacez
vous dans la salle et même à l’extérieur et observez le signal reçu sur votre récepteur.
Mesurez la portée maximale en mètres entre les deux cartes. La communication est –elle
perturbée par votre téléphone portable en veille ou en appel ? OFF
Bande passante du dispositif :
Dans un deuxième temps, on envoie un signal carré à une fréquence de 500Hz à la place des
données de l’encodeur. Pour cela enlevez tous les cavaliers et branchez le signal carré TTL
sur l’entrée de l’émetteur. Testez la réception des données. Faites varier la fréquence de 100
Hz à 9 KHz et conclure sur l’amplitude du signal reçu et son décalage temporel. OFF
5. Réalisation finale
Après avoir testé chaque bloc séparément, nous allons les assembler. Malheureusement nous
ne pouvons les assembler directement entre eux.
5a) Contrôle des alimentations des « émetteur/récepteur »
Une étude préalable a montré que si l’on alimente l’émetteur et le récepteur en même temps,
le récepteur reçoit le signal émis par son propre émetteur. Pour éviter cela, nous devons faire
un contrôle des alimentations, ce qui signifie que les deux alimentations de l’émetteur et du
récepteur doivent être complémentaires.
Contrôle des alimentations côté voiture
L’émetteur de la voiture ne doit fonctionner que lorsqu’un toucher est détecté. Le signal
transmis est une impulsion de 75ms à l’état haut. Justifiez ce dernier choix. Proposez un
schéma de câblage. Après validation, réalisez le montage et testez le. Pour cela, observez les
alimentations de l émetteur/récepteur côté voiture après la détection d’un touché. Puis câblez
tous les cavaliers de la carte clé et observez la sortie de l’encodeur dans les mêmes
conditions.. OFF
Contrôle des alimentations côté clé
La carte clé envoie les mots de 9 bits codés pendant 5 secondes après la détection du front
montant de l’impulsion de 75 ms. Cela est réalisé grâce à un monostable qui gère le contrôle
de l’alimentation du récepteur de la carte clé mais aussi du signal TE de l’encodeur. La sortie
de ce monostable est à l’état bas durant 5 s. Observez sur la carte clé le signal TE et mesurez
le temps à l’état bas. Conclure quant au contrôle des alimentations de l’émetteur et du
récepteur de la carte clé. OFF
-6-
5b) Ouverture et fermeture de la voiture
La voiture doit s’ouvrir quand la carte clé correspondant à la voiture est détectée. Mettez la
même adresse sur les deux cartes et testez votre montage. Observez le résultat de la sortie VT
du décodeur (DEL verte) en mettant la carte à une dizaine de centimètres puis un mètre puis 3
mètres. Pourquoi la DEL verte s’allume t’-elle de moins en moins souvent quand la distance
augmente ? Est-ce nécessaire ? Si vous avez le temps proposez et câblez l’affichage des
données envoyées par la carte clé sur un afficheur 7 segments.
Visualisation de l’ouverture et de la fermeture de la voiture:
Une deuxième LED verte traduit l’ouverture de la voiture tandis qu’une LED rouge traduit sa
fermeture. La voiture se verrouille à l’appui d’un bouton poussoir. Proposez un schéma de
câblage et réalisez le montage.
-7-
Annexe 0
Schéma électrique de la carte clé
-8-
QProx™
™ QT110 / QT110H
CHARGE-TRANSFER TOUCH SENSOR
Less expensive than many mechanical switches
Projects a ‘touch button’ through any dielectric
Turns small objects into intrinsic touch sensors
100% autocal for life - no adjustments required
Only one external part required - a 1¢ capacitor
Piezo sounder direct drive for ‘tactile’ click feedback
LED drive for visual feedback
2.5 to 5V 20µ
µA single supply operation
Toggle mode for on/off control (strap option)
10s or 60s auto-recalibration timeout (strap option)
Pulse output mode (strap option)
Gain settings in 3 discrete levels
Simple 2-wire operation possible
HeartBeat™ health indicator on output
Active Low (QT110), Active High (QT110H) versions
Vdd
1
Out
2
Opt1
3
Opt2
4
QT110
!
!
!
!
!
!
!
!
!
!
!
!
!
!
!
8
Vss
7
Sns2
6
Sns1
5
Gain
APPLICATIONS !
!
Light switches
Industrial panels
!
!
Appliance control
Security systems
!
!
Access systems
Pointing devices
!
!
Elevator buttons
Toys & games
The QT110 / QT110H charge-transfer (“QT’”) touch sensor is a self-contained digital IC capable of detecting near-proximity or touch.
It will project a sense field through almost any dielectric, like glass, plastic, stone, ceramic, and most kinds of wood. It can also turn
small metal-bearing objects into intrinsic sensors, making them respond to proximity or touch. This capability coupled with its ability
to self calibrate continuously can lead to entirely new product concepts.
It is designed specifically for human interfaces, like control panels, appliances, toys, lighting controls, or anywhere a mechanical
switch or button may be found; it may also be used for some material sensing and control applications provided that the presence
duration of objects does not exceed the recalibration timeout interval.
The IC requires only a common inexpensive capacitor in order to function. A bare piezo beeper can be connected to create a ‘tactile’
feedback clicking sound; the beeper itself then doubles as the required external capacitor, and it can also become the sensing
electrode. An LED can also be added to provide visual sensing indication. With a second inexpensive capacitor the device can
operated in 2-wire mode, where both power and signal traverse the same wire pair to a host. This mode allows the sensor to be wired
to a controller with only a twisted pair over a long distances.
Power consumption is under 20µA in most applications, allowing operation from Lithium cells for many years. In most cases the
power supply need only be minimally regulated.
The IC’s RISC core employs signal processing techniques pioneered by Quantum; these are specifically designed to make the device
survive real-world challenges, such as ‘stuck sensor’ conditions and signal drift. Even sensitivity is digitally determined and remains
constant in the face of large variations in sample capacitor CS and electrode CX. No external switches, opamps, or other analog
components aside from CS are usually required.
The device includes several user-selectable built in features. One, toggle mode, permits on/off touch control, for example for light
switch replacement. Another makes the sensor output a pulse instead of a DC level, which allows the device to 'talk' over the power
rail, permitting a simple 2-wire interface. The Quantum-pioneered HeartBeat™ signal is also included, allowing a host controller to
monitor the health of the QT110 continuously if desired. By using the charge transfer principle, the IC delivers a level of performance
clearly superior to older technologies in a highly cost-effective package.
TA
00C to +700C
00C to +700C
-400C to +850C
-400C to +850C
Quantum Research Group Ltd
AVAILABLE OPTIONS
SOIC
QT110-S
QT110H-S
QT110-IS
QT110H-IS
8-PIN DIP
QT110-D
QT110H-D
Copyright © 1999 Quantum Research Group Ltd
R1.02/0109
1 - OVERVIEW
Figure 1-1 Standard mode options
The QT110 is a digital burst mode charge-transfer (QT)
sensor designed specifically for touch controls; it includes all
hardware and signal processing functions necessary to
provide stable sensing under a wide variety of changing
conditions. Only a single low cost, non-critical capacitor is
required for operation.
+2.5 to 5
2
Figure 1-1 shows the basic QT110 circuit using the device,
with a conventional output drive and power supply
connections. Figure 1-2 shows a second configuration using
a common power/signal rail which can be a long twisted pair
from a controller; this configuration uses the built-in pulse
mode to transmit output state to the host controller (QT110
only).
3
4
OU TP UT=D C
TIM EO UT= 10 S ecs
TOGG LE=OF F
GA IN= HIGH
1.1 BASIC OPERATION
The QT110 employs short, ultra-low duty cycle bursts of
charge-transfer cycles to acquire its signal. Burst mode
permits power consumption in the low microamp range,
dramatically reduces RF emissions, lowers susceptibility to
EMI, and yet permits excellent response time. Internally the
signals are digitally processed to reject impulse noise, using
a 'consensus' filter which requires four consecutive
confirmations of a detection before the output is activated.
2
3
O UT
S NS 2
O PT 1
G A IN
S E NS IN G
E LE C T RO DE
Cs
10 nF
Cx
4
O PT 2
S NS 1
S N S1
Cs
1 0nF
Cx
6
Vss
8
The internal ADC treats Cs as a floating transfer capacitor;
as a direct result, the sense electrode can be connected to
either SNS1 or SNS2 with no performance difference. In both
cases the rule Cs >> Cx must be observed for proper
operation. The polarity of the charge buildup across Cs
during a burst is the same in either case.
7
5
OP T2
5
1.2 ELECTRODE DRIVE
22 µF 10V AL
1
G A IN
Option pins allow the selection or alteration of several
special features and sensitivity.
+3V
V dd
OP T1
7
A simple circuit variation is to replace Cs with a bare piezo
sounder (Section 2), which is merely another type of
capacitor, albeit with a large thermal drift coefficient. If Cpiezo
is in the proper range, no other external component is
required. If Cpiezo is too small, it can simply be ‘topped up’
with an inexpensive ceramic capacitor connected in parallel
with it. The QT110 drives a 4kHz signal across SNS1 and
SNS2 to make the piezo (if installed) sound a short tone for
75ms immediately after detection, to act as an audible
confirmation.
+
Tw ist e d
pa ir
S N S2
Cs is thus non-critical; as it drifts with temperature, the
threshold algorithm compensates for the drift automatically.
Figure 1-2 2-wire operation, self-powered (QT110 only)
2 . 2k
Vdd
OU T
The IC is highly tolerant of changes in Cs since it computes
the threshold level ratiometrically with respect to absolute
load, and does so dynamically at all times.
The QT switches and charge measurement hardware
functions are all internal to the QT110 (Figure 1-3). A 14-bit
single-slope switched capacitor ADC includes both the
required QT charge and transfer switches in a configuration
that provides direct ADC conversion. The ADC is designed to
dynamically optimize the QT burst length according to the
rate of charge buildup on Cs, which in turn depends on the
values of Cs, Cx, and Vdd. Vdd is used as the charge
reference voltage. Larger values of Cx cause the charge
transferred into Cs to rise more rapidly, reducing available
resolution; as a minimum resolution is required for proper
operation, this can result in dramatically reduced apparent
gain. Conversely, larger values of Cs reduce the rise of
differential voltage across it, increasing available resolution
by permitting longer QT bursts. The value of Cs can thus be
increased to allow larger values of Cx to be tolerated
(Figures 4-1, 4-2, 4-3 in Specifications, rear).
CMOS
GATE
S E NS ING
E LEC TRO DE
1
6
It is possible to connect separate Cx and
Cx’ loads to SNS1 and SNS2
simultaneously, although the result is no
different than if the loads were
connected together at SNS1 (or SNS2).
It is important to limit the amount of
stray capacitance on both terminals,
especially if the load Cx is already large,
for example by minimizing trace lengths
and widths so as not to exceed the Cx
load specification and to allow for a
larger sensing electrode size if so
desired.
The PCB traces, wiring, and any
components associated with or in
contact with SNS1 and SNS2 will
become touch sensitive and should be
V ss
8
-2-
Figure 1-3 Internal Switching & Timing
ELE C TRO DE
R esult
1.3.1 ELECTRODE GEOMETRY AND SIZE
Start
There is no restriction on the shape of
the electrode; in most cases common
sense and a little experimentation can
result in a good electrode design. The
QT110 will operate equally well with
long, thin electrodes as with round or
square ones; even random shapes are
acceptable. The electrode can also be
a 3-dimensional surface or object.
Sensitivity is related to electrode
surface area, orientation with respect
to the object being sensed, object composition, and the
ground coupling quality of both the sensor circuit and the
sensed object.
If a relatively large electrode surface is desired, and if tests
Figure 1-4 Mesh Electrode Geometry
Single -Slo pe 14-bit
Switched Cap acito r AD C
1.3 ELECTRODE DESIGN
SNS2
Bu rst Controller
treated with caution to limit the touch
area to the desired location. Multiple
touch electrodes can be used, for
example to create a control button on
both sides of an object, however it is
impossible for the sensor to distinguish
between the two touch areas.
Do ne
Cs
Cx
SNS1
C ha rg e
Am p
will provide ample ground coupling, since there is
capacitance between the windings and/or the transformer
core, and from the power wiring itself directly to 'local earth'.
Even when battery powered, just the physical size of the
PCB and the object into which the electronics is embedded
will generally be enough to couple a few picofarads back to
local earth.
1.3.3 VIRTUAL CAPACITIVE GROUNDS
When detecting human contact (e.g. a fingertip), grounding
of the person is never required. The human body naturally
has several hundred picofarads of ‘free space’ capacitance
to the local environment (Cx3 in Figure 1-5), which is more
than two orders of magnitude greater than that required to
create a return path to the QT110 via earth. The QT110's
PCB however can be physically quite small, so there may be
little ‘free space’ coupling (Cx1 in Figure 1-5) between it and
the environment to complete the return path. If the QT110
circuit ground cannot be earth grounded by wire, for example
via the supply connections, then a ‘virtual capacitive ground’
may be required to increase return coupling.
show that the electrode has more capacitance than the
QT110 can tolerate, the electrode can be made into a sparse
mesh (Figure 1-4) having lower Cx than a solid plane.
Sensitivity may even remain the same, as the sensor will be
operating in a lower region of the gain curves.
Figure 1-5 Kirchoff's Current Law
1.3.2 KIRCHOFF’S CURRENT LAW
Like all capacitance sensors, the QT110 relies on Kirchoff’s
Current Law (Figure 1-5) to detect the change in capacitance
of the electrode. This law as applied to capacitive sensing
requires that the sensor’s field current must complete a loop,
returning back to its source in order for capacitance to be
sensed. Although most designers relate to Kirchoff’s law with
regard to hardwired circuits, it applies equally to capacitive
field flows. By implication it requires that the signal ground
and the target object must both be coupled together in some
manner for a capacitive sensor to operate properly. Note that
there is no need to provide actual hardwired ground
connections; capacitive coupling to ground (Cx1) is always
sufficient, even if the coupling might seem very tenuous. For
example, powering the sensor via an isolated transformer
-3-
CX2
S e n se E le ctro de
S EN SO R
CX1
Su rro und in g e nv iro nm e n t
C X3
millimeters of internal air gap; if the product is very thin and
contact with the product's back is a concern, then some form
of rear shielding may be required.
Figure 1-6 Shielding Against Fringe Fields
1.3.5 SENSITIVITY
Sen se
w ire
The QT110 can be set for one of 3 gain levels using option
pin 5 (Table 1-1). If left open, the gain setting is high. The
sensitivity change is made by altering the numerical
threshold level required for a detection. It is also a function
of other things: electrode size, shape, and orientation, the
composition and aspect of the object to be sensed, the
thickness and composition of any overlaying panel material,
and the degree of ground coupling of both sensor and object
are all influences.
Sens e
w ire
1.3.5.1 Increasing Sensitivity
In some cases it may be desirable to increase sensitivity
further, for example when using the sensor with very thick
panels having a low dielectric constant.
U ns hielded
Electrod e
S h ield ed
E lec trod e
A ‘virtual capacitive ground’ can be created by connecting
the QT110’s own circuit ground to:
(1) A nearby piece of metal or metallized housing;
(2) A floating conductive ground plane;
(3) A nail driven into a wall when used with small
electrodes;
(4) A larger electronic device (to which its output might be
connected anyway).
Free-floating ground planes such as metal foils should
maximize exposed surface area in a flat plane if possible. A
square of metal foil will have little effect if it is rolled up or
crumpled into a ball. Virtual ground planes are more
effective and can be made smaller if they are physically
bonded to other surfaces, for example a wall or floor.
1.3.4 FIELD SHAPING
The electrode can be prevented from sensing in undesired
directions with the assistance of metal shielding connected
to circuit ground (Figure 1-6). For example, on flat surfaces,
the field can spread laterally and create a larger touch area
than desired. To stop field spreading, it is only necessary to
surround the touch electrode on all sides with a ring of metal
connected to circuit ground; the ring can be on the same or
opposite side from the electrode. The ring will kill
field spreading from that point outwards.
If one side of the panel to which the electrode is
fixed has moving traffic near it, these objects can
cause inadvertent detections. This is called
‘walk-by’ and is caused by the fact that the fields
radiate from either surface of the electrode
equally well. Again, shielding in the form of a
metal sheet or foil connected to circuit ground
will prevent walk-by; putting a small air gap
between the grounded shield and the electrode
will keep the value of Cx lower and is
encouraged. In the case of the QT110, the
sensitivity is low enough that 'walk-by' should not
be a concern if the product has more than a few
Sensitivity can often be increased by using a bigger
electrode, reducing panel thickness, or altering panel
composition. Increasing electrode size can have diminishing
returns, as high values of Cx will reduce sensor gain
(Figures 4-1 ~ 4-3). Also, increasing the electrode's surface
area will not substantially increase touch sensitivity if its
Table 1-1 Gain Setting Strap Options
Gain
High
Medium
Low
Tie Pin 5 to:
None
Pin 6
Pin 7
diameter is already much larger in surface area than the
object being detected. The panel or other intervening
material can be made thinner, but again there are
diminishing rewards for doing so. Panel material can also be
changed to one having a higher dielectric constant, which
will help propagate the field through to the front. Locally
adding some conductive material to the panel (conductive
materials essentially have an infinite dielectric constant) will
also help dramatically; for example, adding carbon or metal
fibers to a plastic panel will greatly increase frontal field
strength, even if the fiber density is too low to make the
plastic bulk-conductive.
1.3.5.2 Decreasing Sensitivity
In some cases the QT110 may be too sensitive, even on low
gain. In this case gain can be lowered further by any of a
Figure 2-1 Drift Compensation
S ign a l
H yste resis
T hr es ho ld
R e fe re nce
O u tpu t
-4-
number of strategies: making the electrode smaller,
connecting a very small capacitor in series with the sense
lead, or making the electrode into a sparse mesh using a
high space-to-conductor ratio (Figure 1-4). A deliberately
added Cx capacitor can also be used to reduce sensitivity
according to the gain curves (see Section 4).
Intermediate levels of gain (e.g. between 'medium' and 'low'
can be obtained by a combination of jumper settings with
one or more of the above strategies.
2 - QT110 SPECIFICS
2.1 SIGNAL PROCESSING
The QT110 processes all signals using 16 bit math, using a
number of algorithms pioneered by Quantum. The
algorithms are specifically designed to provide for high
'survivability' in the face of all kinds of adverse
environmental changes.
sensor will compensate for the object's removal very quickly,
usually in only a few seconds.
2.1.2 THRESHOLD CALCULATION
Sensitivity is dependent on the threshold level as well as
ADC gain; threshold in turn is based on the internal signal
reference level plus a small differential value. The threshold
value is established as a percentage of the absolute signal
level. Thus, sensitivity remains constant even if Cs is altered
dramatically, so long as electrode coupling to the user
remains constant. Furthermore, as Cx and Cs drift, the
threshold level is automatically recomputed in real time so
that it is never in error.
The QT110 employs a hysteresis dropout below the
threshold level of 50% of the delta between the reference
and threshold levels.
2.1.3 MAX ON-DURATION
If an object or material obstructs the sense pad the signal
2.1.1 DRIFT COMPENSATION ALGORITHM
Table 2-1 Output Mode Strap Options
Signal drift can occur because of changes in Cx and Cs over
time. It is crucial that drift be compensated for, otherwise
false detections, non-detections, and sensitivity shifts will
follow.
Drift compensation (Figure 2-1) is performed by making the
reference level track the raw signal at a slow rate, but only
while there is no detection in effect. The rate of adjustment
must be performed slowly, otherwise legitimate detections
could be ignored. The QT110 drift compensates using a
slew-rate limited change to the reference level; the threshold
and hysteresis values are slaved to this reference.
Once an object is sensed, the drift compensation
mechanism ceases since the signal is legitimately high, and
therefore should not cause the reference level to change.
The QT110's drift compensation is 'asymmetric': the
reference level drift-compensates in one direction faster than
it does in the other. Specifically, it compensates faster for
decreasing signals than for increasing signals. Increasing
signals should not be compensated for quickly, since an
approaching finger could be compensated for partially or
entirely before even touching the sense pad. However, an
obstruction over the sense pad, for which the sensor has
already made full allowance for, could suddenly be removed
leaving the sensor with an artificially elevated reference level
and thus become insensitive to touch. In this latter case, the
Figure 2-2 Powering From a CMOS Port Pin
P O RT X .m
0.01µF
C MO S
m icro controller
V dd
P O RT X .n
O UT
Q T11 0
V ss
Tie
Pin 3 to:
Tie
Pin 4 to:
Max OnDuration
DC Out
Vdd
Vdd
10s
DC Out
Vdd
Gnd
60s
Toggle
Gnd
Gnd
10s
Pulse
Gnd
Vdd
10s
may rise enough to create a detection, preventing further
operation. To prevent this, the sensor includes a timer which
monitors detections. If a detection exceeds the timer setting,
the timer causes the sensor to perform a full recalibration.
This is known as the Max On-Duration feature.
After the Max On-Duration interval, the sensor will once
again function normally, even if partially or fully obstructed,
to the best of its ability given electrode conditions. There are
two timeout durations available via strap option: 10 and 60
seconds.
2.1.4 DETECTION INTEGRATOR
It is desirable to suppress detections generated by electrical
noise or from quick brushes with an object. To accomplish
this, the QT110 incorporates a detect integration counter that
increments with each detection until a limit is reached, after
which the output is activated. If no detection is sensed prior
to the final count, the counter is reset immediately to zero.
In the QT110, the required count is 4.
The Detection Integrator can also be viewed as a
'consensus' filter, that requires four detections in four
successive bursts to create an output. As the basic burst
spacing is 75ms, if this spacing was maintained throughout
all 4 counts the sensor would react very slowly. In the
QT110, after an initial detection is sensed, the remaining
three bursts are spaced about 18ms apart, so that the
slowest reaction time possible is 75+18+18+18 or 129ms
and the fastest possible is 54ms, depending on where in the
initial burst interval the contact first occurred. The response
time will thus average 92ms.
-5-
2.1.5 FORCED SENSOR RECALIBRATION
The QT110 has no recalibration pin; a forced recalibration is
accomplished only when the device is powered up. However,
supply drain is so low it is a simple matter to treat the entire
IC as a controllable load; simply driving the QT110's Vdd pin
directly from another logic gate or a microprocessor port
(Figure 2-2) will serve as both power and 'forced recal'. The
source resistance of most CMOS gates and microprocessors
is low enough to provide direct power without any problems.
Note that most 8051-based micros have only a weak pullup
drive capability and will require true CMOS buffering. Any
74HC or 74AC series gate can directly power the QT110, as
can most other microprocessors.
Option strap configurations are read by the QT110 only on
powerup. Configurations can only be changed by powering
the QT110 down and back up again; again, a microcontroller
can directly alter most of the configurations and cycle power
to put them in effect.
2.2 OUTPUT FEATURES
The QT110 / QT110H are designed for maximum flexibility
and can accommodate most popular sensing requirements.
These are selectable using strap options on pins OPT1 and
OPT2. All options are shown in Table 2-1.
2.2.1 DC MODE OUTPUT
The output of the device can respond in a DC mode, where
the output is active-low (QT110) or active-high (QT110H)
upon detection. The output will remain active for the duration
of the detection, or until the Max On-Duration expires,
whichever occurs first. If the latter occurs first, the sensor
performs a full recalibration and the output becomes inactive
until the next detection.
In this mode, two Max On-Duration timeouts are available:
10 and 60 seconds.
2.2.2 TOGGLE MODE OUTPUT
This makes the sensor respond in an on/off mode like a flip
flop. It is most useful for controlling power loads, for
example in kitchen appliances, power tools, light switches,
etc.
Max On-Duration in Toggle mode is fixed at 10 seconds.
When a timeout occurs, the sensor recalibrates but leaves
the output state unchanged.
2.2.3 PULSE MODE OUTPUT
This generates a pulse of 75ms duration (QT110 negative-going; QT110H - positive-going) with every new
detection. It is most useful for 2-wire operation, but can also
be used when bussing together several devices onto a
common output line with the help of steering diodes or logic
gates, in order to control a common load from several
places.
Max On-Duration is fixed at 10 seconds if in Pulse output
mode.
2.2.4 HEARTBEAT™ OUTPUT
The output has a full-time HeartBeat™ ‘health’ indicator
superimposed on it. This operates by taking 'Out' into a
3-state mode for 350µs once before every QT burst. This
output state can be used to determine that the sensor is
operating properly, or, it can be ignored using one of several
simple methods.
QT110: The HeartBeat indicator can be sampled by using a
pulldown resistor on Out, and feeding the resulting
negative-going pulse into a counter, flip flop, one-shot, or
other circuit. Since Out is normally high, a pulldown resistor
will create negative HeartBeat pulses (Figure 2-3) when the
sensor is not detecting an object; when detecting an object,
the output will remain active for the duration of the detection,
and no HeartBeat pulse will be evident.
QT110H: Same as QT110 but inverted logic (use a
pull-down resistor instead of a pull-up etc.)
If the sensor is wired to a microprocessor as shown in Figure
2-4, the microprocessor can reconfigure the load resistor to
either ground or Vcc depending on the output state of the
device, so that the pulses are evident in either state.
Electromechanical devices will usually ignore this short
pulse. The pulse also has too low a duty cycle to visibly
activate LED’s. It can be filtered completely if desired, by
adding an RC timeconstant to filter the output, or if
interfacing directly and only to a high-impedance CMOS
input, by doing nothing or at most adding a small non-critical
capacitor from Out to ground (Figure 2-5).
Figure 2-3
Figure 2-4
Getting HB pulses with a pull-down resistor (QT110 shown; use
pull-up resistor with QT110H)
+2 .5 to 5
H eartBeat™ P ulses
Using a micro to obtain HB pulses in either output state
(QT110 or QT110H)
1
2
V dd
O UT
S NS 2
O PT 1
GAIN
O PT 2
S NS 1
2
P O RT _M .x
7
OUT
SN S 2
O PT1
G A IN
O PT2
SN S 1
7
Ro
Ro
3
4
5
3
M icro pro ce sso r
6
P O RT _M .y
V ss
8
-6-
4
5
6
in Vdd, as happens when loads are switched on. This can
induce detection ‘cycling’, whereby an object is detected, the
load is turned on, the supply sags, the detection is no longer
sensed, the load is turned off, the supply rises and the object
is reacquired, ad infinitum. To prevent this occurrence, the
output should only be lightly loaded if the device is operated
from an unregulated supply, e.g. batteries. Detection
‘stiction’, the opposite effect, can occur if a load is shed
when Out is active.
Figure 2-5 Eliminating HB Pulses
G ATE OR
MIC RO INPU T
O UT
SN S 2
O PT1
GA IN
O PT2
SN S 1
7
Co
100p F
3
4
5
QT110: The output of the QT110 can directly drive a
resistively limited LED. The LED should be connected with
its cathode to the output and its anode towards Vcc, so that
it lights when the sensor is active-low. If desired the LED can
be connected from Out to ground, and driven on when the
sensor is inactive, but only with less drive current (1mA).
6
2.2.5 PIEZO ACOUSTIC DRIVE
A piezo drive signal is generated for use with a bare piezo
sounder immediately after a detection is made; the tone lasts
for a nominal 75ms to create a reassuring ‘tactile feedback’
sound.
The sensor will drive most common bare piezo ‘beepers’
directly using an H-bridge drive configuration for the highest
possible sound level at all supply voltages; H-bridge drive
effectively doubles the supply voltage across the piezo. The
piezo is connected across pins SNS1 and SNS2. This drive
operates at a nominal 4kHz frequency, a common resonance
point for enclosed piezo sounders. Other frequencies can be
obtained upon special request.
QT110H: This part is active-high, so it works in reverse to
that described above.
3 - CIRCUIT GUIDELINES
Figure 2-6 Damping Piezo Clicks with Rx
+ 2.5 to 5
If desired a bare piezo sounder can be directly adhered to
the rear of a control panel, provided that an acoustically
resonant cavity is also incorporated to give the desired
sound level.
2
3
Since piezo sounders are merely high-K ceramic capacitors,
the sounder will double as the Cs capacitor, and the piezo's
metal disc will act as the sensing electrode. Piezo transducer
capacitances typically range from 6nF to 30nF (0.006µF to
0.03µF) in value; at the lower end of this range an additional
capacitor should be added to bring the total Cs across SNS1
and SNS2 to at least 10nF, or more if Cx is large.
The burst acquisition process induces a small but audible
voltage step across the piezo resonator, which occurs when
SNS1 and SNS2 rapidly discharge residual voltage stored on
the resonator. The resulting slight clicking sound can be
used to provide an audible confirmation of functionality if
desired, or, it can be suppressed by placing a non-critical 1M
to 2M ohm bleed resistor in parallel with the resonator. The
resistor acts to slowly discharge the resonator, preempting
the occurrence of the harmonic-rich step (Figure 2-6).
With the resistor in place, an almost inaudible clicking sound
may still be heard, which is caused by the small charge
buildup across the piezo device during each burst.
2.2.6 OUTPUT DRIVE
The QT110’s `output is active low (QT110) or active high
(QT110H) and can source 1mA or sink 5mA of non-inductive
current. If an inductive load is used, such as a small relay,
the load should be diode clamped to prevent damage.
Care should be taken when the IC and the load are both
powered from the same supply, and the supply is minimally
regulated. The device derives its internal references from the
power supply, and sensitivity shifts can occur with changes
S ENSING
E LEC TRO DE
1
4
V dd
OU T
S N S1
OP T1
G A IN
OP T2
S N S2
7
5
Pie zo Sounde r
10-30 nF
2
C MO S
Rx
Cx
6
V ss
8
3.1 SAMPLE CAPACITOR
Charge sampler Cs can be virtually any plastic film or high-K
ceramic capacitor. Since the acceptable Cs range is
anywhere from 10nF to 30nF, the tolerance of Cs can be the
lowest grade obtainable so long as its value is guaranteed to
remain in the acceptable range under expected temperature
conditions. Only if very fast, radical temperature swings are
expected will a higher quality capacitor be required, for
example polycarbonate, PPS film, or NPO/C0G ceramic.
3.2 PIEZO SOUNDER
The use of a piezo sounder in place of Cs is described in the
previous section. Piezo sounders have very high,
uncharacterized thermal coefficients and should not be used
if fast temperature swings are anticipated.
3.3 OPTION STRAPPING
The option pins Opt1 and Opt2 should never be left floating.
If they are floated, the device will draw excess power and the
options will not be properly read on powerup. Intentionally,
-7-
there are no pullup resistors on these lines,
since pullup resistors add to power drain if tied
low.
Figure 2-7 ESD Protection
+2.5 to 5
The Gain input is designed to be floated for
sensing one of the three gain settings. It
should never be connected to a pullup resistor
or tied to anything other than Sns1 or Sns2.
Table
2-1
shows
the
configurations available.
option
strap
+
2
OU T
Vdd
D1
SNS2
7
R e3
S ENSIN G
ELEC TR O DE
R e1
3
3.4 POWER SUPPLY, PCB LAYOUT
The power supply can range from 2.5 to 5.0
volts. At 3 volts current drain averages less
than 20µA in most cases, but can be higher if
Cs is large. Interestingly, large Cx values will
actually decrease power drain. Operation can
be from batteries, but be cautious about loads
causing supply droop (see Output Drive,
previous section).
10µF
R e2
1
4
C1
O PT1
G AIN
O PT2
SNS1
D2
5
Cs
6
Vss
8
As battery voltage sags with use or fluctuates slowly with
temperature, the IC will track and compensate for these
changes automatically with only minor changes in sensitivity.
If the power supply is shared with another electronic system,
care should be taken to assure that the supply is free of
digital spikes, sags, and surges which can adversely affect
the device. The IC will track slow changes in Vdd, but it can
be affected by rapid voltage steps.
if desired, the supply can be regulated using a conventional
low current regulator, for example CMOS regulators that
have nanoamp quiescent currents. Care should be taken that
the regulator does not have a minimum load specification,
which almost certainly will be violated by the QT110's low
current requirement.
Since the IC operates in a burst mode, almost all the power
is consumed during the course of each burst. During the
time between bursts the sensor is quiescent.
For proper operation a 100nF (0.1uF) ceramic bypass
capacitor should be used between Vdd and Vss; the bypass
cap should be placed very close to the device’s power pins.
3.4.1 MEASURING SUPPLY CURRENT
Measuring average power consumption is a fairly difficult
task, due to the burst nature of the device’s operation. Even
a good quality RMS DMM will have difficulty tracking the
relatively slow burst rate.
The simplest method for measuring average current is to
replace the power supply with a large value low-leakage
electrolytic capacitor, for example 2,700µF. 'Soak' the
capacitor by connecting it to a bench supply at the desired
operating voltage for 24 hours to form the electrolyte and
reduce leakage to a minimum. Connect the capacitor to the
circuit at T=0, making sure there will be no detections during
the measurement interval; at T=30 seconds measure the
capacitor's voltage with a DMM. Repeat the test without a
load to measure the capacitor's internal leakage, and
subtract the internal leakage result from the voltage droop
measured during the QT110 load test. Be sure the DMM is
connected only at the end of each test, to prevent the DMM's
impedance from contributing to the capacitor's discharge.
Supply drain can be calculated from the adjusted voltage
droop using the basic charge equation:
i=
✁VC
t
where C is the large supply cap value, t is the elapsed
measurement time in seconds, and ∆V is the adjusted
voltage droop on C.
3.4.2 ESD PROTECTION
In cases where the electrode is placed behind a dielectric
panel, the IC will be protected from direct static discharge.
However, even with a panel, transients can still flow into the
electrode via induction, or in extreme cases, via dielectric
breakdown. Porous materials may allow a spark to tunnel
right through the material; partially conducting materials like
'pink poly' will conduct the ESD right to the electrode. Testing
is required to reveal any problems. The device does have
diode protection on its terminals which can absorb and
protect the device from most induced discharges, up to
20mA; the usefulness of the internal clamping will depending
on the dielectric properties, panel thickness, and rise time of
the ESD transients.
ESD dissipation can be aided further with an added diode
protection network as shown in Figure 2-7, in extreme cases.
Because the charge and transfer times of the QT110 are
relatively long, the circuit can tolerate very large values of
Re, more than 100k ohms in most cases where electrode Cx
is small. The added diodes shown (1N4150, BAV99 or
equivalent low-C diodes) will shunt the ESD transients away
from the part, and Re1 will current limit the rest into the
QT110's own internal clamp diodes. C1 should be around
10µF if it is to absorb positive transients from a human body
model standpoint without rising in value by more than 1 volt.
If desired C1 can be replaced with an appropriate zener
diode. Directly placing semiconductor transient protection
devices or MOV's on the sense lead is not advised; these devices
have extremely large amounts of parasitic C which will swamp the
capacitance of the electrode.
Re1 should be as large as possible given the load value of
Cx and the diode capacitances of D1 and D2. Re1 should be
low enough to permit at least 6 timeconstants of RC to occur
during the charge and transfer phases.
-8-
Re2 functions to isolate the transient from the Vdd pin;
values of around 1K ohms are reasonable.
As with all ESD protection networks, it is crucial that the
transients be led away from the circuit. PCB ground layout is
crucial; the ground connections to D1, D2, and C1 should all
go back to the power supply ground or preferably, if
available, a chassis ground connected to earth. The currents
should not be allowed to traverse the area directly under the
IC.
If the device is connected to an external circuit via a cable or
long twisted pair, it is possible for ground-bounce to cause
damage to the Out pin; even though the transients are led
away from the IC itself, the connected signal or power
ground line will act as an inductor, causing a high differential
voltage to build up on the Out wire with respect to ground. If
this is a possibility, the Out pin should have a resistance Re3
in series with it to limit current; this resistor should be as
large as can be tolerated by the load.
-9-
4.1 ABSOLUTE MAXIMUM SPECIFICATIONS
Operating temp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . as designated by suffix
Storage temp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55OC to +125OC
VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 to +6.5V
Max continuous pin current, any control or drive pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20mA
Short circuit duration to ground, any pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . infinite
Short circuit duration to VDD, any pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . infinite
Voltage forced onto any pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.6V to (Vdd + 0.6) Volts
4.2 RECOMMENDED OPERATING CONDITIONS
VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +2.5 to 5.5V
Supply ripple+noise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20mV p-p max
Load capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 20pF
Cs value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10nF to 30nF
4.3 AC SPECIFICATIONS
Parameter
Vdd = 3.0, Ta = recommended operating range
Description
Min
Typ
Max
Units
TRC
Recalibration time
550
ms
TPC
Charge duration
2
µs
TPT
Transfer duration
2
µs
TBS
Burst spacing interval
TBL
Burst length
TR
Response time
75
0.5
Notes
ms
7
ms
129
ms
FP
Piezo drive frequency
4
kHz
TP
Piezo drive duration
75
ms
TPO
Pulse output width on Out
75
ms
THB
Heartbeat pulse width
300
µs
4.4 SIGNAL PROCESSING
Description
Min
Typ
Max
Units
Notes
Threshold differential, high gain
3.1
%
Note 1
Threshold differential, medium gain
4.7
%
Note 1
Threshold differential, low gain
6.25
%
Note 1
50
%
Note 2
Hysteresis
4
samples
Positive drift compensation rate
Consensus filter length
750
ms/level
Negative drift compensation rate
75
ms/level
Post-detection recalibration timer duration
10
Note 1: Of absolute full scale signal
Note 2: Of signal threshold
Note 3: Strap option.
- 10 -
60
secs
Note 3
4.5 DC SPECIFICATIONS
Vdd = 3.0V, Cs = 10nF, Cx = 5pF, TA = recommended range, unless otherwise noted
Parameter
VDD
IDD
Description
Min
Supply voltage
Typ
2.45
Supply current
VDDS
Supply turn-on slope
VIL
Low input logic level
VHL
High input logic level
VOL
Low output voltage
VOH
High output voltage
IIL
Input leakage current
CX
Load capacitance range
IX
Min shunt resistance
AR
Acquisition resolution
S[1]
Sensitivity - high gain
S[2]
Sensitivity - medium gain
Max
Units
5.25
V
20
µA
100
V/s
0.8
2.2
0.6
Vdd-0.7
0
OPT1, OPT2
V
OPT1, OPT2
V
OUT, 4mA sink
V
OUT, 1mA source
µA
30
pF
✡
14
Required for proper startup
V
±1
500K
S[3]
Sensitivity - low gain
Preliminary Data: All specifications subject to change.
Notes
OPT1, OPT2
Resistance from SNS1 to SNS2
bits
1
pF
Refer to Figures 4-1 through 4-3
1.5
pF
Refer to Figures 4-1 through 4-3
3
pF
Refer to Figures 4-1 through 4-3
Figure 4-1 High Gain Sensitivity
and Range @ Vdd = 3V
Figure 4-2 Medium Gain Sensitivity
and Range @ Vdd = 3V
3.0
4.0
Sensitivity, p F
Cx=30pF
Sensitivity, p F
Cx=30pF
2.5
25pF
2.0
20pF
1.5
10pF
5pF
1.0
0pF
10
20
20pF
2.0
10pF
5pF
0pF
1.0
Valid operating range
0.5
25pF
3.0
Valid operating range
30
10
20
C s, nF
30
C s, nF
Figure 4-3 Low Gain Sensitivity
and Range @ Vdd = 3V
Figure 4-4 Supply Current vs.
Voltage; Cx = 10pF
180
160
8.0
Current (microamps)
Sen sitivity, pF
Cx=30pF
25pF
6.0
20pF
4.0
2.0
10pF
5pF
0pF
140
120
100
Cs = 100nF
80
47nF
60
22nF
40
10nF
20
Valid operating range
0
10
20
3
30
3.5
4
Vss, Volts
Cs, nF
- 11 -
4.5
5
Package type: 8pin Dual-In-Line
SYMBOL
a
A
M
m
Q
P
L
L1
F
R
r
S
S1
Aa
x
Y
Min
Millimeters
Max
6.096
7.62
9.017
7.62
0.889
0.254
0.355
1.397
2.489
3.048
0.381
3.048
7.62
8.128
0.203
7.112
8.255
10.922
7.62
0.559
1.651
2.591
3.81
3.556
4.064
7.062
9.906
0.381
Notes
Typical
BSC
Typical
BSC
Min
Inches
Max
0.24
0.3
0.355
0.3
0.035
0.01
0.014
0.055
0.098
0.12
0.015
0.12
0.3
0.32
0.008
0.28
0.325
0.43
0.3
0.022
0.065
0.102
0.15
0.14
0.16
0.3
0.39
0.015
Notes
Typical
BSC
Typical
BSC
Package type: 8pin SOIC
SYMBOL
Min
Millimeters
Max
M
W
Aa
H
h
D
L
E
e
ß
Ø
4.800
5.816
3.81
1.371
0.101
1.27
0.355
0.508
0.19
0.381
0º
4.979
6.198
3.988
1.728
0.762
1.27
0.483
1.016
0.249
0.762
8º
Notes
Min
Inches
Max
BSC
0.189
0.229
0.15
0.054
0.004
0.050
0.014
0.02
0.007
0.229
0º
0.196
0.244
0.157
0.068
0.01
0.05
0.019
0.04
0.01
0.03
8º
- 12 -
Notes
BSC
5 - ORDERING INFORMATION
PART
TEMP RANGE
PACKAGE
MARKING
QT110-D
QT110-S
QT110-IS
QT110H-D
QT110H-S
QT110H-IS
0 - 70C
0 - 70C
-40 - 85C
0 - 70C
0 - 70C
-40 - 85C
PDIP
SOIC-8
SOIC-8
PDIP
SOIC-8
SOIC-8
QT1 + 10
QT1
QT1 + I
QT1 +10H
QT1 + A
QT1 + AI
Quantum Research Group Ltd
©1999 QRG Ltd.
Patented and patents pending
651 Holiday Drive Bldg. 5 / 300
Pittsburgh, PA 15220 USA
Tel: 412-391-7367 Fax: 412-291-1015
admin@qprox.com
http://www.qprox.com
In the United Kingdom
Enterprise House, Southampton, Hants SO14 3XB
Tel: +44 (0)23 8045 3934 Fax: +44 (0)23 8045 3939
Notice: This device expressly not for use in any medical or human safety related application without the express written consent of an officer of
the company.
Freescale Semiconductor
Technical Data
MC145026/D
Rev. 4, 1/2005
MC145026, MC145027
MC145028
16
16
MC145026, MC145027,
MC145028
1
1
P Suffix
Plastic DIP
Case 648
Encoder and Decoder Pairs
CMOS
D Suffix
SOG Package
Case751B
16
1
DW Suffix
SOG Package
Case 751G
1
Introduction
Ordering Information
These devices are designed to be used as
encoder/decoder pairs in remote control applications.
The MC145026 encodes nine lines of information and
serially sends this information upon receipt of a transmit
enable (TE) signal. The nine lines may be encoded with
trinary data (low, high, or open) or binary data (low or
high). The words are transmitted twice per encoding
sequence to increase security.
The MC145027 decoder receives the serial stream and
interprets five of the trinary digits as an address code.
Thus, 243 addresses are possible. If binary data is used at
the encoder, 32 addresses are possible. The remaining
serial information is interpreted as four bits of binary
data. The valid transmission (VT) output goes high on
the MC145027 when two conditions are met. First, two
addresses must be consecutively received (in one
encoding sequence) which both match the local address.
Second, the 4 bits of data must match the last valid data
received. The active VT indicates that the information at
the Data output pins has been updated.
Device
Package
MC145026P
Plastic DIP
MC145026D
SOG Package
MC145027P
Plastic DIP
MC145027DW
SOG Package
MC145028P
Plastic DIP
MC145028DW
SOG Package
Contents
1
2
3
4
5
6
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Electrical Specifications . . . . . . . . . . . . . . . . 4
Operating Characteristics . . . . . . . . . . . . . . . 8
Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . 9
MC145027 and MC145028 Timing . . . . . . . . 16
Package Dimensions . . . . . . . . . . . . . . . . . . 18
Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its
products.
© Freescale Semiconductor, Inc., 2005. All rights reserved.
Introduction
The MC145028 decoder treats all nine trinary digits as an address which allows 19,683 codes. If binary
data is encoded, 512 codes are possible. The VT output goes high on the MC145028 when two addresses
are consecutively received (in one encoding sequence) which both match the local address.
• Operating Temperature Range: - 40 to + 85°C
• Very-Low Standby Current for the Encoder: 300 nA Maximum @ 25°C
• Interfaces with RF, Ultrasonic, or Infrared Modulators and Demodulators
• RC Oscillator, No Crystal Required
• High External Component Tolerance; Can Use ± 5% Components
• Internal Power-On Reset Forces All Decoder Outputs Low
• Operating Voltage Range:
MC145026 = 2.5 to 18 V
MC145027, MC145028 = 4.5 to 18 V
MC145026
ENCODER
A1
MC145027
DECODERS
VDD
A1
MC145028
DECODERS
VDD
A1
VDD
A6
A2
Dout
A2
D6
A2
A3
TE
A3
D7
A3
A7
A4
RTC
A4
D8
A4
A8
A5
CTC
A5
D9
A5
A9
VT
R2/C2
A6/D6
RS
R1
VT
R1
A7/D7
A9/D9
C1
R2/C2
C1
VSS
A8/D8
VSS
Din
VSS
Din
Figure 1. Pin Assignments
MC145026, MC145027, MC145028 Technical Data, Rev. 4
2
Freescale Semiconductor
Introduction
RS
11
TE
RTC
12
CTC
13
3-PIN
OSCILLATOR
AND
ENABLE
14
DATA SELECT
AND
BUFFER
÷4
DIVIDER
15
DOUT
RING COUNTER AND 1-OF-9 DECODER
9 8 7 6 5 4 3 2 1
1
A1
2
A2
3
A3
4
A4
5
A5
TRINARY
DETECTOR
6
A6/D6
7
A7/D7
VDD = PIN 16
VSS = PIN 8
9
A8/D8
10
A9/D9
Figure 2. MC145026 Encoder Block Diagram
CONTROL
LOGIC
SEQUENCER CIRCUIT
5
A1
A2
A3
A4
A5
4
3
2
15
14
LATCH
4-BIT SHIFT REGISTER
11
13
12
VT
D6
D7
D8
D9
1
1
2
DATA
EXTRACTOR
3
9
Din
4
5
C1
7
6
10
R1
C2
VDD = PIN 16
VSS = PIN 8
R2
Figure 3. MC145027 Decoder Block Diagram
MC145026, MC145027, MC145028 Technical Data, Rev. 4
Freescale Semiconductor
3
Electrical Specifications
11
CONTROL
LOGIC
VT
SEQUENCER CIRCUIT
9
A1
A2
A3
A4
A5
A6
A7
A8
A9
8
7
6
5
4
3
2
1
1
9-BIT
SHIFT
REGISTER
2
3
4
5
9
DATA
EXTRACTOR
15
C1
14
7
R1
6
10
13
C2
Din
VDD = PIN 16
VSS = PIN 8
R2
12
Figure 4. MC145028 Decoder Block Diagram
2
Electrical Specifications
Table 1. Maximum Ratings* (Voltages Referenced to VSS)
Ratings
Symbol
Value
Unit
DC Supply Voltage
VDD
- 0.5 to + 18
V
DC Input Voltage
Vin
- 0.5 to VDD + 0.5
V
DC Output Voltage
Vout
- 0.5 to VDD + 0.5
V
DC Input Current, per Pin
Iin
± 10
mA
DC Output Current, per Pin
Iout
± 10
mA
Power Dissipation, per Package
PD
500
mW
Storage Temperature
Tstg
- 65 to + 150
°C
TL
260
°C
Lead Temperature, 1 mm from Case for 10 Seconds
* Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be
restricted to the limits in the Electrical Characteristics tables or Pin Descriptions section.
This device contains protection circuitry to guard against damage due to high static voltages or electric
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum
rated voltages to this high-impedance circuit. For proper operation, Vin and Vout should be constrained to
the range VSS ≤ (Vin or Vout) ≤ VDD.
MC145026, MC145027, MC145028 Technical Data, Rev. 4
4
Freescale Semiconductor
Electrical Specifications
Table 2. Electrical Characteristics - MC1450261, MC145027, and MC145028
(Voltage Referenced to VSS)
Guaranteed Limit
Symbol
- 40°C
25°C
85°C
Unit
Min
Max
Min
Max
Min
Max
VOL
Low-Level Output Voltage
(Vin = VDD or 0)
5.0
10
15
-
0.05
0.05
0.05
-
0.05
0.05
0.05
-
0.05
0.05
0.05
V
VOH
High-Level Output Voltage
(Vin = 0 or VDD)
5.0
10
15
4.95
9.95
14.95
-
4.95
9.95
14.95
-
4.95
9.95
14.95
-
V
VIL
Low-Level Input Voltage
(Vout = 4.5 or 0.5 V)
(Vout = 9.0 or 1.0 V)
(Vout = 13.5 or 1.5 V)
5.0
10
15
-
1.5
3.0
4.0
-
1.5
3.0
4.0
-
1.5
3.0
4.0
(Vout = 0.5 or 4.5 V)
(Vout = 1.0 or 9.0 V)
(Vout = 1.5 or 13.5 V)
5.0
10
15
3.5
7.0
11
-
3.5
7.0
11
-
3.5
7.0
11
-
(Vout = 2.5 V)
(Vout = 4.6 V)
(Vout = 9.5 V)
(Vout = 13.5 V)
5.0
5.0
10
15
- 2.5
- 0.52
- 1.3
- 3.6
-
- 2.1
- 0.44
- 1.1
- 3.0
-
- 1.7
- 0.36
- 0.9
- 2.4
-
(Vout = 0.4 V)
(Vout = 0.5 V)
(Vout = 1.5 V)
5.0
10
15
0.52
1.3
3.6
-
0.44
1.1
3.0
-
0.36
0.9
2.4
-
VIH
IOH
IOL
1
VDD
V
Characteristic
V
High-Level Input Voltage
V
High-Level Output Current
mA
Low-Level Output Current
mA
Iin
Input Current - TE
(MC145026, Pull-Up Device)
5.0
10
15
-
-
3.0
16
35
11
60
120
-
-
µA
Iin
Input Current
RS (MC145026), Din (MC145027, MC145028)
15
-
± 0.3
-
± 0.3
-
± 1.0
µA
Iin
Input Current
A1 - A5, A6/D6 - A9/D9 (MC145026),
A1 - A5 (MC145027),
A1 - A9 (MC145028)
5.0
10
15
-
-
-
± 110
± 500
± 1000
-
-
-
-
-
-
7.5
-
-
pF
µA
Cin
Input Capacitance (Vin = 0)
IDD
Quiescent Current - MC145026
5.0
10
15
-
-
-
0.1
0.2
0.3
-
-
µA
IDD
Quiescent Current - MC145027, MC145028
5.0
10
15
-
-
-
50
100
150
-
-
µA
Also see next Electrical Characteristics table for 2.5 V specifications.
MC145026, MC145027, MC145028 Technical Data, Rev. 4
Freescale Semiconductor
5
Electrical Specifications
Table 2. Electrical Characteristics - MC1450261, MC145027, and MC145028 (continued)
(Voltage Referenced to VSS)
Guaranteed Limit
Symbol
1
VDD
V
Characteristic
- 40°C
25°C
85°C
Unit
Min
Max
Min
Max
Min
Max
Idd
Dynamic Supply Current - MC145026
(fc = 20 kHz)
5.0
10
15
-
-
-
200
400
600
-
-
µA
Idd
Dynamic Supply Current - MC145027,
MC145028 (fc = 20 kHz)
5.0
10
15
-
-
-
400
800
1200
-
-
µA
Also see next Electrical Characteristics table for 2.5 V specifications.
Table 3. Electrical Characteristics - MC145026 (Voltage Referenced to VSS)
Guaranteed Limit
Symbol
VDD
V
Characteristic
- 40°C
25°C
85°C
Unit
Min
Max
Min
Max
Min
Max
VOL
Low-Level Output Voltage
(Vin = 0 V or VDD)
2.5
-
0.05
-
0.05
-
0.05
V
VOH
High-Level Output Voltage
(Vin = 0 V or VDD)
2.5
2.45
-
2.45
-
2.45
-
V
VIL
Low-Level Input Voltage (Vout = 0.5 V or 2.0 V)
2.5
-
0.3
-
0.3
-
0.3
V
VIH
High-Level Input Voltage (Vout = 0.5 V or 2.0 V)
2.5
2.2
-
2.2
-
2.2
-
V
IOH
High-Level Output Current
(Vout = 1.25 V)
2.5
0.28
-
0.25
-
0.2
-
mA
IOL
Low-Level Output Current
(Vout = 0.4 V)
2.5
0.22
-
0.2
-
0.16
-
mA
Iin
Input Current (TE - Pull-Up Device)
2.5
-
-
0.09
1.8
-
-
µA
Iin
Input Current (A1-A5, A6/D6-A9/D9)
2.5
-
-
-
± 25
-
-
µA
IDD
Quiescent Current
2.5
-
-
-
0.05
-
-
µA
Idd
Dynamic Supply Current (fc = 20 kHz)
2.5
-
-
-
40
-
-
µA
MC145026, MC145027, MC145028 Technical Data, Rev. 4
6
Freescale Semiconductor
Electrical Specifications
Table 4. Switching Characteristics - MC1450261, MC145027, and MC145028 (CL = 50 pF, TA = 25°C)
Symbol
tTLH, tTHL
1
Characteristic
Output Transition Time
Figure
No.
Guaranteed Limit
VDD
Unit
Min
Max
5, 9
5.0
10
15
-
200
100
80
ns
tr
Din Rise Time - Decoders
6
5.0
10
15
-
15
15
15
µs
tf
Din Fall Time - Decoders
6
5.0
10
15
-
15
5.0
4.0
µs
fosc
Encoder Clock Frequency
7
5.0
10
15
0.001
0.001
0.001
2.0
5.0
10
MHz
f
Decoder Frequency - Referenced to Encoder Clock
13
5.0
10
15
1.0
1.0
1.0
240
410
450
kHz
tw
TE Pulse Width - Encoders
8
5.0
10
15
65
30
20
-
ns
Also see next Electrical Characteristics table for 2.5 V specifications.
Table 5. Switching Characteristics - MC145026 (CL = 50 pF, TA = 25°C)
tTLH, tTHL
fosc
tw
Guaranteed Limit
Figure
No.
VDD
5, 9
Encoder Clock Frequency
TE Pulse Width
Symbol
Characteristic
Output Transition Time
Unit
Min
Max
2.5
-
450
ns
7
2.5
1.0
250
kHz
8
2.5
1.5
-
µs
MC145026, MC145027, MC145028 Technical Data, Rev. 4
Freescale Semiconductor
7
Operating Characteristics
tf
ANY OUTPUT 90%
10%
Din
tTLH
VDD
90%
tTHL
Figure 5. Output Transition Time
10%
VSS
Figure 6. Din Rise and Fall Time
t/fOSC
RTC
tf
VDD
TE
50%
VSS
50%
tW
Figure 8. TE Pulse Width
Figure 7. Encoder Clock Frequency
TEST POINT
OUTPUT
DEVICE
UNDER
TEST
CL*
* Includes all probe and fixture capacitance.
Figure 9. Test Circuit
3
3.1
Operating Characteristics
MC145026
The encoder serially transmits trinary data as defined by the state of the A1 - A5 and A6/D6 - A9/D9 input
pins. These pins may be in either of three states (low, high, or open) allowing 19,683 possible codes. The
transmit sequence is initiated by a low level on the TE input pin. Upon power-up, the MC145026 can
continuously transmit as long as TE remains low (also, the device can transmit two-word sequences by
pulsing TE low). However, no MC145026 application should be designed to rely upon the first data word
transmitted immediately after power-up because this word may be invalid. Between the two data words,
no signal is sent for three data periods (see Figure 11).
Each transmitted trinary digit is encoded into pulses (see Figure 12). A logic 0 (low) is encoded as two
consecutive short pulses, a logic 1 (high) as two consecutive long pulses, and an open (high impedance)
as a long pulse followed by a short pulse. The input state is determined by using a weak “output” device
to try to force each input high then low. If only a high state results from the two tests, the input is assumed
to be hardwired to VDD. If only a low state is obtained, the input is assumed to be hardwired to VSS. If both
a high and a low can be forced at an input, an open is assumed and is encoded as such. The “high” and
MC145026, MC145027, MC145028 Technical Data, Rev. 4
8
Freescale Semiconductor
Pin Descriptions
“low” levels are 70% and 30% of the supply voltage as shown in the Electrical Characteristics table. The
weak “output” device sinks/sources up to 110 µA at a 5 V supply level, 500 µA at 10 V, and 1 mA at 15 V.
The TE input has an internal pull-up device so that a simple switch may be used to force the input low.
While TE is high, the encoder is completely disabled, the oscillator is inhibited, and the current drain is
reduced to quiescent current. When TE is brought low, the oscillator is started and the transmit sequence
begins. The inputs are then sequentially selected, and determinations are made as to the input logic states.
This information is serially transmitted via the Dout pin.
3.2
MC145027
This decoder receives the serial data from the encoder and outputs the data, if it is valid. The transmitted
data, consisting of two identical words, is examined bit by bit during reception. The first five trinary digits
are assumed to be the address. If the received address matches the local address, the next four (data) bits
are internally stored, but are not transferred to the output data latch. As the second encoded word is
received, the address must again match. If a match occurs, the new data bits are checked against the
previously stored data bits. If the two nibbles of data (four bits each) match, the data is transferred to the
output data latch by VT and remains until new data replaces it. At the same time, the VT output pin is
brought high and remains high until an error is received or until no input signal is received for four data
periods (see Figure 11).
Although the address information may be encoded in trinary, the data information must be either a 1 or 0.
A trinary (open) data line is decoded as a logic 1.
3.3
MC145028
This decoder operates in the same manner as the MC145027 except that nine address lines are used and
no data output is available. The VT output is used to indicate that a valid address has been received. For
transmission security, two identical transmitted words must be consecutively received before a VT output
signal is issued.
The MC145028 allows 19,683 addresses when trinary levels are used. 512 addresses are possible when
binary levels are used.
4
4.1
Pin Descriptions
MC145026 Encoder
A1 - A5, A6/D6 - A9/D9
Address, Address/Data Inputs (Pins 1 - 7, 9, and 10)
These address/data inputs are encoded and the data is sent serially from the encoder via the Dout pin.
RS, CTC, RTC
(Pins 11, 12, and 13)
These pins are part of the oscillator section of the encoder (see Figure 10).
MC145026, MC145027, MC145028 Technical Data, Rev. 4
Freescale Semiconductor
9
Pin Descriptions
If an external signal source is used instead of the internal oscillator, it should be connected to the RS input
and the RTC and CTC pins should be left open.
TE
Transmit Enable (Pin 14)
This active-low transmit enable input initiates transmission when forced low. An internal pull-up device
keeps this input normally high. The pull-up current is specified in the Electrical Characteristics table.
Dout
Data Out (Pin 15)
This is the output of the encoder that serially presents the encoded data word.
VSS
Negative Power Supply (Pin 8)
The most-negative supply potential. This pin is usually ground.
VDD
Positive Power Supply (Pin 16)
The most-positive power supply pin.
4.2
MC145027 and MC145028 Decoders
A1 - A5, A1 - A9
Address Inputs (Pins 1 - 5) - MC145027,
Address Inputs (Pins 1 - 5, 15, 14, 13, 12) - MC145028
These are the local address inputs. The states of these pins must match the appropriate encoder inputs for
the VT pin to go high. The local address may be encoded with trinary or binary data.
D6 - D9
Data Outputs (Pins 15, 14, 13, 12) - MC145027 Only
These outputs present the binary information that is on encoder inputs A6/D6 through A9/D9. Only binary
data is acknowledged; a trinary open at the MC145026 encoder is decoded as a high level (logic 1).
Din
Data In (Pin 9)
This pin is the serial data input to the decoder. The input voltage must be at CMOS logic levels. The signal
source driving this pin must be dc coupled.
MC145026, MC145027, MC145028 Technical Data, Rev. 4
10
Freescale Semiconductor
Pin Descriptions
R1, C1
Resistor 1, Capacitor 1 (Pins 6, 7)
As shown in Figure 3 and Figure 4, these pins accept a resistor and capacitor that are used to determine
whether a narrow pulse or wide pulse has been received. The time constant R1 × C1 should be set to
1.72 encoder clock periods:
R1 C1 = 3.95 RTC CTC
R2/C2
Resistor 2/Capacitor 2 (Pin 10)
As shown in Figure 3 and Figure 4, this pin accepts a resistor and capacitor that are used to detect both the
end of a received word and the end of a transmission. The time constant R2 x C2 should be 33.5 encoder
clock periods (four data periods per Figure 12): R2 C2 = 77 RTC CTC. This time constant is used to
determine whether the Din pin has remained low for four data periods (end of transmission). A separate
on-chip comparator looks at the voltage-equivalent two data periods (0.4 R2 C2) to detect the dead time
between received words within a transmission.
VT
Valid Transmission Output (Pin 11)
This valid transmission output goes high after the second word of an encoding sequence when the
following conditions are satisfied:
1. the received addresses of both words match the local decoder address, and
2. the received data bits of both words match.
VT remains high until either a mismatch is received or no input signal is received for four data periods.
VSS
Negative Power Supply (Pin 8)
The most-negative supply potential. This pin is usually ground.
VDD
Positive Power Supply (Pin 16)
The most-positive power supply pin.
MC145026, MC145027, MC145028 Technical Data, Rev. 4
Freescale Semiconductor
11
Pin Descriptions
RS
CTC
RTC
11
12
13
INTERNAL
ENABLE
This oscillator operates at a frequency determined by the
external RC network; i.e.,
f≈
1
2.3 RTC CTC′
(Hz)
The value for RS should be chosen to be ≥ 2 times RTC. This range ensures that
current through RS is insignificant compared to current through RTC. The upper
limit for RS must ensure that RS x 5 pF (input capacitance) is small compared to
RTC x CTC.
for 1 kHz ≤ f ≤ 400 kHz
where: CTC′ = CTC + Clayout + 12 pF
RS ≈ 2 RTC
RS ≥ 20 k
RTC ≥ 10 k
400 pF < CTC < 15 µF
For frequencies outside the indicated range, the formula is less accurate. The
minimum recommended oscillation frequency of this circuit is 1 kHz. Susceptibility
to externally induced noise signals may occur for frequencies below 1 kHz and/or
when resistors utilized are greater than 1 MΩ.
Figure 10. Encoder Oscillator Information
ENCODER
PWmin
2 WORD
TRANSMISSION
TE
1ST
DIGIT
9TH
DIGIT
1ST
DIGIT
184
182
180
178
122
120
118
116
114
90
88
86
84
82
80
30
28
26
24
22
20
18
16
6
4
2
ENCODER
OSCILLATOR
(PIN 12)
CONTINUOUS
TRANSMISSION
9TH
DIGIT
Dout
(PIN 15)
HIGH
LOW
OPEN
1ST WORD
2ND WORD
ENCODING SEQUENCE
DECODER
1.1 (R2C2)
VT
(PIN 11)
DATA OUTPUTS
Figure 11. Timing Diagram
MC145026, MC145027, MC145028 Technical Data, Rev. 4
12
Freescale Semiconductor
Pin Descriptions
ENCODER
OSCILLATOR
(PIN 12)
ENCODED
“ONE”
Dout
(PIN 15)
ENCODED
“ZERO”
ENCODED
“OPEN”
DATA PERIOD
Figure 12. Encoder Data Waveforms
fmax (kHZ)
(REF. TO ENCODER CLOCK)
500
400
VDD = 15 V
VDD = 10 V
300
200
VDD = 5 V
100
10
20
30
40
50
Clayout (pF) ON PINS 1 - 5 (MC145027);
PINS 1 - 5 AND 12 - 15 (MC145028)
Figure 13. fmax vs Clayout - Decoders Only
MC145026, MC145027, MC145028 Technical Data, Rev. 4
Freescale Semiconductor
13
Pin Descriptions
NO
HAS THE
TRANSMISSION
BEGUN?
YES
DOES
THE 5-BIT
ADDRESS MATCH
THE ADDRESS
PINS?
NO
DISABLE VT
ON THE 1ST
ADDRESS MISMATCH
NO
DISABLE VT
ON THE 1ST
DATA MISMATCH
YES
STORE
THE
4-BIT
DATA
DOES
THIS DATA
MATCH THE
PREVIOUSLY
STORED
DATA?
YES
IS THIS
AT LEAST THE
2ND CONSECUTIVE
MATCH SINCE VT
DISABLE?
NO
YES
LATCH DATA
ONTO OUTPUT
PINS AND
ACTIVATE VT
HAVE
4-BIT TIMES
PASSED?
YES
DISABLE
VT
NO
NO
HAS
A NEW
TRANSMISSION
BEGUN?
YES
Figure 14. MC145027 Flowchart
MC145026, MC145027, MC145028 Technical Data, Rev. 4
14
Freescale Semiconductor
Pin Descriptions
NO
HAS THE
TRANSMISSION
BEGUN?
YES
DOES
THE ADDRESS
MATCH THE
ADDRESS
PINS?
NO
DISABLE VT ON THE
1ST ADDRESS
MISMATCH AND IGNORE
THE REST OF
THIS WORD
YES
IS THIS
AT LEAST THE
2ND CONSECUTIVE
MATCH SINCE VT
DISABLE?
NO
YES
ACTIVATE VT
HAVE
4-BIT TIMES
PASSED?
YES
DISABLE VT
NO
NO
HAS A
NEW TRANSMISSION
BEGUN?
YES
Figure 15. MC145028 Flowchart
MC145026, MC145027, MC145028 Technical Data, Rev. 4
Freescale Semiconductor
15
MC145027 and MC145028 Timing
5
MC145027 and MC145028 Timing
To verify the MC145027 or MC145028 timing, check the waveforms on C1 (Pin 7) and R2/C2 (Pin 10) as
compared to the incoming data waveform on Din (Pin 9).
The R-C decay seen on C1 discharges down to 1/3 VDD before being reset to VDD. This point of reset
(labelled “DOS” in Figure 16) is the point in time where the decision is made whether the data seen on Din
is a 1 or 0. DOS should not be too close to the Din data edges or intermittent operation may occur.
The other timing to be checked on the MC145027 and MC145028 is on R2/C2 (see Figure 17). The R-C
decay is continually reset to VDD as data is being transmitted. Only between words and after the
end-of-transmission (EOT) does R2/C2 decay significantly from VDD. R2/C2 can be used to identify the
internal end-of-word (EOW) timing edge which is generated when R2/C2 decays to 2/3 VDD. The internal
EOT timing edge occurs when R2/C2 decays to 1/3 VDD. When the waveform is being observed, the R-C
decay should go down between the 2/3 and 1/3 VDD levels, but not too close to either level before data
transmission on Din resumes.
Verification of the timing described above should ensure a good match between the MC145026 transmitter
and the MC145027 and MC145028 receivers.
VDD
Din
0V
VDD
C1
2/3
1/3
0V
DOS
DOS
Figure 16. R-C Decay on Pin 7 (C1)
EOW
VDD
R2/C2
2/3
1/3
0V
EOT
Figure 17. R-C Decay on Pin 10 (R2/C2)
MC145026, MC145027, MC145028 Technical Data, Rev. 4
16
Freescale Semiconductor
MC145027 and MC145028 Timing
VDD
VDD
TE
VDD
VDD
0.1 µF
A1
5
TRINARY
ADDRESSES
14
A2
1
2
3
4
5
6
7
9
10
A3
A4
A5
D6
D7
4-BIT
BINARY
DATA
D8
Din
2.3 RTCCTC′
R1C1 = 3.95 RTCCTC
R2C2 = 77 RTCCTC
9
6
R1
MC145026
13
7
RTC
C1
CTC
12
10
11
RS
8
R2
CTC′ = CTC + Clayout + 12 pF
100 pF ≤ CTC ≤ 15 µF
RTC ≥ 10 kΩ; RS ≈ 2 RTC
R1 ≥ 10 kΩ
C1 ≥ 400 pF
R2 ≥ 100 kΩ
C2 ≥ 700 pF
1
A1
16
16
15 Dout
D9
fosc =
0.1 µF
1
2
3
4
5
MC145027
15
14
13
12
11
C2
A2
A3
A4
5
TRINARY
ADDRESSES
A5
D6
D7
D8
D9
VT
8
REPEAT OF ABOVE
REPEAT OF ABOVE
Example R/C Values (All Resistors and Capacitors are ± 5%)
(CTC′ = CTC + 20 pF)
fosc (kHz)
RTC
362
181
88.7
42.6
21.5
8.53
1.71
10 k
10 k
10 k
10 k
10 k
10 k
50 k
CTC′
120 pF
240 pF
490 pF
1020 pF
2020 pF
5100 pF
5100 pF
RS
R1
C1
R2
C2
20 k
20 k
20 k
20 k
20 k
20 k
100 k
10 k
10 k
10 k
10 k
10 k
10 k
50 k
470 pF
910 pF
2000 pF
3900 pF
8200 pF
0.02 µF
0.02 µF
100 k
100 k
100 k
100 k
100 k
200 k
200 k
910 pF
1800 pF
3900 pF
7500 pF
0.015 µF
0.02 µF
0.1 µF
Figure 18. Typical Application
MC145026, MC145027, MC145028 Technical Data, Rev. 4
Freescale Semiconductor
17
Package Dimensions
6
Package Dimensions
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
-A16
9
1
8
B
F
C
DIM
A
B
C
D
F
G
H
J
K
L
M
S
L
S
-T-
SEATING
PLANE
K
H
G
D
M
J
16 PL
0.25 (0.010)
M
T A
M
INCHES
MILLIMETERS
MIN
MAX MIN MAX
0.740
0.770 18.80 19.55
0.250
0.270
6.35
6.85
0.145
0.175
3.69
4.44
0.015
0.021
0.39
0.53
0.040
0.70
1.02
1.77
0.100 BSC
2.54 BSC
0.050 BSC
1.27 BSC
0.008
0.015
0.21
0.38
0.110
0.130
2.80
3.30
0.295
0.305
7.50
7.74
0˚
10˚
0˚
10˚
0.020
0.040
0.51
1.01
Figure 19. Outline Dimensions for P SUFFIX
PLASTIC DIP (DUAL IN-LINE PACKAGE)
(Case Outline 648-08, Issue R)
0.25
8X
PIN'S
NUMBER
M
B
A
6.2
5.8
1
1.75
1.35
0.25
0.10
16X
16
0.49
0.35
0.25
T A B
14X
PIN 1 INDEX
1.27
4
A
8
10.0
9.8
A
9
T
4.0
3.8
SEATING
PLANE
16X
B
0.1 T
5
0.50
0.25
6
M
X45˚
0.25
0.19
1.25
0.40
SECTION A-A
NOTES:
1. DIMENSIONS ARE IN MILLIMETERS.
2. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
3. DATUMS A AND B TO BE DETERMINED AT THE
PLANE WHERE THE BOTTOM OF THE LEADS
EXIT THE PLASTIC BODY.
4. THIS DIMENSION DOES NOT INCLUDE MOLD
FLASH, PROTRUSION OR GATE BURRS. MOLD
FLASH, PROTRUSION OR GATE BURRS SHALL
NOT EXCEED 0.15mm PER SIDE. THIS
DIMENSION IS DETERMINED AT THE PLANE
WHERE THE BOTTOM OF THE LEADS EXIT
THE PLASTIC BODY.
5. THIS DIMENSION DOES NOT INCLUDE
INTER-LEAD FLASH OR PROTRUSIONS.
INTER-LEAD FLASH AND PROTRUSIONS
SHALL NOT EXCEED 0.25mm PER SIDE. THIS
DIMENSION IS DETERMINED AT THE PLANE
WHERE THE BOTTOM OF THE LEADS EXIT
THE PLASTIC BODY.
6. THIS DIMENSION DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL NOT CAUSE
THE LEAD WIDTH TO EXCEED 0.62mm.
7˚
0˚
Figure 20. Outline Dimensions for D SUFFIX
SOG (SMALL OUTLINE GULL-WING) PACKAGE
(Case Outline 751B-05, Issue K)
MC145026, MC145027, MC145028 Technical Data, Rev. 4
18
Freescale Semiconductor
Package Dimensions
0.25
8X
PIN'S
NUMBER
M
B
A
10.55
10.05
2.65
2.35
0.25
0.10
16X
16
1
0.49
0.35
0.25
6
M
T A B
PIN 1 INDEX
14X
10.45
4 10.15
A
A
8
1.27
9
7.6
7.4
T
B
SEATING
PLANE
16X
0.1 T
5
0.75
0.25
X45˚
0.32
0.23
1.0
0.4
SECTION A-A
NOTES:
1. DIMENSIONS ARE IN MILLIMETERS.
2. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
3. DATUMS A AND B TO BE DETERMINED AT THE
PLANE WHERE THE BOTTOM OF THE LEADS
EXIT THE PLASTIC BODY.
4. THIS DIMENSION DOES NOT INCLUDE MOLD
FLASH, PROTRUSION OR GATE BURRS. MOLD
FLASH, PROTRUSION OR GATE BURRS SHALL
NOT EXCEED 0.15mm PER SIDE. THIS
DIMENSION IS DETERMINED AT THE PLANE
WHERE THE BOTTOM OF THE LEADS EXIT
THE PLASTIC BODY.
5. THIS DIMENSION DOES NOT INCLUDE
INTER-LEAD FLASH OR PROTRUSIONS.
INTER-LEAD FLASH AND PROTRUSIONS
SHALL NOT EXCEED 0.25mm PER SIDE. THIS
DIMENSION IS DETERMINED AT THE PLANE
WHERE THE BOTTOM OF THE LEADS EXIT
THE PLASTIC BODY.
6. THIS DIMENSION DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL NOT CAUSE
THE LEAD WIDTH TO EXCEED 0.62mm.
7˚
0˚
Figure 21. Outline Dimensions for DW SUFFIX
SOG (SMALL OUTLINE GULL-WING) PACKAGE
(Case Outline 751G-04, Issue D)
MC145026, MC145027, MC145028 Technical Data, Rev. 4
Freescale Semiconductor
19
How to Reach Us:
Home Page:
www.freescale.com
E-mail:
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MC145026/D
Rev. 4
1/2005
Information in this document is provided solely to enable system and software
implementers to use Freescale Semiconductor products. There are no express or
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Freescale Semiconductor reserves the right to make changes without further notice to
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Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners.
© Freescale Semiconductor, Inc. 2005. All rights reserved.
SAW RF Transmitter Module
with INTEGRATED ANTENNA
TX-SAW I.A.
+V (15)
SAW
OSCILLATOR
In Mod.
(2)
[650200274]
MATCHING
NETWORK
In Mod.
(3)
1) Ground
2) Input Mod. Vc>8V
3) Input Mod. Vc<8V
4) Ground
7) Ground
10) Ground
13) Ground
15) +V (4V to 12V)
Information subject to change without notice
Pin-out
@5 1
V
mW
Mechanical Dimensions
Descrizione
SAW transmitter module with
integrated antenna ideal for
applications when you need to
modulate ON-OFF a RF carrier with
digital signals.
High reliability and low spurious RF
emision are the main characteristics.
EN 300 220 homologable (@5V).
Modulo trasmettitore SAW con antenna
interna per applicazioni con
modulazione ON-OFF di una portante
RF con dati digitali.
Alta efficienza e bassa emissione di
spurie sono elementi primari del
modello.
Omologabile EN 300 220 (@5V).
3.8
41.5
Component Side
1 2 3 4
7
10
13
CHARACTERISTICS
FC
PERP
ES
FM
LI
TOP
Supply Voltage • Alimentazione
Supply Current • Corrente assorbita
Carrier frequency • Frequenza portante
RF Output power (E.R.P.) • Potenza di uscita RF (E.R.P.)
RF spurious emission • Emissioni RF spurie
Square wave modulation • Frequenza di modulazione
Input logic level • Livello logico d’ingresso
Operating temperature range • Temperatura di lavoro
15
7
0.5
0.25
2.54
Technical Specification
VS
IS
16.3
Description
Ta = 25 °C
MIN
TYP
5
6
433.92
0
-40
VS -1
-20
MAX
+3
4
VS
+80
UNIT
Vdc
mA
MHz
dBm
dB
KHz
V
°C
Products not suggested for new projects or to be used in special applications.
Prodotto non consigliato per nuovi progetti o destinato ad applicazioni speciali.
Technical Mail : Lab-el@aurel.it
AUREL S.p.A. • Via Foro dei Tigli, 4 • I 47015 Modigliana (FC) Italy • Phone : +39-0546941124 • Fax : +39-0546941660 • http://www.aurel.it • E-mail: aurel@aurel.it
WIRELESS
434 Mhz Standard (OOK) Receiver
+V (1,15)
Antenna
(3)
Data Out
(14)
AM
DET.
RF AMP
BC-NBK
+V (1,15)
LF AMP
COMP
T.P.(13)
3 mA max
1) +V
2) Ground
3) Antenna
7) Ground
11) Ground
13) Test Point
14) Data Output
15) +V
Information subject to change without notice
Pin-out
5V
Description
Descrizione
High-miniaturization SIL thick-film hybrid
circuit.
Low cost, low antenna radiation and high
insensitivity to power switching noises.
In compliance with European Normative.
Ricevitore economico su allumina ad
elevata miniaturizzazione.
Basso assorbimento, bassa radiazione in
antenna ed alta immunità ai disturbi di
alimentazione.
In accordo con le Normative Europee.
Mechanical Dimensions
5.5
38.1
1 2 3
7
11
13.7
Component Side
13 14 15
7
0.5
Technical Specification
VS
IS
FW
SI
BW
SO
SL
HO
LO
TON
TOP
0.25
2.54
Ta = 25 °C
CHARACTERISTICS
MIN
TYP
MAX
UNIT
Supply Voltage • Alimentazione
Supply Current • Corrente Assorbita
Reception frequency • Frequenza di ricezione
RF sensitivity • Sensibilità RF
- 3dB RF Bandwidth • Banda passante RF a - 3dB
Square wave output • Onda quadra in uscita
Spectrum emitted level • Radiazione in antenna
Output high voltage• Livello alto d’uscita
Output low voltage• Livello basso d’uscita
Switch-on time• Tempo di accensione
Operating temperature range • Temperatura di lavoro
4.5
5
5.5
3
Vdc
mA
MHz
dBm
MHz
KHz
dBm
V
V
s
°C
433.92
-97
±1.2
-65
2
-60
VS - 0.4
-20
GND + 0.4
2
+80
Product Code: 650200208
AUREL S.p.A. • Via Foro dei Tigli, 4 • I 47015 Modigliana (FC) Italy • Phone : +39-0546.941124 • Fax : +39-0546.941660
www.aurelwireless.com
This information may be subject to revision without notice. AUREL makes no warranty and assumes no liability in connection with any use of this information.
Variazioni senza preavviso delle presenti informazioni non implicano responsabilità da parte AUREL. L'acquirente assume ogni responsabilità derivante dall'uso del prodotto.
WIRELESS