Electronics
Lab Manual
| Electronics I Lab Manual
i
Preface
This manual is intended for use in semiconductor devices course namely Electronics. The manual
contains sufficient exercises for a typical 15 week course using a two to three hour practicum period.
The topics cover three major portions namely Diodes and its applications, Bipolar Junction
Transistors and Field Effect Transistors. For equipment, each lab station includes a dual adjustable
DC power supply, a dual trace oscilloscope, a function generator and a quality DMM. For
components, a selection of standard value ¼ watt carbon film resistors ranging from a few ohms to a
few megohms is required along with an array of typical capacitor values. Active devices include
small signal diodes such as the 1N914 or 1N4148, the NZX5V1B or 1N751 zener, standard single
LEDs, 2N3904 or 2N2222 NPN transistor, 2N3906 PNP transistor, and MPF102 N channel JFET.
Each exercise begins with an Objective and a Theory Overview. The Equipment List follows with
space provided for serial numbers and measured values of components. Schematics are presented
next along with the step-by-step procedure. Many exercises include sections on troubleshooting and
design. All data tables are grouped together, typically with columns for the theoretical and
experimental results, along with a column for the percent deviations between them. Finally, a group
of appropriate questions are presented.
| Electronics I Lab Manual
ii
Learning Outcomes
1. I-V characteristics of diodes, BJTs and FETs both mathematically and graphically
2. DC analysis of circuits containing semiconductor devices
3. Bias design for a given operating point
4. The capability to use abstractions to analyze and design simple electronic circuits.
5. Apply a system`s approach to electronics.
6. The capability to design and construct circuits, take measurements of circuit behavior and
performance, compare with predicted circuit models and explain discrepancies.
| Electronics I Lab Manual
iii
Table of Contents
LAB # 1: Introduction to Oscilloscope & Function Generator
10
Objectives Part 1
10
Part 2 Use the function generator to obtain, calculate, and measure the amplitudes and durations (Time period) of
various voltage signals.
10
Lab Instructions
10
Lab Report Instructions
10
Sample Viva Questions
17
Critical Analysis / Conclusion
17
Take Home Exercise
17
18
LAB # 2: Nonlinear Behaviour of Diode
Objectives Part 1 The goal of part 1 is to understand the testing of solid state conventional diode using analog and
digital meter
18
Equipment Required
18
Lab Instructions
18
Lab Report Instructions
18
Part 1 -Familiarize yourself with diode
18
Part 1 – Testing of diode using Aanalog & Digital Multimeter
19
Part 2 –Working of Diode in Forward & Reverse Biasing
20
Lab Tasks-Part-2
20
Sample Viva Questions
22
Critical Analysis / Conclusion
22
Take Home Exercise
23
24
LAB # 3: Half wave Rectifier
Objectives
24
Equipment Required
24
Lab Instructions
24
Lab Report Instructions
24
Lab Tasks
25
Sample Viva Questions
31
Critical Analysis / Conclusion
31
Take Home Exercise
32
33
LAB # 4: Full wave Rectification
Objectives
33
Lab Instructions
33
| Electronics I Lab Manual
iv
Lab Report Instructions
33
Lab Tasks-Part
34
Sample Viva Questions
40
Critical Analysis / Conclusion
40
Take Home Exercise
41
LAB # 5: Diode Application: Current Voltage (I-V) Characteristics of Zener Diode
42
Objectives
42
Equipment Required
42
Lab Instructions
42
Lab Report Instructions
42
Familiarize yourself with Zener Diode
42
Lab Tasks-
43
Sample Viva Questions
47
Critical Analysis / Conclusion
47
Take Home Exercise
47
LAB # 6: Diode Application: Clippers
48
Objectives
48
Equipment Required
48
Lab Instructions
48
Lab Report Instructions
48
Familiarize yourself with Clippers
48
Lab Tasks-
48
Sample Viva Questions
57
Critical Analysis / Conclusion
57
Take Home Exercise
58
LAB # 7: Diode Application: Clampers
59
Objectives
59
Equipment Required
59
Lab Instructions
59
Lab Report Instructions
59
Familiarize yourself with Clampers
59
Lab Tasks-
60
Sample Viva Questions
68
Critical Analysis / Conclusion
69
Take Home Exercise
69
70
LAB # 8: BJT Transistor: Common Base Input and Output characteristics
| Electronics I Lab Manual
v
Objectives
70
Equipment Required
70
Lab Instructions
70
Lab Report Instructions
70
Familiarize yourself with Common Base BJT
70
Lab Tasks-
71
Sample Viva Questions
73
Critical Analysis / Conclusion
74
Take Home Exercise:
74
75
LAB # 9: BJT Transistor: Common Emitter Input and Output characteristics.
Objectives
75
Equipment Required
75
Lab Instructions
75
Lab Report Instructions
75
Familiarize yourself with Common Emitter BJT
75
Lab Tasks-
76
Sample Viva Questions
78
Critical Analysis / Conclusion
79
Take Home Exercise:
79
80
LAB # 10: Transistor Biasing: Fixed and Emitter Biasing of BJTs.
Objectives
80
Equipment Required
80
Lab Instructions
80
Lab Report Instructions
80
Part 1 -Familiarize yourself with Fixed and Emitter Biasing of BJTs.
80
Lab Tasks-
81
Part 2
83
Critical Analysis / Conclusion
86
Take Home Exercise:
86
LAB # 11: Transistor Biasing: Voltage Divider Bias of BJTs.
87
Objectives
87
Equipment Required
Familiarize yourself with voltage divider configuration:
87
Ошибка! Закладка не определена.
Lab Instructions
87
Lab Report Instructions
87
| Electronics I Lab Manual
vi
Lab Tasks-
87
Critical Analysis / Conclusion
90
Take Home Exercise:
90
91
LAB # 12: Transistor Biasing: Collector Feedback Bias of BJTs
Objectives
91
Equipment Required
91
Familiarize yourself with Collector Feedback Configuration.
91
Lab Instructions
91
Lab Report Instructions
91
Lab Tasks-
92
Critical Analysis / Conclusion
95
Take Home Exercise:
95
96
LAB # 13: JFET Characteristics
Objectives
96
Equipment Required
96
Lab Instructions
96
Lab Report Instructions
96
Familiarize yourself with JFET.
96
Lab Tasks-
97
Critical Analysis / Conclusion
100
Take Home Exercise:
100
101
LAB #14: Transistor Biasing: Fixed and Self Biasing of JFETs
Objectives
101
Equipment Required
101
Lab Instructions
101
Lab Report Instructions
101
Part 1 – Familiarize yourself with the biasing of FETs.
101
Part 2 – Design Methodologies
102
Determine VDD
102
Drain Resistor (RD)
102
Source Resistor (RS)
102
Lab Task-1:
104
Lab Task-2:
105
Sample Viva Questions
105
Critical Analysis / Conclusion
106
| Electronics I Lab Manual
vii
Take Home Exercise:
106
106
LAB #15: Voltage Divider Biasing of JFET
Objectives
107
Equipment Required
107
Lab Instructions
107
Lab Report Instructions
107
Part 1 – Familiarize Yourself with Voltage Divider Biased Configuration
107
Lab Task-1:
108
Sample Viva Questions
109
Critical Analysis / Conclusion
110
Take Home Exercise:
110
| Electronics I Lab Manual
viii
Experiment Relevant to Learning Outcome
Learning Outcome
Relevant Experiment
DC analysis of circuits containing semiconductor Every Practical demands the DC analysis of a
devices
particular semiconductor device.
I-V characteristics of diodes, BJTs and FETs Exp#2, Exp#8, Exp#13
both mathematically and graphically
Bias design for a given operating point
Exp#10, Exp#11, Exp#12, Exp#15.
The capability to design and construct circuits, Exp#14, Exp#4, Exp#3, Exp#8, Exp#13.
take measurements of circuit behavior and
performance, compare with predicted circuit
models and explain discrepancies.
| Electronics I Lab Manual
ix
LAB # 1: Introduction to Oscilloscope & Function Generator
Objectives
1-The goal of this part is to use the oscilloscope to calculate and measure the amplitude and duration (Time
period) of voltage signal.
2-Use the function generator to obtain, calculate and measure the amplitudes and durations (Time period) of
various voltage signals.
Equipment Required
Oscilloscope, Digital Multimeter, Function generator.
Lab Instructions
 This lab activity comprises of three parts: Pre-lab, Lab Exercises, and Post-Lab Viva session.
 The students should perform and demonstrate each lab task separately for step-wise evaluation (please
ensure that course instructor/lab engineer has signed each step after ascertaining its functional
verification)
 Only those tasks that completed during the allocated lab time will be credited to the students. Students
are however encouraged to practice on their own in spare time for enhancing their skills.
 The instructor will provide a brief description of the various sections, of the
oscilloscope and function generator.
Lab Report Instructions
All questions should be answered precisely to get maximum credit. Lab report must ensure following items:
 Lab objectives
 Results (graphs) duly commented and discussed
 Conclusion
Part – 1 Introduction of Oscilloscope
The oscilloscope is the most important instrument available to the practicing technician or engineer. It permits
the visual display of a voltage signal that can reveal a range of information regarding the operating
characteristics of a circuit or system that is not available with a standard multimeter. At first glance the
instrument may appear complex and difficult to master. Be assured, however, that once the function of each
section of the oscilloscope is explained and understood and the system is used throughout a set of
experiments, your expertise with this important tool will develop quite rapidly.In addition to the display of
a signal, it can also be used to measure the average value, rms value, frequency, and period of a sinusoidal or
nonsinu-soidal signal. The screen is divided into centimeter divisions in the vertical and horizontal directions.
The vertical sensitivity is provided (or set) in volts/div, while the horizontal scale is provided (or set) in f time
(s/div.). If a particular signal occupies 6 vertical divisions and the vertical sensitivity is 5mV/div. The
magnitude of the signal can be determined from the following equation:
Amplitude of signal voltage = voltage sensitivity (V/div.) x deflection (div.)
VS = (5mV/div)(6 div) = 30m
If one cycle of the same signal occupies 8 divisions on the horizontal scale with horizontal sensitivity of
5µs/div., the period and frequency of the signal can be determined using the following equations:
Period of signal voltage = horizontal sensitivity(s/div) x deflection (div)
T = (5µs/div)(8 div) = 40µs
f = 1/T = 1/40µs = 25kHz
Lab Tasks - Part 1
Lab Task 1:
Describe the function and use of each of the following controls or sections of the oscilloscope in your own
words.
a. Vertical and horizontal position controls
b. Vertical Sensitivity:
c. Horizontal sensitivity:
d. Vertical mode selection:
e. AC-GND-DC switch:
f.
Calibrate switches:
g. Trigger section:
h. External trigger input:
i.
Probe:
| Electronics I Lab Manual
11
Part – 2 Introduction of Function Generator
A function generator is usually a piece of electronic test equipment used to generate different types of
electrical waveforms over a wide range of frequencies. Some of the most common waveforms produced by
the function generator are the sine, square, triangular and sawtooth shapes. These waveforms can be either
repetitive or single-shot. Integrated circuits used to generate waveforms may also be described as function
generator ICs.
Function generators are used in the development, test and repair of electronic equipment. For example, they
may be used as a signal source to test amplifiers or to introduce an error signal into a control loop.
Setup
a. Turn on the oscilloscope and adjust the necessary controls to establish a clear, bright, horizontal line
across the center of the screen. Do not be afraid, to adjust the various controls to .see their
effects oil the display.
b. Connect the function generator to, one vertical channel of the oscilloscope and set the output of the
generator to a 1000 Hz sinusoidal waveform.
.
c. Set the vertical sensitivity of the scope to 1 V/div. and adjust the amplitude control of the function
generator to establish a 4 V peak to-peak (p-p) sinusoidal waveform on the screen.
Lab Tasks - Part 2
Lab Task 1:
Horizontal Sensitivity
a. Determine the period of the 1000 Hz sinusoidal waveform in milliseconds using the equation T = 1/f.
Show all work for each part of the experiment. Be neat.
T (calculated) =____________
b. Set the horizontal sensitivity of trio scope to 0.25 ms/div. Using the results of Part 2(d) predict and
calculate the number of horizontal divisions required to properly display one full cycle of the 1000
Hz
signal.
Number of divisions (calculated) = ___________
c. Use the oscilloscope measure the number of required divisions and insert below. How does the
result compare to the calculated number of divisions.
Number of divisions (measured) = ___________
d. Change the horizontal sensitivity of the oscilloscope to 0.5 ms/div.without touching any of the
controls of the function generator. Using the results of Part 2(d) how many horizontal divisions will
now be required to display one full cycle of the 1000 Hz signal?
Number of divisions (calculated) = ____________
e. Using the oscilloscope measure the number of required divisions and insert below. How does the
result compare to the calculated number of divisions.
Number of divisions (measured) = ___________
| Electronics I Lab Manual
12
f.
Change the horizontal sensitivity of the oscilloscope to I ms/div.without touching any of the controls
of the function generator. Using, the results of Part 2(d), how many horizontal divisions will now be
required to display one full cycle of the 1000 Hz signal?
Number of divisions (calculated) = ___________
g. Using the oscilloscope measure-the number of required divisions find insert below. How does the
result compare to the calculated number of divisions.
Number of divisions (measured) = _____________
h. What was the effect on the appearance of the sinusoidal waveform as the horizontal sensitivity was
changed from 0.2 ma/div. to 0.5 ms/div. and finally to 1 ms/div.
i.
Did the frequency of the signal on the screen change with each horizontal sensitivity? What
conclusion can you draw from the results regarding the effect of the chosen horizontal sensitivity on
the signal output of the function generator?
j.
Given a sinusoidal waveform, on the screen review the procedure to determine its frequency.
Develop a sequence of steps to calculate the frequency of a sinusoidal waveform appearing on the
screen of an oscilloscope.
Lab Task 2:
Vertical Sensitivity:
a. Do not touch the controls of the function generator but set the sensitivity of the scope to 0.2 ms/div.
and sot the vertical sensitivity to 2 V/div, Using this latter sensitivity, calculate the peak-to-peak value
of the sinusoidal waveform on the screen by first counting the number of vertical divisions between
peak values and multiplying by the vertical sensitivity.
Peak-to-peak value (calculated) = ____________
b. Change the vertical sensitivity of the oscilloscope to 0.5 V/div. and repeat Part 2(j)
Peak-to-peak value (calculated) = ____________
c. What was the effect on the appearance of the sinusoidal waveform as the vertical sensitivity was
changed from 2 V/div. to 0.6 V/div.?
d. Did the peak-to-peak voltage of the sinusoidal signal change with each vertical sensitivity? .What
conclusion can you draw from the results regarding the effect of changing the vertical sensitivity on
tile output signal of the function generator?
e. Can the peak or peak-to-peak output voltage of a function generator be set without the aid of an
auxiliary instrument such as an oscilloscope or DMM? Explain.
| Electronics I Lab Manual
13
Lab Task 3:
a. Make all the necessary adjustments to clearly display a 6000-Hz 6Vp-p sinusoidal signal on the
oscilloscope. Establish the zero volt line at the confer of the screen. Record the chosen sensitivities:
Vertical sensitivity = ______________
Horizontal sensitivity = _____________
b. Draw the waveform on Fig. 1.1 carefully noting the required number of horizontal and vertical
divisions. Add vertical and horizontal dimensions to the waveform using the chosen sensitivities listed
above.
GRAPH:
Fig 1.1
c. Calculate
the
period
of
the
waveform
Dumber of horizontal divisions for a full cycle as shown.
d. Repeat
1.2.
Part
3(a)
for
a
200-Hz
0.8
Vp-p
on
the
screen
.using
the
T (calculated) = _____________
sinusoidal waveform on
Fig.
Vertical sensitivity = _____________
Horizontal sensitivity = ___________
T (calculated) = __________________
| Electronics I Lab Manual
14
GRAPH:
Fig 1.2
e. Repeat Fart 3(a) for a 100-kHz 4 Vp-p square wave on Fig. 1.3. Note that a square wave is called for
Vertical sensitivity = _____________
Horizontal sensitivity = ___________
T (calculated) = __________________
| Electronics I Lab Manual
15
GRAPH:
Fig 1.3
| Electronics I Lab Manual
16
Sample Viva Questions
1. Can we measure the current with an Oscilloscope?
2. What is a trigger?
3. What is the internal resistance of a Function Generator
Critical Analysis / Conclusion
(By Student about Learning from the Lab)
Take Home Exercise
1.Familiarize yourself with Software Multisim Software.
Performance
(10 Marks)
Viva
(5 Marks )
Performance
/4
Results
/3
Critical Analysis
/1
Take Home Exercise
/2
Total/15
Comments
| Electronics I Lab Manual
17
LAB # 2: Nonlinear Behaviour of Diode
Objectives
1. The goal is to understand the testing of solid state conventional diode using analog and digital meter.
2. To understand the working of solid state conventional diode in Forward bias mode and in Reverse bias
mode.
Equipment Required
Diode, Variable Power supply, Multimeter, Resistor, Proto Board.
Lab Instructions
 This lab activity comprises of three parts: Pre-lab, Lab Exercises, and Post-Lab Viva session.
 The students should perform and demonstrate each lab task separately for step-wise evaluation (please
ensure that course instructor/lab engineer has signed each step after ascertaining its functional
verification)
 Only those tasks that completed during the allocated lab time will be credited to the students.
Students are however encouraged to practice on their own in spare time for enhancing their skills.
Lab Report Instructions
All questions should be answered precisely to get maximum credit. Lab report must ensure following items:
 Lab objectives
 Results (graphs/tables) duly commented and discussed
 Conclusion
Part 1 -Familiarize yourself with diode
Introduction:
Most modem· day digital multimeters can be used to determine the operating condition of a diode. , They
have a scale-denoted by a diode symbol that will indicate the condition of a diode in the forward and
reverse-bias regions. If connected to establish a ' forward bias condition the meter will display the
forward voltage across the "diode ' at ' a current- level typically in the neighbourhood of 2 rnA. If
connected to establish a reverse-bias condition an "OL" should appear on the display to support the
open-circuit approximation frequently applied to ' this region. -If the meter does not have the diodechecking capability the condition of the diode can also be checked by obtaining some measure of the
resistance level in the forward and reverse-bias region. Both techniques for checking diode will be introduced in - the first part of the experiment. The current-volt characteristics of a silicon or germanium
diode have the general shape shown in Fig. 2.1. Note the change in scale for both the vertical and horizontal
axes.
In the reverse-biased region the reverse saturation currents are fairly constant from 0 V to the Zener
potential. In the forward-bias region the current quite rapidly with increasing diode voltage. Note that the
curve is rising almost vertically at a forward-biased voltage of less than 1 V. 'The forward-biased diode
current will be limited solely by the network in which the diode is connected or by the maximum current
or the power rating of the diode.
Fig 2.1
Part 1 – Testing of diode using Analog & Digital Multimeter
Testing of diode with an analog Multimeter
To verify the Diode is good or bad measure a DC forward resistance and Dc reverse resistance. Good diode
show low forward resistance and very high reverse resistance. Ratio of reverse and forward resistance should
be 1000:1. If meter needle show deflection, the Red lead with terminal of diode show Cathode and vice versa.
Testing ordinary diode using a digital Multimeter
To check an ordinary silicon diode using a digital Multimeter, put the Multimeter selector switch in the diode
check mode. Connect the positive lead of Multimeter to the anode and negative lead to cathode of the diode. If
Multimeter displays a voltage between 0.6 to 0.7, we can assume that the diode is healthy. This is the test for
checking the forward conduction mode of diode. The displayed value is actually the potential barrier of the
silicon diode and its value ranges from 0.6 to 0.7 volts depending on the temperature.
Now connect the positive lead of Multimeter to the cathode and negative lead to the anode. If the Multimeter
shows an infinite reading (over range), we can assume that the diode is healthy. This is the test for checking
the reverse blocking mode of the diode.
| Electronics I Lab Manual
19
Part 2 –Working of Diode in Forward & Reverse Biasing
Lab Tasks-Part-2
Lab task 1: Forward Bias
+
VR
R
+
1k Ω
E
VD
Fig 2.2
Procedure:
Assemble the circuit on proto board of diode, resister and variable power supply in series as given below.
a. Construct the network in Fig 2.2 with the supply (E) set at 0 V. Record the measure value of resistor.
b. Increase the supply voltage until VR reads 0.1 V. Then measure VD and insert its voltage in Table 2.1.
Calculate the value of the corresponding current ID.
Table 2.1
VR
VD
ID=
VR/ R
0.1
VR
4
VD
ID= VR/
R
0.2
0.3
0.4
0.5
0.6
5
6
7
8
9
0.7
10
0.8
11
0.9
12
1
2
13
3
14
15
c. Sketch the waveform of the voltage across the diode and the current across the diode. This step will
develop the characteristic curve of solid state conventional diode.
| Electronics I Lab Manual
20
GRAPH:
Fig 2.3
Lab Task 2: Reverse Bias
R
E
+
VR
1M Ω
20 V
VD
+
Fig 2.4
| Electronics I Lab Manual
21
Assemble the circuit on proto board of diode, resister and variable power supply in series as mention above.
a. In Fig 2.4 reverse bias condition has been established. Since the reverse saturation current will be
relatively small, a large resistance of 1MΩ is required if the voltage across the resistance is to be of
measureable amplitude. Record the measureable value of R.
b.
c. Measure the voltage VR . Calculate the reverse saturation current from Is=VR(RM||R). The internal
resistance of DMM (RM) is included because of the large amplitude of resistance R. A typical value of 10
MΩ is taken.
RM =
VR ( measured) =
Is ( calculated) =
Sample Viva Questions
1. Is it possible to calculate the resistance of diode, if yes how? If no why?
2. Voltage drop across diode is 0.7 were does extra voltage goes?
3. Is it possible that a resistor get burned? If no how.
Critical Analysis / Conclusion
(By Student about Learning from the Lab)
Lab Experiment No. | 2
Take Home Exercise
Perform the following tasks
1. Perform an analysis of the network of Fig. 2.2 using Multisim Software
2. Perform an analysis of the network of Fig. 2.4 using Multisim Software
Performance
(10 Marks)
Viva
(5 Marks )
Performance
/4
Results
/3
Critical Analysis
/1
Take Home Exercise
/2
Total/15
Comments
| Electronics I Lab Manual
23
LAB # 3: Half wave Rectifier
Objectives
1. To understand one of the diode application as a half wave Rectifier.
Equipment Required
Variable Power Supply, Diode, Resistor, Oscilloscope, Multimeter, Function Generator.
Lab Instructions
 This lab activity comprises of three parts: Pre-lab, Lab Exercises, and Post-Lab Viva session.
 The students should perform and demonstrate each lab task separately for step-wise evaluation (please
ensure that course instructor/lab engineer has signed each step after ascertaining its functional
verification)
 Only those tasks that completed during the allocated lab time will be credited to the students.
Students are however encouraged to practice on their own in spare time for enhancing their skills.
Lab Report Instructions
All questions should be answered precisely to get maximum credit. Lab report must ensure following items:
 Lab objectives
 Results (graphs/tables) duly commented and discussed
 Conclusion
Basic Theory
When AC signal is applied to a forward biased diode. The diode conducts for half positive or negative cycle
and remains off for other half cycle. Diode converts the AC signal to Pulsating DC that can be observe on
oscilloscope screen. The Primary function of half wave rectification is to establish a DC level from a
sinusoidal input signal that has zero average (DC) level. DC voltage level in Half wave rectification is equal to
31.8% of the peak voltage Vm .
𝑉𝑑𝑐 = 0.318 𝑉𝑝𝑒𝑎𝑘
V
Vm
Vdc = 0.318Vpeak
0
t
T
Fig 3.1
Lab Tasks
Lab Task 1
a. Construct the circuit of Fig 3.2. Record the measured value of the resistance. Set the function generator
to a 1000Hz 8 Vp-p sinusoidal voltage using Oscilloscope.
Si
+
+
2.2KΩ
-
Vo
Fig.3.2
b. The sinusoidal input of Fig 3.2 has been plotted on the screen of Fig 3.3. Determine the chosen vertical
and horizontal sensitivities.
GRAPH:
Fig 3.3
| Electronics I Lab Manual
25
Vertical Sensitivity =
Horizontal Sensitivity =
c. Using the Oscilloscope with the AC-GND-DC coupling switch in the DC position, obtain the voltage Vo
and sketch the waveform on Fig 3.4. Before viewing Vo be sure that to set the Vo = 0 V.
GRAPH:
Fig 3.4
Lab task 2
a. Reverse the diode according to the circuit given below in Fig 3.4 and sketch the output waveform
obtained using the Oscilloscope on Fig 3.5.
| Electronics I Lab Manual
26
Si
+
+
2.2KΩ
-
Vo
Fig 3.5
b. The sinusoidal input of Fig 3.5 has been plotted on the screen of Fig 3.6. Determine the chosen
vertical and horizontal sensitivities.
GRAPH:
Fig 3.6
c. Using the Oscilloscope with the AC-GND-DC coupling switch in the DC position, obtain the
voltage Vo and sketch the waveform on Fig 3.4. Before viewing Vo be sure that to set the Vo = 0
V.
| Electronics I Lab Manual
27
GRAPH:
Fig 3.7
Lab Task 3
a. Construct the network of Fig 3.8.Record the measured value of the resistor R.
+
R
2.2k Ω
Vo
AC
Fig 3.8
| Electronics I Lab Manual
28
b. Determine the theoretical output voltage for Fig 3.8 and sketch the waveform on Fig 3.8 for one cycle
using the same sensitivities employed the part b. Indicate the maximum and minimum values on the
output waveform.
GRAPH:
Fig 3.9
c. Using the oscilloscope with the coupling switch in DC position obtain the voltage Vo and sketch the
wave form on Fig 3.10 using the same sensitivities as in Part b.
| Electronics I Lab Manual
29
GRAPH:
Fig 3.10
d. How do the result of Part f and Part g compare?
| Electronics I Lab Manual
30
Sample Viva Questions
1.
Diode rectified half cycle is not a replica of input half cycle why?
2.
What is the frequency of pulsating DC output Voltage?
3.
In half wave rectifier if a resistance is equal to load resistance is connected in parallel with diode then
output voltage would be?
Critical Analysis / Conclusion
(By Student about Learning from the Lab)
| Electronics I Lab Manual
31
Take Home Exercise
Perform the following tasks:
1. Perform an analysis of the network of Fig. 3.2 using Multisim Software
2. Perform an analysis of the network of Fig. 3.5 using Multisim Software
3. Perform an analysis of the network of Fig. 3.8 using Multisim Software
Performance
(10 Marks)
Viva
(5 Marks )
Performance
/4
Results
/3
Critical Analysis
/1
Take Home Exercise
/2
Total/15
Comments
| Electronics I Lab Manual
32
LAB # 4: Full wave Rectification
Objectives
To understand the diode application as a full wave rectification
Equipment Required
AC Power supply, Diodes, Load Resistor, Capacitor, Oscilloscope, Multimeter.
Lab Instructions
 This lab activity comprises of three parts: Pre-lab, Lab Exercises, and Post-Lab Viva session.
 The students should perform and demonstrate each lab task separately for step-wise evaluation (please
ensure that course instructor/lab engineer has signed each step after ascertaining its functional
verification)
 Only those tasks that completed during the allocated lab time will be credited to the students.
Students are however encouraged to practice on their own in spare time for enhancing their skills.
Lab Report Instructions
All questions should be answered precisely to get maximum credit. Lab report must ensure following items:
 Lab objectives
 Results (graphs) duly commented and discussed
 Conclusion
Basic Theory
When AC signal is applied to the rectifier circuit the diode D1and D4 are on for positive half cycle due to
forward bias to produce output as replica of input at the same time, the diodes D2 and D3 remains open due to
reverse bias.
When negative half cycle of input signal is applies to the rectifier circuit the diodes D 1 and D4 is off due to
reverse bias but diode D2 and D3 are on due to forward bias. Use capacitor across the load and see the effect of
it. Use voltage regulator LM7805 here for output voltage regulation.
𝑉𝑑𝑐 = 0.636 𝑉𝑝𝑒𝑎𝑘
V
Vm
Vdc = 0.636Vm
0
t
T
Fig 4.1
| Electronics I Lab Manual
33
Lab Tasks-Part
Lab Task 1: Threshold Voltage
Choose one of the four silicon diodes you received and determine the threshold voltage, V T using the diode
checking capability of DMM.
VT =
Secondary
Primary
120 Vrms
+
D2
D1
12.6 Vrms
-
V0
D4
D3
3.3kΩ
Fig 4.2
a. Measure the rms voltage at the transformer secondary using DMM set to AC. Record that rms value
below. Does it differ from the rated 12.6V
Vrms (measured) =
b. Calculate the peak value of secondary voltage using the measured (Vpeak = 1.414 Vrms)
Vpeak (calculated) =
c. Sketch the expected output waveform Vo on Fig 4.3. Choose a vertical and horizontal sensitivity
based on the amplitude of the secondary voltage.
| Electronics I Lab Manual
34
GRAPH:
Fig 4.3
Vertical Sensitivity =
Horizontal Sensitivity =
d. Using the Oscilloscope with coupling switch in the DC position obtain the waveform for Vo and
record on Fig 4.4. Use the same sensitivities employed in part c and be sure to preset V o = 0 V.
| Electronics I Lab Manual
35
GRAPH:
Fig 4.4
Vertical Sensitivity =
Horizontal Sensitivity =
e. How do the waveform of part c and part d compare?
Lab Task 2
a. Determine the DC level of full-wave rectified waveform of Fig.4.4.
VDC (calculated) =
b. Measure the DC level of the output waveform using the DMM and calculate the present difference
between the measured and calculated values.
VDC (measured) =
( % Difference ) =
Lab Task 3
a. Replace diode D3 and D4 in Fig 4.2 by 2.2kΩ resistors and forecast the appearance of the output
voltage Vo .Sketch the waveform of Vo on Fig 4.5 and label the magnitude of minimum and maximum
values.
GRAPH:
Fig 4.5
Vertical Sensitivity =
Horizontal Sensitivity =
b. Sketch the expected output waveform Vo using Oscilloscope in Fig 4.5. Choose a vertical and
horizontal sensitivity based on the amplitude of secondary voltage.
GRAPH:
Fig 4.6
Vertical Sensitivity =
Horizontal Sensitivity =
c. How do the waveform of part f and part g compare?
Lab Task 4
a.
Determine the DC level of full-wave rectified waveform of Fig.4.6.
VDC (calculated) =
b. Measure the DC level of the output waveform using the DMM and calculate the present difference
between the measured and calculated values.
VDC (measured) =
( % Difference ) =
Sample Viva Questions
1. What is the advantages of full wave bridge rectifier:
2. Write at least two drawbacks of this rectifier circuit.
3. What was the major effect to replace the two diodes with resistor?
Critical Analysis / Conclusion
(By Student about Learning from the Lab)
|EEE231| Electronics I Lab Manual
40
Take Home Exercise
Perform the following tasks:
1. Perform an analysis of the network of Fig. 4.2 using Multisim Software
2. Perform an analysis of the network of Lab Task 3 using Multisim Software
Performance
(10 Marks)
Viva
(5 Marks )
Performance
/4
Results
/3
Critical Analysis
/1
Take Home Exercise
/2
Total/15
Comments
|EEE231| Electronics I Lab Manual
41
LAB # 5: Diode Application: Current Voltage (I-V) Characteristics of Zener Diode
Objectives
1. Draw I-V graph of a Zener diode (Voltage regulator).
2. Application of Zener as a Regulator.
Equipment Required
Variable Power supply, Zener Diodes, Resistor, Oscilloscope, Function Generator, Connecting wires.
Lab Instructions
 This lab activity comprises of three parts: Pre-lab, Lab Exercises, and Post-Lab Viva session.
 The students should perform and demonstrate each lab task separately for step-wise evaluation (please
ensure that course instructor/lab engineer has signed each step after ascertaining its functional
verification)
 Only those tasks that completed during the allocated lab time will be credited to the students. Students
are however encouraged to practice on their own in spare time for enhancing their skills.
Lab Report Instructions
All questions should be answered precisely to get maximum credit. Lab report must ensure following items:
 Lab objectives
 Results (graphs/tables) duly commented and discussed
 Conclusion
Familiarize yourself with Zener Diode
A zener diode is a special kind of diode which allows current to flow in the forward direction in the same
manner as an ideal diode, but will also permit it to flow in the reverse direction when the voltage is above a
certain value known as the breakdown voltage, "zener knee voltage" or "zener voltage." The device was
named after Clarence Zener, who discovered this electrical property.
Zener diodes are heavily doped silicon diodes that, unlike normal diodes, exhibit an abrupt reverse breakdown at relatively low voltages. The Zener diode is designed to operate in reverse breakdown region. Zener
diode is used for voltage regulation purpose. Zener diodes are designed for specific reverse breakdown
voltage called Zener breakdown voltage (Vz). The value of Vz depends on amount of doping Zener diodes are
available in various families (according to their general characteristics , encapsulations and power ratings)
with reverse breakdown (Zener) voltages in the range 2.4V to 200 V.
|EEE231| Electronics I Lab Manual
42
Fig 5.0
Lab Tasks
Lab Task 1: To Plot I-V Characteristics
+
-
VR
R
+
100 Ω
E
10 V
Zener
Vz
Fig 5.1
a. Construct the circuit of Fig 5.1 and set the DC supply to 0 V and record the measured value of R.
b. Set the DC supply (E) to the value appearing in the table and measure both VZ and VR.
Table 5.1
E(V)
0
1
2
3
4
5
6
7
8
9
10
11
12
13
VZ (V)
VR (V)
IZ= VR/R
(mA)
|EEE231| Electronics I Lab Manual
43
14
15
c. This step will develop the characteristic curve of Zener diode. Since the Zener region is in third
quadrant to complete diode characteristic curve, place a minus sign in front of each level of IZ and VZ
for each data point. With this convention in mind plot the data of the table 5.1 on the graph. Choose
an appropriate scale for IZ and VZ as determined by the range of values for each parameter.
GRAPH:
Lab Task 2: Zener as a voltage regulator
a. Construct the network of Fig 5.2 . Record the measure value of each resistor.
+
VR
R
E
15V
-
+
+
1k Ω
10 V RL
Vz
1 kΩ
VL
Zener
-
-
Fig 5.2
|EEE231| Electronics I Lab Manual
44
b. Determine whether the Zener diode is in “on” state that is operating in Zener breakdown
region. For the diode in “on ” state calculate the expected value of VL, VR , IR , IZ , IL.
VL (calculated ) =
VR (calculated) =
IR (calculated) =
IL (calculated) =
IZ (calculated) =
c. Energize the network of Fig 5.2 and measure the value of VL,VR , IR , IZ , IL.
VL ( measured ) =
VR (measured) =
IR (measured) =
IL (measured) =
IZ (measured) =
d. Change RL to 1.2 kΩ and determine whether the Zener diode is in “on” state that is operating
in Zener breakdown region. For the diode in “on ” state calculate the expected value of VL, VR
, IR , IZ , IL.
VL (calculated ) =
VR (calculated) =
IR (calculated) =
IL (calculated) =
IZ (calculated) =
e. Energize the network of Fig 5.2 and measure the value of VL,VR , IR , IZ , IL.
VL ( measured ) =
VR (measured) =
IR (measured) =
f.
IL (measured) =
IZ (measured) =
Change RL to 1.5 kΩ and determine whether the Zener diode is in “on” state that is operating
in Zener breakdown region. For the diode in “on ” state calculate the expected value of VL, VR
, IR , IZ , IL.
VL (calculated ) =
VR (calculated) =
IR (calculated) =
IL (calculated) =
IZ (calculated) =
g. Energize the network of Fig 5.2 and measure the value of VL,VR , IR , IZ , IL.
VL ( measured ) =
|EEE231| Electronics I Lab Manual
45
VR (measured) =
IR (measured) =
IL (measured) =
IZ (measured) =
h. Change RL to 2.2 kΩ and determine whether the Zener diode is in “on” state that is operating
in Zener breakdown region. For the diode in “on ” state calculate the expected value of VL, VR
, IR , IZ , IL.
VL (calculated ) =
VR (calculated) =
IR (calculated) =
IL (calculated) =
IZ (calculated) =
i. Energize the network of Fig 5.2 and measure the value of VL,VR , IR , IZ , IL.
VL ( measured ) =
VR (measured) =
IR (measured) =
IL (measured) =
IZ (measured) =
j. Change RL to 3.3 kΩ and determine whether the Zener diode is in “on” state that is operating
in Zener breakdown region. For the diode in “on ” state calculate the expected value of VL, VR
, IR , IZ , IL.
VL (calculated ) =
VR (calculated) =
IR (calculated) =
IL (calculated) =
IZ (calculated) =
k. Energize the network of Fig 5.2 and measure the value of VL,VR , IR , IZ , IL.
VL ( measured ) =
VR (measured) =
IR (measured) =
IL (measured) =
IZ (measured) =
l.
Determine the minimum value of RL required to ensure that Zener is in “on” state.
RL ( calculated ) =
|EEE231| Electronics I Lab Manual
46
Sample Viva Questions
1. What is zener voltage ??
2. What is cause of reverse breakdown?
3. What is knee voltage?
Critical Analysis / Conclusion
(By Student about Learning from the Lab)
Take Home Exercise
Perform the following tasks
3. Perform an analysis of the network of Fig. 5.1 using Multisim Software
4. Perform an analysis of the network of Fig. 5.2 using Multisim Software
Performance
(10 Marks)
Viva
(5 Marks )
Performance
/4
Results
/3
Critical Analysis
/1
Take Home Exercise
/2
Total/15
Comments
|EEE231| Electronics I Lab Manual
47
LAB # 6: Diode Application: Clippers
Objectives
1. To study and analyze the operation of series clippers.
2. To study and analyze the operation of shunt clippers.
Equipment Required
Power supply, Diodes, Resistor, Oscilloscope, Function Generator, Connecting wires.
Lab Instructions
 This lab activity comprises of three parts: Pre-lab, Lab Exercises, and Post-Lab Viva session.
 The students should perform and demonstrate each lab task separately for step-wise evaluation (please
ensure that course instructor/lab engineer has signed each step after ascertaining its functional
verification)
 Only those tasks that completed during the allocated lab time will be credited to the students. Students
are however encouraged to practice on their own in spare time for enhancing their skills.
Lab Report Instructions
All questions should be answered precisely to get maximum credit. Lab report must ensure following items:
 Lab objectives
 Results (graphs/tables) duly commented and discussed
 Conclusion
Familiarize yourself with Clippers
In electronics, a clipper is a circuit design to prevent the output of a circuit from exceeding a predetermined
voltage level without distorting the remaining part of the applied waveform.
A clipping circuit consists of linear component resistor as well as nonlinear component diode.Clipper circuit
can remove certain portion of an arbitrary waveform near the positive or negative peaks. A sinusoidal
waveform can be converted to a trapezoidal wave using two level clippers as shown below.
Lab Tasks
Lab Task 1
Part 1: Threshold
Determine the threshold voltage for the silicon and germanium diodes using the diode-checking capability of
the DMM or a curve tracer. Round off to hundredths place when recording in the designated space below. If
the diode-checking capability or curve tracer is unavailable assume VT= 0.7 V for the silicon diode and 0.3 V
for the germanium diode.
VT(Si) = __________________
VT(Ge) = __________________
|EEE231| Electronics I Lab Manual
48
Part 2: Parallel Clippers
a) Construct the clipping network of figure 6.1. Record the measured resistance value of the cell. Note
that the input is an 8 VP-P square wave at a frequency of 1000Hz.
Vi
2.2KΩ
4V
+
+
t
Vo
0
Vp-p =8v
f = 1000Hz
T= 1 ms
Vi
1.5 V
-
-4V
Fig 6.1
b) Using the measured values of R, E, and VT calculate the voltage Vo when the applied square wave is
+4V. What is the level of VO? Show all the steps of your calculations to determine VO.
VO (calculated) = __________
c) Repeat part 2(b) when the applied square wave is -4V.
d) Using the results of parts 2(b) and 2(c) sketch the expected waveform for VO.
|EEE231| Electronics I Lab Manual
49
GRAPH:
Figure 6.2
e) Using the sensitivities provided in part 2(d) set the input square wave and record V O on Fig 6.3 using
the oscilloscope. Be sure to preset the VO = 0V line using the GND position of the coupling switch
(and the DC position to view the waveform)
|EEE231| Electronics I Lab Manual
50
GRAPH:
Figure 6.3
How does the waveform of Fig 6.3 compare with the predicted results of Fig 6.2?
f) Reverse the battery of Fig 6.1 and using the measured values of R, E and VT, calculate the level of VO
for the time interval when Vi= +4V
VO(calculated) = __________
g) Repeat part 2(f) for the time interval when Vi= -4V
VO(calculated) = __________
h) Using the results of parts 2(f) and 2(g) sketch the expected waveform for VO using the horizontal axis
of Fig 6.4 as the VO = 0V line. Use the same sensitivities provided in part 2(d).
|EEE231| Electronics I Lab Manual
51
GRAPH:
Fig 6.4
i)
Set the input square wave and record VO on fig 6.4 using the oscilloscope. Be sure to preset the VO =
0V line using the GND position of the coupling switch (and the DC position to view the waveform).
j)
How does the waveform of Fig 6.4 compare with the predicted results of Fig 6.5?
|EEE231| Electronics I Lab Manual
52
GRAPH:
Fig 6.5
Lab Task 3: Series Clippers
a) Construct the circuit of Fig 6.6. Record the measured resistance value and the DC level of the D cell.
The applied signal is 8VP-P square wave at a frequency of 1000Hz.
R
+
1M Ω
Vo
Fig 6.6
b) Using the measured values of R, E, and VT calculate the voltage VO for the time interval when Vi =
+4V.
|EEE231| Electronics I Lab Manual
53
VO(calculated) = __________
c) Using the measured values of R, E, and VT calculate the voltage VO for the time interval when Vi = 4V.
VO(calculated) = __________
d) Using the results of parts 6(b) and 6(c) sketch the expected waveform V O using the horizontal axis of
Fig 6.7 as the VO = 0V line. Insert your chosen vertical and horizontal sensitivities below:
GRAPH:
Fig 6.7
Vertical sensitivity = __________________
Horizontal sensitivity = __________________
e) Using the sensitivities chosen in part 6(d) set the input square wave and record V O on Fig 6.8 using
the oscilloscope. Be sure to preset the VO = 0V line using the GND position of the coupling switch
(and the DC position to view the waveform)
|EEE231| Electronics I Lab Manual
54
GRAPH:
Fig 6.8
f) How does the waveform of Fig 6.4 compare with the predicted results of Fig 6.5?
g) Reverse the battery of Fig 6.6 and using the measured values of R, E, and VT calculate the level of VO
for the time interval when Vi = +5V.
VO(calculated) = __________
h) Repeat part 6(f) for the time interval when Vi= -4V
i)
VO(calculated) = __________
Using the results of part 6(f) and 6(g) sketch the expected waveform for VO using the horizontal axis
of Fig 6.9 as the VO = 0V line. Use the following sensitivities:
Vertical: 2V/cm
Horizontal: 0.2ms/cm
|EEE231| Electronics I Lab Manual
55
GRAPH:
Fig 6.9
|EEE231| Electronics I Lab Manual
56
Sample Viva Questions
1. What is positive and negative clipping?
2. What is combinational clipper?
3. What is the drawback of series clippers?
…
Critical Analysis / Conclusion
(By Student about Learning from the Lab)
|EEE231| Electronics I Lab Manual
57
Take Home Exercise
Perform the following tasks
5. Perform an analysis of the network of Fig. 6.1 using Multisim Software
6. Perform an analysis of the network of Fig. 6.6 using Multisim Software
Performance
(10 Marks)
Viva
(5 Marks )
Performance
/4
Results
/3
Critical Analysis
/1
Take Home Exercise
/2
Total/15
Comments
|EEE231| Electronics I Lab Manual
58
LAB # 7: Diode Application: Clampers
Objectives
1. Describe the effects of negative clampers and positive clampers on an input waveform.
2. Describe the circuit operation of a clamper.
Equipment Required
Power supply, Diodes, Resistor, Capacitor, Oscilloscope, Function Generator, Connecting wires.
Lab Instructions
 This lab activity comprises of three parts: Pre-lab, Lab Exercises, and Post-Lab Viva session.
 The students should perform and demonstrate each lab task separately for step-wise evaluation (please
ensure that course instructor/lab engineer has signed each step after ascertaining its functional
verification)
 Only those tasks that completed during the allocated lab time will be credited to the students.
Students are however encouraged to practice on their own in spare time for enhancing their skills.
Lab Report Instructions
All questions should be answered precisely to get maximum credit. Lab report must ensure following items:
 Lab objectives
 Results (graphs/tables) duly commented and discussed
 Conclusion
Familiarize yourself with Clampers
Clampers are designed to “clamp” an alternating input signal to a specific level without altering the peak to
peak characteristics of the waveform. Clampers are easily distinguished form clippers in a way that they
include a capacitive element. A typical clamper will include a capacitor, diode, and resistor with some also
having a dc battery. The best approach to the analysis of the clampers is to use step by step approach. The first
step should be an examination of the network for that part of the input signal that forward biased the diode.
Choosing this part of the input signal will save time and some unnecessary confusion. With the diode forward
biased the voltage across the capacitor and across the output terminals can be determined. For the rest of the
analysis it is then assumed that the capacitor will hold on to the charge and voltage level established during
this interval of the input signal. The next part of the input signal can then be analyzed to determine the effect
of the stored voltage across the capacitor and the open-circuit state of the diode.
The analysis of a clamper can be quickly checked by simply noting whether the peak-to-peak voltage of the
output signal is the same as the peak-to-peak voltage of the applied signal. This check is not sufficient to be
sure the entire analysis was correct but it is a characteristic of clampers that must be satisfied.
|EEE231| Electronics I Lab Manual
59
Lab Tasks
Lab Task 1
Part 1: Determine the threshold voltage for the silicon diode using the diode checking capability of the
DMM or a curve tracer. If either approach is unavailable assume V T = 0.7V.
Part 2: Clampers (R, C, Diode Combination)
a) Construct the network of Fig 7.1 and record the measured value of R.
Vi
Vc -
+
+
+
4V
Vi
R
100 kΩ
Vo -
1µF
-
t
-4V
Fig 7.1
b) Using the value VT from part 1 calculate VC and VO for the interval of Vi that causes the diode to be in
“on” state
VC(calculated) = __________
VO(calculated) = __________
c) Using the results of part 2(b) calculate the level of VO after Vi switches to the other level and turns the
diode “off”.
d) Using the results of part 2(b) and 2(c) sketch the expected waveform for VO in Fig 7.2 for one cycle of
Vi. Use the horizontal centre axis as the Vo = 0V line. Record the chosen vertical and horizontal
sensitivities below:
|EEE231| Electronics I Lab Manual
60
GRAPH:
Fig 7.2
Vertical Sensitivity = ______________________
Horizontal Sensitivity = ______________________
e) Using the sensitivities of part 2(b) use the oscilloscope to view the output waveform VO. Be sure to
preset the VO = 0V line on the screen using the GND position of the coupling switch (and the DC
position to view the waveform). Record the resulting waveform on Fig 7.3.
f) How does the waveform of Fig 7.3 compare with the expected waveform of Fig 7.2 ?
|EEE231| Electronics I Lab Manual
61
GRAPH:
Fig 7.3
g) Reverse the diode of Fig 7.1, determine the levels of VC and VO for the interval of Vi that causes the
diode to be in “on” state.
VC(calculated) = __________
VO(calculated) = __________
h) Using the results of part 2(f) calculate the level of VO after Vi switches to the other level and turns the
diode “off”.
i)
VO(calculated) = __________
Using the results of part 2(f) and 2(g) sketch the expected waveform for VO in Fig 7.4 for one cycle of
Vi. Use the horizontal centre axis as the Vo = 0V line. Record the chosen vertical and horizontal
sensitivities below:
|EEE231| Electronics I Lab Manual
62
GRAPH:
Fig 7.4
j)
Vertical Sensitivity = ______________________
Horizontal Sensitivity = ______________________
Using the sensitivities of part 2(h) use the oscilloscope to view the output waveform VO. Be sure to
preset the VO = 0V line on the screen using the GND position of the coupling switch (and the DC
position to view the waveform). Record the resulting waveform on Fig 7.5.
|EEE231| Electronics I Lab Manual
63
GRAPH:
Fig 7.5
k) How does the with the expected waveform of Fig 7.4 ?waveform of Fig 7.5 compare
Lab Task 3: Clampers (R, C, Diode Combination with a DC battery)
a) Construct the network of Fig 7.6 and record the measured value of R and E.
Vi
+
Vc +
E
100 kΩ
1.5
-
t
R
Vo -
Vi
+
4V
-4V
Fig 7.6
b) Using the value VT from part 1 calculate VC and VO for the interval of Vi that causes the diode to be in
“on” state
VC(calculated) = __________
VO(calculated) = __________
|EEE231| Electronics I Lab Manual
64
c) Using the results of part 3(b) calculate the level of VO after Vi switches to the other level and turns the
diode “off”.
d) Using the results of part 7(b) and 7(c) sketch the expected waveform for VO in Fig 7.2 for one cycle of
Vi. Use the horizontal centre axis as the Vo = 0V line. Record the chosen vertical and horizontal
sensitivities below:
GRAPH:
Fig 7.7
Vertical Sensitivity = ______________________
Horizontal Sensitivity = ______________________
e) Using the sensitivities of part 2(b) use the oscilloscope to view the output waveform VO. Be sure to
preset the VO = 0V line on the screen using the GND position of the coupling switch (and the DC
position to view the waveform). Record the resulting waveform on Fig 7.3.
How does the waveform of Fig 7.8 compare with the expected waveform of Fig 7.7 ?
|EEE231| Electronics I Lab Manual
65
GRAPH:
Fig 7.8
f) Reverse the diode of Fig 7.6, determine the levels of VC and VO for the interval of Vi that causes the
diode to be in “on” state.
VC(calculated) = __________
VO(calculated) = __________
g) Using the results of part 3(f) calculate the level of VO after Vi switches to the other level and turns the
diode “off”.
VO(calculated) = __________
h) Using the results of part 3(f) and 3(g) sketch the expected waveform for V O in Fig 7.2 for one cycle of
Vi. Use the horizontal centre axis as the Vo = 0V line. Record the chosen vertical and horizontal
sensitivities below:
|EEE231| Electronics I Lab Manual
66
GRAPH:
Fig 7.9
i)
Vertical Sensitivity = ______________________
Horizontal Sensitivity = ______________________
Using the sensitivities of part 3(h) use the oscilloscope to view the output waveform VO. Be sure to
preset the VO = 0V line on the screen using the GND position of the coupling switch (and the DC
position to view the waveform). Record the resulting waveform on Fig 7.10.
|EEE231| Electronics I Lab Manual
67
GRAPH:
Fig 7.10
j)
How does the waveform of Fig 7.10 compare with the expected waveform of Fig 7.9
Sample Viva Questions
1
What is the use of clampers?
2
Does a "clamper" circuit change the shape of a voltage waveform, like a "clipper" circuit does?
Explain why or why not?
3
Clamper circuits are sometimes referred to as DC restorer circuits. Explain why. ?
|EEE231| Electronics I Lab Manual
68
Critical Analysis / Conclusion
(By Student about Learning from the Lab)
Take Home Exercise
Perform the following tasks
1. Perform an analysis of the network of Fig. 7.1 using Multisim Software
2. Perform an analysis of the network of Fig. 7.6 using Multisim Software
Performance
(10 Marks)
Viva
(5 Marks )
Performance
/4
Results
/3
Critical Analysis
/1
Take Home Exercise
/2
Total/15
Comments
|EEE231| Electronics I Lab Manual
69
LAB # 8: BJT Transistor: Common Base Input and Output characteristics
Objectives
1. To learn how the input voltage, output Voltage and input current are related in CB configuration
2. To learn how the output Current (IC), varies with collector- to- Base Voltage (VCB) for fix value
of input emitter current (IE).
Equipment Required
Two variable DC Power supplies; Bipolar Junction Transistor (NPN), Ammeter, Volt meter, Resistors,
Connecting wires.
Lab Instructions
 This lab activity comprises of three parts: Pre-lab, Lab Exercises, and Post-Lab Viva session.
 The students should perform and demonstrate each lab task separately for step-wise evaluation (please
ensure that course instructor/lab engineer has signed each step after ascertaining its functional
verification)
 Only those tasks that completed during the allocated lab time will be credited to the students. Students
are however encouraged to practice on their own in spare time for enhancing their skills.
Lab Report Instructions
All questions should be answered precisely to get maximum credit. Lab report must ensure following items:
 Lab objectives
 Results (graphs/tables) duly commented and discussed
 Conclusion
Familiarize yourself with Common Base BJT
In common base, the base emitter is forward biased and the base collector junction is reverse biased. For input
characteristics the emitter Current (IE) and base emitter Voltage (VBE) are variables and VCB is a parameter.
Graphical relation between IE and VBE are similar of diode except VCB, will affect on IE and VBE. More the
value of VCB more will be the emitter current (IE) because more the value of collector to base Voltage, more
will be the minority carriers across the junction for fix value of base emitter Voltage. The emitter current
varies with variation of base to emitter voltage (VBE) for fix value of collector to Base Voltage (VCB).
For output characteristics the emitter Current (IE) is taken as a parameter, base Collector voltage (VCB) and
output Collector current are variables. For fix value of Emitter current the Collector current increases the ratio
of IC/IE must also be increases by increase of VCB .The ratio of IC/IE is called α here α is not fix its values lies
between 0-1 When VCB become negative the transistor is saturated because both junction are forwarded
biased.
|EEE231| Electronics I Lab Manual
70
Lab Tasks
Lab Task 1:Connect the circuit as shown in the circuit diagram of Fig 8.1. Measure the emitter current for
different value of base to emitter voltages for fix value of VCB.
Fig 8.1: Common Base Configuration.
For VCB = 0V
S. No
For VCB =5V
VBE
IE
S. No
VBE
IE
For VCB = 10V
S. No
VBE
IE
Lab Task 2: Plot the graph between VBE (X-axis) and emitter current IE (Y-axis). The families of curves
show three variables. Note that each curve resembles forward biased diode Characteristics as expected but in
this case the given VBE, IE increases with increasing VCB.
|EEE231| Electronics I Lab Manual
71
For IE = 1mA
S. No
For, IE =2mA
VBE
IE
For IE = 3mA
S. No
S. No
VBE
IE
VBE
IE
For IE =4mA
VBE
IE
S. No
Lab Task 3: Plot the graph between VCB (X-axes) and collector current IC (Y-axes). The family of curves
shows three variables. Note that each curve resembles forward biased diode Characteristics as expected but in
this case the given VBE, IE increases with increasing VCB.
|EEE231| Electronics I Lab Manual
72
GRAPH:
Fig 8.1
Sample Viva Questions
1. What is the use of common Base configuration?
2. What is drawback of common base configuration?
3. What’s phase angle between inputs Voltage and output Voltage in CB?
4. Explain the reason of increase of IE due to increase of VCB.
5. Define the amplification factor of CB configuration.
|EEE231| Electronics I Lab Manual
73
Critical Analysis / Conclusion
(By Student about Learning from the Lab)
Take Home Exercise
1-Verify the characteristics by the Data Sheet of the transistor used in this experiment.
Performance
(10 Marks)
Viva
(5 Marks )
Performance
/4
Results
/3
Critical Analysis
/1
Take Home Exercise
/2
Total/15
Comments
|EEE231| Electronics I Lab Manual
74
LAB # 9: BJT Transistor: Common Emitter Input and Output characteristics
Objectives
1. To learn how the input voltage, output voltage and input current are related in CE configuration.
2. To learn how the output voltage, output current and input current (IB) are related in CE configuration.
Equipment Required
Two variable DC Power supplies, Bipolar Junction Transistor (NPN), Ammeter, Volt meter, Resistors,
Connecting wires.
Lab Instructions
 This lab activity comprises of three parts: Pre-lab, Lab Exercises, and Post-Lab Viva session.
 The students should perform and demonstrate each lab task separately for step-wise evaluation (please
ensure that course instructor/lab engineer has signed each step after ascertaining its functional
verification)
 Only those tasks that completed during the allocated lab time will be credited to the students. Students
are however encouraged to practice on their own in spare time for enhancing their skills.
Lab Report Instructions
All questions should be answered precisely to get maximum credit. Lab report must ensure following items:
 Lab objectives
 Results (graphs/tables) duly commented and discussed
 Conclusion
Familiarize yourself with Common Emitter BJT
In common emitter the base emitter is forward biased and the base Collector junction should be reverse
biased. For input characteristics the base current (IB) and base emitter voltage (VBE) are variables and VCE is a
parameter. More the value of VCE less will be the Emitter current (EE) because more is the value of Collector
to Emitter voltage less will be the minority carriers cross the junction for fix value of collector emitter voltage.
The base current varies with variation of base to emitter voltage (VBE) for fix value of collector to emitter
voltage (VCE).
In common Emitter the Base Emitter is forward biased and the base collector junction should be reverse
biased. For output characteristic curves the collector current (IC) and collector emitter voltage (VCE) are
variables and IB is a parameter. The Collector current (IC) is in milli-ampere range and VCE are in volt range.
The parameter IB is in µA range. The collector current varies with variation of Base to Emitter voltage (V BE)
for fix value of base current (IB). In Common Emitter case the relation between IC and VCE are not similar as
in common base output Characteristics. The curves of IB are not horizontal as those obtained for IE in common
base configuration indicating that the Collector to Emitter voltage will influence the magnitude of the
Collector current.
|EEE231| Electronics I Lab Manual
75
Lab Tasks
Lab Task 1: Connect the circuit as shown in the circuit diagram (Fig. 9.1). Measure the base
current for different value of base to emitter voltages for fix value of VCE.
For VCE = 1V
S. No
For VCE =10V
VBE
IB
S. No
VBE
IB
For, VCE = 20V
S. No
VBE
IB
Lab Task 2: Plot the graph between VBE (X-axis) and Emitter current IB (Y-axis). The family of curves
shows three variables. Note that each curve resembles forward biased diode characteristics as expected but in
this case the given VBE, IB decreases with increasing VCE.
|EEE231| Electronics I Lab Manual
76
For IB = 0µA
S. No
For, IB =10µA
VCE
IC
S. No
VCE
IC
For IB = 20µA
S. No
VCE
IC
Lab Task 3: Plot the graph between VCE (X-axis) and Emitter current IC (Y-axis). The family of curves
shows three variables.
|EEE231| Electronics I Lab Manual
77
GRAPH:
Fig 9.1
Sample Viva Questions
1. What is the use of common Base configuration?
2. What is drawback of common base configuration?
3. What’s phase angle between inputs Voltage and output Voltage in CB?
4. Explain the reason of increase of IE due to increase of VCB.
5. Define the amplification factor of CB configuration.
|EEE231| Electronics I Lab Manual
78
Critical Analysis / Conclusion
(By Student about Learning from the Lab)
Take Home Exercise
1-Verify the characteristics by the Data Sheet of the BJT transistor used in this experiment.
Performance
(10 Marks)
Viva
(5 Marks )
Performance
/4
Results
/3
Critical Analysis
/1
Take Home Exercise
/2
Total/15
Comments
|EEE231| Electronics I Lab Manual
79
LAB # 10: Transistor Biasing: Fixed and Emitter Biasing of BJTs
Objectives
This Lab experiment has been designed to learn the quiescent operating conditions of the fixed bias BJT
configurations.
Equipment Required
DC Power supplies, Bipolar Junction Transistor (NPN) 2N3904, 2N4401, Multimeter, Resistors, Conncting
wires.
Lab Instructions
 This lab activity comprises of three parts: Pre-lab, Lab Exercises, and Post-Lab Viva session.
 The students should perform and demonstrate each lab task separately for step-wise evaluation (please
ensure that course instructor/lab engineer has signed each step after ascertaining its functional
verification)
 Only those tasks that completed during the allocated lab time will be credited to the students. Students
are however encouraged to practice on their own in spare time for enhancing their skills.
Lab Report Instructions
All questions should be answered precisely to get maximum credit. Lab report must ensure following items:
 Lab objectives
 Results (graphs/tables) duly commented and discussed
 Conclusion
Part 1 -Familiarize yourself with Fixed and Emitter Biasing of BJTs
Bipolar transistors operate in three modes: cutoff, saturation, and linear. In each of these modes, the physical
characteristics of the transistor and the external circuit connected to it uniquely specify the operating point ofthe transistor. In the cutoff mode, there is only a small amount of reverse current from emitter to collector,
making the device akin to an open switch. In the saturation mode, there is a maximum current flow from
collector to emitter. The amount of that current is limited primarily by the external network connected to the
transistor; its operation is analogous to that of a closed switch. Both of these operating modes are used digital
circuits. For amplification with a minimum of distortion, the linear region of the transistor characteristics is
employed. A DC voltage is applied to the transistor, forward-biasing the base-emitter junction and reversebiasing the base-collector junction, typically establishing a quiescent point near or at the
center of the linear region. In the first part of this experiment, we will investigate the fixedbias network.
|EEE231| Electronics I Lab Manual
80
Lab Tasks
Lab Task 1: Construct the network of Fig. 10.1 using the 2N3904 transistor. Insert the measured resistance
values.
Fig 10.1
a) Measure the voltage VBE and VRC
VBE (measured) = _______________
VRC (measured) = _______________
b) Using the measured resistor values calculate the resulting base current using the equation:
IB = VRB/ RB = (VCC - VBE)/ RB
and the collector current using the equation
IC = VRC/ RC
The voltage VRB was not measured directly for determining IB because of the loading effects of the
meter across the high resistance RB
Insert the resulting values of IB. and Ic in Table 10.1.
c) Using the results of step 1(c). calculate the value of β and record in Table 10.1, This value of beta will
be used for the 2N3904 transistor throughout this experiment.
Lab Task 2:
a) Using the β determined in Part 1, calculate the currents IB and Ic for the network of Fig. 10.1 using
the measured resistor values, the supply voltage, and the above measured value for V BE, That is,
determine the theoretical values of IB and IC using the network parameters and the value of beta.
IB(calculated) = ____________
IC(calculated) = ____________
b) How do the calculated levels of IB and IC compare to those determined from measured voltage
levels in part 1(c)?
|EEE231| Electronics I Lab Manual
81
c) Using the results of step 2(a) calculate the levels of VB, VC, VE, and VCE.
VB(calculated) = _____________
VC(calculated) = _____________
VE(calculated) = _____________
VCE(calculated) = _____________
d) Energize the network of fig 10.1 and measure VB, VC, VE, and VCE.
VB(measured) = _____________
VC(measured) = _____________
VE(measured) = _____________
VCE(measured) = _____________
e) How do the measured values compare to the calculated levels of step 2(b)?
Record the measured values of VCE in table 10.1
f) The next part of the experiment will essentially be a repeat of a number of the steps above for a
transistor with a higher beta. Our goal is to show the effects of different beta levels on the
resulting levels of the important quantities of the network. First the beta level for the other
transistor, specifically a 2N4401 transistor, must be determined. Simply remove the 2N3904
transistor from Fig. 10.1 and insert the 2N4401 transistor, leaving all the resistors and voltage VCC
as to Part 1. Then-measure the voltages VBE and VRC and, using the same equations with measured
resistor values, calculate the levels of IB and IC.
VBE(measured) = _____________
VRC(measured) = _____________
IB(measured) = _____________
IC(measured) = _____________
β (calculated) = ______________
|EEE231| Electronics I Lab Manual
82
g) Record the levels of IB, IC, and beta in Table 10.1. In addition measure the voltage VCE and insert
in Table 10.1.
Table 10.1
Transistor
type
2N3904
2N4401
VCE
IC
IB
β
h) Using this following equations calculate the magnitude (ignore the sign) of the percent change in
each quantity due to a change in transistors. Ideally, the important voltage and current levels
should not change with a change in transistors. The fixed-bins configuration, however, has a high
sensitivity to changes in' beta as will be reflected by the results. Place the results of your
calculations in Table 10.2.
%ΔVCE = [VCE (4401) – VCE(3904)]/ VCE (3904) x 100%
%ΔIC = [IC (4401) – IC (3904)]/ IC (3904) x 100%
% ΔIB = [IB (4401) – IB (3904)]/ IB (3904) x 100%
%Δβ = [β(4401) – β(3904)]/ β(3904) x 100%
Table 10.2
%Δβ
Percentage changes in β,IC. VCE,and IB
% ΔIB
%ΔIC
%ΔVCE
Part 2: In this part, the emitter bias circuit is investigated.
The emitter bias configuration in Fig. 10.2 can be constructed using a single or a dual power supply. Both
configurations offer increased stability over the fixed bias of previous Experiment. In particular, if the beta
times of the transistor times the resistance of the emitter resistor is large compared to the resistance of the
base resistor, the emitter current becomes essentially independent of the beta of the transistor. Thus, if we
exchange transistors in a properly designed emitter-bias circuit, the changes in𝐼𝑐 and𝑉𝐶𝐸 should be small.
In the first part of this experiment, we will investigate the fixed-bias network.
|EEE231| Electronics I Lab Manual
83
Lab Task 2: Determining Beta
a) Construct the network of Fig. 10.2 using 2N39Q4 transistor,
Insert the measured resistor values:
Fig 10.2
b) Measure the voltages V B andV c .
,
.
V B (measured)______________________
V c (measured)____________________
c) Using the results of Part (b) and the measured resistor values calculate the resulting base currents IB
and IC using the following equations:
I B =V cc -V B /R B
And I C =V RC /R C
Record in table 10.2
I B (measured)=_____________________
I C (measured)=_____________________
d) Using the results of step 1(c) calculate the value of β and record in Table 12.2. This value of beta will
be used for the 2N3904 transistor throughout the experiment.
β=_____________________
Lab Task 3:
a) Using the β determined in Part I, calculate the values of I B and I C for the network of Fig. 10.2 using
measured resistor values and the supply voltage VCC. In other words, perform a theoretical analysis
of the network. Insert the results in Table 10.3.
I B (measured)=---------------------I C (measured)=---------------------b) How do the calculated values compare with the measured values of |Part 2 of lab Task 1(c)?
|EEE231| Electronics I Lab Manual
84
c) Using the β determined in Lab task 2 calculate the levels of VB, VC, VE, VBE and VCE and insert in
Table 10.1.
Transistor
type
2N3904
2N4401
VCE
Table 10.3(Calculated Values)
VB
VC
VE
VBE
VCE
IB
VCE
IB
Table 10.4 (Measured values)
Transistor
type
2N3904
2N4401
VCE
VB
VC
VE
VBE
d) Calculated from the measured values
2N3904 β=_____________________
2N4401 β=_____________________
e) Replace the 2N3904 transistor of Fig. 10.2 with the 2N4401 transistor and measure the resulting
voltages VB andVRC, Then calculate the currents IB and IC using measured resistance values. Finally
calculate
the
value
of
β
for
this
transistor.
This
will
be
the
value of beta used for the 2N4401 transistor throughout this experiment. Record the levels of I B, IC
and β in Table 10.3.
V B (measured)=______________
V RC (measured)=______________
f) Using the beta determined in step 1(c), perform a theoretical analysis of Fig. 10.2 with the 2N4401
transistor. That is, calculate the levels of IB, IC, VB, VC, VE and VCE insert in Table 10.4.
Sample Viva Questions
1. Which biasing technique is more stable of the two?
2. What would be the effect on emitter biased circuit if we add VEE (battery at the emitter terminal)?
|EEE231| Electronics I Lab Manual
85
Critical Analysis / Conclusion
(By Student about Learning from the Lab)
Take Home Exercise
1-Implement the above mentioned circuit on Proteus to verify the design.
2- Discuss the difference between the stability of the two biasing techniques. Which particular circuit is more
beta dependant?
Performance
(10 Marks)
Viva
(5 Marks )
Performance
/4
Results
/3
Critical Analysis
/1
Take Home Exercise
/2
Total/15
Comments
|EEE231| Electronics I Lab Manual
86
LAB # 11: Transistor Biasing: Voltage Divider Bias of BJTs
Objectives
To determine the quiescent operating conditions of the voltage divider bias BJT configurations.
Equipment Required
DC Power supplies, Bipolar Junction Transistor (NPN). 2N3904, 2N4401, Multimeter, Resistors, Connecting
wires.
Lab Instructions
 This lab activity comprises of three parts: Pre-lab, Lab Exercises, and Post-Lab Viva session.
 The students should perform and demonstrate each lab task separately for step-wise evaluation (please
ensure that course instructor/lab engineer has signed each step after ascertaining its functional
verification)
 Only those tasks that completed during the allocated lab time will be credited to the students. Students
are however encouraged to practice on their own in spare time for enhancing their skills.
Lab Report Instructions
All questions should be answered precisely to get maximum credit. Lab report must ensure following items:
 Lab objectives
 Results (graphs/tables) duly commented and discussed
 Conclusion
Lab Tasks
Lab Task 1:
Determining β:Construct the network of Fig. 11.1 using the 2N3904 transistor. Insert the measured
resistance values.
Fig 11.1
a) Measure the voltage VBE and VRC
VBE (measured) = _______________
|EEE231| Electronics I Lab Manual
87
VRC (measured) = _______________
b) Using the measured resistor values calculate the resulting base current using the equation:
IB = VRB/ RB = (VCC - VBE)/ RB
and the collector current using the equation
IC = VRC/ RC
The voltage VRB was not measured directly for determining IB because of the loading effects of the
meter across the high resistance RB
Insert the resulting values of IB. and Ic in Table 11.1.
c) Using the results of step 1(b) , calculate the value of β and record in Table 11.1, This value of beta
will be used for the 2N3904 transistor throughout this experiment.
Lab Task 2: Voltage-Divider Configuration .
a) Construct the network of Fig. 11.2 using the 2N3904 transistor.Insert the measured value of each
resistor.
Fig11.2
R1 (measured) = ____________
R2 (measured) = ____________
RC (measured) = ____________
RE (measured) = ____________
b) Using the beta determined in Part 1 for the 2N3904 transistor, calculate the theoretical levels of
VB, VE, VC,IE, IC, and IB, for the network of Fig. 9.2. Insert the results. In Table 11.3.
|EEE231| Electronics I Lab Manual
88
2N3904
Calculated
Measured
VB
Table 11.3
VC
VCE
VE
IC
IB
IE
c) Energize the network of Fig. 11.2 and measure VB, VE, VC and VCE. Record their values in Table
11.3. In addition, measure the voltages VR1 and VR2. Try to measure the quantities to the hundredth
or thousandth place, Calculate the currents IE and IC and the currents I1 and I2 (using I1 = VR1, /R1
and I2 = VR2, /R2) from the voltage readings and measured resistor values. Using the results for I1
and I2, calculate the current IB using Kirchhoff’s current law. Insert the calculated current levels for
IE, IC, and IB in Table 11.3.
How do the calculated and measured Values of Table 11.3 compare?Are there any significant
differences that need to be explained?
d) Insert the measured value of VCE and calculated values of Ic and IB from step 3(c) in Table 11.4
along with the magnitude of beta from Part 1.
e) Replace the 2N3904 transistor of Fig 11.2 with the 2N4401 transistor. Then measure the voltages
VCE, VRC, VR1, and VR2. Again, be sure to read VR1 and VR2 to the hundredth or thousandth place
to ensure an accurate determination of IB. Then calculate IC, I1,I2, and determine IB. Complete table
9.4 with the levels of VCE, IC,IB, and beta for this transistor
Table 11.4
Transistor type
2N3904
2N4401
VCE
IC
IB
β
f) Calculate the percent change in β, IC, VCE and IB from the data of table 11.4. Use the formulas
appearing in step 2(e), Eq 9.1, and record your results in table 11.5
Percentage changes in β,IC. VCE and IB
Table 11.5
Transistor
type
2N3904
2N4401
VCE
IC
IB
β
Sample Viva Questions
1. Voltage-Divider biased circuit is a stable circuit. Comment?
2. What would be the effect on the overall circuit if we remove RE from Voltage-Divider biased
technique.
|EEE231| Electronics I Lab Manual
89
Critical Analysis / Conclusion
(By Student about Learning from the Lab)
Take Home Exercise:
1-Implement the above mentioned circuit on Proteus to verify the design.
Performance
(10 Marks)
Viva
(5 Marks )
Performance
/4
Results
/3
Critical Analysis
/1
Take Home Exercise
/2
Total/15
Comments
|EEE231| Electronics I Lab Manual
90
LAB # 12: Transistor Biasing: Collector Feedback Bias of BJTs
Objectives
To determine the quiescent operating conditions of the collector feedback bias BJT configurations.
Equipment Required
Digital multimeter, Resistors, Transistors (2N3904, 2N4401 or equivalents), DC power supply.
Familiarize yourself with Collector Feedback Configuration.
This experiment is an extension of Experiment 11. Two, additional arrangements will be investigated in this
experiment emitter bias and collector feedback circuit.If we compare the collector feedback bias circuit
configuration in Fig. 12.21 with the fixed bias of Experiment 10 it is noted that for the former, the base
resistor is connected to the collector terminal of tile transistor and not to the fixed supply voltage Vcc. Thus
the voltage across the base resistance of the collector feedback configuration is a function of the collector
voltage and the collector current. In particular, this circuit demonstrates the principle of negative feedback,
in which a tendency of an output variable to increase or decrease will result in n reduction or increase in the
input variable respectively. For instance, any tendency on the part of IC to increase will reduce the level
ofVC which in turn will result a lower level of IB offsetting the trend of IC. The result is a design less
sensitive to variations in its parameters.
Lab Instructions
 This lab activity comprises of three parts: Pre-lab, Lab Exercises, and Post-Lab Viva session.
 The students should perform and demonstrate each lab task separately for step-wise evaluation (please
ensure that course instructor/lab engineer has signed each step after ascertaining its functional
verification)
 Only those tasks that completed during the allocated lab time will be credited to the students. Students
are however encouraged to practice on their own in spare time for enhancing their skills.
Lab Report Instructions
All questions should be answered precisely to get maximum credit. Lab report must ensure following items:
 Lab objectives
 Results (graphs/tables) duly commented and discussed
 Conclusion
|EEE231| Electronics I Lab Manual
91
Lab Tasks
Lab Task 1:Construct the network of Fig. 12.1 using 2N39Q4 transistor,
Insert the measured resistor values:
Fig 12.1
b. Measure the voltages V B andV c .
,
.
V B (measured)______________________
V c (measured)____________________
c. Using the results of Part (b) and the measured resistor values calculate the resulting base currents IB andIC
using the following equations:
I B =V cc -V B /R B And I C =V RC /R C
Record in table 12.1
I B (measured)=_____________________
I C (measured)=_____________________
d. Using the results of step 1(c) calculate the value of β and record in Table 12.1. This value of beta will be
used for the 2N3904 transistor throughout the experiment. Record in table 12.1
β=_____________________
|EEE231| Electronics I Lab Manual
92
Lab Task 2: Collector Feedback Configuration (RE=0 Ω)
Fig 12.2
a) Construct the network of Fig 12.2 using the 2N3904 transistor.
b) Using the β determined in Lab Task 1, calculate the values of IB, IC, VB, VC and VCE in table
12.3
c) Energize the network of Fig 12.2 measure VB,VC and VCE, and insert the values in table 12.1
d) Replace the Transistor of Fig 12.2 with 2N4401 transistor and calculate the values of IB, IC,
VB,VC,and VCE and insert the table in 12.1
Table 12.1 (Calculated values)
Transistor
type
2N3904
2N4401
VCE
VB
VC
VE
VBE
VCE
IB
VCE
IB
Table 12.2 (Measured values)
Transistor
type
2N3904
2N4401
VCE
VB
VC
VE
VBE
|EEE231| Electronics I Lab Manual
93
Lab Task 3: Collector Feedback Configuration with RE
Fig 12.3
e) Construct the network of Fig 12.3.
f) Using the β determined in part 1, calculate the values of IB, IC,IE, VB,VC and VCE and insert it in
the table below
Table 12.3 (Calculated values)
Transistor
type
2N3904
2N4401
VCE
VB
VC
VE
VBE
VCE
IB
VCE
IB
Table 12.4 (Measured values)
Transistor
type
2N3904
VCE
VB
VC
VE
VBE
Sample Viva Questions
3. Does the feedback increase the stability of the circuit?
4. Can you think of any other biasing arrangement other the four mentioned in this and previous labs?
|EEE231| Electronics I Lab Manual
94
Critical Analysis / Conclusion
(By Student about Learning from the Lab)
Take Home Exercise:
1-Implement the above mentioned circuit on Proteus to verify the design.
2-Discuss how the stability of the collector-feedback arrangement is better as compared to other biasing
techniques.
Performance
(10 Marks)
Viva
(5 Marks )
Performance
/4
Results
/3
Critical Analysis
/1
Take Home Exercise
/2
Total/15
Comments
|EEE231| Electronics I Lab Manual
95
LAB # 13: JFET Characteristics
Objectives
1. To obtain the characteristic curve for JFET transistor.
Equipment Required
Digital multimeter, Resistors , Potentiometer , Transistor 2N4416DC , Power supply.
Lab Instructions
 This lab activity comprises of three parts: Pre-lab, Lab Exercises, and Post-Lab Viva session.
 The students should perform and demonstrate each lab task separately for step-wise evaluation (please
ensure that course instructor/lab engineer has signed each step after ascertaining its functional
verification)
 Only those tasks that completed during the allocated lab time will be credited to the students. Students
are however encouraged to practice on their own in spare time for enhancing their skills.
Lab Report Instructions
All questions should be answered precisely to get maximum credit. Lab report must ensure following items:
 Lab objectives
 Results (graphs/tables) duly commented and discussed
 Conclusion
Familiarize yourself with JFET.
The junction field-effect transistor (JFET) is a uni-polar conduction device. In the n-channel JFET the
conduction path' is an n-doped material, germanium or silicon, while in the p-channel the conduction path
is p-doped germanium or silicon. Conduction through the channel is controlled by the depletion region
established by oppositely doped regions in the channel. The channel is connected to two terminals, referred
to as the drain and the source, respectively. For n-channel JFETs, the drain is connected to a positive
voltage, and the source to a negative voltage, to establish a flow of conventional current in the channel. The
polarities of the applied voltages for the p-channel JFET are opposite to those of the n-channel JFET.
A third terminal, referred to as the gate terminal, provides a mechanism for controlling the depletion region
and thereby the width of the channel through which conventional flow can exist between the drain and
source terminals. For an n-channel JFET, the more negative the gate-to-source voltage is, the smaller the
channel width is. This experiment will establish the relationships between the various voltages and currents
flowing in a JFET. The nature of these relationships determines the range of JFET applications.
|EEE231| Electronics I Lab Manual
96
Lab Tasks
Lab Task 1:
a)
Construct the network of Fig. 12.1. The 10-kfi resistor in the input circuit is included to protect
the gate circuit if the 9 V battery is applied with the wrong polarity and the potentiometer is set on
its maximum value.
Fig 13.1
b) Vary the M-ohm potentiometer until VGS=0 V. Recall that ID=IDSS when VGS=0.
c) Set VDS to 8 V by varying the 5 K ohm potentiometer. Measure the voltage VR.
VR(measured)=__________
d) Calculate the saturation current from IDSS=ID=VR/R
IDSS(measured)=_________
e) Maintain VDS at 8 V and reduce VGS until VR drops to 1 mV. At that level ID=VR/R= 1mV/100 =
10 µA. Recall that VP is the voltage VGS that results in ID=0 mA. Record the pinch off voltage
Vp(measured)= __________
f) Check with two other groups and record your readings
g)
IDSS(measured)=_________
Vp(measured)= __________
IDSS(measured)=_________
Vp(measured)= __________
h) Using the determined values of IDSS and VP sketch the transfer characteristics of the device using
Shockley’s equation. Plot at least 5 points on the curve.
ID= IDSS(1- VGS/VP)2
|EEE231| Electronics I Lab Manual
97
GRAPH:
Fig 13.2
Lab Task 2:This part of the experiment will determine the ID versus VDS characteristics
for an n-channel JFET. ,
a) Use the network of Fig. 13.1, vary tire two potentiometer until VGS = 0 V and VDS = 0 V.
Determine ID from ID = VR/R using the measured value of R and record in Table 13.1.
b) Maintain VGS = 0 V and increase V DS through 14 V [in one step] and record the calculated
value of ID . Be sure to use themeasured value of the 100 ohm resistance in your calculations.
c) Vary the 1-M ohm potentiometer until VGS= -IV. Maintaining VGS at this level, vary VDS
through the levels of Table 13.1 and record the calculated values of ID.
d) Repeat step 2(c) Tor the values of VGs appearing in Table 13.1. Discontinue the process once
VGS exceeds VB.
Table 13.1
VGS(V)
VDS (V)
0
ID
(mA)
-1
ID
(mA)
-2
ID
(mA)
-3
ID
(mA)
-4
ID
(mA)
0.0
1.0
2.0
3.0
4.0
|EEE231| Electronics I Lab Manual
98
5.0
6.0
7.0
8.0
9.0
10.0
11.0
12.0
Lab Task 3: Transfer Characteristics
This part of the experiment will-determine the IDvs VGS transfer characteristics frequently used in the
analysis of JFET networks. Ideally, the transfer characteristics as determined by Shockley's equation
assume that the effect of VDS can be ignored and the characteristic curves of Fig. 13.3 for a given V GS are
considered horizontal. The following will show that the transfer curve does vary slightly with V DS but not
to the point where concern should develop about using Shockley's equation.
For this part of the experiment all the data can be obtained from Table 13.1. There is no experimental
work in this part.
GRAPH:
Fig 13.3
|EEE231| Electronics I Lab Manual
99
Sample Viva Questions
5. What is the significance of the term ‘uni-polar’ in case of uni-polar junction transistors.
6. Compare the transfer characteristics of JFET with that of BJT.
Critical Analysis / Conclusion
(By Student about Learning from the Lab)
Take Home Exercise:
1-Comprehensively read and go through the Data Sheet of the FET used in this experiment and compare the
characteristics with the one obtained in this experiment.
Performance
(10 Marks)
Viva
(5 Marks )
Performance
/4
Results
/3
Critical Analysis
/1
Take Home Exercise
/2
Total/15
Comments
|EEE231| Electronics I Lab Manual
100
LAB #14: Transistor Biasing: Fixed and Self Biasing of JFETs
Objectives
1. Understand the purpose of biasing a JFET.
2. Bias a JFET transistor to a selected quiescent point (Q-point) using the fixed and Self Biasing method.
3. Also determine which produces a stable Q point. Most importantly this experiment will also help
students increase the designing skills.
Equipment Required
DC Power supplies, FET 2N4416, Multimeter, Resistors, Connecting wires.
Lab Instructions
 This lab activity comprises of three parts: Pre-lab, Lab Exercises, and Post-Lab Viva session.
 The students should perform and demonstrate each lab task separately for step-wise evaluation (please
ensure that course instructor/lab engineer has signed each step after ascertaining its functional
verification)
 Only those tasks that completed during the allocated lab time will be credited to the students. Students
are however encouraged to practice on their own in spare time for enhancing their skills.
Lab Report Instructions
All questions should be answered precisely to get maximum credit. Lab report must ensure following items:
 Lab objectives
 Circuit Designing
 Observations
 Hardware Implementation (correct configuration)
 Results (graphs/tables) duly commented and discussed
 Conclusion
Part 1 – Familiarize yourself with the biasing of FETs.
The term biasing a JFET means placing the operating point of a JFET used in an amplifier at a desired
location within the drain curve chart. This “operating point” is referred to as the quiescent point or Q-point
because this is the “operating point” when the amplifier is “quiescent” (has no input applied). With input
applied (in the dynamic condition) the output current (ID) “operates” (increases and decreases) around the Qpoint as a function of the gate-to-source voltage (VGS). See Figure 1. If the Q-point shifts during transistor
operation, then the output current (ID) will not faithfully represent the input voltage VGS and thus distortion
will be introduced to the amplified signal.
In the previous lab, you developed the drain curves and transconductance curve for a 2N4416 JFET from
empirical data. As with a bi-polar junction transistor’s characteristic curves, the JFET’s drain curves provide a
map of where to operate your particular transistor. As is similar to the BJT, there are 3 areas where a JFET can
operate; in the cutoff region, in the Ohmic region, or in the constant current region.
|EEE231| Electronics I Lab Manual
101
a. In the cutoff region, the drain current (ID), which is the current flowing through the channel (an n-channel
in this case since this an n-channel JFET), consists only of leakage current and therefore the voltage drop
across the drain-to-source (VDS) junction is equal (or very, very nearly equal) to the supply voltage (VDD).
When operating in the cutoff region, the JFET is effectively an open switch. To be in the cutoff region, the
gate-to-source voltage (VGS) must be negative and equal or greater in magnitude to the JFET’s cutoff voltage
(VGS(off))
b. In the Ohmic region, the drain current (ID) varies with the drain-to-source voltage (VDS) value in
accordance with Ohm’s law. If the various drain curves for a particular JFET are analyzed, it will be observed
that the slope of the curves in the Ohmic region (ΔID/ΔVDS) represents the conductance of the JFET’s
channel for the applied VGS. Remember, conductance is the inverse of resistance so, if operated in the Ohmic
region, a JFET could be used as a voltage controlled resistor with VGS controlling the resistance. The Ohmic
region is defined by a VDS between VDS = 0 and VDS = pinch-off voltage (VP) and ID = 0 and ID = IDSS.
c. In the constant current region and for a given negative gate-to-source voltage (VGS), the drain current (ID)
remain fairly constant for changing values of VDS. If VDS were to increase beyond a level called the
breakdown voltage, ID would rise dramatically and possibly damage the JFET. When biasing a JFET,
generally you want to place its operating or Q point in the center of the constant current region.
Part 2 – Design Methodologies
Determine VDD
In the self biasing scheme, the supply voltage (VDD) is the first parameter to be determined. This is done by
picking an appropriate voltage based on an analysis of transistor’s limitations, circuit limitations, power
supply limitations, and voltage gain required.
Drain Resistor (RD)
The drain resistor is used to set the value of the drain current. Since we know the value of ID and VDS at the
desired bias point, as well as the value of VDD, we can easily compute the value of RD so that the desired
bias point is achieved.
Source Resistor (RS)
To operate a n-channel JFET as an amplifier, the gate junction must be reversed biased i.e. electrically
negative in relation to the source. To negatively bias the gate-to- source junction, a negative voltage source
could be placed between the gate and ground; however, this method is not generally used since it would
require addition of another voltage source to the circuit. A more efficient method to achieve a negative bias
between the gate-to-source junction is to electrically “raise” the source above ground.
Figure 1 illustrates this method. The JFET’s gate is maintained at ground level through a resistor (RG)
connected directly to ground. Despite the resistor between it and ground, the gate stays at (or extremely close
to) ground potential because the reversed biased drain-to-gate junction current is extremely low and can be
considered non-existent, therefore, no voltage develops across RG. As source current flows through RS from
source to ground, the source side of the resistor is raised above ground in accordance with Ohm’s law. This
action results in a negative bias between the gate which is at 0V or ground potential and the source which is at
|EEE231| Electronics I Lab Manual
102
(IS*RS) V. This self biasing provides the negative bias for the gate-to-source junction that is required for the
JFET to operate as an amplifier.
Figure.14.1 Current and Voltage Bias Points
|EEE231| Electronics I Lab Manual
103
Lab Task-1: Fixed Biased
With the help of theory explained in the previous and the design equations mentioned in the two biasing
methods as explain below design the fixed and self biased configurations for which find the values of supply
voltage and resistors.
|EEE231| Electronics I Lab Manual
104
Lab Task-2:Self Biased
Sample Viva Questions
|EEE231| Electronics I Lab Manual
105
1. Of the two biasing forms presented, which produces the most stable and predictable drain current?
2. In general, identify two ways of decreasing the drain voltage in the designed circuit.
3. How is drain current controlled in JFET?
Critical Analysis / Conclusion
Take Home Exercise:
1.Verify your design on Proteus.
Performance
(10 Marks)
Viva
(5 Marks )
Performance
/4
Results
/3
Critical Analysis
/1
Take Home Exercise
/2
Total/15
Comments
LAB #15: Voltage Divider Biasing of JFET
|EEE231| Electronics I Lab Manual
106
Objectives
Familiarize students with another biasing technique of JFETs. Determine the quiescent operating conditions of
the voltage-divider-bias FET configurations. Understand the effects of changing configurations on the Q-point
stability.
Equipment Required
DC Power supplies, FET 2N4416, Multimeter, Resistors, Connecting wires.
Lab Instructions
 This lab activity comprises of three parts: Pre-lab, Lab Exercises, and Post-Lab Viva session.
 The students should perform and demonstrate each lab task separately for step-wise evaluation (please
ensure that course instructor/lab engineer has signed each step after ascertaining its functional
verification)
 Only those tasks that completed during the allocated lab time will be credited to the students. Students
are however encouraged to practice on their own in spare time for enhancing their skills.
Lab Report Instructions
All questions should be answered precisely to get maximum credit. Lab report must ensure following items:
 Lab objectives
 Observations
 Hardware Implementation (correct configuration)
 Results (graphs/tables) duly commented and discussed
 Conclusion
Part 1 – Familiarize Yourself with Voltage Divider Biased Configuration
The figure given below represents another way to bias the JFET by using a voltage division. This biasing
technique can be compared to the biasing of the voltage divider that is used in the bipolar transistors.
Fig 15.1
|EEE231| Electronics I Lab Manual
107
The voltage which is applied on the gate is: VG=VDD*R2 / (R1+R2)
The voltage VS at the edges of the source resistance RS is VS = VG - VGS , so the drain current will be equal
to ID = (VG - VGS) / RS
If the VG is much bigger than VGS the drain current will be almost stable for every JFET. However the
VGS can vary enough Volt from one JFET to another, and as a result for the voltage supplies that are used, that
the elimination of the effect of the VGS not to be complete. Therefore the voltage
divider bias is less effective on the JFET compared to the bipolar transistors.
Lab Task-1:
a) Construct the network of given below using the 2N4416 transistor. Insert the measured value of
each resistor.
Fig15.2
R1 (measured) = ____________
R2 (measured) = ____________
RD (measured) = ____________
RS (measured) = ____________
b) Determine the values of VG, VD, VS, VDS, and VGS using Schokley’s equation and insert it in table
15.1 below
c) Measure the values of VG, VD, VS, VDS, and VGS using Schokley’s equation and insert it in table 15.1
below
d) Determine the percentage difference between the calculated and measured values and record it in
table 15.1
|EEE231| Electronics I Lab Manual
108
VG
VD
TABLE 15.1
VS
VGS
VDS
Calculated
Measured
% Difference
Sample Viva Questions
7. Discuss the stability of Q-point for voltage divider biased configuration as compared to other biasing
techniques.
8. Compare the Q-point achieved in this experiment with the one obtained through graphical method.
|EEE231| Electronics I Lab Manual
109
Critical Analysis / Conclusion
Take Home Exercise:
1-Implement the above mentioned circuit on Proteus to verify the design.
2-Change the values (Increase and Decrease) of R1 and R2 and find out its effect on the over all stability of
the circuit.
Performance
(10 Marks)
Viva
(5 Marks )
Performance
/4
Results
/3
Critical Analysis
/1
Take Home Exercise
/2
Total/15
Comments
|EEE231| Electronics I Lab Manual
110