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PRELIMINARY INFORMATION: SUBJECT TO CHANGE WITHOUT ANY NOTICE
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Data Sheet AS3977
UHF RFID single chip reader EPC Class1 Gen2 compatible
AS3990
General Description
The AS3990 UHF reader chip is an integrated
analogue front end and data framing system for a
900MHz RFID reader system. Built in programming
options make it suitable for a wide range of
applications in UHF RFID systems. Designed to
simplify the design and implementation of an EPC
Class 1Gen2 reader, this IC requires only a standard
8Bit microcontroller with minimal other components.
The AS3990 comprises the EPC Class 1- Gen2
protocol (ISO 18000-6c) with digital high speed logic
up to the framing level and supports the ISO 180006a and ISO 18000-6b Protocol with direct data mode.
The Interface to the microcontroller can be either a 4
pin serial date Interface (SDI) or alternatively in case
of high data rates are necessary an eight Bit parallel.
The frame management will be done using a 12 Byte
FIFO in order to decrease processor workload and
ensure a smooth data stream and correct protocol
handling. All low level transmission codec’s and CRC
generation is done internally.
Preliminary Information
Applications
•
•
Barcode label printers
Add-on module for handheld computers, PDA
•
•
•
•
Point of sales
Currency reader
UHF RFID reader systems
Hand-held UHF RFID readers
•
•
Toll systems
mobile phones
Key Features
•
•
•
•
•
•
•
•
An on chip level shifter with a special supply pin can
be used to adapt microcontroller supply voltages in
the range of 1.8- 3.3V for optimized power usage. In
order to reduce the BOM, an integrated LDO with
driver strength of 20mA can be used to supply the
microcontroller. Additional regulators for the RF
section suppress disturbances and thus allow noisy
main supply.
A 20MHz crystal is used for the reference oscillator.
Using this reference, an additional programmable
glitch free clock output can be used to clock the
microcontroller thus saving costs and current. In
addition, by using the integrated power management
features modes power-down, standby and active it is
possible to shut down or reduce the microcontroller
clock and hence save additional power.
•
•
•
Fully compliant with ISO 18000 6a, 6b, 6c and
EPC Class 1- Gen2 protocol using external MCU
EPC Class 1 -Gen2 framing support using low
cost 8 Bit microcontroller
Direct data mode in the frequency range of 860 to
960 MHz enables propriety Protocol support
Internal power amplifier with level controlled
20dBm for short range applications
Modulator using ASK or PR-ASK modulation
Adjustable ASK modulation index
Automatic selection between I and Q Signal
ensuring no “communication holes”
Built-in reception low-pass and high-pass filters
having selectable corner frequencies.
On chip VCO and PLL covering complete RFID
frequency range and frequency hopping support
Selectable receiver gain with AGC
Supported link frequencies from 40 up to 640kHz
Package
•
64 pin QFN 9*9
Data Sheet AS3990 UHF reader
Block and Application Diagram
2xC
6
4
OAD
OAD_2
ADC
DAC
MIX_INP
MIX_INN
MIXS_IN
2
1
3
5
3
5
5
2
1
3
VEXT
VEXT2
VDD_MIX
VDD_TXPAB
CD1
CD2
COMP_A
COMP_B
COMN_A
COMN_B
VDD_5LFI
4xC
1
5
1
6
1
7
AS3990
38
31
18
30
58
Supply
Regulators
&
4
Refernces
19
54
59
7
63
Gain
Filter
Double DownConversion
Mixer
34
Digitizer
51
9
41
Digitizer
10
42
43
EXT_IN
VCO
OSCI
56
AFE
EPC Gen2 Protocol Handling
RF Out
RSSI
28
20
21
32
33
EPC Gen2 Protocol
Handling
60
CRC
62
8
1
1
1
2
1
4
2
2
2
3
2
4
2
5
2
6
2
9
3
5
5
5
5
7
VSS
VSS
VSN_MIX
CBIB
CBV5
VSN_1
VSN_2
VSN_3
VSN_4
VSN_5
VSN_D
VSN_RFP
VSN_A
VSN_CP
6
46
47
48
50
40
49
37
61
45
VDD_IO
IO0
IO1
IO2
IO3
IO4
Micro
IO5
controller
IO6
IO7
CLK
EN
IRQ
CLSYS
12
Byte
FIFO
Frame Gen
System
OSCO
VOSC
CP
44
39
GEN-2
Oscillator &
Timing
36
MCU Interface
27
7xC
6
5
EXP_PAD
Directional
unit
RFOUTN_1
RFOUTN_2
RFOUTP_1
RFOUTP_2
RFONX
RFOPX
VDD_D
VDD_RF
VDD_B
AGD
VDD_A
VDD_LF
VDD_RFP
Contact
austriamicrosystems AG
A 8141 Schloss Premstätten, Austria
T. +43 (0) 3136 500 0
F. +43 (0) 3136 525 01
wireless@austriamicrosystems.com
Disclaimer
Preliminary Data Sheet is product information in formative or design phase of development. Characteristic data and
other specifications are design goals. austriamicrosystems reserves the right to change or discontinue such products
without notice.
Revision No. 1.2, Date: 09-2007
Page 2 of 2
Copyright © 2007 austriamicrosystems. Trademarks registered ®. All rights reserved. The material herein may not be reproduced, adapted,
merged, translated, stored, or used without the prior written consent of the copyright owner. To the best of its knowledge,
austriamicrosystems asserts that the information contained in this publication is accurate and correct.
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