Centennial College School of Engineering Technology & Applied Science (SETAS) Sustainable Design & Renewable Energy (SDRE) ESET211 – Digital and Power Electronic Week#4 – Combinational Logic Circuits Week#4 Learning Outcome 1. Combinational Logic 1. Comparators 2. Decoders 3. Encoders 4. Multiplexers 5. Demultiplexers 2. Summary 2 School of Engineering Technology and Applied Science (SETAS) / Sustainable Design & Renewable Energy (SDRE) Copyright © 2018, Pearson Education, Inc. All right reserved. 1.1- Comparators(1) A number of standard combinational logic functions have been developed for digital circuits that represent many of the useful tasks that can be performed with digital circuits. Often it is important to compare two binary strings to determine if they are exactly equal. This comparison process is performed by a digital comparator. The basic comparator evaluates two binary strings bit by bit and outputs a 1 if they are exactly equal. An XNOR gate is the easiest way to compare the equality of bits. 3 School of Engineering Technology and Applied Science (SETAS) / Sustainable Design & Renewable Energy (SDRE) Copyright © 2018, Pearson Education, Inc. All right reserved. 1.1- Comparators(2) Magnitude Comparators A=B A>B A<B 7485 TTL 4-bit comparator Source: 74HC85 datasheet –Philips Semiconductor 4 School of Engineering Technology and Applied Science (SETAS) / Sustainable Design & Renewable Energy (SDRE) Copyright © 2018, Pearson Education, Inc. All right reserved. 1.1- Comparators(3) 5 By using this IC we can build higher-bit comparator, for example let’s implement 8-bit comparator by using 74HC85: School of Engineering Technology and Applied Science (SETAS) / Sustainable Design & Renewable Energy (SDRE) Copyright © 2018, Pearson Education, Inc. All right reserved. 1.2- Decoders (1) 6 The general function of a decoder is to activate one or more circuit outputs upon detection of a particular digital state. Single-Gate Decoder is a simplest single gate, sometimes in combination with one or more inverters, used to detect the presence of one particular binary value. The following figures show two decoders, both of which detect an input. The first decoder generates a logic HIGH when its input is 1111. The second decoder responds to the same input, but makes the output LOW instead. The gates in both figures have outputs with opposite active levels. School of Engineering Technology and Applied Science (SETAS) / Sustainable Design & Renewable Energy (SDRE) Copyright © 2018, Pearson Education, Inc. All right reserved. 1.2- Decoders (2) 7 Multiple-Output Decoders circuits often are constructed with multiple outputs. Such a device is a collection of decoding gates controlled by the same inputs. A decoder circuit with n inputs can activate up to m = 2n load circuits. Such a decoder is usually described as an n line- to-m-line decoder. Consider the logic circuit of a 2-lineto-4-line decoder. The circuit detects the presence of a particular state of the 2-bit input D1D0, as shown by the truth table Only one output is HIGH for any Input combination, provided the enable input G is LOW. The subscript of the active output is the same as the value of the 2-bit input. If , D1D0=10 output Y2 is active (since 10 = 2 (decimal)). School of Engineering Technology and Applied Science (SETAS) / Sustainable Design & Renewable Energy (SDRE) Copyright © 2018, Pearson Education, Inc. All right reserved. 1.2- Decoders(3) 8 3-Bit Binary-to-Octal Decoder Truth Tables Complete Octal Decoder (active LOW outputs) School of Engineering Technology and Applied Science (SETAS) / Sustainable Design & Renewable Energy (SDRE) Copyright © 2018, Pearson Education, Inc. All right reserved. 1.2- Decoders(4) Octal Decoder Also known as 1-of-8 decoder Also known as 3-line-to-8-line decoder 74138 pin configuration and logic symbol. Enables 9 School of Engineering Technology and Applied Science (SETAS) / Sustainable Design & Renewable Energy (SDRE) Copyright © 2018, Pearson Education, Inc. All right reserved. 1.2- Decoders(5) A0 A0 A1 A1 A2 A2 \E1 \E1 \Y0 \Y0 \Y3 \Y3 \Y5 \Y5 10 School of Engineering Technology and Applied Science (SETAS) / Sustainable Design & Renewable Energy (SDRE) Copyright © 2018, Pearson Education, Inc. All right reserved. 1.2- Decoders (6) 7442 BCD-to-DEC Decoder IC 11 1-of-10 decoder pin configuration and logic School of Engineering Technology and Applied Science (SETAS) / Sustainable Design & Renewable Energy (SDRE) Copyright © 2018, Pearson Education, Inc. All right reserved. 1.2- Decoders(7) 74154 Hexadecimal Decoder IC 12 1-of-16 Decoder pin configuration and logic symbol School of Engineering Technology and Applied Science (SETAS) / Sustainable Design & Renewable Energy (SDRE) Copyright © 2018, Pearson Education, Inc. All right reserved. 1.2- Decoders (8) 13 The seven-segment display is a numerical display device used to show digital circuit outputs as decimal digits (sometimes hexadecimal digits). It consists of seven luminous segments (light-emitting diodes LED or liquid crystals). Since a LED is a diode, it conducts when its anode is positive with respect to its cathode. It is conventional to designate the top segment as a, and progress clockwise around the display, ending with g, as the centre element. A series resistor limits the current to prevent the diode from burning out and to regulate its brightness. School of Engineering Technology and Applied Science (SETAS) / Sustainable Design & Renewable Energy (SDRE) Copyright © 2018, Pearson Education, Inc. All right reserved. 1.2- Decoders(9) 7447 BCD to 7-sgement display decoder : 14 A0, A1, A2, A3 a, b, c, d, e, f, g BCD Inputs Active Low Outputs School of Engineering Technology and Applied Science (SETAS) / Sustainable Design & Renewable Energy (SDRE) Copyright © 2018, Pearson Education, Inc. All right reserved. 1.3- Encoders (1) 15 Encoding is the opposite process from decoding. It is used to generate a coded output (like BCD or binary) from a singular active numeric input line. For 2n number of input it provides n output. A basic decimal-to-BCD encoder:. School of Engineering Technology and Applied Science (SETAS) / Sustainable Design & Renewable Energy (SDRE) Copyright © 2018, Pearson Education, Inc. All right reserved. 1.3- Encoders (2) 74147 Decimal-to-BCD Encoder 16 Inputs and outputs are Active-LOW Note bubbles on logic symbols Priority encoder - highest input has priority School of Engineering Technology and Applied Science (SETAS) / Sustainable Design & Renewable Energy (SDRE) Copyright © 2018, Pearson Education, Inc. All right reserved. 1.3- Encoders (3) 74148 Octal-to-Binary Encoder: 17 Eight active-low inputs Three active-low outputs Priority encoder School of Engineering Technology and Applied Science (SETAS) / Sustainable Design & Renewable Energy (SDRE) Copyright © 2018, Pearson Education, Inc. All right reserved. 1.3- Encoders (4) 18 School of Engineering Technology and Applied Science (SETAS) / Sustainable Design & Renewable Energy (SDRE) Copyright © 2018, Pearson Education, Inc. All right reserved. 1.3- Encoders (5) 19 School of Engineering Technology and Applied Science (SETAS) / Sustainable Design & Renewable Energy (SDRE) Copyright © 2018, Pearson Education, Inc. All right reserved. 1.4- Multiplexers (1) A device capable of funneling several data lines into single line for transmission to another point. It consists of several input lines and control signals( data selectors ) 20 Data select control determines which input is transmitted Multiplexers can be used to implement combinational logic circuits. School of Engineering Technology and Applied Science (SETAS) / Sustainable Design & Renewable Energy (SDRE) Copyright © 2018, Pearson Education, Inc. All right reserved. 1.4- Multiplexers(2) 74151 Eight-Line Multiplexer logic symbol 21 Note 3 data select inputs for 8 inputs (23 = 8) School of Engineering Technology and Applied Science (SETAS) / Sustainable Design & Renewable Energy (SDRE) Copyright © 2018, Pearson Education, Inc. All right reserved. 1.4- Multiplexers(3) 22 School of Engineering Technology and Applied Science (SETAS) / Sustainable Design & Renewable Energy (SDRE) Copyright © 2018, Pearson Education, Inc. All right reserved. 1.5- DeMultiplexers (1) Opposite procedure from multiplexing 23 Selectors pick which output path for the incoming input Single data input routed to one of several outputs School of Engineering Technology and Applied Science (SETAS) / Sustainable Design & Renewable Energy (SDRE) Copyright © 2018, Pearson Education, Inc. All right reserved. 1.5- DeMultiplexers (2) 74139 Dual 4-line Demultiplexer logic symbol and logic diagram 74139 connected to route an input signal to the 2a output 24 School of Engineering Technology and Applied Science (SETAS) / Sustainable Design & Renewable Energy (SDRE) Copyright © 2018, Pearson Education, Inc. All right reserved. 1.5- DeMultiplexers (3) 74154 4-line-to16-line hexadecimal decoder Used as a 16 line demultiplexer Connected to route a signal to the 5 output 25 School of Engineering Technology and Applied Science (SETAS) / Sustainable Design & Renewable Energy (SDRE) Copyright © 2018, Pearson Education, Inc. All right reserved. 2 – Summary 26 Comparators can be used to determine equality or which of two binary strings is larger. Decoders can be used to convert a binary code into a singular active output representing its numeric value. Encoders can be used to generate a coded output from a singular active numeric input line. Multiplexers are capable of funneling several data lines into a single line for transmission to another point. Demultiplexers are used to take a single data value or waveform and route it to one of several outputs. School of Engineering Technology and Applied Science (SETAS) / Sustainable Design & Renewable Energy (SDRE) Copyright © 2018, Pearson Education, Inc. All right reserved.