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IPC JEDEC J-STD-075 english

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ECA/IPC/JEDEC J-STD-075
August 2008
Classification of
Non-IC Electronic
Components for
Assembly
Processes
®
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JOINT
INDUSTRY
STANDARD
Notice
ECA, IPC and JEDEC Standards and Publications are designed to serve the
public interest through eliminating misunderstandings between manufacturers
and purchasers, facilitating interchangeability and improvement of products,
and assisting the purchaser in selecting and obtaining with minimum delay
the proper product for his particular need. Existence of such Standards and
Publications shall not in any respect preclude any member or nonmember
of ECA, IPC or JEDEC from manufacturing or selling products not conforming
to such Standards and Publications, nor shall the existence of such Standards
and Publications preclude their voluntary use by those other than ECA, IPC
or JEDEC members, whether the standard is to be used either domestically
or internationally.
For Technical Information Contact:
ECA
Electronic Components
Association
2500 Wilson Boulevard
Arlington, VA 22201-3834
Phone: (703) 907-8022
Fax: (703) 875-8908
IPC
Association Connecting
Electronics Industries®
3000 Lakeside Drive, Suite 309S
Bannockburn, IL 60015-1249
Phone: (847) 615-7100
Fax: (847) 615-7105
JEDEC
Solid State Technology Association
3103 North 10th Street, Suite 240-S
Arlington, VA 22201
Phone: (703) 907-7534
Fax: (703) 907-7583
Please use the Standard Improvement Form shown at the end of this
document.
©Copyright 2008. The Electronic Components Association, Arlington, Virginia, IPC, Bannockburn, Illinois, USA and JEDEC. All rights
reserved under both international and Pan-American copyright conventions. Any copying, scanning or other reproduction of these materials
without the prior written consent of the copyright holder is strictly prohibited and constitutes infringement under the Copyright Law of the
United States.
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Recommended Standards and Publications are adopted by ECA, IPC or
JEDEC without regard to whether their adoption may involve patents on
articles, materials, or processes. By such action, ECA, IPC or JEDEC do not
assume any liability to any patent owner, nor do they assume any obligation
whatever to parties adopting the Recommended Standard or Publication.
Users are also wholly responsible for protecting themselves against all claims
of liabilities for patent infringement. The material in this joint standard was
developed by the ECA S-1 Passive Component Committees Steering Group,
the IPC Plastic Chip Carrier Cracking Task Group (B-10a) and the JEDEC
JC-14.1 Committee on Reliability Test Methods for Packaged Devices.
ECA/IPC/JEDEC J-STD-075
Classification of Non-IC
®
Electronic Components
for Assembly Processes
Users of this standard are encouraged to participate in the
development of future revisions.
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A joint standard developed by the Electronic Components Association
S-1 Passive Component Committees Steering Group, IPC Plastic Chip
Carrier Cracking Task Group (B-10a) and the JEDEC JC-14.1 Committee
on Reliability Test Methods for Packaged Devices
Contact:
ECA
Electronic Components
Association
2500 Wilson Boulevard
Arlington, VA 22201-3834
Phone: (703) 907-8022
Fax: (703) 875-8908
IPC
Association Connecting
Electronics Industries®
3000 Lakeside Drive, Suite 309S
Bannockburn, IL 60015-1249
Phone: (847) 615-7100
Fax: (847) 615-7105
JEDEC
Solid State Technology Association
3103 North 10th Street, Suite 240-S
Arlington, VA 22201
Phone: (703) 907-7534
Fax: (703) 907-7583
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August 2008
ECA/IPC/JEDEC J-STD-075
Acknowledgment
Members of the Electronic Components Association S-1 Passive Component Committees Steering Group, IPC Association
Connecting Electronics Industries® IPC Plastic Chip Carrier Cracking Task Group (B-10a) and the JEDEC Solid State
Technology Association JEDEC JC-14.1 Committee on Reliability Test Methods for Packaged Devices have worked together
to develop this document. We would like to thank them for their dedication to this effort.
Any document involving a complex technology draws material from a vast number of sources. While the principal members
of the Joint Moisture Classification Working Group are shown below, it is not possible to include all of those who assisted
in the evolution of this standard. To each of them, the members of the ECA, IPC and JEDEC extend their gratitude.
ECA J-STD-075
Working Group
IPC Plastic Chip Carrier
Cracking Task Group
JEDEC JC 14.1
Committee
Chairman
Paul Krystek
IBM Corporation
Chairman
Steven R. Martell
Sonoscan, Inc.
Chairman
Jack McCullen
Intel Corporation
Dr. Jennie S. Hwang, H-Technologies
Group
Mat Kas, On Semiconductor
Hisamitsu Kawasaki, Sanyo
Matt Kelly, IBM Corp.
Jerry Kolbe, Murata Electronics
North America Inc.
Richard E. Kraszewski, Kimball
Electronics
Frank Kriesch, DIEHL Aerospace
Theodore Krueger, Vishay General
Semiconductor Taiwan
Paul Krystek, IBM Corp.
Mike Lauri, IBM Corp.
Scott Lefebvre, Nvision
Carl Lindquist, San-O Industrial
Laird Macomber, Cornell Dublier
Jim Maguire, Intel
Steve Martell, Sonoscan, Inc.
Jack McCullen, Intel
Lanney D. McHargue, Murata
Electronics North America Inc.
Randy McNutt, Northrop
Grumman ISWR
Kelly Miller, Flextronics
I. Murdock, ATC
John Norton, Benchmark Electronics
Russ Nowland, Alcatel-Lucent
Arnold Offner, Phoenix Contact
Tak Ohashi, Sanyo
Deepak Pai, General Dynamics
Brian Piscitelli, KOA Speer
John Radman, Trace Laboratories
Chris Reynolds, AVX
Dave Richardson, Vishay
D. Ritchey, Yageo
Douglas Romm, Texas
Instruments Inc.
Ulrich Rosemeyer, Phoenix Contact
Ron Roth , Acous Tech.
Waleed Rusheidat, Jabil
Jeff Shubrooks, Raytheon
Joe Smetana, Alcatel-Lucent
Gregg Stearns, Emerson Climate
Technologies
Bill Strachan, AsTA - Highbury
College
Guhan Subbarayan, Cisco
Systems, Inc.
Toshio Sugano, Elpida
Jeffrey Toran, FCI
Joachimvov der Ohe, Vishay Draloric / Beyschlag
Girish Wable, Jabil
Joel Weiner, Johns Hopkins
University
Kevin Weston, Celestica International
Jim Whitehouse, Plexus EA
Linda Woody, Lockheed Martin
Joe Young, Kemet
J-STD-075 Working Group Members
Jasbir Bath, Flextronics
Mary Bellon, Boeing Satellite
Development Center
Joseph Biernacki, Stackpole
Electronics, Inc
Mike Blazier, Delphi Electronics
and Safety
G. Les Bogert, Bechtel Plant
Machinery Inc.
Mumtaz Bora, Kyocera Wireless
Corporation
Mike Cannon, TDK
Mary -BerriosCarter-Berrios, Kemet
Calette Chamness, RDEC
Terry Charles, Panasonic
Ashley Collier, Celestica International
Gordon Davy, Northrop
Grumman ES
Phil Digilo, EPCOS
Robert DiMaggio, Sud-Chemie
Performance Package
Dennis Eaton, Avago
Pete Elmgren, Molex Incorporated
Werner Engelmaier, Engelmaier
Associates, L.C.
Bill Gisseler, TDK
Curtis Grosskopf, IBM Corp.
Joel Heebink, Honeywell
Gregory Henshall, Hewlett-Packard
Company
Bob Hilty, Tyco
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August 2008
ECA/IPC/JEDEC J-STD-075
Table of Contents
GENERAL ................................................................... 1
8
FLUX ......................................................................... 6
1.1
1.2
Scope ...................................................................... 1
Purpose ................................................................... 1
9
CLEANING ............................................................... 6
1.3
1.4
1.4.1
1.4.2
1.4.3
Definitions ..............................................................
General Requirements ............................................
Agreements .............................................................
Definition of Requirements ....................................
Measurement Units and Applications ....................
10
BASE SOLDER PROCESS CONDITIONS WAVE ........................................................................ 7
11
BASE SOLDER PROCESS CONDITIONS REFLOW ................................................................... 8
12
MSL CLASSIFICATION AND LABELING/
PACKING ................................................................ 10
13
PSL LABELING ...................................................... 10
1
2
2.1
2.2
1
1
1
2
2
APPLICABLE DOCUMENTS ..................................... 2
IPC .......................................................................... 2
Joint Industry Standards ........................................ 2
3
SOLDERABILITY ....................................................... 2
4
PROCESS ................................................................... 2
4.1
4.2
4.3
4.4
Process Sensitivity Classification ..........................
PSL Reclassification ...............................................
PSL Evaluation .......................................................
MSL Bake Out .......................................................
2
4
4
4
5
PSL CLASSIFICATION .............................................. 4
6
NUMBER OF PASSES/REFLOWS ............................ 6
7
REWORK .................................................................... 6
Figures
Figure 4-1
J-STD-075 Process ............................................. 3
Tables
Table 5-1
Wave Solder PSL Classification ......................... 5
Table 5-2
Reflow Solder PSL Classification ........................ 5
Table 5-3
PSL 3rd Character ............................................... 5
Table 10-1 Base Solder Process Exceptions - Wave ........... 7
Table 10-2 Ceramic Capacitors for Wave Soldering ............. 7
Table 11-1 Base Solder Process Exceptions - Reflow ......... 8
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ECA/IPC/JEDEC J-STD-075
August 2008
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August 2008
ECA/IPC/JEDEC J-STD-075
Classification of Non-IC Electronic
Components for Assembly Processes
1 GENERAL
1.1 Scope This standard outlines worst case industry solder (SnPb and Pb-free) assembly process limits for nonsemiconductor electronic components (hereafter referred to as ‘‘components’’) along with commodity specific exceptions to
the worst case solder assembly process limits. The solder assembly process limits listed in this document represent common
industry limits of a given component or component family and are not recommended process parameters for an assembler.
An individual Supplier’s component capability may be better or worse than the common industry limits documented in this
specification. An assembler needs to take into account many factors when establishing a safe assembly process for a given
electronic assembly. This standard outlines a process to classify and label a non-semiconductor component’s Process Sensitivity Level (PSL) and Moisture Sensitivity Level (MSL) consistent with the semiconductor industry’s classification levels
(J-STD-020 Moisture/Reflow Sensitivity Classification for Nonhermetic Solid State Devices and J-STD-033 Handling, Packing, Shipping and Use of Moisture/Reflow Sensitive Surface Mount Devices). This specification does not establish re-work
conditions.
1.2 Purpose The purpose of this specification is to establish an agreed set of worst case solder process limits (SnPb and
Pb-free) which can safely be used for assembling non-semiconductor electronic components on common substrates, e.g.,
FR4, ceramic, polyimide, etc., along with documenting unique commodity specific exceptions. The documented process
conditions are used to evaluate a non-semiconductor component’s PSL and MSL. It is important for Component Manufacturers (hereafter referred to as ‘‘Suppliers’’), Users and Assemblers to be highly familiar with this standard’s information
and processes to insure optimal product quality and reliability.
1.3 Definitions
Family A grouping of components by similar/common characteristics (e.g., package; design; materials; function, technology and or manufacturing process).
MSL Moisture Sensitivity Level – A rating indicating a component’s susceptibility to damage due to absorbed moisture
when subjected to reflow soldering (see J-STD-020).
PSL Process Sensitivity Level – A rating used to identify a component that is solder process sensitive because the component can not be used in one or more of the base solder process conditions.
PIH Paste-in-Hole – Also commonly called Intrusive Soldering. This is a process in which the solder paste for the throughhole components is applied using a stencil or syringe to accommodate through-hole components that are inserted and
reflow-soldered together with the surface-mount components.
In the component Supplier industry, PTH is commonly used to refer to Pin-Through-Hole Components. To avoid confusion with the PCB meaning of Plated-Through Hole, this document uses the phrase ‘‘through-hole components.’’
PTH
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The component manufacturer or seller that controls the component specifications and is accountable for the component’s performance.
Supplier
The individual, organization, company or agency responsible for the procurement of electrical/electronic hardware,
and having the authority to define the class of equipment and any variation or restrictions (i.e., the originator/custodian of
the contract detailing these requirements).
User
1.4 General Requirements
When referenced by a Supplier, User or Assembler, this standard becomes part of their requirements/
specifications. When a clause in this document is referenced, its subordinate clauses also apply.
1.4.1 Agreements
1.4.1.1 Order of Precedence
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August 2008
1.4.1.2 Conflict In the event of conflict between the requirements of this standard and the applicable assembly drawing(s)/
documentation, the applicable user approved assembly drawing(s)/documentation govern. In the event of a conflict between
the text of this standard and the applicable documents cited herein, the text of this standard takes precedence. In the event
of conflict between the requirements of this standard and an assembly drawing(s)/documentation that has not been user
approved, this standard governs.
When this standard is contractually required, the applicable requirements of this standard shall be imposed on all applicable subcontracts, assembly drawing(s), documentation and purchase orders.
1.4.1.3 Requirements Flowdown
1.4.2 Definition of Requirements The word ‘‘shall’’ is used in the text of this document wherever a requirement is mandatory. The word ‘‘should’’ reflects recommendations and is used to reflect general industry practices and procedures for
guidance only.
1.4.3 Measurement Units and Applications All dimensions and tolerances, as well as other forms of measurement (temperature, weight, etc.) in this standard are expressed in SI (System International) units. Dimensions and tolerances use millimeters as the main form of dimensional expression; micrometers are used when the precision required makes millimeters
too cumbersome. Celsius is used to express temperature. Weight is expressed in grams.
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2 APPLICABLE DOCUMENTS
The following documents, in their current revision, form a part of this specification to the extent specified herein.
2.1 IPC1
IPC-CH-65
Guidelines for Cleaning Printed Circuit Boards and Assemblies
2.2 Joint Industry Standards2
J-STD-002
Solderability Tests for Component Leads, Terminations, Lugs, Terminals and Wires
J-STD-004
Requirements for Soldering Fluxes
J-STD-020
Moisture/Reflow Sensitivity Classification for Nonhermetic Solid State Devices
J-STD-033
Handling, Packing, Shipping and Use of Moisture/Reflow Sensitive Surface Mount Devices
3 SOLDERABILITY
Component solderability shall be evaluated and classified according to J-STD-002 or equivalent.
4 PROCESS
The process for using this specification is outlined in Figure 4-1.
The process begins with Supplier’s evaluating all component families against each ‘‘base’’ solder process condition defined
in this document and classifying the PSL. Components which cannot meet these ‘‘base’’ conditions are defined as being process sensitive. If the component can meet a defined solder process condition, its MSL shall be evaluated using that solder
process condition and J-STD-020. This MSL evaluation applies to all SMT components and through-hole components
evaluated for reflow soldering (e.g., paste-in-hole/intrusive soldering) assembly. Components shipped from Suppliers shall
be labeled and packed per J-STD-033 for MSL and this document for PSL (see clause 13).
4.1 Process Sensitivity Classification When a Supplier has determined that a component is process sensitive (e.g., the
2nd PSL character is > 0) because the component cannot be used in one or more of the base solder process conditions, the
Supplier shall review the Base Solder Process Exception Listings (see clauses 10 and 11) to determine if there are documented exception process conditions listed for that component (family). If component (family) exception conditions are
noted in Tables 10-1 or 11-1, those conditions shall be used to evaluate the component’s PSL compliance. If the Supplier’s
1. www.ipc.org
2. www.ipc.org
2
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ECA/IPC/JEDEC J-STD-075
Start
A
Classify PSL, MSL and solder
process compatibility.
Component meets base
solder process conditions?
Review J-STD-075 commodity base
solder process exception listings.
No
Yes
Component meets a specific
J-STD-075 solder process
exception condition?
Yes
No
Determine component unique solder process
exception condition and document.
Evaluate component MSL per J-STD-020 using the
base or exception solder process conditions as applicable.
Evaluate and determine any other unique component solder
process compatibility issues, e.g., cleaning, etc., and document.
Use the Standard Improvement Form in J-STD-075 to request update or
addition to the commodity exception listings at the next document revision.
Document component PSL, MSL and other unique
solder process compatibility issues to users.
Label per J-STD-075.
Label MSL and pack per J-STD-033.
No action
required.
No
Component, J-STD-075 or
J-STD-020 changes?
Yes
A
IPC-075-4-1
Figure 4-1
J-STD-075 Process
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component (family) meets the PSL as listed in the Base Solder Process Exception Listings, MSL shall be evaluated at those
process conditions.
Where a Supplier’s component cannot be used in one or more of the base solder process conditions and or that Supplier’s
component (family) does not comply with the classification as listed in the Base Solder Process Exception Listings, the Supplier shall:
a. Determine the process conditions (PSL and MSL) for which this component (family) may be used using the parameters
referenced in this standard as a common means of communication within the industry.
b. Document to Users and Assemblers acceptable process conditions until item c below has been completed.
c. Work with other Suppliers through that components standards development agency to have this standard updated to
include that component (family) in the Base Solder Process Exception Listings (see clauses 10 and 11). A Standard
Improvement Form is included in the back of this document to submit recommendations.
d. Use the process conditions in item b (until item c is published) to evaluate the components performance at that process
condition and subsequent Moisture Sensitivity analysis, classification and packaging labeling, as outlined above.
If a Supplier’s component is included in a Base Solder Process Exception Listings but that Supplier’s component capability is less than noted in the Tables 10-1 and 11-1, the Supplier shall use the classification they determined to be appropriate and document the acceptable process conditions, as per item b above.
4.2 PSL Reclassification The component (family) ability to meet these process conditions shall be re-evaluated by the
Supplier for any process change affecting material or component manufacturing process/controls.
4.3 PSL Evaluation The solder process evaluation includes the number of reflows, flux application, thermal profile and
subsequent wash processes outlined in this document.
The values in the Base Solder Process Exception Listings define the changes to the base solder process in order to safely
use the listed family of components (see clauses 10 and 11). Where a dash ‘‘–’’ is specified in Tables 10-1 or 11-1 there are
no changes to that parameter of the base solder process.
4.4 MSL Bake Out Unless otherwise noted, the bake out conditions outlined in J-STD-020 for moisture sensitive components shall apply. Suppliers should be contacted for support of other bake out conditions.
5 PSL CLASSIFICATION
Supplier’s shall evaluate and classify their component’s PSL to the worst case process limits as outlined in this specification for that commodity, per the classification scheme listed in this clause.
Tables 5-1 and 5-2 provide the wave solder and reflow solder PSL classification scheme. PSL classifications will always have
at least two characters and there may be an optional 3rd character. The first character defines the process being limited, with
‘‘W’’ used for wave soldering or ‘‘R’’ used for reflow soldering. These designations are intended to minimize confusion with
J-STD-020 moisture sensitivity levels. If a component meets or exceeds the base solder process conditions, PSL values of
‘‘W0’’ and or ‘‘R0’’ shall be used.
The 2nd character identifies the classification temperature (Tc). PSL designators R1 to R3 are not used in Table 5-2 at this
time so that the temperature classifications for W4 through W8 will be the same as R4 through R8. For example, the W5
wave temperature and R5 classification temperature are both 255 °C.
The 3rd character is optional and identifies other process limitations, as defined in Table 5-3. Exception Table 10-1 provides
examples of wave solder PSL classifications and exception Table 11-1 provides examples of reflow solder PSL classifications. Suppliers should be contacted for PSL and MSL classification information of their components.
Table 5-3 defines the limitations indicated by the optional PSL 3rd character.
The Supplier must be contacted for the details regarding the PSL 3rd character specified limitations. The worst case process
sensitivity should be recorded in all cases. If a component has both wave solder and reflow process limitations, both classifications should be established. Supplier shall have the supportive detail data available (e.g., data sheet) regarding their
components PSL classification.
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ECA/IPC/JEDEC J-STD-075
Table 5-1
PSL Classification
Wave Solder PSL Classification
Is the component process sensitive?
Classification Temp (Tc)
W0
No
–
W1
Yes1
275 °C (User Maximum and Supplier Minimum)
W2
Yes1
270 °C
W3
Yes1
265 °C
W4
Yes1
260 °C
W5
Yes1
255 °C
W6
Yes1
250 °C
W7
Yes1
245 °C
W8
Yes1
240 °C
W9
Yes1,2
–
rd
Note 1: See Table 5-3 if a 3 PSL character is specified.
Note 2: The component has been determined to be process sensitive but this standard does not specify the process sensitivity exceptions. The Supplier must
be contacted for recommended solder process conditions.
Table 5-2
PSL Classification
Reflow Solder PSL Classification
Is the component process sensitive?
Classification Temp (Tc)
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R0
No
–
R1
Yes1
N/A
R2
Yes1
N/A
R3
Yes1
N/A
R4
Yes1
260 °C (User Maximum and Supplier Minimum)
R5
Yes1
255 °C
R6
Yes1
250 °C
R7
Yes1
245 °C
R8
Yes1
240 °C
R9
Yes
1,2
–
Note 1: See Table 5-3 if a 3rd PSL character is specified.
Note 2: The component has been determined to be process sensitive but this standard does not specify the process sensitivity exceptions. The Supplier must
be contacted for recommended solder process conditions.
Table 5-3
PSL 3rd Character
PSL 3rd Character
(Blank)
Definition
Component has no additional process limitations beyond the Classification Temperatures listed in
Tables 5-1 or 5-2.
A
Component has a Thermal Spike limitation.
C
Component has a Preheat limitation.
E
Component has a Time in Wave limitation.
F
Component has a Time (tL) Above 217 °C liquidous temperature (TL) limitation.
G
Component has a Time (tp) Within 5 °C of Tc limitation.
H
Component has a Ramp Down Rate limitation.
J
Component has a Number of Passes/Reflows limitation.
K
Component has a Flux limitation.
M
Component has a Cleaning limitation.
N
Component has limitations: C; F; G and J.
P
Component has limitations: C; F; G and H.
R
Component has limitations C; F and G.
Y
Component has additional limitations but the combination has not been assigned a code. Details of
these unique limitations will need to be obtained from the Supplier.
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6 NUMBER OF PASSES/REFLOWS
All components supporting wave solder shall be capable of 2 passes, unless noted in the Base Solder Process Exception
Listings. All components supporting reflow processes shall be capable of 3 reflows unless noted in the Base Solder Process
Exception Listings.
7 REWORK
This document does not address the unique processes used in rework and Suppliers should be contacted for specific rework
limitations that may be associated with a component. It is necessary to pay close attention to the process effects imposed on
adjacent components and ensure that rework conditions do not exceed any of the adjacent component process limitations.
8 FLUX
Component families unable to withstand one or more of the following fluxes (outlined in J-STD-004 or equivalent) shall be
noted in the Base Process Exception Tables.
• Mildly to highly activated water soluble fluxes.
• No-clean fluxes.
• Corrosive Flux (e.g., fluxes with a pH 1-2) only for through-hole components and all SMT components where the Supplier has identified wave solder as an acceptable process for their component (family).
9 CLEANING
Components shall be capable of withstanding typical cleaning processes outlined in IPC-CH-65. Component families unable
to withstand one or more of the cleaning processes shall be noted in the Base Process Exception Tables.
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August 2008
ECA/IPC/JEDEC J-STD-075
10 BASE SOLDER PROCESS CONDITIONS - WAVE
This process shall apply to all through-hole components where the component body does not immerse in the solder wave
and all SMT components where the Supplier has identified full-wave submersion as an acceptable process for their component (family). This process includes lead-free solders. For SMT components (full wave submersion), all temperatures shall
be measured on the component body. For through-hole components (non-wave side placement), all temperatures are measured on the component lead. The base wave solder process conditions are as follows, except where noted in the Table 10-1:
Thermal Spike: The thermal spike from preheat to the wave solder shall be no more than 160 °C.
Wave Solder Temperature (max.): 275 °C
Total Time in Wave (max.): 10 seconds
Ramp-down Rate (average rate °C/s.): Not specified (see Table 10-1)
Thermal
Spike
Classification
Temperature
(Tc)
Time in
Wave
RampDown Rate
(Note 1)
Number of
Passes
Fluxes
Cleaning
PSL/Notes
Ceramic Chip
Capacitors
–
–
–
–
–
–
–
See Table
10-2
Non-Fused (MnO2)
Tantalum Capacitors
<2.5 mm in height
–
265 °C
–
–
–
–
–
W3A
Non-Fused (MnO2)
Tantalum Capacitors
≥2.5 mm in height
–
265 °C
–
–
–
–
–
W3A
Note 2
Non-Fused (Polymer)
Tantalum Capacitors
Note 3
Note 3
–
–
–
–
–
Note 3
Commodity
Through-Hole
Connectors
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Table 10-1 Base Solder Process Exceptions - Wave
(A Supplier’s component capability may be greater than noted in the Table)
See Supplier specific component wave solder information and
recommendations. PSL classification to this specification is required.
( – ) = No Exception Specified
Note 1: Ramp Down Rate is the average cooling rate in °C/s.
Note 2: Tantalum capacitors of this package size can have ‘‘solder shadowing’’ assembly issues, due to the component height.
Note 3: Only a minority of SMT polymer tantalum Suppliers support wave soldering (full wave submersion). Users and Assemblers should contact the Supplier
to verify wave solder support and allowable solder conditions for these SMT components.
Capacitors specified in Table 10-2 are components recommended for wave solder. A Supplier’s component capability may
be greater than noted in this Table.
Table 10-2
Ceramic Capacitors for Wave Soldering
Package
Dielectric
Capacitance Range
Chip Height (max)
0603
C0G
All Values
≤0.90 mm (35 mils)
0603
X7R & X5R
≤0.22µF
≤0.90 mm (35 mils
0603
Y5V
≤0.47µF
≤0.90 mm (35 mils)
0805
C0G
≤3.3nF
≤1.45 mm (57 mils)
0805
X5R,X7R,Y5V
≤1µF
≤1.45 mm (57 mils)
1206
C0G
≤10nF
≤1.6 mm (63 mils)
1206
X5R, X7R, Y5V
≤1µF
≤1.6 mm (63 mils)
It is not recommended to wave solder ceramic chip capacitors smaller than 0603 and larger than 1206.
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Classification
Temperature
(Tc)
Time (tp)
Within 5 °C
of Tc
Rampdown Rate
(Note 2)
Number of
Reflows
Fluxes
Cleaning
PSL/Notes
Aluminum Capacitors ≤6.3 mm Dia.
and height ≤4.5 mm
Min = 100 °C
Max = 150 °C
(90 s.)
30 s. max.
240 °C
5 s. max.
–
2
–
–
R8N
Aluminum Capacitors ≤6.3 mm Dia.
and height >4.5 mm
Min = 100 °C
Max = 150 °C
(90 s.)
30 s. max.
250 °C
5 s. max.
–
2
–
–
R6N
Aluminum Capacitors >6.3 mm Dia.
and ≤10 mm Dia.
Min = 100 °C
Max = 150 °C
(90 s.)
20 s. max.
240 °C
5 s. max.
–
2
–
–
R8N
Aluminum Capacitors >10 mm Dia.
Min = 100 °C
Max = 150 °C
(120 s.)
20 s. max.
230 °C
5 s. max.
–
2
–
–
R9N
Plastic Molded Polymer Aluminum
Capacitors with heights ≥1.8 mm and
voltage rating <12.5Volts
Max = 180 °C
(120 s.)
60 s. max.
250 °C
5 s. max.
–
2
–
–
R6N
Plastic Molded Polymer Aluminum
Capacitors with heights ≥1.8 mm and
voltage ratings ≥12.5volts
Max = 180 °C
(120 s.)
30 s. max.
above 200 °C
240 °C
5 s. max.
–
1
–
–
R8N
Plastic Molded Polymer Aluminum
Capacitors with heights ≤1.1 mm
Max = 180 °C
(120 s.)
30 s. max.
above 200 °C
240 °C
5 s. max.
–
2
–
–
R8N
Can Type Polymer Aluminum
Capacitors
Min = 100 °C
Max = 150 °C
(120 s.)
40 s. max.
250 °C
5 s. max.
–
2
–
–
R6N
Film Capacitors: Polyphenylene
Sulfide (PPS)
Max = 180 °C
(120 s.)
30 s. max.
260 °C
5 s. max.
–
2
–
–
R4N
Film Capacitors: Non-PPS Type
Max = 180 °C
(120 s.)
30 s. max.
240 °C
5 s. max.
–
2
–
–
R8N
Commodity
Preheat
Temperature
(Maximum Time)
August 2008
Time (tL)
Above 217 °C
Liquidous
Temperature
(TL)
(Note 1)
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Table 11-1 Base Solder Process Exceptions - Reflow
(A Supplier’s component capability may be greater than noted in the Table)
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This process shall apply to all SMT components and selective through-hole components where the Supplier has specifically documented support for reflow soldering
(paste-in-hole/selective soldering applications) for a specific component (family). This process includes lead-free soldering. All temperatures are measured on the top
center of the component body (package body surface facing up during assembly reflow), except for connectors. Due to the large variety of unique connector designs
and significant process sensitivity variability among connector Suppliers, the connector Supplier’s specification should be used for temperature measurement location
definition. The base reflow solder process conditions are defined by J-STD-020 (where the peak temperature (Tc) is specified as a function of the component size), except
where noted in Table 11-1.
ECA/IPC/JEDEC J-STD-075
8
11 BASE SOLDER PROCESS CONDITIONS - REFLOW
Classification
Temperature
(Tc)
Time (tp)
Within 5 °C
of Tc
Rampdown Rate
(Note 2)
Number of
Reflows
Fluxes
Cleaning
PSL/Notes
Plastic Molded Polymer Tantalum
Capacitors with voltage ratings
≤10 Volts
Max = 180 °C
(120 s.)
40 s. max.
250 °C
5 s. max.
–
2
–
–
R6N
Plastic Molded Polymer Tantalum
Capacitors with voltage ratings
>10 Volts
Max = 180 °C
(120 s.)
30 s. max.
250 °C
5 s. max.
–
2
–
–
R6N
Can/coin Type Electric Double Layer
Carbon - Special Capacitors
Min = 100 °C
Max = 150 °C
(120 s.)
30 s. max.
above 200 °C
235 °C
5 s. max.
–
2
–
–
R9N
Time
(Tsmin to Tsmax)
(ts) = 120 s. max.
90 s. max.
250 °C
10 s. max.
5 °C/s. max.
–
–
–
R6R
(85 s.)
65 s. max.
Note 4
20 s. max.
5 °C/s. max.
–
–
–
R P
Note 3
Min = 100 °C
Max = 150 °C
(90 s.)
60 s. max.
Note 4
20 s. max.
5 °C/s. max.
–
–
–
R R
Note 3
Non-Solid state Relays
Note 5
Note 5
250 °C
Note 5
Note 5
Note 5
–
–
R6
Note 3
LEDs
Note 5
Note 5
Notes 4
and 5
Note 5
Note 5
Note 5
–
–
R
Note 3
SMT Connectors for through hole
reflow
See Supplier specific component reflow information and recommendations. PSL classification to this specification is required.
Crystals; Oscillators; Resonators
Fuses
Inductors and transformers with
insulated wire type coils
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August 2008
Commodity
Preheat
Temperature
(Maximum Time)
Time (tL)
Above 217 °C
Liquidous
Temperature
(TL)
(Note 1)
ECA/IPC/JEDEC J-STD-075
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( – ) = No Exception Specified
Note 1: It may be very difficult to establish a soldering profile for a given assembly for components with tL <50 s.
Note 2: Ramp Down Rate is the average cooling rate in ° C/s.
Note 3: The underscore ‘‘ ’’ denotes that the omitted character shall be defined by the Supplier.
Note 4: Classification Temp (Tc), the PSL’s 2nd character, is based upon package thickness (height) and volume per J-STD-020 Table 4-1. A lower Classification Temp (Tc) may be used by Suppliers, if their component
can not meet the base solder process condition.
Note 5: There is industry consensus that this component is process sensitive. However, the supported soldering profile conditions vary widely by Supplier. The Supplier must be contacted for recommended solder
process conditions.
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9
ECA/IPC/JEDEC J-STD-075
August 2008
12 MSL CLASSIFICATION AND LABELING/PACKING
SMT components and selective through-hole components (where the pin though hole component Supplier has specifically
documented support for reflow soldering) shall be evaluated and classified per J-STD-020 and label and pack per J-STD033. The process profile shall be as outlined in J-STD-020, unless the component (family) is listed on the Base Reflow Solder Process Exception List. In that case, the conditions listed in the Exceptions List shall be used for the moisture sensitivity evaluation. Components (families) shall not be classified, with regard to moisture sensitivity, at process conditions
exceeding the PSL classification limits.
Care should be taken to insure that any noted failures are attributed to moisture effects and not other process effects. If a
fail mechanism can not be attributed to moisture, the component‘s (family’s) ability to meet the defined solder process
should be investigated. Each fail shall be attributed to either inability to meet the solder process (for example: ‘‘thermal’’)
or inability to withstand moisture absorption or both (where a fail can not be clearly separated into discrete causes).
13 PSL LABELING
Only components which are classified as process sensitive need to be labeled. Component Manufacturers shall publish their
component’s PSL classification and label (machine printed) their first level containers (tape and reel, bag or box) with the
PSL classification when the 2nd character of the PSL is >0. The recommended labeling is:
Wave Solder: ‘‘WARNING: PSL = W ’’, where ‘ ’ is the 2nd and 3rd (optional) PSL classification level characters.
Reflow: ‘‘WARNING: PSL = R ’’, where ‘ ’ is the 2nd and 3rd (optional) PSL classification level characters.
If a component is both wave solder and reflow process sensitive, both classifications shall be labeled, as outlined above.
Supplier shall have the supportive detail data available (e.g., data sheet) regarding their components PSL classification.
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Standard Improvement Form
ECA/IPC/JEDEC J-STD-075
Individuals or companies are invited
to submit comments. All comments
will be collected and dispersed to the
appropriate committee(s).
The purpose of this form is to provide
the Technical Committees with input
from the industry regarding usage of
the subject standard.
If you can provide input, please complete
this form and return to:
Electronic Components Association
2500 Wilson Blvd., Suite 310
Arlington, VA 22201-3834
Fax 703-875-8908
1. I recommend changes to the following:
Requirement, paragraph number
Test Method number
, paragraph number
The referenced paragraph number has proven to be:
Unclear
Too Rigid
In Error
Other
2. Recommendations for correction:
3. Other suggestions for document improvement:
Submitted by:
Name
Telephone
Company
E-mail
Address
City/State/Zip
Date
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