Chapter Five
The MOSFET Switch
(1)
For this problem, consider the convention that a logical one corresponds to a high voltage level
and a logical zero corresponds to a low voltage level. Thus, when the voltage vA associated with
the Boolean variable A is high (3V), A =1. When vA is low(≈ 0V), A = 0. The same relation holds
with vB and B, vC and C. Assume also the following
•
The high voltage level is much greater than the threshold voltage.
•
The“on”resistance of theMOSFET is 100Ω.
•
The“off”resistance of theMOSFETis 100MΩ.
Then,for each circuit in Fig.2:
a. Generate a truth table which shows how the variable C (associated with vC) depends on the
inputs A(associated with vA)and B (associated with vB).
b. For each particular entry of C in the corresponding truth table of part a., find the value of the
output voltage vc .
(2)
The digital circuit below has logic inputs P1, P2, ... Pn, S1, S2, ... Sm and output X. Assuming that
the element values are chosen so that the circuit satisfies a static discipline, what is the logic
function computed by the circuit?
In this problem the switch-resistor model of the MOSFET is expanded to include a finite gatesource resistance RG. The corresponding model for the MOSFET is shown below.
(3)
Two inverters are connected in series as shown below. The MOSFET in both inverters has a finite
gate-source resistance as modeled above. For this circuit, sketch and clearly label the transfer
function for the first inverter, that is, vOUT as a function of vIN, over the range 0 ≤ vIN ≤ VS in the
space given below. Assume that VS > VT.
Now consider the case in which the output of the first inverter is connected to the input of N
identical inverters as shown below. Assuming that VT, RON and RG are all given, over what range
must RPU be designed so that the first inverter can successfully switch the states of the successive
inverters. That is, over what range must RPU be designed so that vOUT> VT when vIN< VT, and
vOUT< VT when vIN> VT. Again assume that VS> VT.