www. Micro Digital Ed. com
CSE 324
Embedded Systems
Lecture 3
AVR Architecture and
Assembly Language
Programming (1)
Mostafa I. Soliman
Professor of Computer Engineering
(Computer Architecture & Parallel Processing)
CSE Department
mostafa.soliman@ejust.edu.eg / mossol@yahoo.com
BIHE university
Contents
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BIHE university
• AVR’s CPU
• Loading Values into the General Purpose Registers
• Immediate Instructions
• Register-Register Arithmetic Instructions
• Load and Store Instructions
• In and Out Instructions
• Data RAM Memory Space
CSE 324 Embedded Systems
Genius is 1% inspiration
and 99% perspiration
A successful person
should have good ideas,
but the most important
thing is to work very
hard.
Thomas Edison
2
Microcontroller
AVR Internal Architecture
RAM
ROM
I/O
Port
Timer
Serial
Port
CPU
Buses
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GP Registers,
I/O memory,
Internal SRAM
Flash
Memory
BIHE university
Whenever the size of RAM is
mentioned the internal SRAM size
is meant (read/write scratch pad).
RAM
EEPROM
Interrupt
Unit
Ports
Timers
PROGRAM
ROM
Program
Bus
EEPROM
stores critical
data that does
not need to be
changed very
often.
CPU
CPU
Bus
OSC
I/O
PINS
Oscillator
CSE 324 Embedded Systems
Other
Peripherals
AVR’s CPU
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BIHE university
The AVR is an 8-bit RISC microcontroller
• # Instructions: 130
• RISC: It use registers to
store data temporarily
• 8-bit: data type
• Regs: 8-bit registers
• 95% (1cc) + 5 (2cc)
R0
R1
ALU
R2
…
• Larger data: must be
broken into 8-bit chunks
CSE 324 Embedded Systems
I
T
H S V
N Z
C
CPU
PC
Instruction decoder
R15
R16
R17
…
• AVR’s CPU
– ALU
– 32 General Purpose
registers (R0 to R31)
– PC register
– Instruction decoder
SREG:
R30
R31
Instruction Register
registers
4
AVR Registers
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• 32x8-bit general purpose registers
• R0-R31 are located in the lowest location of memory
address
• They can be used by all arithmetic and logic
instructions
– Example: LDI instruction
• PC (program counter) points to the address of the
next instruction to be executed
– ATmega32 has Flash is 32K bytes (16Kx16)
 PC is 14 bits wide
CSE 324 Embedded Systems
5
Some Simple Instructions
1. Loading values into the general-purpose registers
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BIHE university
LDI (Load Immediate)
; 16-bit instruction
Copies 8-bit data into the general purpose registers.
• LDI Rd, k (16-bit inst. = 4-bit opcode + 4-bit Reg + 8-bit imm.)
•
–
Rd ← k
–
–
Rd is Rl6 to R31 (upper 16 general purpose registers)
K is an 8-bit value (0-255 decimal or FF in hex)
Example:
–
–
–
–
; for comments
LDI R16, 53
; R16 = (53)10
LDI R19, $27
; R19 = (27)16
LDI R23, 0x27
; R23 = (27)16
LDI R23, 0b11101100 ; R23 = (EC)16 = (236)10
CSE 324 Embedded Systems
6
16-bit Immediate Instructions
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Opcode Rd, k (xxxx kkkk dddd kkkk)
• 4-bit Opcode xxxx
• 8-bit K is 8-bit constant (kkkk kkkk)
• 4-bit Rd is Rl6 to R31 (dddd)
Description
Operation
Flags
o Load Immediate
Rd ← K
None
o Set Register
Rd ← $FF
None
o Logical AND Reg. and Constant
Rd ← Rd AND K
Z,N,V
Rd ← Rd AND (FF - K)
Z,N,V
o Clear Bit(s) in Register
o Logical OR Register and Constant
Rd ← Rd OR K
Z,N,V
o Set Bit(s) in Register
Rd ← Rd OR K
Z,N,V
o Compare Register with Constant
Rd - K
Z,N,V,C,H
o Subtract with Carry K from Reg.
Rd ← Rd - K – C
Z,C,N,V,H
o Subtract Constant from Register
Rd ← Rd - K
Z,C,N,V,H
CSE 324 Embedded Systems
Instruction
ldi Rd,K
ser Rd
andi Rd,K
cbr Rd,K
ori Rd,K
sbr Rd,K
cpi Rd,K
sbci Rd,K
subi Rd,K
OpCode
1110
KKKK dddd
KKKK
1110
1111
1111
0111
KKKK dddd
KKKK
0111
KKKK dddd
KKKK
0110
KKKK dddd
KKKK
0110
KKKK dddd
KKKK
0011
KKKK dddd
KKKK
0100
KKKK dddd
KKKK
0101
KKKK dddd
KKKK
dddd
7
Some Simple Instructions
2. Arithmetic calculation
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• ADD Rd, Rr
; 16-bit instruction
0 ≤ d ≤ 31, 0 ≤ r ≤ 31
16-bit inst. = 6-bit opcode + 5-bit Rd Reg + 5-bit Rr Reg.
– Rd = Rd + Rr
– ADD R25, R9
• R25 = R25 + R9
– ADD R17,R30
• R17 = R17 + R30
CSE 324 Embedded Systems
8
16-bit Arithmetic/Logic Instructions: Op Rd, Rr
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Description
Operation
Flags
Instruction
o Add with Carry two Registers
Rd ← Rd + Rr + C Z,C,N,V,H adc Rd,Rr
o Add two Registers
Rd ← Rd + Rr
Z,C,N,V,H
o Logical AND Registers
Rd← Rd AND Rr
o Compare
o Compare with Carry
o Compare, Skip if Equal
OpCode
0001 11rd
dddd
rrrr
add Rd, Rr
0000 11rd
dddd
rrrr
Z,N,V
and Rd, Rr
0010 00rd
dddd
rrrr
Rd - Rr
Z,N,V,C,H
cp Rd, Rr
0001 01rd
dddd
rrrr
Rd - Rr - C
Z,N,V,C,H
cpc Rd, Rr
0000 01rd
dddd
rrrr
0001 00rd
dddd
rrrr
if (Rd = Rr) PC ← PC + 2 or 3 None cpse Rd, Rr
o Exclusive OR Registers
Rd← Rd XOR Rr
Z,N,V
eor Rd, Rr
0010 01rd
dddd
rrrr
o Move Between Registers
Rd ← Rr
None
mov Rd, Rr
0010 11rd
dddd
rrrr
o Multiply Unsigned
R1:RO ← Rd x Rr
Z,C
mul Rd, Rr
1001 11rd
dddd
rrrr
o Logical OR Registers
Rd← Rd OR Rr
Z,N,V
or Rd, Rr
0010 10rd
dddd
rrrr
Z,C,N,V,H
sbc Rd, Rr
0000 10rd
dddd
rrrr
Z,C,N,V,H
sub Rd, Rr
0001 10rd
dddd
rrrr
o Subtract with Carry two RegistersRd←
o Subtract two Registers
CSE 324 Embedded Systems
Rd - Rr - C
Rd← Rd - Rr
9
A simple program
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• Write a program that calculates 19 + 95
LDI R16, 19
;R16 = 19
LDI R20, 95
;R20 = 95
ADD R16, R20
;R16 = R16 + R20
R0
R1
R2
ALU
…
SREG: I T H S V N Z C
CPU
PC
…
Instruction decoder
R30
R31
Instruction Register
CSE 324 Embedded Systems
R15
R16
R17
registers
10
A simple program
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BIHE university
• Write a program that calculates 19 + 95 + 5
LDI
R16, 19
;R16 = 19
LDI
R20, 95
;R20 = 95
LDI
R21, 5
;R21 = 5
ADD
R16, R20
;R16 = R16 + R20
ADD
R16, R21
;R16 = R16 + R21
LDI
R16, 19
;R16 = 19
LDI
R20, 95
;R20 = 95
ADD
R16, R20
;R16 = R16 + R20
LDI
R20, 5
;R20 = 5
ADD
R16, R20
;R16 = R16 + R20
BUG:
ADC
CSE 324 Embedded Systems
R16, R20
;R16 = R16 + R20 + C
11
Some simple instructions
2. Arithmetic calculation
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BIHE university
• SUB Rd,Rs
– Rd = Rd - Rs
• Example:
– SUB R25, R9
• R25 = R25 - R9
– SUB R17,R30
ALU
…
• R17 = R17 - R30
R0
R1
R2
SREG: I T H S V N Z C
CPU
PC
…
Instruction decoder
R30
R31
Instruction Register
CSE 324 Embedded Systems
R15
R16
R17
registers
12
Some simple instructions
2. Arithmetic calculation
www. Micro Digital Ed. com
BIHE university
• INC Rd
– Rd = Rd + 1
• Example:
– INC R25
• R25 = R25 + 1
R0
R1
R2
ALU
– Rd = Rd - 1
– DEC R23
• R23 = R23 - 1
CSE 324 Embedded Systems
SREG: I T H S V N Z C
CPU
R15
R16
R17
PC
…
• Example:
…
• DEC Rd
Instruction decoder
R30
R31
Instruction Register
registers
13
THE AVR DATA MEMORY
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• Memory space
– code memory space (stores program code)
– data memory space (stores data)
• GPRs (32 general purpose registers)
– Data memory: 32 bytes
– address locations: 0x00-0x1F
• I/O memory (SFRs)
– 8-bit Special Function Registers
status register, timers,
serial communication,
I/O ports, ADC,….
– 64-byte section (standard)
• internal data SRAM
– Storing data
CSE 324 Embedded Systems
14
Data Memory Size for AVR Chips
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• Data memory (SRAM) =
GPRs + SFRs + Internal SRAM
CSE 324 Embedded Systems
15
Load and Store 32-Bit Instructions
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• LDS Rd, k
; Load from memory location k to register Rd
; (LDS = LoaD direct from data Space)
1001 000d dddd 0000
kkkk kkkk kkkk kkkk
– 0 ≤ d ≤ 31, 0 ≤ k ≤ 65535 (16-bit data memory = ?+?+?)
– LDS Rd ← (k) ; direct or absolute addressing mode
– LDS R20, 0x1 ; copies R1 to R20
• Example:
add the contents of location 0x300 to location 0x302
LDS R0, 0x300
LDS R1, 0x302
ADD R1, R0
CSE 324 Embedded Systems
16
STS: STore direct to data Space
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• STS k, Rr
; Store register Rr in memory location k
– STS is a 4-byte (32-bit) instruction
1001 001r rrrr
0000
kkkk kkkk kkkk kkkk
– 0 ≤ r ≤ 31, 0 ≤ k ≤ 65535
– STS (k) ← Rr ; direct or absolute addressing mode
– STS 0x1, R10 ; copies R10 to R1
• XXX STI (STore Immediate value) XXX illegal
• Moves 0x55 to I/O registers of ports B, C, and D.
LDI R16, 0x55
STS 0x38, R16 ; copy R16 to Port B (PORTB = 0x55)
STS 0x35, R16 ; copy R16 to Port C (PORTC = 0x55)
STS 0x32, R16 ; copy R16 to Port D (PORTD = 0x55)
CSE 324 Embedded Systems
17
IN / OUT 16-Bit Instructions
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• IN Rd, A
; load from Address A of I/O memory into register Rd
; GPR  I/O Reg.
1011 0AAd dddd AAAA
– 0 ≤ d ≤ 31, 0 ≤ A ≤ 63 ; A = 6-bit I/O address
= relative address from beginning of the I/O memory (20)16
– IN Rd ← A
• OUT A, Rr
; Store register Rr in I/O memory location A
1011 1AAr rrrr
AAAA
– 0 ≤ d ≤ 31, 0 ≤ A ≤ 63
– OUT A ← Rr
CSE 324 Embedded Systems
18
Data Address Space
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Extended
I/O Memory
$00FF
$40
$41
$42
$43
$44
R0
R1
$45
R2
$46
$47
R31
$48
$49
$4A
$4A
EEPROM
CPU
Timers
address bus
data bus
control bus
Data
Bus
Ports
I/O
Other
Peripherals
Example: Add contentsExample:
of location
0x90
to contents
of location
0x95
Store
0x53
into PINS
the SPH
register.
Example:
doesinthe
following
instruction
do?space)
and store What
theExtended
result
location
0x313.
LDS
(Load
direct
from
data
STS
(Store
direct
to
data
The
address
of
SPH
is
0x5E
Example:
Write
a
program
that
stores
55
into
location
0x80 of RAM.
Example: Write
a program that copies the contentsspace)
of location
0x80
I/O Memory
LDS
R20,2
Solution:
of RAM
into location 0x81.
LDS
addr ;[addr]=Rd
;Rd = [addr]
STS Rd,
addr,Rd
$005F
SREG
$3E
$3F
$0060
$01FF
$0100
...
$4C
SPCR0
$2C
TIFR1
TIFR2
$4D
SPSR0
$2D
$4E
SPDR0
$2E
RAM
General
$4F
$2F
Purpose
ACSR
$50
$30
PROGRAM
PCIFR
Registers
DWDR
$51
$31
ROM
EIFR
$52
$32
EIMSK
$53
SMCR
$33
Program
GPIOR0
Data
$54
MCUSR
$34
Bus
EECR
$55
$35
MCUCR
Bus
EEDR
$56
$20
$36
EEARL
$57
$21
$37
SPMCSR
EEARH
$58
$22
$38
$23
GTCCR
$59
$39
Data
TCCR0A
$5A
$24
$3A
Address
TCCR0B
$5B
$25
$3B
$0000
TCNT0
$5C
$26
General
$3C
Interrupt
OSC
Purpose
OCR0A
$5D
$27
$3D
SPL
Unit
Registers
$001F
OCR0B
$5E
$28
$3E
SPH
$5F
$29
$3F
SREG
$0020
I/O Address
Standard I/O
GPIOR1
$2A
$00
Registers
$01
$2A
GPIOR2
(SFRs)
$0200
Internal
SRAM
R20, 0x90 Solution:
;R20 = [0x90]
Solution:
Answer:
SP (stack pointer) 16-bit register = SPH:SPL
LDS R20,
R21, 0x95 ;R20
[0x95]
LDI =;R21
R20,= 0x53
;R20 = 0x53
External 55 Example:
LDI
55
Solution:
SRAM
It copies
the
contents
of
into
R20;
as+ 2R21
is the;SPH
address
ADD
R20,
R21
= R20
STSR2 ;R20
0x5E,
R20
= R20of R2.
STS
0x80,
R20
;[0x80]
=
R20
=
55
ATmega640/V
LDS R20, 0x80 LDS
;R20
= [0x80]
0x60
STS R1,
0x60,R15
; [0x60] = R15
ATmega1280/V
Internal
SRAM
LDS
...
...
$0060
Name
$16
$17
$18
$19
$1A
$1B
$1C
$1D
$1E
$1F
...
$005F
$36
$37
$38
$39
$3A
$3B
$3C
$3D
$3E
$3F
Address
Mem.
I/O
Name
...
...
...
$20
$00
$21
$01
$22
$02
$23
$03
PINB
$24
$04
DDRB
$25
$05
PORTB
$26
$06
PINC
$27
$07
DDRC
$28
$08
PORTC
$29
$09
PIND
$2A
$0A
DDRD
$2B
$0B
PORTD
$2C
$0C
$2D
$0D
Data
$2E
$0E
Address
$2F
$0F
$0000
$30
$10
General $31
$11
Purpose Registers $32
$12
$001F
$33
$13
$0020
Standard
I/O
$34
$14
Registers
$35
$15
(SFRs) TIFR0
Address
Mem.
I/O
...
Name
...
Address
Mem. I/O
$21FF
$2200
External
SRAM
$FFFF
$FFFF
ATmega328
ATmega64
ATmega128
STS ATmega1281/V
0x313, R20
STS ATmega2560/V
0x81, R20
;[0x313] = R20
;[0x81] = R20 = [0x80]
ATmega2561/V
CSE 324 Embedded Systems
19
Data Address Space
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BIHE university
PROGRAM
ROM
Program
Bus
$005F
Standard I/O
Registers
(SFRs)
$00
$01
...
...
Other
Interrupt
SREG
PINS
$0060
$3E
$3F
Extended
Solution:
I/O Memory
$01FF
IN
R20,PINC
$0200
Internal
SRAM
address bus
data bus
control bus
OSC
Ports
Example:
I/O
$001F Write a program that adds the contents of the PINC
Peripherals
Unit
IN
(IN
from
IO
location)
$0020 Standard I/O
Using
Names
of I/O
registers
register
to Registers
the contents of PIND
and (OUT
storestothe
in location 0x90
OUT
I/Oresult
location)
I/O
(SFRs)
of the SRAM
$005F
$00FF
$0100
Data
Bus
Timers
I/O Address
$0060
Extended
I/O Memory
General
Purpose
Registers
...
R31
EEPROM
...
...
$0020
$0000
Internal
SRAM
...
$001F
General
Purpose
Registers
...
...
$0000
CPU
RAM
Data
Bus
Data
Address
R0
R1
R2
...
Data
Address
General
Purpose
Registers
IN R21,PIND
$2200
$21FF
External
SRAM
$FFFF
External
SRAM
ADD R20,R21
$FFFF
ATmega328
ATmega64
ATmega128
CSE 324 Embedded Systems
ATmega640/V
ATmega1280/V
STS
0x90,R20
ATmega1281/V
ATmega2560/V
ATmega2561/V
IN Rd,IOaddress ;Rd = [addr]
Example:
OUT IOAddr,Rd ;[addr]=Rd
OUT =SPH,R12
;R20
PINC
;OUT
0x3E,R12
Example:
;IN
R15,0x3F
IN
;R21
=R15,SREG
PIND
Example:
IN =R1,
0x3F
= SREG
;R20
R20
+ R21;R1
OUT
0x3F,R12
;SREG = R12
IN R17,0x3E
;[0x90]
= R20
;R17 = SPH
OUT 0x3E,R15 ;SPH = R15
20
Example
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BIHE university
• State the contents of R20, R21, and data memory location
0x120 after the following program:
LDI R20, 5
LDI R21, 2
ADD R20, R21
ADD R20, R21
STS 0x120, R20
• Solution:
CSE 324 Embedded Systems
21
MOV Instruction
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MOV Rd, Rr
0010 11rd dddd rrrr
• Move between registers (Rd ← Rr)
• Flags: None
• The MOV instruction is used to copy data among
the GPR registers of R0-R31.
MOV Rd, Rr
; Rd = Rr (copy Rr to Rd)
; Rd and Rr can be any of the GPRs
MOV R10,R20
CSE 324 Embedded Systems
;R10 = R20 (copy R20 to R10)
22
AVR Status Register: SREG
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• C, the carry flag
BIHE university
– set whenever there is a
carry out from the D7 bit.
• Z, the zero flag
– If the result is zero, then Z = 1 else, Z = 0
• N, the negative flag (for the signed number arithmetic operations)
– If the D7 (sign bit) of the result is zero, then N = 0 (positive result)
– If the D7 (sign bit) is one, then N = 1 (negative result).
• V, the overflow flag
– set whenever the result of a signed number operation is too
large, causing the high-order bit to overflow into the sign bit.
• S, the Sign bit
– This flag is the result of XOR of N and V flags.
• H, Half carry flag
– Set if there is a carry from D3 to D4 during an ADD or SUB.
– This flag bit is used by instructions that perform BCD arithmetic.
CSE 324 Embedded Systems
23
Status Register (SREG)
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I
T
H
S
Interrupt
Temporary
Half carry
N
V
Z
oVerflow
C
Zero
Carry
Negative
Sign
N+V
Data Address
Space
...
$0000
$0001
…
SREG: I T H S V N Z C
CPU
$0020
$00
$01
$005F
R15
R16
R17
PC
…
Instruction decoder
R30
R31
Instruction Register
IO Address
Standard IO
Registers
SPH
SREG
$3E
$3F
$0060
...
ALU
$001F
...
R0
R1
R2
General
Purpose
Registers
...
SREG:
registers
$FFFF
CSE 324 Embedded Systems
24
Set/Clear Flags
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Instruction
Description
o CLC
Clear Carry Flag
o CLH
Clear Half Carry Flag
o CLI
Global Interrupt Disable Flag
o CLN
Clear Negative Flag
o CLS
Clear Signed Test Flag
o CLT
Clear T Flag
o CLV
Clear Overflow
o CLZ
Clear Zero Flag
o SEC
Set Carry Flag
o SEH
Set Half Carry Flag
o SEI
Global Interrupt Enable
o SEN
Set Negative Flag
o SES
Set Signed Test Flag
o SET
Set T Flag
o SEV
Set Overflow Flag
o SEZ
Set Zero Flag
CSE 324 Embedded Systems
Operation
Flag
c←0
H←0
I←0
N←0
s←0
T←0
v←0
z←0
c←1
H←1
I←1
N←1
s←1
T←1
v←1
z←1
c
H
I
N
s
T
v
z
c
H
I
N
s
T
v
z
OpCode
1001 0100
1001 0100
1001 0100
1001 0100
1001 0100
1001 0100
1001 0100
1001 0100
1001 0100
1001 0100
1001 0100
1001 0100
1001 0100
1001 0100
1001 0100
1001 0100
1000 1000
1101 1000
1111 1000
1010 1000
1100 1000
1110 1000
1011 1000
1001 1000
0000 1000
0101 1000
0111 1000
0010 000
0100 1000
0110 1000
0011 1000
0001 1000
25
T (Temporary) Flag
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• T flag is used to copy a bit of data from one GPR to
another GPR.
– BST Rd, b
– BST R17, 3
(Bit Store from register to T Flag) instruction
; store bit 3 from R17 to the T flag
– BLD Rr, b
(Bit Load from T Flag to register) instruction
– BLD R19, 5
; copy the T flag to bit 5 in R19
CSE 324 Embedded Systems
26
References
www. Micro Digital Ed. com
BIHE university
• Sepehr Naimi
www.NicerLand.com
www.MicroDigitalEd.com
• The AVR Microcontroller and Embedded Systems Using
Assembly and C, 2nd Edition, 2014.
Muhammad Ali Mazidi, Sepehr Naimi, and Sarmad Naimi
• https://embarc.org/man-pages/as/AVR-Opcodes.html
CSE 324 Embedded Systems
27
Arithmetic and Logic Instructions
www. Micro Digital Ed. com
BIHE university
CSE 324 Embedded Systems
28
Arithmetic and Logic Instructions
www. Micro Digital Ed. com
BIHE university
CSE 324 Embedded Systems
29