Micro controllers and interfacing (TIMERS)
Assignment
Q1: Assume there is a 6-bit timer clocked by a 1 MHZ clock (CPU Frequency). Once
you enable the timer, after how much time (max possible) the overflow will occur?
– (Assume Pre-scalar register to be 6 bit as well)
Answer:
As we know that :
(CPU frequency) / (PSC +1) = frequency
And CPU frequency = 1Mhz
And as we have to take the maximum possible value for the time So the value of PSC will be
PSC = 26-1= 63
Thus, the formula becomes
(1*106) / (63+1) = 15625 Hz
As,
time = 1 / frequency = 1 / 15625 sec
time = 64 micro secs
total time = time * 64 = 64 micro *64 secs = 4.096 milli seconds
Q2: If you are using TIMER 6, how long will the counter take to overflow assuming the
maximum possible value of ARR?
((PSC +1) / (CPU frequency)) * (1+ARR) = total time taken
ASSUMING REFERENCE MANUAL VALUES
As we are using Timer 6 using the reference manual
CPU frequency = 84 MHz
Max PSC = 216 – 1= 65535
Max ARR =216 – 1= 65535
Thus, our formula becomes
total time taken = ((PSC +1) / (CPU frequency)) * (1+ARR)
= ((65535 +1) / (84*106)) * (1+65535)
total time taken = 51.1305 secs
ASSUMING CPU FREQUENCY BE 1MHz
total time taken = ((PSC +1) / (CPU frequency)) * (1+ARR)
= ((65535 +1) / (1*106)) * (1+65535)
total time taken = 4294.9672 secs