A
Project Report
on
“-------------------Project Title-------------------”
Submitted in partial fulfillment for the award of the degree of
Bachelor of Technology
in
Computer Science & Engineering
Submitted To:
Submitted By:
Guide Name
Student Name, Roll No.
Assistant Professor
Student Name, Roll No.
Student Name, Roll No.
Department of Computer Science and Engineering
Ganga Institute of Technology & Management,
Kablana, Jhajjar-124104 (Haryana)
May, 2023
CERTIFICATE
This is to certify that the project work entitled “<project Title bold>,” is original and have been
carried out by us in the partial fulfillment for the award of the degree of Bachelor of Technology
in Computer Science & Engineering to the Department of Computer Science & Engineering,
Ganga Institute of Technology and Management, Kablana, Jhajjar, Haryana, for duration of six
months, is an authentic record of their work carried out under my supervision. The matter
presented in this project work has not been submitted, in part or in full, for any other degree or
diploma of this or any other university.
Candidates: _____________________________________
<Student Name>, Roll No.
<Student Name>, Roll No.
<Student Name>, Roll No.
Guide: _____________________________________
< Name >
Assistant Professor
Department of Computer Science & Engineering
Ganga Institute of Technology and Management, Kablana, Jhajjar-124103
DECLARATION
This is to certify that the project work entitled “project Title<bold>,” has been carried out by
us in the Department of Computer Science & Engineering, Ganga Institute of Technology and
Management, Kablana, Jhajjar, Haryana. This work has not been submitted for similar purpose
anywhere else. We shall be solely responsible for any dispute arising out of our project work.
Signed: _____________________________________
<Student Name>, Roll No.
<Student Name>, Roll No.
<Student Name>, Roll No.
ACKNOWLEDGEMENTS
No task is a single man’s effort. Various factors, situations and persons integrate to provide the
background for the accomplishment of a task. Similarly, this project work could not have been
realized without a great deal of guidance and both mental and practical support. We would like
to deeply thank those people who provided us with everything we needed during the time in
which this project work lasted.
First and foremost, we owe our heartfelt thankfulness to our guide, <Guide Name>. We are
very grateful for his insightful guidance, invaluable support, and understanding. Without
his/her constant guidance, encouragement, support and stress-free environment, we would not
have reached this point. Despite his/her busy schedule, he/she has made himself available to
clarify our doubts.
We would also like to thank our respected HOD and faculty members of CSE department for
providing us the opportunities, support and the necessary help to complete this project work.
We are also very thankful to Prof. (Dr.) Aman Aggarwal, Director, Ganga Institute of
Technology and Management for providing all the resources to carry out the project work at
the department.
We would like to thank all the laboratory staff for providing the laboratory support in terms of
software etc., whenever we needed. At last we wish to express our heartfelt gratitude to our
friends, who have supported and helped us in the past four years.
Finally, the existent journey is placed in the holy feet of almighty.
With Gratitude to the Existence.
Signed: _____________________________________
<Student Name>, Roll No.
<Student Name>, Roll No.
<Student Name>, Roll No.
ABSTRACT
400 Words
CONTENTS
Certificate
i
Candidate’s Declaration
ii
Acknowledgements
iii
Abstract
v
Contents
vii
List of Tables
xiv
List of Figures
xvi
1. INTRODUCTION
1-16
1.1
Introduction
1
1.2
Sources of Power Dissipation in CMOS Circuit
3
1.2.1 Dynamic Power Dissipation
4
1.2.2 Short Circuit Power Dissipation
5
1.2.3 Glitching Power Dissipation
7
1.2.4 Static Power Dissipation
7
1.3
Circuit Level Power Reduction Techniques
10
1.4
Motivations
11
1.4.1 Need for Portability
12
1.4.2 High Performance
12
1.4.3 Reliability
13
1.5
Objectives of the Research Work
14
1.6
Publications
14
1.6.1 International Journals (04 Articles)
14
1.6.2 International Conference (03 Articles)
15
1.6.3 Research Paper Communicated (01 Articles)
15
Thesis Organization
15
17-41
1.7
2. NAME OF SECOND CHAPTER
2.1
Introduction
34
2.2
Design of XNOR and XOR Gates
37
LIST OF TABLES
Table
1.1
1.2
1.3
2.1
2.2
3.1
3.2
Title
Truth table of full adder
Output voltage levels of proposed XNOR gate
Output voltage levels of 5T XNOR/XOR cell
Output level variations versus supply voltage for 3T XOR & 5T XNOR
Performance of 8T full adder
Power dissipation of MCML and proposed PFD
Transistor sizing with L = 0.18 µm
Page
35
40
40
43
45
47
55
LIST OF FIGURES
Figure
Title
Page
1.1
Circuit transition (a) Dynamic charging (b) Dynamic discharging
3
1.2
Short circuit current
4
1.3
Leakage current components
5
2.1
Structure of single bit full adder
35
2.2
2.3
2:1 multiplexer circuit with (a) Pass transistor logic (b) Transmission
gate
Design of proposed 3 transistors XNOR gate
36
39