SiPM BIAS and AMPLIFIER
CIRCUIT
G. FELICI
LNF-INFN
SIPM POWER SUPPLY!
D.BADONI - G. FELICI
EDIT 2015 – FRASCATI OCTOBER 20-29
2
SiPM BIAS (I)
The Problem
u
8 SiPMs
u
Each SiPM has a different working point
FLCFLC
-SiPM
TWO POSSIBLE APPROACHES
he SiPM gain strongly depended of the bias voltage, so it has to be
1st : use a DAC to move
SiPM reference
adjusted
for each diode.
• Very cheap using multi-channels DAC
An 88-bit DAC
wastoadded
parallel
• Easy
integratein
in ASIC
designto each input of preamplifier.
The DAC
provide
to 5 inVmain
bias
• Very
low rippleup
required
HVvoltage
generator moderation.
•
SiPM working point setup is a bit tricky (single SiPM working points are not independent)
HV=VBREAKDOWN+VREF DAC
VSIPM = HV - VDAC
D.BADONI - G. FELICI
EDIT 2015 – FRASCATI OCTOBER 20-29
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be used to explain the DC performance of the voltage controller.
SiPM BIAS (II)
The di↵erential voltage at the op-amp is zero, which means that the op-amp is trying
to pull the voltage in the inverting node to Vr . A current flows through the resistor
R7 which is equal to
2nd : use Main Voltage Generator and different regulators to adjust the single SiPM working point
The regulators behave also like a filter
tor /R
reduce
the Main Voltage Generator ripple
I7 = V
7.
Independent SiPM working points adjustment
More
space
required
(sizeisofI the
Thecomponents
op-amp drawsand
no PCB
current
in the
input, that
= board
0. Theincreased)
same current I7
u
u
u
flows through the resistor R6 . Therefore,
Simplified version of Beissel voltage controlling circuit
Vi
RE
IDEAL AMP OP
gain=∞
ZIN=∞
ZOUT=∞
BW=∞
Lb
I6 + Ib
CE
Ib
R6
I
Vb
Cb
I6
u
u
R7
+
u
I7
u
Vr
Figure 3.11: Highly simplified circuit of the Beissel voltage controlling circuit
modified in this thesis, see fig. A.3 for detailed circuit elements. The voltage at
HOW DOES IT WORK
? Vb is set by the op-amp according to eq. (3.2). This simplified circuit is valid
node
u
Assuming an
operational only
amplifier
the voltage
at no
thecurrent
inverting
node at
we’ll
forideal
DC performance
and especially
when
is drawn
the be
Vb Vnode,
r, then I7=Vr/R7
i.e.
I
=
0.
b
u
The same current
will flow through R6 (ZIN=∞)à Vr/R7= (Vb –Vr)/R6
u
u
Then if Vi > Vb (the transistor must be polarized) à Vb=(1+R6/R7)*Vr
Adjusting the R6/R7 ratio or Vr value we can adjust the SiPM working voltage
D.BADONI - G. FELICI
EDIT 2015 – FRASCATI OCTOBER 20-29
4
PREAMPLIFIERS!
D.BADONI - G. FELICI
EDIT 2015 – FRASCATI OCTOBER 20-29
5
VOLTAGE PREAMPLIFIER
PREAMPLIFIER=INPUT AMPLIFIER
u
u
u
Generally located on the detector (ON-DETECTOR ELECTRONICS)
Amplify the signal optimizing the signal-to-noise ratio
Three basic configurations:
u
Voltage preamplifier
u
Current preamplifier
u
Charge preamplifier
VOLTAGE PREAMPLIFIER (for sensors generating voltage signals or as second
stage for sensors generating current signals)
AV
i(t ) ↓
Cdet
en
Vout =
Qin
Ctot
Ctot = Cdet +C conn + Cin _ pre
Ctot can change as a function of detector working parameters or PT à Vout changes
D.BADONI - G. FELICI
EDIT 2015 – FRASCATI OCTOBER 20-29
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CURRENT PREAMPLIFIER
Rf
Vin
i(t ) ↓
Cdet
-A
V
+
Vout = − AVin
Vout − Vin = − R f iin
Vout
Vout
Vout ≈ − R f iin
⎛
⎞
⎜ 1 ⎟
⎟
= − R f iin ⋅ ⎜
1
⎜1+ ⎟
⎜
⎟
A⎠
⎝
INPUT IMPEDANCE
Cin CONTRIBUTION
Vout = − AVin
u
⎛
⎞
⎜ 1 ⎟
⎟
i(t ) ↓
Vout = − R f iin ⋅ ⎜
⎜1+ 1 ⎟
⎜
⎟
A⎠
⎝
⎛
⎞
⎜ 1 ⎟
Ri
R
⎟ = − AVin → Vin = f in → Z in = f
− R f iin ⋅ ⎜
1+ A
⎜1+ 1 ⎟
1+ A
⎜
⎟
A⎠
⎝
D.BADONI - G. FELICI
R
C
Z in =
u
Input signal is
convolved with an
exponenXal.
Increasing Rf increases
both the preamplifier
sensiXvity and τ.
R
1 + jωRC
EDIT 2015 – FRASCATI OCTOBER 20-29
7
CHARGE PREAMPLIFIER
Cf
Vout = − AVin
+
i(t ) ↓
Vout
i (ω )
Vout − Vin = − in
jωC f
Vout
INPUT IMPEDANCE
Vout ≈ −
⎛
⎞
⎜
iin (ω )
1 ⎟
⎟
=−
⋅⎜
1
jωC f ⎜ 1 + ⎟
⎜
⎟
A⎠
⎝
⎛
⎞
⎜
iin (ω )
1 ⎟
Vout = −AVin
Vout = −
⋅⎜
⎟
jωC f ⎜ 1+ 1 ⎟
⎝ A⎠
⎛
⎞
⎜
iin (ω )
iin (ω )
1 ⎟
−
⋅⎜
⎟ = −AVin → Vin =
jωC f ⎜ 1+ 1 ⎟
jωC f ⋅ (1+ A)
⎝ A⎠
D.BADONI - G. FELICI
Vout -Q/Cf
iin (t ) = Qin ⋅ δ (t )
t
t
HOW MUCH SIGNAL ARE WE GOING TO LOOSE ?
i(t ) ↓
Ct
Qamp
(1 + A)⋅ C f
Qamp =
Cin = (1 + A)⋅ C f
iin (ω )
jωC f
( A +1)⋅ C f
=
Q
(1 + A)⋅ C f + Ct
Q
Ct
1+
(1 + A)⋅ C f
EDIT 2015 – FRASCATI OCTOBER 20-29
Es. A=103; Cf=1pF
Ct=10 pF à
Qampl/Q=0.99
Ct=100 pF à
Qampl/Q=0.90
8
WHICH AMPLIFIER ?!
D.BADONI - G. FELICI
EDIT 2015 – FRASCATI OCTOBER 20-29
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VOLTAGE, CURRENT OR CHARGE AMPLIFIER ?
u
u
u
SiPMs output charge of the order of hundreds of fC
SiPM devices have excellent timing properties.
SiPM devices exhibit single photon resolution, but have a quite poor lineari response
Voltage or Current amplifiers configurations can be used as head-stage amplifiers
+V
+V
CF
RF
+
RS
_
_
+
R1
R2
(a) Pre-amplifier
R
G
(b) Transimpedance
Figure 2:increasing
Two amplifier
setups, notinput
shownamplifier
are the capacitively
decoupled
In voltage amplifiers
RS increases
voltage, but
amplifier input voltage noise
power lines which all high speed circuits should have.
increase and bandwidth decreases.
Current (or transimpedance) amplifier allows to overcome voltage amplifier limitations in terms of
called astill
voltage
amplifier. aThe
impedance
of the photodiode
is largely
ir- problems could arise
gain and bandwidth
maintaining
good
signal-to-noise
ratio (but
stability
relevant as it is normally much larger than RS . Increasing RS increases
because diodethe
parasitic
voltage capacitance).
generated by the photodiode, however this also increases the
D.BADONI - G. FELICI
voltage noise generated by the input current noise of the op-amp and also
EDIT 2015
– FRASCATI
OCTOBER
20-29
decreases the bandwidth
of the
photodiode.
The gain
in non-inverting setup
is set by one plus the ratio of the feedback resistor to the resistor to ground
10
AMPLIFIER STABILITY!
D.BADONI - G. FELICI
EDIT 2015 – FRASCATI OCTOBER 20-29
11
The Photodiode Amplifier:
SiPM AMPLIFIER (I)
• So it oscillates
and/or clips,
what is
wrong?
The SiPM current makes positive voltage
SiPM PS
• Oh yeah, add
some feedback:
Light
Light
Oh yeah,
add
This current makes
- voltage
+ here
positive
+
ome feedback:
-
This current makes
positive voltage here
+
This pin stays at ground
so output goes more
positive with more light.
-
-10
+ +Volts
ght
-
+
D.BADONI - G. FELICI
+
BUT most likely if you use
high bandwidth amplifier
looking at the output with a
scope
This pin at GND force this
This pin pin
stays
at ground
to GND (virtual GND)
so outputREMIND
goes more
à GAIN=∞
positive with more light.
16
© 2004 National Semiconductor Corporation
-10 Volts
The Photodiode Amplifier:
-10 Volts
at the output
of operational amplifier
The Photodiode
Amplifier:
16
17
© 2004 National Semiconductor Corporation
© 2004 National Semiconductor Corporation
THE AMPLIFIER OSCILLATES !! WHY ???
EDIT 2015 – FRASCATI OCTOBER 20-29
12
what is wrong?
SiPM AMPLIFIER (II)
-
LightTHE PROBLEM: oscillation are caused by SiPM+parasitic capacitance on input
-10 Volts
-
+
17
© 2004 National Semiconductor Corporation
The Photodiode Amplifier:
This current makes
• Oh
yeah,
addsource
SiPM
current
positive voltage here
some
forcesfeedback:
output to change
+
Light
-10 Volts
-
-
+
+
FEEDBACK LAG IS BAD
parasitic capacitance
This pin staysSiPM
at ground
lagmore
the feedback signal
so output goes
positive with more light.
16
D.BADONI - G. FELICI
© 2004 National Semiconductor Corporation
EDIT 2015 – FRASCATI OCTOBER 20-29
13
SiPM AMPLIFIER (III)
THE SOLUTION: insert a capacitance to compensate for the phase lag
CURRENT noise important on
this pin
+
VOLTAGE noise important on
this pin
NEXT PROBLEM: noise (current noise & voltage noise)
AMPLIFIER NOISE
Hard to match low current noise and low voltage noise requirement on the same device
JFET amplifiers have low current noise
Bipolar amplifiers have low voltage noise
u
u
u
u
D.BADONI - G. FELICI
More on this in Noise Introduction slides ….
EDIT 2015 – FRASCATI OCTOBER 20-29
14
BIBLIOGRAPHY
[1] Front-end Electronics for Silicon PhotomulXpliers, Johannes Schumacher
[2] Photodiode amplifier – G. Lochead
D.BADONI - G. FELICI
EDIT 2015 – FRASCATI OCTOBER 20-29
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