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Courseworks I

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Electronic Circuits (6CCS3ELC)
Coursework I
Dr Yansha Deng
Centre for Telecommunications Research
King’s College London
General Notes
Please note that we do not – normally – grant extensions to coursework
deadlines - except of course if mitigating circumstances apply. To this end,
please ensure that you submit your coursework by the deadline as
mentioned below.
Hereafter some further information regarding the preparation of this coursework.
First of all, referencing is very important and it is the acknowledgement of
the sources you used when producing your piece of work.
Correct referencing is important to demonstrate how widely you have
researched your subject, to show the basis of your arguments and
conclusions, and last but not least to avoid plagiarism.
Avoid plagiarism. Plagiarism is defined by the University as presenting
someone else's work as your own. Work means any intellectual output, and
typically includes text, data, images (but goes beyond that also to include
sound or even performance)
Deadline: 22nd of Feb. 2023
General Notes
You can write your coursework using LaTeX, the simplest way would be to create an
account on Overleaf (www.overleaf.com ) For writing in LaTeX you are also advised
to use the following textbook that explains the language “The Not So Short
Introduction to LaTeX” which is available at,
https://tobi.oetiker.ch/lshort/lshort.pdf
Problem 1: Design the MOS amplifier of the following figure to obtain maximum gain
while allowing for an output voltage swing of at least  0.5V. Let VDD =5V, and utilize
an overdrive voltage of approximately 0.2V.
(a) Specify VDS at the bias point.
(b) What is the gain achieved? What is the signal amplitude that results in the 0.5-V
signal amplitude at the output?
(c) If the dc bias current in the drain is to be 100 mA, what value of RD is needed?
'
2
k
=
200
m
A
/
V
(d) If n
, what W/L ratio is required for the MOSFET?
Problem 2: In the circuit shown below, the transistor has a b of 200. what is the dc
voltage at the collector? Replacing the BJT with one of the hybrid-p models
(neglecting r0), draw the equivalent circuit of the amplifier. Find the input resistance Rib
and Rin and the overall voltage gain (vo/vsig). For an output signal of  0.4V, what
value of vsig and vb are required?
2
m
C
=
400
m
A
V
Problem 3: A common source amplifier utilizes a MOSFET with n ox
and W/L =10. It is biased at ID=320 mA and uses RD=10k  . Find Rin, Avo, and Ro.
Also, if a load resistance of 10k  is connected to the output, what overall voltage
gain Gv is realized? Now, if a 0.2-V peak sine-wave signal is required at the output,
what must the peak amplitude of vsig be?
Problem 4 : In the circuit of the following figure, the NMOS transistor has
Vt = 0.5V and VA = 50V and operates with VD =1 V. What is the voltage gain v0/vi?
What do VD and the gain become for I increased to 1 mA.
Problem 5 : Consider the current-mirror circuit of the following figure with two
transistors having equal channel lengths but with Q2 having a width five times that of
Q1. If IREF is 20 mA and the transistors are operating at an overdrive voltage of 0.2V,
what Io results? What is the minimum allowable value of Vo for proper operation of the
current source? If Vt = 0.5 V, at what value of Vo will the nominal value of Io be
obtained? If Vo increases by 1V, what is the corresponding increase in Io? Let VA =20V.
Problem 6: A CMOS cascode amplifier in the following figure has identical CS and
CG transistors that have W/L=5.4 mm/0.36mm and biased at I=0.2mA. The fabrication
2
process has mnC ox = 400 m A V , and VA' =5V m m . At what value of RL does the
gain become − 100V/V? What is the voltage gain of the common-source stage?
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