전자회로 I 심재윤 포항공과대학교 전자회로 I 심재윤 포항공과대학교 KCL and KVL Laplace transform PN junction Impedance 늪 컴퓨터 돈을 모음 컴퓨터의 필수요소 If 천원 초과? Yes 콜라와 거스름돈 출력 No If 반도체 conduit.ir/insulator.o. C If C = 1? . ha11 I I , In suit I , , ! ! i : : I i i 세g이 세g Yes ( i or No conduit.ir 도체 of 부도체 What ifeo.ci?O 0.25 0.5 , 075 1 c , C = 지난 60년간 반도체는 계속 작아짐 => 작아짐에 따라 성능 (속도, 전력) 향상됨 0.25 ? ~ current ⇒ flow T spedtreducespowerconsurpt.com 완벽한 CMOS 1 P N : P < N : ) Out V Put T atputv osactuahy.to/l.finte.Chargingcuwent.:consumes PMOS 두 저항이 각각 최대 on & 최대 off Boolean expression NMOS P 0 t 1 0 CMOS (Complementary MOS) : NMOS + PMOS t 1 0 Power . 컴퓨터의 역사 = CMOS의 역사 [Eoin Malins, OPIG 19] fxe.cl ( GHz ) . CMOS 컴퓨터 vs. 양자컴퓨터 자연현상 ( 중첩 얽힘 ) , . 문제 : 백만 페이지의 책에서 특정단어 찾기 CMOS 컴퓨터 0.1초당 1페이지씩 속독이 가능한 한사람 양자컴퓨터 분당 1페이지씩 읽기가 가능한 백만명의 쌍둥이 (단, 쌍둥이들은 서로의 상태가 공유됨) 양자컴퓨터는 경우의 수가 너무 많아 풀지못하는 문제를 풀어내는데 특화됨 Quantum Computing . 길찾기 시작 오른쪽 갈림길 직진 왼쪽 직진 상태공유 중첩 얽힘 확률 Super position 10 et Et Entangle.me int T O O o 1 1 1 I of Representation of a Point on Arbitrary Line in XY Plane Y (g⋅cosθ, g⋅sinθ) g θ X g⋅(cos2θ + sin2θ) Note : g 크기는 θ와 무관 Mapping to a Complex Number Im g⋅{cos(θ) + j⋅sin(θ)} g θ Re g⋅(cos2θ + sin2θ) Time-Dependent Movement on the Given Line Im g(t)⋅{cos(θ) + j⋅sin(θ)} g(t) θ Re Specific f Component Can be Extracted by Rotating Axes with the Same f Im g(t)⋅{cos(-2πft)+j⋅sin(-2πft)} =g(t)⋅{cos(2πft) - j⋅sin(2πft)} = g(t)⋅e-j2πft ⇒ g(t)의 f 성분 크기에 비례하는 DC가 나옴 g(t) 2πft씩 감소 Re Fourier Transform ( St Z . ) ( St 전) +∞ (St Pi ) ( St 1조 ) ( St P3 ) −∞ Im X X O XO 𝑔𝑔 𝑡𝑡 𝑒𝑒 −𝑗𝑗2𝜋𝜋𝑓𝑓𝑓𝑓 𝑑𝑑𝑡𝑡 𝐺𝐺 𝑓𝑓 = � Re Laplace Transform : 미분방정식을 쉽게 풀기 위한 변환 +∞ 𝐿𝐿{𝑓𝑓 𝑡𝑡 } = � 𝑔𝑔 𝑡𝑡 𝑒𝑒 −𝑠𝑠𝑓𝑓 𝑑𝑑𝑡𝑡 −∞ Laplace transform 변환된 식의 s를 jω로 생각하면 Fourier 변환과 같아져 주파수 정보를 알 수 있음. ۞ Dimension of s in Laplace Transform e jα = cos α + j sin α Definition of e jα by Euler's formula : α : an angular quantity (degree or radian) But, e jα is dimensionless. => jα at exponent can be thought to be dimensionless for convenience. 𝑒𝑒 −𝑠𝑠𝑓𝑓 : Dimension of s => Hz ( 11t ) . radian dimensionless j 2π f t Ex) LPF Vi 1 R Vo C Vo(s ) /Vi (s ) = sC R + 1 sC 1 = 1+ s 1/ RC ω p = 1 / RC ~ Hz f p = 1 /(2 πRC ) Dimension of 1/sC V=Q/C=It/C => 1/sC ~ t/C ~ V/I ~ Ω 5¥ RLC Basics & Filters frequency 4 瀾N i t 11 R No frequency dependence t VR Frequency 0 At Peak appeasce.ge a " 내다 C 6€ on 4 T.T VC : v4 < 뽸 t i UC ✗ ✗ ( es ) . 900 냐 Peak appeavsb.ae L - an VL NO Ve Frequency = f t U . ( I sl.oppositedirect.io Push current ! ' ✗ U 존재 ㄴ 叉二 in o n . = 이 j.tl 되는 . ✗ f ftp.t) ۞ dB & dBm dB : 10log(ratio of two power quantities) => Gain (배)을 나타낼 때 사용 2x power gain : 10log(2) = 3dB PI > X2 TellThe To / ☆ "메에다 얘쐐' V/V, V/I, I/V, I/I 경우 : 전력량으로 환산 2x gain : 10log{(2)2/(1)2} = 6dB P NI = √2x gain : 10log{(√2)2/(1)2} = 3dB 10x gain : 10log{(10)2/(1)2} as same = 20dB E \^ = R is I2 R same dBm : 10log(power/mW) : absolute power quantity ex) 1mW=0dBm, 10mW=10dBm, [ ]dBm - [ ]dBm = [ ]dB [ ]dBm - [ ]dB = [ ]dBm 100mW=20dBm, 1W=30dBm 10dBm PI 7dB 3 y dB " attena.to . P . . Bo de Hot |v/i| (dB) f 고자 |v/i| = |1/jωC| capacitive -20dB/dec . 10x =>주파수에 반비례 oxw.EU 10x ω (log) |v/i| (dB) |v/i| = |jωL| 10x inducitive +20dB/dec 10x ω (log) =>주파수에 비례 ✗ ㅥ 1st Order System E = 0 et 1Ω 1 1v 0 At Don’t be confused with 0.lv Vo RC to.zvunt.IN $ 1 A Vs t=0 At o O . 1Ω 1F 8 A V9 Vo 1A 1F Is t=0 7 € 1F Vo 1v 1Ω Vs t=0 e −1 = 0.37 一一 €1 ☐ tscdjfactor.l.TO - ☐ e - e 대지 + o a 0.37a b τ 0.37b τ 현재 시간과 그 때의 값을 기준점으로 시정수 이후엔 최종 값까지의 63%에 도달 t 1st Order System Von 1H 1v t=0 Vs 燾召 N Vo 1Ω txL.xle.tk/R 1Ω Vo 1v t=0 Vs ㅡㅡ.ee#@ 1H t.us "∴ I" 叩 1 R ) u.pt Leo Load Its V0 고 RN P load . di ; HI 國王 @ N . 猷戱 Game 幽 line > v 言凰 Rz 工鬪 PN Junction Diode ID ID | 아주 고정 작은 kaka.ge t re 𝐼𝐼𝐷𝐷 = 𝐼𝐼𝑠𝑠 � If Up If Up CO ) 0 , . ↳ . Score: 저항과 IS + 𝑉𝑉𝐷𝐷 (𝑒𝑒 𝑛𝑛�𝑉𝑉𝑇𝑇 if n=1 𝑉𝑉𝐷𝐷 𝑑𝑑𝐼𝐼𝐷𝐷 1 𝐼𝐼𝐷𝐷 𝑛𝑛�𝑉𝑉 ≅ � 𝐼𝐼𝑠𝑠 � 𝑒𝑒 𝑇𝑇 = 𝑑𝑑𝑉𝑉𝐷𝐷 𝑉𝑉𝑇𝑇 𝑉𝑉𝑇𝑇 ㅎ VD 𝐼𝐼𝐷𝐷 ≅ 𝐼𝐼𝑠𝑠 𝑉𝑉𝐷𝐷 � 𝑒𝑒 𝑉𝑉𝑇𝑇 . VD − 1) neglec.tt only-l~vollogedimens.com 관련된 값 IS : Reverse saturation current n : Nonideality factor (1~2) . VT : Thermal voltage (kT/q), 25mV at room temperature 25mU . Bipolar Junction Transistor (BJT) Emitter Base Collector N P N # of s at C = β⋅(# of s at B) : amplification β⋅IB IE IC C E ※ Bipolar vs. Unipolar and or VBE IB B Bipolar Junction Transistor (BJT) ro = 1/slope β⋅IB IE ro IC IE C E β⋅IB VBE C E VBE IC re IB rπ B IB B VBE = IB⋅rπ = (IB+β⋅IB)⋅re = IB⋅(1+β) re IC (mA) β=100 slope IB=0.4mA IB=0.3mA IB=0.2mA IB=0.1mA IB=0 40 30 20 10 0 VCE(V) 5 rπ = (1+β) re Small Signal Parameters from Bias Current Considering VBE is a diode voltage, 𝐼𝐼𝐵𝐵 ≅ 𝐼𝐼𝑠𝑠 � 𝑉𝑉𝐵𝐵𝐵𝐵 𝑒𝑒 𝑉𝑉𝑇𝑇 𝑉𝑉𝐵𝐵𝐵𝐵 𝑑𝑑𝐼𝐼𝐶𝐶 𝑑𝑑𝐼𝐼𝐵𝐵 𝛽𝛽 𝐼𝐼𝐵𝐵 𝐼𝐼𝐶𝐶 𝑛𝑛�𝑉𝑉 𝑇𝑇 𝑔𝑔𝑔𝑔 = = 𝛽𝛽 = � 𝐼𝐼 � 𝑒𝑒 = 𝛽𝛽 = 𝑑𝑑𝑉𝑉𝐵𝐵𝐵𝐵 𝑑𝑑𝑉𝑉𝐵𝐵𝐵𝐵 𝑉𝑉𝑇𝑇 𝑠𝑠 𝑉𝑉𝑇𝑇 𝑉𝑉𝑇𝑇 gm = IC/VT From 𝑑𝑑𝐼𝐼𝐶𝐶 𝑑𝑑𝑉𝑉𝐵𝐵𝐵𝐵 𝑑𝑑𝐼𝐼𝐶𝐶 � = 𝑑𝑑𝑉𝑉𝐵𝐵𝐵𝐵 𝑑𝑑𝐼𝐼𝐵𝐵 𝑑𝑑𝐼𝐼𝐵𝐵 gm ⋅ rπ = β From rπ = (1+β) re gm ⋅ re = α where α = β/(β+1) re = α/gm = 1/gm if α ≅ 1 ro VB VB rπ re=α/gm R VB VB R R Rb VB Rb Rb Rb Rb VB R Rb VB VB R R Noise Without noise e e e e e e e e e e e e e e e e e e e e e e e e e e e With noise e e e e e e e e e e e e e e e Noise : The number of charge carriers passing through a cross section changes in time. Noise sources 1. Temperature (thermal, ~white) 2. Defect in conductor (flicker, ~1/f) 3. Natural quantum noise (shot, ~white) Transistor Noise Real Ideal I(t) I(t) I(t) I(t) thermal noise I(VG,VD,VS) I(t) t t t t flicker noise t Long t Transistor Noise Power/Hz 1/f noise Thermal noise ∆f Corner freq. Open-circuit time constant vs. Short-circuit time constant 𝑠𝑠 𝑠𝑠 𝑠𝑠 )(1 + ) ��� (1 + ) 𝜔𝜔𝑧𝑧1 𝜔𝜔𝑧𝑧2 𝜔𝜔𝑧𝑧𝑘𝑘 𝐴𝐴0 𝑠𝑠 𝑠𝑠 𝑠𝑠 )(1 + ) ��� (1 + ) (1 + 𝜔𝜔𝑝𝑝1 𝜔𝜔𝑝𝑝2 𝜔𝜔𝑝𝑝𝑛𝑛 (1 + = 𝐴𝐴0 ☐ 1 ≡ s.is?..s3.. shnaaTEcEtee.first2termsaredomlnant. 1 1 1 1 + 𝑠𝑠 + +��� + +��� 𝜔𝜔𝑝𝑝1 𝜔𝜔𝑝𝑝2 𝜔𝜔𝑝𝑝𝑛𝑛 ' (𝑠𝑠 + 𝜔𝜔𝑧𝑧1 )(𝑠𝑠 + 𝜔𝜔𝑧𝑧2 ) ��� (𝑠𝑠 + 𝜔𝜔𝑧𝑧𝑘𝑘 ) 𝐵𝐵0 (𝑠𝑠 + 𝜔𝜔𝑝𝑝1 )(𝑠𝑠 + 𝜔𝜔𝑝𝑝2 ) ��� (𝑠𝑠 + 𝜔𝜔𝑝𝑝𝑛𝑛 ) = 挺恬 1 以幽 𝐵𝐵0 ☐ 𝑠𝑠 𝑛𝑛 + 𝑠𝑠 𝑛𝑛−1 𝜔𝜔𝑝𝑝1 + 𝜔𝜔𝑝𝑝2 +��� +𝜔𝜔𝑝𝑝𝑛𝑛 +��� 2 ' s.IS# , 2 속 1 " I THI , sh 3 Copa its HP F l GIRL T 7 " III FE " 脈弟 b ㅋ Y ☒ ㅋ effect of Making ( Guns for function ⇒ ( as , GS owinglgbk.CC 작이서 ) utgedwpl.PE Night요에서 . den ve Whole ga Int ⇒ 비효율적 . polefeuencj.org Open-circuit time constant vs. Short-circuit time constant 𝑠𝑠 𝑠𝑠 𝑠𝑠 )(1 + ) ��� (1 + ) 𝜔𝜔𝑧𝑧1 𝜔𝜔𝑧𝑧2 𝜔𝜔𝑧𝑧𝑘𝑘 𝐴𝐴0 𝑠𝑠 𝑠𝑠 𝑠𝑠 )(1 + ) ��� (1 + ) (1 + 𝜔𝜔𝑝𝑝1 𝜔𝜔𝑝𝑝2 𝜔𝜔𝑝𝑝𝑛𝑛 (1 + = ⇒한 놈 𝐴𝐴0 말고 다른 Ra CEO을 ≡ 만듦C9화 = Ta Ta 1 1 1 1 + 𝑠𝑠 + +��� + +��� 𝜔𝜔𝑝𝑝1 𝜔𝜔𝑝𝑝2 𝜔𝜔𝑝𝑝𝑛𝑛 / 1 (𝑠𝑠 + 𝜔𝜔𝑧𝑧1 )(𝑠𝑠 + 𝜔𝜔𝑧𝑧2 ) ��� (𝑠𝑠 + 𝜔𝜔𝑧𝑧𝑘𝑘 ) 𝐵𝐵0 (𝑠𝑠 + 𝜔𝜔𝑝𝑝1 )(𝑠𝑠 + 𝜔𝜔𝑝𝑝2 ) ��� (𝑠𝑠 + 𝜔𝜔𝑝𝑝𝑛𝑛 ) G.cz G ⑤ @@ 𝑠𝑠 𝑛𝑛 + 𝑠𝑠 𝑛𝑛−1 𝜔𝜔𝑝𝑝1 + 𝜔𝜔𝑝𝑝2 +��� +𝜔𝜔𝑝𝑝𝑛𝑛 +��� 宖宖2 jwen , 𝐵𝐵0 ⇒ 또 . 긂 이를 만듦 o P이다 . wpi.LT 긂o 1 , UP Zero o 2 乏晄 (Shot) . 녹R 斷 . . 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' R , R Open-circuit time constant vs. Short-circuit time constant ㅋ 안에 - 들어있음 𝑠𝑠 𝑠𝑠 PC go.in 𝑠𝑠 (1 + )(1 + ) ��� (1 + ) 𝜔𝜔𝑧𝑧1 𝜔𝜔𝑧𝑧2 𝜔𝜔𝑧𝑧𝑘𝑘 𝐴𝐴0 ○ 𝑠𝑠 𝑠𝑠 𝑠𝑠 )(1 + ) ��� (1 + ) (1 + 𝜔𝜔𝑝𝑝1 𝜔𝜔𝑝𝑝2 𝜔𝜔𝑝𝑝𝑛𝑛 . = 𝐴𝐴0 . ≡ = 1 1 1 1 + 𝑠𝑠 + +��� + +��� 𝜔𝜔𝑝𝑝1 𝜔𝜔𝑝𝑝2 𝜔𝜔𝑝𝑝𝑛𝑛 1 B (𝑠𝑠 + 𝜔𝜔𝑧𝑧1 )(𝑠𝑠 + 𝜔𝜔𝑧𝑧2 ) ��� (𝑠𝑠 + 𝜔𝜔𝑧𝑧𝑘𝑘 ) 𝐵𝐵0 (𝑠𝑠 + 𝜔𝜔𝑝𝑝1 )(𝑠𝑠 + 𝜔𝜔𝑝𝑝2 ) ��� (𝑠𝑠 + 𝜔𝜔𝑝𝑝𝑛𝑛 ) 萩 - 𝐵𝐵0 2 V p Tr E-g.RO rm Vs 𝑠𝑠 𝑛𝑛 + 𝑠𝑠 𝑛𝑛−1 𝜔𝜔𝑝𝑝1 + 𝜔𝜔𝑝𝑝2 +��� +𝜔𝜔𝑝𝑝𝑛𝑛 +��� . ' 숯G이 d奭l陝궂 " i> 1 2 stt짜리뽀다이FC밪 ) C " TR) 썪) LC Circuit i C L VC VL VC+VL=0 if ZC = -ZL 1/jωC = jωL ω = 1/√LC = ωo Resonance condition i ωo i i C V L i i |v/i| v ωo ω 2nd Order RLC (Impedance) i v |v/i|, lin R R ω (lin) ωo |v/i|, dB R capacitive inductive ω (log) ωo +20dB/dec -20dB/dec 2nd Order RLC (Circuit 1) R |Z| Vo +20dB/dec -20dB/dec ω Vs |Is| |Vs|/R ω Vo Is =Vs/R |Vs| |Vo|=|Z|*|Is| ω 2nd Order RLC (Circuit 2) R |Z| Vo +20dB/dec -20dB/dec ω Vs ωC|Vs| |Is| +20dB/dec ω Vo Is =sCVs |Vo|=|Z|*|Is| +40dB/dec |Vs| ω 2nd Order RLC (Circuit 3) R |Z| Vo +20dB/dec -20dB/dec ω Vs |Vs|/ωL |Is| -20dB/dec ω Vo Is =Vs/sL |Vs| |Vo|=|Z|*|Is| -40dB/dec ω 2nd Order RLC (Circuit 4) Vo Vs ۞ ζ and ωn (in 2nd Order Transfer Function) 2 ωn H (s) = 2 2 s + 2ζω n s + ωn poles = (−ζ ± ζ 2 − 1 )ωn Becomes 0 only if real part (s2+ωn2) and imaginary part (2ζωns) are both 0 ζ : damping ratio ωn : natural frequency ζ > 1 : real poles overdamped ζ = 1 : duplicated poles critically damped ζ < 1 : complex poles under damped higher ζ : more stable ωn : natural undamped frequency => oscillation frequency when ζ = 0 2nd Order Filters H (s ) = H (s ) = H (s ) = H (s ) = H (s ) = ωn 2 s + 2ζωns + ωn 2 2 LP 2 HP 2 BP 2 HP+BP ≅ HP 2 BP+LP ≅ LP s2 s + 2ζωns + ωn 2 2ζωns s + 2ζωns + ωn 2 s 2 + 2ζωns s + 2ζωns + ωn 2 2ζωns + ωn 2 s + 2ζωns + ωn 2 2nd Order Filters Band-pass X H (s ) = 2ζωns s 2 + 2ζωns + ωn 2 High-pass Low-pass H (s ) = 2ζωns + ωn X 2 s 2 + 2ζωns + ωn X X 2 X Notch Low-pass H (s ) = X 2 s + 2ζωns + ωn 2 2 X X ωn s 2 + 2ζωns + ωn X X X H (s ) = s 2 + 2ζωns 2 High-pass X H (s ) = s2 s 2 + 2ζωns + ωn 2 X X X X X X Butterworth Filter (Maximally Flat Passband Response) X X 45° 90° X X 30° 60° 45° X X 22.5° 30° X 45° X 22.5° X tittt.at i IC IR i t V ? V Capacitive vs. Resistive Some ⇒ same hjher ⇒ Fe ⇒ C T 45 phase shift . t i) Sinusoid. ii) Amplitude & phase hold capacitive and resistive response 9 - F1 V IC i i IC 900 .lt 豕 성분씩 쪼개 들어옴 ⑦ 많이 가는 쪽의 특성 = e. to = 12 1m- f = ty 小 eft 21T IR 빼 ○ Frequency increases i ) I f) 시의 > W I IC + Capacitive vs. Resistive W u . - 1E1 IR f) IR V 더 대한 Resistive i dB 450 shift R 3dB frequency ⇒ . 는 -3dB . f. ! 1 = 改叱 1 IC Capacitive i 90 ¥ 恒一 E 》 《 二 = 1 二充 = . Vr IC IR i IC i Resistive E = J11 R IR V IC A i 3dB frequency IR R Capacitive vs. Resistive = 1 IC IR Frequency increases i Capacitive t.SI/Rc magnitudeonly.tl/Rc |v/i| (dB) i IC 3dB Resistive IR V Capacitive -20dB/dec ω (log) ωp (3dB frequency) ∠|v/i| 10% mes.no ωp 10ωp phase shift 0.1ωp 10€ Capacitive vs. Resistive 0 - - - - - - - - - - - - - - ω (log) Slow -45° translation -90° 1 - - - - - - > < 100 X Pole : A frequency which makes |IC| = |IR| (Note IC ≠ IR) 1 t Op non Zero Im L HP Negative Pole R HP 가상의 근 |v/i| (dB) 0¢13 邨旿 RHPP.ie * x bogcijx.ly Resistive Capacitive t ) 悳\ AREA oioi-wpdnglepole.Acs.A.CH -20dB/dec Re ω (log) ωp (3dB frequency) ∠|v/i| 幽) ( 屯哄 ) ( H 1t댰 ) f) 0 의 0.1ωp ωp 10ωp ω (log) -45° 艾稔胛 -90° 1/(1+s/ωp) i 一州 III. ' i 않음 . W Negative Pole |v/i| (dB) W G 0.14부1조 1 : p, ※ > . i.co ii. Resistive Capacitive w -20dB/dec l - - - - - - - - . _ . _ ω (log) ωp . . (3dB frequency) Wn Up YB . ) - ∠|v/i| W 0 0.1ωp ωp 10ωp ω (log) -45° -90° phase의 경우도 Mgnitude.tt 1/(1+s/ωp) 동일하게 Super position . Pie : Negative Zero 11근축 위 대형 ④ 9x0 배움 나중에 @ @o ( bi 돈 . . F 0dB 매 0 2E001번 Inductive Resistive 식으로 욀맘 (3dB frequency) . ∠|v/i| ( 1 + H f ) ( HE ) f ) ( 卄幽) . . ( ) 0 } ㅋ 45° . " 11- 독 90° ( 후 ω (log) ωz 0 @ Zero |v/i| (dB) ( onjugate) L HP or 0.1ωz ωz swz.FI 1+s/ωz 10ωz ω (log) i. 더해 나감 |v/i| (dB) Inductive Resistive ω (log) ωz (3dB frequency) ∠|v/i| 90° 45° . ( Super position ) Negative Zero . 0 0.1ωz ωz 1+s/ωz 10ωz ω (log) ( HE ) ( He ) ( 1t f ) ( 1+ f ) Positive Zero . .fr ✗ " 잘 안 Inductive O X X O . (3dB frequency) ∠|v/i| ( ' , 0 , 마주치면 ✗ 안됨 . ' .es ∴ ω (log) ωz 마주침 ' o 0 0.1ωz ωz 10ωz -45° x . |v/i| (dB) Resistive O R HP Zero -90° IN ω (log) 1제 P 1-s/ωz s癎卜 P des 1A0F I 2E2-120dB1 de 盧一謙 ftp.iffpendaittime .li : i > Wp i Wp 개형을 constant ' midbandgci.no ✓ ( ou frequency in ga . 속 두 l E TH l 독 " " I GIRL S 덿通퓖 u - e ↓ 柳千甲 ㅋ 3 Copa .it HP F as effect of Making Guns for function ( CD , GS owingkgible.CC 작이서 ) utgedapl.PE 해바세에서 . 늓이 ' 水一入 bond with , , mi d bond I 3 Corps Up ga I in Short cell Cup S . other UP da intat , High he W 3 p . . apsiassumedtobeze.ro . Want Miller Capacitance Ref = L씨-0 Ceff t이 ratio Ceff △ Q rate . 생각해본 C OU C같이 움직임) Ceff = 0 Ref = Nttf s C △ Q C . _ = Ceff C C F. 念足 Ceff C s Ceff = 2C Ref Ceff . wpbkged.pl?eft=RttQ=O Ceff = 0 . CH LD left ∴ 것 Ceff = C open Ceff Miller effect ㅨ C △U @ ⇒ boostapacito.ee to 2x f 一一 C Ceff = -C Ref 10x = = - R Ceff = 11C amplif.edu Ref = f 7 C t 10 C . = fvt Miller Capacitance 志齒 .it Ceff ④ Ceff C Ceff = C C open Z f Ceff i. Ceff A Y = . Y ( 1 는 Y ( Z . 전 = 1 EA 줔 - - C Ceff = 0 C Ceff = 2C A) 汀弘 . Ceff Ceff Ceff = 0 C 2x C 10x Ceff = -C Ceff = 11C Miller Multiplication of C (Revisited) fboundavyfreq.WS?as+i-)c,f ㅩ1쎽 訃川 莊憑遼 흠 어쩔수 없음 5 旻 》 때에 . .int .net t.IT/4resistiepathtonnectedCcapacitaeffectx) . } et RL .it 바깥 회로 Req@vsfann. 扉一 tpas 군 Gufee C 又一 . onep.ie function of . A ftp.t Assumptions.ee/iisGv.freq cnn.s-s-e.ee Fight.ec Is One -2-0 ( SW Miller effect works only when the amplifier keeps a large in-phase gain ! Rstj Wp t.CN ) t RRH.stR.is - ☐ - 11-0 - SCR = 1 t SC CRst R) Transistor ※쐥 ce Linear IDS x ref .fi . 하기 Flat on gmt.ro 꺾이지 않음 t Smith하게 꺾임 , t.sotratlonrj.ae/r._tE VGsti.sa .aneg.nq.f6adCine.0t e s ulGnxroi@o0Uos-U.n.UGs Slope=1/ro . VDS . 팧 VGS-V TH f) thresholdvoltage.to? 孔嘴去 上孔 占 { 1 𝑊𝑊 𝐼𝐼𝐷𝐷 = 𝜇𝜇𝐶𝐶𝑂𝑂𝑂𝑂 𝑉𝑉 − 𝑉𝑉𝑇𝑇𝑇𝑇 2 𝐿𝐿 𝐺𝐺𝐺𝐺 𝐼𝐼𝐷𝐷 = 2 叱渺 1 + 𝜆𝜆 � 𝑉𝑉𝐷𝐷𝐺𝐺 𝑉𝑉𝐷𝐷𝐺𝐺 ≥ 𝑉𝑉𝐺𝐺𝐺𝐺 −𝑉𝑉𝑇𝑇𝑇𝑇 - flat . nnnn 1 𝑊𝑊 𝜇𝜇𝐶𝐶𝑂𝑂𝑂𝑂 2 𝑉𝑉𝐺𝐺𝐺𝐺 − 𝑉𝑉𝑇𝑇𝑇𝑇 𝑉𝑉𝐷𝐷𝐺𝐺 − 𝑉𝑉𝐷𝐷𝐺𝐺 2 막음 ? 2 𝐿𝐿 저항처럼 움직임 t.mg . ibss.at 𝑉𝑉𝐷𝐷𝐺𝐺 < 𝑉𝑉𝐺𝐺𝐺𝐺 −𝑉𝑉𝑇𝑇𝑇𝑇 " 저항과 비슷해보임 . MOS Transistor ID(mA) & deinisymme.tk , 여분불가) . Layer uol.tgeiDr.in "" "" " "e f ⇒ V" 5V 5 4 3 2 1 G source VGS D 4V 3V 2V ID G 1V 0 1 2 3 4 5 △ S VDS(V) 떈쟈i7 " VDS.si 安 i. 냞 -1 y→ ID Transistor Model Gain i) 간격 넓힘G축 ) ii) 기울기 5 1 5 , (제항 T ) U . 孔女仕 1--3 . 4 3 2 1 o 0 = 5 f deukegainsplk.SC D ID(mA) 늘리려면 UDP 5 VDS(V) VGS=4V VGS=3V VGS=2V VGS=1V VGS=0V ⇒ 단위 ✗ . V0 19m ID = f(VGS) ○ G , ㅎ ID가 방에 T . 민감할수록 . 제어력이 뛰어남 ⇒ Good East 럊⇒~쌰쮫:쯚雩앑갼쨱 LET flat S . V0 St ID(mA) 4 3 2 1 0 D This slope g) VDS(V) VGS=4V VGS=3V VGS=2V VGS=1V VGS=0V 5 f] ID G f(VGS) g. S V65 Gas " I. V65 o.r.ae 1/slope = ro . duc.GE 幷崎 4In간격 나타냄 . Small Signal Model g. k.se I 吐范 = d U@ E F G j D resistanedimension-cuwe.at D + VGS − = g 듩nt gmVGS i=0이 됨 i1 G ro = source = i1 1/gm source S π-model gmVGS Gate 뗴L|ㄹ| S T-model ro = Very bg Small Signal Model * Small * △ G 支 gmVGS . 卵道 S π-model = B Route ( 1기 다 . tgRJr.IR + R ( 1 Yen ) • 奉鄙 S T-model . 전압을 ro 1/gm Use = = i1 Vs ⇒ e i1 G lix t : 기울기를 봄 gmVGS i=0이 됨 ro ( HR) .ro − . IX, V71 D Ratio ' D Root f x ← + VGS Large Signal analysis . gnti.RS Signal analysis s ix. R (D 모두 . 봄 . Small Signal AC Model G. adf.be#enzanynodes. 만든로합) D suit oI娜 addz.co Can ↳ by Just ftp.#negetaseriIpTFTB f, f G CGD D G gmVGS CGS 궂 S S ro LD . . . P 嚴函叱 ' CGD becomes a miller cap in common source amplifier configuration. ⑤ Small Signal AC Model 3개 다른 GNP ( negative P이 a p들 만듦 e . CGD D G gmVGS CGS S 燕鄙芎 t.MG 印毗蒲 ⇒ 증가 ro . ㅋ 娜 ㅋ cnet.ir CGD becomes a miller cap in common source amplifier configuration. Das 전류 결정위해 쓰고싶음 . ⇒ cap 사용 . Gm & Resistance ID(mA) Gm V I 5 4 3 2 1 VGS 5V D trok.lk 4V 臣 3V 2V Fr . 1V S 0 1 2 3 4 5 ix VDS(V) Vds,sat ID G 晧 → ii.TV Ug . i ↳ - Vs 1/ V5 as _ gm.FR F other node are fl 幷鳶 R VB ? : VB 1/gm 1/gm IEn ) vgfc.ro . 다 같은데 나만 ⇒ 전류 거의 같음 좀 다들 . . R only changes VD. Change of VD does not affect ID. Vgs Rout ix vx ☒ VB gmf) ⋅ix⋅R 2 ∆Vgs = -ix⋅R R ro ri (ix+gm⋅ix⋅R)⋅ro ix⋅R R n ro , vx= (ix+gm⋅ix⋅R)⋅ro + ix⋅R vx/ix = gm⋅ro⋅R + ro + R ra 오스란드 gmrozroitroztro.ir tgnz.ro = . , ( 1 e) t V02 2 추 Common Source Amplifier 箋朮烋旭 VDD ÷ ← 폯 一匯 VO VI = -9mV : ( R방 ) 퓱 R " . V. Ampeo " 宦 영향T . t.it igz 一一 " ㅋ 曲二 - 9m ( Rio ) V. - , ※ ✗ ( R11 ro ) Common Source Amplifier 13 1%K 부 R Io I but A VDD 芎 r ⑧ R R 1자 . VO Large . C ' . ga in = ⇒ to neuron cnn.be t L} VI - g - 4제 Stage ro )) Common Source Amplifier with Source Degeneration 9m " 8$ HFRsgnCRHR.at 1 CAR Rs VDD is bit Route Vo에서 보는 저항 . Resisee.ae " ) R ltgmRs.us . VI VO V0 V9 二一 Vgmts 5B RS 븝 vixgmXCRHR.at ) 와 _ ' tgmp.sc RKRJ Common Source Amplifier with Source Degeneration VDD R 11 VO 11 VI Et .cz RS ! Chip에서 DC go.in 전압에 변화를 의한 없앨 Common Drain Amplifier (Source Follower) OutPut을 가져가는가 어디서 NHK에 E 回 VDD t Ni -1JPY準毖 " S 固 " load fdbwthepdauitgoftheg.to 誹謳 R j = + R V0 VO VI VDD g + - VI t.it t.ab.to R . . 뼴 丑枇 ' VO 아滋 R네 艸幷 RL → ftp.LVi Common Drain Amplifier (Source Follower) { 스4 ft G이가 통해 잘 맞춤 . VDD VDD , ET 巒 L VI VO R VI 0 VO : Common Gate Amplifier 일반적으로 Common VDD 결 Vs Ni R E f V V0 gmui.RO " = t 紅 t.GR 위씨 ⇒ GNP O VI v, q : Vs v. l tfitgnvgs-ov.it#)=UiGttgn Et E Et gmv.lt E ftp.t#=(gmtf)CRIlro ) ⇐> = ⇒ = ) source ap 사용 . Common Gate Amplifier 남 VDD 金津岾 EU 弗絅 " R VO 陣一FR.lk • 3k 라다 . l V 1nA 趙竹蹴 VI de 잘 ÷ 안뼘) . Common Gate Amplifier jc A S Poker . ⇒ (C 0 is Very Big) . 5V VDD ⇒ R VO 邰紅 .FI .EE 徘手 t T_E.at VI 奸縡 . Common Gate Amplifier VDD R VO T1gm Ygn VI ✗ △ i △ Ui ( 크지 않음) . 폼 벼 ÷ int outptwkge.lu current , Exercise ) Set Vdc and A for Largest Swing on V1 7남S 3V 4K ABS V1 취해 그림 Vac = Asinωt Vdc V2 1K 0V ↳ ioneeqaiualentde.ve VGS’ VS VGS I(mA) VDSsat VDS’sat 1 2 3 D VGS=3V D | G 匕臣 t VGS=2.5V S N VGS=2V ○ VGS=1.5V VGS=1V T-T 一一 一一 = 一一 = 一一 = _ _ = VGS=0.5V - 0.125 € 1K S’ 0.25 1-7 K 속 , 0.5 (gas) 105mA : 0.25mA 0.125mA VGS’ VS VGS I(mA) VDSsat VDS’sat 1 0.13 0.87 0.13 0.1 0.23 2 0.45 1.55 0.45 0.2 0.65 3 0.85 2.15 0.85 0.25 1.1 D G S VGS’=3 ⇒ VGS’=2.5 VGS’=2 VGS’=1.5 VGS’=1 VGS’=0.5 1K S’ 1 VGS’ VS VGS I(mA) VDSsat VDS’sat 1 0.13 0.87 0.13 0.1 0.23 0.45 1.55 0.45 0.2 0.65 0.85 2.15 0.85 0.25 1.1 2 3 懊 3V 4K D G .ie/ 曲乘箚 R 추가 S 1K VGS’=3 S’ VGS’=2.5 VGS’=2 VGS’=1.5 VGS’=1 VGS’=0.5 gm 작얨 더 큰 . kbs에서 Stadion 됨 . VGS’ VS VGS I(mA) VDSsat VDS’sat 1 0.13 0.87 0.13 0.1 0.23 2 0.45 1.55 0.45 0.2 0.65 3 0.85 2.15 0.85 0.25 1.1 3V 4K D G Vac = Asinωt S Vdc 1K VGS’=3 VGS’=2.5 VGS’=2 • d. VGS’=1.5 • 9 一一 v VGS’=1 VGS’=0.5 대략 Vdc=1.5 A=0.8 S’ Cascode Good current source outputresisenceiuergbig.to#onsistasinseies.3Vb0 Rout If -4mA .tt 0.45nA △ an △ 0.05nA VB2 . 1.5V - 25V t 1.5V 8.li .TT . VB1 EEFE.at . : 1.5V 2.5U a~x~veybig.LI#fixed 0.4mA . Cascode 5U IN n HI ' to 45mA . Lenff 4mA Rout S 芎了 에 VB2 VB1 t 뻬 대사의 t source 동작 가깝게 Cascode Rout 飜 VB2 VB1 Current Source (by Current Mirroring) RE " 一片 ( IREF 0.25m Rout te ) RREF f) "" . 1.3V F . 6 . 0.3 ) 5 6kt n U. A 延万加 Unit o . L.ro 베 ○ VDD VDD . f Widlar Current Source temperaturedependence.tt VDD 저항 이용해 IREF 정함 . Rout " A ☒ & W가 R 大 ve or . same . Widlar Current Source VDD IREF Rout Long b Small b 일종의 feedback.tn Small aeesse.com R Large Cascode Current Source VDD IREF Rout 剡聃 ㅋ ㅋ ㅋ Wilson Current Source VDD VDD R= s The IREF of Root IREF , 适 Small Signal Hand = Model Analysis . To Route R C L Diode Bipolar Junction Transistor Field Effect Transistor (BJT) (FET) Area for Implementation on Integrated Circuit (IC) Chip R C L Diode BJT FET Top view VDD VSS W L M2 VDD Via M1 G-poly Contact P+ N+ N+ tox P+ P+ N-well P-sub N+ OP Amp R Vi C + Vo R2 R1 Vi R2 - Vo + C R1 Vi C R1 Vi + + Vo Vo 𝑅𝑅𝐹𝐹 𝑉𝑉1 𝑉𝑉1 𝑉𝑉2 𝑅𝑅1 𝑅𝑅2 + Vo 𝑉𝑉2 𝑉𝑉3 𝑉𝑉4 𝑅𝑅𝐹𝐹 𝑅𝑅1 𝑅𝑅2 𝑅𝑅3 𝑅𝑅4 + Vo Propagation of Signal Polarity D G S G -> S : Same G -> D : Opposite (w/ gain) S -> D : Same (w/ gain) D -> S : Negligible (Same) Differential-mode and Common-mode VDD RL VO VI- VI+ ISS RSS Differential-mode and Common-mode VCM ={(VI+)+(VI-)}/2 : 평균 VDM =(VI+)-(VI-) VDD : 차이 RL ACM = VO/VCM VO ADM = VO/VDM CMRR = ADM/ACM VCM-½VDM VCM+½VDM ISS RSS Half-circuits for Vo at Differential and Common-modes VDD RL CM DM VDD VDD RL VO RL VO VCM-½VDM VCM+½VDM ISS RSS VCM 2RSS VO -½VDM Differential-mode and Common-mode VDD ACM = ∆VO/VCM ADM = ∆VO/VDM CMRR = ? RL RL VO- VO+ VI- VI+ ISS RSS Differential-mode and Common-mode VDD RL RL+∆RL VOVI+ VO+ gm+∆gm gm ISS RSS VI- Open-circuit time constant vs. Short-circuit time constant 𝑠𝑠 𝑠𝑠 𝑠𝑠 )(1 + ) ��� (1 + ) 𝜔𝜔𝑧𝑧1 𝜔𝜔𝑧𝑧2 𝜔𝜔𝑧𝑧𝑘𝑘 𝐴𝐴0 𝑠𝑠 𝑠𝑠 𝑠𝑠 )(1 + ) ��� (1 + ) (1 + 𝜔𝜔𝑝𝑝1 𝜔𝜔𝑝𝑝2 𝜔𝜔𝑝𝑝𝑛𝑛 (1 + = 𝐴𝐴0 1 1 1 1 + 𝑠𝑠 + +��� + +��� 𝜔𝜔𝑝𝑝1 𝜔𝜔𝑝𝑝2 𝜔𝜔𝑝𝑝𝑛𝑛 (𝑠𝑠 + 𝜔𝜔𝑧𝑧1 )(𝑠𝑠 + 𝜔𝜔𝑧𝑧2 ) ��� (𝑠𝑠 + 𝜔𝜔𝑧𝑧𝑘𝑘 ) 𝐵𝐵0 (𝑠𝑠 + 𝜔𝜔𝑝𝑝1 )(𝑠𝑠 + 𝜔𝜔𝑝𝑝2 ) ��� (𝑠𝑠 + 𝜔𝜔𝑝𝑝𝑛𝑛 ) ≡ = 𝐵𝐵0 𝑠𝑠 𝑛𝑛 + 𝑠𝑠 𝑛𝑛−1 𝜔𝜔𝑝𝑝1 + 𝜔𝜔𝑝𝑝2 +��� +𝜔𝜔𝑝𝑝𝑛𝑛 +��� 2 1 1 2 Frequency response |H(jω)| (dB) Vo /Vs = H (s ) A 0dB -20dB/dec ωp2 ωp3 ωp1 ωBW (1 + s / ωp1)(1 + s / ωp 2 )(1 + s / ωp 3 ) -40dB/dec ω (log) 0 -45° ωBW = A* ωp1 : GBW -90° -270° ω (log) A -60dB/dec ∠H(jω) -180° = Phase margin Ex) Two negative real poles, PM=90° A=ωBW/ωp1 ωBW ωp1 0.1ωp1 10ωp1 0.1ωp2 10ωp1<ωBW<0.1ωp2 ωp2 ω ω Ex) Two negative real poles, PM=45° A=ωBW/ωp1 ωBW=ωp2 ωp1 0.1ωp1 ω ω 10ωp1<0.1ωp2 Ex) Two negative real poles, PM=60° tan-1(ωBW/ωp2)=30° A=ωBW/ωp1 ωBW ωp2=√3*ωBW ωp1 0.1ωp1 10ωp1 10ωp1<0.1ωp2 ω ω Ex) Two negative real poles, PM=30° From ωp2/ωp1=A/(ωBW/ωp2)2, tan-1(ωBW/ωp2)=60° A=ωBW2/(ωp1*ωp2) ωp2=ωBW/√3 (ωBW/ωp2)2 ωBW ωp1 0.1ωp1 10ωp1 10ωp1 < 0.1ωp2 (one ex.) ω ω Ex) Two poles at 0, PM=0° |A| at DC=∞ |A| -40dB/dec ωBW ∠A ω ω -180° PM=0° : Two poles at the origin ωp1=ωp2 =0 Voltage Source vs. Current Source I I V V Requirements of Input & Output Resistance ∞ Vi ∞ ∞ 0 A Vo Vi A=Io/Vi A=Vo/Vi 0 Ii 0 ∞ 0 A A=Vo/Ii A Io Vo Ii A Io A=Io/Ii Feedback Steps to Understand Feedback Circuit 1. Check if loop forms a negative feedback 2. Check if loop gain is large enough 3. Estimate output which makes input be negligible (=> 출력단의 전류 또는 전압을 입력의 함수로 고정되게 함)