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Research on State Space Modeling, Stability Analysis and PID/PIDN Control of
DC-DC Converter for Digital Implementation
Chapter · September 2020
DOI: 10.1007/978-981-15-5558-9_106
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Research on State Space Modeling,
Stability Analysis and PID/PIDN Control
of DC–DC Converter for Digital
Implementation
V. Viswanatha , R. Venkata Siva Reddy, and Rajeswari
Abstract In this article, average large signal modeling technique is applied to
develop the various transfer function models of the DC–DC buck converter. With
the help of transfer function, Proportional—Integral-Derivative (PID) and PID with
filter co-efficient (N) so-called PIDN controller is designed for voltage mode closedloop control in both analog and digital domain. Bode plots are developed to show
the open-loop and closed-loop control in both analog and digital domains. Similarly, Pole-zero plots in both analog and digital domains in order to demonstrate
the stability of the buck converter. The obtained model is simulated in two variants;
(1) Simulink environment. (2) Text-based computational implementation technique.
Simulation results in both the variants show that with PIDN control, the steady-state
and dynamic response of the buck converter is increased compared to PID control
since PIDN offers wider bandwidth and high gain. The filter co-efficient “N value” is
taken higher, the derivative filter term “ ” will become ‘s’ which is an ideal derivative
term. This ideal derivative has very high gain for high-frequency signals therefore
high-frequency measurement noise will generate large variations of the control signal
(PWM signal) which results in erroneous system operation. To prevent this situation, the value of filter co-efficient ‘N’ is taken to be low. Here low value of ‘N’ is
22765.4257546504 which is obtained by tuning process and the whole process is
demonstrated. These models pave the way in the design, development analysis of
closed-loop embedded control of DC–DC converters in the platforms like DSP- and
FPGA-based systems.
Keywords State space averaging technique · Transfer function · PID/PIDN
control · Buck converter · Digital control
V. Viswanatha (B) · Rajeswari
Acharya Institute of Technology, Bengaluru, India
e-mail: viswas779@gmail.com
Rajeswari
e-mail: rajeswari@acharya.ac.in
R. Venkata Siva Reddy
REVA University, Bengaluru, India
e-mail: rvsreddy2007@gmail.com
© Springer Nature Singapore Pte Ltd. 2020
T. Sengodan et al. (eds.), Advances in Electrical and Computer Technologies,
Lecture Notes in Electrical Engineering 672,
https://doi.org/10.1007/978-981-15-5558-9_106
1255
1256
V. Viswanatha et al.
1 Introduction
Nowadays switch-mode power converters are widely being used for power processing
in applications like computing and communication systems, medical electronics,
appliance control, transportation and high-power transmission systems. All power
processing units used in such applications use super-capacitors, batteries or different
energy buffers for stable operation under all possible conditions and requirements.
The very famous Maximum power point technique (MPPT) is applied only for DC–
DC converter. MPPT is a high-frequency DC–DC converter technique that optimizes
the panel voltage to the required battery voltage [1]. Since the last two decades,
DC–DC converters that are widely applied in much modern equipment including
LED drive, charger controller, motor drive, MPPT, etc. [2]. Therefore, controlling
techniques is idea of the state-of-the art of the DC–DC converters. Presently there
are various closed-loop controllers like P, PI, PID, PIDN are used but things to be
considered are the dynamic performance of optimal controllers is observed superior
in comparison to integral/proportional-integral controllers tuned using some recently
published modern heuristic optimization techniques [3].
MATLAB simulation results demonstrate the improvements in the dynamic
performance of the system in the presence of redox flow batteries (RFBs) [4]. A
more recent intelligent optimization technique termed as an imperialist competitive
algorithm (ICA) is fruitfully employed for concurrent tuning of various parameters
of the proposed controller [5].
These controllers are more effective when they are implemented in digital system.
Digital systems stand on programming therefore programming of such systems can be
done with the usage of mathematical equations like differential equations, algebraic
equations and Laplace transform [6]. Programming the control technique overcome
the issues like PI controller need precise mathematical model values which will be
tough to get and it may not give suitable results under parameter variation, load
variations, etc. [7] for better performance of PI and PID controllers, tuning to be
done to get precise model. There are five methods of tuning of PID controller with
mathematical analysis [8]. The robustness of PID controller tuning methods is to
step-change in the setpoint and disturbance rejection in power converter control [9].
PID control results in regulating the output voltage which results in reduced efficiency
[10].
The closed-loop digital control of DC–DC converter with PID/PIDN control is
as shown in Fig. 1. In this paper buck converter is considered as DC–DC converter
and its digital model p(z) are represented in Eq. (15). Digital PIDN controller c(z)
for this buck converter is developed and shown in the Eq. (25). Feedback gain H(z)
= 1 is considered.
Research on State Space Modeling, Stability Analysis …
1257
Fig. 1 The structure of voltage mode digital control system of DC–DC converter
2 Digital PIDN Control Algorithm Approach
The new approach is proposed for the development of PID/PIDN control algorithm
in DSP controller as shown in Fig. 2. Development steps are as follows.
1. State space modeling of buck converter using average large signal modeling
technique is performed to obtain transfer function in S-domain.
2. Auto-tuning is performed in Simulink for the model obtained in step 1 and kp,
ki, kd and ‘N’ values are obtained.
3. Obtain Transfer function of PIDN control using gain values obtained in step 2.
4. Apply Tustin transformation technique to transfer the function of PIDN control to
obtain model in Z-domain. It is nothing but the model of digital PIDN controller
for buck converter
5. Obtain co-efficients from discrete-time model obtained in step 4.
6. Write C/C++ code using co-efficients of the discrete-time model.
7. Load the code obtained in step 6 into DSP processor.
Fig. 2 Development of digital PID/PIDN controller using redesign method for DSP controller
1258
V. Viswanatha et al.
3 Modeling Approach
In the following section, the State space modeling technique is used to model the
basic non-isolated DC–DC converter like buck topology. MATLAB/Simulink tool is
used to implement and test the dynamic performance of the basic DC–DC topologies.
With this modeling, PID/PIDN controller is developed for buck converter.
To begin with, state space modeling is fundamentally represented in Eqs. (1) and
(2) where A is the system matrix, B is the input matrix, C is the output matrix, D
is the direct transition matrix, x is the state variable, x is the derivative of the state
variable, u is the input, and y is the output.
x = Ax + Bu
(1)
y = C x + Du
(2)
3.1 Buck Converter Model
The basic buck converter circuit and it’s ‘ON’ and ‘OFF’ state equivalent circuits are
shown in Fig. 3
The buck converter state variables are VC and iL. During ‘ON’ state, VC and iL
can be defined in Eqs. (3) and (4), respectively.
VC = u 1 − L
iL = C
di L
dt
VC
VC
dVC
dVC
+
iL = C
+
dt
R
dt
R
(3)
(4)
By mapping state variables iL = x1 and VC = x2. Its derivative x1 and x2 are
shown in Eqs. (5) and (6). These equations can be obtained by rearranging (3) and
(4). The state space matrices A and B shown in Eq. (7) for buck converter in ‘ON’
state can be formulated using Eqs. (5) and (6).
1
1
x1 = − x2 + u 1
L
L
1
1
x1 +
x2
C
RC
0 − L1
x1
0
x1
= 1
+
u1
1
−
x2
x
0
2
C
RC
x2 = −
(5)
(6)
(7)
Research on State Space Modeling, Stability Analysis …
Fig. 3 Buck converter
fundamental, ON and OFF
state equivalent circuits
1259
Mosfet
L
Vin
D
C
R
Buck converter fundamental circuit
Mosfet
L
Vin
R
C
Buck converter ‘ON’ state
L
D
C
R
Buck converter ‘OFF’ state
During ‘OFF’ state, where u1 is zero and its derivative x1 is shown in (8) and
derivative x2 is same as (6). Similarly, the state space matrix A and B in (9) for buck
converter in ‘OFF’ state can be formulated using (8) and (6).
1
x1 = − x2
L
0 − L1
x1
0
x1
= 1
+
u1
1
− RC
x2
x2
0
C
(8)
(9)
After derived the buck converter state space A and B matrix for its ‘ON’ and ‘OFF’
state. It is require to find its average A and B matrix with the account of switching duty
cycle d. The average A and B matrix are shown in Eqs. (10) and (11), respectively.
A = A(ON) d + A(OFF) (1 − d)
A=
0 − L1
0 − L1
0 − L1
d+ 1
(1 − d) = 1
1
1
1
1
− RC
− RC
− RC
C
C
C
B = B(ON) d + B(OFF) (1 − d)
(10)
1260
V. Viswanatha et al.
B=
d
0
d+
(1 − d) = L
0
0
0
1
L
(11)
To complete the buck converter model, the average matrix of (10) and (11) are
substitute into (1). The completed buck converter state space model is shown in (12).
x1
x2
=
0 − L1
1
1
− RC
C
d
x1
+ L u1
x2
0
(12)
Lastly, to obtain the output state of VC and iL, the output state space for C and D
matrix is shown in (13).
y1
y2
10
=
01
iL
VC
0
+
u1
0
(13)
The system matrix A and B of Eq. (12) and C and D of Eq. (13) are obtained
as shown below for the buck converter having the specifications; L = 1.5 mH, C =
250 uF, R = 3 , F = 5 kHz, Duty Cycle = 25%, V o = 3 V, I 0 = 1 A, I in = 250 mA
and V in = 12 V.
A=
0 −666.6
,
4000 −1333
B=
166.6
10
, C=
,
01
0
0
D=
0
Continuous-time transfer function model is obtained as shown in Eq. (14) using
matlab function,
[b, a] = ss2tf(A, B, C, D) and P(s) = tf(b, a) and its equivalent discrete-time
is
transfer function model using the function
as shown in Eq. (15), where Gs is pole-zero gain model of buck converter, 0.1 is
sampling time and Tustin is analog to digital conversion technique used.
P(S) =
6.664e5
s 2 + 1333s + 2.667e6
(14)
P(Z ) =
0.24739(z + 1)2
(z 2 + 1.98z + 0.9802)
(15)
Equation (14) represents transfer function of buck converter with 0.25 duty
cycle and the model is simulated in Simulink with PID, PIDN and without PID
block as shown in Fig. 5. Auto-tuning is performed for PID block, the following
PID gains are obtained as kp = 38.6910, ki = 1.0391e + 04, kd = 0.0155 and
N = 22765.4257546504. By making use of these PID gains without N and
Matlab function Analog_PID=tf([kd, kp, ki], [1, 0]) transfer function
of Analog_PID controller for the buck converter is obtained as shown in Eq. (16).
Research on State Space Modeling, Stability Analysis …
Analog_PID =
0.01552s 2 + 38.69s + 1.039e4
s
1261
(16)
Equation (16) represents transfer function of PID control without considering
filter co-efficient ‘N’. This results in lower bandwidth and system gain as shown in
Figs. 7 and 8 which, in turn results in slow dynamic response. Therefore, to improve
bandwidth and system gain, filter co-efficients to be considered to develop transfer
function. So by considering N and let the value of N be less than what is obtained
in tuning process in order to get wider band with. Here N = 2765. 4257546504 is
considered and the transfer function of PIDN is obtained as given in Eq. (17).
C(s) =
81.62 s 2 + 1.174e5 s + 2.874e7
s 2 + 2765 s
(17)
Closed-loop control of PIDN given in Eq. (18) is obtained using the function
analog_CloopN = feedback (C(S)*Gs, 1) where Gs is pole-zero gain model of buck
converter.
Analog_closedloopPIDN =
5.439e7 (s + 1125) (s + 312.8)
(s + 1222) (s + 277.3) (s 2 + 2599s + 5.651e7 )
(18)
3.2 Discretization of PIDN Controller
The ideal PIDN structure with a first order low-pass filter in series with the derivative
path is shown in Fig. 4. Equation (17) represents analog PIDN controller with 2
poles and 2 zeros. Our objective is to find an equivalent digital 2 poles and 2 zeros
representation of the controller so here Tustin transformation technique is applied to
Fig. 4 Basic PIDN control
structure
1262
V. Viswanatha et al.
convert it into digital domain in order to implement digital control system for buck
converter using PIDN control law in digital signal processor (DSP) the time domain
equation for the ideal PIDN controller is given in Eq. (19).
t
u(t) = K p e(t) + K i
e(t)dt + f (t) ∗ K d
de(t)
dt
(19)
0
where f (t) represents the impulse function of the derivative path filter. Taking a first
order lag filter co-efficient and carrying out Laplace transformation with zero initial
condition yields Eq. (20).
F(s) =
u(s)
N
Ki
= Kp +
+ Kd
e(t)
s
1 + N 1s
(20)
After some rearrangements, Eq. (20) can be written as a single transfer function
as shown in Eq. (21).
F(s) =
(s 2 (K p + K d N ) + s(K p N + K i ) + K i N )
(s 2 + s N )
(21)
Now you can compare Eqs. (17) and (21) calculations match the co-efficients of
‘s’ in Eq. (17).
Equation (21) is a second-order transfer function with the general form in s-domain
is as shown in Eq. (22)
F(s) =
N (s)
(b2 s 2 + b1 s + b0 )
=
2
(a2 s + a1 s + a0 )
D(s)
(22)
Similarly the general form of second-order transfer function in Z-domain is given
in Eq. (23).
F(z) =
(d0 + d1 z −1 + d2 z −2 )
N (z)
=
−1
−2
(c0 + c1 z + c2 z )
D(z)
(23)
Now convert Eq. (17) into digital domain. It is done by using function c2d
(analog_PIDN, 0.1, ‘tustin’) where analog_PIDN is transfer function
of PIDN, 0.1 is sampling time and Tustin is the technique used for analog to digital
conversion. Digital PIDN is obtained as shown in Eq. (24).
Digital_PIDN = C(z) =
558.5 z 2 + 1030 z + 474.3
z 2 − 0.01436 z − 0.9856
(24)
In order to implement digital PID compensator, the digital implementation must
calculate the result of a difference equation so let’s get difference equation from
Research on State Space Modeling, Stability Analysis …
1263
Eq. (24) and it is as shown in Eq. (26)
Digital_PIDN = C(z) =
d(z)
558.5 + 1030 z −1 + 474.3z −2
=
e(z)
1 − 0.01436 z −1 − 0.9856z −2
(25)
d(n) = 0.01436d(n − 1) + 0.9856d(n − 2) + 558.5e(n)
+ 1030e(n − 1) + 474.3e(n − 2)
(26)
Compare Eqs. (23) and (25) we get the co-efficients as follows
{d2 = 474.3, d1 = 1030, d0 = 558.5, c2 = −0.9856,
c1 = −0.01436, c0 = 1}
(27)
Equation (27) contains constant co-efficients and Eq. (26) contains duty cycle
command ‘d’, ‘e’ is defined as the difference between the output voltage reference
and the measured output voltage and ‘n’ is the sample number.
Close-loop control of digital PIDN given in Eq. (28) is obtained using the function
Digital_CloopN=feedback(DigitalPIDN*GsD,1) where GsD is polezero gain digital model of buck converter.
Digital_CloopN =
0.99281 (z + 0.8798) (z + 0.9651) (z + 1)2
(z + 0.8655) (z + 0.9678) (z 2 + 1.998z + 0.9982)
(28)
4 Simulation
4.1 Model Implementation in Simulink
The transfer function of the buck converter with duty cycle of 0.25 obtained in
Eq. (14) is implemented with PID, PIDN and without PID control in Simulink as
shown in Fig. 5. Auto-tuning is performed for PID block as shown in Fig. 6, the
obtained PID gains are kp = 38.690966, ki = 10390.855193, kd = 0.01552273, N =
22765.4257546504. Input voltage is of 12 V therefore 12 V DC signal is connected
and it is to be scaled down to 3 V as per the design specification therefore 3 V
reference DC signal is connected. Comparator block generates error signal and PID
block generates signal of duty cycle which is supposed to be 25%. Output signal is
fed back to compare with reference signal of 3 V in order to generate error signal.
When the error signal is zero, PID block generates duty cycle of 25%. If the error
signal is positive that means output signal amplitude is less than reference signal then
PID block increases duty cycle more than 25% in order to increase output signal till
3 V. If the error signal is negative that means output signal amplitude is more than
1264
V. Viswanatha et al.
Fig. 5 Buck converter transfer function model with PID, PIDN and without PID control in Simulink
Fig. 6 PID/PIDN controller block Kp, Ki, Kd gain parameters with N = 22765.4257 for Buck
converter model
Research on State Space Modeling, Stability Analysis …
1265
reference signal then PID block decreases duty cycle less than 25% until output
signal reaches 3 V. Simulation results from this method are shown in Fig. 8
4.2 Text-Based Computational Implementation in MATLAB
The mathematical modeling can also be implemented using text-based computational implementation. This allows the model to easily embed in design, simulation,
and analysis and education application software. Text-based computational implementation basically translates the differential equations into discrete programming
code. Using MATLAB code as shown in Fig. 5, Eqs. (12) and (13) are used to obtain
transfer function as shown in Eq. (14) using function ss2tf(). By making use of
transfer function, step response, bode plot and pole and zero plot are obtained for
buck converter with PID, without PID and PIDN control. Equations (12)–(17) are
simulated in MATLAB code for the following buck converter specification (Fig. 7).
5 Results and Discussion
Figures 8, 9 and 10 show the time response where steady-state and transient response
and imbalance in output signal due to high value of ‘N’ are analyzed and demonstrated whereas Figs. 11, 12, 13, 14 and 15 show frequency response in both analog
and digital domain where stability is analyzed. pole-zero plot can represent either
discrete-time system and continuous-time system. Here it represents both continuous
and discrete-time response of buck converter.
Figure 6 shows output signal of buck converter obtained from the simulation
using the method called as model implementation in Simulink. Here the output
signal reaches amplitude of 3 V as per design. With PID, peak overshoot as well as
settling time are reduced compared to the signal obtained from PIDN and without
PID control as shown in Fig. 10. But the issue here is what happens when value
of ‘N’ is taken higher than the one obtained in tuning process. In this entire paper
higher value of ‘N’ considered is ten times more than the one obtained in tuning
process, i.e. N = 227650.4257. In real-time implementation, PID with high filter
co-efficient (N) is just PID control and to use it in real-time, value of N to be equal
to the original value obtained by auto-tuning so it is called PIDN control so here, for
PIDN control ‘N’ value taken is 22765.4257. Results obtained from this method
in MATLAB are shown in Figs. 10, 11, 12, 13, 14 and 15. Here Figs. 11, 12 and 13
show bode plots at and Figs. 14 and 15 show pole-zero plots at N = 22765.4257.
Considering the results of pole-zero plot and for open-loop system, zeros determine stability whereas poles determine stability in closed-loop system. Since the
obtained transfer function model is for closed-loop control of buck converter, therefore, identification of position of poles determines the stability. From pole-zero plot,
it is clear that three poles and two zeros obtained from transfer function with PID
1266
V. Viswanatha et al.
%**************************BEGIN***********************
*******************************
A=[0 -666.6 ; 4000 -1333.3];
B=[166.6;0];
C=[0 1];
D=[0];
[b,a] =ss2tf(A,B,C,D)
nn =tf(b,a) % transfer funtion of buck converter
withoutpid=nn
%pzmap(withoutpid)
%step(withoutpid)
%bode(withoutpid)
%bode(withoutpid)
hold on
Gs=zpk([],[(-666.5+1490.8j),(-666.5-1490.8j)],666400)
GsD = c2d(Gs,0.1,'tustin')
%bode(GsD)
pzmap(GsD)
%PID with high value of N become ideal PID, here high value of N
considered is 10 times more than the value obtained in tuning process
.%so N= N=227650.4257
%********************************************************************
***************************************
kp=38.6909662875852
ki=10390.8551932933
kd=0.0155227358303195
N=227650.4257
analog_PID=tf([(kp+kd*N),(kp*N+ki),ki*N],[1,N,0])
%analog_PID=tf([kd,kp,ki],[1,0])% transfer funtion of PID controller
which is tuned in simulink for buck converter
analog_Cloop=feedback(analog_PID*Gs,1)
%withpid=PID
%pzmap( analog_PID)
%bode( analog_PID)
hold on
%bode(analog_Cloop)
%pzmap( analog_Cloop)
%step(analog_Cloop)
DigitalPID = c2d(analog_PID,0.1,'tustin')
Digital_Cloop=feedback(DigitalPID*GsD,1)
%pzmap(DigitalPID)
%bode(DigitalPID)
%pzmap( DigitalPID)
%step(analog_Cloop)
%bode(Digital_Cloop)
pzmap( Digital_Cloop)
%PIDN****************************************************************
**************************************
%PID with N(filter co-efficient)
kp=38.6909662875852
ki=10390.8551932933
kd=0.0155227358303195
N=22765.4257546504
Fig. 7 Mathematical model pseudo code for buck converter without PID, with PID and PIDN
control
Research on State Space Modeling, Stability Analysis …
1267
analog_PIDN=tf([(kp+kd*N),(kp*N+ki),(ki*N)],[1,N,0])% transfer
funtion of PIDN controller which is tuned in simulink for buck converter
%contlr=tf([392.1,8.912e05,2.366e08],[1,2.277e04,0])
analog_CloopN=feedback(analog_PIDN*Gs,1)% analog closed loop control
with PIDV
%withpidn=PIDN
%bode(analog_PIDN)
%bode(analog_CloopN)
%step(analog_CloopN)
%pzmap( analog_CloopN)
DigitalPIDN = c2d(analog_PIDN,0.1,'tustin')
Digital_CloopN=feedback(DigitalPIDN*GsD,1)
%bode(DigitalPIDN)
%step(Digital_CloopN)
%bode(Digital_CloopN)
pzmap(Digital_CloopN)
%**************************END*************************
******************************
Fig. 7 (continued)
Load voltage Vo (V)
4
PID
withoutPID
PIDN
3.5
3
2.5
2
1.5
1
0.5
0
0
0.002
0.004
0.006
0.008
0.01
0.012
0.014
0.016
0.018
0.02
Time (seconds)
Fig. 8 Simulation output of buck converter with PID, without PID and PIDN control in Simulink
3.0005
PID
3.0004
PIDN
3.0003
3.0002
3.0001
3
2.9999
2.9998
2.9997
0.04
0.045
0.05
0.055
Time
Fig. 9 Simulation output of buck converter with PID and PIDN control in Simulink
0.06
1268
V. Viswanatha et al.
Step Response
0.4
0.35
System: PIDN
Peak amplitude: 0.288
Overshoot (%): 15.1
At time (seconds): 7.81e-05
Amplitude
0.3
System: w ithout PID
Peak amplitude: 0.311
Overshoot (%): 24.5
At time (seconds): 0.00214
System: PID
Peak amplitude: 0.254
Overshoot (%): 1.72
At time (seconds): 0.000125
w ithout PID
PID
PIDN
0.25
System: PIDN
Final value: 0.25
0.2
0.15
0.1
0.05
0
-1
0
1
2
3
4
5
6
7
Time (seconds)
-3
x 10
Fig. 10 Step response of buck converter with PID, PIDN and open-loop control for 25% duty cycle
and N = 22765.4257
Bode Diagram
20
withoutpid
analog_Cloop
analog_CloopN
Magnitude (dB)
0
-20
-40
-60
-80
-100
-120
System: analog_Cloop
Phase Margin (deg): 173
Delay Margin (sec): 0.00126
At frequency (rad/s): 2.39e+03
Closed loop stable? Yes
-140
0
Phase (deg)
System: analog_CloopN
Peak gain (dB): 0.611
At frequency (rad/s): 5.64e+03
System: withoutpid
Peak gain (dB): -9.49
At frequency (rad/s): 1.33e+03
PID-Bandwidth
-45
System: analog_Cloop
Phase Margin (deg): 157
Delay Margin (sec): 0.000555
At frequency (rad/s): 4.93e+03
Closed loop stable? Yes
System: analog_CloopN
Phase Margin (deg): 174
Delay Margin (sec): 0.00135
At frequency (rad/s): 2.25e+03
Closed loop stable? Yes
System: analog_CloopN
Phase Margin (deg): 120
Delay Margin (sec): 0.000195
At frequency (rad/s): 1.07e+04
Closed loop stable? Yes
-90
PIDN-Bandwidth
-135
-180
10
2
10
3
10
4
10
5
10
6
10
7
Frequency (rad/s)
Fig. 11 Analog domain—bode plot of buck converter in open loop, closed loop with PID and PIDN
at N=22765.4257
Bode Diagram
Phase (deg)
Magnitude (dB)
100
0
-100
System: PIDN
Peak gain (dB): 0.16
At f requency (rad/s): 31.3
withoutpid
PID
PIDN
System: w ithoutpid
Peak gain (dB): -9.71
At f requency (rad/s): 31.1
-200
-300
-400
System: PIDN
Phase Margin (deg): 174
Delay Margin (samples): 0.97
At f requency (rad/s): 31.2
Closed loop stable? Yes
-500
-600
360
270
System: PIDN
Phase Margin (deg): 120
Delay Margin (samples): 0.668
At f requency (rad/s): 31.4
Closed loop stable? Yes
180
90
0
-90
-180
10-1
0
10
1
Frequency (rad/s)
10
System: PID
Phase Margin (deg): 157
Delay Margin (samples): 0.874
At f requency (rad/s): 31.3
Closed loop stable? Yes
System: PID
Phase Margin (deg): 173
Delay Margin (samples): 0.964
At f requency (rad/s): 31.2
Closed loop stable? Yes
102
Fig. 12 Digital domain—bode plot of buck converter in open loop, closed loop with PID and PIDN
at N=22765.4257
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Bode Diagram
System: Digita-PIDN
Peak gain (dB): 0.16
At frequency (rad/s): 31.3
100
System: analog-PIDN
Peak gain (dB): 0.611
At frequency (rad/s): 5.64e+03
Magnitude (dB)
0
-100
System: analog-PID
Peak gain (dB): 0.158
At frequency (rad/s): 3.22e+03
System: Analog-withoutpid
Peak gain (dB): -9.49
At frequency (rad/s): 1.33e+03
Analog-withoutpid
Digital-withoutpid
-200
analog-PID
Digital-PID
-300
analog-PIDN
Digital-PIDN
-400
-500
-600
360
System: Digita-PIDN
Phase Margin (deg): 174
Delay Margin (samples): 0.97
At frequency (rad/s): 31.2
Closed loop stable? Yes
Phase (deg)
270
180
System: Digita-PIDN
Phase Margin (deg): 120
Delay Margin (samples): 0.668
At frequency (rad/s): 31.4
Closed loop stable? Yes
System: Digital-PID
Phase Margin (deg): 173
Delay Margin (samples): 0.964
At frequency (rad/s): 31.2
Closed loop stable? Yes
90
System: analog-PIDN
Phase Margin (deg): 174
Delay Margin (sec): 0.00135
At frequency (rad/s): 2.25e+03
Closed loop stable? Yes
System: analog-PIDN
Phase Margin (deg): 120
Delay Margin (sec): 0.000195
At frequency (rad/s): 1.07e+04
Closed loop stable? Yes
0
System: Digital-PID
Phase Margin (deg): 157
Delay Margin (samples): 0.874
At frequency (rad/s): 31.3
Closed loop stable? Yes
-90
-180
0
-1
10
10
2
1
10
10
10
10
10
10
7
6
5
4
3
10
Frequency (rad/s)
Fig. 13 Mixed domain—bode plot of buck converter in open loop, closed loop with PID and PIDN
at N=22765.4257
x 10
4
Pole-Zero Map
1.5
0.998
0.995
0.99
0.978
0.95
0.8
withoutpid
PID
PIDN
Imaginary Axis (seconds -1)
1
0.999
0.5
1
0
1
-0.5
1
-1
2e+05
1.5e+05
1e+05
5e+04
0.999
0.998
0.995
-2
-1.5
0.99
0.978
-1
0.95
-0.5
-1
Real Axis (seconds )
0.8
0
5
x 10
Fig. 14 Analog domain—Pole-Zero plot of buck converter in open loop, closed loop with PID and
PIDN at N=22765.4257
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Pole-Zero Map
1
0.5π/T
0.6π/T
0.8
withoutpid
PID
PIDN
0.4π/T
0.1
0.7π/T
0.3π/T
0.2
0.3
0.6
0.8π/T
0.5
0.6
Imaginary Axis
0.4
0.7
0.8
0.9π/T
0.2
0
0.2π/T
0.4
0.1π/T
0.9
1π/T
1π/T
-0.2
0.9π/T
0.1π/T
-0.4
0.8π/T
-0.6
0.2π/T
0.7π/T
-0.8
0.3π/T
0.6π/T
-1
-1.5
0.4π/T
0.5π/T
-1
-0.5
0
0.5
1
Real Axis
Fig. 15 Digital domain—Pole-Zero plot (Z-plane)of buck converter in open loop, closed loop with
PID and PIDN at N=22765.4257
model, moved towards left-hand side of s-plane than that of two poles of the transfer
function model without PID. Coming to PIDN model, there are four poles and two
zeros exist, here three poles moving ahead in left-hand side of s-plane than that of
the poles of PID model. This infers that PIDN model offers better stability of the
system. Also it is understood from Fig. 15 that all poles and zeros lie within a unit
circle of z-plane thus this buck converter is stable and causal system so it offers the
property of region of convergence (ROC).
Coming to bode plot, the stability of buck converter is analyzed in open-loop
and closed-loop control in both analog and digital domains. With filter co-efficient
(N) bode plot gives clear information about the stability of the system along with
important features like bandwidth (BW) which determines dynamics performance
of the system [11] with PIDN system gives wider BW so it offers good dynamic
response. From Fig. 11 with PID and PIDN, system crosses ‘0’ dB thus output is
equal to input with gain of ‘1’ this system is stable also for more information about
the stability gain margin(GM) that give phase margin(PM) = 145° and again system
crosses ‘0’ dB in gain margin that gives PM = 44.8°. In both the cases PM > 0
and in phase margin, system never crosses −180° therefore GM is infinity so the
buck converter in closed-loop control is absolutely stable. With PID and without
PID control, system is not crossing ‘0’dB and determination of stability is only with
value of GM. In this case too, system never crosses −180° so GM is infinity. Overall
with PIDN control, system gets better stability and it is understood with both the
values of GM and PM.
Step response of buck converter with PID, PIDN and without PID are tabulated
in Table 1. Here peak amplitude and overshoot are not the issues but the main issue
is how to filter out the high-frequency noise which causes large variation in control
signal that drives the buck converter into erroneous system as shown in Fig. 6.2.
Research on State Space Modeling, Stability Analysis …
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Table 1 Step response characteristics of buck converter with PID, PIDN and without PID
Buck converter
Peak amplitude in
volts
Overshoot (%)
1.53
Rise time in
seconds
Settling time in
seconds
PID
0.254
0.0000495
0.0000779
Without PID
0.311
24.5
0.000906
0.00515
PIDN
0.288
15.2
0.0000356
0.000131
Therefore, PIDN is developed for this and it gives better rise time compare to PID
and open loop.
6 Conclusion
All relevant transfer functions of the buck converter for analog and digital control with
PID, PIDN and without PID are developed and simulated. Improvement of steadystate, dynamic response and overall stability of the buck converter are discussed and
demonstrated with PID and PIDN. Compensator design for digital control implementation are carried out; Eq. (26) represents digital PIDN difference equation for
the specified buck converter which can give regulated output of 3 V and 1 A with
total output of 3 W which is needed in automotive electronics applications.
This equation can be implemented in digital systems like DSP using C/C++ code
by utilizing co-efficients of difference equation (26) which represents PIDN control
law.
Further, ADC followed by PIDN which is followed by DPWM are integrated to
generate accurate duty cycle of control signals for power converters. This completes
closed-loop embedded control of power converters and drives systems
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