The 34th International Power System Conference (PSC2019)
9-11 December, Niroo Research Institute, Tehran, Iran
A Corrected method for Calculation of Failure Rate
Based on IEC-TR-62380
Abolfazl Babaei
School of Electrical
Engineering,
University of Manitoba
Winnipeg, Canada
Arman Najafizadeh
School of Electrical
Engineering, Iran
University of Science &
Technology, Tehran, Iran
Iman Kaffashan
School of Electrical
Engineering,
University of Manitoba
Winnipeg, Canada
Hossein Rezaei
School of Electrical
Engineering, Babol
Noshirvani University of
Technology, Babol, Iran
babaiea@myumanitoba.ca
Najafiz@alumni.iust.ac.ir
kaffashi@myumanitoba.ca
hosseinrezaei1367@nit.ac.ir
The multilevel inverter failure rate can be calculated by two
important standards include MIL-217 and IEC-TR-62380. The
MIL-217 does not consider some major parameters such as the
components operation time, anti-parallel diode, IGBT currents,
and package type current. However, the IEC-TR-62380
considers these parameters for calculation of the failure rate.
Abstract— In this paper an optimized way of failure rate and
mean time between failure evaluation can be used in the multilevel
inverters is proposed. Actually, There are two main references,
MIL-HDBK and IEC handbook, used for failure rate calculation.
. Considering this, lots of literatures used to use MIL-HDBK for
failure rate analysis. However, According to the comparison
having been done in this paper, some effective parameters are not
considered in the MIL-HDBK standard, and these parameters are
included environmental conditions, package type and operation
time. Therefore, the calculation results of the failure rate and
MTBF based on MIL-HDBK are not accurate. In this paper, an
improved method in which the most important parameters
effective on the failure rate and MTBF are considered by
considering the IEC handbook as the main standard for
calculation. Because of this point that the IEC handbook standard
considers environmental conditions, package type and operation
time for each component, the calculation results based on the
standard are more precise than MLL-HDBK one. Apart from
that, for calculation of the either conduction loss or switching loss,
a precise method is used because most of the published papers used
a conventional method for power calculations, and that is why
temperature and failure rate calculations in those papers are not
accurate enough to be able to calculate junction temperature,
failure rate, and MTBF correctly. Eventually, the presented
method is evaluated by a five-level NPC simulation in the PLECS
software. Finally, theoretical and simulation results of the
conduction and switching losses are very close to each other.
In [3], [4], [5], a general procedure has been presented for
the switching and conduction losses calculations in power
semiconductors of numerical circuits. The multilevel inverter
losses are obtained using the mathematical model in which the
switch voltage is modeled by a threshold voltage and resistance
[6], [7], [8]. Fault tolerate methods can increase reliability [9].
However, the fault tolerance method is achieved by using more
power switches which increases system cost. Reliability and
MTTF are found based on failure rate in which other parameters
such as environmental quality, voltage stress and junction
temperature coefficients have not been considered [10], [11],
[12]. As so, failure rate and MTTF do not calculate accurately.
The accurate calculations of the failure rate and power loss are
the cases which do not consider carefully.
In this paper the precise failure rate calculation is carried out
through the IEC-TR-62380. Also, the conduction and switching
losses are figured out by an improved method. The simplicity
of the methods causes the calculation procedure to be extend in
multilevel inverters with any number of levels. The proposed
equations are evaluated by simulations performed on a 5 level
diode-clamped inverter and level shift SPWM modulation.
Keywords— Power loss; MIL-HDBK; IEC-TR-62380;
I. INTRODUCTION
II.
Multilevel inverters have many industrial applications such
as motor controls [1],[2], UPS systems, transmission lines, etc.
There are many advantages in these inverters such as low THD,
𝑑𝑣
low , low voltage stress on the switches and no need to the
𝑑𝑡
large filter at the output. The voltage-source multilevel inverters
are divided into three main topologies: Neutral-Point Clamped
(NPC-MLI), Cascaded H-bridge (CHB-MLI), and Flying
Capacitor (FC-MLI). Among the mentioned topologies, the
NPC-MLI topology is used in high power applications widely.
Nowadays, the researchers usually focus on the size and cost
optimization of the inverters, improving its quality, lifetime and
so on. Although, many parameters such as the heat sink size,
thermal protection, lifetime, and economical analysis are
depend highly on the power loss, till now, the power loss
calculations are usually limited to the simulation results or deep
mathematical equations. Also, lifetime is another important
case in multilevel inverters which depends on the failure rate.
978-1-7281-5273-8/19/$31.00 ©2019 IEEE
RELIABILITY
The system failure rate is relevant to several effective
parameters include environmental and operating conditions,
operation time and system performance. The component failure
rate is usually studied under two methods. The first method is
based on experimental test which is also called accelerated test.
In the second method, the failure rate prediction is based on
standard handbooks of electronic equipment.
The basic definition of the failure rate is the frequency that
a component is failed. In the most engineering components
include semiconductor devices, the failure rate follows the
bathtub curve as depicted in Fig. 1. According to Fig. 1 (a), the
failure rate varies during the system life cycle. The repair rate
defines as the frequency that a component is repaired. This rate
is constant in an exponential distribution. The function of
probability density is expressed as:
417

f (t )   e
t


where 𝜆 is failure rate. Afterwards, the reliability is calculated
through (2). The Reliability in terms of time is shown in Figure
1(c).

R (t )  e
t



The mean time to failure (MTTF) is expressed as:

M TTF 
1



The mean time to repair (MTTR) defines as the average time
that the system is in repairing condition. This parameter is
obtained as:

M TTR 
1


M TBF  M TTF  M TTR 

1


1


1


PC o n  V C E (O N )  I C ( O N )  D C O N

III. IEC-TR-62380 STANDARD INTRODUCTION
DCON 
tC on
T


Si 
1
ti  ti 1
ti

( A r s in w t  i  1) d t
Ar  M  a

ti 
i  T
2

A. Conduction Loss
Power switch conduction loss is calculated as [5-8]:




where “M” stands for the modulation index and “a” for the
number of voltage sources. In (11) 𝜃𝑖 indicates switching angle
and can be expressed as (12).
POWER LOSS
PC o n  V C E (O N )  I C ( O N )

in which Ar indicates the sinusoidal waveform amplitude.
According to Fig. 4, ti is the time in which the voltage switches
from ith level to (i+1)th level. Hence, Ar and ti are expressed as:
Fig. 1. (a) Failure rate curve (b) Function of probability density (c) Reliability
function over “t”[12].


ti 1
 i  a rc s in
IV.

Where t C o n stands for ith level conduction time and T for
time period. Conduction time for each level in a 5-level inverter
is depicted in Fig. 2. It can be seen by Figure 2 that the
conduction time calculation is difficult in high frequencies.
Therefore, the estimated and precise methods are used for
conduction time calculation. In the estimated method, the
output waveform is supposed to be sinusoidal as shown in Fig.
3. The ith level conduction time percentage can be calculated as:

In this paper, the IEC standard handbook is the basic
evaluation of the lifetime. This standard has solved the
problems of the MIL-217 standard. In fact, the IEC-TR-6280
considers the environmental and operation conditions on a
system and package type. Besides, this standard has covered
almost all the components of inverters include transistors,
diodes, inductors, capacitors and especially IGBTs. Therefore,
the results of lifetime evaluation by using IEC-62380 is more
accurate than MIL-217.

According to (7), there is one coefficient which is added to
the conduction loss equation. This coefficient is the conduction
correction coefficient and can be obtained as:

MTBF is the mean cycle time between the failures of the
system. For systems with much higher repair rate than the
failure rate, MTBF can be approximated by MTTF [12]:

In which IC(ON) and VCE(ON) refers to collector current and
Collector-Emitter voltage, respectively. So far, equation (6) is
used in conduction loss calculation. However, this equation is
general, and it is not suitable for the theoretical calculation,
Also, power loss calculation is limited to the simulation results
or deep mathematical equations. As so, an improved method for
the conduction loss calculation is proposed as:

418
i
Ar
(12)
1
Sa1, Sa3'
Level 1
1
1
1
1
Switching Pulse
Level 2
1
Level 0
0
Level -1
Switching Pulse
0
Level -2
Output Voltage
Fig. 4. ti in an n-level inverter
0
0
1
Sa2, Sa4'
0
1
Sb1, Sb3'
0
1
0
Sb2, Sb4'
0
0
0
t1
T/4
T/2-t1 T/2 T/2+t1
3T/4
T-t1
T
Time (s)
Fig. 5. Switching signals for switches of a 5-level inverter
0
0
T/4
T/2
Time
3T/4
Therefore, the level 1 conduction time percentage is
between first and zero levels as (S1(t1-t0)) and level 2
conduction time percentage is between level 1 and level 2 as (1S2(t2-t1)).
T
Fig. 2. Conduction time for each level in a 5-level inverter
The conduction time is calculated by:

t C o n  2  S i ( t i  t i  1 )  (1  S i  1 ) ( t i  1  t i ) 


As an example, 1st level conduction time is obtained by:

t  le v e l 1  2  S 1 ( t 1  t 0 )  (1  S 2 )( t 2  t 1 ) 




B. Switching loss
Switching loss depends on turn on switching energy (Eon),
turn off switching energy (Eoff), and switching frequency. So
far, switching loss is calculated by (15). However, this equation
is general and it is appropriate in calculation of switching loss
in two-level inverters. Therefore, it cannot be extended to nlevels inverters.

Sn
nVdc
S(n-1)
PS W  F s w  ( E s w ( o n )  E s w ( o ff ) )


An estimated method is used for switching loss calculation.
This equation is shown in (16). As the same approach taken in
(7), one coefficient is added to switching loss equation. The
coefficient D’ is switching correction coefficient, and it is
proposed as:
(n-1)Vdc
S(n-2)
(n-2)Vdc
(n-3)Vdc
S3
3Vdc
S2
2Vdc
S1

PS W  F s w  ( E s w ( o n )  E s w ( o ff ) ) 

D 
D
'


Vdc
0
0
t1
t2
t3
t(n-3)
t(n-2)
Time
t(n-1)
T/4

'
t sw

T

in which tsw is the switching time. Calculation of the switching
time in the high frequency converters would be a difficult task.
Therefore, the estimated method is used for finding the
switching time. For example, Fig. 5 shows the switching signals
for a 5 levels inverters. Switching time for one switch that is
active in level 1 is calculated by:
Fig. 3. Conduction time percentage in each level
nVdc
(n-1)Vdc
(n-2)Vdc
t sw ( s
(n-3)Vdc
3Vdc
a1
)
 2(
T
4
)
(18)
V. JUNCTION TEMPERATURE
2Vdc
Vdc
Junction temperature plays an important role in the
economical and technical analysis of a system. This
temperature is an effective parameter in lifetime calculation.
Junction temperature is obtained by:
0
0
t1
t2
t3
t(n-3) t(n-2)
t(n-1)
T/4
T/2
Time (s)
419

T j  T A  ( Ps w  PC o n )  Z th ( j  A )

TABLE I.

TYPICAL VALUES FOR THERMAL CONDUCTIVITY
0
 ( C / W  IN C H )
where Tj and TA refer to the junction and ambient temperatures
respectively. Also, Zth(j-A) is thermal impedance between
junction to ambient which is expressed as:

Z th ( j  A )  Z th ( j  C )  Z th ( C  S )  Z th ( S  A )

Copper (pure)
Silicone Rubber
Alumina
0.1
81
1.15
Silicone Grease
204
 tr a n s is to r   D ie   D ie  d io d e   P a c k a g e   o v e r s tr e s s


In the above equation Zth(j-c) is the thermal impedance
between junction and case. This parameter can be found from
the IGBT datasheet. Zth(C-S) is the thermal impedance between
case to sink which depends on thermal resistance and
capacitance. Thermal capacitance is defined as the ability of a
component to store thermal energy. Also, thermal resistance is
defined as the ability of a material to resist against the heat flow.
The thermal resistance between case and sink is expressed as:

R th ( C  S ) 
 t
A

as:

The thermal impedance between heat sink and ambient is
calculated as:
Z th ( S  A ) 
TA is assumed 45
VI.
0
C
TS  T A
PT o ta l


y




( )
    (       i  1 t i  i  

0
s
0


  o n   o ff 




z


3


 2 .7 5  1 0  
( n )
 b 
0 .6 8
i  (  Ti )
i 1






( I   E O S )








VII. SIMULATION RESULTS
The presented equations are evaluated by simulation carried
out in the PLECS software for five-level NPC inverter. The
NPC inverter simulated in PLECS software is depicted in Fig.
9. Simulated system in PLECS. The inverter consists of two
300V voltage sources, one 12 ohm resistive load and eight
IGBT-diode switches (FGH60N60SMD). The inverter
switching frequency is 15KHZ.
FAILIURE RATE CALCULATION BASED ON IEC-TR-62380
STANDARD
 tr a n s is to r   D ie   P a c k a g e   o v e r s tr e s s 
(25)
in which 𝜆𝑝𝑎𝑐𝑘𝑎𝑔𝑒 and 𝜆𝑜𝑣𝑒𝑟𝑆𝑡𝑟𝑒𝑠𝑠 are constant. Therefore,
𝜆𝐷𝑖𝑒 is an important parameter in calculation of the failure rate
of the multilevel inverter which depends on the junction
temperature and power loss. As so, 𝜆𝐷𝑖𝑒 can be calculated
accurately by using the proposed equations of the power loss
and junction temperature which expressed previously in (7) and
(16) and (19). Fig. 6 and Fig. 7 show the 𝜆𝐷𝑖𝑒 variations in
terms of junction temperature and power loss in different
voltage stresses. Also, Fig. 8 shows the base failure rate in terms
of different packages such as TO220, TO247, etc.
.
According to IEC-TR-62380, the power switch failure rate
is expressed as:

As a result, the failure rate of the power switch can be found
 tr a n s is to r
where  denotes to the thermal conductivity, “t” to interface
material thickness and A to component area. Thermal
conductivity for the interface materials is also listed in TABLE
I. The interface material used in this study is silicone grease.



3
Vstress=200
Vstress=300
Vstress=400
2.5
where Die is related to the base failure rate, voltage stress,
junction temperature coefficient and the switching and
conducting time, and 𝜆𝑝𝑎𝑐𝑘𝑎𝑔𝑒 is relevant to components
packaging and 𝜆𝑜𝑣𝑒𝑟𝑆𝑡𝑟𝑒𝑠𝑠 is related to the impression of the
power switch performance. Since the anti-parallel diode is
parallel with the power switch, the failure rate of this
component should be considered as well. Therefore, the failure
rate of the power switch (Die-diode) is added to the equation.
 Die(FIT)
2
1.5
1
0.5
0
80
90
100
110
120
130
Tj
Fig. 6.
420
 D ie
variations with respect to Tj in different Vstress
140
150
160
1.8
V Stress=200
V Stress=300
V Stress=400
1.6
TABLE II.
THERMAL IMPEDANCE BETWEEN JUNCTION TO AMBIENT
1.4
Thermal Impedance
DIE
1.2
Zth(j-c)
1
0.8
Zth(s-a)
IGBT
DIODE
Rth(c-s)
Cth(c-s)
Rth(s-a)
Cth(s-a)
0.15
0.53
0.65
1.5
0.63
2.85
0.6
0.4
Zth(c-s)
TABLE III.
THEORETICAL RESULTS OF 5-LEVEL NPC MLI IN PLECS
0.2
0
0
5
10
15
POWER DISSIPTION
20
25
Ambient
Temp
Fig. 7.  D ie variations with respect to power dissipation in different VStress
Junction
Temp
Switches
Psw
Pcon
a1= b1
7.2w
20.7w
4 5C
0
8 5C
a2= b2
1.4w
27.7w
4 5C
0
8 6 .8 C
0
a3= b3
1.4w
27.7w
4 5C
0
8 6 .8 C
0
a4= b4
1.4w
27.7w
4 5C
0
8 6 .8 C
0
30
0
85
80
TO-247
75
TO-220
 Transistor
70
65
TABLE IV.
SOT-223
60
55
50
SOT-23
45
40
0
1
2
3
4
B
5
6
7
8
Fig. 8. relation between  b and failure rate for some packages
Thermal impedance between junction to case, case to sink,
and sink to ambient are listed in the TABLE II. The theoretical
and simulation results of the power loss and junction
temperature calculations are depicted in TABLE III.
SIMULATION RESULTS OF 5-LEVEL NPC MLI IN PLECS
Ambient Temp
Junction
Temp
Switches
Psw
Pcon
a1= b1
7.25w
20.64w
4 5C
0
84.92
a2= b2
1.42w
27.5w
4 5C
0
8 6 .7 4 C
0
a3= b3
1.42w
27.5w
4 5C
0
8 6 .7 4 C
0
a4= b4
1.42w
27.5w
4 5C
0
8 6 .7 4 C
0
TABLE V.
FAILURE RATE CALCULATIONS FOR EACH SWITCH IN 5-LEVEL
NPC INVERTER
Component
Component
62.22
D2
62.22
a2,
77.519
-
-
a3,b3
77.519
-
-
a4,b4
77.519
Total
620.148
124.44
a1
 T r a n s is to r
D1
Total
TABLE VI.
 D IO D E
77.517
FAILURE RATE CALCULATIONS FOR EACH SWITCH IN 5-LEVEL
NPC INVERTER
MTBF (power Transistors)
1.9937 × 106 (h)
MTBF (diodes)
8.036 × 106 (h)
MTBF (Total)
1.343 × 106 (h)
According to TABLE III and TABLE IV, the simulation
and theoretical results are in good agreement with each other
which show that the proposed equations are accurate. The
failure rate and MTBF calculations are shown in TABLE V and
Fig. 9. Simulated system in PLECS
421
TABLE VI. These results are accurate and can be extended to
n-levels inverters.
Electronics, 2006 IEEE International Symposium on, Vol. 2, July 2006,
pp.1589-1594.
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optimization of parallel-inverter system,” Ind. Electron. IEEE Trans., vol.
59, no. 10, pp. 3881–388.
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International Symposium on, 2012, pp. 19–30.
VIII. CONCLUSIONS
In this paper, after expressing the flaws of MIL-217
standard in finding the failure rate, the IEC-TR-62380 is
introduced for the failure rate calculation in a power switch.
This standard is more accurate than the MIL-217, since it
considers the package type, operation time, etc. However, the
IEC-TR-62380 does not consider the failure rate of the antiparallel diode. As so, the failure rate of the anti-parallel diode
impact is applied by adding it to the relative equation. The
accurate calculation of the power loss also leads to precise
lifetime and junction temperature calculations. Therefore, an
improved method is proposed for finding the conduction and
switching losses. The simplicity of the equations of losses
causes they can be extended to n-levels inverters. Afterward,
the junction temperature, the failure rate and lifetime is
obtained accurately. By using these equations, the technical and
economic analysis and lifetime studies can be performed
accurately. The simulation is carried out in the PLECS software
for evaluation of the proposed equations. The comparison of
theoretical calculations and simulation results show acceptable
accuracy and robustness of the proposed equations.
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