iST Group
Company Profile
Sherry Wu
January. 2021
CONFIDENTIAL DOCUMENT. DO NOT COPY OR DISTRIBUTE.
Who & What
2
Milestone
1994
2004
2010
Established in Hsinchu
(First Service = FIB)
IPO in Taiwan
OTC Market
Material Analysis
lab opened in
Hsinchu
2003
Built turnkey
service on
design of PCB,
Module &
System
1994
2001
2002
2003
2004
2007
2001
2007
Certified by
IECQ with
ISO17025
Setup lab in US
2002
Expanded operation
to China
2010
Setup labs in Shanghai &
Shenzhen with certification
by CNAS
3
Milestone
2015
2017
2020
Established
DEKRA-iST
with DEKRA
Relocation of Headquarter
Teamed up with NSPO
& other enterprises to
create a “Space
Radiation Environment
Testing Alliance.”
2014
2015
Became VESA authorized
DisplayPort lab
2016
2017
2018
2019
2020
2014
Became official
SimplayLabs ATC
Opened Signal Integrity
lab in Hsinchu
2018
2019
Entered
MOSFET
Wafer
Backend
Process
Signed a SPA to
transfer iST-SH
to Chinasti
4
Global Operation
 Staff
 Total
960 people
 Revenue
 2017
 2018
 2019
 2020Q1~3
94.0 million (US$)
70.3 million (US$)
84.0 million (US$)
75.7 million (US$)
Tokyo
San Jose
Kunshan
San Diego
Tel Aviv-Yafo
Taipei
Hsinchu
(HQ)
5
Awards & Accreditations
ISO 9001:2015
TAF ISO/IEC 17025:2017
CNAS ISO/IEC 17025:2017
ISO 14001:2015
ISO 45001:2018
ISO/IEC 27001:2013
ISO/IEC 17025:2017
6
Solution to Industry Chain
PCB / SMT
Industry
LCD
/ LED
LCD/LED
Industry
SemiConductor
Industry
PC
PC // IT
IT
Industry
Industry
3rd-Party
Labs
Consumer
System
System
Industry
Computer
Commute
Consumer
Suppliers
Communicate
7
Focused Ion Beam
CAD
(GDSII)
Navigation
State-of-the-art Equipment & Large Capacities
Over 25 Years of FIB Experiences
16 / 12 / 7nm
Ready
Continuous R&D for Industry Requirement
24-hour-a-day & 7-day-a-week Operation
New-FIB
Circuit Edit
(Patent No.I261904)
Copper &
Aluminum
Technology
High Accuracy
Laser Stage
WLCSP
FIB
Back-side FIB
8
Failure Analysis
Electrical
Verification
Non-destructive
Inspection
Sample
Preparation
Failure Site
Localization
Internal Failure
Localization
FIB
Cross
Section
3D
OM
Leakage
Open
Short
I-V
Curve
Decap
Current
Consumption
TDR
Cross
Section
CP
(Ion Milling)
Engineering
Assembly
BGA
Scope
Plasma
FIB
SEM
Backscattering
EMMI
InGaAs
EMMI
Reball
SAM
Iddq
Failure
Circuit
Probing
Thermal
EMMI
Backside
Preparation
3D
Xray
TLP
Voltage
Contrast
FIB-CE
Delayer
Xray
Functional
Failure
Physical
Failure Analysis
TEM
EDX
AFM
OBIRCH
AES
SIMS
Nano
Probing
XRD
XPS
9
Material Analysis
Crystallinity Analysis
Chemical Analysis
Dopant Analysis
Composition/Chemical bond
XRD
Concentration
IST - IST
EELS
AES
0.05%/0.1um
XPS
EDS
FTIR
Sample:
Data file: D:\Cameca IMS Data\6FE7#679 On site specifications\Profiles\As in Si\As_High.dp
Cs+ Ie: 15000eV Ip: 1.76e+02/1.73e+02nA Raster: 100um DT: Off Gate: 60%
P: 2.5e-09mbar SpleHV: -5000V MR: 4004 FA: 400um CA: 400um DeltaE: 49eV
Comments:
10/26/2017, 15:09
Depth Profile
Recipe: No_name_3.rdp
75As 28Si
Arsenic DL
ppt
8.357e12 atm/cm3(1.2uum to 2.4um)
1e19
Sr : 500 nm/min
ICPMS
SIMS
Conc, atom/cm3
1e18
1e17
1e16
1e15
1e14
1e13
Sample: Si[As]04
1e12
200
400
600
800
1000
1200
1400
Depth, nm
1600
1800
2000
2200
2400
2600
ppm
0.1%/10um
Electrical
Failure Analysis
CAFM
STEM
SEM
WLI/OP DBFIB
AFM
SCM
Leakage
1um
XRD
NBD
CBED
Stress Analysis
2D/3D morphology
1nm
DBFIB
TEM
STM
0.1um
Physical
Failure Analysis
0.1nm
XRR
AFM
Strain
Defect Analysis
Atom image
Thickness / Roughness /
Density Analysis
10
Engineering Sample Assembly
IC Assembly







Wafer / MPW Saw
Test-key Wire Bonding
LCD Driver IC Wire Bonding
Ceramic / COB Package
Rework/Backside Bonding
Small Volume Production
Customized Project
Ceramic Packaging
PCB Assembly





13 Zones Reflow Oven
Reflow Profile Optimization
Fine Pitch SMT
Selective Soldering
Under-fill process
COB Bonding
11
Reliability Assurance
IC EMC
Test
IC Product
Robustness
Test
Operating
Life Test
Package
Reliability
Test
Endurance
Test
Mechanical
Stress
Test
12
Automotive Electronics Qualification
 Total verification platform =
IC RA/FA/EMC  PCB/PCBA RA/FA  Module RA/EMC
 Complete customized AECQ verification plan
PCBA
Module
PCB
Component
Accelerated Environment Stress Test
Package Assembly Integrity Test
Die Fabrication Reliability Test
Electrical Verification Test
Defect Screening Test
Automotive Qualification







AEC-Q100 IC
AEC-Q101 Discrete
AEC-Q102 Optoelectronic
AEC-Q103 MEMS
AEC-Q104 MCM
AEC-Q200 Passive
AEC-Q005~006 Quality
13
Board Level Reliability Test
Mechanical Shock (Drop)
Vibration
Temp. Cycling
Temp. Humidity
Bending (Cyclic/Monotonic)
14
Space product assurance
NASA / ESA / MIL
Commercial electrical, electronic and
electromechanical (EEE) components
Component Manufacturer Assessment
Constructional Analysis
Evaluation Testing
Radiation Hardness
SPEBU – BGBM
IQC
Microscope
Front-side
Metallization
Sputter / E-less
Backside
Grinding
Taiko wafer process
Normal / Taiko
Backside
Metallization
Evaporator / Sputter
OQC
Wafer size: 200mm
Wafer thickness: 50um
AOI / Microscope
16
DSBU – FPGA SiP
iST’s FPGA SiP Solution
Memory KGD,
Bridge KGD,
ADC KGD,
etc,…
FPGA
Good
Die
FPGA
SiP
Discrete
Components
The prefect model for the
Innovative and Time-To-Market
requirements
17
One-Stop Solution to Product Life Cycle
Clarify the responsibility
for product failure
Design
Design
Prototype
Prototype
RMA
RMA
Speed up R&D &
the time-to-market
Highly Integrated
Engineering Solution
Laboratory
DVT
QVT
QVT
MVT
MVT
As the third party lab
& ensure quality
• DVT: Design Verification Test
• MVT: Manufacturing Verification Test
• QVT: Quality Verification Test
18
• RMA: Return Material Authorization
Thank You !
Like to know more?
Please visit our website www.istgroup.com
Contact us
+886-3-579-9909
sales@istgroup.com
19