Question (2)
2.a) Draw the timing diagram of the simplified read bus cycle.
2.b) Draw the fully buffered circuits for the 8088 Microprocessor.
2.c) For 8086 microprocessor running at 8 MHZ and performs bus
cycle with two wait states
i) What is the duration of bus cycle?
ii) What is the maximum rate for the microprocessor?
iii) What is the frequency of the input crystal, OSC and PCLK?
i)
𝑇𝐶𝐿𝐾 =
1
𝐹𝐶𝐿𝐾
=
1
= 125 𝑛𝑠𝑒𝑐
8 ∗ 106
One bus cycle = (4 + 2) TCLK = 6 TCLK = 6 ∗ 125 = 750 nsec
ii)
Fclk = 8 MHz
iii)
Fclk =
Fcry
3
Fcry = Fclk ∗ 3 = 8 ∗ 3 = 24 MHz
FOSC = FCRY = 24 MHz
FPCLK =
Fcry 24
=
= 4 MHz
6
6
2.d) Show how the flag is affected by the addition of AAAAH and
5556H.
(d)
1111 1111 1111 11
CF=1
AAAAH
1010 1010 1010 1010
SF=0
5556H +
0101 0101 0101 0110 +
ZF=1
1 0000 0000 0000 0000
PF=1
AF=1
2.e) For 8086 microprocessor, State the logic level of the following
control signals: 𝐑𝐃, 𝐖𝐑, 𝐁𝐇𝐄, DT/𝐑, S4, S3, during execution the
following program:
i) MOV AL , [SI]
ii) PUSH AX
iii) IN AX , DX
Instruction
RD WR BHE DT/R S4 S3
MOV AL, [SI] 0
1
1
0
1 1
PUSH AX
1
0
0
1
0 1
IN AX, DX
0
1
0
0
1 0
Question (3)
3.a) Identify the type of each memory chip and determine the
number of address pins:
i) 44256
ii) 40256
i) 44256: DRAM
number of locations = 256K = 28 ∗ 210 = 218
18
number of address pins =
= 9 pins
2
ii) 40256: SRAM
256
Memory size =
= 32 Kbyte
8
number of locations = 32 K = 25 ∗ 210 = 215
number of address pins= 15 pins
3.b) For the memory interface shown in Figure 1, find the addresses
range for third chip and last chip.
Third chip (010)
start
end
A19
1
1
A18
1
1
A17
0
0
A16
0
0
A15
0
0
A14
0
0
Decoder enable
A13
0
0
A12
1
1
A11
0
0
A10
0
1
A9
0
1
A8
0
1
Chip select
A7
0
1
A6
0
1
A5
0
1
A4
0
1
A3
0
1
A2
0
1
A1
0
1
A0
0
1
A3
0
1
A2
0
1
A1
0
1
A0
0
1
Input to memory
Starting address of third chip = C1000H
Ending address of third chip = C17FFH
Last chip (111)
start
end
A19
1
1
A18
1
1
A17
0
0
A16
0
0
A15
0
0
Decoder enable
A14
0
0
A13
1
1
A12
1
1
A11
1
1
A10
0
1
A9
0
1
Chip select
Starting address of last chip = C3800H
Ending address of last chip = C3FFFH
A8
0
1
A7
0
1
A6
0
1
A5
0
1
A4
0
1
Input to memory
3.c) Design a memory system of 24Kbytes to be interfaced with 8088
microprocessor based on 2764 EPROM at addresses (B2000H –
B7FFFH). You can use only 74139 (dual 2-4 Line decoder) and
NAND gate.
64
2764 Memory size = = 8 Kbyte
8
Number of Memory locations = 8 K = 23 ∗ 210 = 213
(A0 to A12)
Total memory size = 24 Kbyte
Number of chips =
address
B2000H
B7FFFH
A19
1
1
A18 A17 A16
0
1
1
0
1
1
Decoder enable
A15
0
0
A14
0
1
total memory 24 Kbyte
=
= 3
chip size
8 Kbyte
A13
1
1
Chip select
A12
0
1
A11
0
1
A10
0
1
A9
0
1
A8
0
1
A7 A6 A5
0
0
0
1
1
1
Input to memory
A4
0
1
A3
0
1
A2
0
1
A1
0
1
A0
0
1
3.d) Assume that we have 6 bytes of hexadecimal data: 32H, 45H,
67H, 12H, 11H, 32H
i) Find the Checksum byte.
ii) Perform the checksum operation to ensure data integrity.
iii) If the third byte 67H had been changed to 57H, Show how
Checksum detects the error.
i)
32
+ 45
+ 67
+ 12
+ 11
+ 32
1 33H
(0011 0011)2
2’s comlpement
check sum byte = (1100 1101)2 = CDH
ii)
32
+ 45
+ 67
+ 12
+ 11
+ 32
+ CD ⬅ Sum byte
2 00H
Equals zero. The data is correct. ✅
iii)
32
+ 45
+ 57 ⬅ value changed
+ 12
+ 11
+ 32
+ CD
1 F0H
Not equal zero. There is an error. ❌
Question (4)
4.a) What is the difference between Interrupt and Polling?
(a) Polling:
- Processor initiated.
- Device indicates it is ready by setting 'some status bit and
the processor periodically checks it. (called Handshaking)
(b) Interrupt:
- Device initiated.
- The act of setting a status bit causes an, interrupt, and the
processor calls an ISR to service the device.
4.b) Design an I/O interface circuit and the required decoding circuit
to satisfy the following instructions. Then, state the mode of this I/O
interface circuit.
MOV DX, 7922H
IN AL, DX
MOV DX, 7923H
OUT DX, AL
Port Address
7922H
IN
OUT 7923H
A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
0
0
0
0
1
1
0
0
0
0
0
0
1
1
0
1
4.c) What is the value of control register for 8255 PPI to reset bit
number 5 in port C?
byte A/B X X X
0
0 0 0
select a bit set/reset
1 0 1
0
= 0AH
4.d) For the 8255 PPI shown in Figure 2:
i) Find the port addresses assigned to A, B, C and the control
register.
ii) Find the control register for this configuration
iii) Write an assembly Program to add bytes read from Ports A and
B, and output the result to Port C.
Addresses of each port
addresses in binary
A7 A6 A5 A4
A3 A2 A1 A0
Port A
0 1 0 1
0 0 0 0 50H
Port B
0 1 0 1
0 0 1 0 52H
Port C
0 1 0 1
0 1 0 0 54H
Command Register 0 1 0 1
0 1 1 0 56H
8255 Configuration (control word)
1
0 0 1
0
0
1 0 = 92H
byte A/B mod PA
PCU mod PB PCL
Programming
;Programming control register of 8255;
MOV AL, 92H
OUT 50H, AL
;Read data from port A;
IN AL, 52H
;Storing the first byte;
MOV CL, AL
;Read data from port B;
IN AL, 54H
;Adding the 2 bytes;
ADD AL, CL
;Send data to port C;
OUT 56H, AL
Note:
1 = input
0 = output