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SOLUTIONS MANUAL FOR
PRINCIPLES
OF ANALOG
ELECTRONICS
by
Giovanni Saggio
SOLUTIONS MANUAL FOR
PRINCIPLES
OF ANALOG
ELECTRONICS
by
Giovanni Saggio
Boca Raton London New York
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Version Date: 20140131
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CHAPTER 9 – DIODE CIRCUITS
Exercise 1
A half-wave rectifer as in Figure 9.1 has an input voltage signal 𝑣𝑠 = 𝑉𝑀 𝑠𝑖𝑛(πœ”π‘‘).
Assuming ideal diode (𝑉𝛾 = 0, zero resistance in forward biasing condition), calculate the
following:
 The average output voltage π‘‰π‘œ,𝐷𝐢 across the resistor
 The average current πΌπ‘œ,𝐷𝐢 flowing throught the resistor
 The RMS value of the output voltage π‘‰π‘œ,𝑅𝑀𝑆 across the resistor
 The RMS value of the current πΌπ‘œ,𝑅𝑀𝑆 flowing throught the resistor
 The form factor 𝐹𝐹,1𝑠
 The ripple factor 𝛾
ANSWER
The output voltage function of the half-wave rectifier is represented in Figure 1
vo
VM
π
2π
3π
4π
Figure 1: output voltage function of the half-wave rectifier
ωt
To obtain the requested values, each time we can start with the respective definitions.
So, the average output (DC) voltage will be:
π‘‰π‘œ,𝐷𝐢 =
1 πœ‹
1 πœ‹
𝑉𝑀
οΏ½ 𝑣𝑠 𝑑(πœ”π‘‘) = οΏ½ 𝑉𝑀 𝑠𝑖𝑛(πœ”π‘‘) 𝑑(πœ”π‘‘) =
πœ‹
πœ‹ 0
πœ‹ 0
The average output current:
πΌπ‘œ,𝐷𝐢 =
𝑉𝐷𝐢 𝑉𝑀
=
𝑅
πœ‹π‘…
The same result can be equivalently obtained considering that this circuit does not produce any
phase shift, so that the current can be written as 𝑖(πœ”π‘‘) = 𝐼𝑀 𝑠𝑖𝑛(πœ”π‘‘)). So:
πΌπ‘œ,𝐷𝐢 =
πœ‹
2πœ‹
1 2πœ‹
1
𝐼𝑀
[− π‘π‘œπ‘ (πœ”π‘‘)]πœ‹0 + 0
οΏ½ 𝐼𝑀 𝑠𝑖𝑛(πœ”π‘‘) 𝑑(πœ”π‘‘) =
οΏ½οΏ½ 𝐼𝑀 𝑠𝑖𝑛(πœ”π‘‘) 𝑑(πœ”π‘‘) + οΏ½ 0𝑑(πœ”π‘‘)οΏ½ =
2πœ‹
2πœ‹ 0
2πœ‹ 0
πœ‹
𝐼𝑀
𝐼𝑀
—1 − 1 =
=
2πœ‹
πœ‹
To determine the RMS value of the output voltage, we have:
π‘‰π‘œ,𝑅𝑀𝑆 = οΏ½
1 πœ‹ 2
1 πœ‹
𝑉𝑀2 πœ‹ 1 − π‘π‘œπ‘ (2πœ”π‘‘)
οΏ½ 𝑣𝑠 𝑑(πœ”π‘‘) = οΏ½ οΏ½ 𝑉𝑀2 𝑠𝑖𝑛2 (πœ”π‘‘) 𝑑(πœ”π‘‘) == οΏ½ οΏ½ οΏ½
οΏ½ 𝑑(πœ”π‘‘)
2
2πœ‹ 0
2πœ‹ 0
2πœ‹ 0
πœ‹
1 πœ”π‘‘ 𝑠𝑖𝑛(2πœ”π‘‘)
𝑉𝑀
1 πœ‹
= 𝑉𝑀 οΏ½ οΏ½ −
οΏ½ = 𝑉𝑀 οΏ½ οΏ½ οΏ½ =
4
2
2πœ‹ 2
2πœ‹ 2
0
The RMS value of the output current:
πΌπ‘œ,𝑅𝑀𝑆 =
π‘‰π‘œ,𝑅𝑀𝑆 𝑉𝑀
=
𝑅
2𝑅
The same expression can be equivalently found as:
1 πœ‹ 2
1 2 πœ‹ 𝐼𝑀
πΌπ‘œ,𝑅𝑀𝑆 = οΏ½ οΏ½ 𝐼𝑀
𝑠𝑖𝑛2(πœ”π‘‘) 𝑑(πœ”π‘‘) = οΏ½ 𝐼𝑀
=
2
2πœ‹ 0
2πœ‹ 2
which corresponds to the RMS value of the total current, that is the sum of DC and AC
components.
Now, the RMS value of the only AC component, πΌπ‘Ÿ,𝑅𝑀𝑆 , that is the RMS value of the ripple, can be
determined starting from the definition applied to the term (𝑖 − 𝐼𝐷𝐢 ):
but
1 2πœ‹
1 2πœ‹
2 ]𝑑(πœ”π‘‘)
πΌπ‘Ÿ,𝑅𝑀𝑆 = οΏ½ οΏ½ (𝑖 − 𝐼𝐷𝐢 )2 𝑑(πœ”π‘‘) = οΏ½ οΏ½ [𝑖 2 − 2𝑖𝐼𝐷𝐢 + 𝐼𝐷𝐢
2πœ‹ 0
2πœ‹ 0
1 2πœ‹
2
οΏ½ οΏ½ 𝑖 2 𝑑(πœ”π‘‘) = 𝐼𝑅𝑀𝑆
2πœ‹ 0
so
1 2πœ‹
οΏ½ 𝑖𝑑(πœ”π‘‘) = 𝐼𝐷𝐢
2πœ‹ 0
2
2
2
2
2
πΌπ‘Ÿ,𝑅𝑀𝑆 = �𝐼𝑅𝑀𝑆
− 2πΌπ‘œ,𝐷𝐢
+ πΌπ‘œ,𝐷𝐢
= �𝐼𝑅𝑀𝑆
− πΌπ‘œ,𝐷𝐢
The form factor is defined as the RMS and average ratio, 𝐹𝐹 ≝
𝐹𝐹,1𝑠 =
0,5𝑉𝑀
≅ 1,57
0,32𝑉𝑀
π‘‰π‘œ,𝑅𝑀𝑆
π‘‰π‘œ,𝐷𝐢
=
πΌπ‘œ,𝑅𝑀𝑆
πΌπ‘œ,𝐷𝐢
, so:
Let’s see now how we can calculate the ripple. Since the pure AC voltage component is defined as
the sinusoidal wave π‘£π‘œ (= 𝑉𝑀 𝑠𝑖𝑛(πœ”π‘‘) π‘€β„Žπ‘–π‘β„Ž 𝑖𝑠 ≠ 0 π‘“π‘œπ‘Ÿ 0 < πœ”π‘‘ < πœ‹ π‘Žπ‘›π‘‘ π‘§π‘’π‘Ÿπ‘œ π‘’π‘™π‘ π‘’π‘€β„Žπ‘’π‘Ÿπ‘’) apart
from its DC component π‘‰π‘œ,𝐷𝐢 , that is π‘£π‘œ − π‘‰π‘œ,𝐷𝐢 , we have:
1 πœ‹
1 πœ‹
2
2
π‘‰π‘Ÿ,𝑅𝑀𝑆 = οΏ½ οΏ½ �𝑉𝑀 𝑠𝑖𝑛(πœ”π‘‘) − π‘‰π‘œ,𝐷𝐢 οΏ½ 𝑑(πœ”π‘‘) = οΏ½ οΏ½ �𝑉𝑀2 𝑠𝑖𝑛2(πœ”π‘‘) + π‘‰π‘œ,𝐷𝐢
− 2π‘‰π‘œ,𝐷𝐢 𝑉𝑀 𝑠𝑖𝑛(πœ”π‘‘)�𝑑(πœ”π‘‘)
πœ‹ 0
πœ‹ 0
but we already saw that
1 πœ‹
π‘‰π‘œπ‘…π‘€π‘† = οΏ½ οΏ½ 𝑉𝑀2 𝑠𝑖𝑛2(πœ”π‘‘) 𝑑(πœ”π‘‘)
πœ‹ 0
therefore replacing
2
π‘‰π‘Ÿ,𝑅𝑀𝑆 = οΏ½οΏ½π‘‰π‘œ,𝑅𝑀𝑆 − π‘‰π‘œ,𝐷𝐢 οΏ½
as a consequence the ripple of the half-wave rectifier is
2
2
2
π‘‰π‘Ÿ,𝑅𝑀𝑆 οΏ½οΏ½π‘‰π‘œ,𝑅𝑀𝑆 − π‘‰π‘œ,𝐷𝐢 οΏ½
π‘‰π‘œ,𝑅𝑀𝑆
𝑉𝑀 ⁄2
π‘Ÿ=
=
= οΏ½οΏ½
οΏ½ − 1 = οΏ½οΏ½
οΏ½ − 1 = 1.21
𝑉𝑀 ⁄πœ‹
π‘‰π‘œ,𝐷𝐢
π‘‰π‘œ,𝐷𝐢
π‘‰π‘œ,𝐷𝐢
The same result can be obtained solving respect to the current rather than to the voltage:
2
2
𝐼𝑀
2
πΌπ‘Ÿ,𝑅𝑀𝑆 οΏ½πΌπ‘œ,𝑅𝑀𝑆 − 𝐼𝐷𝐢
πΌπ‘œ,𝑅𝑀𝑆
π‘Ÿ=
=
= οΏ½οΏ½
οΏ½ − 1 = οΏ½ 2 − 1 = 1.21
𝐼𝑀
πΌπ‘œ,𝐷𝐢
πΌπ‘œ,𝐷𝐢
πΌπ‘œ,𝐷𝐢
πœ‹
Summing
π‘‰π‘œ,𝐷𝐢 =
𝑉𝑀
πœ‹
; πΌπ‘œ,𝐷𝐢 =
𝑉𝑀
πœ‹π‘…
; π‘‰π‘œ,𝑅𝑀𝑆 =
𝑉𝑀
2
; πΌπ‘œ,𝑅𝑀𝑆 =
𝑉𝑀
2𝑅
; 𝐹𝐹,1𝑠 ≅ 1,57 ; 𝛾 = 1.21
Exercise 2
A half-wave rectifier circuit, as in Figure 9.1, has an input sinusoidal voltage source 𝑣𝑠 =
𝑉𝑀 𝑠𝑖𝑛(πœ”π‘‘), with 𝑉𝑀 = 10𝑉, 𝑅 = 500Ω. Assuming an ideal diode (𝑉𝛾 = 0, zero resistance in
forward biasing conditions) calculate the following:







The maximum current value 𝐼𝑀
DC component of current 𝐼𝐷𝐢
RMS value of current 𝐼𝑅𝑀𝑆
DC component of voltage in output 𝑉𝐷𝐢
DC component of power delivered to the load π‘ƒπ‘œ,𝐷𝐢
Power value supplied by the source 𝑃𝑠
The ripple value 𝛾
ANSWER
The maximum current value is
𝐼𝑀 =
its DC component
and its RMS value
𝐼𝐷𝐢 =
𝑉𝑀
= 20π‘šπ΄
𝑅
1 πœ‹
𝑉𝑀
οΏ½ 𝑣𝑠 𝑑(πœ”π‘‘) =
= 6.3π‘šπ΄
πœ‹π‘…
πœ‹π‘… 0
1 πœ‹
𝑉𝑀
𝐼𝑅𝑀𝑆 = οΏ½ οΏ½ 𝑣𝑠2 𝑑(πœ”π‘‘) =
= 10π‘šπ΄
2𝑅
πœ‹π‘… 0
The DC component of the output voltage
𝑉𝐷𝐢 = 𝑅𝐼𝐷𝐢 = 6.3𝑉
The power from the source and the power to the load are respectively
2
𝑃𝑠 = 𝑅𝐼𝑅𝑀𝑆
= 100π‘šπ‘Š
Observation
2
π‘ƒπ‘œ,𝐷𝐢 = 𝑅𝐼𝐷𝐢
= 39.7π‘šπ‘Š
To determine the electric power we consider the absolute values of current and/or voltage
when DC but RMS values when AC.
For the current exercise the output voltage is a periodic one so that to calculate the electric
power we should utilize the RMS values but, on the contrary, it is commonly adopted the
average ones. This is because the final scope of the circuit is to furnish a constant voltage
across the load.
Finally, the ripple value
𝛾 = οΏ½οΏ½
𝐼𝑅𝑀𝑆 2
οΏ½ − 1 ≅ 1.23
𝐼𝐷𝐢
Summarizing:
𝐼𝑀 = 20π‘šπ΄ ; 𝐼𝐷𝐢 = 6.3π‘šπ΄ ; 𝐼𝑅𝑀𝑆 = 10π‘šπ΄ ; 𝑉𝐷𝐢 = 6.3𝑉 ; π‘ƒπ‘œ,𝐷𝐢 = 39.7mπ‘Š ; 𝑃𝑠 = 100π‘šπ‘Š;
𝛾 ≅ 1.23
Exercise 3
A half-wave rectifier has an input stage with a transformer, turns ratio 𝑛 = 20: 1, and a load
resistance 𝑅 = 50Ω.. The input voltage source has a RMS value of 𝑉𝑠,𝑅𝑀𝑆 = 220𝑉 (Figure 9.23).
+
vg
+
+
v t1
D
R
v t2
n1
n2
Figure 9.23: half-wave rectifier with a transformer as the first stage
Let’s determine the following:
 DC component of voltage in output π‘‰π‘œ,𝐷𝐢
 DC component of current in output πΌπ‘œ,𝐷𝐢
 RMS value of voltage in output π‘‰π‘œ,𝑅𝑀𝑆
 RMS value of current in output πΌπ‘œ,𝑅𝑀𝑆
 the ripple value 𝛾
ANSWER
Across the secondary coil there is a RMS voltage equal to
across the half-wave rectifier’s input port is
220
10
𝑉𝑀 = √2 ∗ 22 ≅ 31.12𝑉
= 22𝑉, so that the maximum voltage
According to the previous exercises we know that the DC output voltage can be written as
and the output current
while their RMS values
π‘‰π‘œ,𝐷𝐢 =
πΌπ‘œ,𝐷𝐢 =
𝑉𝑀
≅ 9.9𝑉
πœ‹
π‘‰π‘œ,𝐷𝐢
≅ 198π‘šπ΄
𝑅
𝑉𝑀
≅ 15.56𝑉
2
π‘‰π‘œ,𝑅𝑀𝑆
=
≅ 0.31𝐴
𝑅
π‘‰π‘œ,𝑅𝑀𝑆 =
πΌπ‘œ,𝑅𝑀𝑆
Summarizing
π‘‰π‘œ,𝐷𝐢 ≅ 9.9𝑉 ; πΌπ‘œ,𝐷𝐢 ≅ 198π‘šπ΄ ; π‘‰π‘œ,𝑅𝑀𝑆 ≅ 15.56𝑉 ; πΌπ‘œ,𝑅𝑀𝑆 ≅ 0.31𝐴 ; 𝛾 ≅ 1.21.
Observation
Note that this ripple value is quite high, so the half-wave rectifier is a poor AC to DC
converter.
Exercise 4
A half-wave rectifier network is used as a battery charger (Figure 9.24).
i D=iR =i B
+
D
R
vs
+
VB
-
-
Figure 9.24: a simple battery charger by means of a half-wave rectifier
When the source voltage is higher than that of the battery, the current flows from the source to the
battery, which charges. Reverse conditions are not possible because of the presence of the diode.
Assuming a voltage source of 𝑣𝑠 = 150 𝑠𝑖𝑛(πœ”π‘‘), an ideal diode (𝑉𝛾 = 0 and a short-circuit in
forward bias condition, an open-circuit in reverse bias conditions), and a 75𝑉 battery with a charge
current of 750π‘šπ΄, determine the resistance value of the resistor 𝑅.
ANSWER
The charging current can flow only when the diode is in “active” mode (ON), and since 𝑉𝐡 = 75𝑉
this corresponds to the a-b, a’-b’, a”-b”,.. intervals of 𝑣𝑠 , in green color of Figure 9.24b.
vs
150
75
a
b
a’
b’
a’’
ωt
Figure 9.24b: the current flows through the diode during the green part of vs
To determine the value of πœ”π‘‘ corresponding to the point a, b, a’, b’, a’’ etc.., we can impose
so
150 𝑠𝑖𝑛(πœ”π‘‘) = 75
1οΏ½ πœ‹
πœ”π‘‘ = οΏ½ 6
5οΏ½ πœ‹
6
When the current differs from zero, it is equal to
𝑣𝑠 − 75 150 sin(πœ”π‘‘) − 75
𝑖=
=
𝑅
𝑅
but we have to consider the DC value of the current which charges the battery
𝐼𝐷𝐢
5
οΏ½6πœ‹
5οΏ½ πœ‹
1
150 sin(πœ”π‘‘) − 75
1
[−150 cos(πœ”π‘‘) − 75πœ”π‘‘]1 6
=
οΏ½
𝑑(πœ”π‘‘) =
οΏ½6πœ‹
2πœ‹ 1οΏ½ πœ‹
𝑅
2πœ‹π‘…
6
1
5
√3
√3 75
οΏ½−150 οΏ½− οΏ½ − 75 πœ‹ + 150
+ πœ‹οΏ½
2πœ‹π‘…
6
6
2
2
Now, according to the request, we impose 𝐼𝐷𝐢 = 750π‘šπ΄, obtaining
𝑅 ≅ 22Ω
=
Observations
A battery’s capacity 𝐢 [π΄β„Ž] refers to the stored electric charge that can be delivered in an
ammount of time at room temperature (77°πΉ or 25°πΆ). A 500[π΄β„Ž] rated battery can supply
1𝐴 for 500β„Ž, or 5𝐴 for 100β„Ž, or 10𝐴 for 50β„Ž, or 100𝐴 for 5β„Ž. But the capacity is not the
perfect parameter to give a real measure for a battery, because it depends on the discharge
conditions: the current’s value (not necessary constant), the value of the voltage, the
temperature, the discharging rate.
The C-rate (or charge-rate or hourly-rate) of a battery specifies the discharge rate, as a
multiple of the capacity. So, for example, a battery with a capacity 𝐢 = 1.5[π΄β„Ž] and a 𝐢/10
rate, deliveres
1.5
10
= 0.15[𝐴]; A 1𝐢 rate means that the battery discharges entirely in 1[β„Ž].
This is similar for the E-rate but referred to the power, not the current.
Exercise 5
A battery with 𝐢 = 1200π‘šπ΄β„Ž, 𝑉𝐡 = 5𝑉, and 𝐢 − π‘Ÿπ‘Žπ‘‘π‘’ = 10, must be charged by a half-wave
rectifier with a transformer at its input port, having a turns ratio 𝑛 = 15. The AC voltage source
𝑣𝑠 = 𝑉𝑀 𝑠𝑖𝑛(πœ”π‘‘) has a RMS voltage of 𝑉𝑠,𝑅𝑀𝑆 = 220𝑉 (Figure 9.25).
i D=iR =i B
+
vs
+
+
v t1
v t2
n1
D
R
+
VB
n2
-
Figure 9.25: Half-wave rectifier with a transformer at its input port
Assuming a diode with 𝑉𝛾 = 0.74𝑉, calculate the following:
 The average charging current, 𝐼𝐡
 The value of the resistance 𝑅 necessary to limit the current
 The RMS current flowing throught the battery, 𝐼𝑅𝑀𝑆
 The power 𝑃𝑅 dissipated by the resistor
 The power 𝑃𝐡 delivered to the battery
 The charging time, 𝑑𝐡
 The efficiency of the half-wave rectifier η =
π‘π‘œπ‘€π‘’π‘Ÿ π‘‘π‘’π‘™π‘–π‘£π‘’π‘Ÿπ‘’π‘‘ π‘‘π‘œ π‘‘β„Žπ‘’ π‘π‘Žπ‘‘π‘‘π‘’π‘Ÿπ‘¦
π‘‘π‘œπ‘‘π‘Žπ‘™ π‘π‘œπ‘€π‘’π‘Ÿ
𝑃
= 𝑃𝐡
π‘‘π‘œπ‘‘
ANSWER
The average charging current is due to the features of the battery, so
𝐼𝐡 =
π‘π‘Žπ‘π‘Žπ‘π‘–π‘‘π‘¦ 1.2
=
= 0.12𝐴
𝐢 − π‘Ÿπ‘Žπ‘‘π‘’ 10
The voltage across the primary coil is that of the voltage source 𝑣𝑠 , while the voltage across the
secondary coil is 𝑣𝑑2 =
𝑣𝑑1
𝑛
, so that the RMS voltage furnished to the circuit is
𝑉𝑑2,𝑅𝑀𝑆 =
and its maximum value
𝑉𝑠,𝑅𝑀𝑆 220
=
= 14. 6𝑉
𝑛
15
𝑉𝑑2,𝑀 = √2𝑉𝑑2,𝑅𝑀𝑆 ≅ 20.74𝑉
As a consequence, the maximum value of the voltage downstream the diode is
𝑉𝑀,𝑑 = 𝑉𝑑2,𝑀 − 𝑉𝛾 ≅ 20𝑉
The charging current will flow only when the diode is “active” (ON), that is when �𝑉𝑑2,𝑀 − 𝑉𝛾 οΏ½ ≥
𝑉𝐡 , between each α-β segments reported in green in Figure 9.25b.
vt2 -Vγ
Vt2,M -Vγ
VB
α
β
α’
β’
α’’
ωt
Figure 9.25b: The voltage useful to charge the battery is showed in green
According to the Figure 9.25b, we can determine the α and β values as
and
𝛼 = 𝑠𝑖𝑛−1 οΏ½
𝑉𝐡
οΏ½ ≅ 0.25π‘Ÿπ‘Žπ‘‘ ≅ 14.48°
𝑉𝑑2,𝑀 − 𝑉𝛾
𝛽 = πœ‹ − 𝛼 ≅ 2.89π‘Ÿπ‘Žπ‘‘ ≅ 165.52°
The average charging current can be determined as
𝐼𝐡 =
1 𝛽 𝑣𝑑2 − 𝑉𝛾 − 𝑉𝐡
1 𝛽 𝑉𝑑2,𝑀 𝑠𝑖𝑛(πœ”π‘‘) − 𝑉𝛾 − 𝑉𝐡
οΏ½
𝑑(πœ”π‘‘) =
οΏ½
𝑑(πœ”π‘‘)
𝑅
𝑅
2πœ‹ 𝛼
2πœ‹ 𝛼
1
𝛽
=
οΏ½−𝑉𝑑2,𝑀 π‘π‘œπ‘ (πœ”π‘‘) − 𝑉𝛾 (πœ”π‘‘) − 𝑉𝐡 (πœ”π‘‘)��𝛼
2πœ‹π‘…
1
=
οΏ½−𝑉𝑑2,𝑀 π‘π‘œπ‘ (𝛽) + 𝑉𝑑2,𝑀 π‘π‘œπ‘ (𝛼) − �𝑉𝛾 + 𝑉𝐡 �𝛽 + �𝑉𝛾 + 𝑉𝐡 �𝛼�
2πœ‹π‘…
but 𝛽 = πœ‹ − 𝛼 and recalling that cos(π‘₯) = − cos(πœ‹ − π‘₯) we can write
𝐼𝐡 =
1
οΏ½2𝑉𝑑2,𝑀 π‘π‘œπ‘ (𝛼) + 2�𝑉𝛾 + 𝑉𝐡 �𝛼 − πœ‹οΏ½π‘‰π›Ύ + 𝑉𝐡 οΏ½οΏ½
2πœ‹π‘…
!
from which, imposing that 𝐼𝐡 =
⏞ 1200π‘šπ΄, we obtain the requested resistance of the resistor
𝑅=
2�𝑉𝑑2,𝑀 − 𝑉𝛾 οΏ½ π‘π‘œπ‘ (𝛼) + 2𝑉𝐡 𝛼 − πœ‹π‘‰π΅
≅ 34Ω
2πœ‹πΌπ΅
So, the RMS value of the current flowing through the resistor is
𝐼𝑅𝑀𝑆
2
1 𝛽 �𝑉𝑑2,𝑀 𝑠𝑖𝑛(πœ”π‘‘) − 𝑉𝐡 οΏ½
=οΏ½ οΏ½
𝑑(πœ”π‘‘)
𝑅2
2πœ‹ 𝛼
2
𝑠𝑖𝑛2 (πœ”π‘‘) +𝑉𝐡2 − 2�𝑉𝑑2,𝑀 − 𝑉𝛾 �𝑉𝐡 𝑠𝑖𝑛(πœ”π‘‘)
1 𝛽 𝑉𝑑2,𝑀
=οΏ½ οΏ½
𝑑(πœ”π‘‘)
𝑅2
2πœ‹ 𝛼
1
which can be solved considering that sin2 (π‘₯) = 2 [1 − cos(2π‘₯)], sin(−π‘₯) = − sin(π‘₯), cos(πœ‹ −
π‘₯) = − cos(π‘₯), and splitting the integral into three parts (highlighted with three different colors)
𝛽
2
2
𝛽
1
𝑉𝑑2,𝑀
𝑉𝑑2,𝑀
−
οΏ½ [1 − π‘π‘œπ‘ (2πœ”π‘‘)]𝑑(πœ”π‘‘) =
𝑠𝑖𝑛(2πœ”π‘‘)οΏ½οΏ½
οΏ½πœ”π‘‘
2
2 𝛼
2
𝛼
2
2
𝑉𝑑2,𝑀
𝑉𝑑2,𝑀
(πœ‹ − 2𝛼) +
=
𝑠𝑖𝑛(2𝛼)
2
2
𝛽
2
οΏ½ 𝑉𝑑2,𝑀
𝑠𝑖𝑛2(πœ”π‘‘) 𝑑(πœ”π‘‘) =
𝛼
𝛽
𝛽
οΏ½ 𝑉𝐡2 𝑑(πœ”π‘‘) = 𝑉𝐡2 [πœ”π‘‘]|𝛼 = 𝑉𝐡2 (πœ‹ − 2𝛼)
𝛼
𝛽
𝛽
οΏ½ −2�𝑉𝑑2,𝑀 − 𝑉𝛾 �𝑉𝐡 𝑠𝑖𝑛(πœ”π‘‘) 𝑑(πœ”π‘‘) = −2�𝑉𝑑2,𝑀 − 𝑉𝛾 �𝑉𝐡 [− π‘π‘œπ‘ (πœ”π‘‘)]|𝛼 = −4�𝑉𝑑2,𝑀 − 𝑉𝛾 �𝑉𝐡 π‘π‘œπ‘ (𝛼)
𝛼
therefore, summing up
2
𝐼𝑅𝑀𝑆
=
2
2
𝑉𝑑2,𝑀
1
𝑉𝑑2,𝑀
(πœ‹
𝑠𝑖𝑛(2𝛼) + 𝑉𝐡2 (πœ‹ − 2𝛼) − 4�𝑉𝑑2,𝑀 − 𝑉𝛾 �𝑉𝐡 π‘π‘œπ‘ (𝛼)οΏ½
−
2𝛼)
+
οΏ½
2
2πœ‹π‘… 2 2
numerically 𝐼𝑅𝑀𝑆 ≅ 0.21𝐴.
The power 𝑃𝑅 dissipated by the resistor is
2
𝑃𝑅 = 𝑅𝐼𝑅𝑀𝑆
≅ 1.42π‘Š
The power 𝑃𝐡 delivered to the battery is
𝑃𝐡 = 𝑉𝐡 𝐼𝐡 = 0.6π‘Š
In order to determine the charging time 𝑑𝐡 , being
π‘π‘Žπ‘π‘Žπ‘π‘–π‘‘π‘¦ = 1200π‘šπ΄β„Ž
then
𝑑𝐡 =
Finally, for the efficiency
π‘π‘Žπ‘π‘Žπ‘π‘–π‘‘π‘¦ 1200π‘šπ΄
=
= 10β„Ž
𝐼𝐡
0.12𝐴
η=
so that it is arond 30%.
Observations
𝑃𝐡
𝑃𝐡
=
≅ 0.30
π‘ƒπ‘‘π‘œπ‘‘ (𝑃𝐡 + 𝑃𝑅 )
The charging current must be limited to avoid the battery to be damaged because of the gases
which can be released during the charge.
A costant voltage (C-V) charging method refers to the method by which a charger sources
current into the battery to force its voltage to a preset value, named set(-point) voltage. When
this value is reached, the charger sources only the current to maintain the battery at the same
constant voltage level.
It is the opposite for the constant current (C-I) charging method.
Some rechargeable batteries need to be C-V while others C-I charged. Some chargers are CV others C-I type; that’s why generally a charger can be used to charge some batteries and
not others. Universal chargers are those that have both C-V and C-I characteristics.
Summarizing
𝐼𝐡 = 0.12A ; 𝑅 ≅ 34Ω ; 𝐼𝑅𝑀𝑆 ≅ 0.21𝐴 ; 𝑃𝑅 ≅ 1.42π‘Š ; 𝑃𝐡 = 0.6π‘Š ; 𝑑𝐡 = 10β„Ž ; η ≅ 0.30
Exercise 6
The bridge full-wave rectifier has better performances than the half-wave rectifier in terms of form
factor and ripple. Consider a bridge full-wave rectifier with an input transformer, as in Figure
9.26:
D
+
v t2
n1
n2
R
C
A
B
D4
3
+
v t1
D
D
+
vs
+
D2
1
C
Figure 9.26: Bridge full-wave rectifier with input transformer
Calculate the following:
 DC component of voltage in output π‘‰π‘œ,𝐷𝐢
 DC component of current in output πΌπ‘œ,𝐷𝐢
 RMS value of voltage in output π‘‰π‘œ,𝑅𝑀𝑆
vo
 RMS value of current in output πΌπ‘œ,𝑅𝑀𝑆
 The form factor 𝐹𝐹,2𝑠
 The ripple value 𝛾
ANSWER
For the current rectifier, the voltage period is no more 2πœ‹ as for the half-wave rectifier, but just πœ‹,
so that the DC component of voltage in output π‘‰π‘œ,𝐷𝐢 can be written as
π‘‰π‘œ,𝐷𝐢 =
1 πœ‹
1 πœ‹
2𝑉𝑀
οΏ½ 𝑣𝑠 𝑑(πœ”π‘‘) = οΏ½ 𝑉𝑀 𝑠𝑖𝑛(πœ”π‘‘) 𝑑(πœ”π‘‘) =
πœ‹
πœ‹ 0
πœ‹ 0
Accordingly, the DC component of current in output πΌπ‘œ,𝐷𝐢 is
πΌπ‘œ,𝐷𝐢 =
π‘‰π‘œ,𝐷𝐢 2𝑉𝑀
=
𝑅
πœ‹π‘…
The RMS value of voltage in output π‘‰π‘œ,𝑅𝑀𝑆 can be easily obtained as
1 πœ‹
1 πœ‹
𝑉𝑀
π‘‰π‘œ,𝑅𝑀𝑆 = οΏ½ οΏ½ 𝑣𝑠2 𝑑(πœ”π‘‘) = οΏ½ οΏ½ 𝑉𝑀2 𝑠𝑖𝑛2(πœ”π‘‘) 𝑑(πœ”π‘‘) =
πœ‹ 0
πœ‹ 0
√2
Such a result should not be surprising, because we could expect it equal to the one of the originating
𝑣𝑠 .
The RMS value of current in output πΌπ‘œ,𝑅𝑀𝑆 can be easily obtained as
The form factor 𝐹𝐹,2𝑠 is defined as the
πΌπ‘œ,𝑅𝑀𝑆 =
π‘‰π‘œ,,𝑅𝑀𝑆
π‘‰π‘œ,𝐷𝐢
π‘‰π‘œ,𝑅𝑀𝑆
𝑉𝑀
=
𝑅
𝑅√2
ratio, therefore
𝐹𝐹,2𝑠
𝑉𝑀
= √2 ≅ 1,1
2𝑉𝑀
πœ‹
We start from the definition also to determine the ripple value
2
2
π‘‰π‘Ÿ,RMS
π‘‰π‘œπ‘…π‘€π‘†
𝑉𝑀 ⁄√2
𝛾=
= οΏ½οΏ½
οΏ½ − 1 = οΏ½οΏ½
οΏ½ − 1 = 0.482
π‘‰π‘œ,𝐷𝐢
π‘‰π‘œ,𝐷𝐢
2𝑉𝑀 ⁄πœ‹
Comparing this result with the one obtained for the half-wave rectifier, we can say that the ripple is
halved (0.482 vs. 1.21).
Observations
Please, pay close attention to the fact that for the full-wave rectifier the ground is connected
to one terminal of the voltage source, but it cannot be connected to the load as well. So, the
bridge configuration cannot be adopted when we must have a grounded load.
Unfortunately, the definition of ripple is not unambiguous. Sometimes it can be found
otherwise.
Summarizing
π‘‰π‘œ,𝐷𝐢 =
2𝑉𝑀
πœ‹
Exercise 7
; πΌπ‘œ,𝐷𝐢 =
2𝑉𝑀
πœ‹π‘…
; π‘‰π‘œ,𝑅𝑀𝑆 =
𝑉𝑀
√2
𝑉
𝑀
; πΌπ‘œ,𝑅𝑀𝑆 = 𝑅√2
; 𝐹𝐹,2𝑠 ≅ 1,1 ; 𝛾 = 0.482.
Given a bridge full-wave rectifier as in Figure 9.26, with diodes that have a threshold voltage
𝑉𝛾 = 0 and a resistance π‘…π‘œπ‘› = 10Ω
when “on”, sourced by a sinusoidal voltage signal of
amplitude 𝑉𝑠𝑀 = 30𝑉, and loaded by a resistance 𝑅𝐿 = 1π‘˜β„¦, calculate the following:
 Maximum, average and RMS values of the output current: 𝐼𝑀 , πΌπ‘œ,𝐷𝐢 , πΌπ‘œ,𝑅𝑀𝑆
 Average and RMS values of the output voltage: π‘‰π‘œ,𝐷𝐢 , π‘‰π‘œ,𝑅𝑀𝑆
 Average value of the output power, π‘ƒπ‘œ,𝐷𝐢
 Average value of the input power, 𝑃𝑖
ANSWER
The maximum output current can be easily calculated applying the KCL to a half path of the bridge
𝐼𝑀 =
𝑉𝑀
30
=
= 29.4π‘šπ΄
𝑅 + 2π‘…π‘œπ‘› 1000 + 20
therefore its RMS value (see Table 1.3 in Section 1.3.1 of Chapter 1) is
πΌπ‘œ,𝑅𝑀𝑆 =
𝐼𝑀
√2
≅ 20.8π‘šπ΄
and its average value (as already discussed in Exercise 6) is
πΌπ‘œ,𝐷𝐢 =
2𝐼𝑀 2 ∗ 0.0294
=
≅ 18.7π‘šπ΄
πœ‹
πœ‹
Average and RMS values of the output voltage are simply due to Ohm’s law
π‘‰π‘œ,𝐷𝐢 = π‘…πΌπ‘œ,𝐷𝐢 = 1000 ∗ 0.0187 = 18.7𝑉
π‘‰π‘œ,𝑅𝑀𝑆 = π‘…πΌπ‘œ,𝑅𝑀𝑆 = 1000 ∗ 0.0208 = 20.8𝑉
Finally, according to the Joule’s law (Section 4.4.8 in Chapter 4), we can write for the output and
input powers respectively
2
π‘ƒπ‘œ,𝐷𝐢 = π‘…πΌπ‘œ,𝐷𝐢
≅ 0.3π‘Š
2
𝑃𝑖 = (𝑅 + 2π‘…π‘œπ‘› )πΌπ‘œ,𝑒𝑓𝑓 ≅ 0.41π‘Š
Summarizing
𝐼𝑀 = 29.4π‘šπ΄; πΌπ‘œ,𝑅𝑀𝑆 ≅ 20.8π‘šπ΄; πΌπ‘œ,𝐷𝐢 ≅ 18.7π‘šπ΄; π‘‰π‘œ,𝐷𝐢 = 18.7𝑉; π‘‰π‘œ,𝑅𝑀𝑆 = 20.8𝑉; π‘ƒπ‘œ,𝐷𝐢 ≅
0.3π‘Š; 𝑃𝑖 ≅ 0.41π‘Š
Exercise 8
A resistance load requires a DC voltage 𝑉𝐷𝐢 = 12𝑉 and current 𝐼𝐷𝐢 = 0.5𝐴. To this aim a bridge
full-wave rectifier is utilized, sourced by a AC line with a frequency 𝑓 = 50𝐻𝑧. Calculate the value
of the smoothing capacitance for a 10% ripple (Figure 9.27).
D
+
v t1
v t2
n1
n2
R
C
A
B
vo
D4
3
vs
+
D
D
+
+
D2
1
C
Figure 9.27: Filtered bridge full-wave rectifier
ANSWER
To solve this exercise we need to do some considerations. Let’s call cutin the instant of time when
diodes start to conduct current and cutoff the instant of time when the diodes end.
VsM
cutout
cutin
VRM
vR
vs
ωt
Figure 9.27b:input voltage function (in blue), output voltage function (in red), rectified voltage function (in green)
We can usefully define as
 𝑇: period of the input function
𝑇
 2: period of the half-wave
 𝑇1 : time during which the diode is “ON”
 𝑇2 : time during which the diode is “OFF” (discarge of the capacitor)
and we can admit an approximation of the green part of the sinusoidal function as a straight line
(this is supposing the time of the capacitor discharge much greater of the period of the input
function) as showed in Figure 9.27c.
VsM
Vγ
VRM
vR
T
vs
ωt
T/2
T1
T2
Figure 9.27c: the charge-discharge functions are approximated with straight lines
Defining as 𝑉𝛾 the peak-to-peak value of the residual ripple content, it follows that the RMS value
of such a ripple is
𝑉𝑅𝑀𝑆 =
𝑉𝛾
2√3
(please, refer to Table 1.3, Section 1.3.1 in Chapter 1).
During 𝑇2 the capacitor gets discharged through the resistor 𝑅, losing an amount of charge 𝑄 equal
to
𝑄 = 𝐢𝑉𝛾
but since
𝑖(𝑑) =
it results
𝑇2
𝑑𝑄
𝑑𝑑
𝑄 = οΏ½ 𝑖(𝑑)𝑑𝑑 = 𝐼𝐷𝐢 𝑇2
with 𝐼𝐷𝐢 the DC component of the current.
But being 𝑇2 ≫ 𝑇1 :
0
so that
𝑇1 + 𝑇2 =
and since
𝑉𝛾 =
𝐼𝐷𝐢 𝑇
𝐼𝐷𝐢
=
𝐢 2 2𝑓𝐢
𝐼𝐷𝐢 =
then
Recalling the ripple’s definition 𝛾 =
𝛾=
The value of the load resistance is
𝑉𝑅𝑀𝑆
𝑉𝐷𝐢
𝑉𝑅𝑀𝑆
𝑉𝐷𝐢
𝑇
≅ 𝑇2
2
𝑉𝛾 =
𝑉𝐷𝐢
𝑅𝐿
𝑉𝐷𝐢
2𝑓𝑅𝐢
, we can put
𝑉𝐷𝐢
𝑉𝛾
2𝑓𝑅𝐢
1
2√3
2√3
=
=
=
𝑉𝐷𝐢
𝑉𝐷𝐢
4√3𝑓𝑅𝐢
𝑅=
𝑉𝐷𝐢
= 24Ω
𝐼𝐷𝐢
so that, imposing a 10% ripple as the request of the exercise, and inverting the previous equation
we have
1
𝐢=
≅ 1.2π‘šπΉ
0.1 ∗ 4√3 ∗ 50 ∗ 24
Observation
The choice of the capacitance of the capacitor must satisfy two opposite requests. In fact, to
guarantee a low ripple value we need a capacitance as high as possible, but to assure a low
current peak we need a capacitance as low as possible. The trade-off usually is guaranteed by
capacitance of the order of hundreds of thousands of πœ‡πΉ.
Exercise 9
A battery provides a voltage 𝑉𝐡 = 12𝑉 across a positive clipper circuit configuration, as in Figure
9.28, with 𝑅1 = 47Ω and 𝑅2 = 22Ω. Assuming the diode to offer a direct resistance 𝑅𝐷,π‘œπ‘› = 15Ω
when “ON” but with no threshold voltage 𝑉𝛾 = 0, calculate the current flowing through the diode.
R1
+
A
R2
D
VB
B
Figure 9.28: A clipper circuit configuration sourced by a constant voltage
ANSWER
It is useful to replace the current circuit with an equivalent one at the A - B terminals, according to
the Thevenin’s theorem (Figure 9.28b). So, the Thevenin voltage 𝑉𝑇𝐻 is the open circuited one
across the same terminals, the diode being removed
𝑅2
𝑉𝑇𝐻 =
𝑉 = 3.826𝑉
𝑅1 + 𝑅2 𝐡
and the Thevenin resistance 𝑅𝑇𝐻 is the one the battery being short circuited and the diode removed
𝑅1 𝑅2
𝑅𝑇𝐻 = 𝑅1 ||𝑅2 =
≅ 14.9Ω
𝑅1 + 𝑅2
RTH =R1 //R2
A
+
-
D
R VB
V TH= 2
(R1+R2)
I
B
Figure 9.28b: Thevenin’s equivalent of the clipper circuit configuration
The current flowing through the diode is then:
𝑉𝑇𝐻
3.826
𝐼=
≅
≅ 257π‘šπ΄
𝑅𝑇𝐻 + 𝑅𝐷,π‘œπ‘›
14.9
Basi di elettronica
1. AMPLIFIERS
1.1. EXERCISES
Exercise n. 1
There are several different types of microphone: carbon, dynamic, crystal, capacitive (electret or
condenser). The latters are preferred in portable devices (in mobile phones, in tie clip, in
consumer video camera, in computer sound cards) because of their small volume and low
production cost. Consider a capacitive microphone with a very low voltage output, 𝑣𝑠 = 1π‘šπ‘‰,
and very high output impedance (due to the electret element itself), 𝑅𝑠 = 1𝑀Ω. To amplify the
signal a voltage amplifier is used with an input resistance 𝑅𝑖 = 10𝑀Ω, a voltage gain of 20𝑑𝐡,
and an output resistance π‘…π‘œ = 100Ω.. The resistance load is 𝑅𝐿 = 47π‘˜β„¦..
io
ii
+
v s=
1mV
RS =
1M Ω
+
vi
Ro =
100 Ω
+
Ri =
10M Ω
Avv i
Av=
20dB
+
vo
RL =
47k Ω
Figure 1: voltage amplifier with a mic as source and a load resistor
𝑣
Calculate the overall voltage amplification π‘£π‘œ .
𝑠
ANSWER
Applying the voltage divider formula at the output loop, we have
𝑅𝐿
π‘£π‘œ =
𝐴 𝑣
𝑅𝐿 + π‘…π‘œ 𝑣 𝑖
while at the input one
𝑅𝑖
𝑣𝑖 =
𝑣
𝑅𝑖 + 𝑅𝑠 𝑠
Mixing the two previous equations
π‘£π‘œ
𝑅𝐿
𝑅𝑖
=
𝐴𝑣
𝑣𝑠 𝑅𝐿 + π‘…π‘œ 𝑅𝑖 + 𝑅𝑠
From the dB value of the voltage amplification
and finally
Exercise n. 2
𝐴𝑣 = 10
𝐴𝑣,𝑑𝐡
20
20
= 1020 = 10
π‘£π‘œ
≅ 0.9979 ∗ 10 ∗ 0.9091 ≅ 9.1
𝑣𝑠
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A current amplifier has a gain of 40𝑑𝐡, an input resistance 𝑅𝑖 = 10Ω and an output resistance
π‘…π‘œ = 22π‘˜β„¦.. Calculate the input signal current 𝑖𝑖 required to produce an output signal current
π‘–π‘œ = 1𝐴 in a load resistor 𝑅𝐿 = 50Ω..
ANSWER
π‘…π‘œ
𝐴𝑖
π‘…π‘œ + 𝑅𝐿 𝑖 𝑖
𝑖𝑖 = 10π‘šπ΄
Observation: The input resistance is irrelevant, since no current divider is in input of the amplifier
𝑖0 =
Exercise n. 3
If an amplifier genetares generates an output voltage π‘£π‘œ = 10𝑉 , having an output internal
resistance π‘…π‘œ = 470Ω, which voltage could deliver on a load resistance 𝑅𝐿 = 50Ω ?
ANSWER
Naming 𝑣𝐿 the voltage delivered across the load resistor, and considering that π‘£π‘œ is the Thevenin
voltage source and π‘…π‘œ the Thevenin resistance at output of the amplifier, we can write:
𝑅𝐿
𝑣
𝑣𝐿 =
𝑅𝐿 + π‘…π‘œ 𝑖
therefore
π‘‰π‘œ ≅ 0.96𝑉
𝑣𝐿 ≅ 0.96𝑉
Exercise n. 4
An amplifier has a working frequency 𝑓 = 50𝑀𝐻𝑧 and furnishes a max peak-to-peak output
voltage π‘‰π‘œ,𝑝−𝑝 = 12𝑉 . Which is the minimum slew rate value necessary to assure a correct
behaviour of the amplifier?
ANSWER
𝑉𝑀 =
Exercise n. 5
π‘‰π‘œ,𝑝−𝑝
2
𝑉
𝑉
𝑆𝑅 = 𝑉𝑀 ∗ 2πœ‹π‘“ ≅ 1.88 ∗ 109 οΏ½ οΏ½ = 1880 οΏ½ οΏ½
𝑠
πœ‡π‘ 
𝑉
Calculate the working frequency of amplifier with a slew rate 𝑆𝑅 = 35 οΏ½πœ‡π‘ οΏ½ and a peak output
voltage 𝑉𝑀 = 6𝑉.
ANSWER
𝑓=
Exercise n. 6
𝑆𝑅
≅ 0.93[𝑀𝐻𝑧]
𝑉𝑀 ∗ 2πœ‹
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The ammount of each harmonic of a nonlinear amplifier was measured by an harmonic analyzer
resulting the fundamental having an amplitude of π‘‰π‘œ1,𝑅𝑀𝑆 = 12𝑉, the second harmonic with an
amplitude of π‘‰π‘œ2,𝑅𝑀𝑆 = 0.6𝑉, and for the third harmonic it was measured π‘‰π‘œ3,𝑅𝑀𝑆 = 0.2𝑉, while
all the others resulting negiglile.
Determine the harmonic distortion components in percentage, %𝐷2 , %𝐷3 , and the total harmonic
distortion THD.
ANSWER
�𝑉
οΏ½
�𝑉
οΏ½
%𝐷2 = οΏ½π‘‰π‘œ2,𝑅𝑀𝑆 οΏ½ ∗ 100% = 5%; %𝐷3 = οΏ½π‘‰π‘œ3,𝑅𝑀𝑆 οΏ½ ∗ 100% = 1.66%
π‘œ1,𝑅𝑀𝑆
in percentage
𝑇𝐻𝐷 =
Observation
The theorical equation
2
2
+ π‘‰π‘œ3,𝑅𝑀𝑆
οΏ½π‘‰π‘œ2,𝑅𝑀𝑆
π‘‰π‘œ1,𝑅𝑀𝑆
π‘œ1,𝑅𝑀𝑆
=
√0.62 + 0.22
≅ 0.053
12
%𝑇𝐻𝐷 = 5.3%
𝑇𝐻𝐷 =
2
οΏ½∑𝑁
𝑛=2 π‘‰π‘œπ‘›,𝑅𝑀𝑆
π‘‰π‘œ1,𝑅𝑀𝑆
represents the known THD in relation to the fundamental (also termed 𝑇𝐻𝐷𝑓 ), and can
result sometimes inconvenient for practical reasons, since the difficulties to measure the
amplitude of the fundamental π‘‰π‘œ1 alone, so the following working equation can be
preferred:
π‘‡π»π·π‘Ÿ =
2
οΏ½∑𝑁
𝑛=2 π‘‰π‘œπ‘›,𝑅𝑀𝑆
π‘‰π‘‘π‘œπ‘‘,𝑅𝑀𝑆
that is the root of the sum of the squared rms value of the harmonics above fundamental,
2
compared against π‘‰π‘‘π‘œπ‘‘,𝑅𝑀𝑆 = οΏ½∑𝑁
𝑛=1 π‘‰π‘œπ‘›,𝑅𝑀𝑆 that is the sum of the amplitude of all the 𝑁
harmonic components (in general, only the first 𝑁 = 5 harmonics are significant).
In any case, normally the two equations will give very close results, since the very greatest
part of the measured output energy (even more than 99%) is contained in the fundamental
harmonic π‘‰π‘œ1,𝑅𝑀𝑆 .
As a rule of thumb, the π‘‡π»π·π‘Ÿ value approximate the 𝑇𝐻𝐷 one within the 0.5% if the THD
is lower than 10%.
Exercise n. 7
An input signal of a non-linear amplifier is 𝑣𝑠 = 10 𝑠𝑖𝑛(πœ”π‘‘) and its transfer function π‘£π‘œ =
10𝑣𝑠 + 0.1𝑣𝑠2 . Determine the 2nd harmonic distortion D 2 of the amplifier as a function of input
signal amplitude A on the range
0.1..10V , when k1 = 10 and k2 = 0.1.
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ANSWER
�𝑉
οΏ½
�𝑉
οΏ½
𝐷2 = οΏ½π‘‰π‘œ2,𝑅𝑀𝑆 οΏ½; 𝐷3 = οΏ½π‘‰π‘œ3,𝑅𝑀𝑆 οΏ½
π‘œ1,𝑅𝑀𝑆
𝑇𝐻𝐷 =
2
2
+ π‘‰π‘œ3,𝑅𝑀𝑆
οΏ½π‘‰π‘œ2,𝑅𝑀𝑆
=
π‘‰π‘œ1,𝑅𝑀𝑆
𝑇𝐻𝐷(%) =
π‘œ1,𝑅𝑀𝑆
2
2
+ π‘‰π‘œ3,𝑅𝑀𝑆
οΏ½π‘‰π‘œ2,𝑅𝑀𝑆
2
οΏ½π‘‰π‘œ1,𝑅𝑀𝑆
2
2
+ π‘‰π‘œ3,𝑅𝑀𝑆
οΏ½π‘‰π‘œ2,𝑅𝑀𝑆
π‘‰π‘‘π‘œπ‘‘,𝑅𝑀𝑆
= �𝐷22 + 𝐷32
∗ 100
Observation
The THD value alone hardly define the goodness of an amplifier. In fact, the THD takes
into account the harmonic contents as is, reporting the deviation in the shape of the
expected waveform. But the THD value is not necessarily related to how the ear perceives
distortion. In fact even harmonics are generally considered much less dissonant then odd
ones, and higher harmonics more dissonant with respect the lower ones.
Curiosity
The maximum tolerable value of the THD strictly depends on the particular application.
Typical values can be < 10% for audio in telephones, < 5% for most video applications,
< 2% for a reasonable audio amplifier for an intercom system, < 1% to < 0.01% for high
quality audio, < 0.1% for RF amplifiers.
Let’s consider a non-linear amplifier as a sort of “black box” which is fed by a voltage source
𝑣𝑠 = 𝑉 sin(πœ”π‘‘) and furnishes an output current equal to π‘–π‘œ = 𝐼1 𝑣𝑠 + 𝐼2 𝑣𝑠2 + 𝐼3 𝑣𝑠3 .
Calculate the harmonic distortions of the second 𝐷2 and third 𝐷3 harmonic frequency components.
sin2 (πœ”π‘‘) =
1−cos(2πœ”π‘‘)
2
π‘–π‘œ = 𝐼1 𝑉 sin(πœ”π‘‘) + 𝐼2 𝑉 2 sin2 (πœ”π‘‘) + 𝐼3 𝑉 3 sin3 (πœ”π‘‘)
; sin3(πœ”π‘‘) =
3 sin(πœ”π‘‘)−sin(3πœ”π‘‘)
4
1
1
π‘–π‘œ = 𝐼1 𝑉 sin(πœ”π‘‘) + 𝐼2 𝑉 2 [1 − cos(2πœ”π‘‘)] + 𝐼3 𝑉 3 [3 sin(πœ”π‘‘) − sin(3πœ”π‘‘)]
2
4
1
3
1
1
π‘–π‘œ = 𝐼2 𝑉 2 + �𝐼1 𝑉 + 𝐼3 𝑉 3 οΏ½ [sin(πœ”π‘‘)] − 𝐼2 𝑉 2 [cos(2πœ”π‘‘)] − 𝐼3 𝑉 3 [sin(3πœ”π‘‘)]
2
4
2
4
𝐷2 =
1
οΏ½−𝐼2 𝑉 2 2οΏ½
|𝐼1 𝑉|
=
1 𝐼2
𝑉
2 𝐼1
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𝐷3 =
1
οΏ½−𝐼3 𝑉 3 4οΏ½
|𝐼1 𝑉|
=
1 𝐼3 2
𝑉
4 𝐼1
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1. AMPLIFIERS: BASIC BJT CONFIGURATIONS
1.1. EXERCISES
Exercise n. 1
A sinusoidal voltage source 𝑣𝑠 drives a C.E. amplifier in its simplest configuration (Figure 11.62).
VCC
RC
R1
CB1
IC
IB
CB2
+
+
vs
IE
vo
-
Figure11.62: simplest C.E. configuration
Assume 𝑉𝐢𝐢 = 20𝑉, 𝛽 = 50, and that the capacitive reactances negligible at the frequencies of
operation.
Find 𝑅1 and 𝑅𝐢 so that the Q-point is fixed in 𝐼𝐢𝑄 = 30π‘šπ΄ and 𝑉𝐢𝐸𝑄 = 10𝑉.
ANSWER
KVL applied around the output loop yields
𝑉𝐢𝐢 = 𝑅𝐢 𝐼𝐢𝑄 + 𝑉𝐢𝐸𝑄
so that
𝑉𝐢𝐢 − 𝑉𝐢𝐸𝑄
𝑅𝐢 =
≅ 330Ω
𝐼𝐢𝑄
KVL applied around the input loop yields
𝑉𝐢𝐢 = 𝑅1 𝐼𝐡𝑄 + 𝑉𝐡𝐸𝑄
but since 𝐼𝐢𝑄 ≅ 𝛽𝐼𝐡𝑄 and 𝑉𝐡𝐸𝑄 ≅ 0.7𝑉 (from Section 8.6.8.2 in Chapter 8), we have
𝑉𝐢𝐢 − 𝑉𝐡𝐸𝑄 𝑉𝐢𝐢 − 𝑉𝐡𝐸𝑄
𝑅1 =
=
≅ 32π‘˜β„¦
𝐼𝐡𝑄
𝐼𝐢𝑄 ⁄𝛽
Summarizing 𝑅1 ≅ 32π‘˜β„¦; 𝑅𝐢 ≅ 330Ω.
Exercise n. 2
For a common emitter amplifier in its simplest version as in Figure 11.62 of the previous exercise,
we have a DC source 𝑉𝐢𝐢 = 12𝑉, a BJT’s Q-point such as 𝑉𝐡𝐸𝑄 = 0.7𝑉; 𝐼𝐡𝑄 = 60πœ‡π΄; 𝑉𝐢𝐸𝑄 =
2
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6𝑉 ; 𝐼𝐢𝑄 = 3π‘šπ΄ and, correspondingly β„Žπ‘–π‘’ = 800Ω ; β„Žπ‘Ÿπ‘’ = 4π‘₯10−4 ; β„Žπ‘“π‘’ = 60 ; β„Žπ‘œπ‘’ =
50π‘₯10−6 Ω−1.
Derive the overall values of current and voltage gains, 𝐴𝑖 and 𝐴𝑣 , and those of the input and
output resistances, 𝑅𝑖 and π‘…π‘œ .
ANSWER
Figure 11.62b shows the DC model useful to perform the DC analysis.
VCC
RC
R1
ICQ
IBQ
IEQ
Figure 11.62b: DC model of the simplest C.E. configuration
In applying KVL to the input loop we have
𝑉𝐢𝐢 = 𝑅1 𝐼𝐡𝑄 + 𝑉𝐡𝐸𝑄
from which we can determine
𝑅1 =
𝑉𝐢𝐢 − 𝑉𝐡𝐸𝑄
= 188π‘˜β„¦
𝐼𝐡𝑄
In a similar way, KLV around the output loop furnishes
𝑉𝐢𝐢 = 𝑅𝐢 𝐼𝐢𝑄 + 𝑉𝐢𝐸𝑄
from which
𝑅𝐢 =
𝑉𝐢𝐢 − 𝑉𝐢𝐸𝑄
= 2π‘˜β„¦
𝐼𝐢𝑄
The AC analysis allows calculating the requested values starting from what we obtained from the
DC analysis. Now, in order to perform the AC analysis we can usefully adopt the AC model as in
Figure 11.62c
is
ic io
ib
h ie
+
+
vb
vs
+ h rev ce
hfe ib
1
R1
Ri
ho
R iBJT
+
vce =v o
RC
R oBJT
Ro
Figure 11.62c: AC model of the simplest C.E. configuration
3
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To solve the problem we can usefully adopt the two-equation system for the BJT when in C.E.
configuration
𝑣𝑏𝑒 = β„Žπ‘–π‘’ 𝑖𝑏 + β„Žπ‘Ÿπ‘’ 𝑣𝑐𝑒 (π‘’π‘ž. 𝐼 𝐢. 𝐸. )
οΏ½
𝑖𝑐 = β„Žπ‘“π‘’ 𝑖𝑏 + β„Žπ‘œπ‘’ 𝑣𝑐𝑒 (π‘’π‘ž. 𝐼𝐼 𝐢. 𝐸. )
It is often convenient to write equations starting from the end (the load) and ending to the begin
(the source) of the circuit, as in the following.
𝑅𝑖
The output voltage results
𝑣𝑐𝑒 = −𝑅𝐢 𝑖𝑐
from which we can extract 𝑖𝑐 to insert into eq.II C.E. obtaining an expression for 𝑣𝑐𝑒 :
𝑣𝑐𝑒 (1 + β„Žπ‘œπ‘’ 𝑅𝐢 ) = −β„Žπ‘“π‘’ 𝑅𝐢 𝑖𝑏
The value of 𝑣𝑐𝑒 can be usefully inserted into the eq.I C.E. to have:
β„Žπ‘“π‘’ 𝑅𝐢
𝑣𝑏𝑒 = β„Žπ‘–π‘’ 𝑖𝑏 + β„Žπ‘Ÿπ‘’ οΏ½−
�𝑖
1 + β„Žπ‘œπ‘’ 𝑅𝐢 𝑏
from which we can write
𝑅𝑖𝐡𝐽𝑇 = β„Žπ‘–π‘’ −
β„Žπ‘“π‘’ β„Žπ‘Ÿπ‘’
𝑅
1 + β„Žπ‘œπ‘’ 𝑅𝐢 𝐢
Finally, by visual inspection of the Figure 11.62c
𝑅𝑖 = 𝑅1 ||𝑅𝑖𝐡𝐽𝑇
Numerically we have 𝑅𝑖𝐡𝐽𝑇 ≅ 756Ω and 𝑅𝑖 ≅ 753Ω, which are very similar, being 𝑅1 ≫ 𝑅𝑖𝐡𝐽𝑇
(188π‘˜β„¦ ≫ 756Ω), therefore the DC bias resistor 𝑅1 does not play any meaningful rule now.
We can replace the 𝑣𝑐𝑒 expression 𝑣𝑐𝑒 = −𝑅𝐢 𝑖𝑐 into the eq.II C.E.
𝑖𝑐 = β„Žπ‘“π‘’ 𝑖𝑏 − β„Žπ‘œπ‘’ 𝑅𝐢 𝑖𝑐
to easily obtain
β„Žπ‘“π‘’
𝑖𝑐
𝐴𝑖𝐡𝐽𝑇 ≝ =
𝑖𝑏 1 + β„Žπ‘œπ‘’ 𝑅𝐢
The overall current gain 𝐴𝑖 is defined as the output/source current ratio
π‘–π‘œ −𝑖𝑐 𝑖𝑏
𝑅1
𝐴𝑖 ≝ =
= −𝐴𝑖𝐡𝐽𝑇
𝑖𝑠
𝑖𝑏 𝑖𝑠
𝑅1 + 𝑅𝑖𝐡𝐽𝑇
4
𝐴𝑖
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Numerically 𝐴𝑖𝐡𝐽𝑇 ≅ 54.5; 𝐴𝑖 ≅ −54.3.
These are two results very similar because 𝑅1 ≫ 𝑅𝑖𝐡𝐽𝑇 so that the current divider does not make
any relevant influence. Anyway, please pay close attention to the difference in sign between 𝐴𝑖𝐡𝐽𝑇
and 𝐴𝑖 , and this is for the unequal versus of the output currents.
In order to determine the voltage amplification value, let’s start from the output voltage
β„Žπ‘“π‘’
𝑣𝑐𝑒 = −𝑅𝐢 𝑖𝑐 = −𝑅𝐢
𝑖
1 + β„Žπ‘œπ‘’ 𝑅𝐢 𝑏
in which we can replace 𝑖𝑏 obtained from the following
𝑣𝑏𝑒 = β„Žπ‘–π‘’ 𝑖𝑏 + β„Žπ‘Ÿπ‘’ 𝑣𝑐𝑒 = β„Žπ‘–π‘’ 𝑖𝑏 − β„Žπ‘Ÿπ‘’ 𝑅𝐢 𝑖𝑐 = β„Žπ‘–π‘’ 𝑖𝑏 − β„Žπ‘Ÿπ‘’ 𝑅𝐢
⇒
𝐴𝑣
β„Žπ‘“π‘’
𝑖
1 + β„Žπ‘œπ‘’ 𝑅𝐢 𝑏
𝑣𝑏𝑒 (1 + β„Žπ‘œπ‘’ 𝑅𝐢 ) = οΏ½β„Žπ‘–π‘’ (1 + β„Žπ‘œπ‘’ 𝑅𝐢 ) − β„Žπ‘Ÿπ‘’ β„Žπ‘“π‘’ 𝑅𝐢 �𝑖𝑏
𝐴𝑣𝐡𝐽𝑇 ≝
β„Žπ‘“π‘’ 𝑅𝐢
𝑣𝑐𝑒
=−
𝑣𝑏𝑒
β„Žπ‘–π‘’ + βˆ†β„Žπ‘…πΆ
Now we can obtain the overall voltage gain
𝐴𝑣 ≝
π‘£π‘œ
𝑣𝑠
but since π‘£π‘œ = 𝑣𝑐𝑒 and 𝑣𝑠 = 𝑣𝑏𝑒 , it follows 𝐴𝑣 = 𝐴𝑣𝐡𝐽𝑇 .
This is because the current amplifier is without any input voltage divider since 𝑅𝑠 = 0.
Numerically 𝐴𝑣𝐡𝐽𝑇 = 𝐴𝑣 ≅ −144.2.
According to the definition of 2-port’s output resistance
𝑣𝑐𝑒
π‘…π‘œπ΅π½π‘‡ ≝
οΏ½
𝑖𝑐 𝑣 =0=𝑣
𝑠
π‘…π‘œ
𝑏𝑒
!
To solve the relationship between 𝑣𝑐𝑒 and 𝑖𝑐 when 𝑣𝑠 =
⏞ 0, we can start using the eq.I C.E.
0 = β„Žπ‘–π‘’ 𝑖𝑏 + β„Žπ‘Ÿπ‘’ 𝑣𝑐𝑒 , from which:
β„Žπ‘Ÿπ‘’
𝑖𝑏 = −
𝑣
β„Žπ‘–π‘’ 𝑐𝑒
β„Ž
which replaced into the eq.II C.E. 𝑖𝑐 = β„Žπ‘“π‘’ οΏ½− β„Žπ‘Ÿπ‘’ 𝑣𝑐𝑒 οΏ½ + β„Žπ‘œπ‘’ 𝑣𝑐𝑒 furnishes
𝑖𝑒
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π‘…π‘œπ΅π½π‘‡ =
The overall output resistance is
1
β„Žπ‘Ÿπ‘’ β„Žπ‘“π‘’
β„Žπ‘œπ‘’ −
β„Žπ‘–π‘’
π‘…π‘œ = 𝑅𝐢 ||π‘…π‘œπ΅π½π‘‡
Numerically π‘…π‘œπ΅π½π‘‡ = 50π‘˜β„¦; π‘…π‘œ ≅ 1923Ω..
Summarizing
𝑅1 = 188π‘˜β„¦; 𝑅𝐢 = 2π‘˜β„¦.
𝑅𝑖𝐡𝐽𝑇 ≅ 756Ω; 𝑅𝑖 ≅ 753Ω. 𝐴𝑖𝐡𝐽𝑇 ≅ 54.5; 𝐴𝑖 ≅ −54.3. 𝐴𝑣𝐡𝐽𝑇 = 𝐴𝑣 ≅ −144.2. π‘…π‘œπ΅π½π‘‡ = 50π‘˜β„¦;
π‘…π‘œ ≅ 1923Ω.
Exercise n. 3
If in the previous exercise the β„Žπ‘Ÿπ‘’ value is ignored, what percentage error is made?
ANSWER
Let’s rewrite the previous equation but imposing β„Žπ‘Ÿπ‘’ =0
𝑅𝑖 = 𝑅1 ||β„Žπ‘–π‘’
𝐴𝑖 = −
β„Žπ‘“π‘’
𝑅1
1 + β„Žπ‘œπ‘’ 𝑅𝐢 𝑅1 + 𝑅𝑖𝐡𝐽𝑇
𝐴𝑣 = −
β„Žπ‘“π‘’ 𝑅𝐢
(1 + β„Žπ‘œπ‘’ 𝑅𝐢 )β„Žπ‘–π‘’
π‘…π‘œ = 𝑅𝐢 ||
1
β„Žπ‘œπ‘’
The current amplification value does not depend on β„Žπ‘Ÿπ‘’ , so that it is unchanged. Numerically for
all the other values
𝐴𝑣 ≅ −136.2; 𝑅𝑖 ≅ 797Ω; π‘…π‘œ ≅ 1818Ω.
Obviously, there is not percentage error on 𝐴𝑖 , while for the others
𝐸%𝐴𝑣 =
136.2−144.2
144.2
100 ≅ 5.45%; 𝐸%𝑅𝑖 ≅ 5.74%; 𝐸%π‘…π‘œ ≅ 5.45%.
Observation
These errors are so low that can be in the range of variations of parameters due to thermal
drifts.
For C.E. and C.B. configurations, if we consider β„Žπ‘Ÿπ‘’ ≅ 0 the relative error on the
determined parameters can be quite low, and we have the advantage of mathematics made
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easier, but pay close attention for C.C. configuration for which β„Žπ‘Ÿπ‘ ≅ 1.
Summarizing
no error at all about 𝐴𝑖 , while for the other parameters 𝐸%𝐴𝑣 ≅ 5.45%; 𝐸%𝑅𝑖 ≅ 5.74%; 𝐸%π‘…π‘œ ≅
5.45%.
Exercise n. 4
The Q-point of the simplest C.E. configuration, already represented in Figure 11.62, is fixed by
the parameters 𝑉𝐢𝐸𝑄 = 5𝑉; 𝐼𝐢𝑄 = 2π‘šπ΄; 𝐼𝐡𝑄 = 5πœ‡π΄; 𝑉𝐡𝐸𝑄 = 0,7𝑉.
For the amplifier, a BJT series BC107A is used which, in correspondence of that Q-point, has the
following set of h-parameters: β„Žπ‘–π‘’ = 3π‘˜β„¦ ; β„Žπ‘Ÿπ‘’ = 1.7 ∗ 10−4 ; β„Žπ‘“π‘’ = 190; β„Žπ‘œπ‘’ = 13 ∗ 10−6 Ω−1 .
In order to obtain a current gain for a BJT that is equal to 𝐴𝑖𝐡𝐽𝑇 = 180, which values are
necessary for:
 The collector resistance 𝑅𝐢 (here it works as a load too)
 The bias resistor 𝑅1
 The DC voltage supply 𝑉𝐢𝐢
With these parameters, determine also the overall current gain 𝐴𝑖 .
ANSWER
The collector resistance value 𝑅𝐢 can be determined forcing to be 180 the current amplification
value
!
β„Žπ‘“π‘’
=
⏞ 180
𝐴𝑖𝐡𝐽𝑇 = −
1 + β„Žπ‘œπ‘’ 𝑅𝐢
so that
𝑅𝐢 =
β„Žπ‘“π‘’ − 𝐴𝑖𝐡𝐽𝑇
= 4.27π‘˜β„¦
β„Žπ‘œπ‘’ 𝐴𝑖𝐡𝐽𝑇
KVL applied around the output loop yields
𝑉𝐢𝐢 = 𝑅𝐢 𝐼𝐢𝑄 + 𝑉𝐢𝐸𝑄
so that the voltage requested to the power source must be 𝑉𝐢𝐢 = 13.55𝑉.
DC analysis of the input loop gives
𝑉𝐢𝐢 − 𝑉𝐡𝐸𝑄
𝑅1 =
𝐼𝐡𝑄
Numerically 𝑅1 = 2.57𝑀Ω.
Recalling the BJT’s input resistance expression, we have
β„Žπ‘“π‘’ β„Žπ‘Ÿπ‘’
𝑅𝑖𝐡𝐽𝑇 = β„Žπ‘–π‘’ −
𝑅 ≅ 2870Ω
1 + β„Žπ‘œπ‘’ 𝑅𝐢 𝐢
therefore, the overall current amplification value, reduced because of the input current divider, is
β„Žπ‘“π‘’
𝑅1
𝐴𝑖 = −
= −179.8
1 + β„Žπ‘œπ‘’ 𝑅𝐢 𝑅1 + 𝑅𝑖𝐡𝐽𝑇
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Basi di elettronica
Observation
Pay close attention to AiBJT and 𝐴𝑖 values. Why are they so similar?
Summarizing
𝑅𝐢 = 4.27π‘˜β„¦, 𝑉𝐢𝐢 = 13.55𝑉, 𝑅1 = 2.57𝑀Ω., 𝐴𝑖 = −179.8.
Exercise n. 5
Consider the collector-feedback bias amplifier in Figure 11.63.
VCC
RC
IB
IB +IC
IC
RF
+
+
VBE
VCE
Figure 1: collector-feedback bias topology
The circuital parameters are 𝑉𝐢𝐢 = 12𝑉; 𝑅𝐢 = 2π‘˜β„¦; 𝑅𝐹 = 120π‘˜β„¦, and the BJT has 𝛽 = 80.
Considering (as usual) 𝑉𝐡𝐸𝑄 = 0.7𝑉 and 𝐼𝐢𝐡𝑂 negligible, determine the Q-point.
ANSWER
To find the quiescent or Q-point we have to determine the values of 𝐼𝐡𝑄 , 𝑉𝐢𝐸𝑄 and 𝐼𝐢𝑄 .
KVL applied around the input loop yields
𝑉𝐢𝐢 = �𝐼𝐡𝑄 + 𝐼𝐢𝑄 �𝑅𝐢 + 𝐼𝐡𝑄 𝑅𝐹 + 𝑉𝐡𝐸𝑄
With the assumption 𝐼𝐢 ≅ 𝛽𝐼𝐡 , we can determine the base bias quiescent current 𝐼𝐡𝑄
𝑉𝐢𝐢 − 𝑉𝐡𝐸𝑄
𝐼𝐡𝑄 =
(1 + 𝛽)𝑅𝐢 + 𝑅𝐹
Numerically 𝐼𝐡𝑄 ≅ 40πœ‡π΄ , so that the bias collector quiescent current will be 𝐼𝐢𝑄 = 𝛽𝐼𝐡𝑄 ≅
3.2π‘šπ΄.
Finally, the output voltage 𝑉𝐢𝐸𝑄
which is equal to 𝑉𝐢𝐸𝑄 ≅ 5.5𝑉.
𝑉𝐢𝐸𝑄 = 𝑉𝐢𝐢 − 𝑅𝐢 �𝐼𝐢𝑄 + 𝐼𝐡𝑄 οΏ½
Summarizing 𝐼𝐡𝑄 ≅ 40πœ‡π΄; 𝐼𝐢𝑄 ≅ 3.2π‘šπ΄; 𝑉𝐢𝐸𝑄 ≅ 5.5𝑉
Exercise n. 6
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Determine the stability factors 𝑆𝐼𝐢𝐡𝑂 , 𝑆𝑉𝐡𝐸𝑄 , 𝑆𝛽 of the amplifier of the previous exercise.
ANSWER
Input loop KVL
𝑉𝐢𝐸 = 𝑅𝐹 𝐼𝐡 + 𝑉𝐡𝐸
Output loop KVL
𝑉𝐢𝐢 = 𝑅𝐢 (𝐼𝐡 + 𝐼𝐢 ) + 𝑉𝐢𝐸
therefore
𝑉𝐢𝐢 = 𝑅𝐢 (𝐼𝐡 + 𝐼𝐢 ) + 𝑅𝐹 𝐼𝐡 + 𝑉𝐡𝐸
from which
𝐼𝐡 =
𝑉𝐢𝐢 − 𝑉𝐡𝐸 − 𝐼𝐢 𝑅𝐢
𝑅𝐹 + 𝑅𝐢
With this result, the generic collector current equation
𝐼𝐢 = 𝛽𝐼𝐡 + (1 + 𝛽)𝐼𝐢𝐡𝑂
becomes
𝐼𝐢 = 𝛽
𝐼𝐢 �1 +
𝑉𝐢𝐢 − 𝑉𝐡𝐸 − 𝐼𝐢 𝑅𝐢
+ (1 + 𝛽)𝐼𝐢𝐡𝑂
𝑅𝐹 + 𝑅𝐢
(𝑉𝐢𝐢 − 𝑉𝐡𝐸 )
𝛽𝑅𝐢
οΏ½=𝛽
+ (1 + 𝛽)𝐼𝐢𝐡𝑂
𝑅𝐹 + 𝑅𝐢
𝑅𝐹 + 𝑅𝐢
We can then write the stability factors as
𝑆𝐼𝐢𝐡𝑂 ≝
𝑆𝑉𝐡𝐸𝑄 ≝
Observation
𝑆𝛽 ≝
βˆ†πΌπΆπ‘„
1+𝛽
=
βˆ†πΌπΆπ΅π‘‚ 1 + 𝛽 𝑅𝐢
𝑅 +𝑅
𝐹
𝐢
βˆ†πΌπΆπ‘„
𝛽
=−
βˆ†π‘‰π΅πΈπ‘„
𝑅𝐹 + (1 + 𝛽)𝑅𝐢
βˆ†πΌπΆπ‘„ 𝑉𝐢𝐢 − 𝑉𝐡𝐸 − 𝑅𝐢 𝐼𝐢 + (𝑅𝐹 + 𝑅𝐢 )𝐼𝐢𝐡𝑂
=
βˆ†π›½
𝑅𝐹 + (1 + 𝛽)𝑅𝐢
It is worth pointing out the differences in stability factors of the current collector fixed bias
configuration (Section 11.10.1) versus the fixed bias one (Section 11.10.2). We can
perform the comparison considering the current resistor 𝑅𝐹 having replaced the resistor 𝑅1 .
In such a view, the current fixed bias configuration offers extra terms highlithed in red in
the three previous equations, so that we have improvements in stability in the current
configuration respect to the fixed bias one. But, be aware as these improvements vanish if
𝑅𝐹 ≫ 𝑅𝐢 (on the other end the feedback effect will be nullified).
Numerically
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𝑆𝐼𝐢𝐡𝑂 =
𝑆𝛽 =
𝑆𝑉𝐡𝐸𝑄 = −
1+𝛽
≅ 35
𝑅𝐢
1+𝛽
𝑅𝐹 + 𝑅𝐢
𝛽
𝐴
≅ −0.28
𝑅𝐹 + (1 + 𝛽)𝑅𝐢
𝑉
𝑉𝐢𝐢 − 𝑉𝐡𝐸 − 𝑅𝐢 𝐼𝐢 + (𝑅𝐹 + 𝑅𝐢 )𝐼𝐢𝐡𝑂
≅ 17.3πœ‡π΄
𝑅𝐹 + (1 + 𝛽)𝑅𝐢
Summarizing
𝐴
𝑆𝐼𝐢𝐡𝑂 ≅ 35, 𝑆𝑉𝐡𝐸𝑄 ≅ −0.28 𝑉, 𝑆𝛽 ≅ 17.3πœ‡π΄.
Exercise n. 7
Consider the collector-feedback bias amplifier as already schematized in Figure 11.63.
Find the 𝐼𝐢𝑄 − 𝑉𝐢𝐸𝑄 pairs in quiescent conditions when 𝑉𝐢𝐢 = 12𝑉, 𝑅𝐢 = 2π‘˜β„¦, 𝑅𝐹 = 47π‘˜β„¦, for
the two occurrences of 𝛽 = 80 and 𝛽 = 120.
ANSWER
To find the expressions for 𝐼𝐢𝑄 and 𝑉𝐢𝐸𝑄 we start applying KVL to the input loop
𝑉𝐢𝐢 = �𝐼𝐡𝑄 + 𝐼𝐢𝑄 �𝑅𝐢 + 𝐼𝐡𝑄 𝑅𝐹 + 𝑉𝐡𝐸𝑄
which, taking into account that 𝐼𝐢 ≅ 𝛽𝐼𝐡 can be rewritten as
𝐼𝐢𝑄
𝐼𝐢𝑄
𝑉𝐢𝐢 ≅ 𝑅𝐢
+ 𝑅𝐢 𝐼𝐢 + 𝑅𝐹
+ 𝑉𝐡𝐸𝑄
𝛽
𝛽
from which
𝐼𝐢𝑄 ≅
𝑉𝐢𝐢 − 𝑉𝐡𝐸𝑄
𝑅
𝑅𝐢 + 𝐹
1+𝛽
The expression of 𝐼𝐢𝑄 is useful to determine 𝑉𝐢𝐸𝑄 too. In fact KVL around the output loop gives
𝑉𝐢𝐸𝑄 = 𝑉𝐢𝐢 − �𝐼𝐡𝑄 + 𝐼𝐢𝑄 �𝑅𝐢
which, again with the assumption of 𝐼𝐢 ≅ 𝛽𝐼𝐡 can be rewritten as
𝐼𝐢𝑄
𝑉𝐢𝐸𝑄 ≅ 𝑉𝐢𝐢 − οΏ½
+ 𝐼𝐢𝑄 +οΏ½ 𝑅𝐢
𝛽
Numerically, it results for both the assumptions of 𝛽 = 80 and 𝛽 = 120 respectively
𝐼𝐢𝑄 �𝛽=80 ≅ 4,38π‘šπ΄; 𝑉𝐢𝐸𝑄 �𝛽=80 ≅ 3,13𝑉
𝐼𝐢𝑄 �𝛽=120 ≅ 4,74π‘šπ΄; 𝑉𝐢𝐸𝑄 �𝛽=120 ≅ 2,46𝑉
Observation
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Basi di elettronica
Higher 𝛽 corresponds to higher 𝐼𝐢𝑄 but lower 𝑉𝐢𝐸𝑄 , so higher drop on 𝑅𝐢 .
Exercise n. 8
A four-resistor bias for a BJT is given as in Figure 11.64.
VCC
R1 RC
IBQ
+
VBQ
+
VBEQ
R2
-
ICQ
+
VCEQ
-
RE I
EQ
Figure 11.64: Four-resistor bias
Determine the values of all the resistors when 𝑉𝐢𝐢 = 12𝑉, 𝐼𝐢𝑄 = 10π‘šπ΄, the output voltage drops
50% on 𝑉𝐢𝐸𝑄 , 40% on 𝑅𝐢 , and 10% on 𝑅𝐸 , and a maximum 𝐼𝐢𝑄 swing of
βˆ†πΌπΆπ‘„
𝐼𝐢𝑄
= 5% is requested
with 𝛽 varying.
Determine the dissipated powers in each resistors as well.
For the BJT we are using type 2N2222 for which π›½π‘šπ‘–π‘› = 100, π›½π‘šπ‘Žπ‘₯ = 300, 𝛽𝐴𝑉𝐺 = 175.
ANSWERS
The exercise does not indicate the value of 𝛽 to choice. It is better than to consider the worst case,
that is the lowest value π›½π‘šπ‘–π‘› = 100, so that in all the other occurrences the amplification value
will be higher than the one we will obtain.
So
𝐼𝐢𝑄
𝐼𝐡𝑄 =
= 100πœ‡π΄
𝛽
𝛽
𝛼=
≅ 0.99
1+𝛽
𝐼𝐢𝑄
𝐼𝐸𝑄 =
= 10.1π‘šπ΄
𝛼
The exercise does not suggest how to split the battery’s voltage value among the components of
the output loop too. Therefore we will empirically admit the half of 𝑉𝐢𝐢 across the collectoremitter terminals (in such a way the Q-point will be roughly in the middle of the BJT’s active
region), and the second half for the 80% across the collector resistor 𝑅𝐢 and for the remaining
20% across the emitter resistor 𝑅𝐸 (this is because the latter plays a rule only as a fixed bias
resistor, see Section 11.4.1.4 in Chapter 11).
𝑉𝐢𝐢
𝑉𝐢𝐸 =
= 6𝑉
2
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Basi di elettronica
𝑉𝐢𝐢
= 4.8𝑉
2
𝑉𝐢𝐢
= 0.2
= 1.2𝑉
2
𝑉𝑅𝐢 = 0.8
𝑉𝑅𝐸
The resistor values around the output loop
𝑉𝑅𝐢
= 480Ω
𝐼𝐢
𝑉𝑅𝐸
𝑅𝐸 =
≅ 119Ω
𝐼𝐸
𝑅𝐢 =
and their dissipated powers
𝑃𝑅𝐢 = 𝑅𝐢 𝐼𝐢2 = 48π‘šπ‘Š
𝑃𝑅𝐸 = 𝑅𝐸 𝐼𝐸2 = 12.1π‘šπ‘Š
Since we do not know if the relationship 𝛽𝑅𝐸 ≥ 10𝑅𝐡 is true or not (Section 11.4.1.5 in Chapter
11), it is better to conservatively proceed adopting the exact analysis, and verifying the possibility
to adopt the approximate analysis later on. To determine the Thevenin equivalent, according with
the requirement, we can set
βˆ†πΌπΆπ‘„ !
=
⏞ 0.05
𝐼𝐢𝑄
so that (Section 9.2.1 in Chapter 9)
!
βˆ†πΌπΆπ‘„
𝑅𝑇𝐻 βˆ†π›½
1
= οΏ½1 +
οΏ½
=
⏞ 0.05
𝐼𝐢𝑄1
𝑅𝐸 𝛽1 𝛽2 1 + 1 𝑅𝑇𝐻
𝛽2 𝑅𝐸
!
𝑅𝐸 + 𝑅𝑇𝐻 βˆ†π›½
𝛽2 𝑅𝐸
=
⏞ 0.05
𝑅𝐸
𝛽1 𝛽2 𝛽2 𝑅𝐸 + 𝑅𝑇𝐻
from which
KVL around the input loop
𝑅𝑇𝐻 =
(0.05𝛽1 𝛽2 − βˆ†π›½)𝑅𝐸
≅ 914Ω
βˆ†π›½ − 0.05𝛽1
𝑉𝑇𝐻 = 𝑅𝑇𝐻 𝐼𝐡𝑄 + 𝑉𝐡𝐸𝑄 + 𝑅𝐸 �𝐼𝐡𝑄 + 𝐼𝐢𝑄 οΏ½ ≅ 1.99𝑉
The latter value, utilized in
βŽ§π‘‰π‘‡π» =
⎨ 𝑅
⎩ 𝑇𝐻
allows to determine the 𝑅1 and 𝑅2 values
𝑅2
𝑉
𝑅1 + 𝑅2 𝐢𝐢
𝑅1 𝑅2
=
𝑅1 + 𝑅2
𝑅2
𝑉
βŽ§π‘‰π‘‡π» =
𝑅1 𝑅2 𝐢𝐢
βŽͺ
𝑅𝑇𝐻
⎨
𝑅 𝑅
βŽͺ𝑅1 + 𝑅2 = 1 2
⎩
𝑅𝑇𝐻
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Basi di elettronica
𝑅1 = 𝑅𝑇𝐻
𝑅2 =
𝑉𝐢𝐢
≅ 5507Ω
𝑉𝑇𝐻
𝑅𝑇𝐻 𝑉𝐢𝐢
≅ 1096Ω
𝑉𝐢𝐢 − 𝑉𝑇𝐻
Finally, knowing that 𝑉𝐡𝑄 = 𝑉𝐡𝐸𝑄 + 𝑉𝑅𝐸 = 1.9𝑉, the dissipated powers are
𝑃𝑅1
2
�𝑉𝐢𝐢 − 𝑉𝐡𝑄 οΏ½
=
≅ 18.5π‘šπ‘Š
𝑅1
𝑃𝑅2
2
𝑉𝐡𝑄
=
≅ 3.3π‘šπ‘Š
𝑅2
For the current exercise, since 𝛽𝑅𝐸 > 10𝑅2 is verified, we could admit the approximate analysis.
Summarizing
𝑅𝐢 =
𝑉𝑅𝐢
𝐼𝐢
= 480Ω, 𝑅𝐸 =
𝑉𝑅𝐸
𝐼𝐸
≅ 119Ω.
𝑃𝑅𝐢 = 48π‘šπ‘Š, 𝑃𝑅𝐸 = 12.1π‘šπ‘Š.
𝑅1 ≅ 5507Ω, 𝑅2 ≅ 1096Ω.
𝑃𝑅1 ≅ 18.5π‘šπ‘Š, 𝑃𝑅2 ≅ 3.3π‘šπ‘Š.
Exercise n. 9
Design a voltage divider with emitter feedback bias as in Figure 11.64, so that the total variation
of the bias current collector βˆ†πΌπΆπ‘„ is within 12%, equally divided among the stability factors 𝑆𝐼𝐢𝐡𝑂 ,
𝑆𝑉𝐡𝐸𝑄 , 𝑆𝛽 , for a temperature variation in the range 77-167°F (25-75°C).
Utilize a BJT of type BC107 for which 𝐼𝐢𝐡𝑂 | 𝑇=25°πΆ = 15𝑛𝐴, and when 𝐼𝐢 = 2π‘šπ΄, 𝑉𝐢𝐸 = 5𝑉 we
get β„ŽπΉπΈπ‘šπ‘–π‘› = 110 , β„ŽπΉπΈπ‘šπ‘Žπ‘₯ = 450 , β„ŽπΉπΈπ‘‘π‘¦π‘ = 120 ; π‘‰π΅πΈπ‘œπ‘› π‘šπ‘–π‘› = 0.55𝑉 , π‘‰π΅πΈπ‘œπ‘› π‘šπ‘Žπ‘₯ = 0.7𝑉 ,
π‘‰π΅πΈπ‘œπ‘› 𝑑𝑦𝑝 = 0.62𝑉.
ANSWER
Typical h-parameter values for the BC107 type transistor are reported in section 11.3.4. In
particular the cut-off collector current 𝐼𝐢𝐡𝑂 | 𝑇=25°πΆ = 15𝑛𝐴, and when 𝐼𝐢 = 2π‘šπ΄, 𝑉𝐢𝐸 = 5𝑉, we
have the following
 DC Current Gain β„ŽπΉπΈπ‘šπ‘–π‘› = 110, β„ŽπΉπΈπ‘šπ‘Žπ‘₯ = 450, β„ŽπΉπΈπ‘‘π‘¦π‘ = 120
 Base-emitter voltage in active region π‘‰π΅πΈπ‘œπ‘› π‘šπ‘–π‘› = 0.55𝑉, π‘‰π΅πΈπ‘œπ‘› π‘šπ‘Žπ‘₯ = 0.7𝑉, π‘‰π΅πΈπ‘œπ‘› 𝑑𝑦𝑝 =
0.62𝑉
It is also useful to report the expressions of the stability factors as determined in sections
11.10.3.1, 11.10.3.2, and 11.10.3.3
𝑅
𝑅
1 + 𝑅𝑇𝐻
1 + 𝑅𝑇𝐻
𝐸
𝐸
𝑆𝐼𝐢𝐡𝑂 ≅
=
1 𝑅𝑇𝐻
𝐾
𝛽
1+ 𝑅
𝛽 𝐸
13
Basi di elettronica
𝑆𝑉𝐡𝐸𝑄 ≅ −
1
1
=−
1 𝑅𝑇𝐻
𝐾𝛽 𝑅𝐸
1+
𝑅
𝛽 𝑅𝐸 𝐸
𝑅
𝑅
οΏ½1 + 𝑅𝑇𝐻 οΏ½ βˆ†π›½
οΏ½1 + 𝑅𝑇𝐻 οΏ½ βˆ†π›½
βˆ†πΌπΆπ‘„
𝐸
𝐸
=
=
𝛽1 𝛽2
𝐼𝐢𝑄1 οΏ½1 + 1 𝑅𝑇𝐻 οΏ½ 𝛽1 𝛽2
𝐾𝛽2
𝛽2 𝑅𝐸
In order to evaluate the previous equations it is necessary to determine the ratio
hypothesis (verified in the following) that 𝐾𝛽2 = 1, results
βˆ†πΌπΆπ‘„
𝑅𝑇𝐻 βˆ†π›½ !
= οΏ½1 +
οΏ½
=
⏞ 0.04
𝐼𝐢𝑄1
𝑅𝐸 𝛽1 𝛽2
𝑅𝑇𝐻
𝑅𝐸
which, in the
where we imposed a 4% value as requested, so
βˆ†π›½
𝑅𝑇𝐻 0.04 − 𝛽1 𝛽2
=
≅ 4.82
βˆ†π›½
𝑅𝐸
𝛽1 𝛽2
1 𝑅𝑇𝐻
2 𝑅𝐸
which implies that 𝐾𝛽2 = 1 + 𝛽
≅ 1.01 so resulting the approximation acceptable.
The value 𝑅𝑇𝐻 ⁄𝑅𝐸 ≅ 4.82 allows to determine 𝑅𝑇𝐻 and 𝑅𝐸 apart, taking into account that (see
section 11.10)
 Temperature effect: βˆ†π‘‰π΅πΈπ‘œπ‘› (𝑇) = −2.5 ∗ 10−3 (𝑇2 − 𝑇1 ) = −125π‘šπ‘‰
 “Dispersion” effect: βˆ†π‘‰π΅πΈπ‘œπ‘› (𝑑𝑖𝑠𝑝) = π‘‰π΅πΈπ‘œπ‘› π‘šπ‘Žπ‘₯ − π‘‰π΅πΈπ‘œπ‘› π‘šπ‘–π‘› = 150π‘šπ‘‰
so, a total of βˆ†π‘‰π΅πΈπ‘œπ‘› = −275π‘šπ‘‰ which can be used in the expression
βˆ†πΌπΆπ‘„ !
βˆ†πΌπΆπ‘„ βˆ†π‘‰π΅πΈ
1 βˆ†π‘‰π΅πΈ
=
⏞ 0.04 =
=−
𝐼𝐢𝑄1
βˆ†π‘‰π΅πΈ 𝐼𝐢𝑄1
𝐾𝛽 𝑅𝐸 𝐼𝐢𝑄1
to obtain
𝑅𝐸 ≅ 3400Ω
and, therefore
𝑅𝑇𝐻 ≅ 4.82𝑅𝐸 ≅ 16.4π‘˜β„¦
The Thevenin voltage 𝑉𝑇𝐻 can be get from the KVL around the input loop
where 𝐼𝐡𝑄 =
𝐼𝐢𝑄
𝛽
=β„Ž
𝐼𝐢𝑄
𝐹𝐸𝑑𝑦𝑝
𝑉𝑇𝐻 = 𝑅𝑇𝐻 𝐼𝐡𝑄 + 𝑉𝐡𝐸𝑄 + 𝑅𝐸 �𝐼𝐡𝑄 + 𝐼𝐢𝑄 οΏ½
, obtaining:
The expressions of 𝑉𝑇𝐻 = 𝑅
𝑅2
𝑅2
1 +𝑅2
𝑉𝑇𝐻 ≅ 7.76𝑉
𝑅 𝑅
𝑉𝐢𝐢 and 𝑅𝑇𝐻 = 𝑅 1+𝑅2 allow to determine the resistances 𝑅1 and
1
𝑅1 =
2
𝑅1 + 𝑅2
𝑉𝐢𝐢
𝑅𝑇𝐻 =
𝑅
𝑅2
𝑉𝑇𝐻 𝑇𝐻
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Basi di elettronica
Numerically
𝑅2 =
𝑉𝑇𝐻
𝑉𝑇𝐻
(𝑅1 + 𝑅2 ) =
𝑅
𝑉𝐢𝐢
𝑉𝐢𝐢 − 𝑉𝑇𝐻 1
𝑅1 ≅ 25.4π‘˜β„¦
𝑅2 ≅ 46.4π‘˜β„¦
Finally, the collector resistance 𝑅𝐢 comes from KVL around the output closed path
𝑉𝐢𝐢 − 𝑉𝐢𝐸𝑄 − 𝑅𝐸 𝐼𝐢𝑄
𝑅𝐢 ≅
𝐼𝐢𝑄
Numerically
𝑅𝐢 ≅ 99Ω
Summarizing
𝑅𝐸 ≅ 3400Ω, 𝑅1 ≅ 25.4π‘˜β„¦, 𝑅2 ≅ 46.4π‘˜β„¦, 𝑅𝐢 ≅ 99Ω.
Observation
These values satisfy the DC conditions. However, the designer must take into account the
AC conditions as well; in particular, the 𝑅𝐢 value will be fundamental. Therefore, if the
AC conditions suggest different values for 𝑅𝐢 , we have to change it, return to DC analysis
and iterate the AC analysis until a good compromise is obtained.
Exercise n. 10
Given the circuit in Figure 11.65, for which 𝑉𝐢𝐢 = 12𝑉; 𝑉𝐡𝐸 = 0.7𝑉; 𝛽 = 70; and 𝑅𝐢1 = 6π‘˜β„¦;
′
′′
= 1π‘˜β„¦ ; 𝑅𝐸2
= 2.2π‘˜β„¦ determine R F so that 𝑉𝐢𝐸1 = 3𝑉 and
𝑅𝐢2 = 4.7π‘˜β„¦ ; 𝑅𝐸1 = 2.2π‘˜β„¦ ; 𝑅𝐸2
𝑉𝐢𝐸1 = 2𝑉.
VCC
R C2
R C1
T2
I B2
A
I C2
T 1 R’E2
I C1
I B1
RF
R E1
B
R’’E2
Figure 11.65 Voltage divider bias with feedback effect.
ANSWER
15
Basi di elettronica
KVL around the output loop with 𝑇1 yields
𝑉𝐢𝐢 = 𝑅𝐢1 𝐼𝐢1 + 𝑉𝐢𝐸1 + 𝑅𝐸1 𝐼𝐸1
which, with the approximation 𝐼𝐢1 ≅ 𝐼𝐸1 becomes
𝑉𝐢𝐢 ≅ 𝑉𝐢𝐸1 + (𝑅𝐢1 + 𝑅𝐸1 )𝐼𝐢1
from which 𝐼𝐢1 ≅ 1.1π‘šπ΄.
Similarly for 𝐼𝐢2
′
′′ )𝐼
𝑉𝐢𝐢 ≅ 𝑉𝐢𝐸2 + (𝑅𝐢2 + 𝑅𝐸2
+ 𝑅𝐸2
𝐢2
so that 𝐼𝐢2 ≅ 1.3π‘šπ΄.
To obtain the resistance 𝑅𝐹 we can consider the voltage drop across it, that is 𝑉𝐴 − 𝑉𝐡
𝑉𝐴 ≅ 𝑉𝐡𝐸1 + 𝑅𝐸1 𝐼𝐢1
so 𝑉𝐴 = 3.11𝑉, while
′′
𝑉𝐡 ≅ 𝑅𝐸2
𝐼𝐢2
so 𝑉𝐡 ≅ 2.78𝑉, therefore 𝑉𝐴𝐡 = 𝑉𝐴 − 𝑉𝐡 = 0.33𝑉.
In DC analysis, the current 𝐼𝐡1 comes through 𝑅𝐹
𝑉𝐴𝐡
𝑉𝐴𝐡
=
𝑅𝐹 =
𝐼𝐡1 𝐼𝐢1�
𝛽
The requested value is then 𝑅𝐹 ≅ 21π‘˜β„¦.
Exercise n. 11
Determine the h-parameter β„Žπ‘“π‘ of a BJT with a C.B. configuration, as function of the hparameters of the same BJT with a C.E. configuration, that is β„Žπ‘“π‘ = π‘“οΏ½β„Žπ‘–π‘’ , β„Žπ‘Ÿπ‘’ , β„Žπ‘“π‘’ , β„Žπ‘œπ‘’ οΏ½.
ANSWER
β„Žπ‘“π‘ is defined as
β„Žπ‘“π‘ ≝
𝑖𝑐
οΏ½
𝑖𝑒 𝑣
𝑐𝑏 =0
so we have to take into account the BJT h-parameter model C.E. configured, as in Figure 11.65b
for which
𝑣𝑏𝑒 = β„Žπ‘–π‘’ 𝑖𝑏 + β„Žπ‘Ÿπ‘’ 𝑣𝑐𝑒 (π‘’π‘ž. 𝐼 𝐢𝐸)
οΏ½
𝑖𝑐 = β„Žπ‘“π‘’ 𝑖𝑏 + β„Žπ‘œπ‘’ 𝑣𝑐𝑒 (π‘’π‘ž. 𝐼𝐼 𝐢𝐸)
but forcing 𝑣𝑐𝑏 = 0.
ib
ic
h ie
+
v be
+ h rev ce
h fe ib
1
h oe
16
+
v ce
Basi di elettronica
Figure 11.65b BJT h-parameter model C.E. configured
KCL states that for a given node the algebraic sum of the currents is zero. In a broad sense a BJT
can be considered as a node itself, and given the conventional versus of the currents in a two-port
network (the output current enters into the network rather than exits), we have
−𝑖𝑐 = 𝑖𝑏 + 𝑖𝑒
The latter equation inserted into the eq. II CE furnishes
𝑖𝑐 = β„Žπ‘“π‘’ 𝑖𝑏 + β„Žπ‘œπ‘’ 𝑣𝑐𝑒 = −β„Žπ‘“π‘’ (𝑖𝑐 + 𝑖𝑒 ) + β„Žπ‘œπ‘’ 𝑣𝑐𝑒
while into the eq. I CE yields
𝑣𝑏𝑒 = −β„Žπ‘–π‘’ (𝑖𝑐 + 𝑖𝑒 ) + β„Žπ‘Ÿπ‘’ 𝑣𝑐𝑒
Now imposing 𝑣𝑐𝑏 = 0 as in the Figure 11.65c
v cb=0
ib
ic
h ie
B
+
v be
C
+ h rev ce
h feie
1
E
+
v ce
h oe
Figure 11.65c BJT h-parameter model C.E. configured with vcb=0
it follows that 𝑣𝑐𝑒 = 𝑣𝑏𝑒 and the previous equation can be rewritten as
𝑣𝑐𝑒 = −β„Žπ‘–π‘’ (𝑖𝑐 + 𝑖𝑒 ) + β„Žπ‘Ÿπ‘’ 𝑣𝑐𝑒
therefore
𝑣𝑐𝑒 = −
β„Žπ‘–π‘’
(𝑖 + 𝑖𝑒 )
1 − β„Žπ‘Ÿπ‘’ 𝑐
This expression of 𝑣𝑐𝑒 can be usefully replaced into the eq. II CE to obtain a link between the
variables 𝑖𝑐 and 𝑖𝑒
β„Žπ‘–π‘’
(𝑖 + 𝑖𝑒 )
𝑖𝑐 = −β„Žπ‘“π‘’ (𝑖𝑐 + 𝑖𝑒 ) − β„Žπ‘œπ‘’
1 − β„Žπ‘Ÿπ‘’ 𝑐
Finally
β„Žπ‘“π‘ ≝
𝑖𝑐
οΏ½
𝑖𝑒 𝑣
𝑐𝑏 =0
=−
β„Žπ‘–π‘’ β„Žπ‘œπ‘’ + (1 − β„Žπ‘Ÿπ‘’ )β„Žπ‘“π‘’
β„Žπ‘–π‘’ β„Žπ‘œπ‘’ + (1 − β„Žπ‘Ÿπ‘’ )οΏ½1 + β„Žπ‘“π‘’ οΏ½
Exercise n. 12
A four-resistor bias amplifier is supplied from a signal source with internal resistance 𝑅𝑠 = 1π‘˜β„¦..
The amplifier feeds a load resistor 𝑅𝐿 = 1π‘˜β„¦ (Figure 11.66).
17
Basi di elettronica
VCC
RC
R1
iL
ig
CB1
Rg
CB2
+
vi
+
RL
R2 RE
CE
vg
+
vL
Figure 11.66 C.E. amplifier
Considering that the values of resistors are 𝑅1 = 40π‘˜β„¦, 𝑅2 = 10π‘˜β„¦, 𝑅𝐢 = 5π‘˜β„¦, 𝑅𝐿 = 1π‘˜β„¦, and
the BJT’s hybrid parameters are β„Žπ‘–π‘’ = 2π‘˜β„¦ , β„Žπ‘Ÿπ‘’ = 2 ∗ 10−3 , β„Žπ‘“π‘’ = 120 , β„Žπ‘œπ‘’ = 2 ∗ 10−4 𝑆 ,
determine the following:
𝑖
 The overall current amplifier 𝐴𝑖 = 𝑖𝐿
𝑣
 The overall input resistance 𝑅𝑖 = 𝑖 𝑖
𝑔
 The overall voltage amplifier 𝐴𝑣 =
 The overall output resistance π‘…π‘œ =
𝑔
𝑣𝐿
𝑣𝑖
𝑣𝐿
𝑖𝐿
ANSWER
The equivalent AC model is represented in Figure 11.66b.
ib
ig
Rg
+
vg
ic
iL
h ie
B
+
v i=vb
R1
C
+ h rev ce
h feie
RC
1
R2
E
RL +
v o=vL
h oe
Figure 11.66b AC equivalent model of the CE amplifier
For convenience we can combine 𝑅𝐢𝐿 = 𝑅𝐢 ||𝑅𝐿 ≅ 833Ω. and 𝑅12 = 𝑅1 ||𝑅2 = 8π‘˜β„¦.
According the Sections 11.4.2.2, 11.4.2.3, 11.4.2.4 and 11.4.2.5, we have the partial results
β„Žπ‘“π‘’
𝐴𝑖𝐡𝐽𝑇 =
1 + β„Žπ‘œπ‘’ 𝑅𝐢𝐿
𝑅𝑖𝐡𝐽𝑇 = β„Žπ‘–π‘’ − β„Žπ‘Ÿπ‘’
18
β„Žπ‘“π‘’ 𝑅𝐢𝐿
1 + β„Žπ‘œπ‘’ 𝑅𝐢𝐿
Basi di elettronica
𝐴𝑣𝐡𝐽𝑇 = −
β„Žπ‘“π‘’ 𝑅𝐢𝐿
(1 + β„Žπ‘œπ‘’ 𝑅𝐢𝐿 )β„Žπ‘–π‘’ − β„Žπ‘“π‘’ β„Žπ‘Ÿπ‘’ 𝑅𝐢𝐿
π‘…π‘œπ΅π½π‘‡ =
1
β„Žπ‘“π‘’ β„Žπ‘Ÿπ‘’
β„Žπ‘œπ‘’ −
β„Žπ‘–π‘’ + (𝑅𝑠 ||𝑅12 )
Numerically
𝐴𝑖𝐡𝐽𝑇 ≅ 103; 𝑅𝑖𝐡𝐽𝑇 ≅ 1829Ω; 𝐴𝑣𝐡𝐽𝑇 ≅ −46,9; π‘…π‘œπ΅π½π‘‡ ≅ 8553Ω.
In order to obtain the complete results we have to consider the current and voltage dividers, so
that
but 𝑖𝐿 = − 𝑅
𝑅𝐢
𝐢 +𝑅𝐿
𝑖𝑐 and 𝑖𝑏 = 𝑅
𝑅12
𝐴𝑖 =
12 +𝑅𝑖𝐡𝐽𝑇
𝑖𝐿 𝑖𝑐 𝑖𝑏
= π›Όπ‘–π‘œ 𝐴𝑖𝐡𝐽𝑇 𝛼𝑖𝑖
𝑖𝑐 𝑖𝑏 𝑖𝑔
𝑖𝑠 , so that
π›Όπ‘–π‘œ = −
𝛼𝑖𝑖 =
Therefore
𝐴𝑖 = π›Όπ‘–π‘œ 𝐴𝑖𝐡𝐽𝑇 𝛼𝑖𝑖 = −
𝑅𝐢
𝑅𝐢 + 𝑅𝐿
𝑅12
𝑅12 + 𝑅𝑆
β„Žπ‘“π‘’
𝑅𝐢
𝑅12
𝑅𝐢 + 𝑅𝐿 1 + β„Žπ‘œ 𝑅𝐢𝐿 𝑅12 + 𝑅𝑖𝐡𝐽𝑇
Numerically π›Όπ‘–π‘œ ≅ −0,833; 𝛼𝑖𝑖 ≅ 0,814; 𝐴𝑖 ≅ −69,8.
𝑅𝑖 =
β„Žπ‘“π‘’ 𝑅𝐢𝐿
𝑣𝑖
= 𝑅12 ||𝑅𝑖𝐡𝐽𝑇 = 𝑅12 || οΏ½β„Žπ‘–π‘’ − β„Žπ‘Ÿπ‘’
οΏ½
𝑖𝑠
1 + β„Žπ‘œπ‘’ 𝑅𝐢𝐿
Numerically 𝑅𝑖 ≅ 1488Ω.
but 𝑣𝑖 = 𝑣𝑏 = 𝑅
𝑅12 ||𝑅𝑖𝐡𝐽𝑇
12 ||𝑅𝑖𝐡𝐽𝑇 +𝑅𝑆
𝐴𝑣 =
𝐴𝑖
𝑣𝐿 𝑣𝑖 𝑣𝑐 𝑣𝑖 𝑣𝑐 𝑣𝑏
=
=
= 𝐴𝑣𝐡𝐽𝑇 𝛼𝑣
𝑣𝑖 𝑣𝑠 𝑣𝑖 𝑣𝑠 𝑣𝑏 𝑣𝑠
𝑣𝑠 so that
19
𝑅𝑖
𝐴𝑣
Basi di elettronica
𝛼𝑣 =
therefore
𝐴𝑣 = 𝐴𝑣𝐡𝐽𝑇 𝛼𝑣 = −
𝑅12 ||𝑅𝑖𝐡𝐽𝑇
𝑅12 ||𝑅𝑖𝐡𝐽𝑇 + 𝑅𝑆
β„Žπ‘“π‘’ 𝑅𝐢𝐿
𝑅12 ||𝑅𝑖𝐡𝐽𝑇
(1 + β„Žπ‘œπ‘’ 𝑅𝐢𝐿 )β„Žπ‘–π‘’ − β„Žπ‘“π‘’ β„Žπ‘Ÿπ‘’ 𝑅𝐢𝐿 𝑅12 ||𝑅𝑖𝐡𝐽𝑇 + 𝑅𝑆
Numerically 𝛼𝑣 ≅ 0,598; 𝐴𝑣 ≅ −28.
π‘…π‘œ = π‘…π‘œπ΅π½π‘‡ ||𝑅𝐢𝐿
π‘…π‘œ
Summarizing
𝐴𝑖𝐡𝐽𝑇 ≅ 103; 𝑅𝑖𝐡𝐽𝑇 ≅ 1829Ω; 𝐴𝑣𝐡𝐽𝑇 ≅ −46,9; π‘…π‘œπ΅π½π‘‡ ≅ 8553Ω.
𝐴𝑖 ≅ −69,8; 𝑅𝑖 ≅ 1488Ω, 𝐴𝑣 ≅ −28; π‘…π‘œ ≅ 759Ω.
Observation
Pay close attention to the input and output resistance values, 𝑅𝑖 ≅ 1488Ω and π‘…π‘œ ≅ 759Ω.
They are not suitable for an ideal voltage amplifier for which we require a high input
resistance and a low output resistance. However, the obtained values can be of same
interest for a transresistance amplifier, even if for the latter both resistances have to be as
low as possible.
Exercise n. 13
Design a C.E. amplifier as in Figure 11.67 such that the BJT works in its active region, the
overall voltage gain must be 𝐴𝑣 = −200, and the DC supply 𝑉𝐢𝐢 = 12𝑉.
Utilize an npn BJT with the following h-parameter set: β„Žπ‘“π‘’ = β„ŽπΉπΈ = 100, β„Žπ‘–π‘’ = 1.5π‘˜β„¦,but β„Žπ‘Ÿπ‘’
and β„Žπ‘œπ‘’ are negligible. Verify that the power collector 𝑃𝐢 = 𝑉𝐢𝐸𝑄 𝐼𝐢𝑄 is lower than 50mW.
20
Basi di elettronica
VCC
R1 I R1
RC
VB I B
R2
I R2
V
RE E
CE
Figure 11.67 “Open” configuration of the CE amplifier
Suggestions:
 Choice a Q-point in the middle of the BJT’s active region.
 𝑉𝑅𝐢 and 𝑉𝑅𝐸 voltage drops of 80% and 20% of
 𝐼𝐡𝑄 = 0.1𝐼𝑅1
𝑉𝐢𝐢
2
respectively.
ANSWER
We can apply the superposition theorem, because the BJT has to work in its active region so that
the amplifier behaves as a linear network. For this reason we can treat separately the DC and AC
behavior of the circuit, the equivalent models being schematized in Figure 11.67b (a) and (b)
respectively.
VCC
+
VR1
+
RC
IRC VRC
IR1 R1
-
+
ic
+
IR2
RE
IRE VRE
VR2
-
ib
R2
-
(a)
R1
R2
RC
hie
+
vce
hfe i b
-
(b)
Figure 11.67b: equivalent circuit for (a) DC and (b) AC conditions
The AC equivalent circuit shows a simplified h-parameter model of the BJT, because we know
that β„Žπ‘Ÿπ‘’ and β„Žπ‘œπ‘’ have practically zero values, so that we can write
𝑣𝑏𝑒 = β„Žπ‘–π‘’ 𝑖𝑏 (π‘’π‘ž. 𝐼, 𝐢𝐸𝑠)
οΏ½
𝑖𝑐 = β„Žπ‘“π‘’ 𝑖𝑏 (π‘’π‘ž. 𝐼𝐼, 𝐢𝐸𝑠)
Since 𝐴𝑣 = −200, taking into account the two aformentioned equations, we can impose
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Basi di elettronica
𝐴𝑣 ≝
!
β„Žπ‘“π‘’
𝑣𝑐𝑒 −𝑅𝐢 𝑖𝑐
𝑅𝐢
=
=−
𝐴𝑖 = −
𝑅𝐢 =
⏞ − 200
𝑣𝑏𝑒
β„Žπ‘–π‘’ 𝑖𝑏
β„Žπ‘–π‘’
β„Žπ‘–π‘’
As a consequence we can determine the value of the collector resistor
β„Žπ‘–π‘’
𝑅𝐢 =
𝐴 = 3π‘˜β„¦
β„Žπ‘“π‘’ 𝑣
In DC analysis we can easily determine some constant voltage values
!
𝑉𝐢𝐢
𝑉𝑅𝐢 =
⏞ 0.8
= 4.8𝑉
2
!
𝑉𝑅𝐸 =
⏞ 0.2
𝑉𝐢𝐢
= 1.2𝑉
2
and, to guarantee the Q-point to be in the middle of the BJT active region, we set
! 𝑉
𝐢𝐢
𝑉𝐢𝐸𝑄 =
⏞
= 6𝑉
2
KVL around the output loop yields
𝑉𝐢𝐢 = 𝑅𝐢 𝐼𝐢𝑄 + 𝑉𝐢𝐸𝑄 + 𝑅𝐸 𝐼𝐸𝑄 ≅ (𝑅𝐢 + 𝑅𝐸 )𝐼𝐢𝑄 + 𝑉𝐢𝐸𝑄
but
𝑉𝑅𝐢 = 𝑅𝐢 𝐼𝐢𝑄
𝑉𝑅𝐸 = 𝑅𝐸 𝐼𝐸𝑄 ≅ 𝑅𝐸 𝐼𝐢𝑄
therefore
𝑅𝐸 =
𝑉𝑅𝐸 𝑉𝑅𝐸
𝑉𝑅𝐸
≅
=
= 1.6π‘šπ΄
𝐼𝐸𝑄 𝐼𝐢𝑄 𝑉𝑅𝐢 ⁄𝑅𝐢
To determine the values of the input loop resistances, 𝑅1 ed 𝑅2 , we can approach the problem
with the Thevenin equivalent model, as in Figure 11.67c,
RTH VB
+
+
RE
+
VRE
VTH
-
-
Figure 11.67c: Thevenin equivalent model of the input loop
for which
𝑉𝑇𝐻 =
The BE-KVL gives us
𝑅2
𝑉
𝑅1 + 𝑅2 𝐢𝐢
𝑅𝑇𝐻 = 𝑅1 ||𝑅2
𝑉𝐡𝑄 = 𝑉𝑇𝐻 − 𝐼𝐡𝑄 𝑅𝑇𝐻 =
𝐼𝐢𝑄 𝑅1 𝑅2
𝑅2
𝑉𝐢𝐢 −
𝑅1 + 𝑅2
β„ŽπΉπΈ 𝑅1 + 𝑅2
22
Basi di elettronica
but
so that
𝑉𝐡𝑄 = 𝑉𝐡𝐸𝑄 + 𝑉𝑅𝐸 = 0.7 + 1.2 = 1.9𝑉
𝑅2 ≅
In addition
𝑅1 =
1.9
𝑅
10.1 1
𝑉𝐢𝐢 − 𝑉𝐡𝑄 𝑉𝐢𝐢 − �𝑉𝐡𝐸𝑄 + 𝑉𝑅𝐸 οΏ½
=
≅ 63π‘˜β„¦
𝐼𝑅1
𝐼𝑅1
Finally, the dissipate power at the collector
𝑃𝐢𝑄 = 𝑉𝐢𝐸𝑄 𝐼𝐢𝑄 = 9.6π‘šπ‘Š
much lower than the mentioned 50mW.
Summarizing
𝑅𝐢 = 3π‘˜β„¦; 𝑅𝐸 = 750Ω; 𝑅1 ≅ 63π‘˜β„¦; 𝑅2 ≅ 12π‘˜β„¦; 𝑃𝐢𝑄 = 9.6π‘šπ‘Š.
Exercise n. 14
′
′
′
′
, β„Žπ‘Ÿπ‘’
, β„Žπ‘“π‘’
, β„Žπ‘œπ‘’
of the scheme shown in Figure 11.68, as function
Determine the h’-parameters β„Žπ‘–π‘’
of the h-parameters of the only BJT, that is:
′
β„Žπ‘–π‘’
= π‘“οΏ½β„Žπ‘–π‘’ , β„Žπ‘Ÿπ‘’ , β„Žπ‘“π‘’ , β„Žπ‘œπ‘’ οΏ½
′
= π‘“οΏ½β„Žπ‘–π‘’ , β„Žπ‘Ÿπ‘’ , β„Žπ‘“π‘’ , β„Žπ‘œπ‘’ οΏ½
β„Žπ‘Ÿπ‘’
′
β„Žπ‘“π‘’
= π‘“οΏ½β„Žπ‘–π‘’ , β„Žπ‘Ÿπ‘’ , β„Žπ‘“π‘’ , β„Žπ‘œπ‘’ οΏ½
′
β„Žπ‘œπ‘’
= π‘“οΏ½β„Žπ‘–π‘’ , β„Žπ‘Ÿπ‘’ , β„Žπ‘“π‘’ , β„Žπ‘œπ‘’ οΏ½
RE
Figure 11.68 BJT with emitter resistor
ANSWER
A series resistor 𝑅𝐸 positively influence the stability of the Q-point since, thanks to its presence,
the DC component of the 𝐼𝐢 current becomes relatively independent from the variations of the
temperature and, consequently, from the variations of the parameters of the BJT, starting from its
β value. The resistor 𝑅𝐸 uses the current 𝐼𝐸 (very close to 𝐼𝐢 ), of the output loop, to feedback the
voltage 𝑉𝑅𝐸 at the input loop which reduces the base voltage 𝑉𝐡 , so opposing the increase of the
bias current.
Figure 11.68b represents the AC equivalent model of the BJT including the emitter resistor 𝑅𝐸 .
23
Basi di elettronica
ib
ic
hie
+
+
B
C
+ hrev ce
hfei b
v be
vb
E
-
+
1
v ce
hoe
-
+
i e=ib+ic
RE
ve
-
+
vc
-
-
Figure 11.68b AC equivalent model of the BJT with emitter resistor
This model can be conveniently modified with the one in Figure 11.68c
ib
+
ic
h’ie
B
+ h’revce
C
h’fei b
v be
1
+
v ce
h’oe
E
Figure 11.68c
′
′
′
′
with new hybrid parameters, β„Žπ‘–π‘’
, β„Žπ‘Ÿπ‘’
, β„Žπ‘“π‘’
, β„Žπ‘œπ‘’
, which include the emitter resistor 𝑅𝐸 . Such new
parameters are defined as
′
β„Žπ‘–π‘’
≝
𝑣𝑏
οΏ½
𝑖𝑏 𝑣𝑐=0
𝑖
′
; β„Žπ‘“π‘’
≝ 𝑖𝑐 οΏ½
𝑏
𝑣𝑐=0
′
; β„Žπ‘Ÿπ‘’
≝
𝑣𝑏
οΏ½
𝑣𝑐 𝑖𝑏=0
𝑖
′
; β„Žπ‘œπ‘’
≝ 𝑣𝑐 οΏ½
𝑐
𝑖𝑏=0
.
Considering that 𝑣𝑐𝑒 = 𝑣𝑐 − 𝑣𝑒 , we can write
𝑣𝑐 = (𝑣𝑐 − 𝑣𝑒 ) + 𝑣𝑒 = 𝑣𝑐𝑒 + 𝑣𝑒
′
′
In order to determine β„Žπ‘–π‘’
e β„Žπ‘“π‘’
we admit 𝑣𝑐 = 0, so that
𝑣𝑐𝑒 = −𝑣𝑒 = −𝑅𝐸 (𝑖𝑏 + 𝑖𝑐 )
which, together with the eq.II C.E. (Section 11.4.2) becomes
from which
𝑣𝑐𝑒 = −𝑅𝐸 𝑖𝑏 − 𝑅𝐸 οΏ½β„Žπ‘“π‘’ 𝑖𝑏 + β„Žπ‘œπ‘’ 𝑣𝑐𝑒 οΏ½
𝑣𝑐𝑒 = −
𝑅𝐸 𝑖𝑏 οΏ½1 + β„Žπ‘“π‘’ οΏ½
= −𝑣𝑒
1 + β„Žπ‘œπ‘’ 𝑅𝐸
′
We can usefully utilize the expression of 𝑣𝑐𝑒 to determine β„Žπ‘–π‘’
.
KVL around the input loop
𝑣𝑏 = β„Žπ‘–π‘’ 𝑖𝑏 + β„Žπ‘Ÿπ‘’ 𝑣𝑐𝑒 + 𝑣𝑒 = β„Žπ‘–π‘’ 𝑖𝑏 + β„Žπ‘Ÿπ‘’ 𝑣𝑐𝑒 − 𝑣𝑐𝑒
𝑣𝑏 = β„Žπ‘–π‘’ 𝑖𝑏 + (1 − β„Žπ‘Ÿπ‘’ )
24
𝑅𝐸 𝑖𝑏 οΏ½1 + β„Žπ‘“π‘’ οΏ½
1 + β„Žπ‘œπ‘’ 𝑅𝐸
′
β„Žπ‘–π‘’
Basi di elettronica
𝑣𝑏 (1 + β„Žπ‘œπ‘’ 𝑅𝐸 ) = οΏ½β„Žπ‘–π‘’ (1 + β„Žπ‘œπ‘’ 𝑅𝐸 ) + (1 − β„Žπ‘Ÿπ‘’ )𝑅𝐸 οΏ½1 + β„Žπ‘“π‘’ ��𝑖𝑏
as a consequence
′
β„Žπ‘–π‘’
≝
(1 − β„Žπ‘Ÿπ‘’ )οΏ½1 + β„Žπ‘“π‘’ οΏ½
𝑣𝑏
οΏ½
= β„Žπ‘–π‘’ +
𝑅𝐸
𝑖𝑏 𝑣𝑐=0
1 + β„Žπ‘œπ‘’ 𝑅𝐸
If we admit the approximations β„Žπ‘Ÿπ‘’ β‰ͺ 1 and β„Žπ‘“π‘’ ≫ 1, it becomes
β„Žπ‘“π‘’
𝑣𝑏
′
β„Žπ‘–π‘’
≝ οΏ½
≅ β„Žπ‘–π‘’ +
𝑅
𝑖𝑏 𝑣𝑐=0
1 + β„Žπ‘œπ‘’ 𝑅𝐸 𝐸
′
β„Žπ‘“π‘’
′
We can usefully utilize the expression of 𝑣𝑐𝑒 to determine β„Žπ‘“π‘’
too. In fact, together with the eq.II
C.E. (Section 11.4.2) becomes
𝑖𝑐 = β„Žπ‘“π‘’ 𝑖𝑏 − β„Žπ‘œπ‘’
therefore
𝑅𝐸 𝑖𝑏 οΏ½1 + β„Žπ‘“π‘’ οΏ½
οΏ½1 + β„Žπ‘“π‘’ �𝑅𝐸
= οΏ½β„Žπ‘“π‘’ − β„Žπ‘œπ‘’
�𝑖
1 + β„Žπ‘œπ‘’ 𝑅𝐸
1 + β„Žπ‘œπ‘’ 𝑅𝐸 𝑏
′
β„Žπ‘“π‘’
≝
β„Žπ‘“π‘’ − β„Žπ‘œπ‘’ 𝑅𝐸
𝑖𝑐
οΏ½
=
𝑖𝑏 𝑣𝑐=0
1 + β„Žπ‘œπ‘’ 𝑅𝐸
′
′
and β„Žπ‘œπ‘’
we have to admit 𝑖𝑏 = 0, so that the KVL around the
To determine the parameters β„Žπ‘Ÿπ‘’
input loop
𝑣𝑏 = β„Žπ‘–π‘’ 𝑖𝑏 + β„Žπ‘Ÿπ‘’ 𝑣𝑐𝑒 + 𝑣𝑒
which becomes
𝑣𝑏 = β„Žπ‘Ÿπ‘’ 𝑣𝑐𝑒 + 𝑣𝑒
Being 𝑖𝑏 = 0, the output current will be null, β„Žπ‘“π‘’ 𝑖𝑏 = 0, therefore
𝑖𝑐
𝑣𝑐𝑒 =
β„Žπ‘œπ‘’
𝑣
from which 𝑖𝑐 = 𝑅𝑒 and
𝐸
But 𝑣𝑐𝑒 = 𝑣𝑐 − 𝑣𝑒 therefore
𝑣𝑒 = 𝑅𝐸 𝑖𝑐
𝑣𝑐𝑒 =
𝑣𝑒
β„Žπ‘œπ‘’ 𝑅𝐸
𝑣𝑒
= 𝑣𝑐 − 𝑣𝑒
β„Žπ‘œπ‘’ 𝑅𝐸
25
Basi di elettronica
𝑣𝑐 = οΏ½1 +
𝑣𝑒 =
1
�𝑣
β„Žπ‘œπ‘’ 𝑅𝐸 𝑒
β„Žπ‘œπ‘’ 𝑅𝐸
𝑣
1 + β„Žπ‘œπ‘’ 𝑅𝐸 𝑐
′
β„Žπ‘Ÿπ‘’
′
To determine β„Žπ‘Ÿπ‘’
we can replace 𝑣𝑒 and 𝑣𝑐𝑒 values into the KVL equation around the input loop
𝑣𝑒
β„Žπ‘Ÿπ‘’
β„Žπ‘œπ‘’ 𝑅𝐸
β„Žπ‘œπ‘’ 𝑅𝐸
β„Žπ‘Ÿπ‘’ + β„Žπ‘œπ‘’ 𝑅𝐸
𝑣𝑏 = β„Žπ‘Ÿπ‘’
+ 𝑣𝑒 =
𝑣𝑐 +
𝑣𝑐 =
𝑣
β„Žπ‘œπ‘’ 𝑅𝐸
β„Žπ‘œπ‘’ 𝑅𝐸 1 + β„Žπ‘œπ‘’ 𝑅𝐸
1 + β„Žπ‘œπ‘’ 𝑅𝐸
1 + β„Žπ‘œπ‘’ 𝑅𝐸 𝑐
Therefore
′
β„Žπ‘Ÿπ‘’
≝
𝑣𝑏
β„Žπ‘Ÿπ‘’ + β„Žπ‘œπ‘’ 𝑅𝐸
οΏ½
=
𝑣𝑐 𝑖𝑏=0
1 + β„Žπ‘œπ‘’ 𝑅𝐸
′
β„Žπ‘œπ‘’
Utilizing the 𝑣𝑒 expression, we have
β„Žπ‘œπ‘’ 𝑅𝐸
𝑣𝑒 1 + β„Žπ‘œπ‘’ 𝑅𝐸 𝑣𝑐
β„Žπ‘œπ‘’
𝑖𝑐 =
=
=
𝑣
𝑅𝐸
𝑅𝐸
1 + β„Žπ‘œπ‘’ 𝑅𝐸 𝑐
therefore
′
β„Žπ‘œπ‘’
≡
𝑖𝑐
β„Žπ‘œπ‘’
οΏ½
=
𝑣𝑐 𝑖𝑏=0 1 + β„Žπ‘œπ‘’ 𝑅𝐸
Summarizing
′
β„Žπ‘–π‘’
= β„Žπ‘–π‘’ +
(1−β„Žπ‘Ÿπ‘’ )οΏ½1+β„Žπ‘“π‘’ οΏ½
so:
1+β„Žπ‘œπ‘’ 𝑅𝐸
′
𝑅𝐸 , β„Žπ‘“π‘’
=
[𝐻 ′ ] =
′
β„Žπ‘–π‘’
οΏ½ ′
β„Žπ‘“π‘’
β„Žπ‘“π‘’ −β„Žπ‘œπ‘’ 𝑅𝐸
1+β„Žπ‘œπ‘’ 𝑅𝐸
′
β„Žπ‘Ÿπ‘’
′ οΏ½
β„Žπ‘œπ‘’
′
, β„Žπ‘Ÿπ‘’
=
β„Žπ‘Ÿπ‘’ +β„Žπ‘œπ‘’ 𝑅𝐸
1+β„Žπ‘œπ‘’ 𝑅𝐸
β„Žπ‘“π‘’ 𝑅𝐸
βŽ‘β„Žπ‘–π‘’ +
1 + β„Žπ‘œπ‘’ 𝑅𝐸
= ⎒⎒
β„Ž − β„Žπ‘œπ‘’ 𝑅𝐸
⎒ 𝑓𝑒
⎣ 1 + β„Žπ‘œπ‘’ 𝑅𝐸
β„Ž
′
, β„Žπ‘œπ‘’
= 1+β„Žπ‘œπ‘’ 𝑅
π‘œπ‘’ 𝐸
β„Žπ‘Ÿπ‘’ + β„Žπ‘œπ‘’ 𝑅𝐸
⎀
1 + β„Žπ‘œπ‘’ 𝑅𝐸 βŽ₯
βŽ₯
β„Žπ‘œπ‘’
βŽ₯
1 + β„Žπ‘œπ‘’ 𝑅𝐸 ⎦
Exercise n. 15
Consider a four-resistor emitter feedback biased C.E. amplifier as represented in Figure 11.69.
Assume a DC voltage source 𝑉𝐢𝐢 = 10𝑉, an AC voltage source with internal resistance 𝑅𝑠 =
500Ω, and a load resistor 𝑅𝐿 = 10π‘˜β„¦.. Assume a Q-point for which 𝐼𝐡𝑄 = 10πœ‡π΄, 𝐼𝐢𝑄 = 1π‘šπ΄,
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Basi di elettronica
𝑉
𝑉
𝑉𝐢𝐸𝑄 = 2𝐢𝐢 , 𝑉𝑅𝐢𝑄 = 0.8 2𝐢𝐢 . The voltage divider bias is such that 𝐼𝑅1 ≅ 10𝐼𝐡𝑄 . The BJT type at
the Q-point presents the following set of h-parameters: β„Žπ‘–π‘’ = 1.5π‘˜β„¦ , β„Žπ‘Ÿπ‘’ = 10−3 , β„Žπ‘“π‘’ = 200,
β„Žπ‘œπ‘’ = 10−3 Ω−1.
VCC
R1
is
CB1
+
CB2
+
Rs
vs
ICQ+ic
RC
IBQ+ib
vB
R2
RE
il v
l
RL
CE
IEQ
+
ie
Figure 11.69 Four-resistor emitter feedback biased C.E. amplifier
Determine for the values of each resistors 𝑅𝐢 , 𝑅𝐸 , 𝑅1 , 𝑅2 in DC conditions.
Determine the values of BJT’s and overall input/output resistances and gains in AC conditions.
ANSWER
Because of the presence of the blocking capacitors, the DC equivalent model results as
represented in Figure 11.69b.
VCC
R1 RC
IBQ
+
VBQ
+
VBEQ
R2
-
ICQ
+
VCEQ
-
RE I
EQ
Figure 11.69b DC equivalent model of the four-resistor emitter feedback biased C.E. amplifier
KVL around the output loop yields
𝑉𝐢𝐢 = 𝑅𝐢 𝐼𝐢 + 𝑉𝐢𝐸 + 𝑅𝐸 𝐼𝐸 ≅ (𝑅𝐢 + 𝑅𝐸 )𝐼𝐢 + 𝑉𝐢𝐸
with the reasonable hypothesis that 𝐼𝐸 ≅ 𝐼𝐢 .
The resistance values around the output loop will be then
𝑉𝐢𝐢
𝑉𝑅𝐢 0.8 2
4
𝑅𝐢 =
=
=
= 4π‘˜β„¦
𝐼𝐢𝑄
𝐼𝐢𝑄
0.001
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Basi di elettronica
𝑉𝐢𝐢
𝑉𝑅𝐸 0.2 2
1
𝑅𝐸 =
≅
=
= 1π‘˜β„¦
𝐼𝐸𝑄
𝐼𝐢𝑄
0.001
Named 𝑉𝐡 the base voltage, the resistance values around the input loop will be
𝑉𝐡 𝑉𝐡𝐸𝑄 + 𝑉𝑅𝐸
1.7
𝑅2 =
=
=
≅ 18.9π‘˜β„¦
𝐼𝑅2
𝐼𝑅1 − 𝐼𝐡𝑄
90 ∗ 10−6
𝑉𝐢𝐢 − 𝑉𝐡 𝑉𝐢𝐢 − �𝑉𝐡𝐸𝑄 + 𝑉𝑅𝐸 οΏ½ 10 − (0.7 + 1)
=
=
= 83π‘˜β„¦
𝐼𝑅1
𝐼𝑅1
10𝐼𝐡𝑄
To determine the overall input/output resistances and gains we have to draw the AC model as in
Figure 11.69c.
ic
il
is
ib
hie
Rs
B
C
+
+
+
R1 R2
hfei b
RC RL
1
vs
hoe
vl
hrevce
𝑅1 =
E
Ri
RoBJT
RiBJT
Ro
Figure 11.69c AC equivalent model of the four-resistor emitter feedback biased C.E. amplifier
For convenience, resistors were combined as 𝑅𝐢𝐿 = 𝑅𝐢 ||𝑅𝐿 ≅ 2.9π‘˜β„¦ and 𝑅12 = 𝑅1 ||𝑅2 ≅
15.4π‘˜β„¦.
It is useful to recall, and later utilize, the hybrid parameter equations of the BJT in C.E.
configurations
𝑣𝑏𝑒 = β„Žπ‘–π‘’ 𝑖𝑏 + β„Žπ‘Ÿπ‘’ 𝑣𝑐𝑒 (π‘’π‘ž. 𝐼 𝐢𝐸)
οΏ½
𝑖𝑐 = β„Žπ‘“π‘’ 𝑖𝑏 + β„Žπ‘œπ‘’ 𝑣𝑐𝑒 (π‘’π‘ž. 𝐼𝐼 𝐢𝐸)
𝑅𝑖𝐡𝐽𝑇 ≝
𝑣𝑏𝑒
𝑖𝑏
𝑅𝑖
;
𝑣
The output voltage 𝑣𝑐𝑒 = −𝑅𝐢𝐿 𝑖𝑐 can be replaced into the eq. II CE to obtain − 𝑅𝑐𝑒 = β„Žπ‘“π‘’ 𝑖𝑏 +
β„Žπ‘œπ‘’ 𝑣𝑐𝑒 , from which we can extract 𝑣𝑐𝑒 and insert it into the eq. I CE yielding
β„Žπ‘Ÿπ‘’ β„Žπ‘“π‘’
𝑅𝑖𝐡𝐽𝑇 = β„Žπ‘–π‘’ −
𝑅
1 + β„Žπ‘œπ‘’ 𝑅𝐢𝐿 𝐢𝐿
𝐢𝐿
Finally
𝑅𝑖 = 𝑅12 ||𝑅𝑖𝐡𝐽𝑇
Numerically 𝑅𝑖𝐡𝐽𝑇 ≅ 1350Ω, 𝑅𝑖 ≅ 1.24π‘˜β„¦.
𝐴𝑖
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𝑖
𝐴𝑖 ≝ 𝑖𝑐;
𝑠
The output voltage 𝑣𝑐𝑒
β„Žπ‘œπ‘’ 𝑅𝐢𝐿 𝑖𝑐 , so that
𝑖𝑐 𝑖𝑏
= 𝐴𝑖𝐡𝐽𝑇 𝛼𝑖𝑖
𝑖𝑏 𝑖𝑠
= −𝑅𝐢𝐿 𝑖𝑐 can be replaced into the eq. II CE to obtain 𝑖𝑐 = β„Žπ‘“π‘’ 𝑖𝑏 −
𝐴𝑖 =
β„Žπ‘“π‘’
𝑖𝑐
=
𝑖𝑏 1 + β„Žπ‘œ 𝑅𝐢𝐿
The same result can be obtained from the current divider expression around the output loop
𝑖𝑐 =
1
β„Žπ‘œπ‘’
1
+𝑅𝐢𝐿
β„Žπ‘œπ‘’
𝐴𝑖𝐡𝐽𝑇 =
β„Žπ‘“π‘’ 𝑖𝑏 .
The expression of the current divider around the input loop is
𝑅12
𝛼𝑖𝑖 =
≅ 0.92
𝑅12 + 𝑅𝑖𝐡𝐽𝑇
therefore
𝐴𝑖 =
𝐴𝑣 ≝
𝑣𝑐𝑒
𝑣𝑠
β„Žπ‘“π‘’
𝑅12
≅ 48
1 + β„Žπ‘œ 𝑅𝐢𝐿 𝑅12 + 𝑅𝑖𝐡𝐽𝑇
𝐴𝑣
;
𝐴𝑣 =
1
𝑣𝑐𝑒 𝑣𝑏𝑒
= 𝐴𝑣𝐡𝐽𝑇 𝛼𝑣
𝑣𝑏𝑒 𝑣𝑠
From the eq. I CE we can write 𝑖𝑏 = β„Ž (𝑣𝑏𝑒 − β„Žπ‘Ÿπ‘’ 𝑣𝑐𝑒 ) which can be replaced into the eq. II CE
obtaining 𝑖𝑐 =
β„Žπ‘“π‘’
β„Žπ‘–π‘’
𝑖𝑒
𝑣
(𝑣𝑏𝑒 − β„Žπ‘Ÿπ‘’ 𝑣𝑐𝑒 ) + β„Žπ‘œπ‘’ 𝑣𝑐𝑒 . But 𝑖𝑐 = − 𝑐𝑒 , so that 𝑣𝑐𝑒 οΏ½β„Žπ‘–π‘’ + β„Žπ‘–π‘’ β„Žπ‘œπ‘’ 𝑅𝐢𝐿 −
𝑅
β„Žπ‘“π‘’β„Žπ‘Ÿπ‘’π‘…πΆπΏ=−β„Žπ‘“π‘’π‘…πΆπΏπ‘£π‘π‘’. Therefore
𝐴𝑣𝐡𝐽𝑇 = −
𝐢𝐿
β„Žπ‘“π‘’
β„Žπ‘–π‘’ + οΏ½β„Žπ‘–π‘’ β„Žπ‘œπ‘’ − β„Žπ‘“π‘’ β„Žπ‘Ÿπ‘’ �𝑅𝐢𝐿
The voltage divider expression around the input loop is 𝑣𝑏𝑒 = 𝑅
therefore
𝛼𝑣 =
𝐴𝑣 = 𝐴𝑣𝐡𝐽𝑇 𝛼𝑣 == −
𝑅12 ||𝑅𝑖𝐡𝐽𝑇
12 ||𝑅𝑖𝐡𝐽𝑇 +𝑅𝑆
𝑅12 ||𝑅𝑖𝐡𝐽𝑇
≅ −0.71
𝑅12 ||𝑅𝑖𝐡𝐽𝑇 + 𝑅𝑆
β„Žπ‘“π‘’
𝑣𝑠 so that
𝑅12 ||𝑅𝑖𝐡𝐽𝑇
β„Žπ‘–π‘’ + οΏ½β„Žπ‘–π‘’ β„Žπ‘œπ‘’ − β„Žπ‘“π‘’ β„Žπ‘Ÿπ‘’ �𝑅𝐢𝐿 𝑅12 ||𝑅𝑖𝐡𝐽𝑇 + 𝑅𝑆
Numerically 𝐴𝑣𝐡𝐽𝑇 ≅ −110, 𝐴𝑣 ≅ −78.
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Basi di elettronica
𝑅0 ≝
𝑣𝑐𝑒
𝑖𝑙
π‘…π‘œ
;
!
We have to force 𝑣𝑠 =
⏞ 0 , so that the KVL around the input loop yields β„Žπ‘Ÿπ‘’ 𝑣𝑐𝑒 = −(β„Žπ‘–π‘’ +
𝑅𝑆||𝑅12𝑖𝑏, from which we can extract 𝑖𝑏 which can be replaced into the eq. II CE, obtaining
β„Žπ‘“π‘’ β„Žπ‘Ÿπ‘’
𝑖𝑐 = − β„Ž +𝑅
𝑣𝑐𝑒 + β„Žπ‘œπ‘’ 𝑣𝑐𝑒 , therefore
||𝑅
𝑖𝑒
𝑆
12
π‘…π‘œπ΅π½π‘‡ =
Finally
1
β„Žπ‘“π‘’ β„Žπ‘Ÿπ‘’
β„Žπ‘œπ‘’ −
β„Žπ‘–π‘’ + 𝑅𝑆 ||𝑅12
π‘…π‘œ = π‘…π‘œπ΅π½π‘‡ ||𝑅𝐢𝐿
Please, pay attention to the fact that here we considered 𝑅𝐿 included in the output resistance.
Numerically π‘…π‘œπ΅π½π‘‡ ≅ 1110Ω, π‘…π‘œ ≅ 800Ω.
Summarizing
𝑅𝐢 = 4π‘˜β„¦, 𝑅𝐸 = 1π‘˜β„¦, 𝑅1 = 83π‘˜β„¦, 𝑅2 ≅ 18.9π‘˜β„¦..
𝑅𝑖𝐡𝐽𝑇 ≅ 1350Ω, 𝑅𝑖 ≅ 1.24π‘˜β„¦.
𝐴𝑖𝐡𝐽𝑇 ≅ 52, 𝐴𝑖 ≅ 47.7.
π‘…π‘œπ΅π½π‘‡ ≅ 1110Ω, π‘…π‘œ ≅ 800Ω.
𝐴𝑣𝐡𝐽𝑇 ≅ −110, 𝐴𝑣 ≅ −0.71.
Exercise n. 16
The C.B. configuration as represented in Figure 11.70 has BJT h-parameters equal to β„Žπ‘–π‘ =
20Ω ; β„Žπ‘Ÿπ‘ = 30 ∗ 10−3 ; β„Žπ‘“π‘ = −0.98 ; β„Žπ‘œπ‘ = 50 ∗ 10−6 𝑆 , and resistances 𝑅1 = 20π‘˜β„¦ ; 𝑅2 =
20π‘˜β„¦; 𝑅𝐢 = 10π‘˜β„¦; 𝑅𝐸 = 7π‘˜β„¦;𝑅𝑠 = 1π‘˜β„¦; 𝑅𝐿 = 50π‘˜β„¦..
VCC
RC
R1
CC
C
CB
B
R2
E
CE
Rs
RL
+
RE
vs
Figure 11.70 C.B. configuration
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Basi di elettronica
Determine within the amplifier’s bandwidth,
 The BJT’s and overall current gains, 𝐴𝑖𝐡𝐽𝑇 and 𝐴𝑖
 The BJT’s and overall input resistances, 𝑅𝑖𝐡𝐽𝑇 and 𝑅𝑖
 The BJT’s and overall voltage gains, 𝐴𝑣𝐡𝐽𝑇 and 𝐴𝑣
 The BJT’s and overall output resistances, π‘…π‘œπ΅π½π‘‡ and π‘…π‘œ
ANSWER
Figure 11.70b represents the AC equivalent circuit of the C.B. configuration.
Ri
Ri BJT
is
E
RS
+
vs
+ RE
Ro BJT
hib
ie
Ro
io
C
+ hrbvcb
v eb
B
hfbi b
1
hob
ic
RC
RL
+
vo
Figure 11.70b AC equivalent circuit of the CB configuration
We will utilize the BJT h-parameters for its C.B. configuration as follows
𝑣𝑒𝑏 = β„Žπ‘–π‘ 𝑖𝑒 + β„Žπ‘Ÿπ‘ 𝑣𝑐𝑏 (π‘’π‘ž. 𝐼 𝐢𝐡)
οΏ½
𝑖𝑐 = β„Žπ‘“π‘ 𝑖𝑒 + β„Žπ‘œπ‘ 𝑣𝑐𝑏 (π‘’π‘ž. 𝐼𝐼 𝐢𝐡)
and the equivalent resistance 𝑅𝐢𝐿 = 𝑅𝐢 ||𝑅𝐿 .
𝑅𝑖
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Basi di elettronica
𝑅𝑖𝐡𝐽𝑇 ≝
𝑣𝑒𝑏
𝑖𝑒
,
𝑣𝑒𝑏 = β„Žπ‘–π‘ 𝑖𝑒 + β„Žπ‘Ÿπ‘ 𝑣𝑐𝑏
1
1
𝑣𝑐𝑏 = −β„Žπ‘“π‘ 𝑖𝑒 οΏ½
||𝑅𝐢𝐿 οΏ½ = −β„Žπ‘“π‘ 𝑖𝑒
1
β„Žπ‘œπ‘
+ 𝑅𝐢𝐿
β„Žπ‘œπ‘
We can replace the expression of 𝑣𝑐𝑏 into the one of 𝑣𝑒𝑏
𝑣𝑒𝑏 = β„Žπ‘–π‘ 𝑖𝑒 − β„Žπ‘Ÿπ‘
therefore
𝑅𝑖𝐡𝐽𝑇 =
But the overall input resistance is
β„Žπ‘“π‘
1
β„Žπ‘œπ‘ + 𝑅
𝐢𝐿
β„Žπ‘Ÿπ‘ β„Žπ‘“π‘
𝑣𝑒𝑏
= β„Žπ‘–π‘ −
1
𝑖𝑒
β„Žπ‘œπ‘ + 𝑅
𝐢𝐿
𝑅𝑖 = 𝑅𝐸 ||𝑅𝑖𝐡𝐽𝑇
so
𝑅𝑖 = 𝑅𝐸 || οΏ½β„Žπ‘–π‘ −
β„Žπ‘Ÿπ‘ β„Žπ‘“π‘
οΏ½
1
β„Žπ‘œπ‘ + 𝑅
𝐢𝐿
Numerically 𝑅𝑖𝐡𝐽𝑇 ≅ 22Ω; 𝑅𝑖 ≅ 22Ω
(It is evident that the emitter resistor does not influence the overall input resistance value).
𝐴𝑣 ≝
π‘£π‘œ
𝑣𝑠
𝐴𝑣
;
This equation can be rewritten as
𝐴𝑣 =
π‘£π‘œ
𝑣𝑐𝑏 𝑣𝑐𝑏 𝑣𝑒𝑏
=
=
= 𝐴𝑣𝐡𝐽𝑇 𝛼𝑣
𝑣𝑒𝑏 𝑣𝑒𝑏 𝑣𝑒𝑏 𝑣𝑠
𝐴𝑣𝐡𝐽𝑇 can be found looking for 𝑣𝑐𝑏 and 𝑣𝑒𝑏 value
1
𝑣𝑐𝑏 = −β„Žπ‘“π‘ 𝑖𝑒 οΏ½
||𝑅 οΏ½
β„Žπ‘œπ‘ 𝐢𝐿
therefore
𝑣𝑒𝑏 = β„Žπ‘–π‘ 𝑖𝑒 + β„Žπ‘Ÿπ‘ 𝑣𝑐𝑏 ⇒ 𝑖𝑒 =
𝑣𝑐𝑏 = −
𝑣𝑒𝑏 −β„Žπ‘Ÿπ‘ 𝑣𝑐𝑏
β„Žπ‘–π‘
β„Žπ‘“π‘
1
(𝑣𝑒𝑏 − β„Žπ‘Ÿπ‘ 𝑣𝑐𝑏 ) οΏ½
||𝑅 οΏ½
β„Žπ‘–π‘
β„Žπ‘œπ‘ 𝐢𝐿
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Basi di elettronica
𝑣𝑐𝑏 οΏ½1 −
from which
𝐴𝑣𝐡𝐽𝑇
𝑣𝑐𝑏
=
=
𝑣𝑒𝑏
𝐴𝑣𝐡𝐽𝑇 = −
β„Žπ‘“π‘
β„Žπ‘“π‘
1
1
β„Žπ‘Ÿπ‘ οΏ½
||𝑅𝐢𝐿 οΏ½οΏ½ = −
𝑣𝑒𝑏 οΏ½
||𝑅 οΏ½
β„Žπ‘–π‘
β„Žπ‘œπ‘
β„Žπ‘–π‘
β„Žπ‘œπ‘ 𝐢𝐿
β„Žπ‘“π‘ 1
β„Žπ‘“π‘
𝑅𝐢𝐿
οΏ½
||𝑅𝐢𝐿 οΏ½
οΏ½
οΏ½
−
β„Žπ‘–π‘ β„Žπ‘œπ‘
β„Žπ‘–π‘ 1 + β„Žπ‘œπ‘ 𝑅𝐢𝐿
=
β„Žπ‘“π‘
β„Žπ‘“π‘
1
𝑅𝐢𝐿
1−
β„Žπ‘Ÿπ‘ οΏ½
||𝑅𝐢𝐿 οΏ½ 1 −
β„Ž οΏ½
οΏ½
β„Žπ‘–π‘
β„Žπ‘–π‘ π‘Ÿπ‘ 1 + β„Žπ‘œπ‘ 𝑅𝐢𝐿
β„Žπ‘œπ‘
−
β„Žπ‘“π‘
𝑅𝐢𝐿
β„Žπ‘–π‘ (1 + β„Žπ‘œπ‘ 𝑅𝐢𝐿 )
οΏ½
οΏ½
β„Žπ‘–π‘ 1 + β„Žπ‘œπ‘ 𝑅𝐢𝐿 β„Žπ‘–π‘ (1 + β„Žπ‘œπ‘ 𝑅𝐢𝐿 ) − β„Žπ‘Ÿπ‘ β„Žπ‘“π‘ 𝑅𝐢𝐿
𝐴𝑣𝐡𝐽𝑇 =
where βˆ†β„Ž = β„Žπ‘–π‘ β„Žπ‘œπ‘ − β„Žπ‘Ÿπ‘ β„Žπ‘“π‘ .
β„Žπ‘“π‘ 𝑅𝐢𝐿
β„Žπ‘–π‘ + οΏ½β„Žπ‘–π‘ β„Žπ‘œπ‘ − β„Žπ‘Ÿπ‘ β„Žπ‘“π‘ �𝑅𝐢𝐿
=
β„Žπ‘“π‘ 𝑅𝐢𝐿
β„Žπ‘–π‘ + βˆ†β„Žπ‘…πΆπΏ
𝛼𝑣 can be found looking at the voltage divider around the input loop
𝑅𝐸 ||𝑅𝑖𝐡𝐽𝑇
𝑣
𝑣𝑒𝑏 =
𝑅𝑆 + 𝑅𝐸 ||𝑅𝑖𝐡𝐽𝑇 𝑠
therefore
The overall voltage gain is then
𝛼𝑣 =
𝐴𝑣 = 𝐴𝑣𝐡𝐽𝑇 𝛼𝑣 =
Numerically 𝐴𝑣𝐡𝐽𝑇 ≅ −362; 𝐴𝑣 ≅ −7.9
𝑅𝐸 ||𝑅𝑖𝐡𝐽𝑇
𝑅𝑆 + 𝑅𝐸 ||𝑅𝑖𝐡𝐽𝑇
β„Žπ‘“π‘ 𝑅𝐢𝐿
𝑅𝐸 ||𝑅𝑖𝐡𝐽𝑇
β„Žπ‘–π‘ + βˆ†β„Žπ‘…πΆπΏ 𝑅𝑆 + 𝑅𝐸 ||𝑅𝑖𝐡𝐽𝑇
If β„Žπ‘Ÿπ‘ and β„Žπ‘œπ‘ could be negligible then 𝐴𝑣𝐡𝐽𝑇 ≅
β„Žπ‘“π‘
β„Žπ‘–π‘
𝑅𝐢𝐿 .
π‘…π‘œ
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Basi di elettronica
π‘…π‘œ = 𝑅𝐢𝐿 ||π‘…π‘œπ΅π½π‘‡ ;
!
As usual, the request is to kill the independent sources, so 𝑣𝑠 =
⏞ 0. But even if no independent
source is in the input loop, the input current 𝑖𝑒 ≠ 0, thanks to the dependent voltage source β„Žπ‘Ÿπ‘ 𝑣𝑐𝑏 .
As a consequence a feed-forward effect will exits (see Section 11.3.2.2) by means of the dependent
current source β„Žπ‘“π‘ 𝑖𝑒 . So, in order to determine π‘…π‘œπ΅π½π‘‡ we have to take into account what in in
1
parallel with β„Ž .
π‘œπ‘
π‘…π‘œπ΅π½π‘‡ =
𝑣𝑐𝑏
𝑖𝑐
KVL around the input loop yields β„Žπ‘Ÿπ‘ 𝑣𝑐𝑏 = −𝑖𝑒 (β„Žπ‘–π‘ + 𝑅𝑆 ||𝑅𝐸 ) and from the eq. II CB 𝑖𝑐 =
β„Žπ‘“π‘ 𝑖𝑒 + β„Žπ‘œπ‘ 𝑣𝑐𝑏 , so as a consequence
β„Žπ‘Ÿπ‘
𝑖𝑐 = −β„Žπ‘“π‘
𝑣 + β„Žπ‘œπ‘ 𝑣𝑐𝑏
β„Žπ‘–π‘ + 𝑅𝑆 ||𝑅𝐸 𝑐𝑏
therefore
π‘…π‘œπ΅π½π‘‡ =
The overall output resistance value
𝑣𝑐𝑏
=
𝑖𝑐
π‘…π‘œ = 𝑅𝐢𝐿 ||
Numerically π‘…π‘œπ΅π½π‘‡ ≅ 1.2𝑀Ω; π‘…π‘œ ≅ 8276Ω.
1
β„Žπ‘“π‘ β„Žπ‘Ÿπ‘
β„Žπ‘œπ‘ −
β„Žπ‘–π‘ + 𝑅𝑆 ||𝑅𝐸
1
β„Žπ‘“π‘ β„Žπ‘Ÿπ‘
β„Žπ‘œπ‘ −
β„Žπ‘–π‘ + 𝑅𝑆 ||𝑅𝐸
1
When β„Žπ‘Ÿπ‘ can be considered as negligible then π‘…π‘œπ΅π½π‘‡ ≅ β„Ž .
π‘œπ‘
𝑖
𝐴𝑖
𝐴𝑖 ≝ π‘–π‘œ ;
𝑠
The current gain can be rewritten as
𝐴𝑖 =
π‘–π‘œ 𝑖𝑐 𝑖𝑒
𝑖𝑐 𝑖𝑒 𝑖𝑠
= π›Όπ‘–π‘œ 𝐴𝑖𝐡𝐽𝑇 𝛼𝑖𝑖
To determine 𝐴𝑖𝐡𝐽𝑇 we can find the relationship between 𝑖𝑐 and 𝑖𝑒 . To this aim it is useful the
current divider equation around the output loop
1
𝐺𝐢𝐿
β„Žπ‘œπ‘
𝑖𝑐 =
β„Žπ‘“π‘ 𝑖𝑒 =
β„Žπ‘“π‘ 𝑖𝑒
1
𝐺𝐢𝐿 + β„Žπ‘œπ‘
+ 𝑅𝐢𝐿
β„Žπ‘œπ‘
34
Basi di elettronica
with 𝐺π‘₯ the conductance value of the π‘₯ resistance, therefore
β„Žπ‘“π‘
𝐴𝑖𝐡𝐽𝑇 =
1 + β„Žπ‘œπ‘ 𝑅𝐢𝐿
To determine 𝛼𝑖𝑖 we can consider the current divider equation around the input loop
𝐺𝑖𝐡𝐽𝑇
𝑅𝐸
𝑖𝑠 =
𝑖
𝑖𝑒 =
𝐺𝑖𝐡𝐽𝑇 + 𝐺𝐸
𝑅𝐸 + 𝑅𝑖𝐡𝐽𝑇 𝑠
therefore
𝛼𝑖𝑖 =
𝑅𝐸
𝑅𝐸 + 𝑅𝑖𝐡𝐽𝑇
To determine π›Όπ‘–π‘œ , let us consider the output loop, so
𝑅𝐢
π‘–π‘œ = −
𝑖
𝑅𝐢 + 𝑅𝐿 𝑐
therefore
The overall current gain is then
𝐴𝑖 = −
π›Όπ‘–π‘œ = −
𝑅𝐢
𝑅𝐢 + 𝑅𝐿
β„Žπ‘“π‘
𝑅𝐸
𝑅𝐢
𝑅𝐢 + 𝑅𝐿 1 + β„Žπ‘œπ‘ 𝑅𝐢𝐿 𝑅𝐸 + 𝑅𝑖𝐡𝐽𝑇
Numerically 𝐴𝑖𝐡𝐽𝑇 ≅ −0.976; 𝐴𝑖 ≅ 0.162.
When we can assume β„Žπ‘œπ‘ as negligible then 𝐴𝑖BJT ≅ β„Žπ‘“π‘ .
Summarizing
𝑅𝑖𝐡𝐽𝑇 ≅ 22Ω; 𝑅𝑖 ≅ 22Ω
π‘…π‘œπ΅π½π‘‡ ≅ 1.2𝑀Ω; π‘…π‘œ ≅ 8276Ω
𝛼𝑣 ≅ 0.0219; 𝛼𝑖𝑖 ≅ 0.997; π›Όπ‘–π‘œ ≅ −0.1667;
𝐴𝑣𝐡𝐽𝑇 ≅ −362; 𝐴𝑣 ≅ −7.9
𝐴𝑖𝐡𝐽𝑇 ≅ −0.976; 𝐴𝑖 ≅ 0.162
Exercise n. 17
With respect to the previous exercise, with the same parameter values, determine the same gains
and resistances but considering the absence of the base capacitor 𝐢𝐡 , as represented in Figure
11.71.
35
Basi di elettronica
VCC
RC
R1
CC
C
B
E
R2
CE
Rs
RL
+
RE
vs
Figure 11.71 Configuration with the base terminal no longer grounded
ANSWER
The AC model of the current circuit s showed in Figure 11.71b.
is
ie
ic
hib
E
++
RS
C
+ hrbvcb
hfbi e
v eb
RE
ve
B
-
+
+
ie
vs
+
1
v cb
hob
RC
+
RL
v c=v o
ve
R12
-
Ri
io
-
-
RiBJT
RoBJT
Ro
Figure 11.71b AC model of the configuration with the base terminal no longer grounded
For convenience, resistors can be combined as 𝑅𝐢𝐿 = 𝑅𝐢 ||𝑅𝐿 and 𝑅12 = 𝑅1 ||𝑅2.
𝑖
𝐴𝑖 ≝ π‘–π‘œ ;
𝑠
𝐴𝑖
The overall current gain can be written as
π‘–π‘œ 𝑖𝑐 𝑖𝑒
= π›Όπ‘–π‘œ 𝐴𝑖𝐡𝐽𝑇 𝛼𝑖𝑖
𝑖𝑐 𝑖𝑒 𝑖𝑠
To determine 𝐴𝑖𝐡𝐽𝑇 it is useful to replace the dependent output current source with its Thevenin
equivalent, so that we can use the KVL expression around the output loop. We replace then the
β„Ž
current source β„Žπ‘“π‘ 𝑖𝑒 and its parallel resistance 1οΏ½β„Ž with an equivalent voltage source β„Žπ‘“π‘ 𝑖𝑒 with
π‘œπ‘
𝑖𝑏
1
its series resistance οΏ½β„Ž , as in Figure 11.71c, to obtain
𝐴𝑖 =
π‘œπ‘
36
Basi di elettronica
β„Žπ‘“π‘
1
𝑖𝑒 = 𝑅12 (𝑖𝑒 + 𝑖𝑐 ) + οΏ½
+ 𝑅𝐢𝐿 οΏ½ 𝑖𝑐
β„Žπ‘–π‘
β„Žπ‘œπ‘
The latter is an expression of the variables 𝑖𝑒 and 𝑖𝑐 which furnishes
β„Žπ‘“π‘ − β„Žπ‘œπ‘ 𝑅12
𝐴𝑖𝐡𝐽𝑇 =
1 + β„Žπ‘œπ‘ (𝑅12 + 𝑅𝐢𝐿 )
β„Ž
Please, pay close attention to the fact that the previous exercise n.16 gave 𝐴𝑖𝐡𝐽𝑇 = 1+β„Ž 𝑓𝑏𝑅 . Now
π‘œπ‘ 𝐢𝐿
we have the added terms here highlighted in red. They are subtracted at the numerator, but β„Žπ‘“π‘ is
negative itself, so the 𝐴𝑖𝐡𝐽𝑇 becomes greater in its absolute value; On the other end the
denominator becomes now greater, which means a reduction of the absolute value of 𝐴𝑖𝐡𝐽𝑇 . The
two aspects can be opposing.
Taking into account the two attenuation values π›Όπ‘–π‘œ and 𝛼𝑖𝑖 the overall current gain will be
𝑅𝐢
𝑅𝐸
𝐴𝑖𝐡𝐽𝑇
𝐴𝑖 = −
𝑅𝐢 + 𝑅𝐿
𝑅𝐸 + 𝑅𝑖𝐡𝐽𝑇
Numerically 𝐴𝑖𝐡𝐽𝑇 ≅ −0.976; 𝛼𝑖𝑖 ≅ 0.9639; π›Όπ‘–π‘œ ≅ −0.1667; 𝐴𝑖 ≅ 0.157.
is
ie
hib
E
++
RS
C
+ hrbvcb
hfbi e
hob
v eb
RE
ve
ie
io
+
+
v cb
-
+
+
Ri
+
B
-
vs
-
ic
1
hob
RC
RL
v c=v o
ve
R12
-
-
RiBJT
RoBJT
Ro
Figure 11.71c AC model with the Norton output loop replace with its Thevenin equivalent
Observation
The resistor 𝑅12 , by means of the current 𝑖𝑒 which flows through it, furnishes a voltage
𝑣𝑅12 at the input loop. This voltage surely outnumbers the one of the dependent voltage
source β„Žπ‘Ÿπ‘ 𝑣𝑐𝑏 , given the common values of β„Žπ‘Ÿπ‘ and 𝑖𝑒 . For this reason, in this and in
!
similar cases, we can impose β„Žπ‘Ÿπ‘ =
⏞ 0 without making significant percentage errors. So, we
will deal with the new equivalent AC network of Figure 11.71d.
37
Basi di elettronica
is
ie
ic
io
hib
E
C
++
RS
hfbi e
v eb
RE
ve
B
-
+
ie
v cb
hob
RC
+
RL
v c=v o
ve
R12
-
Ri
1
+
vs
+
-
-
RiBJT
RoBJT
Ro
Figure 11.71d AC equivalent model having hrb=0
From the eq. II CB, that is 𝑖𝑐 = β„Žπ‘“π‘ 𝑖𝑒 + β„Žπ‘œπ‘ 𝑣𝑐𝑏 , we can write
𝑖𝑐 − β„Žπ‘“π‘ 𝑖𝑒
𝑣𝑐𝑏 =
β„Žπ‘œπ‘
𝑅𝑖
which, taking into account the found expression of 𝐴𝑖𝐡𝐽𝑇 , becomes
𝑣𝑐𝑏 =
𝐴𝑖𝐡𝐽𝑇 𝑖𝑒 − β„Žπ‘“π‘ 𝑖𝑒 �𝐴𝑖𝐡𝐽𝑇 − β„Žπ‘“π‘’ �𝑖𝑒
=
β„Žπ‘œπ‘
β„Žπ‘œπ‘
We can utilize this value of 𝑣𝑐𝑏 in the KVL around the input loop
𝑣𝑒 = β„Žπ‘–π‘ 𝑖𝑒 + β„Žπ‘Ÿπ‘ 𝑣𝑐𝑏 + 𝑅12 (𝑖𝑒 + 𝑖𝑐 )
obtaining
𝑣𝑒 = β„Žπ‘–π‘ 𝑖𝑒 + β„Žπ‘Ÿπ‘
�𝐴𝑖𝐡𝐽𝑇 − β„Žπ‘“π‘ �𝑖𝑒
+ 𝑅12 (𝑖𝑏 + 𝑖𝑐 )
β„Žπ‘œπ‘
This (rearranged) expression can be used to find the input resistance 𝑅𝑖𝐡𝐽𝑇
𝑣𝑒
β„Žπ‘Ÿπ‘
𝑅𝑖𝐡𝐽𝑇 ≝ = β„Žπ‘–π‘ + οΏ½1 + 𝐴𝑖𝐡𝐽𝑇 �𝑅12 +
�𝐴
− β„Žπ‘“π‘ οΏ½
𝑖𝑒
β„Žπ‘œπ‘ 𝑖𝐡𝐽𝑇
The previous exercise n.16 gave 𝑅𝑖𝐡𝐽𝑇 = β„Žπ‘–π‘ −
than the previous one.
Finally, the overall input resistance is
Numerically 𝑅𝑖𝐡𝐽𝑇 ≅ 262Ω; 𝑅𝑖 ≅ 252Ω.
β„Žπ‘Ÿπ‘ β„Žπ‘“π‘
β„Žπ‘œπ‘ +
1
𝑅𝐢𝐿
, so the current input resistance is greater
𝑅𝑖 = 𝑅𝐸 ||𝑅𝑖𝐡𝐽𝑇
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Basi di elettronica
π‘…π‘œπ΅π½π‘‡ ≝
𝑣𝑐
𝑖𝑒
π‘…π‘œ
.
!
As already mentioned, we assume for simplicity β„Žπ‘Ÿπ‘ =
⏞ 0. We have
𝑣𝑒 = −(𝑅𝑆 ||𝑅𝐸 )𝑖𝑒
but
𝑣𝑒 = β„Žπ‘–π‘ 𝑖𝑒 + 𝑅12 (𝑖𝑒 + 𝑖𝑐 )
so that
−(𝑅𝑆 ||𝑅𝐸 )𝑖𝑒 = β„Žπ‘–π‘ 𝑖𝑒 + 𝑅12 (𝑖𝑒 + 𝑖𝑐 )
from which
[(𝑅𝑆 ||𝑅𝐸 ) + β„Žπ‘–π‘ + 𝑅12 ]𝑖𝑒 = −𝑅12 𝑖𝑐
𝑖𝑒 = −
KVL around the output loop yields
𝑣𝑐 = −
𝑅12
𝑖
(𝑅𝑆 ||𝑅𝐸 ) + β„Žπ‘–π‘ + 𝑅12 𝑐
β„Žπ‘“π‘
1
𝑖𝑒 +
𝑖 + 𝑅12 (𝑖𝑒 + 𝑖𝑐 )
β„Žπ‘œπ‘
β„Žπ‘œπ‘ 𝑐
in which we can replace the previous expression of 𝑖𝑒 , obtaining
β„Žπ‘“π‘
𝑅12
1
𝑅12
𝑣𝑐 =
𝑖𝑐 +
𝑖𝑐 + 𝑅12 οΏ½−
𝑖 + 𝑖𝑐 οΏ½
(𝑅𝑆 ||𝑅𝐸 ) + β„Žπ‘–π‘ + 𝑅12 𝑐
β„Žπ‘œπ‘ (𝑅𝑆 ||𝑅𝐸 ) + β„Žπ‘–π‘ + 𝑅12
β„Žπ‘œπ‘
Rearranging
π‘…π‘œπ΅π½π‘‡ ≝
β„Žπ‘“π‘
𝑣𝑐
1
𝑅12
=
+ 𝑅12 + οΏ½
− 𝑅12 οΏ½
(𝑅𝑆 ||𝑅𝐸 ) + β„Žπ‘–π‘ + 𝑅12
𝑖𝑐 β„Žπ‘œπ‘
β„Žπ‘œπ‘
!
1
In the previous exercise n.16, admitting β„Žπ‘Ÿπ‘’ =
⏞ 0, we obtained π‘…π‘œπ΅π½π‘‡ = β„Ž . The current output
β„Žπ‘“π‘
π‘œπ‘
resistance can be then higher or lower, mainly depending on the term οΏ½β„Ž − 𝑅12 οΏ½.
π‘œπ‘
Finally, the overall output resistance is
π‘…π‘œ = 𝑅𝐢𝐿 ||π‘…π‘œπ΅π½π‘‡
Numerically π‘…π‘œπ΅π½π‘‡ ≅ 202π‘˜β„¦; π‘…π‘œ ≅ 8π‘˜β„¦.
𝐴𝑣
𝑣
𝐴𝑣𝐡𝐽𝑇 ≝ 𝑣𝑐 ;
𝑒
The voltage gain can be easily found with few steps
𝑅𝐢𝐿 𝐴𝑖𝐡𝐽𝑇 𝑖𝑒
𝑣𝑐 −𝑅𝐢𝐿 𝑖𝑐
𝑅𝐢𝐿
𝐴𝑣𝐡𝐽𝑇 ≝ =
=−
=−
𝐴
𝑣𝑒
𝑣𝑒
𝑣𝑒
𝑅𝑖𝐡𝐽𝑇 𝑖𝐡𝐽𝑇
39
Basi di elettronica
In the previous exercise n.16 the result was 𝐴𝑣𝐡𝐽𝑇 = β„Ž
β„Žπ‘“π‘ 𝑅𝐢𝐿
𝑖𝑏 +οΏ½β„Žπ‘–π‘ β„Žπ‘œπ‘ −β„Žπ‘Ÿπ‘ β„Žπ‘“π‘ �𝑅𝐢𝐿
=β„Ž
β„Žπ‘“π‘ 𝑅𝐢𝐿
𝑖𝑏 +βˆ†β„Žπ‘…πΆπΏ
. In order to
make an easy comparison, let us ignore β„Žπ‘œπ‘ , admit 𝐴𝑖𝐡𝐽𝑇 ≅ β„Žπ‘“π‘ , and over-stimate 𝑅𝑖𝐡𝐽𝑇 ≅ β„Žπ‘–π‘ .
Now, we have a lower voltage gain being the denominator higher of the term βˆ†β„Žπ‘…πΆπΏ .
Finally, the overall voltage gain
𝑅𝐸 ||𝑅𝑖𝐡𝐽𝑇
π‘£π‘œ 𝑣𝑐 𝑣𝑐 𝑣𝑒
𝐴𝑣 =
= =
= 𝐴𝑣𝐡𝐽𝑇 𝛼𝑣 = 𝐴𝑣𝐡𝐽𝑇
𝑣𝑠 𝑣𝑠 𝑣𝑒 𝑣𝑠
𝑅𝐸 ||𝑅𝑖𝐡𝐽𝑇 + 𝑅𝑆
Numerically 𝛼𝑣 ≅ 0.2015; 𝐴𝑣𝐡𝐽𝑇 ≅ 31; 𝐴𝑣 ≅ 6.3.
Summarizing
𝑅𝑖𝐡𝐽𝑇 ≅ 262Ω; 𝑅𝑖 ≅ 252Ω
π‘…π‘œπ΅π½π‘‡ ≅ 202π‘˜β„¦; π‘…π‘œ ≅ 8π‘˜β„¦
𝛼𝑣 ≅ 0.2015; 𝛼𝑖𝑖 ≅ 0.9639; π›Όπ‘–π‘œ ≅ −0.1667;
𝐴𝑣𝐡𝐽𝑇 ≅ 31; 𝐴𝑣 ≅ 6.3
𝐴𝑖𝐡𝐽𝑇 ≅ −0.976; 𝐴𝑖 ≅ 0.157
Exercise n. 18
The C.C. configuration as represented in Figure 11.72 has BJT h-parameters equal to (BC107
type) β„Žπ‘–π‘’ = 4π‘˜β„¦ ; β„Žπ‘Ÿπ‘’ = 2.2 ∗ 10−4 ; β„Žπ‘“π‘’ = 250 ; β„Žπ‘œπ‘’ = 30 ∗ 10−6 𝑆 , and resistance equal to
𝑅1 = 140π‘˜β„¦; 𝑅2 = 140π‘˜β„¦; 𝑅𝐸 = 50π‘˜β„¦; 𝑅𝐿 = 50π‘˜β„¦; 𝑅𝑠 = 500Ω..
VCC
R1
C
CB1
B
Rs
R2
RE
E CB2
RL
+
vs
Figure 11.72 C.C. configuration
Determine within the amplifier’s bandwidth,
 The BJT’s and overall current gains, 𝐴𝑖𝐡𝐽𝑇 and 𝐴𝑖
 The BJT’s and overall input resistances, 𝑅𝑖𝐡𝐽𝑇 and 𝑅𝑖
 The BJT’s and overall voltage gains, 𝐴𝑣𝐡𝐽𝑇 and 𝐴𝑣
 The BJT’s and overall output resistances, π‘…π‘œπ΅π½π‘‡ and π‘…π‘œ
40
Basi di elettronica
ANSWER
The exercise requires the dynamic parameters, so we draw the AC equivalent circuit in Figure
11.72b. We use BJT equivalent model with h-parameters in CE configuration, which are the one
furnished by the exercise, even if we have to study a CC configuration.
ic
is
ib
hie
B
C
++
RS
hfei b
1
v ce
hoe
-
v be
R12
vb
E
ie
+
RE
i RE
vs
+
RL
iL
-
Ri
+
v e=v o
-
Ro
RiBJT
Figure 11.72b AC equivalent model with BJT h-parameters of the CE configuration
For convenience we can combine 𝑅12 = 𝑅1 ||𝑅2 and 𝑅𝐸𝐿 = 𝑅𝐸 ||𝑅𝐿 .
𝑖
𝐴𝑖𝐡𝐽𝑇 ≝ 𝑖𝑒 ;
𝑏
𝐴𝑖
The π‘’π‘ž. 𝐼𝐼 𝐢𝐸 is 𝑖𝑐 = β„Žπ‘“π‘’ 𝑖𝑏 + β„Žπ‘œπ‘’ 𝑣𝑐𝑒 , but 𝑖𝑒 = 𝑖𝑏 + 𝑖𝑐 and 𝑣𝑐𝑒 = −𝑅𝐸𝐿 𝑖𝑒 , so that we can write
𝑖𝑒 − 𝑖𝑏 = β„Žπ‘“π‘’ 𝑖𝑏 + β„Žπ‘œπ‘’ 𝑣𝑐𝑒
from which we can write
𝑖
𝐴𝑖𝐡𝐽𝑇 =
1 + β„Žπ‘“π‘’
1 + β„Žπ‘œπ‘’ 𝑅𝐸𝐿
The overall current gain is 𝐴𝑖 ≝ 𝑖𝐿, but it can be equivalently written as
𝐴𝑖 =
𝑠
𝑖𝐿 𝑖𝑒 𝑖𝑏 𝑖𝐿
𝑖𝑏
𝑅𝐸
𝑅12
= 𝐴𝑖𝐡𝐽𝑇 =
𝐴𝑖𝐡𝐽𝑇
𝑖𝑒 𝑖𝑏 𝑖𝑠 𝑖𝑒
𝑖𝑠 𝑅𝐸 + 𝑅𝐿
𝑅12 + 𝑅𝑖𝐡𝐽𝑇
Numerically 𝐴𝑖𝐡𝐽𝑇 = 143.4; 𝐴𝑖 ≅ 1.37
𝑅𝑖𝐡𝐽𝑇 ≝
𝑣𝑏
𝑖𝑏
𝑅𝑖
;
From the definition 𝑣𝑏𝑒 ≝ 𝑣𝑏 − 𝑣𝑒 and from the π‘’π‘ž. 𝐼 𝐢𝐸 we can write
𝑣𝑏𝑒 = β„Žπ‘–π‘’ 𝑖𝑏 + β„Žπ‘Ÿπ‘’ 𝑣𝑐𝑒
41
Basi di elettronica
!
(here we can consider β„Žπ‘Ÿπ‘’ =
⏞ 0, according to the observation already made, see exercise n.17), so
that
𝑣𝑏 − 𝑅𝐸𝐿 𝑖𝑒 = β„Žπ‘–π‘’ 𝑖𝑏
𝑣𝑏 − 𝑅𝐸𝐿 𝐴𝑖𝐡𝐽𝑇 𝑖𝑏 = β„Žπ‘–π‘’ 𝑖𝑏
𝑅𝑖𝐡𝐽𝑇 = β„Žπ‘–π‘’ + 𝑅𝐸𝐿 𝐴𝑖𝐡𝐽𝑇
𝑅𝑖 = 𝑅𝑆 + 𝑅12 ||𝑅𝑖𝐡𝐽𝑇
Numerically 𝑅𝑖𝐡𝐽𝑇 ≅ 3.59𝑀Ω, 𝑅𝑖 ≅ 643Ω.
𝐴𝑣
𝑣𝑒
𝐴𝑣𝐡𝐽𝑇 ≝ 𝑣 ;
Since
𝑏
it can be easily found that
𝑣𝑒 = 𝑅𝐸𝐿 𝑖𝑒 = 𝑅𝐸𝐿 𝐴𝑖𝐡𝐽𝑇 𝑖𝑏 ; 𝑣𝑏 = 𝑅𝑖𝐡𝐽𝑇 𝑖𝑏
𝐴𝑣𝐡𝐽𝑇 =
But the overall voltage gain is
𝑅𝐸𝐿
𝐴
𝑅𝑖𝐡𝐽𝑇 𝑖𝐡𝐽𝑇
𝐴𝑣 ≝
which can be written as
𝐴𝑣 =
𝑣𝑒
𝑣𝑠
𝑅12 ||𝑅𝑖𝐡𝐽𝑇
𝑣𝑒 𝑣𝑏
𝑣𝑏
= 𝐴𝑣𝐡𝐽𝑇
= 𝐴𝑣𝐡𝐽𝑇
𝑣𝑏 𝑣𝑠
𝑣𝑠
𝑅𝑠 + 𝑅12 ||𝑅𝑖𝐡𝐽𝑇
Numerically 𝐴𝑣𝐡𝐽𝑇 ≅ 0.998, 𝐴𝑣 ≅ 0.22.
π‘…π‘œπ΅π½π‘‡ ≝
𝑣𝑒
𝑖𝑒
π‘…π‘œ
;
!
We have to impose 𝑣𝑠 =
⏞ 0 so that
but
therefore
𝑣𝑒 = [(𝑅𝑆 ||𝑅12 ) + β„Žπ‘–π‘’ ]𝑖𝑏
𝑖𝑒 = 𝐴𝑖𝐡𝐽𝑇 𝑖𝑏
π‘…π‘œπ΅π½π‘‡ =
(𝑅𝑆 ||𝑅12 ) + β„Žπ‘–π‘’
𝐴𝑖𝐡𝐽𝑇
42
Basi di elettronica
The overall output resistance is then
π‘…π‘œ = π‘…π‘œπ΅π½π‘‡ ||𝑅𝐸𝐿
Numerically π‘…π‘œπ΅π½π‘‡ ≅ 31.35Ω, π‘…π‘œ ≅ 31.3Ω.
Summarizing
𝐴𝑖𝐡𝐽𝑇 = 143.4, 𝐴𝑖 ≅ 1.37.
𝑅𝑖𝐡𝐽𝑇 ≅ 3.59𝑀Ω, 𝑅𝑖 ≅ 643Ω..
𝐴𝑣𝐡𝐽𝑇 ≅ 0.998, 𝐴𝑣 ≅ 0.22.
π‘…π‘œπ΅π½π‘‡ ≅ 31.35Ω, π‘…π‘œ ≅ 31.3Ω.
Exercise n. 19
Let us consider a dual-output BJT amplifier that has two resistor loads, 𝑅𝐿1 and 𝑅𝐿2 , respectively,
connected across the collector-ground and emitter-ground terminals (Figure 11.73).
VCC
RC
R1
i l1
ig
CB
Rs
+
+
vi
CE
R2 RE
CL
i l2
+
RL1
+
vl1
RL2 vl2
vs
Figure 11.73 Dual-output BJT amplifier
Here none of the BJT’s terminals are AC directly connected to the ground.
Determine the expressions of
 The BJT and overall input resistances, 𝑅𝑖𝐡𝐽𝑇 and 𝑅𝑖
 The BJT and overall voltage gains at the collector and emitter terminals, respectively
𝐴𝑣𝐡𝐽𝑇,𝑐 , 𝐴𝑣𝐡𝐽𝑇,𝑒 , 𝐴𝑣,𝑐 , 𝐴𝑣,𝑒
 The BJT current gains at the collector and emitter terminals, 𝐴𝑖𝐡𝐽𝑇,𝑐 , and 𝐴𝑖𝐡𝐽𝑇,𝑒
 The BJT and overall output resistances at the collector and emitter terminals, π‘…π‘œπ΅π½π‘‡,𝑐 ,
π‘…π‘œπ΅π½π‘‡,𝑒 , π‘…π‘œ,𝑐 , π‘…π‘œ,𝑒
For simplicity, consider β„Žπ‘Ÿπ‘ = 0.
43
Basi di elettronica
ANSWER
For convenience we can combine 𝑅𝐿1𝐢 = 𝑅𝐿1 ||𝑅𝐢 ; 𝑅𝐿2𝐸 = 𝑅𝐿2 ||𝑅𝐸 ; 𝑅12 = 𝑅1 ||𝑅2 ; 𝑅12𝑆 =
𝑅𝑆 ||𝑅12.
Figure 11.73b represents the AC equivalent model of the dual-output amplifier where, for
!
⏞ 0, according to the observation already made in the exercise
simplicity reasons, we imposed β„Žπ‘Ÿπ‘ =
n.17.
ib
is
ic
iL
hie
B
++
RS
C
+ hrevce
hfei b
v be
R12
vb
+
E
ie
RE
vs
+
1
v ce
hoe
RC RL1
+
v L1
RL2 v
L2
-
Ri
+
-
-
RiBJT
RoBJT
Ro
Figure 11.73b AC equivalent model of the dual-output amplifier
KCL of the output loop gives
𝑖𝑐 = β„Žπ‘“π‘’ 𝑖𝑏 + β„Žπ‘œπ‘’ 𝑣𝑐𝑒 = β„Žπ‘“π‘’ 𝑖𝑏 − β„Žπ‘œπ‘’ [𝑅𝐿1𝐢 𝑖𝑐 + 𝑅𝐿2𝐸 (𝑖𝑐 + 𝑖𝑏 )]
from which we can determine the partial voltage gain at the collector terminal
β„Žπ‘“π‘’ − β„Žπ‘œπ‘’ 𝑅𝐿2𝐸
𝑖𝑐
𝐴𝑖𝐡𝐽𝑇,𝑐 ≝ =
𝑖𝑏 1 + β„Žπ‘œπ‘’ (𝑅𝐿1𝐢 + 𝑅𝐿2𝐸 )
If we admit the approximations β„Žπ‘œπ‘’ (𝑅𝐿1𝐢 + 𝑅𝐿2𝐸 ) β‰ͺ 1 and β„Žπ‘“π‘’ ≫ β„Žπ‘œπ‘’ 𝑅𝐿2𝐸 , it can be reduced
simply to 𝐴𝑖𝐡𝐽𝑇,𝑐 ≅ β„Žπ‘“π‘’ .
𝑅𝑖
44
Basi di elettronica
KVL around the input closed path yields
𝑣𝑏 = β„Žπ‘–π‘’ 𝑖𝑏 + 𝑅𝐿2𝐸 (𝑖𝑐 + 𝑖𝑏 ) = β„Žπ‘–π‘’ 𝑖𝑏 + 𝑅𝐿2𝐸 οΏ½1 + 𝐴𝑖𝐡𝐽𝑇,𝑐 �𝑖𝑏
so that
𝑅𝑖𝐡𝐽𝑇 ≝
𝑣𝑏
= β„Žπ‘–π‘’ + οΏ½1 + 𝐴𝑖𝐡𝐽𝑇,𝑐 �𝑅𝐿2𝐸
𝑖𝑏
If we admit the aforementioned approximations, it becomes
𝑅𝑖𝐡𝐽𝑇 ≅ β„Žπ‘–π‘’ + β„Žπ‘“π‘’ 𝑅𝐿2𝐸
The overall input resistance being
𝑅𝑖 = 𝑅12 ||𝑅𝑖𝐡𝐽𝑇
The voltage gain at the collector terminal is
𝑣𝐿1
𝑅𝐿1𝐢 𝑖𝑐
𝑅𝐿1𝐢
𝐴𝑣𝐡𝐽𝑇,𝑐 ≝
=−
=−
𝐴
𝑣𝑏
𝑅𝑖𝐡𝐽𝑇 𝑖𝑏
𝑅𝑖𝐡𝐽𝑇 𝑖𝐡𝐽𝑇,𝑐
𝐴𝑣
The voltage gain at the emitter terminal is
𝑣𝐿2
𝑅𝐿2𝐸 (𝑖𝑐 + 𝑖𝑏 ) 𝑅𝐿2𝐸
𝑅𝐿2𝐸
𝐴𝑣𝐡𝐽𝑇,𝑒 ≝
=−
=
οΏ½1 + 𝐴𝑖𝐡𝐽𝑇,𝑐 οΏ½ ≅
𝐴
𝑣𝑏
𝑅𝑖𝐡𝐽𝑇 𝑖𝑏
𝑅𝑖𝐡𝐽𝑇
𝑅𝑖𝐡𝐽𝑇 𝑖𝐡𝐽𝑇,𝑐
which can be equivalently written as
𝐴𝑣𝐡𝐽𝑇,𝑒 =
𝑣𝑏 − β„Žπ‘–π‘’ 𝑖𝑏
β„Žπ‘–π‘’
= 1−
𝑅𝑖𝐡𝐽𝑇 𝑖𝑏
𝑅𝑖𝐡𝐽𝑇
It is evident that this voltage gain is less the none, so we have a attenuation rather than a real gain.
To determine the overall voltage gains we have to take into account the voltage divider effects due
to the source resistor 𝑅𝑆 and to the BJT one 𝑅𝑖𝐡𝐽𝑇 :
𝑅𝑖𝐡𝐽𝑇
𝑣𝐿1 𝑣𝐿1 𝑣𝑏
𝑅𝐿1𝐢
𝐴𝑣,𝑐 ≝
=
=−
𝐴𝑖𝐡𝐽𝑇,𝑐
𝑣𝑠
𝑣𝑏 𝑣𝑠
𝑅𝑖𝐡𝐽𝑇
𝑅𝑖𝐡𝐽𝑇 + 𝑅𝑆
𝐴𝑣,𝑒 ≝
𝑅𝑖𝐡𝐽𝑇
𝑣𝐿2 𝑣𝐿2 𝑣𝑏 𝑅𝐿2𝐸
=
=
𝐴𝑖𝐡𝐽𝑇,𝑐
𝑣𝑠
𝑣𝑏 𝑣𝑠 𝑅𝑖𝐡𝐽𝑇
𝑅𝑖𝐡𝐽𝑇 + 𝑅𝑆
There is a 180° out of phase between the output voltage at the emitter and at the collector, so
!
that if we admit 𝑅𝐿1𝐢 =
⏞ 𝑅𝐿2𝐸 we can realize a phase inverter: twin voltage output in module but
180° outphased.
45
Basi di elettronica
Ai
The current gain at the collector terminal is
𝑖𝐿1 𝑣𝐿1 𝑅𝑖𝐡𝐽𝑇 𝑅𝑖𝐡𝐽𝑇
=
=
𝐴
𝐴𝑖𝐡𝐽𝑇,𝑐 ≝
𝑖𝑏
𝑅𝐿1 𝑣𝑏
𝑅𝐿1 𝑣𝐡𝐽𝑇,𝑐
The current gain at the emitter terminal is
𝑖𝐿2 𝑣𝐿2 𝑅𝑖𝐡𝐽𝑇 𝑅𝑖𝐡𝐽𝑇
𝐴𝑖𝐡𝐽𝑇,𝑒 ≝
=
=
𝐴
𝑖𝑏
𝑅𝐿2 𝑣𝑏
𝑅𝐿2 𝑣𝐡𝐽𝑇,𝑒
Ro
!
To determine the output resistance, we have to kill the independent source, as usual, 𝑣𝑠 =
⏞ 0.
Let us start calculating the output resistance at the collector terminal, π‘…π‘œ,𝑐 . Since
𝑖𝑐 = β„Žπ‘“π‘’ 𝑖𝑏 + β„Žπ‘œπ‘’ 𝑣𝑐𝑒 = β„Žπ‘“π‘’ 𝑖𝑏 + β„Žπ‘œπ‘’ 𝑣𝐿1 − [𝑅𝐿2𝐸 ||(β„Žπ‘–π‘’ + 𝑅12𝑆 )]𝑖𝑐
we can make the voltage 𝑣𝐿1 explicit
β„Žπ‘“π‘’
𝑖𝑐
𝑣𝐿1 =
−
𝑖 + [𝑅𝐿2𝐸 ||(β„Žπ‘–π‘’ + 𝑅12𝑆 )]𝑖𝑐
β„Žπ‘œπ‘’ β„Žπ‘œπ‘’ 𝑏
and since
𝑖𝑏 = −𝑖𝑐
𝑅𝐿2𝐸
𝑅𝐿2𝐸 + (β„Žπ‘–π‘’ + 𝑅12𝑆 )
As a final result
β„Žπ‘“π‘’
𝑅𝐿2𝐸
𝑣𝐿1
1
1
π‘…π‘œπ΅π½π‘‡,𝑐 ≝
=
+
+ [𝑅𝐿2𝐸 ||(β„Žπ‘–π‘’ + 𝑅12𝑆 )] ≅
οΏ½1 + β„Žπ‘“π‘’ οΏ½
𝑖𝑐
β„Žπ‘œπ‘’
β„Žπ‘œπ‘’ β„Žπ‘œπ‘’ 𝑅𝐿2𝐸 + (β„Žπ‘–π‘’ + 𝑅12𝑆 )
The overall output resistance at the collector terminal is
π‘…π‘œ,𝑐 = π‘…π‘œπ΅π½π‘‡,𝑐 ||𝑅𝐿1𝐢
Let us calculate now the output resistance at the emitter terminal, π‘…π‘œ,𝑒 . Since
𝑣𝐿2
𝑖𝑏 = −
𝑅12𝑆 + β„Žπ‘–π‘’
and
𝑖𝑐 = β„Žπ‘“π‘’ 𝑖𝑏 + β„Žπ‘œπ‘’ 𝑣𝑐𝑒 = −
𝑖𝑐 = −
−(𝑖𝑏 + 𝑖𝑐 ) = οΏ½
β„Žπ‘“π‘’ 𝑣𝐿2
− β„Žπ‘œπ‘’ (𝑣𝐿2 + 𝑅𝐿1𝐢 𝑖𝑐 )
𝑅12𝑆 + β„Žπ‘–π‘’
β„Žπ‘“π‘’ 𝑣𝐿2
β„Žπ‘œπ‘’ 𝑣𝐿2
−
(𝑅12𝑆 + β„Žπ‘–π‘’ )(1 + β„Žπ‘œπ‘’ 𝑅𝐿1𝐢 ) (1 + β„Žπ‘œπ‘’ 𝑅𝐿1𝐢 )
β„Žπ‘“π‘’
1
β„Žπ‘œπ‘’
+
+
�𝑣
(𝑅12𝑆 + β„Žπ‘–π‘’ ) (𝑅12𝑆 + β„Žπ‘–π‘’ )(1 + β„Žπ‘œπ‘’ 𝑅𝐿1𝐢 ) (1 + β„Žπ‘œπ‘’ 𝑅𝐿1𝐢 ) 𝐿2
The requested resistance is made by three parallel resistances
46
Basi di elettronica
π‘…π‘œπ΅π½π‘‡,𝑒 = (𝑅12𝑆 + β„Žπ‘–π‘’ ) ||
(𝑅12𝑆 + β„Žπ‘–π‘’ )(1 + β„Žπ‘œπ‘’ 𝑅𝐿1𝐢 ) (1 + β„Žπ‘œπ‘’ 𝑅𝐿1𝐢 )
||
β„Žπ‘“π‘’
β„Žπ‘œπ‘’
If we admit the hypothesis β„Žπ‘œπ‘’ 𝑅𝐿1𝐢 β‰ͺ 1, it becomes
𝑅12𝑆 + β„Žπ‘–π‘’
π‘…π‘œπ΅π½π‘‡,𝑒 ≅
β„Žπ‘“π‘’
Finally
π‘…π‘œ,𝑒 = 𝑅𝐿2𝐸 ||π‘…π‘œπ΅π½π‘‡,𝑒
Summarizing
With the expressions 𝑅𝐿1𝐢 = 𝑅𝐿1 ||𝑅𝐢 , 𝑅𝐿2𝐸 = 𝑅𝐿2 ||𝑅𝐸 , 𝑅12 = 𝑅1 ||𝑅2 , 𝑅12𝑠 = 𝑅𝑠 ||𝑅12 , the
solutions can be written as:
β„Ž
−β„Žπ‘œπ‘’ 𝑅𝐿2𝐸
𝐴𝑖𝐡𝐽𝑇,𝑐 = 1+β„Žπ‘“π‘’(𝑅
π‘œπ‘’
,
𝐿1𝐢 +𝑅𝐿2𝐸 )
𝑅𝑖𝐡𝐽𝑇 = β„Žπ‘–π‘’ + οΏ½1 + 𝐴𝑖𝐡𝐽𝑇,𝑐 �𝑅𝐿2𝐸 , 𝑅𝑖 = 𝑅12 ||𝑅𝑖𝐡𝐽𝑇
𝑅
𝐴𝑣𝐡𝐽𝑇,𝑐 = − 𝑅 𝐿1𝐢 𝐴𝑖𝐡𝐽𝑇,𝑐
𝐴𝑣𝐡𝐽𝑇,𝑒 =
𝑖𝐡𝐽𝑇
𝑅𝐿2𝐸
π‘…π‘–π‘ž
β„Žπ‘–π‘’
𝐴𝑣𝐡𝐽𝑇,𝑒 = 1 − 𝑅
𝑅𝐿1𝐢
𝐴𝑣,𝑐 = − 𝑅
𝑅
𝑖𝐡𝐽𝑇
𝑖𝐡𝐽𝑇
𝐴𝑖𝐡𝐽𝑇,𝑐 𝑅
𝐴𝑣,𝑒 = 𝑅 𝐿2𝐸 𝐴𝑖𝐡𝐽𝑇,𝑐 𝑅
𝑖𝐡𝐽𝑇
𝑅
οΏ½1 + 𝐴𝑖𝐡𝐽𝑇,𝑐 οΏ½ ≅ 𝑅 𝐿2𝐸 𝐴𝑖𝐡𝐽𝑇,𝑐
Observation
𝑖𝐡𝐽𝑇
𝑅𝑖𝐡𝐽𝑇
𝑖𝐡𝐽𝑇 +𝑅𝑠
𝑅𝑖𝐡𝐽𝑇
𝑖𝐡𝐽𝑇 +𝑅𝑠
.
The output collector and emitter voltages are out of phase by 180°. If we select
components such that 𝑅𝐿1𝐢 = 𝑅𝐿2𝐸 , the two voltages have the same module. The amplifier
realizes a phase inverter, also known as phase splitter. This network can be useful to
provide anti-phase input to another stage. Please, pay close attention to the fact that the
emitter resistor is not shunted by a capacitor.
𝐴𝑖𝐡𝐽𝑇,𝑐 =
𝐴𝑖𝐡𝐽𝑇,𝑒 =
𝑅𝑖𝐡𝐽𝑇
𝑅𝐿1
𝑅𝑖𝐡𝐽𝑇
𝑅𝐿2
1
𝐴𝑣𝐡𝐽𝑇,𝑐
𝐴𝑣𝐡𝐽𝑇,𝑒
β„Ž
π‘…π‘œπ΅π½π‘‡,𝑐 = β„Ž + β„Žπ‘“π‘’ 𝑅
π‘œπ‘’
π‘œπ‘’
π‘…π‘œ,𝑐 = π‘…π‘œπ΅π½π‘‡,𝑐 ||𝑅𝐿1𝐢
𝑅𝐿2𝐸
𝐿2𝐸 +(β„Žπ‘–π‘’ +𝑅12𝑆 )
π‘…π‘œπ΅π½π‘‡,𝑒 = (𝑅12𝑆 + β„Žπ‘–π‘’ ) ||
π‘…π‘œ,𝑒 = 𝑅𝐿2𝐸 ||π‘…π‘œπ΅π½π‘‡,𝑒
1
+ [𝑅𝐿2𝐸 ||(β„Žπ‘–π‘’ + 𝑅12𝑆 )] ≅ β„Ž οΏ½1 + β„Žπ‘“π‘’ οΏ½
π‘œπ‘’
(𝑅12s +β„Žπ‘–π‘’ )(1+β„Žπ‘œπ‘’ 𝑅𝐿1𝐢 )
β„Žπ‘“π‘’
||
(1+β„Žπ‘œπ‘’ 𝑅𝐿1𝐢 )
β„Žπ‘œπ‘’
Exercise n. 20
Given the amplifier shown in Figure 11.74, determine its ideal current gain 𝐴𝑖 to realize a
negative input resistance, 𝑅𝑖 < 0.
47
Basi di elettronica
VCC
RC
R1
CC
C
B
R2
E
CE
RL
Rs
is
RE
Figure 11.74 Current amplifier with current source
ANSWER
The AC equivalent model of the current amplifier with current source is drawn in Figure 11.74b.
ie
ic
io
hib
E
++
is
C
+ hrbvcb
hfbi e
v eb
RS
RE
ve
B
-
+
ie
-
Ri
+
1
v cb
hob
RC
RL
v c=v o
ve
R12
-
-
RiBJT
+
RoBJT
Ro
Figure 11.74b AC equivalent model of the current amplifier with current source
If we omit the dependent voltage source at the input loop (the reason is already discussed in the
exercise n.17), this model results similar to the one of a generic current amplifier (see Section
10.3.2 in Chapter 10), but having an additional feed-back resistor 𝑅𝐹 , in common between the
input and the output loops, as in Figure 11.74c.
48
Basi di elettronica
io
i in
+
is
(i)
A i iin
RS
+
Ro
Ri
vin
i out
vout
RF
-
RL
-
Rin
Figure 11.74c Equivalent model of a generic current amplifier with a feedback resistor
This equivalent model can be modified replacing the Norton equivalent with its Thevenin
counterpart, as in Figure 11.74d.
i in
io
i out
R +
+
is
+ A(i)R i o
i o in
RS
Ri
vin
vout
RF
-
RL
-
Rin
Figure 11.74d Equivalent model of a generic current amplifier but with the Thevenin equivalent
dependent source in the output loop
KVL around the input loop yields
𝑣𝑖𝑛 = 𝑅𝑖 𝑖𝑖𝑛 + 𝑅𝐹 (𝑖𝑖𝑛 − π‘–π‘œπ‘’π‘‘ )
and KVL around the output loop determines
(𝑖)
𝐴𝑖 π‘…π‘œ 𝑖𝑖𝑛 = (π‘…π‘œ + 𝑅𝐿 )π‘–π‘œπ‘’π‘‘ − 𝑅𝐹 (𝑖𝑖𝑛 − π‘–π‘œπ‘’π‘‘ )
π‘–π‘œπ‘’π‘‘
The two results can be mixed obtaining
from which
𝑣𝑖𝑛
(𝑖)
𝐴 π‘…π‘œ + 𝑅𝐹
= 𝑖
𝑖
π‘…π‘œ + 𝑅𝐿 + 𝑅𝐹 𝑖𝑛
(𝑖)
𝐴 π‘…π‘œ + 𝑅𝐹
= 𝑅𝑖 𝑖𝑖𝑛 + 𝑅𝐹 οΏ½1 − 𝑖
�𝑖
π‘…π‘œ + 𝑅𝐿 + 𝑅𝐹 𝑖𝑛
𝑅𝑖𝑛 = 𝑅𝑖 + 𝑅𝐹 οΏ½1 −
(𝑖)
𝐴𝑖 π‘…π‘œ + 𝑅𝐹
οΏ½
π‘…π‘œ + 𝑅𝐿 + 𝑅𝐹
For an ideal current amplifier we have 𝑅𝑖 = 0 (and π‘…π‘œ = ∞), so that the latter equation becomes
49
Basi di elettronica
(𝑖)
𝑅𝑖𝑛 = 𝑅𝐹 οΏ½1 − 𝐴𝑖 οΏ½
To answer the question of the exercise: to have a negative value of the input resistance 𝑅𝑖𝑛 we
(𝑖)
have to simply admit 𝐴𝑖 > 1.
50
Exercise n. 1
Demonstrate that for a common source stage with source degeneration, i.e., that includes an unbypassed source resistor 𝑅𝑆 , the MOSFET’s voltage gain is 𝐴𝑣𝑀𝑂𝑆 = −
π‘”π‘š π‘Ÿπ‘œ (𝑅𝐷 ||𝑅𝐿 )
.
π‘Ÿπ‘œ +(1+π‘”π‘š π‘Ÿπ‘œ )𝑅𝑆 +(𝑅𝐷 ||𝑅𝐿 )
ANSWER
Figure 12.22b shows the AC equivalent model for the current exercise.
id
is
+
Rs
vs
+
vi
R1 R2
G
-
D
gmvgs
+
v gs
ro
+ RD RL +
vo
v ds
-
S
+
-
RS
-
v RS
-
-
Figure 12.22b AC equivalent model of the C.S. configuration with un-bypassed source resistor
For convenience we can combine 𝑅12 = 𝑅1 ||𝑅2 and 𝑅𝐷𝐿 = 𝑅𝐷 ||𝑅𝐿 .
π‘£π‘œ = −𝑅𝐷𝐿 𝑖𝑑
KVL applied around the output loop yields
𝑣𝑑𝑠 + 𝑣𝑅𝑆 = π‘£π‘œ
Ohm’s law applied to the previous equation yields
�𝑖𝑑 − π‘”π‘š 𝑣𝑔𝑠 οΏ½π‘Ÿπ‘œ + 𝑅𝑆 𝑖𝑑 = −𝑅𝐷𝐿 𝑖𝑑
but 𝑣𝑔𝑠 = 𝑣𝑖 − 𝑅𝑆 𝑖𝑑 so that
[𝑖𝑑 − π‘”π‘š (𝑣𝑖 − 𝑅𝑆 𝑖𝑑 )]π‘Ÿπ‘œ + 𝑅𝑆 𝑖𝑑 = −𝑅𝐷𝐿 𝑖𝑑
therefore
π‘”π‘š 𝑣𝑖 π‘Ÿπ‘œ
𝑖𝑑 =
π‘Ÿπ‘œ + π‘”π‘š π‘Ÿπ‘œ 𝑅𝑆 + 𝑅𝑆 + 𝑅𝐷𝐿
π‘£π‘œ
But, since 𝑖𝑑 = − 𝑅 , from the latter equation we can extract the following
𝐷𝐿
𝐴𝑣𝑀𝑂𝑆 ≝
π‘£π‘œ
π‘”π‘š π‘Ÿπ‘œ 𝑅𝐷𝐿
=−
𝑣𝑖
π‘Ÿπ‘œ + (1 + π‘”π‘š π‘Ÿπ‘œ )𝑅𝑆 + 𝑅𝐷𝐿
Exercise n. 2
For the amplifier shown in Figure 12.23 the resistance values for the resistors are 𝑅𝐷 = 4.7π‘˜β„¦,
𝑅𝐹 = 220π‘˜β„¦, while the MOSFET’s parameters are π‘”π‘š = 2π‘šπ‘†, π‘Ÿπ‘œ = 133π‘˜β„¦.. Determinate the
input and output resistances, 𝑅𝑖 and π‘…π‘œ ,and the voltage gain 𝐴𝑣 =
π‘£π‘œ
𝑣𝑖
.
VDD
RD
RF
CB1
CB2
+
vo
+
vi
Ri
Ro
Figure 12.23 C.S. configuration with feedback resistor
ANSWER
Figure 12.23b shows the AC equivalent model of the C.S. configuration with feedback resistor.
RF
ii
G
+
v gs
id
D
gmvgs
ro
+ R
D
v ds
+
vo
S
Ro
Ri
Figure 12.23b AC equivalent model of the C.S. configuration with feedback resistor
The input resistance is defined as 𝑅𝑖 =
π‘£π‘œ
𝑖𝑖
, so we look for a link between the output voltage π‘£π‘œ and
the input current 𝑖𝑖 . We can start considering that
𝑣𝑔𝑠 − π‘£π‘œ = 𝑅𝐹 𝑖𝑖
but
π‘£π‘œ = �𝑖𝑖 − π‘”π‘š 𝑣𝑔𝑠 οΏ½(π‘Ÿπ‘œ ||𝑅𝐷 )
The mix of the two equations yields
𝑣𝑔𝑠 − �𝑖𝑖 − π‘”π‘š 𝑣𝑔𝑠 οΏ½(π‘Ÿπ‘œ ||𝑅𝐷 ) = 𝑅𝐹 𝑖𝑖
𝑣𝑔𝑠 [1 + π‘”π‘š (π‘Ÿπ‘œ ||𝑅𝐷 )] = [𝑅𝐹 + (π‘Ÿπ‘œ ||𝑅𝐷 )]𝑖𝑖
therefore
To
determine
π‘£π‘œ 𝑣𝑔𝑠
𝑅𝐹 + (π‘Ÿπ‘œ ||𝑅𝐷 )
=
=
≅ 22.3π‘˜β„¦
𝑖𝑖
𝑖𝑖
1 + π‘”π‘š (π‘Ÿπ‘œ ||𝑅𝐷 )
output
resistance
π‘…π‘œ ,
we
𝑅𝑖 =
the
!
⏞ 0 = 𝑣𝑔𝑠 , as schematize in Figure 12.23c.
𝑣𝑖 =
RF
ii
G
have
to
impose
id
D
+
v gs
ro
+ R
D
v ds
+
vo
S
Ro
Ri
Figure 12.23c AC equivalent model with vi=0
As a consequence
π‘”π‘š 𝑣𝑔𝑠 = 0
π‘…π‘œ = 𝑅𝐹 ||π‘Ÿπ‘œ ||𝑅𝐷 ≅ 4.4π‘˜β„¦
𝑣
𝑣
To determine the voltage gain 𝐴𝑣 = 𝑣 π‘œ , we can recall the equation 𝑣𝑔𝑠 − π‘£π‘œ = 𝑅𝐹 𝑖𝑖 = 𝑅𝐹 π‘…π‘œ so that
𝑔𝑠
𝑅𝐹
𝑣𝑔𝑠 οΏ½1 − οΏ½ = π‘£π‘œ
𝑅𝑖
In this equation we can replace the expression of 𝑅𝑖 obtaining
𝑣𝑔𝑠 οΏ½1 −
Finally
𝐴𝑣 =
𝑅𝐹
οΏ½ = π‘£π‘œ
𝑅𝐹 + (π‘Ÿπ‘œ ||𝑅𝐷 )
1 + π‘”π‘š (π‘Ÿπ‘œ ||𝑅𝐷 )
(π‘Ÿπ‘œ ||𝑅𝐷 )(1 − π‘”π‘š 𝑅𝐹 ) 1 − π‘”π‘š 𝑅𝐹
π‘£π‘œ
=
=
≅ −8.9
𝑅𝐹
(π‘Ÿπ‘œ ||𝑅𝐷 ) + 𝑅𝐹
𝑣𝑔𝑠
1+
π‘Ÿπ‘œ ||𝑅𝐷
Observation
The voltage gain can also be written as
1
1
𝑅𝐹 − π‘”π‘š
𝑅𝐹 − π‘”π‘š
𝐴𝑣 =
=
1
1
1
𝑅𝐹 + π‘Ÿπ‘œ ||𝑅𝐷 π‘Ÿπ‘œ ||𝑅𝐷 ||𝑅𝐹
1
and since its often easily results π‘”π‘š ≫ 𝑅 , then
𝐹
𝐴𝑣 ≅ −π‘”π‘š (π‘Ÿπ‘œ ||𝑅𝐷 ||𝑅𝐹 )
𝑖
Summarizing
𝑅𝑖 ≅ 22.3π‘˜β„¦, π‘…π‘œ ≅ 4.4π‘˜β„¦, 𝐴𝑣 ≅ −8.9.
Exercise n. 3
An E-MOSFET C.S. amplifier is reported as in Figure 12.24.
VDD
RD
R1
CB1
CB2
+
vi
+
vl
R2
Figure 12.24 E-mosfet C.S. amplifier with voltage divider bias
The bias network has 𝑅1 = 5𝑀Ω, 𝑅2 = 860π‘˜β„¦, 𝑅𝐷 = 2π‘˜β„¦, 𝑉𝐷𝐷 = 12𝑉. The MOSFET has
π‘‰π‘‘β„Ž = 2𝑉 and a drain current 𝐼𝐷 = 0.1𝐴 when 𝑉𝐺𝑆 = 5𝑉. Calculate the Q-point: 𝑉𝐺𝑆𝑄 , 𝐼𝐷𝑄 , 𝑉𝐷𝑆𝑄 .
ANSWER
Voltage divider equation applied to the input loop yields
𝑅2
𝑉𝐺𝑆𝑄 =
𝑉 ≅ 1.76𝑉
𝑅1 + 𝑅2 𝐷𝐷
The parameter 𝐾𝑛 is commonly given, but not now, so we have to determine it. In general, this can
be done referring to the parameters furnished by the manufacturer with the MOSFET datasheet, by
considering a particular value named 𝐼𝐷(π‘œπ‘›) at a specific value of 𝑉𝐺𝑆 . Since we do not have these
data, accepting a certain error, we can proceed admitting 𝐼𝐷(π‘œπ‘›) = 𝐼𝐷 , so that
𝐼𝐷(π‘œπ‘›)
𝐾𝑛 ≅
= 0.01
(𝑉𝐺𝑆 − π‘‰π‘‘β„Ž )2
(the value of λ here is neglected).
The value of 𝐾𝑛 is necessary to calculate the quiescent drain current
Finally
2
𝐼𝐷𝑄 = 𝐾𝑛 �𝑉𝐺𝑆𝑄 − π‘‰π‘‘β„Ž οΏ½ ≅ 0.63π‘šπ΄
𝑉𝐷𝑆𝑄 = 𝑉𝐷𝐷 − 𝑅𝐷 𝐼𝐷 ≅ 10.73𝑉
Summarizing VGSQ ≅ 1.76𝑉, IDQ ≅ 63.4π‘šπ΄, VDSQ ≅ 10.7𝑉.
Exercise n. 4
An E-MOSFET is used in a common gate configuration for which the output signal is taken off the
drain with respect to the ground, the gate is AC connected directly to the ground /Figure 12.25).
VDD
iD
R1
RD
il
CB2
CG
CB1
+
vi
R2
+
Rs
vl
+
vs
RS
RL
Figure 12.25 C.G. configuration
The given parameters are 𝑅1 = 1𝑀Ω, 𝑅2 = 1𝑀Ω, 𝑅𝑆 = 2.2π‘˜β„¦, 𝑅𝐷 = 4.7π‘˜β„¦, 𝑅𝐿 = 500Ω,
𝑅𝑠 = 500Ω, π‘”π‘š = 0.01𝑆, π‘Ÿπ‘œ = 50π‘˜β„¦..
Calculate the following:
 The MOSFET and overall input resistances, 𝑅𝑖𝑀𝑂𝑆 and 𝑅𝑖
 The MOSFET and overall voltage gains, 𝐴𝑣𝑀𝑂𝑆 and 𝐴𝑣
 The MOSFET and overall output resistances, π‘…π‘œπ‘€π‘‚π‘† and π‘…π‘œ
ANSWER
For convenience we can combine 𝑅𝑠𝑆 = 𝑅𝑠 ||𝑅𝑆 ≅ 407Ω. and 𝑅𝐷𝐿 = 𝑅𝐷 ||𝑅𝐿 ≅ 2423Ω..
According to Section 12.4.2.1, we can write
π‘Ÿπ‘œ + 𝑅𝐷𝐿
1 + π‘”π‘š π‘Ÿπ‘œ
π‘Ÿπ‘œ + 𝑅𝐷𝐿
𝑅𝑖 = 𝑅𝑖𝑀𝑂𝑆 ||𝑅𝑆 =
||𝑅
1 + π‘”π‘š π‘Ÿπ‘œ 𝑆
Numerically 𝑅𝑖𝑀𝑂𝑆 ≅ 104.6Ω, 𝑅𝑖 ≅ 99.9Ω.
According to Section 12.4.2.2, we can write
π‘…π‘œπ‘€π‘‚π‘† = π‘Ÿπ‘œ + (1 + π‘”π‘š π‘Ÿπ‘œ )𝑅𝑠𝑆
𝑅𝑖𝑀𝑂𝑆 =
π‘…π‘œ = 𝑅𝐷 ||π‘…π‘œπ‘€π‘‚π‘† = 𝑅𝐷 ||[π‘Ÿπ‘œ + (1 + π‘”π‘š π‘Ÿπ‘œ )𝑅𝑠𝑆 ]
Numerically π‘…π‘œπ‘€π‘‚π‘† ≅ 254.1π‘˜β„¦, π‘…π‘œ ≅ 4.6π‘˜β„¦.
According to Section 12.4.2.3, we can write
𝑅𝐷𝐿
𝐴𝑣𝑀𝑂𝑆 = (1 + π‘”π‘š π‘Ÿπ‘œ )
π‘Ÿπ‘œ + 𝑅𝐷𝐿
𝑅𝑆
𝑅𝑆
𝑅𝐷 ||𝑅𝐿
𝐴𝑣 = 𝐴𝑣𝑀𝑂𝑆
= (1 + π‘”π‘š π‘Ÿπ‘œ )
𝑅𝑆 + 𝑅𝑠
π‘Ÿπ‘œ + (𝑅𝐷 ||𝑅𝐿 ) 𝑅𝑆 + 𝑅𝑠
Numerically 𝐴𝑣𝑀𝑂𝑆 ≅ 23.16, 𝐴𝑣 ≅ 18.9.
Summarizing
𝑅𝑖𝑀𝑂𝑆 ≅ 104.6Ω, 𝑅𝑖 ≅ 99.9Ω,
π‘…π‘œπ‘€π‘‚π‘† ≅ 254.1π‘˜β„¦, π‘…π‘œ ≅ 4.6π‘˜β„¦,
𝐴𝑣𝑀𝑂𝑆 ≅ 23.16, 𝐴𝑣 ≅ 18.9
Exercise n. 5
A C.S. configuration is provided with the gate DC directly connected to the power source, as
represented in Figure 12.23.
VDD
RD
ID
+
+
VGS
-
VDS
-
RDS
Figure 12.26
π‘šπ΄
If the power source is 𝑉𝐷𝐷 = 6𝑉 and the MOSFET parameters are π‘‰π‘‘β„Ž = 1𝑉 and 𝐾𝑛 = 1 𝑉 2 , which
is the value to be give to the resistance 𝑅𝐷 to obtain a DC output voltage 𝑉𝐷𝑆 = 2𝑉? Determine the
equivalent DC output resistance 𝑅𝐷𝑆 too.
ANSWER
Since 𝑉𝐷𝑆 = 2 < 5 = 𝑉𝐺𝑆 − π‘‰π‘‘β„Ž the MOS operates in its ohmic region. Therefore
𝐼𝐷 = 𝐾𝑛 οΏ½2(𝑉𝐺𝑆 − π‘‰π‘‘β„Ž )𝑉𝐷𝑆 − 𝑉𝐷𝑆 2 οΏ½ = 16π‘šπ΄
The drain resistance is
The DC output resistance is
RD =
𝑉𝐷𝐷 − 𝑉𝐷𝑆
= 250Ω
𝐼𝐷
R DS =
𝑉𝐷𝑆
= 125Ω
𝐼𝐷
Exercise n. 6
Let us consider the amplifier shown in Figure 12.23, for which we already calculated its AC
conditions. Determine now its DC conditions, that is, its Q-point established by the values of 𝑉𝐺𝑆𝑄 ,
𝑉𝐷𝑆𝑄 and 𝐼𝐷𝑆𝑄 . Please,consider a battery 𝑉𝐷𝐷 = 10𝑉, a MOSFET transconductance parameter
π‘šπ΄
𝐾𝑛 = 0.2 𝑉 2 , and remember the value of the resistors 𝑅𝐷 = 4.7π‘˜β„¦, 𝑅𝐹 = 220π‘˜β„¦.
ANSWER
We want the MOSFET to work in its saturation region, so that
2
2
𝐼𝐷𝑆𝑄 = 𝐾𝑛 �𝑉𝐺𝑆𝑄 − π‘‰π‘‘β„Ž οΏ½ οΏ½1 + λ𝑉𝐷𝑆𝑄 οΏ½ ≅ 𝐾𝑛 �𝑉𝐺𝑆𝑄 − π‘‰π‘‘β„Ž οΏ½
but, the Ohm’s law applied to the drain resistor yields
𝑉𝐷𝐷 − 𝑉𝐷𝑆𝑄 𝑉𝐷𝐷 − 𝑉𝐺𝑆𝑄
=
𝐼𝐷𝑆𝑄 =
𝑅𝐷
𝑅𝐷
so that we can write
𝑉𝐷𝐷 − 𝑉𝐺𝑆𝑄
2
𝐾𝑛 �𝑉𝐺𝑆𝑄 − π‘‰π‘‘β„Ž οΏ½ =
𝑅𝐷
from which
2
2
(𝐾𝑛 𝑅𝐷 )𝑉𝐺𝑆𝑄
+ (1 − 2𝐾𝑛 𝑅𝐷 π‘‰π‘‘β„Ž )𝑉𝐺𝑆𝑄 + (𝐾𝑛 𝑅𝐷 π‘‰π‘‘β„Ž
− 𝑉𝐷𝐷 ) = 0
Two possible solutions of the previous equation are 𝑉𝐺𝑆𝑄1 ≅ 4𝑉 and 𝑉𝐺𝑆𝑄2 ≅ −2.1𝑉, but it is
obvious to admit only 𝑉𝐺𝑆𝑄1 = 𝑉𝐺𝑆𝑄 ≅ 4𝑉. As a consequence 𝐼𝐷𝑆𝑄 = 1.27π‘šπ΄. Clearly we have
𝑉𝐷𝑆𝑄 = 𝑉𝐺𝑆𝑄 ≅ 4𝑉.
Observation
The feedback resistor 𝑅𝐹 plays no rule for the Q-point.
Exercise n. 1
Figure 13.15 shows a pseudo-complementary Darlington configuration.
VEE
R1
IE2
IB2
IB1
IC1
T1
T2
R2
IC2
IE1
Figure 13.15 Pseudo-complementary Darlington configuration
Given that it is supplied from a battery 𝑉𝐸𝐸 = 6𝑉, the resistance values are 𝑅1 = 4.7𝑀Ω and
𝑅2 = 4.7π‘˜β„¦, and that the current gains of the two transistors are 𝛽1 = 60 and 𝛽2 = 40, determine
the BJT Q-points, {𝐼𝐡1 ; 𝐼𝐢1 ; 𝑉𝐢𝐸1 } and {𝐼𝐡2 ; 𝐼𝐢2 ; 𝑉𝐸𝐢2 } respectively.
ANSWER
Let us start considering the two transistors in their active regions.
KVL-BE1 yields
𝑉𝐸𝐸 = 𝑅1 𝐼𝐡1 + 𝑉𝐡𝐸1
so that 𝐼𝐡1 = 1.13𝑛𝐴 and 𝐼𝐢1 ≅ 𝛽𝐼𝐡1 ≅ 67.7𝑛𝐴.
KVL-EB2/CE1 yields
𝑉𝐸𝐸 = 𝑉𝐸𝐡2 + 𝑉𝐢𝐸1
so that 𝑉𝐢𝐸1 = 𝑉𝐸𝐸 − 𝑉𝐸𝐡2 = 6 − 0.7 = 5.3𝑉.
Now 𝐼𝐡2 = 𝐼𝐢1 = 67.7𝑛𝐴 and KVL-CE2 yields
𝑉𝐸𝐸 = 𝑉𝐸𝐢2 + 𝑅2 𝐼𝐢2
but 𝐼𝐢2 ≅ 𝛽𝐼𝐡2 so that
𝑉𝐸𝐢2 = 𝑉𝐸𝐸 − 𝑅2 𝛽𝐼𝐡2 = −6.72𝑉
which is a wrong results for sure, since the emitter-collector voltage cannot be lower than zero. The
consequence is that the transistor T 2 cannot be in its active region but it is in its saturation region
where 𝑉𝐸𝐡2 ≅ 0.2𝑉 (Section 8.6.5 in Chapter 8). So 𝐼𝐢2 ⁄𝐼𝐡2 is lower than 𝛽2 and
𝑉𝐸𝐸 − 𝑉𝐸𝐢2
𝐼𝐢2 =
= 1.23π‘šπ΄
𝑅2
Summarizing:
{IB1 ; IC1 ; VCE1 } = {1.13𝑛𝐴; 67.7𝑛𝐴; 5.3𝑉}; {IB2 ; IC2 ; VEC2 } = {67.7𝑛𝐴; 1.23π‘šπ΄; 0.2𝑉}
2
Exercise n. 2
Figure 13.16 shows a Wilson current mirror network.
VCC
IR
R
A
IC3=IO
IB3
+
VBE3
IC1
T1
T3
IE3
B
IC2
+I
VBE1
IB2 +
VBE2
B1
T2
Figure 13.16 Wilson current source
Demonstrate that the relationship which links the output current πΌπ‘œ with the reference one 𝐼𝑅 is
πΌπ‘œ =
1+
1
2
𝛽(𝛽 + 2)
𝐼𝑅
Please, consider 𝑇1 and 𝑇2 as twin BJTs so that 𝑉𝐡𝐸1 = 𝑉𝐡𝐸2 = 𝑉𝐡 , 𝐼𝐡1 = 𝐼𝐡2 = 𝐼𝐡 , 𝐼𝐢1 = 𝐼𝐢2 = 𝐼𝐢 ,
and all transistors having the same common-emitter current gain 𝛽1 = 𝛽2 = 𝛽3 = 𝛽.
ANSWER
KCL-node “A” yields
KCL-node “B” yields
𝐼𝑅 = 𝐼𝐢1 + 𝐼𝐡3 = 𝐼𝐢 + 𝐼𝐡3
𝐼𝐸3 = 𝐼𝐡1 + 𝐼𝐡2 + 𝐼𝐢2 = 2𝐼𝐡 + 𝐼𝐢 = 2
from which we have
𝐼𝐢 = �
𝛽
�𝐼
2 + 𝛽 𝐸3
𝐼𝐢
2
+ 𝐼𝐢 = �1 + � 𝐼𝐢
𝛽
𝛽
But since the current relationship of a generic BJT is 𝐼𝐸 = 𝐼𝐡 + 𝐼𝐢 =
previous equation can be rewritten as
𝛽
1+𝛽
1+𝛽
𝐼𝐢 = �
οΏ½οΏ½
� 𝐼𝐢3 =
𝐼
2+𝛽
𝛽
2 + 𝛽 𝐢3
which, inserted into the equation KCL-node “A”, yields
3
𝐼𝐢
𝛽
1+𝛽
+ 𝐼𝐢 = �
𝛽
� 𝐼𝐢 , the
1+𝛽
1+𝛽
𝐼𝐢3
1+𝛽 1
𝛽 2 + 2𝛽 + 2
𝐼𝐢3 + 𝐼𝐡3 =
𝐼𝐢3 +
=οΏ½
+ � 𝐼𝐢3 =
𝐼
2+𝛽
2+𝛽
2+𝛽 𝛽
𝛽 2 + 2𝛽 𝐢3
𝛽
from which it follows
𝛽 2 + 2𝛽
𝐼
𝐼𝐢3 = 2
𝛽 + 2𝛽 + 2 𝑅
and, finally
1
𝐼𝐢3 = πΌπ‘œ =
𝐼𝑅
2
1+
𝛽(𝛽 + 2)
𝐼𝑅 =
Exercise n. 3
The transformer-coupled common emitter class-A amplifier, shown in Figure 13.17, couples the AC
load collector resistor from DC bias network, so that half of the DC supply power is no longer
dissipated by the resistor load, as it is in a standard commone emitter class-A amplifier. There is no
DC drop across the transformer so that the peak-to-peak output voltage will double.
The battery supplies a voltage 𝑉𝐢𝐢 = 12𝑉, the load resistor is an 8Ω speaker, the emitter resistor
values is 𝑅𝐸 = 100Ω, and the BJT collector quiescent current is 𝐼𝐢𝑄 = 30π‘šπ΄.
Determine the power supplied from the battery 𝑃𝑖(𝐷𝐢) , the DC power dissipated on the
transistor𝑃𝐡𝐽𝑇(𝐷𝐢) , on the emitter resistor 𝑃𝑅𝐸 (𝐷𝐢) , and the AC power used by the load π‘ƒπ‘œ(𝐴𝐢) .
Determine the conversion efficiency η =
π‘ƒπ‘œ(𝐴𝐢)
𝑃𝑖(𝐷𝐢)
of the amplifier too.
Consider an ideal loseless transformer.
VCC
R1
n1
n2
RC
CB
Rs
R2
RE
CE
+
vs
Figure 13.17 Transformer-coupled CE class-A amplifier
4
ANSWER
As usual, we can assume 𝐼𝐸𝑄 ≅ 𝐼𝐢𝑄 = 0.03𝐴. Consequently 𝑉𝐸𝑄 = 𝑅𝐸 𝐼𝐸𝑄 = 3𝑉 and 𝑉𝐢𝐸𝑄 = 𝑉𝐢𝐢 −
𝑉𝐸𝑄 = 9𝑉. The theoretical maximum swing of the output voltage across the BJT collector-emitter
terminals towards lower values is
βˆ†π‘‰πΆπΈ,π‘šπ‘Žπ‘₯−π‘‘π‘œπ‘€π‘› = 𝑉𝐢𝐸𝑄 − 𝑉𝐢𝐸(𝑆𝐴𝑇) = 9 − 0.2 = 8.8𝑉
and, to guarantee a symmetrical swing we can assume
βˆ†π‘‰πΆπΈ,π‘šπ‘Žπ‘₯−𝑒𝑝 = βˆ†π‘‰πΆπΈ,π‘šπ‘Žπ‘₯−π‘‘π‘œπ‘€π‘› = 8.8𝑉
Observation
The theoretical total voltage swing across the BJT collector-emitter terminals is
βˆ†π‘‰πΆπΈ,π‘šπ‘Žπ‘₯ = 𝑉𝐢𝐸𝑄 + βˆ†π‘‰πΆπΈ,π‘šπ‘Žπ‘₯−𝑒𝑝 = 17.8𝑉, which is higher than 𝑉𝐢𝐢 . This is according to
the BJT potentiality, but we have to consider the maximum available source power so that
the current will be lower accordingly.
The equivalent output resistance at the collector terminal 𝑅𝐢,π‘’π‘ž is
βˆ†π‘‰πΆπΈ,π‘šπ‘Žπ‘₯−𝑒𝑝
𝑅𝐢,π‘’π‘ž =
≅ 293Ω
𝐼𝐢𝑄
so that the transformer turn ratio is
𝑅𝐢,π‘’π‘ž
𝑛=οΏ½
≅ 8.6
𝑅𝐢
The maximum voltage swing across the speaker βˆ†π‘£π‘…πΆ is than
βˆ†π‘‰πΆπΈ,π‘šπ‘Žπ‘₯−𝑒𝑝
βˆ†π‘£π‘…πΆ =
≅ 1.03𝑉
𝑛
The DC power dissipated on the speaker is
βˆ†π‘£π‘…2𝐢
π‘ƒπ‘œ(𝐴𝐢) =
= 0.13π‘Š
2𝑅𝐢
The power supplied from the battery is
Pi(DC) = 𝑉𝐢𝐢 𝐼𝐢𝑄 = 0.36π‘Š
The power dissipated on the emitter resistor is
PRE (DC) = 𝑉𝐸𝑄 𝐼𝐸𝑄 = 0.09π‘Š
The power dissipated on the BJT is
PBJT(DC) = 𝑉𝐢𝐸𝑄 𝐼𝐢𝑄 = 0.27π‘Š
Finally, the conversion efficiency is
Po(AC)
η=
= 0.36
Pi(DC)
The η(%) = 36% result is lower than the theoretical 50% value for this configuration. Please, take
into account that there is a voltage drop across the emitter resistor and a non-zero value of 𝑉𝐢𝐸(𝑆𝐴𝑇) .
5
Exercise n. 4
Figure 13.18 shows an amplifier in a Cascode configuration. Consider the two BJTs being of
BC107 type, and the resistor values as follows:
𝑅𝑠 = 500Ω, 𝑅1 = 1.5π‘˜β„¦, 𝑅2 = 1.5π‘˜β„¦, 𝑅3 = 1.5π‘˜β„¦, 𝑅𝐢 = 4.7π‘˜β„¦, 𝑅𝐿 = 220Ω.
VCC
RC
R1
C3
C2
T2
R2
+
+
vo(CE)
C1
Rs
+
vl
T1
R3
RE
RL
CE
vs
Figure 13.18 Cascode amplifier
Determine the overall voltage gain.
ANSWER
Transistor 𝑇1 and transistor 𝑇2 are configured in a common-emitter and common-base network
respectively.
From the conversion Table 11.5 (see Section 11.3.5 in Chapter 11) we can write
β„Ž
β„Žπ‘–π‘ = 1+β„Žπ‘–π‘’ ≅ 15.94Ω,
β„Žπ‘œπ‘’
1+β„Žπ‘“π‘’
𝑓𝑒
= 0.12 ∗ 10−6 Ω−1 .
β„Žπ‘Ÿπ‘ =
β„Žπ‘–π‘’ β„Žπ‘œπ‘’
1+β„Žπ‘“π‘’
− β„Žπ‘Ÿπ‘’ = 25.8 ∗ 10−3 ,
β„Ž
β„Žπ‘“π‘ = − 1+β„Žπ‘“π‘’ = −0.996,
β„Žπ‘œπ‘ =
𝑓𝑒
Figure 13.18b shows the AC equivalent model of the cascade amplifier.
is
i b,I
Rs
+
vs
+
i c,I
hie
1
hoe
hrevo(CE) +
R23
vi
i e,II
+
v o(CE)=
=vi(CB)
hfe i b,I
-
1
hob
hrbvo(CE) +
-
E
Ri(tot) Ri(CE)
i c,II
hib
hfbi e,II
io
RC RL
+
vl
-
B
Ro(CE) Ri(CB)
Figure 13.18b AC equivalent model of the cascode amplifier
6
Ro(CB) Ro(tot)
The input resistance of the CB stage (Section 11.7.2.1 in Chapter 11) is
β„Žπ‘–π‘ + π‘…π‘™π‘œπ‘Žπ‘‘,𝐼𝐼 βˆ†β„ŽπΆπ΅
𝑅𝑖(𝐢𝐡) =
1 + π‘…π‘™π‘œπ‘Žπ‘‘,𝐼𝐼 β„Žπ‘œπ‘
with βˆ†β„ŽπΆπ΅ = β„Žπ‘–π‘ β„Žπ‘œπ‘ − β„Žπ‘“π‘ β„Žπ‘Ÿπ‘ and π‘…π‘™π‘œπ‘Žπ‘‘,𝐼𝐼 = 𝑅𝐢 ||𝑅𝐿 . Numerically 𝑅𝑖(𝐢𝐡) ≅ 16Ω.
Similarly, the input resistance of the CE stage (Section 11.4.2.2 in Chapter 11) is
β„Žπ‘–π‘’ + π‘…π‘™π‘œπ‘Žπ‘‘,𝐼 βˆ†β„ŽπΆπΈ
𝑅𝑖(𝐢𝐸) =
1 + π‘…π‘™π‘œπ‘Žπ‘‘,𝐼 β„Žπ‘œπ‘’
with βˆ†β„ŽπΆπΈ = β„Žπ‘–π‘’ β„Žπ‘œπ‘’ − β„Žπ‘“π‘’ β„Žπ‘Ÿπ‘’ and π‘…π‘™π‘œπ‘Žπ‘‘,𝐼 = 𝑅𝑖(𝐢𝐡) . Numerically 𝑅𝑖(𝐢𝐸) ≅ 4π‘˜β„¦.
The two previous results are necessary to determine the voltage gain of the two stages separately
and of the overall network too.
The voltage gain of the CB stage (Section 11.7.2.3 in Chapter 11) is
β„Žπ‘“π‘ π‘…π‘™π‘œπ‘Žπ‘‘,𝐼𝐼
𝐴𝑣(𝐢𝐡) = −
β„Žπ‘–π‘ + π‘…π‘™π‘œπ‘Žπ‘‘,𝐼𝐼 βˆ†β„ŽπΆπ΅
where π‘…π‘™π‘œπ‘Žπ‘‘,𝐼𝐼 = 𝑅𝐢 ||𝑅𝐿 . Numerically 𝐴𝑣(𝐢𝐡) ≅ 13.1.
Similarly, the voltage gain of the CE stage (Section 11.4.2.4 in Chapter 11) is
β„Žπ‘“π‘’ π‘…π‘™π‘œπ‘Žπ‘‘,𝐼
𝐴𝑣(𝐢𝐸) = −
β„Žπ‘–π‘’ + π‘…π‘™π‘œπ‘Žπ‘‘,𝐼 βˆ†β„ŽπΆπΈ
Numerically 𝐴𝑣(𝐢𝐸) ≅ −0.999.
The overall input resistance is
𝑅𝑖(π‘‘π‘œπ‘‘) = (𝑅2 ||𝑅3 )||𝑅𝑖(𝐢𝐸)
Numerically 𝑅𝑖(π‘‘π‘œπ‘‘) ≅ 630Ω.
The overall voltage gain is then
𝐴𝑣(π‘‘π‘œπ‘‘) = 𝛼𝑖 𝐴𝑣(𝐢𝐸) 𝐴𝑣(𝐢𝐡) =
𝑅𝑖(π‘‘π‘œπ‘‘)
𝐴
𝐴
≅ −7.3
𝑅𝑠 + 𝑅𝑖(π‘‘π‘œπ‘‘) 𝑣(𝐢𝐸) 𝑣(𝐢𝐡)
Observations
The hybrid parameter determinant βˆ†β„Ž can be neglected in many cases, because its common
value is less than one. For instance, the values it assumes for some commercial BJTs are as
in the following Table 13.1 (see Section 11.3.4 in Chapter 11 as reference).
BJT
BC107
BC107A
BC107B
BC108
BC108A
BC108B
BC108C
BC846A
BC846B
BC846C
hie
4,00E+03
3,00E+03
4,80E+03
5,50E+03
3,00E+03
4,80E+03
7,00E+03
2,70E+03
4,50E+03
8,70E+03
hre
2,20E-04
1,70E-04
2,70E-04
3,10E-04
1,70E-04
2,70E-04
3,80E-04
1,50E-04
2,00E-04
3,00E-04
hfe
250
190
300
370
190
300
500
220
330
600
hoe
3,00E-05
1,30E-05
2,60E-05
3,00E-05
1,30E-05
2,60E-05
3,40E-05
1,80E-05
3,00E-05
6,00E-05
βˆ†
0,07
0,01
0,04
0,05
0,01
0,04
0,05
0,02
0,07
0,34
Table 13.1 Hybrid parameter values for some commercially available BJTs
There is no voltage divider between the CE and CB stages.
7
The resistor R1 plays no rule in AC conditions having no AC voltage drop across it.
Exercise n. 5
Figure 13.19 shows the scheme of a differential amplifier in a simplified version.
VCC
RC
RC
T1
v0
T2
+
+
vi1
vi2
RE
-VEE
Figure 13.19 Simple differential amplifier network
Assuming two twin BJTs, and two twin collector resistors 𝑅𝐢 , determine the expression of the
CMRR value. For convenience, neglect the hybrid parameter values of β„Žπ‘Ÿπ‘’ and β„Žπ‘œπ‘’ .
ANSWER
𝐴
The CMRR value is defined as 𝐢𝑀𝑅𝑅 ≝ �𝐴𝐢 οΏ½, with 𝐴𝐢 the common voltage gain and 𝐴𝐷 the
𝐷
differential voltage gain, being the total voltage output
𝑣𝑖1 + 𝑣𝑖2
π‘£π‘œ = 𝐴𝐷 (𝑣𝑖1 − 𝑣𝑖2 ) + 𝐴𝐢 οΏ½
οΏ½
2
Let us start considering the expression for 𝐴𝐢 , to find which we can impose two twin common
!
!
𝑣
inputs as 𝑣𝑖1 =
⏞ 𝑣𝑖2 =
⏞ 𝑣𝑖,𝐢 , so that 𝐴𝐢 ≝ 𝑣 π‘œ . In such a way we can write
𝑖,𝐢
𝑣𝑖,𝐢 + 𝑣𝑖,𝐢
π‘£π‘œ = 𝐴𝐷 �𝑣𝑖,𝐢 − 𝑣𝑖,𝐢 οΏ½ + 𝐴𝐢 οΏ½
οΏ½ = 𝐴𝐢 𝑣𝑖,𝐢
2
The CMRR value has to be determine in AC conditions, so Figure 13.19b (a) and (b) represent two
AC equivalent models of the differential amplifier, with the only difference that in (b) the emitter
resistor is conveniently split into two parts with respect to (a). In such a way, the entire network can
be analyzed considering only its half-right part (being its left-part symmetrically the same).
8
RC
T1
v0
RC
RC
T2
T1
+
vi,C
v0
+
+
vi,C
RE
RC
T2
+
vi,C
vi,C
2RE
2RE
(a)
(b)
Figure 13.19b AC equivalent model of the simple differential amplifier network with common
voltage inputs, being in (a)a unique emitter resistor and in (b) the same resistor is spit into its
equivalent parallel version
Figure 13.19c shows the equivalent AC half-right part with the right BJT modelled by its hybrid
parameter representation.
ib
ic
hie
B
C
+
hfei b +
v be
v ce
+
v i,C
+
E
-
+
ie
2RE
RC
vo
ve
-
-
Figure 13.19c AC equivalent model of the half-right part of the differential amplifier with the BJT
replaced by its hybrid parameter equivalent representation
The output voltage value is
π‘£π‘œ = −𝑅𝐢 𝑖𝑐 = −𝑅𝐢 β„Žπ‘“π‘’ 𝑖𝑏
and KVL applied to the input loop yields
𝑣𝑖,𝐢 = β„Žπ‘–π‘’ 𝑖𝑏 + 2𝑅𝐸 𝑖𝑒 = β„Žπ‘–π‘’ 𝑖𝑏 + 2𝑅𝐸 �𝑖𝑏 + β„Žπ‘“π‘’ 𝑖𝑏 οΏ½
so that
β„Žπ‘“π‘’ 𝑅𝐢
π‘£π‘œ
𝐴𝐢 ≝
=−
𝑣𝑖,𝐢
β„Žπ‘–π‘’ + 2οΏ½1 + β„Žπ‘“π‘’ �𝑅𝐸
9
Observation
To reduce the value of 𝐴𝐢 , we have to admit the value of the emitter resistor 𝑅𝐸 as high as
possible. This is the reason to utilize a current source in place of 𝑅𝐸 (see Section 13.2).
𝑣
Now, we can determine the expression for 𝐴𝐷 ≝ 𝑣 π‘œ , being 𝑣𝑖,𝐷 the differential voltage input
𝑖,𝐷
applied halved and 180° out of phase at the two input terminals, 𝑣𝑖1 =
schematized in Figure 13.19d. In such a way we can write
𝑣𝑖1 + 𝑣𝑖2
π‘£π‘œ = 𝐴𝐷 (𝑣𝑖1 − 𝑣𝑖2 ) + 𝐴𝐢 οΏ½
οΏ½ = 𝐴𝐷 𝑣𝑖,𝐷
2
RC
T1
v i,D
2
𝑣𝑖,𝐷
2
and 𝑣𝑖2 = −
𝑣𝑖,𝐷
2
, as
RC
T2
v0
+
+
v i,D
2
Figure 13.19d AC equivalent model of the simple differential amplifier network with differential
voltage inputs
The study can be performed considering the AC equivalent model of the half-right side, as
schematized in Figure 13.19e
ib
ic
hie
B
+
v i,D
2
C
+
hfei b + RC +
v ce
vo
v be
E
Figure 13.19e AC equivaent model of the right-half side of the differential amplifier with one
differential voltage input
Voltage values across the output and input ports are
π‘£π‘œ = −𝑅𝐢 𝑖𝑐 = −𝑅𝐢 β„Žπ‘“π‘’ 𝑖𝑏
𝑣𝑖,𝐷
= β„Žπ‘–π‘’ 𝑖𝑏
−
2
10
so that
−𝑅𝐢 β„Žπ‘“π‘’ 𝑖𝑏 1 β„Žπ‘“π‘’
π‘£π‘œ
=
=
𝑅
𝑣𝑖,𝐷
−2β„Žπ‘–π‘’ 𝑖𝑏
2 β„Žπ‘–π‘’ 𝐢
Finally, we can write the requested CMRR value as
𝐴𝐢
1 β„Žπ‘–π‘’ + 2οΏ½1 + β„Žπ‘“π‘’ �𝑅𝐸 1 β„Žπ‘–π‘’ + 2β„Žπ‘“π‘’ 𝑅𝐸
𝐢𝑀𝑅𝑅 ≝ οΏ½ οΏ½ =
≅
𝐴𝐷
2
β„Žπ‘–π‘’
2
β„Žπ‘–π‘’
𝐴𝐷 ≝
11
I
Basi di elettronica
Exercise n. 1
Given the network shown in Figure 14.22, we have, for the source 𝑣𝑠 = 10π‘šπ‘‰, 𝑅𝑠 = 200Ω,, for
the amplifier 𝑅𝑖 = 1π‘˜β„¦, 𝐴𝑣 = 20, π‘…π‘œ = 500Ω , and for the load 𝑅𝐿 = 100Ω..
Determine the value of the output voltage π‘£π‘œ .
Rs
+
Ri
vi
vs
Ro
RL
Av vi
+
vo
Figure 14.22 Scheme of a generic network including a voltage amplifier
ANSWER
The voltage divider effect around the input loop yields
𝑅𝑖
𝑣𝑖 =
𝑣 ≅ 8.3π‘šπ‘‰
𝑅𝑖 + 𝑅𝑠 𝑠
The amplifier can furnish an output voltage equal to
𝐴𝑣 𝑣𝑖 = 20π‘₯8.3 ∗ 10−3 ≅ 0.16𝑉
which is reduced due to the loading effect to
𝑅𝐿
π‘£π‘œ =
𝐴 𝑣 ≅ 27.6π‘šπ‘‰
𝑅𝐿 + π‘…π‘œ 𝑣 𝑖
Exercise n. 2
(𝑖)
A voltage amplifier as a voltage gain of 𝐴𝑣 = 300. It is used to supply a voltage of 𝑣𝐿 = 2𝑉
across a load 𝑅𝐿 = 5π‘˜β„¦ . The available AC voltage source has a value of 𝑣𝑠 = 10π‘šπ‘‰ and an
inner resistance of 𝑅𝑠 = 500Ω, and it is capable of a peak current 𝑖𝑠 = 1πœ‡π΄.
Determine which input and output resistances are requested by the amplifier.
ANSWER
The requested network can be shematized as in Figure 14.22b.
is
ii
R
R
s
+
vs
o
iL
+
+
+
(i)
A v vi
vi
-
io
Ri
Figure 14.22b generic voltage amplifier
We want a peak current value of 𝑖𝑖 = 10πœ‡π΄, therefore
!
𝑣𝑠
𝑖𝑖 = 𝑖𝑠 =
=
⏞ 1πœ‡π΄
𝑅𝑠 + 𝑅𝑖
from which
1
vo
-
RL
Basi di elettronica
𝑣𝑠 − 𝑅𝑠 𝑖𝑠
𝑖𝑠
We can apply the current divider expressions to the input and output loops, obtaining
𝑅𝑖
𝑅𝐿
𝑅𝐿
(𝑖)
(𝑖)
𝑣𝐿 =
𝐴𝑣 𝑣𝑖 =
𝐴𝑣
𝑣
𝑅𝐿 + π‘…π‘œ
𝑅𝐿 + π‘…π‘œ
𝑅𝑖 + 𝑅𝑠 𝑠
from which
𝑅𝑖 =
(𝑖)
𝐴𝑣 𝑅𝑖 𝑅𝐿 𝑣𝑠 − 𝑅𝐿 (𝑅𝑖 + 𝑅𝑠 )𝑣𝐿
π‘…π‘œ =
(𝑅𝑖 + 𝑅𝑠 )𝑣𝐿
Numerically 𝑅𝑖 = 9500Ω; 𝑅0 = 2125Ω.
Exercise n. 3
Consider the double C.E.-swamped C.E. configuration as represented in Figure 14.23.
VCC
RC,I
R1,I
CB1
R2,I
+
CB3
CB2
Rs
vs
RC,II
R1,II
R2,II
RE,I
CE,I
RE1,II
RE2,II
CE,II
Figure 14.23 Double stage CE-swamped CE
The parameters β„Žπ‘Ÿπ‘’ and β„Žπ‘œπ‘’ , of both BJTs, are negligible. Determine the expressions of the
following:
 The input resistances of both stages and the overall input resistance
 The voltage gains of both stages and the overall voltage gain
ANSWER
Figure 14.23b shows the AC equivalent model of the circuit where, for convenience, resistors are
combined as 𝑅12,𝐼 = 𝑅1,𝐼 ||𝑅2,𝐼 and 𝑅12,𝐼𝐼 = 𝑅1,𝐼𝐼 ||𝑅2,𝐼𝐼 .
2
Basi di elettronica
i b,I
B
vs
i c,II
hie,II
hfe,Ii b,I
+
v be,I
+
i b,II
i c,I
hie,I
Rs
R12,I
-
+
hfe,IIi b,II
v be,II
v ce,I
E
-
B
C
+
RC,I
R12,II
-
+
C
v ce,II
E
+
ie
RE1,II
Ri,I
RC,II
vo
v e,II
-
Ri
+
-
Ri,II
Figure 14.23b AC equivalent model of the double stage CE-swamped CE
For the first CE stage, according to results obtained in Section 11.4.2.2, and in Section 11.4.2.4, in
Chapter 11, neglecting the hybrid parameters β„Žπ‘Ÿπ‘’ and β„Žπ‘œπ‘’ as requested, we can write:
𝑅𝑖𝐡𝐽𝑇,𝐼 = β„Žπ‘–π‘’,𝐼
β„Žπ‘“π‘’,𝐼
𝐴𝑣𝐡𝐽𝑇,𝐼 = −
𝑅
β„Žπ‘–π‘’,𝐼 π‘™π‘œπ‘Žπ‘‘,𝐼
where π‘…π‘™π‘œπ‘Žπ‘‘,𝐼 = 𝑅𝐢,𝐼 ||𝑅𝑖,𝐼𝐼 = 𝑅𝐢,𝐼 ||𝑅12,𝐼𝐼 ||𝑅𝑖𝐡𝐽𝑇,𝐼𝐼 .
Similarly, for the second swamped-CE stage, according to the results obtained in Section 11.5.2.2
and Section 11.5.2.3, in Chapter 11, we can write:
𝑅𝑖𝐡𝐽𝑇,𝐼𝐼 = β„Žπ‘–π‘’,𝐼𝐼 + οΏ½1 + β„Žπ‘“π‘’,𝐼𝐼 �𝑅𝐸1,𝐼𝐼 ≅ β„Žπ‘–π‘’,𝐼𝐼 + β„Žπ‘“π‘’,𝐼𝐼 𝑅𝐸1,𝐼𝐼
β„Žπ‘“π‘’,𝐼𝐼 π‘…π‘™π‘œπ‘Žπ‘‘,𝐼𝐼
𝐴𝑣𝐡𝐽𝑇,𝐼𝐼 = −
β„Žπ‘–π‘’,𝐼𝐼 + β„Žπ‘“π‘’,𝐼𝐼 𝑅𝐸1,𝐼𝐼
where π‘…π‘™π‘œπ‘Žπ‘‘,𝐼𝐼 = 𝑅𝐢,𝐼𝐼 .
The overall input resistance is
𝑅𝑖 = 𝑅12,𝐼 ||𝑅𝑖𝐡𝐽𝑇,𝐼 = 𝑅12,𝐼 ||β„Žπ‘–π‘’,𝐼
The overall voltage gain has to take into account the input voltage divider effect, so that
𝐴𝑣 = 𝛼𝑖,𝐼 𝐴𝑣,𝐼 𝐴𝑣,𝐼𝐼
(no voltage divider effect is between the two stages). Therefore
β„Žπ‘“π‘’,𝐼𝐼
𝑅𝑖 β„Žπ‘“π‘’,𝐼
𝐴𝑣 =
�𝑅𝐢,𝐼 ||𝑅12,𝐼𝐼 ||οΏ½β„Žπ‘–π‘’,𝐼𝐼 + β„Žπ‘“π‘’,𝐼𝐼 𝑅𝐸1,𝐼𝐼 οΏ½οΏ½
𝑅
𝑅𝑖 + 𝑅𝑠 β„Žπ‘–π‘’,𝐼
β„Žπ‘–π‘’,𝐼𝐼 + β„Žπ‘“π‘’,𝐼𝐼 𝑅𝐸1,𝐼𝐼 𝐢,𝐼𝐼
Exercise n. 4
Consider the double C.S.- C.S. configuration as represented in Figure 14.24.
3
Basi di elettronica
VDD
RD1
RD2
CB1
CB2
+
CB3
CS1
CS2
vi
+
vo
RS1
RG1
RS2
RG2
Figure 14.24 Double stage CS-CS
Determine the expressions of the following:
 The overall input resistance
 The overall voltage gain
 The overall output resistance
ANSWER
As usual, in two-stage transistor amplifier the voltage gain of the first stage is decreased by the
load effect due to the input impedance of the second stage. However, the input impedance of the
second stage is theoretically infinite, so that in the case of MOS type transistor amplifier the
loading effect of the first stage is practically negigible. The loading effect of the second stage
depends on the amplifier’s load.
Figure 14.24b shows the AC equivalent model of the double stage CS-CS amplifier.
i d,II
i d,I
+
vi
-
Ri,I
G
RG,I
gm,Ivgs,I
+
v gs,I
-
S
D
r o,I
+
v ds,I
G
RD,I RG,II
+ gm,IIvgs,II
v gs,II
-
-
S
D
+
+
r o,II v ds,II v o
RD,II
-
Ri,II Ro,I
Ro,II
Figure 14.24b AC equivalent model of the double stage CS-CS amplifier
For the first CS stage, according to results obtained in Section 12.2.2.1, in Section 12.2.2.2, and in
Section 12.2.2.3 in Chapter 11, we can write:
𝑅𝑖,𝐼 = 𝑅𝐺,𝐼
π‘…π‘œ,𝐼 = π‘Ÿπ‘œ,𝐼 ||𝑅𝐷,𝐼
𝐴𝑣,𝐼 = −π‘”π‘š,𝐼 οΏ½π‘Ÿπ‘œ,𝐼 ||𝑅𝐷,𝐼 ||𝑅𝐺,𝐼𝐼 οΏ½
Similarly, for the second CS stage, we can write
4
Basi di elettronica
𝑅𝑖,𝐼𝐼 = 𝑅𝐺,𝐼𝐼
π‘…π‘œ,𝐼𝐼 = π‘Ÿπ‘œ,𝐼𝐼 ||𝑅𝐷,𝐼𝐼
𝐴𝑣,𝐼𝐼 = −π‘”π‘š,𝐼𝐼 οΏ½π‘Ÿπ‘œ,𝐼𝐼 ||𝑅𝐷,𝐼𝐼 οΏ½
The overall input resistance corrsponds to the one of the first stage
𝑅𝑖 = 𝑅𝑖,𝐼
The overall output resistance corresponds to the one of the second stage
π‘…π‘œ = π‘…π‘œ,𝐼𝐼
The overall voltage gain is
𝐴𝑣 = 𝐴𝑣,𝐼 𝐴𝑣,𝐼𝐼 = π‘”π‘š,𝐼 οΏ½π‘Ÿπ‘œ,𝐼 ||𝑅𝐷,𝐼 ||𝑅𝐺,𝐼𝐼 οΏ½π‘”π‘š,𝐼𝐼 οΏ½π‘Ÿπ‘œ,𝐼𝐼 ||𝑅𝐷,𝐼𝐼 οΏ½
since there is no voltage divider effect.
5
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ISBN: 978-1-4665-8204-0
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