AIR UNIVERSITY
DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING
EXPERIMENT NO 12
Lab Title: Introduction to trainer: Identifying discrete logic gates, IC’s, Pin configurations
Student Name:Abdul Waseh
Reg. No:210584
Objective: To demonstrate the operation and characteristics of typical discrete components like logic switches.
LED indicators, especially the various operations of the Digital Trainer Kit.
LAB ASSESSMENT:
Attributes
Excellent
(5)
Good
(4)
Average
(3)
Satisfactory
(2)
Unsatisfactory
(1)
Ability
to
Conduct
Experiment
Ability to assimilate the
results
Effective
use of lab
equipment and follows the
lab safety rules
Total Marks:
Obtained Marks:
LAB REPORT ASSESSMENT:
Attributes
Excellent
(5)
Good
(4)
Average
(3)
Satisfactory
(2)
Data presentation
Experimental results
Conclusion
Total Marks:
Date:12/21/2022
Obtained Marks:
Signature:
Unsatisfactory
(1)
EXPERIMENT NO 12
Introduction to trainer: Identifying discrete logic gates, IC’s, Pin configurations
Objective:
To demonstrate the operation and characteristics of typical discrete components like logic
switches, LED indicators, especially the various operations of the Digital Trainer Kit.
Apparatus:
 Function generators
 Oscilloscope
 Power Supply
 74LS08
 74LS032
 74LS04
 74LS00
 74LS02
Background:
A logic gate is a circuit which has one or more inputs and single output. A logic gate is an
elementary building block of a digital circuit. Most logic gates have two inputs and one output. At
any given moment, every terminal is in one of the two binary conditions low (0) or high (1),
represented by different voltage levels. The logic state of a terminal can, and generally does,
change often, as the circuit processes data. In most logic gates, the low state is approximately zero
volts (0 V), while the high state is approximately five volts positive (+5 V).
For TTL 0 - 0.8V corresponds to ‘0’ logic level and 2 – 5V corresponds to ‘1’ logic level.
Procedure:
Connect the circuit according to the pin configuration of the ICs as mentioned in the datasheets
and check the truth tables
Fig1.1:Gate Symbols
1) Verify the truth tables of all the ICs specified:

74LS08 (AND Gate):
Y=A.B
Fig1.2:PIN Configuration of 74LS08
Tab1.1:Truth Table

Input
Output
A
B
Y=A.B
0
0
0
0
1
0
1
0
0
1
1
1
74LS32 (OR Gate):
Y=A+B
Fig1.3: PIN Configuration of 74LS00
Tab1.2: Truth Table of OR Gate
Input

Output
A
B
Y=A+B
0
0
0
0
1
1
1
0
1
1
1
1
74LS04 (NOT Gate):
¯
Y=𝑨
Fig1.4: PIN Configuration of 74LS04
Tab1.3: Truth Table of NOT
Input
Output
A
¯
Y= 𝑨
0
1
1
0

74LS00 (NAND Gate):
Y=¯𝑨¯¯. ¯𝑩¯
Fig1.5: PIN Configuration of 74LS00
Tab1.4: Truth Table of NAND

Input
Output
A
B
Y=¯𝑨¯¯. ¯𝑩¯
0
0
1
0
1
1
1
0
1
1
1
0
74LS02(NOR Gate):
Y=¯𝑨¯¯+̄¯¯¯𝑩¯
Fig1.6: PIN Configuration of 74LS02
Tab1.5:Truth Table of NOR
Input
Output
Y=¯𝑨¯¯+̄¯¯¯𝑩¯
A
B
0
0
1
0
1
0
1
0
0
1
1
0
Question 2:

Implement the following circuit on bread board

Construct the truth table

Identify the type of gate constructed
TRUTH TABLE:
A
B
C=A+B (BAR)
1,1
1,0
0,1
0,0
1,1
1,1
1,0
0,0
1
1
1
0
Type of gate:
AND GATE