EEE440
Computer Architecture
Lecture 1: Introduction and Basics
Dr. Haroon Ahmed Khan (Assistant Professor)
217, Academic Block 1
haroon.ahmed@comsats.edu.pk
Course Description
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Fundamentals of computer design including
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current technology/cost trends,
quantitative design principles,
measuring & reporting performance,
review of instruction set architecture,
memory hierarchy design and performance issues including
cache and virtual memory design,
Instruction level parallelism (ILP) using hardware approaches
to implement and software approaches to exploit it,
Data level parallelism (DLP) in Vector, SIMD and GPU
architectures &
Thread level parallelism (TLP) with centralized, synchronized
and distributed memory sharing.
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Course Learning Outcomes (CLOs)
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At the completion of the course, the student should be:
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Understanding the fundamentals of computer architecture &
Instruction Set Architectures (C2-PLO1)
Analyse various memory architectures for improving
performance (C4-PLO2)
Compare various hardware and software approaches to
improve instruction level parallelism (C4-PLO2)
Analyse the techniques to implement data level and thread
level parallelism (C4-PLO2)
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Textbook
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Computer Architecture: A
Quantitative Approach by
Hennessy & Patterson
Morgan & Kauffman Series
(5th Edition or 6th Edition)
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Recommended Reading:
 1. Digital
Design and Computer
Architecture by Harris. D and Harris,
S, 2012, 2nd Edition
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2. Modern
Processor
Design:
Fundamentals
of
Superscalar
Processors by Shen & Lipasti
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View of an Architect
SOFTWARE
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How does an assembly
program end up executing as
digital logic?
What happens in-between?
How is a computer designed
using logic gates and wires
to satisfy specific goals?
Architect/microarchitect’s view:
How to design a computer that
meets system design goals.
Choices critically affect both
the SW programmer and
the HW designer
HARDWARE
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The Power of Abstraction
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Levels of transformation create abstractions
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Abstraction improves productivity
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Abstraction: A higher level only needs to know about the
interface to the lower level, not how the lower level is
implemented
E.g., high-level language programmer does not really need to
know what the ISA is and how a computer executes instructions
No need to worry about decisions made in underlying levels
E.g., programming in Java vs. C vs. assembly vs. binary vs. by
specifying control signals of each transistor every cycle
Then, why would you want to know what goes on
underneath or above?
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Levels of Transformation
“The purpose of computing is insight” (Richard Hamming)
We gain and generate insight by solving problems
How do we ensure problems are solved by electrons?
Problem
Algorithm
Program/Language
Runtime System
(VM, OS, MM)
ISA (Architecture)
Microarchitecture
Logic
Circuits
Electrons
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Crossing the Abstraction Layers
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Two key goals of this course are
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to understand how a processor works underneath the
software layer and how decisions made in hardware affect the
software/programmer
to enable you to be comfortable in making design and
optimization decisions that cross the boundaries of different
layers and system components
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Move to multi-processor
RISC
Introduction
Single Processor Performance
Introduction
Single Processor Performance
Single Processor Performance
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“Old” view of computer architecture:
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Instruction Set Architecture (ISA) design
i.e. decisions regarding:
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registers, memory addressing, addressing modes,
instruction operands, available operations, control flow
instructions, instruction encoding
“Real” computer architecture:
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Specific requirements of the target machine
Design to maximize performance within constraints:
cost, power, and availability
Includes ISA, microarchitecture, hardware
Defining Computer Architecture
Defining Computer Architecture
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Personal Mobile Device (PMD)
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Desktop Computing
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Emphasis on availability, scalability, throughput
Clusters / Warehouse Scale Computers
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Emphasis on price-performance
Servers
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e.g. start phones, tablet computers
Emphasis on energy efficiency and real-time
Used for “Software as a Service (SaaS)”
Emphasis on availability and price-performance
Sub-class: Supercomputers, emphasis: floating-point performance
and fast internal networks
Embedded Computers
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Emphasis: price
Classes of Computers
Classes of Computers
Crossing the Abstraction Layers
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As long as everything goes well, not knowing what happens
in the underlying level (or above) is not a problem.
What if
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What if
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The program you wrote is running slow?
The program you wrote does not run correctly?
The program you wrote consumes too much energy?
The hardware you designed is too hard to program?
The hardware you designed is too slow because it does not provide the
right primitives to the software?
What if
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You want to design a much more efficient and higher performance
system?
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Single Processor Architecture
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Cannot continue to leverage Instruction-Level
parallelism (ILP)
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New models for performance:
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Single processor performance improvement ended in
2003 as far as Instruction Set Architectures are
concerned
Data-level parallelism (DLP)
Thread-level parallelism (TLP)
Request-level parallelism (RLP)
These require explicit restructuring of the
application
Introduction
Current Trends in Architecture
Multiprocessor Architecture(s)
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Classes of parallelism in applications:
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Data-Level Parallelism (DLP)
Task-Level Parallelism (TLP)
Classes of parallelism in architecture :
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Instruction-Level Parallelism (ILP)
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Vector architectures/Graphic Processor Units (GPUs)
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One instruction on many data items in tandem
Thread-Level Parallelism
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Pipelining and speculative execution
Task level parallelism working with parallel threads of data
Request-Level Parallelism
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Parallel tasks that are independent of on another
Classes of Computers
Parallelism
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Single instruction stream, single data stream (SISD)
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Single instruction stream, multiple data streams (SIMD)
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Multiple instruction streams, single data stream (MISD)
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Vector architectures
Multimedia extensions
Graphics processor units
No commercial implementation
Multiple instruction streams, multiple data streams (MIMD)
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Tightly-coupled MIMD
Loosely-coupled MIMD
Classes of Computers
Flynn’s Taxonomy
Classes of Computers
Flynn’s Taxonomy
Computer Architecture Today
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Today is a very exciting time to study computer architecture
Industry is in a large paradigm shift (to multi-core and
beyond) – many different potential system designs possible
Many difficult problems motivating and caused by the shift
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Power/energy constraints  multi-core?
Complexity of design  multi-core?
Difficulties in technology scaling  new technologies?
Memory wall/gap
Reliability wall/issues
Programmability wall/problem
Huge hunger for data and new data-intensive applications
No clear, definitive answers to these problems
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Computer Architecture Today (II)
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These problems affect all parts of the computing stack – if
we do not change the way we design systems
Many new demands
from the top
(Look Up)
Problem
Algorithm
Program/Language
Runtime System
(VM, OS, MM)
User
Fast changing
demands and
personalities
of users
(Look Up)
ISA
Microarchitecture
Many new issues
at the bottom
(Look Down)
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Logic
Circuits
Electrons
No clear, definitive answers to these problems
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