Design of Hazard free
circuits
z
MADHUMITHA R V
2021105525
THEJESVINII T
2021105554
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What are hazards in digital circuits?
A hazard in a digital circuit is a temporary disturbance in ideal
operation of the circuit which if given some time, gets resolved itself.
These disturbances or fluctuations occur when different paths from
the input to output have different delays and due to this fact, changes
in input variables do not change the output instantly but do appear at
output after a small delay caused by the circuit building elements,
i.e., logic gates.
There are three different kinds of hazards found in digital circuits:

Static hazard

Dynamic hazard

Functional hazard
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WHAT IS HAZARD FREE CIRCUITS?
A DeMorgan circuit is hazard-free if and only if the circuit produces
(purely syntactically) all prime implicants as well as all prime
implicates of the Boolean function it computes.
DeMorgan Law:
The complement of the product of all the terms is equal
to the sum of the complement of each term.
(A+B)’=A’.B’
(A.B)’=A’+B’
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REMOVE THE HAZARD

Step-1: Tabulate the output of the function using truth table , say Y.

Step-2: Draw the K-map for this function Y and note all adjacent
1’s.

Step-3: If there exists any pair of cells with 1’s which do not occur
to be in the same group ( i.e. prime implicant), it indicates the
presence of a static-1 hazard. Each such pair is a static-1 hazard.
Similarly for Static-0 Hazards we need to consider 0’s instead of 1’s
and if any adjacent 0’s in K-map are not grouped into same group that
may cause a static-0 hazard
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Design a hazard free circuit
K-map:
P/QR
00
0
1
01
11
10
1
1
1
1
F(P,Q,R) = PR’+QR = m{3,4,6,7}
P
Q
R
PR’+QR
0
0
0
0
0
0
1
0
0
1
0
0
0
1
1
1
1
0
0
1
1
0
1
0
1
1
0
1
1
1
1
1
Static 1 Hazard is due to extra combination of 1 in the k-map.
This can be avoided by adding a function to F(P,Q,R), the function can be choosed by
the combination of the ones, here the function is PQ
This does not make any changes in the output the circuit but fluctuation can be avoided
Therefore the resulting circuit is: F(P,Q,R) = PR’+QR+PQ = m{3,4,6,7}
Static-0-Hazard:
Design a logic combinational circuit that is hazard free of static-0-hazard for the function
F(A,B,C)=(A’+B’)(B+C)=Y
K-map:
A’+C
A/BC
00
0
0
1
0
C+B
01
11
0
10
0
A’+B’
The function is:
F(A,B,C)=(A’+B’)(B+C)(A’+C)=Y
A
B
C
Y
0
0
0
0
0
0
1
1
0
1
0
1
0
1
1
1
1
0
0
0
1
0
1
1
1
1
0
0
1
1
1
0
Circuit Diagram:
THANK YOU