Advertise (https://aspencore.com/media-guide-request/) News Login (https://www.powerelectronicsnews.com/login/) GaN Devices Design for (https://www.powerelectronicsnews.com/) 27:38 Sign Up (https://www.powerelectronicsnews.com/register/) Transcript (https://www.powerelectronicsnews.com/podcasts/gan-devices-design-for-high-voltages/) Podcasts (https://www.powerelectronicsnews.com/category/podcast) Focus Assemblies & Cables Automotive Components & Devices Consumer Design Energy Harvesting Motion Control Semiconductors Test & Measurement Thermal Management Aerospace & Defense Industrial Lighting Rated 4.5/5 by 50,000+ Users Technical Articles PowerUP PowerUP 2020 Best Cloud Helpdesk Software With 462% ROI & Less Than 3 Month Pay Back Period. Try Now! eBooks Webinar & Podcast Editorial Newsletter PowerUP 2021 Power Supplies & Energy Storage Opinion Forum PEN eBooks Special Projects Conference Proceedings Podcasts Smart/Renewable Energy Tutorials Webinars Open Freshdesk PowerUP 2022 Sign Up Login Advertisement Technical Articles (https://www.powerelectronicsnews.com/category/technical-article/) Improving the SiC Wafer Process eBooks Technic (https:/ article/ PEN eBook July 2022 – PowerUP: The m/penNext Step in the Evolution of Power SiC, a semiconductor compound consisting of silicon and carbon, belongs to the wide-bandgap family of materials. Electronics PEN e Its physical bond is very strong, giving the semiconductor a high mechanical, chemical, and thermal stability. (https://www.powerelectronicsnews.com/power Bandg the-next-step-in-the-evolution-of(https power-electronics/) bandg August 19, 2021 Maurizio Di Paolo Emilio (https://www.powerelectronicsnews.com/author/maurizio/) Advertisement July 6, 2022 Maurizio Di Paolo Emilio (https://www.powerelectronicsnews.com/author/maurizio/) May 3 (https:// The July 2022 edition of the Power Electronics The Ma News eBook includes insights on WBG semiconductors, energy trends, and power News e semico design aspects. vehicle The importance of silicon carbide in markets such as e-mobility and new energy has prompted many companies to review and invest in wafer technology to define development plans in line with the demand. X-Trinsic is a company that aims to improve the manufacturing process and focuses on accelerating the adoption of products in the SiC field as quickly as possible. X-Trinsic was founded by Dennis Ricco, CEO and EVP of customer operations, and Dr. Robert Rhoades, president and CTO, with the explicit purpose of providing services focused on the SiC market. These services fall into three categories: 1. Wafering (all process steps to transform a solid puck of SiC into epi-ready or device-ready prime wafers) 2. SiC wafer reclaim to restore certain engineering or off-spec wafers to a usable state 3. Technical or business consulting on a wide range of topics. In an interview with Power Electronics News, Dr. Robert Rhoades highlighted the steps of fabrication for SiC wafers and the importance of solid background knowledge for those working in this field, concerning not only electrical engineering but also materials science. “It’s critical to have a good, diverse team with the goal of understanding the properties of the material and how to design devices and circuits — and then systems — to be built with this unique material,” said Rhoades. “You need people who understand how to develop modules and systems and assemblies leveraging the properties of silicon carbide and the device’s characteristics in the best way at the system level. It’s very useful for engineers and technologists to have a broad broad perspective to understand the whole technology.” Advertisement SiC (https://www.powerelectronicsnews.com/?s=SiC+devices) demand is rapidly growing in three major markets: discrete power devices for energy efficiency (MOSFETs and diodes); power inverters and regulators (in electric vehicles, charging stations, data centers, wind and solar generators, etc.); and 5G communications (mobile phones and base stations which include both SiC devices and high-speed GaN-on-SiC devices (https://www.eeweb.com/formula-e-using-sic-technologyfor-power-inverters/)). Silicon carbide SiC, a semiconductor compound consisting of silicon and carbon, belongs to the wide-bandgap family of materials. Its physical bond is very strong, giving the semiconductor a high mechanical, chemical, and thermal stability. The wide bandgap and high thermal stability allow SiC devices to be used at junction temperatures higher than those of silicon, even over 200°C. The main advantage offered by SiC in power applications is its low drift region resistance, which is a key factor for high-voltage power devices. SiC wafer fabrication is a delicate process. Not all wafers are ideal for final solutions such as diodes and MOSFETs. Rhoades pointed out that wafer reclaim is a very interesting process being offered by X-Trinsic. “If a device manufacturer or engineering team has a batch of wafers that they’ve used for engineering tests and can’t be used for devices, you can reclaim them by removing any damaged surface layer and then repolishing to restore a device-ready surface at a much lower cost than buying a new wafer,” he said. What’s more, as the industry continues to grow, and more wafers are processed by more companies, there will be an increasing demand for wafer reclaim, as well as process optimization. Silicon technology is different from SiC technology, so processes that work well for silicon will almost certainly have to be redeveloped for SiC. The test and fabrication techniques for these high-voltage devices can be very different from what an automated test company might be used to with silicon devices. An example of a process for fabricating SiC wafers is displayed in Figure 1. Advertisement Search Form: Search … All Categories All Tags Search Figure 1: SiC wafer-processing sequence (Source: X-Trinsic) Featured Artice “Slicing SiC is very different than silicon wafers because the material is so hard, so you must adapt your slicing method. It (https://www.powerelectronicsnews.com/pen-ebooktakes 10× or 20× longer to slice a SiC puck than a silicon boule of the same diameter, so adapting the type of wire, the october-2022-boosting-power-density-in-battery-suppliedtension, the feed rate, etc., are all important things to optimize in silicon carbide slicing,” said Rhoades. “Another option is bldc-and-pmsm-motor-control-applications/) to adopt the newer laser-splitting techniques, but many customers are reporting some technical issues. Whichever method you choose, you just have to go through the engineering and the development work to adapt it for your particular silicon carbide boules. Edge grind is not as much of a radical change from silicon. The shaping step can be a eBooks (https://www.powerelectronicsnews.com/category/ebook/) Technical Articles choice between lapping or surface grinding, especially on 150-mm and smaller wafers. Double-side lapping has some (https://www.powerelectronicsnews.com/category/technicalarticle/) issues that make single-side lapping more attractive and a lot of people find it a little bit easier. It takes longer because you may have to run the wafer twice, but there are some advantages. Each customer needs to make lots of decisions PEN eBook October 2022 – Boosting Power Density in depending on how tightly they want to control the edge profile and other choices on cost and throughput. It’s a very Battery-Supplied BLDC and PMSM Motor Control complex set of process steps leading up to the final polishing step. However, the choices you make at wafer shaping steps Applications (https://www.powerelectronicsnews.com/penwill impact how much you have to remove at polish. If you do a very, very fine grinding wheel for the final step in a surface ebook-october-2022-boosting-power-density-ingrind, you might need to remove less material at polish than, for example, coming off a lapping system. “After polishing, there are different opinions on how many steps and what kinds of cleaning chemistry and chemical baths are needed, but it’s somewhat similar to a traditional prime silicon final cleaning sequence,” he added. When needed, the thickness and dopant level of an epitaxial layer depends on what kind of device you are trying to make, especially what operating voltage you want to. You may be able to build the devices directly on the SiC wafer or you may need to grow an epitaxial layer, especially for 600-, 900-, 1,200-V, and higher voltages. “X-Trinsic will work with partner companies that can do epitaxy,” said Rhoades. “Many customers may prefer to do their own epitaxy so that they can keep the doping profile as a trade secret rather than share those details in technical specifications to an outside supplier.” The slicing process can take many hours to cut through a boule of SiC, but you can slice multiple wafers simultaneously (multi-wire saw) and get 10 to 20 wafers or more in a single process run. “Usually, it takes as much as 16 or 20 hours to get all the way through. Some new wiresaw technologies are being developed around diamond-coated wire; that might cut the slicing time down to about one-fourth, so maybe four hours to get all the way through but there are some control and TTV issues to consider,” said Rhoades. “Laser splitting generally takes about the same average amount of time per wafer and there’s an additional step required to smooth off the surface of the puck before you can do another laser split.” battery-supplied-bldc-and-pmsm-motor-controlapplications/) October 4, 2022 Maurizio Di Paolo Emilio (https://www.powerelectronicsnews.com/author/maurizio/) The October 2022 edition of the Power Electronics News eBook includes insights on modern battery-powered motor products design and more! Sign up for our weekly Newsletter (/register) Process time and throughput vary greatly among the process steps in the wafering sequence. Edge grind is one of the shortest steps at somewhere between 5 and 10 minutes per wafer. Dr. Rhoades commented that there are many assumptions around lapping and surface-grinding approach, and they depend on how many wafers you are willing to run per batch. “Let’s assume you have a standard or typical batch size of 12 to 16 wafers per batch, and it takes a couple of hours for the lapping and post-lap cleaning process to complete,” he said. “Surface grinding is faster, about 5 to 10 minutes per wafer, and if something goes wrong you will only lose 1 or 2 wafers instead of losing the entire batch in the last couple of years, grind wheel manufacturers have really focused on silicon carbide to reduce the grind time, and so the (https://www.eetimes.com/podcast/power-up/) process times per wafer are still coming down.” Polishing is similar to lapping; it takes up to a couple of hours per batch. Typical production cleaning lines have throughputs that are in the 20 to 50 wafers per hour, depending on the size of the batch tanks, so this step is not generally a capacity bottleneck. The need for an epitaxial layer, and the associated thickness and dopant profile, is part of the device designer’s decision. It relates primarily to the voltage at which the device needs to operate. “The reason we consider epitaxy as optional is that some devices require an epitaxial layer and some devices don’t,” said Rhoades. “So it depends on the type of device that the customer intends to build, whether they need epitaxy or not. If epitaxy is needed, the process generally takes anywhere from 30 minutes to several hours per wafer. The thicker the layer, the longer it takes to grow.” Standard wafers Rhoades noted that the majority of current wafer production is either 100-mm or 150-mm diameter (typical 300- or 350µm thickness). Both are in very strong demand, but 150 mm is where most of the growth is currently taking place in the industry. Some companies have started to adopt new processing methods for 150 mm, such as laser splitting instead of wiresaw. “So there is a big competition in the industry right now to see which method is better for 150mm wafers, and at the same time, the industry is trying very hard to get to a 200-mm wafer diameter,” said Rhoades. The 200 mm wafer size is desirable not only because you can produce more devices on each wafer, but also because it potentially enables customers to retool some fabs currently running older generations of silicon technology. The opportunity to leverage that installed device fabrication capacity would pave the way for many more SiC devices to be built, ensuring strong adoption and driving the EV market. Login Username* Password* Remember Me LOGIN Register (https://www.powerelectronicsnews.com/register/) Forgot Password? (/password-recovery) Recent Comments Marc on Active shunts to accurately measure currents in high-power industrial and automotive applications (https://www.powerelectronicsnews.com/active-shunts-toaccurately-measure-currents-in-high-power-industrial-andautomotive-applications/#comment-5443) Frederick Klatt (http://best%20electric%20machine) “There’s a lot of push from a lot of companies to try to get to 200-mm silicon carbide, and so far, two companies have announced they are able to produce 200mm wafers,” said Rhoades. “These are Cree and II-VI, but they are not yet selling on the open market. They are using all their production capacity for internal development and internal use. Also, ST has recently announced that it can now grow 200-mm silicon carbide.” on Why the Cost of Energy Is Key to Sustainability (https://www.powerelectronicsnews.com/why-the-cost-of-energyis-key-to-sustainability/#comment-5440) One of the interesting process implications of getting to 200 mm diameter wafers is that batch lapping and batch polishing are much lower throughput due to simple geometry. Unlike 100mm or 150mm wafers which may have 12 or 16 wafers per batch or more, you get only three or four of the 200mm wafers per batch. “And so the economics start to strongly favor a single-wafer approach, namely a single-wafer grinder and single-wafer polisher,” said Rhoades. “Not only do you get better control over each wafer, but you also actually get higher throughput out of the system because you can run the processes more aggressively on a single-wafer tool than you can on a batch tool.” Vertical GaN (https://www.powerelectronicsnews.com/reinventing-power-electronics-nexgen-power-systems-with-vertical- SiC is usually much thinner than a standard silicon wafer, by roughly 50%, and it is very prone to cracking and chipping. This requires that most process equipment needs to be redesigned to reduce the risk of breakage for SiC. Frederick Klatt (http://www.bestelectricmachine.com) on Re-inventing Power Electronics NexGen Power Systems with gan/#comment-5435) Alejo Tumbaga (http://iglesianicristo,net/about-us/) on Addressing Challenges with Moore’s Law in a More-than-Moore World (https://www.powerelectronicsnews.com/addressingchallenges-with-moores-law-in-a-more-than-mooreworld/#comment-5427) SiC is itself a green product in terms of electrical efficiency in the systems in which it is used. However, the production process for growing SiC boules requires a lot of energy, and many companies are working on using only clean energy whenever possible. In addition, very high growth temperatures above 2,000°C imply considerable energy and safety control systems. Fortunately, the system-level efficiency gains of SiC devices over the lifetime of the end use products are more than sufficient to pay back the energy investment required to grow and process the initial SiC material. (https://bit.ly/3nEOYld) Maurizio Di Paolo Emilio News (https://www.powerelectronicsnews.com/author/maurizio/) (https://www.powerelectronicsnews.com/) Maurizio Di Paolo Emilio has a Ph.D. in Physics and is a Telecommunications Engineer. He has worked on various international projects in the field of gravitational waves research designing a thermal compensation system, x-ray Focus microbeams, and space technologies for communications and motor control. Since 2007, he has collaborated with several Italian and English blogs and magazines as a technical writer, specializing in electronics and technology. From 2015 to 2018, Assemblies & Cables Automotive Components & Devices Consumer Design Energy Harvesting Motion Control Power Supplies & Energy Storage he was the editor-in-chief of Firmware and Elettronica Open Source. Maurizio enjoys writing and telling stories about Power Semiconductors Test & Measurement Thermal Management Aerospace & Defense Industrial Lighting Electronics, Wide Bandgap Semiconductors, Automotive, IoT, Digital, Energy, and Quantum. Maurizio is currently editor-inchief of Power Electronics News and EEWeb, and European Correspondent of EE Times. He is the host of PowerUP, a podcast Editorial eBooks Webinar & Podcast about power electronics. He has contributed to a number of technical and scientific articles as well as a couple of Springer Technical Articles books on energy harvesting and data acquisition and control systems. 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ASC American Sun… Open Advertisement Previous Next Advancements in Thermal Management of GaN and SiC 10 Things You Need to Know to Solve the Climate Change (https://www.powerelectronicsnews.com/advancements-inthermal-management-of-gan-and-sic/) Problem (https://www.powerelectronicsnews.com/10-thingsyou-need-to-know-to-solve-the-climate-change-problem/) Related (https://www.powerelectronicsnews.com/pen- (https://www.powerelectronicsnews.com/silicon(https://www.powerelectronicsnews.com/penoctober-ebook-2-a-software-basedcarbide-substrate-manufacturing-facility-inoctober-ebook-1-boosting-power-density-inapproach-to-wpt-modeling/) italy/) battery-supplied-bldc-and-pmsm-motorcontrol-applications/) TECHNICAL ARTICLES NEWS TECHNICAL ARTICLES (HTTPS://WWW.POWERELECTRONICSNEWS.COM/CATEGORY/TECHNICAL(HTTPS://WWW.POWERELECTRONICSNEWS.COM/CATEGORY/NEWS/) (HTTPS://WWW.POWERELECTRONICSNEWS.COM/CATEGORY/TECHNICALARTICLE/) ARTICLE/) TECHNICAL ARTICLES (HTTPS://WWW.POWERELECTRONICSNEWS.COM/CATEGORY/TECHNICALA Software-Based Approach to Boosting Power Density in BatteryARTICLE/) Wireless Power Transfer Modeling Supplied BLDC and PMSM Motor SiC Substrate Manufacturing Facility (https://www.powerelectronicsnews.com/penControl Applications in Italy october-ebook-2-a-software-based(https://www.powerelectronicsnews.com/pen(https://www.powerelectronicsnews.com/siliconapproach-to-wpt-modeling/) october-ebook-1-boosting-powercarbide-substrate-manufacturing October 6, 2022 Stefano Lovati density-in-battery-supplied-bldc-and(https://www.powerelectronicsnews.com/author/stefano- facility-in-italy/) pmsm-motor-control-applications/) 3 thoughts on “Improving the SiC Wafer Process” October 5, 2022 Maurizio Di Paolo Emilio October 5, 2022 Maurizio Acosta (https://www.powerelectronicsnews.com/author/maurizio/) (https://www.powerelectronicsnews.com/author/maurizioacosta/) lovati/) Dr. Armin Renneisen says: February 9, 2022 at 12:49 pm (https://www.powerelectronicsnews.com/improving-the-sic-wafer-process/#comment-4697) Dear Maurizio Di Paolo Emilio, a very interesting article. As a laser supplier I would be interested in the requirements for the lasers been used for SiC splitting process. Thank you very much for a feedback. Reply Maurizio Di Paolo Emilio says: February 9, 2022 at 12:50 pm (https://www.powerelectronicsnews.com/improving-the-sic-wafer-process/#comment-4698) Thank you. I will work on it. Reply Maurizio Di Paolo Emilio says: February 13, 2022 at 4:55 pm (https://www.powerelectronicsnews.com/improving-the-sic-wafer-process/#comment-4711) Please check this article for more details https://opg.optica.org/ome/fulltext.cfm?uri=ome-7-7-2450&id=367567 (https://opg.optica.org/ome/fulltext.cfm?uri=ome-7-7-2450&id=367567) Reply Leave a Reply Your email address will not be published. Required fields are marked * Comment * Name * Email * Website Notify me of follow-up comments by email. Notify me of new posts by email. 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