2
1
4
3
7
8
9 14
6
5
10 11 12 13
1.PMU_GPIO_CLK_32K_WLAN_R
2.UART1_BT2SOC_RTS_L
3.UART1_BT2SOC_TX
4.UART1_SOC2BT_RTS_L
5&12&15&17&21&26&28.GND
6.GPIO_SOC2GRAPE_RESET_L
16
2
1
15
23.TP_CUMULUS_S_H_CS_L
24.GPIO_GRAPE2SOC_IRQ_L
25.PP1V8_GRAPE_SW
27.DISPLAY_SYNC
29.CUMULUS_M_BCFG_RTCK
30.SPI2_GRAPE_MOSI
31.TP_JTAG_CUMULUS_M_TDI
32.TP_JTAG_CUMULUS_M_TDO
33.SPI2_GRAPE_CS_L
34.TP_JTAG_CUMULUS_M_TCK
35.SPI2_GRAPE_SCLK
36.JTAG_CUMULUS_M_TMS
7.CUMULUS_M_VDDCORE
8.CUMULUS_M_VDDANA
9. CUMULUS_S_VDDCORE
10.TP_CUMULUS_S_H_SDO
11.TP_CUMULUS_S_H_SDI
13.CUMULUS_MS_CK
14.CUMULUS_S_BCFG_RTCK
16.JTAG_CUMULUS_S_TMS
18.CUMULUS_MS_SD
19.TP_CUMULUS_S_H_SCLK
20.CUMULUS_S_VDDANA
22.PP5V25_GRAPE
23.UART_BB2WLAN_LTE_COEX_R
24.UART_WLAN2BB_LTE_COEX_R
25.BOARD_TEMP3_P
26.SIMCRD_CLK_CONN
12.JTAG_WLAN_TDO_OSCAR_B
13.OSCAR2RADIO_CONTEXT_A
14.PMU_GPIO_WLAN_HOST_WAKE
15.VCC_MAIN_GRAPE_RAMP
16.WLAN_TX_BLANK
17.PP3V3_S2R
18.GPIO_BT_WAKE
19.SIM_TRAY_DETECT
20.UART2_SOC2WLAN_TX_R
21.SIMCRD_CLK_CONN_FILT
22. UART2_WLAN2SOC_TX_R
1.HSIC1_WLAN2SOC_DEVICE_RDY
2.PMU_GPIO_BT_REG_ON_R
3.PMU_GPIO_WLAN_REG_ON_R
4.PMU_GPIO_BT_REG_ON
5.PMU_GPIO_WLAN_REG_ON
6.JTAG_WLAN_TMS_TX_BLANK
7.JTAG_WLAN_TDI_OSCAR_A
8.HSIC1_SOC2WLAN_HOST_RDY_R
9.JTAG_WLAN_SEL
10.TP_JTAG_WLAN_TCK
11.TP_JTAG_WLAN_TRST_L
1
13 14
12
1
1
9 10 11 12 13 14
2 20
19
18 17 16 15
3
4
19
18 22 23
3
24
21 22 23 25
20
26
5
24
30 29
6
27
21
7 31 28
25
32 33
8
1
8
34 35
36
11 12
2
9 14 15 32
52
33
10
13
3
57
17
41 42
16
35
51
34
60
7
40
19 20 24
46
18
50 56
5
43 45
37
21 22 23 36
49
58 59
4
38
6
44 47
25
26 27 28 29 30 31 39
48 53 54 55
61 62
26
7
6
4
11
5
12
13
14
16
17
18
3
21
63 64
28
27
25
24
5
26
6
29
8
11
9
10
36
30
50
32
33
34
38
39
40
35
31
26
37
51
49
52
54
43
53
2
4
3
6
5
7
10 12
8
14
15
41
42
44
47
48
27 28 29 30 31 32
19
18 21 23 24
20
22
45
48
50
44
52
43
57
6
37
36
38
61
60 62
58
59
53
59.PP1V8_SW2
61.PP3V3_ACC
62.PMU_USB_BRICKID
63.RESET_SOC_L
64.UART0_SOC_RXD
65.USB_SOC_P
66.USB_SOC_N
67.JTAG_SOC_TCK
68.USB_BB_P
69.TS_E75_ACC_DET_L
70.JTAG_SOC_TMS
71.USB_BB_N
72.PMU_E75_ACC_DET_L
1.WDOG_SOC
2.SOC_TST_CLKOUT
3.PP1V2_SW1
4.JTAG_SOC_TRST_L
5.TP_JTAG_SOC_TDO
6.PPVREF_FMI_SOC
7&10&11&13&14.GND
8.HSIC1_WLAN2SOC_REMOTE_WAKE
9.UART6_TS_ACC_RXD
12.SOC_TESTMODE
15.UART1_SOC2BT_TX
16.TP_GPIO_DFU_STATUS
17.SPI2_GRAPE_MISO
18.SPI3_CODEC_CS_L
19.GPIO_SOC2PMU_KEEPACT
20.UART0_SOC_TXD
21.WDOG_SOC2PMU_RESET_IN
22.SOC_TST_CPUSWITCH_OUT
23.PMU_GPIO_BT_HOST_WAKE
24.SOCHOT0_L
25.OSCAR_TIME_SYNC_HOST_INT
26.BOARD_TEMP7_P
1.GPIO_TS2SOC2PMU_INT
2.SPI_OSCAR2COMPASS_CS_L
3.GPIO_FORCE_DFU
4.GPIO_SOC2BB_RST_L
5.PMU_GPIO_CLK_32K_OSCAR
6.GPIO_SOC2OSCAR_DBGEN
7.TP_OSCAR_P0_22
8.UART4_SOC2OSCAR_TXD
9.SPI_OSCAR_MISO
10.GPIO_SOC2OSCAR_DBGEN_R
11.PP3V0_S2R_SENSOR
12.PP1V2_S2R_SW2
13.GPIO_BB2SOC_GPS_SYNC
14.OSCAR2RADIO_CONTEXT_B
15.PP1V8_S2R_SW3
16.SOCHOT0_R_L
17.PPVDD_SRAM
18.PP3V0_UVLO
19.PMU_GPIO_OSCAR2PMU_HOST_WAKE
20.PMU_SHDWN
21.PP3V0_S2R_NAVAJO
22.UART4_OSCAR2SOC_RXD
23.PPVDD_SOC
24.ACCEL2OSCAR_INT1
25.GPIO_OSCAR_RESET_L
26.PP2V9_CAM
27.PPVBUS_USB_DCIN
28.PPVDD_GPU
29.DWI_AP_CLK
30.SOCHOT1_L
31.PPVDD_CPU
32.PP1V0_SOC
33.USB_VBUS_DETECT
34.PP1V8_ALWAYS
35.BOARD_TEMP2_P
36.GPIO_PMU2SOC_IRQ_L
37.PP3V0_S2R_TRISTAR
38.PP2V6_CAM_AF
39.VBUS_PROT_G
40.PMU_TCAL
41.PP3V0_ALS
42.PMU_GPIO_PMU2BBPMU_RST_L
43.PPVBUS_PROT
44.BOARD_TEMP8_P
45.PMU_VCENTER
46.BOARD_TEMP6_P
47.TP_HV_CHG_EN
48.PPVCC_MAIN
49.TP_AMUX_B3
50.TP_AMUX_BY
51.TP_AMUX_AY
52.TP_AMUX_A3
53.DWI_AP_DO
54.PP1V3_CAM
55. I2C0_SCL_1V8
56. I2C0_SDA_1V8
54
56
7
9
12
15
14
10
8
11 13
18
19
21
67
63
16
17
26
27
22
9
13
14
15
1
28
23
8
7
10
11
12
16
25
20
66
64
51
2
34
35
39
41
42
45
46
33
25
46
47
4
5
6
24
5
4
3
26
40
72
1.FMI0_CLE
2. BOARD_TEMP5_P
3.GPIO_BTN_HOME_L
4.PPVREF_FMI_NAND
5.PP1V8_EXT_SW
6.FMI0_RE_L
7.FMI0_CE0_L
8.FMI0_WE_L
9. FMI0_ALE
10.FMI0_AD<7>
11.FMI0_DQS
12.FMI0_AD<6>
13.FMI0_AD<5>
14.FMI0_AD<4>
15.FMI0_AD<0>
16.FMI1_AD<0>
17.FMI0_AD<1>
18.FMI0_AD<2>
19.FMI0_AD<3>
20.PP1V2_S2R
21.PP1V2_SW1
22.PP3V3_SW
23.I2C2_SDA_1V8
24.VCC_MAIN_PP3V3SW_RAMP
25.PP1V8_SW1
26.I2C2_SCL_1V8
27.JTAG_SOC_TDI
28.JTAG_SOC_SEL
29.UART6_TS_ACC_TXD
11
1
29
30
33
2
3
32
31
65
69
70
55
1.SIM_TRAY_DETECT_FILT
2.SIMCRD_RST_CONN_FILT
3.PP3V0_S2R_NAVAJO_FILT
4&5&6.PPVBUS_E75_USB_CONN
7.PMU_GPIO_MB_HALL1_IRQ
8.SIMCRD_IO_CONN_FILT
9.PP_LDO6_RUIM_1V8_FILT
10.PMU_GPIO_MB_HALL2_IRQ_FILT
11&12&13&14&60.GND
15.MAX983X4_L1_GAIN
16.PMU_GPIO_MB_HALL2_IRQ
17.SPKRAMP_L1_OUT_P
18.LEFT_CH_OUT_N
19.LEFT_CH_OUT_P
20.SPKRAMP_L1_OUT_N
21.MAX983X4_L2_GAIN
22.AUD_SPKRAMP_MUTE_L
23.RIGHT_CH_OUT_N
24.RIGHT_CH_OUT_P
25.PPOUT_E75_ACC_ID1_CONN
26.SPKRAMP_L2_OUT_N
27.SPKRAMP_L2_OUT_P
28.PPOUT_E75_ACC_ID2_CONN
29.E75_DPAIR2_CONN_N
30.E75_DPAIR2_CONN_P
31.SPKRAMP_R2_OUT_P
32.MAX983X4_R1_GAIN
33.SPKRAMP_R1_OUT_P
34.SPKRAMP_R1_OUT_N
35.MAX983X4_R2_GAIN
36.SPKRAMP_R2_OUT_N
37.E75_ACC_DET_CONN_L
38.E75_DPAIR1_CONN_N
39.E75_DPAIR1_CONN_P
40.LED_IO_1_B
41.LED_IO_2_B
42.LED_IO_4_B
43.LED_IO_3_B
44.LED_IO_6_A
45.LED_IO_5_B
46.LED_IO_6_B
47.LED_IO_5_A
48.LED_IO_4_A
49.LED_IO_3_A
50.PPVCC_MAIN_LCD_SW_CONN
51.PPVCC_MAIN_LCD_SW
52.CLK_32K_SOC2CUMULUS
53.LED_IO_2_A
54.LED_IO_1_A
55.EDP_HPD_EMI_CONN
56.PPLED_BACK_REG_A
57.PPLED_BACK_REG_B
58.PPLED_OUT_A
16.PP_SMPS1_MSMC_1V05
17.PP_SMPS4_RF2_2V05
18.TP_BB_TEST_MODE_1
21.TP_BB_TEST_MODE_0
23.PP_SMPS2_RF1_1V3
1&2&4&5&6.GND
3.PP3V0_SENSOR_PROX_AD7149_FILT
7.PP2V9_AVDD_CAM_REAR_FILT
8.PP2V6_CAM_REAR_AF_FILT
9.CAM_REAR_VSYNC
10.PP1V8_CAM_REAR_FILT
11.ISP0_CAM_REAR_SHUTDOWN_L_F
12.ISP0_CAM_REAR_SDA_F
13.PP1V3_CAM_REAR_FILT
14.ISP0_CAM_REAR_CLK_F
15.ISP0_CAM_REAR_SCL_F
16.PP1V8_S2R_SW3_COMP
26 27
13 16 17
28
29
20
21
23
1
9
19 21 22 24
25
17 18 20
23
25
7
11
6 7 8 9 10
12 13 14 15
5
56
24
22
19
23
22
1&19&20&22&24&25&26&27&28&29&30&31&32&33.GND
2.PP1V8_SW1_FOREHEAD
3.PP_RF1_1V8_DIG
4.GPIO_SOC2BB_WAKE_MODEM
5.HSIC2_SOC2BB_HOST_RDY
11.BB_JTAG_TRST_L
6.PS_HOLD_PMIC
12.BB_JTAG_TCK
7.BB_JTAG_TMS
13.BB_JTAG_TDI
8.DEBUG_RST_L
14.BB_JTAG_TDO
9.USB_BB_DEBUG_N
15.BB_JTAG_RTCLK
10.USB_BB_DEBUG_P
16
55
19
18
4
65 66
67 68 69 70
71
16
17
20
15
10
15
2
9
8
4
3
2
17
Edited by Foxit Reader ActiveX For Evaluation Only.
Copyright(C) 2006-2009 Foxit Corporation
73
71
74
72
1.GPIO_SOC2BB_WAKE_MODEM
2.GPIO_BTN_VOL_UP_L
3.GYRO2OSCAR_INT2
4.GPIO_BTN_VOL_DOWN_L
5.GPIO_BTN_SRL_L_FILT
6.PP3V0_GYRO
7.SPI_OSCAR2GYRO_CS_L
8.GPIO_BTN_VOL_UP_L_FILT
9.SIMCRD_IO_CONN
10.SIMCRD_RST_CONN
11.GPIO_BTN_ONOFF_L_FILT
12.GPIO_BTN_VOL_DOWN_L_FILT
13.GPIO_HS4_SHUNT_EN
14.PP3V0_SPARE1
15.PP6V0_LCM_VBOOST
16.GPIO_BB2SOC_RESET_DET_L
17.UART_WLAN2BB_LTE_COEX
18&58.BATT_NTC
19.GPIO_SOC2BB_RADIO_ON_L
20.GPIO_BTN_SRL_L
21.GPIO_BTN_ONOFF_L
22.PA_NTC_P
23.PP_LDO6_RUIM_1V8
24.GPIO_CODEC2SOC_IRQ_L
25.SPI3_CODEC_MISO
26.SPI3_CODEC_SCLK
27.GPIO_BB2SOC_GSM_TXBURST
28.ACCEL2OSCAR_INT2
29.GYRO2OSCAR_INT1
30.GYRO_DEN
31.SPI_OSCAR2ACCEL_CS_L
32.PP3V0_ACCEL
33.PPBATT_POS_RC
34.AIN3P
35.DMIC1_FF_SCLK
36.AIN3N
37.SPI3_CODEC_MOSI
38.PMU_GPIO_CODEC_HS_INT_L
39.L81_SPEAKER_VQ
40.GND
41.GND_AUDIO_CODEC
42&64&65&66&69.PPBATT_VCC
43&57.BATT_SWI_CONN
44.PMU_GPIO_BB_VBUS_DET
45.PMU_GPIO_BB2PMU_HOST_WAKE
46.PP1V8_S2R
47.PPLED_OUT_B
48.COMPASS2OSCAR_INT
50&51&52&56&59&71&72.GND
53.UART_BB2WLAN_LTE_COEX
54.MIKEY_TS_P
55.MIKEY_TS_N
1.PP3V0_COMP
2.PP3V0_S2R_SENSOR
3.SPI_OSCAR_SCLK
4.SPI_OSCAR_MOSI
5.PP1V8_COMP
6.I2C0_CAM_ALS_SCL_1V8_F
7.GPIO_CAM_ALS2SOC_IRQ_L_F
8.ISP1_CAM_FRONT_SDA_F
9.ISP1_CAM_FRONT_SCL_F
10.PP3V0_ALS_FILT
11.I2C0_CAM_ALS_SDA_1V8_F
12.ISP1_CAM_FRONT_CLK_F
13.ISP1_CAM_FRONT_SHUTDOWN_L_F
14.PP2V9_AVDD_CAM_FRONT_FILT
15.PP1V8_CAM_FRONT_FILT
16.GPIO_HS3_SHUNT_EN_FILT
17.CONN_HP_HEADSET_DET_FILT
18.GPIO_HS4_SHUNT_EN_FILT
19.CONN_HP_HS4_REF_FILT
20.CONN_HP_HS3_FILT
21.CONN_HP_RIGHT_FILT
22.CONN_HP_LEFT_FILT
23. CONN_HP_HS4_FILT
24.CONN_HP_HS3_REF_FILT
25.BOARD_TEMP4_P
26.DMIC1_FF_SCLK_FILT
27.DMIC1_FF_SD
28.DMIC1_FF_SD_FILT
29.PP1V8_DMIC_FILT
30. GPIO_HS3_SHUNT_EN
2 1
3
4
5
6
7
12
8
9
30
13
14
15
10
16
17 21
18
22
19
23
20
24
25
26
27
28
29
60.PP1V7_VA_VCP
61.PP1V7_VCP
62.L81_DMIC1_FF_SD
63.CODEC_HP_DET_R
67.GPIO_PROX2SOC_IRQ_L
70.BATT_SNS
73.PP_SMPS5_DSP_1V05
74.PP_LDO1
11
C5823
C5880
C5881
C5882
C6505
STD9307
C6654
C5813
C6652
U5100
C5102
C6341
C6331 C6321
R2040
U2040
C2055
C2015
C6171
C1915
U1920
U2020
R1940
C2019
U1940
C1959
C1955
DZ6003
DZ6191
FL6090
DZ6090
C7042
C7043
C7045
C7044
R7085
U5821
C5822
J 5100
L5100
C6602
C8285
R8285
C8284
R8284
R8283 C8283
R8282 C8282
R8281
C8281
R8280
C8280
R7040
R7043
C6045
R6090
C6342
J 6620
C1600
C6091
D6090
C6381
C6333 C6322
C6653
C1614
C1602
C1400
C5812
C1613
R1654
C1401
C1439
C1642
C1419
R1490
C1469
C1406
C1416
C1150
R0720
R0723
R0721
R9000
C7041
R0800
R0801
C1207
R1093
R0700
C1305
C1442
C1375
R1094
C1094
C0951
C0952
C1385
C1336
C1300
C1301
C81A0
C81A3
C81A2
C81A6
C81A7
C8100
C8102
C1465
C1163
C1205
C1162
C1166
R1530
R1560
C1131
C1130
C1126
C1125
C1135
C9000
U9000
R0756
C1351
C1350
C8115
C8113
C8172
C8158
C8131
C8130
L8110
C8121
C8188
C8234
C8149
C8235
C8236
C8187
C8175
C8212
C8307
C8155
C8186
C8159
C8160
R0760
C8250
C1335 C1334 C1337
C2400
R2406
R2405
C8260
R1752
R1751
C1702
C8232
D8230
R1750
C8240
C2610
R2457
R8100
R1713
C1732
C3701
C3700
C1793
C1792
C3223
R3305
L3811
C2612
R2426
C2421
SL9301
DZ2613
R3400
C3432
R3403
C3220
C3221
U3900
C4410
R4401
C3720
C3718 C3715
C3717
C4006
C4005
C4413
C4401
C4403
C4414
C4412
C4010
C4205
C2885
C4307
C4306
C4604
C4603
L4204 C4212
C4614 C4613
FL4600
C3203
C4616
C4615
C4619
C4618
C4617
FL4400
L4000 R4000
C3602
R3603
R4623
R4102
C2800 C2861 C2876
C2860 C2875
C2886
R4202
U4200
R4303
L3806
L3805
C4008
C4103
C4102
C4101
C4100
U4500
R4403
C4003
C4004
C4610
R4301
L3802 L3800
U3803
C4001
C4000
R4600
L3804
L3803 L3801
C3206
C3227
C4207
C4309 L4200
C2895
R3002
R3502
C3219
C3218
C3207
C3225
L8229
C8259
C3711
R4402
C3802
C4316
C8262
C8164
U3300
FL4200
C4406
C4404
L3520
J 7500
C8253
C3708
L3200
C4408
L4400
U3600
L3814
C8157
C8125
C8252
C8184
R3301
R3300
C3228
C3716
R3800
R3801
R3802
C3714
FL4900
C1332 C1333
C8355
C8124
L8225
C8144
C3400
C4302
R4601
C1612
C1910
C81A4
L1720
C1712
LED9000
C8550
R0722
C6380
C1111
R0620
C8552
C7522
C3402
C3500
C3403
C3600
R9002
C7003
C1701
C1713
C3401
C3224
L6380
C1307
C8104
C7524
C3421
C3404
R3303 C3300
C6041
C1093
C1001
C1092
C8148
C8211
C1710
C1703
C3412
C3226
R7082
L7012
R7084
L8100
U8100
R1710
C1790
C4700
J 7000
R7005
C8101
R1711
C3411
L4500
C1901
DZ6000
C1900
C0651
R0640 R0641
C8194
C8256
C4007
L4201
C4210
C3414
C4013
R6031
L6030
C8365
R1510
C8110
C3231
R4001
L7042
R1494
C1494
L8103
C3426
C3413
C8193
C8269
C8147
C4407
C3434
R3003
U3520
C4110
C7085 C7080
C1306
Q8104
C4211
C1601
C8111
C8177
DZ8120
R4100 R4101
C7086 C7081
C1356
C8216
C8241
FL2450 C2450
U2450
L4100
C2001
C2000
C1925
R7041
L8104
C8161
FL4630
C1903
C1902
R0940
C8119
C8183
C8185
C4109
C6172
STD9306
DZ6160
C6183
C6122
R6190
C6170
L6100
L6157
C1623
C1625
C1359
C8118
C8163
C8181
L4630
R6381
C1945
C2003
C2002
C1448
C1360
C1358
C8142
C2425
R4620
C2045
R7091
C7090
L7090
C6090
C2854
C5606
L5600
U5600
R4602
C4910
J 4900
J 6640
FL6310
U2560
R6640
C1606
R0730
C2420
FL2851
R6600 R6601
R1690
C1690
C1476
L8107
C8169
R2613
R2612
C5601
C5100
C5801 R5100
R1656
R1655
C1449
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J 5810
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R0612
R0611
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C0620
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R1691
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C1402
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C1620
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J 5820
L5821
R6631
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C1497
R1497
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R8323 C1605
C1608
C1095
R1095
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C0946
C0941
C1641
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C1411
C1459
C1415
C1405
R1498
C6510
C1650
C1652
C1479
C5825
C5827
C1410
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Copyright(C) 2006-2009 Foxit Corporation
C5826
C1446
U5820
R1491 C1443
C1490
U6500
C1403
C1491
C1170
C1308
C81A5
C81A1
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C1751
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C7527
C1708
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C7526
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R1507
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SL9310
C3217
C3230
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FID9301
C3208
L3204
C3215
C3216
C4502 C3214
C3209
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C4504
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C4503
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XW4501
C4507
XW4502
C4508
C4600
C4506
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C1717
L3201
C3433
R3302
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C1741
C1711
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C4202
C4009
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C3520
C3423 C3405 C3406 C3415
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C3211 C3408 C3409 C3417
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C3424
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R4621 R4603
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R2428
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C2455
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L2870 L2860
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DZ2611
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C1190
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C1840
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FL1840
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C1231
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C1371
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R2740
FL2751
FL2750
R0733
C2731
R1003
FL2770
L2711
L2710
FL2730
FL2731
R8146
R8170
C81A8
L1700
J 1800
L1705
L1702
L1704
L1703
R8322
FID9303
L4801
J6200
C4803
U4800
J 4800
J 4802
FL1850
DZ1850
R8399 C8301
R8330
C8326
C8135
C8137
C8196
C8138
C1091
R1091
C1000
R1521
C0915
C4802
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C1342
C0910
C0905
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C0900
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C8146
C1275
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C0641
C0640
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C8242
DZ1810
C8308
C1322
C1321
C1116
C0612
C1106
C1282 C1343 C1324
C1330 C1262
C0606
R0761
C1102
C1345
C8310
C8328
C8327
C8399
R1523
R1501
C8306
R1003
C1850
C8305
R1502
C8325
C8324
C8323
C1090
R1090
C1390
C1380
C1372
C1384
C1382
C1391
C1393
C1222
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R0600
C1220
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C1110
C1115
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C1190
C1230
C0632
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C0631
C0605
C1231
C0960
R0960
R0650 C1283
C1270
C1224
C0955
C1392
C8302
STD9302
C1371
C1800
R1096
C1096
R8303
R8340 C8340
C8322
C8321
C8300
L1800
J 1810
DZ1851
R0733
R1712
FL1851
8
6
7
5
4
Edited by Foxit Reader ActiveX For Evaluation Only.
Copyright(C) 2006-2009 Foxit Corporation
3
D
D
PDF CSA CONTENTS
SYNC MASTER
PDF CSA CONTENTS
DATE
TABLE_TABLEOFCONTENTS_HEAD
1
1
Table of Contents
N/A
26
N/A
TABLE_TABLEOFCONTENTS_ITEM
2
2
BLOCK DIAGRAM: SYSTEM
N/A
27
N/A
4
BOM TABLES
N/A
28
N/A
SOC: MAIN
N/A
29
N/A
TABLE_TABLEOFCONTENTS_ITEM
5
7
SOC: I/OS
N/A
30
N/A
8
SOC: NAND
N/A
31
N/A
9
SOC: DP,MIPI
N/A
32
N/A
10
SOC: DDR
N/A
33
N/A
9
10
11
SOC: IO POWER
N/A
34
N/A
12
SOC: SRAM POWER
N/A
35
N/A
13
SOC: CPU POWER
N/A
36
N/A
14
DDR: CHANNEL 0 AND 1
N/A
37
N/A
15
SOC: MISC & ALIASES
N/A
38
N/A
15
16
NAND: NAND
N/A
39
N/A
17
AUDIO: L81 CODEC
N/A
40
N/A
18
AUDIO: HP/DMIC FLEX CONNS
N/A
41
N/A
19
AUDIO: SPEAKER AMPS RIGHT
N/A
42
N/A
20
AUDIO: SPEAKER AMPS LEFT
N/A
43
N/A
B
20
24
SENSOR: OSCAR, GYRO, ACCEL
N/A
44
N/A
25
SENSOR: HALL EFFECT
N/A
45
N/A
26
IO: BUTTON FLEX CONN
N/A
46
N/A
27
CAMERA: FF AND ALS CONN
N/A
47
N/A
28
CAMERA: REAR CONN
N/A
48
N/A
25
36
CELL: TRANSCEIVER (1 0F 2)
RADIO_MLB_72_B7
06/03/2013
29
SENSOR: COMPASS
N/A
49
N/A
37
CELL: TRANSCEIVER (2 OF 2)
RADIO_MLB_72_B7
06/03/2013
30
CELL: SYSTEM & DEBUG CONNECTORS
RADIO_MLB_72_B7
06/03/2013
50
38
CELL: TRANSCEIVER MATCHING
RADIO_MLB_72_B7
39
CELL: SAW BANK
RADIO_MLB_72_B7
6
52
66
GRAPE: CUMULUS
N/A
N/A
53
70
DISPLAY: EDP CONN
N/A
54
N/A
75
POWER: BATTERY CONNECTOR
N/A
N/A
55
81
PMU: ANYA PAGE 1
N/A
N/A
56
82
PMU: ANYA PAGE 2
N/A
N/A
06/03/2013
57
83
PMU: ANYA PAGE 3
N/A
N/A
06/03/2013
58
84
PMU: ANYA PAGE 4
N/A
N/A
90
SOC: DEBUG
N/A
N/A
93
TEST: TP/HOLES/FIDUCUALS
N/A
N/A
94
TEST: EE TP/PP
N/A
N/A
121
POWER: ALIASES
N/A
N/A
150
CONSTRAINTS: MLB RULES
N/A
N/A
151
CONSTRAINTS: LOW SPEED BUS
N/A
N/A
152
CONSTRAINTS: DISPLAY/AUDIO
N/A
N/A
153
CONSTRAINTS: DDR/FMI
N/A
N/A
154
CONSTRAINTS: POWER / GND
N/A
N/A
157
CONSTRAINTS: RF
N/A
N/A
158
CONSTRAINTS: WIFI/BT
WIFI_DEV
05/21/2013
TABLE_TABLEOFCONTENTS_ITEM
40
CELL: BAND 1/4 PAT
RADIO_MLB_72_B7
06/03/2013
59
TABLE_TABLEOFCONTENTS_ITEM
41
CELL: BAND 2/3 PAD
RADIO_MLB_72_B7
06/03/2013
60
C
TABLE_TABLEOFCONTENTS_ITEM
42
CELL: BAND 20 PAD
RADIO_MLB_72_B7
06/03/2013
61
TABLE_TABLEOFCONTENTS_ITEM
43
CELL: BAND 5/8 PAD
RADIO_MLB_72_B7
06/03/2013
62
TABLE_TABLEOFCONTENTS_ITEM
44
CELL: BAND 13/17 PAD
RADIO_MLB_72_B7
06/03/2013
63
TABLE_TABLEOFCONTENTS_ITEM
45
CELL: PA DC/DC CONVERTER
RADIO_MLB_72_B7
06/03/2013
64
TABLE_TABLEOFCONTENTS_ITEM
46
CELL: 2G FEM
RADIO_MLB_72_B7
06/03/2013
65
TABLE_TABLEOFCONTENTS_ITEM
47
CELL: RX DIVERSITY
RADIO_MLB_72_B7
06/03/2013
66
TABLE_TABLEOFCONTENTS_ITEM
48
CELL: GPS
RADIO_MLB_72_B7
06/03/2013
67
TABLE_TABLEOFCONTENTS_ITEM
49
CELL: ANTENNA FEEDS
RADIO_MLB_72_B7
06/03/2013
68
TABLE_TABLEOFCONTENTS_ITEM
51
CELL: SIM FLEX CONN
N/A
N/A
69
TABLE_TABLEOFCONTENTS_ITEM
56
SENSOR: PROX AD7149
N/A
N/A
58
WIFI/BT: MODULE
WIFI_DEV
05/21/2013
60
IO: TRISTAR
N/A
N/A
61
IO: FILTERING
N/A
N/A
62
IO: FLEX HOTBAR PADS
N/A
N/A
63
IO: HOME BUTTON FILTERS
N/A
N/A
A
7
N/A
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
8
N/A
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
GRAPE: 1V8 POWER SWITCH
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
65
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
24
06/03/2013
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
23
RADIO_MLB_72_B7
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
22
CELL: BASEBAND(2 OF 2)
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
21
35
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
51
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
19
06/03/2013
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
18
RADIO_MLB_72_B7
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
17
CELL: BASEBAND (1 OF 2)
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
16
34
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
DATE
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
14
06/03/2013
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
13
RADIO_MLB_72_B7
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
12
CELL: BASEBAND PMU (2 OF 2)
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
11
33
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
SYNC MASTER
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
C
06/03/2013
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
8
RADIO_MLB_72_B7
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
7
CELL: BASEBAND PMU (1 0F 2)
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
6
32
TABLE_TABLEOFCONTENTS_ITEM
6
PDF CSA CONTENTS
TABLE_TABLEOFCONTENTS_HEAD
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
4
DATE
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
3
SYNC MASTER
TABLE_TABLEOFCONTENTS_HEAD
5
4
B
8
7
6
5
GRAPE
CUMULUS
4
Edited by Foxit Reader ActiveX For Evaluation Only.
1
Copyright(C)22006-2009 Foxit Corporation
3
ISP1_I2C
MIPI1C
ISP0_I2C
MIPI0C
SPI2
CUMULUS
FRONT CAMERA
REAR CAMERA
D
D
HSIC1
UART1
MIMO
UART2
I2S4
SIO_UART0
LPDDR3
CSA 14
CSA 58
CELLULAR/
GPS
HSIC1
SIO_UART1
HSIC2
EDP
WIFI/BT ANT
BT_I2S
ALCATRAZ
DISPLAY/
TOUCH PANEL
WIFI/BT ANT
WIFI/BT
IPC
JTAG
USART
USB
I2S0
UART3
C
CSA 31-46
BACKLIGHT
NOT ON
WIFI-ONLY CONFIG
PRIMARY CELLULAR ANT
DIVERSITY CELLULAR ANT
GPS ANT
C
SIM CARD
UART5
PMU
ANYA
BUTTON FLEX
BATTERY
TRISTAR
USB2.0
UART0
UART6
CSA 75
DWI
I2C0
HOME BUTTON
CSA 81-84
I2C2
OSCAR
B
HALL EFF 1
UART4
CSA 60
I2C1
HALL EFF 2
I2S2
NC
CSA 24
CSA 25
AMP
CSA 20
HB FLEX
NC
COMPASS
AMP
I2C3
SPI BUS
ACCELEROMETER
MBUS
SPI1
SPI3
I2S0
I2S1
GYRO
FMI0 FMI1
CSA 29
CSA 24
CSA 20
SPI
ASP
XSP
AOUT2
AOUT1
AMP
CSA 19
CSA 24
AMP
L81
CSA 19
RIGHT
SPEAKER
IO FLEX
LEFT
SPEAKER
IO FLEX
AUDIO
CODEC
A
HP
NAND FLASH
PROX SENSOR
CSA 17
CAM
ALS
CSA 56
MIC1
CSA 16
8
7
6
5
4
MIC2
3
2
1
B
8
7
6
5
4
Edited by Foxit Reader ActiveX For Evaluation Only.
1
Copyright(C)22006-2009 Foxit Corporation
3
D
D
PLACE_NEAR=U0600.R18:10MM
R0600
=PP1V8_PLL_SOC
62
1
1
0.00 2
67
0%
1/32W
MF
01005
C0600
0.22UF
20%
2 6.3V
X5R
01005
1
1
C0601
0.22UF
C0605
1
0.01UF
10%
6.3V
2 X5R
01005
20%
6.3V
2 X5R
01005
PP1V8_PLL_SOC_F
C0606
1
0.01UF
10%
6.3V
01005
2 X5R
C0607
1
8.2PF
8.2PF
+/-0.5PF
16V
01005
0.22UF
1
C0611
1
0.22UF
1
C0612
0.22UF
20%
6.3V
01005
0.01UF
20%
6.3V
01005
10%
6.3V
2 X5R
01005
2 X5R
1
C0620
1
8.2PF
64 61 46
BI
64 61 46
BI
HSIC1_WLAN_DATA
HSIC1_WLAN_STB
+/-0.5PF
16V
01005
VDD_ANA_PLL R18
6X1MA
OMIT_TABLE
A27 HSIC1_DATA
B27 HSIC1_STB
U0600
ALCATRAZ
64 61 28 25
BI
64 61 28 25
BI
64
=PP1V8_SOC
64
64 60
64 60 47
64 60 47
OUT
OUT
1
R0611
100K
5%
1/32W
MF
2 01005
NC_HSIC0_DATA
NC_HSIC0_STB
DISCRETE
AJ35 HSIC2_DATA
AJ36 HSIC2_STB
HSIC2_BB_DATA
HSIC2_BB_STB
NO_TEST=TRUE
NO_TEST=TRUE
100K
5%
1/32W
MF
2 01005
60 13
IN
64
64 60 13
IN
64 60
FBGA
A26 HSIC0_DATA
B26 HSIC0_STB
10%
6.3V
01005
WDOG AC3
WDOG_SOC
XI0 A30
XO0 B30
65
IN
65
OUT
13 67
1
R0640
TP_ANALOGMUXOUT
USB_ANALOGTEST E23
1%
1/32W
MF
2 01005
61
USB_SOC_P
USB_SOC_N
BI
47 60 64
BI
47 60 64
USB_ID D24
1%
1/32W
MF
01005
67
USB_VBUS_DETECT_R
NC_USB_ID
63
TP
OUT
200
52 60 61
1%
1/32W
MF
2 01005
AC1 TST_CLKOUT
OUT
SOC_FAST_SCAN_CLK
AC4 FAST_SCAN_CLK
IN
SOC_HOLD_RESET
D29 HOLD_RESET
D30 RESET*
RESET_SOC_L
PULLUP ON CSA 15
1
C0660
0.01UF
10%
2 10V
X5R-CERM
0201
E28 CFSB
AN23 DDR0_CKEIN
R33 DDR1_CKEIN
G25 USB_VSSA0
IN
CKEIN IS 1.2V, 1.8V TOL
A
8
7
6
3
2 4
IN
CRITICAL
1
12PF
C0651
12PF
2
5%
16V
CERM
01005
55 67
PLACE_NEAR=U0600.E24:5MM
G24 HSIC_VSS121
AJ31 HSIC_VSS122
G23 HSIC_VSS120
67 61 60 57 47 25 13
C0650
1
1
TP-P55
13
1
SOC_24M_O
CRITICAL
1%
1/32W
MF
01005
R0660
13
65
USB_REXT0
DISP_VSYNC AR11 DISPLAY_SYNC
SOC_TST_CLKOUT
24.000MHZ-30PPM-9.5PF-60OHM
5%
2 16V
CERM
01005
R0650
68.1K2 USB_VBUS_DETECT
1
1.60X1.20MM-SM
AC2 TESTMODE
USB_REXT E24
TP0600
1
1.33K2
NC_USB_ANALOGTEST
NO_TEST=TRUE
USB_VBUS D23
Y0600
R0641
1
G17 FUSE1_FSRC
B
CRITICAL
1.00M
USB_DP B29
USB_DM A29
JTAG_SEL
JTAG_TRTCK
JTAG_TRST*
JTAG_TDO
C27 JTAG_TDI
D27 JTAG_TMS
D28 JTAG_TCK
SOC_TESTMODE
0.22UF
20%
2 6.3V
X5R
01005
XTAL_SOC_24M_I
XTAL_SOC_24M_O
NO_TEST=TRUE
60 13
62
C0645
C
ANALOGMUXOUT E26
E27
JTAG_SOC_SEL
NC_JTAG_SOC_TRTCK NO_TEST=TRUED26
C29
JTAG_SOC_TRST_L
C28
TP_JTAG_SOC_TDO
JTAG_SOC_TDI
JTAG_SOC_TMS
JTAG_SOC_TCK
0.01UF
=PP3V3_USB_SOC
0.22UF
20%
2 6.3V
X5R
01005
1
C0640
62
(1 OF 14)
1
R0612
1
C0641
2 NP0-C0G-CERM2 X5R
3X13MA
5%
1/32W
MF
2 01005
01005
8.2PF
+/-0.5PF
2 16V
NP0-C0G-CERM
01005
HSIC_VDD121 F24
HSIC_VDD122 AJ30
HSIC_VDD120 F23
2 X5R
C0615
C
100K
10%
01005
=PP1V0_USB_SOC
C0631
5.4MA USB_DVDD F25
25MA USB_VDD330 E25
C0610
20%
2 6.3V
X5R
0201
R0610
0.01UF
+/-0.5PF
16V
6.3V
2 NP0-C0G-CERM
2 X5R
2 NP0-C0G-CERM
1MA VDD_ANA_PLL_CCC AD22
1
1
1
C0630
=PP1V2_HSIC_SOC
62
62 58 13 7 5
1
C0632
5
4
3
NOTE: NEW VALUE FOR H6 IS 200 OHM
B
8
7
6
5
4
Edited by Foxit Reader ActiveX For Evaluation Only.
1
Copyright(C)22006-2009 Foxit Corporation
3
I2S0 AND I2S2 ARE OPTIMIZED FOR LOW MCK JITTER
R0700
33.2
64 15
OUT
I2S0_CODEC_ASP_MCK_R 1
1%
1/32W
MF
01005
64
64 15
L81 CODEC ASP
1.8V
64 15
D
OUT
OUT
64 15
IN
64 15
OUT
64
L81 CODEC XSP
1.8V
64 15
OUT
64 15
OUT
64 15
IN
64 15
OUT
64
64
UNUSED
1.8V
64
64
64
64 61 28 25
OUT
64 61 28 25
OUT
64 61 28 25
IN
64 61 28 25
OUT
64 61 28 25
OUT
64
BT
1.8V
OMIT_TABLE
OMIT_TABLE
2
64 46
OUT
64 46
OUT
64 46
IN
64 46
OUT
I2S0_CODEC_ASP_MCK
I2S0_CODEC_ASP_BCLK
I2S0_CODEC_ASP_LRCK
I2S0_CODEC_ASP_DIN
I2S0_CODEC_ASP_DOUT
F28
AJ32
AH32
AG32
AJ33
I2S0_MCK
I2S0_BCLK
I2S0_LRCK
I2S0_DIN
I2S0_DOUT
NC_I2S1_MCK NO_TEST=TRUE
I2S1_CODEC_XSP_BCLK
I2S1_CODEC_XSP_LRCK
I2S1_CODEC_XSP_DIN
I2S1_CODEC_XSP_DOUT
AG33
AH34
AH33
AG34
AF32
I2S1_MCK
I2S1_BCLK
I2S1_LRCK
I2S1_DIN
I2S1_DOUT
NC_I2S2_MCK
NC_I2S2_BCLK
NC_I2S2_LRCK
NC_I2S2_DIN
NC_I2S2_DOUT
F26
AG35
AE32
AE33
AF34
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
AD32
AF36
AG36
AC32
AD33
BB_JTAG_TRST_L
BB_JTAG_TDI
BB_JTAG_TDO
BB_JTAG_TCK
BB_JTAG_TMS
AD34
AE36
AE35
AB32
AC33
NC_I2S4_MCK
NO_TEST=TRUE
I2S4_SOC2BT_BCLK
I2S4_SOC2BT_LRCK
I2S4_BT2SOC_DATA
I2S4_SOC2BT_DATA
I2S2_MCK
I2S2_BCLK
I2S2_LRCK
I2S2_DIN
I2S2_DOUT
I2S3_MCK
I2S3_BCLK
I2S3_LRCK
I2S3_DIN
I2S3_DOUT
I2S4_MCK
I2S4_BCLK
I2S4_LRCK
I2S4_DIN
I2S4_DOUT
I2C0_SCL AN6
I2C0_SDA AP4
U0600
ALCATRAZ
DISCRETE
FBGA
(3 OF 14)
I2C0_SCL_1V8
I2C0_SDA_1V8
OUT
BI
I2C1_SCL AP5
I2C1_SDA AR3
I2C1_SOC2OSCAR_SWDCLK_1V8
I2C1_SOC2OSCAR_SWDIO_1V8
I2C2_SCL AR14
I2C2_SDA AT7
I2C2_SCL_1V8
I2C2_SDA_1V8
I2C3_SCL AA35
I2C3_SDA AA36
DWI_CLK AT17
DWI_DI AT16
DWI_DO AR16
SEP_7816UART0_RST
SEP_7816UART0_SCL
SEP_7816UART0_SDA
SEP_7816UART1_RST
SEP_7816UART1_SCL
SEP_7816UART1_SDA
AL1
AK5
AK3
AM1
AL4
AL2
SIO_7816UART0_RST
SIO_7816UART0_SCL
SIO_7816UART0_SDA
SIO_7816UART1_RST
SIO_7816UART1_SCL
SIO_7816UART1_SDA
Y32
AB33
AA32
AA34
AC36
AA33
OUT
BI
OUT
BI
I2C3_SCL_1V8
I2C3_SDA_1V8
OUT
BI
DWI_AP_CLK
SOC_TST_CPUSWITCH_OUT
DWI_AP_DO
NC_SEP_7816UART0_RST
SEP_I2C0_SCL
SEP_I2C0_SDA
NC_SEP_7816UART1_RST
NC_SEP_7816UART1_SCL
NC_SEP_7816UART1_SDA
TO:
ANYA PMU 0111100X
5 57 60 64
5 57 60 64
IN
13
IN
13
IN
64 61 60 52
IN
64 61 60 52
OUT
64 61 60 52
OUT
64 61 60 52
OUT
64 15
IN
64 15
OUT
64 15
OUT
64 15
OUT
GPIO_BOARD_ID_2
GPIO_BOARD_ID_1
GPIO_BOARD_ID_0
NC_SPI0_SSIN NO_TEST=TRUE
AN4
AP2
AN3
AM9
NC_SPI1_MISO
NC_SPI1_MOSI
NC_SPI1_SCLK
NC_SPI1_SSIN
AN1
AM4
AM5
AM7
SPI1_MISO
SPI1_MOSI
SPI1_SCLK
SPI1_SSIN
SPI2_GRAPE_MISO
SPI2_GRAPE_MOSI
SPI2_GRAPE_SCLK
SPI2_GRAPE_CS_L
AN8
AN7
AN5
AN9
SPI2_MISO
SPI2_MOSI
SPI2_SCLK
SPI2_SSIN
SPI3_CODEC_MISO
SPI3_CODEC_MOSI
SPI3_CODEC_SCLK
SPI3_CODEC_CS_L
AN13
AT6
AR7
AP10
SPI3_MISO
SPI3_MOSI
SPI3_SCLK
SPI3_SSIN
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
IN
57 21 5
IN
21
IN
21
IN
22
IN
TO:
OSCAR SWD
5 19 64
NOTE: I2C1 IS ASSUMED TO USE
PUSH-PULL INSTEAD OF OPEN-DRAIN
5 19 64
61 46
OUT
29
OUT
67 60 27 25
OUT
TO:
TRISTAR 0011010X
5 47 64
5 47 64
TO:
60 27 25 5
OUT
AD7149 PROX 0101101X
FF CAM CT817 ALS 0111001X 67 29 25 IN
5 13 22 61 64
5 13 22 61 64
OUT
57 64
OUT
57 64
TP0700
1
19
OUT
67 61 60 52
OUT
A
TP-P55
NO_TEST=TRUE
OUT
BI
5 64
5 64
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
HSIC1_WLAN2SOC_REMOTE_WAKE
HSIC1_WLAN2SOC_DEVICE_RDY
HSIC1_SOC2WLAN_HOST_RDY
HSIC2_BB2SOC_REMOTE_WAKE
HSIC2_BB2SOC_DEVICE_RDY
HSIC2_SOC2BB_HOST_RDY
IN
46 61 64
IN
46 61 64
OUT
IN
29 64
IN
25 29 64
OUT
25 29 64
29
IN
13
IN
57 47
IN
13
IN
29
IN
13
IN
53
OUT
57 5
OUT
57
IN
15
IN
13
IN
60 59 5
IN
5 46 64
61
SOCHOT0 AM20
SOCHOT1 AM19
SOCHOT0_L
SOCHOT1_L
5 58
OUT
13
IN
13
IN
57 21 5
IN
5 57
C
13
60 57 50 5
61 60 52
IN
SPI0_MISO
SPI0_MOSI
SPI0_SCLK
SPI0_SSIN
16
OUT
16
OUT
13
IN
13
IN
13
IN
13
IN
GPIO_BTN_HOME_L
GPIO_BTN_ONOFF_L
GPIO_BTN_VOL_DOWN_L
GPIO_BTN_VOL_UP_L
GPIO_CAM_ALS2SOC_IRQ_L
GPIO_BT_WAKE
GPIO_SOC2BB_WAKE_MODEM
NO_TEST=TRUE
NC_GPIO7
GPIO_SOC2BB_RST_L
GPIO_SOC2BB_RADIO_ON_L
GPIO_BB2SOC_RESET_DET_L
NO_TEST=TRUE
NC_GPIO11
GPIO_SOC2OSCAR_DBGEN
GPIO_SOC2GRAPE_RESET_L
NO_TEST=TRUE
NC_GPIO14
GPIO_BB2SOC_GSM_TXBURST
GPIO_BOARD_ID_3
GPIO_TS2SOC2PMU_INT
GPIO_BOOT_CONFIG_0
GPIO_BB2SOC_GPS_SYNC
GPIO_PROX2SOC_IRQ_L
GPIO_SOC2LCD_PWREN
GPIO_SOC2PMU_KEEPACT
GPIO_PMU2SOC_IRQ_L
GPIO_CODEC2SOC_IRQ_L
GPIO_BOOT_CONFIG_1
GPIO_FORCE_DFU
TP_GPIO_DFU_STATUS
GPIO_BOOT_CONFIG_2
GPIO_BOOT_CONFIG_3
GPIO_BTN_SRL_L
GPIO_GRAPE2SOC_IRQ_L
NO_TEST=TRUE
NC_GPIO32
GPIO_HS3_SHUNT_EN
GPIO_HS4_SHUNT_EN
GPIO_BRD_REV3
GPIO_BRD_REV2
GPIO_BRD_REV1
GPIO_BRD_REV0
SEP EEPROM
BUTTON PULLUPS
B
62
62 59 5
=PP1V8_S2R_MISC
=PP1V8_SOC
=PP1V8_ALWAYS
62 58 13 7 5 4
R0720
100K
1
NOSTUFF
R0723
100K
5%
1/32W
MF
2 01005
5%
1/32W
MF
2 01005
1
R0721
1
R0760
100K
100K
5%
1/32W
MF
2 01005
5%
1/32W
MF
2 01005
1
1
R0761
100K
2.2K
5%
1/32W
MF
2 01005
2
C9000
20%
6.3V
2 X5R
01005
64 60 57 5
I2C0_SDA_1V8
64 60 57 5
I2C0_SCL_1V8
U9000
64 61 22 13 5
I2C3_SDA_1V8
WLCSP
64 61 22 13 5
I2C3_SCL_1V8
64 47 5
I2C2_SDA_1V8
64 47 5
I2C2_SCL_1V8
VSS
64 5
SEP_I2C0_SDA
64 5
VCC
CRITICAL
CAT24C08C4A
GPIO_BTN_SRL_L
5 GPIO_BTN_HOME_L
5 GPIO_BTN_ONOFF_L
57 5
58 5
GPIO_SOC2PMU_KEEPACT
GPIO_FORCE_DFU
GPIO_SOC2BB_RADIO_ON_L
HSIC1_SOC2WLAN_HOST_RDY
5%
1/32W
MF
2 01005
8
1
R0731
100K
5%
1/20W
MF
2 201
NOSTUFF
1
R0733
100K
5%
1/32W
MF
2 01005
SOCHOT1_L
SOCHOT0_L
64 5
D
UART0_SOC_RXD
UART0_SOC_TXD
UART1_CTSN
UART1_RTSN
UART1_RXD
UART1_TXD
AH4
AH2
AG6
AG5
UART1_BT2SOC_RTS_L
UART1_SOC2BT_RTS_L
UART1_BT2SOC_TX
UART1_SOC2BT_TX
UART2_CTSN
UART2_RTSN
UART2_RXD
UART2_TXD
AJ3
AH5
AJ2
AJ1
NC_GPIO_UART2_CTSN
NC_GPIO_UART2_RTSN
UART2_WLAN2SOC_TX
UART2_SOC2WLAN_TX
UART3_CTSN
UART3_RTSN
UART3_RXD
UART3_TXD
AK1
AJ6
AJ5
AJ4
UART3_BB2SOC_RTS_L
UART3_SOC2BB_RTS_L
UART3_BB2SOC_TX
UART3_SOC2BB_TX
UART4_CTSN
UART4_RTSN
UART4_RXD
UART4_TXD
AM3
AM2
AL5
AL6
PMU_GPIO_OSCAR2PMU_HOST_WAKE
GPIO_OSCAR_RESET_L
UART4_OSCAR2SOC_RXD
UART4_SOC2OSCAR_TXD
UART5_RTXD AK4
UART6_RXD AB36
UART6_TXD AB35
IN
OUT
19
52 60 61 64
IN
47 60 64
OUT
47 60 64
IN
SEP_I2C0_SCL
B1 SCL
SDA B2
SEP_I2C0_SDA
46 64
IN
46 64
OUT
46 64
IN
46 64
OUT
46 64
NO_TEST=TRUE
IN
OUT
IN
OUT
UART5_BATT_TRXD
UART6_TS_ACC_RXD
UART6_TS_ACC_TXD
IN
OUT
25 29 47 64
19 57
19 60 67
IN
19 64
OUT
19 64
OUT
54 57 64
IN
47 64
OUT
47 64
5%
1/32W
MF
01005
2.2K
5%
1/32W
MF
2 01005
2.2K
2
5%
1/32W
MF
01005
2.2K
5%
1/32W
MF
2 01005
1
R0754
2.2K
5%
1/32W
MF
2 01005
1
R0755
2.2K
5%
1/32W
MF
2 01005
1
R0756
2.2K
5%
1/32W
MF
2 01005
1
R0757
2.2K
5%
1/32W
MF
2 01005
1
R0758
2.2K
C
ACCESSORY
UART 1.8V
I2C1_SOC2OSCAR_SWDCLK_1V8
64 19 5
I2C1_SOC2OSCAR_SWDIO_1V8
100K
5%
1/32W
MF
2 01005
3
2
R0759
5%
1/32W
MF
SEP_I2C0_SCL
64 19 5
NOSTUFF
1
2 01005
R0734
4
TO OSCAR
2.2K
5%
1/32W
MF
2 01005
5 46 64
5
TO BB UART
MDM9600
25 29 64
25 29 47 64
5 25 27 60
6
WIFI DEBUG
25 29 64
1
7
TO BT UART
BCM4330
NO_TEST=TRUE
5 64
5 57
5 59 60
SOC DEBUG
1.8V
46 64
OUT
0.22UF
A1
1
57 21 5
100K
UART0_RXD AR17
UART0_TXD AP17
OSCAR_TIME_SYNC_HOST_INT
NO_TEST=TRUE
NC_TMR32_PWM1
CLK_32K_SOC2CUMULUS
NOSTUFF
A2
5%
1/32W
MF
2 01005
R0730
TMR32_PWM0 AD35
TMR32_PWM1 AC34
TMR32_PWM2 AD36
R0750 1R0751 1R0752 1R0753
100K
1
FBGA
(2 OF 14)
1
R0722
A
DISCRETE
=PP1V8_SOC
=PP1V8_EEPROM 62
57 21
ALCATRAZ
4 5 7 13 58 62
=PP1V8_S2R_MISC
1
60 57 50
U0600
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
GPIO22
GPIO23
GPIO24
GPIO25
GPIO26
GPIO27
GPIO28
GPIO29
GPIO30
GPIO31
GPIO32
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37
GPIO38
I2C PULL-UPS
UNPROGRAMMED P/N: 335S0894
5 59 62
AB6
AD1
AB5
AC5
AC6
AD3
AD4
AE1
AE2
AD5
AF1
AF2
AE4
AF3
AE5
AE6
AG1
AF4
AG3
AF5
AH1
AG4
AR10
AN14
AR9
AP13
AT14
AT8
AM17
AT9
AP14
AN16
AT11
AT10
AP11
AN17
AR13
AP16
AT13
1
B
8
7
6
5
4
Edited by Foxit Reader ActiveX For Evaluation Only.
1
Copyright(C)22006-2009 Foxit Corporation
3
D
D
62 6
=PP1V8_NAND_SOC
1
1
R0800
100K
R0801
100K
5%
1/32W
MF
2 01005
5%
1/32W
MF
2 01005
OMIT_TABLE
66 61 60 14
FMI0_CE0_L
NC_FMI0_CE1_L
OUT
NO_TEST=TRUE
E34 PPN0_CEN0
C35 PPN0_CEN1
U0600
ALCATRAZ
DISCRETE
PPN1_CEN0 J36
PPN1_CEN1 J34
NO_TEST=TRUE
FMI1_CE0_L
NC_FMI1_CE1_L
OUT
14 61 66
FBGA
(4 OF 14)
C
C
66 61 14
BI
66 61 14
BI
66 61 14
BI
66 61 14
BI
66 61 14
BI
66 61 14
BI
66 61 14
BI
66 61 14
BI
66 61 14
OUT
66 61 14
OUT
66 61 14
OUT
66 61 14
OUT
66 61 14
BI
FMI0_AD<0>
FMI0_AD<1>
FMI0_AD<2>
FMI0_AD<3>
FMI0_AD<4>
FMI0_AD<5>
FMI0_AD<6>
FMI0_AD<7>
A32
A33
B33
E32
C32
E33
D34
D36
PPN0_IO0
PPN0_IO1
PPN0_IO2
PPN0_IO3
PPN0_IO4
PPN0_IO5
PPN0_IO6
PPN0_IO7
PPN1_IO0
PPN1_IO1
PPN1_IO2
PPN1_IO3
PPN1_IO4
PPN1_IO5
PPN1_IO6
PPN1_IO7
H34
G35
G34
J32
G33
E36
E35
G32
FMI1_AD<0>
FMI1_AD<1>
FMI1_AD<2>
FMI1_AD<3>
FMI1_AD<4>
FMI1_AD<5>
FMI1_AD<6>
FMI1_AD<7>
FMI0_ALE
FMI0_CLE
FMI0_WE_L
FMI0_RE_L
FMI0_DQS
FMI0_ZQ
C31
B31
A31
C34
B34
C33
PPN0_ALE
PPN0_CLE
PPN0_WEN
PPN0_REN
PPN0_DQS
PPN0_ZQ
PPN1_ALE
PPN1_CLE
PPN1_WEN
PPN1_REN
PPN1_DQS
PPN1_ZQ
H36
J35
J33
G36
F36
F34
FMI1_ALE
FMI1_CLE
FMI1_WE_L
FMI1_RE_L
FMI1_DQS
FMI1_ZQ
14 61 66
BI
14 66
BI
14 66
BI
14 66
BI
14 66
BI
14 66
BI
14 66
BI
14 66
OUT
14 61 66
OUT
14 61 66
OUT
14 61 66
OUT
14 61 66
BI
14 61 66
1
R0841
1
R0840
240
240
1%
1/32W
MF
2 01005
BI
E31 PPN0_VREF
PPN1_VREF H32
66 61
PPVREF_FMI_SOC
1%
1/32W
MF
2 01005
B
=PP1V8_NAND_SOC
1
R0830
51.1K
1
1
1%
1/32W
MF
2 01005
A
6
5
4
0.01UF
10%
6.3V
2 X5R
01005
51.1K
7
C0830
1%
1/32W
MF
2 01005
R0831
8
1
3
C0831
0.01UF
10%
6.3V
2 X5R
01005
6 62
B
8
7
6
5
4
Edited by Foxit Reader ActiveX For Evaluation Only.
1
Copyright(C)22006-2009 Foxit Corporation
3
D
D
=PP1V8_MIPI_SOC
20%
6.3V
2 X5R
0201-1
C0910
8.2PF
+/-0.5PF
2 16V
NP0-C0G-CERM
01005
C0940
56PF
5%
16V
NP0-C0G 2
01005
TP_PP0V4_MIPI0D
TP_PP0V4_MIPI1D
AN11 SENSOR0_ISTRB
AR6 SENSOR0_XSHUTDOWN
BB_IPC_GPIO
NC_SENSOR0_XSHUTDOWN
NO_TEST=TRUE
C
18 17
65 61 23
65 61 23
OUT
IN
IN
65 61 23
IN
65 61 23
IN
NC_SENSOR1_ISTRB
AUD_SPKRAMP_MUTE_L
NO_TEST=TRUE
AP9 SENSOR1_ISTRB
AM11 SENSOR1_XSHUTDOWN
MIPI0C_CAM_REAR_DATA_P<0>
MIPI0C_CAM_REAR_DATA_N<0>
AR33 MIPI0C_DPDATA0
AT33 MIPI0C_DNDATA0
MIPI0C_CAM_REAR_DATA_P<1>
MIPI0C_CAM_REAR_DATA_N<1>
AR32 MIPI0C_DPDATA1
AT32 MIPI0C_DNDATA1
65
65
NC_MIPI0C_CAM_REAR_DATA_P<2> AR30 MIPI0C_DPDATA2
NO_TEST=TRUE
AT30 MIPI0C_DNDATA2
NC_MIPI0C_CAM_REAR_DATA_N<2>
65
IN
65 61 23
IN
65
65
NC_MIPI0D_DPDATA0
NC_MIPI0D_DNDATA0
NO_TEST=TRUE
1
C0946
8.2PF
+/-0.5PF
16V
2 NP0-C0G-CERM
01005
1
C0941
56PF
1
0.22UF
FBGA
C0951
1.0UF
1
C0952
1.0UF
20%
6.3V
2 X5R
0201-1
20%
2 6.3V
X5R
0201-1
=PP1V0_EDP_PAD_DVDD_SOC
1
1
C0955
1.0UF
=PP1V8_SOC
4 5 13 58 62
C0945
8.2PF
20%
6.3V
2 X5R
0201-1
+/-0.5PF
2 16V
NP0-C0G-CERM
01005
1
R0900 1R0901 1R0902 1R0903
2.2K
5%
1/32W
MF
2 01005
2.2K
5%
1/32W
MF
2 01005
2.2K
2.2K
5%
1/32W
MF
2 01005
5%
1/32W
MF
2 01005
ALCATRAZ
DISCRETE
(5 OF 14)
1
C0950
5%
20%
16V
6.3V
2 NP0-C0G
2 X5R
01005
01005
67
U0600
ISP0_SCL AP7
ISP0_SDA AM10
ISP0_CAM_REAR_SCL
ISP0_CAM_REAR_SDA
OUT
ISP1_SCL AR4
ISP1_SDA AN10
ISP1_CAM_FRONT_SCL
ISP1_CAM_FRONT_SDA
OUT
ISP0_CAM_REAR_CLK
ISP0_CAM_REAR_SHUTDOWN_L
OUT
23 64
OUT
23 67
ISP1_CAM_FRONT_CLK
ISP1_CAM_FRONT_SHUTDOWN_L
OUT
22 64
OUT
22 67
BI
BI
ALCATRAZ
23 64
DISCRETE
FBGA
(6 OF 14)
23 64
TP_EDP_PAD_DC_TP
D19 DP_PAD_DC_TP
AP_EDP_R_BIAS
E19 DP_PAD_R_BIAS
C
OMIT_TABLE
22 64
22 64
EDP_HPD E29
DP_PAD_AUXP B20
DP_PAD_AUXN A20
EDP_AUX_P
EDP_AUX_N
BI
53 65
BI
53 65
AN33 MIPI0D_DPDATA0
AP33 MIPI0D_DNDATA0
DP_PAD_TX0P B21
DP_PAD_TX0N A21
EDP_DATA_P<0>
EDP_DATA_N<0>
OUT
53 61 65
OUT
53 61 65
AN32 MIPI0D_DPDATA1
AP32 MIPI0D_DNDATA1
DP_PAD_TX1P B22
DP_PAD_TX1N A22
EDP_DATA_P<1>
EDP_DATA_N<1>
OUT
53 61 65
OUT
53 61 65
DP_PAD_TX2P B23
DP_PAD_TX2N A23
EDP_DATA_P<2>
EDP_DATA_N<2>
OUT
53 61 65
OUT
53 61 65
DP_PAD_TX3P B24
DP_PAD_TX3N A24
EDP_DATA_P<3>
EDP_DATA_N<3>
OUT
53 61 65
OUT
53 61 65
AT4 ISP0_CAM_REAR_CLK_R
1
64
SENSOR0_CLK
01005
SENSOR0_RST AP8
AT5 ISP1_CAM_FRONT_CLK_R
1
64
SENSOR1_CLK
01005
SENSOR1_RST AM13
AR31 MIPI0C_DPCLK
AT31 MIPI0C_DNCLK
MIPI0C_CAM_REAR_CLK_P
MIPI0C_CAM_REAR_CLK_N
PP1V8_EDP_AVDD_AUX
IN
NC_MIPI0C_CAM_REAR_DATA_P<3> AR29 MIPI0C_DPDATA3
NO_TEST=TRUE
AT29 MIPI0C_DNDATA3
NC_MIPI0C_CAM_REAR_DATA_N<3>
NO_TEST=TRUE
65 61 23
U0600
67
EDP_HPD
NO_TEST=TRUE
65
OMIT_TABLE
MIPI0D_VREG_0P4V AN27
MIPI1D_VREG_0P4V AN28
BI
(2X2MA)
MIPI0D_VDD18 AN26
MIPI1D_VDD18 AM31
AL26
AL27
AL28
AL29
AL30
29
2
67
62
MIPI_VDD10
(55MA)
0
5%
1/20W
MF
201
1
DP_PAD_AVDD3 F22
DP_PAD_AVDD2 F21
0.22UF
20%
6.3V
2 X5R
01005
1
(50MA)
(50MA)
C0906
1
DP_PAD_AVDD_AUX G19
(1MA)
0.22UF
20%
2 6.3V
X5R
01005
1
=PP1V8_EDP_SOC
DP_PAD_AVDD1 F20
DP_PAD_AVDD0 G21
C0905
62
1.0UF
DP_PAD_AVDDP0 G20
(14MA)
1.0UF
20%
2 6.3V
X5R
0201-1
1
C0915
(50MA)
(50MA)
C0900
1
DP_PAD_DVDD F18
(10MA)
1
62
R0940
=PP1V0_MIPI_SOC
DP_PAD_AVDDX F19
(14MA)
62
22
NOSTUFF
2
R0910
22
2
R0911
1
C0960
0.01UF
10%
2 6.3V
X5R
01005
1
R0960
1%
1/32W
MF
2 01005
PLACE_NEAR=U0600.E19:3MM
NO_TEST=TRUE
65
65
NC_MIPI0D_DPDATA1
NC_MIPI0D_DNDATA1
NO_TEST=TRUE
NC_MIPI0D_DPDATA3
NC_MIPI0D_DNDATA3
NO_TEST=TRUE
AN29 MIPI0D_DPDATA3
AP29 MIPI0D_DNDATA3
NO_TEST=TRUE
65
65
NC_MIPI0D_DPCLK
NC_MIPI0D_DNCLK
NO_TEST=TRUE
NC_MIPI1C_CAM_FRONT_DATA_P<1>
MIPI1C_DPDATA1 AL35
NO_TEST=TRUE
NC_MIPI1C_CAM_FRONT_DATA_N<1>
MIPI1C_DNDATA1 AL36
AN31 MIPI0D_DPCLK
AP31 MIPI0D_DNCLK
IN
22 61 65
IN
22 61 65
65
65
NO_TEST=TRUE
NO_TEST=TRUE
MIPI1C_DPCLK AM35
MIPI1C_DNCLK AM36
MIPI1C_CAM_FRONT_CLK_P
MIPI1C_CAM_FRONT_CLK_N
IN
22 61 65
IN
22 61 65
AM26
AM27
AM28
AM29
AM30
MIPI_VSS
A
8
7
6
5
4
3
G18 DP_PAD_AVSS_AUX
65
MIPI1C_CAM_FRONT_DATA_P<0>
MIPI1C_CAM_FRONT_DATA_N<0>
D21 DP_PAD_AVSS1
E20 DP_PAD_AVSS0
65
B
MIPI1C_DPDATA0 AN35
MIPI1C_DNDATA0 AN36
D20 DP_PAD_AVSSP0
NO_TEST=TRUE
H18 DP_PAD_AVSSX
NO_TEST=TRUE
AN30 MIPI0D_DPDATA2
AP30 MIPI0D_DNDATA2
E21 DP_PAD_AVSS2
E22 DP_PAD_AVSS3
65
NC_MIPI0D_DPDATA2
NC_MIPI0D_DNDATA2
F17 DP_PAD_DVSS
NO_TEST=TRUE
65
53 65
4.99K
B
8
7
6
5
4
Edited by Foxit Reader ActiveX For Evaluation Only.
1
Copyright(C)22006-2009 Foxit Corporation
3
OMIT_TABLE
U0600
ALCATRAZ
DISCRETE
FBGA
D
62 8
C1090
1
1
R1090
0.1UF
20%
2 6.3V
X5R-CERM
01005
C1092
20%
2 6.3V
X5R-CERM
01005
1%
1/32W
MF
2 01005
PPVREF_DDR0_CA_SOC
C1091
0.1UF
C1093
0.1UF
10K
20%
2 6.3V
X5R-CERM
01005
62 9
1
1%
1/32W
MF
2 01005
R1094
1
4.7K
0.1UF
PPVREF_DDR0_DQ_SOC
1
B
1
OUT
OUT
66 61 12
OUT
66 61 12
OUT
66 61 12
OUT
66 61 12
OUT
66 61 12
OUT
BI
1%
1/32W
MF
2 01005
66 61 12
BI
66 61 12
BI
66 61 12
BI
66 61 12
BI
66 61 12
BI
R1093
66 61 12
BI
10K
66 61 12
BI
66 61 12
BI
66 61 12
BI
66 61 12
BI
66 61 12
BI
66 61 12
BI
66 61 12
BI
66 61 12
BI
66 61 12
BI
66 61 12
BI
66 61 12
BI
61 12
BI
66 61 12
BI
66 61 12
BI
66 61 12
BI
66 61 12
BI
66 61 12
BI
66 61 12
BI
66 61 12
BI
8 66
8 66
R1097
C1097
4.7K
0.1UF
1%
1/32W
MF
2 01005
20%
6.3V
2 X5R-CERM
01005
OUT
66 61 12
10K
PPVREF_DDR1_DQ_SOC
4.7K
0.1UF
66 61 12
66 61 12
1
R1095
C1095
OUT
BI
8 66
1
OUT
66 61 12
66 61 12
1%
1/32W
MF
2 01005
20%
2 6.3V
X5R-CERM
01005
66 61 12
66 61 12
4.7K
0.1UF
1%
1/32W
MF
2 01005
20%
2 6.3V
X5R-CERM
01005
OUT
BI
R1096
C1096
OUT
66 61 12
66 61 12
1
1
C1094
OUT
66 61 12
BI
=PP1V2_VDDIOD_SOC
1
66 61 12
BI
1%
1/32W
MF
2 01005
20%
2 6.3V
X5R-CERM
01005
OUT
66 61 12
PPVREF_DDR1_CA_SOC
R1091
OUT
66 61 12
66 61 12
8 66
1
OUT
66 61 12
BI
1
1
OUT
66 61 12
66 61 12
R1092
0.1UF
10K
66 61 12
BI
1
1
OUT
66 61 12
=PP1V2_S2R_DDR_SOC
C
66 61 12
1%
1/32W
MF
2 01005
20%
6.3V
2 X5R-CERM
01005
62 8
66 61 12
BI
66 61 12
BI
66 61 12
BI
66 61 12
BI
66 61 12
BI
66 61 12
BI
66 61 12
BI
66 61 12
BI
66 61 12
OUT
66 61 12
OUT
DDR0_CA<0>
DDR0_CA<1>
DDR0_CA<2>
DDR0_CA<3>
DDR0_CA<4>
DDR0_CA<5>
DDR0_CA<6>
DDR0_CA<7>
DDR0_CA<8>
DDR0_CA<9>
AP27
AR27
AT27
AR26
AT26
AR20
AT20
AT19
AR19
AP19
DDR0_CA0
DDR0_CA1
DDR0_CA2
DDR0_CA3
DDR0_CA4
DDR0_CA5
DDR0_CA6
DDR0_CA7
DDR0_CA8
DDR0_CA9
DDR0_CKE<0>
DDR0_CKE<1>
DDR0_CSN<0>
DDR0_CSN<1>
AR24
AT24
AR25
AT25
DDR0_CKE0
DDR0_CKE1
DDR0_CSN0
DDR0_CSN1
66
66
1
C1001
0.22UF
20%
2 6.3V
X5R
01005
1
C1000
0.22UF
20%
6.3V
2 X5R
01005
A
1
1
1
1
R1003
66
240
240
240
240
66
1%
1/32W
MF
2 01005
1%
1/32W
MF
2 01005
1%
1/32W
MF
2 01005
1%
1/32W
MF
2 01005
R1000
R1001
R1002
66
DDR1_CA<0>
DDR1_CA<1>
DDR1_CA<2>
DDR1_CA<3>
DDR1_CA<4>
DDR1_CA<5>
DDR1_CA<6>
DDR1_CA<7>
DDR1_CA<8>
DDR1_CA<9>
DDR1_CKE0
DDR1_CKE1
DDR1_CSN0
DDR1_CSN1
P35
P36
N35
N36
DDR1_CKE<0>
DDR1_CKE<1>
DDR1_CSN<0>
DDR1_CSN<1>
P4
T4
K3
V4
DDR1_DM<0>
DDR1_DM<1>
DDR1_DM<2>
DDR1_DM<3>
K2
L4
L2
M4
M2
N4
N3
N2
P3
P2
R4
R2
T2
U4
U3
U2
G4
G2
H4
H2
J4
J3
J2
K4
V3
V2
W4
W2
Y4
Y2
AA4
AA2
DDR1_DQ<0>
DDR1_DQ<1>
DDR1_DQ<2>
DDR1_DQ<3>
DDR1_DQ<4>
DDR1_DQ<5>
DDR1_DQ<6>
DDR1_DQ<7>
DDR1_DQ<8>
DDR1_DQ<9>
DDR1_DQ<10>
DDR1_DQ<11>
DDR1_DQ<12>
DDR1_DQ<13>
DDR1_DQ<14>
DDR1_DQ<15>
DDR1_DQ<16>
DDR1_DQ<17>
DDR1_DQ<18>
DDR1_DQ<19>
DDR1_DQ<20>
DDR1_DQ<21>
DDR1_DQ<22>
DDR1_DQ<23>
DDR1_DQ<24>
DDR1_DQ<25>
DDR1_DQ<26>
DDR1_DQ<27>
DDR1_DQ<28>
DDR1_DQ<29>
DDR1_DQ<30>
DDR1_DQ<31>
DDR1_DQS_P<0>
DDR1_DQS_P<1>
DDR1_DQS_P<2>
DDR1_DQS_P<3>
DDR1_DQS_N<0>
DDR1_DQS_N<1>
DDR1_DQS_N<2>
DDR1_DQS_N<3>
DDR0_DM0
DDR0_DM1
DDR0_DM2
DDR0_DM3
DDR0_DQ<0>
DDR0_DQ<1>
DDR0_DQ<2>
DDR0_DQ<3>
DDR0_DQ<4>
DDR0_DQ<5>
DDR0_DQ<6>
DDR0_DQ<7>
DDR0_DQ<8>
DDR0_DQ<9>
DDR0_DQ<10>
DDR0_DQ<11>
DDR0_DQ<12>
DDR0_DQ<13>
DDR0_DQ<14>
DDR0_DQ<15>
DDR0_DQ<16>
DDR0_DQ<17>
DDR0_DQ<18>
DDR0_DQ<19>
DDR0_DQ<20>
DDR0_DQ<21>
DDR0_DQ<22>
DDR0_DQ<23>
DDR0_DQ<24>
DDR0_DQ<25>
DDR0_DQ<26>
DDR0_DQ<27>
DDR0_DQ<28>
DDR0_DQ<29>
DDR0_DQ<30>
DDR0_DQ<31>
B15
D14
B14
D13
B13
D12
C12
B12
C11
B11
D10
B10
B9
D8
C8
B8
D18
B18
D17
B17
D16
C16
B16
D15
C7
B7
D6
B6
D5
B5
D4
B4
DDR0_DQ0
DDR0_DQ1
DDR0_DQ2
DDR0_DQ3
DDR0_DQ4
DDR0_DQ5
DDR0_DQ6
DDR0_DQ7
DDR0_DQ8
DDR0_DQ9
DDR0_DQ10
DDR0_DQ11
DDR0_DQ12
DDR0_DQ13
DDR0_DQ14
DDR0_DQ15
DDR0_DQ16
DDR0_DQ17
DDR0_DQ18
DDR0_DQ19
DDR0_DQ20
DDR0_DQ21
DDR0_DQ22
DDR0_DQ23
DDR0_DQ24
DDR0_DQ25
DDR0_DQ26
DDR0_DQ27
DDR0_DQ28
DDR0_DQ29
DDR0_DQ30
DDR0_DQ31
DDR0_DQS_P<0>
DDR0_DQS_P<1>
DDR0_DQS_P<2>
DDR0_DQS_P<3>
A14
A9
A18
A5
DDR0_PDQS0
DDR0_PDQS1
DDR0_PDQS2
DDR0_PDQS3
DDR1_PDQS0
DDR1_PDQS1
DDR1_PDQS2
DDR1_PDQS3
L1
T1
G1
Y1
DDR0_DQS_N<0>
DDR0_DQS_N<1>
DDR0_DQS_N<2>
DDR0_DQS_N<3>
A13
A10
A17
A6
DDR0_NDQS0
DDR0_NDQS1
DDR0_NDQS2
DDR0_NDQS3
DDR1_NDQS0
DDR1_NDQS1
DDR1_NDQS2
DDR1_NDQS3
M1
R1
H1
W1
DDR0_CA_ZQ_SOC
DDR1_CA_ZQ_SOC
DDR0_DQ_ZQ_SOC
DDR1_DQ_ZQ_SOC
PPVREF_DDR0_CA_SOC
8 PPVREF_DDR1_CA_SOC
8 PPVREF_DDR0_DQ_SOC
8 PPVREF_DDR1_DQ_SOC
66 8
L34
L35
L36
M35
M36
V35
V36
W36
W35
W34
D11
D9
C15
D7
=PP1V2_S2R_DDR_SOC
66
DDR1_CA0
DDR1_CA1
DDR1_CA2
DDR1_CA3
DDR1_CA4
DDR1_CA5
DDR1_CA6
DDR1_CA7
DDR1_CA8
DDR1_CA9
DDR0_DM<0>
DDR0_DM<1>
DDR0_DM<2>
DDR0_DM<3>
DDR0_CK_P
DDR0_CK_N
66
(14 OF 14)
AT22 DDR0_CK
AR22 DDR0_CKB
AP23
R34
AN22
T33
F12
R6
AP22
T34
F13
P6
DDR1_DM0
DDR1_DM1
DDR1_DM2
DDR1_DM3
DDR1_DQ0
DDR1_DQ1
DDR1_DQ2
DDR1_DQ3
DDR1_DQ4
DDR1_DQ5
DDR1_DQ6
DDR1_DQ7
DDR1_DQ8
DDR1_DQ9
DDR1_DQ10
DDR1_DQ11
DDR1_DQ12
DDR1_DQ13
DDR1_DQ14
DDR1_DQ15
DDR1_DQ16
DDR1_DQ17
DDR1_DQ18
DDR1_DQ19
DDR1_DQ20
DDR1_DQ21
DDR1_DQ22
DDR1_DQ23
DDR1_DQ24
DDR1_DQ25
DDR1_DQ26
DDR1_DQ27
DDR1_DQ28
DDR1_DQ29
DDR1_DQ30
DDR1_DQ31
DDR1_CK T36
DDR1_CKB T35
DDR0_VDD_CKE
(<1MA EACH)
DDR1_VDD_CKE
DDR0_RREF_CA
DDR1_RREF_CA
DDR0_RREF_DQ
DDR1_RREF_DQ
DDR0_VREF_CA
DDR1_VREF_CA
DDR0_VREF_DQ
DDR1_VREF_DQ
(DDR IMPEDANCE CONTROL)
8
7
6
5
4
3
DDR1_CK_P
DDR1_CK_N
OUT
12 61 66
OUT
12 61 66
OUT
12 61 66
OUT
12 61 66
OUT
12 61 66
OUT
12 61 66
OUT
12 61 66
OUT
12 61 66
OUT
12 61 66
OUT
12 61 66
OUT
12 61 66
OUT
12 61 66
OUT
12 61 66
OUT
12 61 66
OUT
12 61 66
OUT
12 61 66
OUT
12 61 66
OUT
12 61 66
BI
12 61 66
BI
12 61 66
BI
12 61 66
BI
12 61 66
BI
12 61 66
BI
12 61 66
BI
12 61 66
BI
12 61 66
BI
12 61 66
BI
12 61 66
BI
12 61 66
BI
12 61 66
BI
12 61 66
BI
12 61 66
BI
12 61 66
BI
12 61 66
BI
12 61 66
BI
12 61 66
BI
12 61 66
BI
12 61 66
BI
12 61 66
BI
12 61 66
BI
12 61 66
BI
12 61 66
BI
12 61 66
BI
12 61 66
BI
12 61 66
BI
12 61 66
BI
12 61 66
BI
12 61 66
BI
12 61 66
BI
12 61 66
BI
12 61 66
BI
12 61 66
BI
12 61 66
BI
12 61 66
BI
12 61 66
BI
12 61 66
BI
12 61 66
BI
12 61 66
OUT
12 61 66
OUT
12 61 66
D
C
B
8
7
6
5
4
Edited by Foxit Reader ActiveX For Evaluation Only.
1
Copyright(C)22006-2009 Foxit Corporation
3
OMIT_TABLE
D
62 9 8
=PP1V2_VDDIOD_SOC
C1100
1
1.0UF
DDR0_CA0 CAPS
62 9 8
20%
6.3V 2
X5R
0201-1
C1101
1
1.0UF
20%
6.3V 2
X5R
0201-1
C1102
C1105
1
1.0UF
C1106
1
0.47UF
20%
6.3V 2
X5R
0201-1
1
0.47UF
20%
4V
CERM-X5R-1 2
201
20%
4V
CERM-X5R-1 2
201
=PP1V2_VDDIOD_SOC
C1110
1
1.0UF
DDR1_CA1 CAPS
20%
6.3V 2
X5R
0201-1
C1111
1
1.0UF
20%
6.3V 2
X5R
0201-1
C1112
C1115
1
1.0UF
C1116
1
0.47UF
0.47UF
20%
4V
CERM-X5R-1 2
201
20%
6.3V 2
X5R
0201-1
1
20%
4V
CERM-X5R-1 2
201
AL21
AL22
AL23
AL24
AL25
AM21
AM23
AM25
N30
P30
R30
T30
U30
N31
R31
U31
U0600
ALCATRAZ
DISCRETE
FBGA
(9 OF 14)
VDDIOD_DDR0CA
VSS
VDDIOD_DDR1CA
Y14
Y16
Y18
Y20
Y24
Y26
Y28
K30
Y33
Y34
Y35
Y36
M30
V30
Y30
OMIT_TABLE
U0600
ALCATRAZ
DISCRETE
FBGA
(7 OF 14)
POR CAPS 4/13/2012
62 10 9
POR CAPS 4/13/2012
=PP1V8_VDDIO18_SOC
CRITICAL
C1120
1
4.3UF
20%
4V
X5R-CERM 2
0610
C1125
1
1.0UF
20%
6.3V 2
X5R
0201-1
C1126
1
C1130
1.0UF
C1131
1
0.47UF
20%
6.3V 2
X5R
0201-1
1
0.47UF
20%
4V
CERM-X5R-1 2
201
20%
4V
CERM-X5R-1 2
201
C
C1135
1
1.0UF
20%
6.3V 2
X5R
0201-1
C1140
0.22UF
1
20%
6.3V
X5R 2
01005
C1141
1
0.22UF
20%
6.3V
X5R 2
01005
C1145
1
8.2PF
+/-0.5PF
16V
NP0-C0G-CERM 2
01005
AB7
AC7
AD7
AE7
AF7
AG7
AH7
AJ7
AK7
AL7
AL8
AL9
AL10
AL11
VDDIO18_GRP1
(65MA)
GPIO, UART, SPI,
I2C, SENSOR,
SOCHOT, PMU
AL13
AL14
VDDIOD_DDRDQ
(1000MA)
SHARED WITH DRAM VDDQ
AL16
AL17
AL19
AL20
AA30
AB31
AC30
AD31
AE30
AF31
AG30
W30
Y31
B
G29
G30
H31
J30
K31
L30
M31
PLACE_NEAR=U0600.F27:2MM
L1190
VDDIO18_GRP2
(20MA)
I2S, TMR, SIO,
GPIO, UART
G7
G8
G9
G10
G11
G12
G13
G14
G15
G16
H7
J7
K7
L7
M7
N7
P7
R7
T7
U7
V7
W7
Y7
F7
F9
F11
F14
F16
G6
J6
L6
N6
T6
V6
Y6
=PP1V2_VDDIOD_SOC
CRITICAL
C1150
15UF
1
20%
4V
X5R 2
0402
C1155
1
4.3UF
20%
4V
X5R-CERM 2
0610
C1160
1
1.0UF
20%
6.3V 2
X5R
0201-1
C1161
1
C1162
1.0UF
1.0UF
20%
6.3V 2
X5R
0201-1
20%
6.3V 2
X5R
0201-1
VSS
C1163
1.0UF
1
C1165
0.47UF
1
C1166
0.47UF
1
C1170
1
8.2PF
20%
20%
20%
+/-0.5PF
6.3V 2
4V
4V
16V
X5R
CERM-X5R-1 2 CERM-X5R-1 2 NP0-C0G-CERM
2
201
0201-1
201
01005
62 10 9
1
2
67
PP1V8_XTAL
VDDIO18_GRP3
(31MA)
PPN, GPIO, JTAG
F27 VDDIO18_GRP4
(2MA) XTAL I/O
01005
C1190
1
0.22UF
20%
6.3V 2
X5R
01005
A
8
7
6
5
D
C
B
120-OHM-25%-250MA-0.5DCR
=PP1V8_VDDIO18_SOC
8 9 62
1
M5
M6
M8
M10
M12
M14
M16
M18
M20
M22
M24
M26
M28
AT12
M32
M33
M34
N1
N5
N9
N11
N13
N15
N17
N19
N21
N23
N25
N27
N29
N32
N33
N34
P1
P5
P8
P10
P12
P14
P16
P18
P20
P22
P24
P26
P28
P31
P32
P33
P34
4
3
8
7
6
5
4
62
OMIT_TABLE
U0600
ALCATRAZ
DISCRETE
FBGA
(8 OF 14)
D
C
POR CAPS 4/13/2012
62
1
CRITICAL
C1250
1
15UF
CRITICAL
C1256
1
CRITICAL
C1262
4.3UF
20%
4V
2 X5R
0402
62
AC25
AC27
AC29
AD24
AD26
AD28
AE25
AE27
AE29
AK26
V26
=PPVDD_SRAM_CPU
20%
4V
2 X5R-CERM
0610
1
CRITICAL
C1263
1UF
1UF
20%
2 4V
X6S
0204
20%
4V
2 X6S
0204
1
CRITICAL
C1271
0.47UF
20%
4V
2 X7S
0204
=PPVDD_SRAM_SOC
CRITICAL
1
C1255
CRITICAL
1
4.3UF
20%
2 4V
X5R-CERM
0610
C1260
CRITICAL
1
C1261
1UF
1UF
20%
2 4V
X6S
0204
20%
2 4V
X6S
0204
R10
R12
T9
T11
T13
U10
U12
U14
U16
V9
V11
V13
W10
W12
Y9
Y11
Y13
Y15
CRITICAL
1
C1270
1
0.47UF
C1275
8.2PF
+/-0.5PF
2 16V
NP0-C0G-CERM
01005
20%
4V
2 X7S
0204
B
VSS
VDD_SRAM_CPU
(1500MA)
VDD_SRAM_SOC
R1200
62 9
=PP1V8_VDDIO18_SOC
1
0.00 2
0%
1/32W
MF
01005
67
1
PP1V8_VDD_ANA_TMPSADC
C1280
0.22UF
20%
6.3V
2 X5R
01005
1
C1281
0.22UF
20%
6.3V
2 X5R
01005
1
C1282
0.22UF
20%
2 6.3V
X5R
01005
1
AH22
Y22
AA6
G22
C1283
0.22UF
20%
6.3V
2 X5R
01005
A
8
7
6
VDD_ANA_TMPSADC0
VDD_ANA_TMPSADC1
VDD_ANA_TMPSADC2
VDD_ANA_TMPSADC3
(4 * 2.5MA)
R3
R5
R9
R11
R13
R15
R17
R19
R21
R23
R25
R27
R29
R32
R35
R36
T3
T5
T10
T12
T14
T16
T18
T20
T22
T24
T26
T28
T31
T32
U1
U5
U6
U9
U11
U13
U15
U17
U19
U21
U23
U25
U27
U32
U33
U34
U35
U36
V1
V5
V10
V12
V14
V16
V18
V20
V22
V24
V28
H30
V32
V33
V34
W3
W5
W6
W9
W11
W13
W15
W17
W19
W21
W23
W25
W27
W29
W31
W32
W33
Y3
Y5
Y8
Y10
Y12
5
POR CAPS 4/13/2012
=PPVDD_SOC
1
XW1200
67 57
PPVDD_SOC_RAIL_SENSE
(PLANE SENSE)
SHORT-10L-0.25MM-SM
1
2
PLACE_NEAR=U0600.N22:10MM
CRITICAL
C1205
4.3UF
20%
2 4V
X5R-CERM
0610
1
CRITICAL
C1220
1UF
20%
4V
2 X6S
0204
1
CRITICAL
C1223
1UF
20%
4V
2 X6S
0204
1
CRITICAL
C1230
0.47UF
20%
4V
2 X7S
0204
1
C1240
0.22UF
20%
6.3V
2 X5R
01005
4
Edited by Foxit Reader ActiveX For Evaluation Only.
1
Copyright(C)22006-2009 Foxit Corporation
3
1
CRITICAL
C1206
4.3UF
20%
4V
2 X5R-CERM
0610
1
CRITICAL
C1221
1UF
C1207
4.3UF
20%
4V
2 X5R-CERM
0610
1
1
CRITICAL
C1224
CRITICAL
C1222
1
CRITICAL
C1225
1UF
20%
4V
2 X6S
0204
20%
4V
2 X6S
0204
CRITICAL
C1231
0.47UF
20%
4V
2 X7S
0204
1
C1241
0.22UF
20%
6.3V
2 X5R
01005
3
1
C1245
8.2PF
CRITICAL
C1208
4.3UF
20%
4V
2 X5R-CERM
0610
20%
4V
2 X6S
0204
1UF
1
CRITICAL
1UF
20%
4V
2 X6S
0204
1
1
+/-0.5PF
16V
2 NP0-C0G-CERM
01005
OMIT_TABLE
AB21
AD21
AF21
AH21
AK21
G26
G28
H9
H11
H13
H15
H17
H19
H21
H23
H25
H27
H29
J8
J10
J12
J14
J16
J18
J20
J22
J24
J26
J28
K9
K11
K13
K15
K17
K19
K21
K23
K25
K27
K29
L8
L10
L12
L14
L16
L18
L20
L22
L24
L26
L28
M9
M11
M13
M15
M17
M19
M21
M23
M25
M27
M29
N8
N10
N12
N14
N16
N18
N20
U0600
ALCATRAZ
DISCRETE
FBGA
(10 OF 14)
VDD
VDD
(VDD_SOC 1900MA)
N22
N24
N26
N28
P9
P11
P13
P15
P17
P19
P21
P23
P25
P27
P29
R8
R14
R16
R20
R22
R24
R26
R28
T15
T17
T19
T21
T23
T25
T27
T29
U8
U18
U20
V15
V17
V19
V21
W8
W14
W16
W18
W20
Y17
Y19
Y21
AA16
T8
U29
V8
VDD_SENSE V31
D
C
PPVDD_SOC_SOC_SENSE
57 61
67
(DIE SENSE)
B
2
1
8
7
6
OMIT_TABLE
D
C
B
A
A1
A2
A3
A4
A7
A8
A11
A12
A15
A16
A19
A25
A28
A34
A35
A36
AA1
C4
AA5
AA3
AA9
AA11
AA13
AA15
AA17
AA19
AA21
AA23
AA25
AA27
AA29
AA31
AB1
AB2
AB3
AB4
AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AB24
AB26
AB28
AB30
AB34
AC9
AC11
AC13
AC15
AC17
AC19
AC21
AC23
AC31
AC35
AD2
AD6
AD8
AD10
AD12
AD14
AD16
AD18
AD20
AD25
AD27
AD29
AD30
AE3
AE9
AE11
AE13
AE15
AE17
AE19
AE21
AE23
AE31
AE34
AF6
AF8
AF10
AF12
AF14
AF16
AF18
AF20
AF22
ALCATRAZ
DISCRETE
FBGA
(11 OF 14)
8
4
Edited by Foxit Reader ActiveX For Evaluation Only.
1
Copyright(C)22006-2009 Foxit Corporation
3
OMIT_TABLE
U0600
VSS
5
VSS
AF24
AF26
AF28
AF30
AF35
AG2
AG9
AG11
AG13
AG15
AG17
AG19
AG21
AG23
AG25
AG27
AG29
AG31
AH3
AH6
AH8
AH10
AH12
AH14
AH16
AH18
AH20
AH24
AH26
AH28
AH30
AH31
AH35
AH36
AJ9
AJ11
AJ13
AJ15
AJ17
AJ19
AJ21
AJ23
AJ25
AJ27
AJ29
AK2
AK6
AK8
AK10
AK12
AK14
AK16
AK18
AK20
AK22
AK24
AK28
AF33
AK31
AK32
AK33
AK34
AK35
AK36
AL3
AK30
AL32
AL33
AL34
AM6
AM8
AL12
AM12
AM14
AM16
AM18
AJ34
AM22
AM24
AM32
AM33
AM34
AN2
AN18
AN19
AN20
AN21
AN24
AN25
AN34
AP1
AP3
AP6
AL15
AP12
AP15
AP18
AP20
AP21
AP24
AP25
AP26
AP28
AP34
AP35
AP36
AR1
AR2
AR5
AR8
AL18
AM15
AR15
AR18
AR21
AR23
AR28
AR34
AR35
AR36
AT1
AT2
AT3
AN12
AT15
AT18
AT21
AT23
AT28
AT34
AT35
AT36
B1
B2
B3
B19
B25
B28
B32
B35
B36
C1
C2
C3
C5
C6
C9
C10
C13
C14
C17
C18
C19
C20
C21
C22
C23
C24
C25
C26
C30
C36
D1
D2
D3
D22
D25
D31
D32
D33
D35
E1
E2
E3
E4
E5
E6
E7
E8
E9
E10
E11
E12
E13
7
U0600
ALCATRAZ
DISCRETE
FBGA
(12 OF 14)
VSS
VSS
6
E14
E15
E16
E17
E18
E30
F1
F2
F3
F4
F5
F6
F8
F10
F15
F29
F30
F31
F32
F33
F35
G3
G5
G27
G31
H3
H5
H6
H8
H10
H12
H14
H16
H20
H22
H24
H26
H28
AN15
H33
H35
J1
J5
J9
J11
J13
J15
J17
J19
J21
J23
J25
J27
J29
J31
K1
K5
K6
K8
K10
K12
K14
K16
K18
K20
K22
K24
K26
K28
AR12
K32
K33
K34
K35
K36
L3
L5
L9
L11
L13
L15
L17
L19
L21
L23
L25
L27
L29
L31
L32
L33
M3
POR CAPS 4/13/2012
62
=PPVDD_GPU
XW1300
67 57
SHORT-10L-0.25MM-SM
1
2
1
PPVDD_GPU_RAIL_SENSE
(PLANE SENSE)
PLACE_NEAR=U0600.AA8:11MM
C1350
15UF
20%
4V
2 X5R
0402
1
C1351
15UF
1
CRITICAL
C1355
4.3UF
20%
4V
2 X5R
0402
20%
4V
2 X5R-CERM
0610
CRITICAL
1
C1356
4.3UF
20%
4V
2 X5R-CERM
0610
1
CRITICAL
C1357
4.3UF
20%
4V
2 X5R-CERM
0610
CRITICAL
1
C1358
4.3UF
20%
4V
2 X5R-CERM
0610
1
CRITICAL
C1359
4.3UF
1
CRITICAL
C1360
4.3UF
20%
4V
2 X5R-CERM
0610
20%
4V
2 X5R-CERM
0610
D
1
CRITICAL
C1370
1UF
20%
4V
2 X6S
0204
1
CRITICAL
C1380
0.47UF
1
CRITICAL
C1371
1UF
C1372
1UF
20%
4V
2 X6S
0204
1
1
CRITICAL
20%
4V
2 X6S
0204
CRITICAL
C1381
0.47UF
1
CRITICAL
C1382
0.47UF
20%
2 4V
X7S
0204
20%
4V
2 X7S
0204
20%
4V
2 X7S
0204
1
1
1
C1390
0.22UF
20%
6.3V
2 X5R
01005
C1391
0.22UF
20%
6.3V
2 X5R
01005
C1392
0.22UF
20%
6.3V
2 X5R
01005
CRITICAL
C1373
1
1UF
20%
4V
2 X6S
0204
CRITICAL
C1383
1
0.47UF
20%
4V
2 X7S
0204
1
C1393
0.22UF
20%
6.3V
2 X5R
01005
1
CRITICAL
C1374
1UF
20%
4V
2 X6S
0204
1
CRITICAL
C1384
0.47UF
20%
4V
2 X7S
0204
1
1
CRITICAL
C1375
1UF
20%
4V
2 X6S
0204
1
OMIT_TABLE
CRITICAL
C1385
0.47UF
20%
4V
2 X7S
0204
C1395
8.2PF
+/-0.5PF
16V
2 NP0-C0G-CERM
01005
POR CAPS 4/13/2012
62
=PPVDD_CPU
XW1310
SHORT-10L-0.25MM-SM
67 57
PPVDD_CPU_RAIL_SENSE 1
2
(PLANE SENSE)
PLACE_NEAR=U0600.AA22:10MM
1
C1300
15UF
20%
4V
2 X5R
0402
1
CRITICAL
C1320
1UF
20%
4V
2 X6S
0204
1
15UF
1
C1328
1UF
20%
4V
2 X6S
0204
1
CRITICAL
C1330
0.47UF
20%
4V
2 X7S
0204
1
C1340
0.22UF
20%
6.3V
2 X5R
01005
CRITICAL
C1321
1UF
CRITICAL
C1305
4.3UF
20%
2 4V
X5R-CERM
0610
1
CRITICAL
C1322
1UF
20%
2 4V
X6S
0204
CRITICAL
1
C1301
20%
2 4V
X5R
0402
1
20%
4V
2 X6S
0204
1
CRITICAL
C1306
4.3UF
20%
2 4V
X5R-CERM
0610
1
CRITICAL
C1323
1UF
20%
4V
2 X6S
0204
1
CRITICAL
C1307
4.3UF
20%
2 4V
X5R-CERM
0610
1
CRITICAL
C1324
1UF
20%
4V
2 X6S
0204
1
CRITICAL
C1308
4.3UF
20%
2 4V
X5R-CERM
0610
1
CRITICAL
C1325
1UF
20%
4V
2 X6S
0204
1
CRITICAL
C1309
4.3UF
20%
2 4V
X5R-CERM
0610
1
CRITICAL
C1326
1UF
1
CRITICAL
C1310
4.3UF
20%
2 4V
X5R-CERM
0610
1
CRITICAL
C1327
1UF
20%
4V
2 X6S
0204
20%
4V
2 X6S
0204
CRITICAL
1
C1329
1UF
20%
4V
2 X6S
0204
1
CRITICAL
C1331
0.47UF
20%
4V
2 X7S
0204
1
C1341
0.22UF
20%
2 6.3V
X5R
01005
1
CRITICAL
C1332
0.47UF
20%
4V
2 X7S
0204
1
C1342
0.22UF
20%
6.3V
2 X5R
01005
1
CRITICAL
C1333
0.47UF
20%
4V
2 X7S
0204
1
C1343
0.22UF
20%
6.3V
2 X5R
01005
1
CRITICAL
C1334
0.47UF
20%
4V
2 X7S
0204
1
1
CRITICAL
C1335
0.47UF
20%
4V
2 X7S
0204
1
CRITICAL
C1336
0.47UF
20%
4V
2 X7S
0204
C1345
8.2PF
67 61 57
+/-0.5PF
2 16V
NP0-C0G-CERM
01005
1
CRITICAL
C1337
0.47UF
20%
4V
2 X7S
0204
AA22
AA24
AA26
AA28
AB23
AB25
AB27
AB29
AC22
AC24
AC26
AC28
AD23
AE22
AE24
AE26
AE28
AF23
AF25
AF27
AF29
AG22
AG24
AG26
AG28
AH23
AH25
AH27
AH29
AJ22
AJ24
AJ26
AJ28
AK23
AK25
AK27
AK29
U22
U24
U26
U28
V23
V25
V27
V29
W22
W24
W26
W28
Y23
Y25
Y27
Y29
U0600
ALCATRAZ
DISCRETE
FBGA
(13 OF 14)
VDD_CPU
(10100MA)
VDD_GPU
(6800MA)
PPVDD_CPU_SOC_SENSE AL31 VDD_CPU_SENSE
(DIE SENSE)
AA8
AA10
AA12
AA14
AA18
AA20
AB9
AB11
AB13
AB15
AB17
AB19
AC8
AC10
AC12
AC14
AC16
AC18
AC20
AD9
AD11
AD13
AD15
AD17
AD19
AE8
AE10
AE12
AE14
AE16
AE18
AE20
AF9
AF11
AF13
AF15
AF17
AF19
AG8
AG10
AG12
AG14
AG16
AG18
AG20
AH9
AH11
AH13
AH15
AH17
AH19
AJ8
AJ10
AJ12
AJ14
AJ16
AJ18
AJ20
AK9
AK11
AK13
AK15
AK17
AK19
VDD_GPU_SENSE AA7
67 61 57
PPVDD_GPU_SOC_SENSE
(DIE SENSE)
5
4
3
C
B
IN
66 61 8
D
IN
66 61 8
IN
66 61 8
IN
66 61 8
IN
66 61 8
IN
66 61 8
IN
66 61 8
IN
66 61 8
IN
66 61 8
IN
66 61 8
IN
66 61 8
IN
66 61 8
IN
66 61 8
IN
66 61 8
IN
66 61 8
IN
DDR0_CA0
DDR0_CA1
DDR0_CA2
DDR0_CA3
DDR0_CA4
DDR0_CA5
DDR0_CA6
DDR0_CA7
DDR0_CA8
DDR0_CA9
DDR0_CK_P
DDR0_CK_N
DDR0_CKE<0>
DDR0_CKE<1>
AF15
AF14
AF16
AE17
DDR0_CK
DDR0_CK*
DDR0_CKE0
DDR0_CKE1
DDR0_CSN<0>
DDR0_CSN<1>
AF17 DDR0_CS0
AE18 DDR0_CS1
DDR0_DM<0>
DDR0_DM<1>
DDR0_DM<2>
DDR0_DM<3>
D15
D13
D20
D8
DDR0_DM0
DDR0_DM1
DDR0_DM2
DDR0_DM3
DDR0_DQ<0>
DDR0_DQ<1>
DDR0_DQ<2>
DDR0_DQ<3>
DDR0_DQ<4>
DDR0_DQ<5>
DDR0_DQ<6>
DDR0_DQ<7>
DDR0_DQ<8>
DDR0_DQ<9>
DDR0_DQ<10>
DDR0_DQ<11>
DDR0_DQ<12>
DDR0_DQ<13>
DDR0_DQ<14>
DDR0_DQ<15>
DDR0_DQ<16>
DDR0_DQ<17>
DDR0_DQ<18>
DDR0_DQ<19>
DDR0_DQ<20>
DDR0_DQ<21>
DDR0_DQ<22>
DDR0_DQ<23>
DDR0_DQ<24>
DDR0_DQ<25>
DDR0_DQ<26>
DDR0_DQ<27>
DDR0_DQ<28>
DDR0_DQ<29>
DDR0_DQ<30>
DDR0_DQ<31>
B19
C19
B18
C18
B17
C17
B16
C16
C12
B12
C11
B11
C10
B10
C9
B9
B24
C24
B23
C23
B22
C22
B21
C21
C7
B7
C6
B6
C5
B5
C4
B4
DDR0_DQ0
DDR0_DQ1
DDR0_DQ2
DDR0_DQ3
DDR0_DQ4
DDR0_DQ5
DDR0_DQ6
DDR0_DQ7
DDR0_DQ8
DDR0_DQ9
DDR0_DQ10
DDR0_DQ11
DDR0_DQ12
DDR0_DQ13
DDR0_DQ14
DDR0_DQ15
DDR0_DQ16
DDR0_DQ17
DDR0_DQ18
DDR0_DQ19
DDR0_DQ20
DDR0_DQ21
DDR0_DQ22
DDR0_DQ23
DDR0_DQ24
DDR0_DQ25
DDR0_DQ26
DDR0_DQ27
DDR0_DQ28
DDR0_DQ29
DDR0_DQ30
DDR0_DQ31
OMIT_TABLE
J25
K26
K25
L25
M26
V26
W25
W26
Y26
AA25
DDR1_CA<0>
DDR1_CA<1>
DDR1_CA<2>
DDR1_CA<3>
DDR1_CA<4>
DDR1_CA<5>
DDR1_CA<6>
DDR1_CA<7>
DDR1_CA<8>
DDR1_CA<9>
R26
T26
P26
N25
DDR1_CK_P
DDR1_CK_N
DDR1_CKE<0>
DDR1_CKE<1>
DDR1_CS0 N26
DDR1_CS1 M25
DDR1_CSN<0>
DDR1_CSN<1>
DDR1_CA0
DDR1_CA1
DDR1_CA2
DDR1_CA3
DDR1_CA4
DDR1_CA5
DDR1_CA6
DDR1_CA7
DDR1_CA8
DDR1_CA9
U1400
BGA
(1 OF 3)
DDR1_CK
DDR1_CK*
DDR1_CKE0
DDR1_CKE1
DDR1_DM0
DDR1_DM1
DDR1_DM2
DDR1_DM3
N4
R4
H4
Y4
DDR1_DM<0>
DDR1_DM<1>
DDR1_DM<2>
DDR1_DM<3>
J2
J3
K2
K3
L2
L3
M2
M3
T3
T2
U3
U2
V3
V2
W3
W2
D2
D3
E2
E3
F2
F3
G2
G3
AA3
AA2
AB3
AB2
AC3
AC2
AD3
AD2
DDR1_DQ<0>
DDR1_DQ<1>
DDR1_DQ<2>
DDR1_DQ<3>
DDR1_DQ<4>
DDR1_DQ<5>
DDR1_DQ<6>
DDR1_DQ<7>
DDR1_DQ<8>
DDR1_DQ<9>
DDR1_DQ<10>
DDR1_DQ<11>
DDR1_DQ<12>
DDR1_DQ<13>
DDR1_DQ<14>
DDR1_DQ<15>
DDR1_DQ<16>
DDR1_DQ<17>
DDR1_DQ<18>
DDR1_DQ<19>
DDR1_DQ<20>
DDR1_DQ<21>
DDR1_DQ<22>
DDR1_DQ<23>
DDR1_DQ<24>
DDR1_DQ<25>
DDR1_DQ<26>
DDR1_DQ<27>
DDR1_DQ<28>
DDR1_DQ<29>
DDR1_DQ<30>
DDR1_DQ<31>
IN
8 61 66
IN
8 61 66
IN
8 61 66
IN
8 61 66
IN
8 61 66
62 12
IN
8 61 66
IN
8 61 66
IN
8 61 66
IN
8 61 66
IN
8 61 66
IN
8 61 66
IN
8 61 66
IN
8 61 66
IN
8 61 66
IN
8 61 66
IN
8 61 66
IN
8 61 66
IN
8 61 66
IN
8 61 66
IN
C
66 61 8
BI
66 61 8
BI
66 61 8
BI
66 61 8
BI
66 61 8
BI
66 61 8
BI
66 61 8
BI
66 61 8
BI
66 61 8
BI
66 61 8
BI
66 61 8
BI
66 61 8
BI
66 61 8
BI
66 61 8
BI
66 61 8
BI
66 61 8
BI
66 61 8
BI
66 61 8
BI
66 61 8
BI
66 61 8
BI
66 61 8
BI
66 61 8
BI
66 61 8
BI
61 8
BI
66 61 8
BI
66 61 8
BI
66 61 8
BI
66 61 8
BI
66 61 8
BI
66 61 8
BI
66 61 8
BI
DDR1_DQ0
DDR1_DQ1
DDR1_DQ2
DDR1_DQ3
DDR1_DQ4
DDR1_DQ5
DDR1_DQ6
DDR1_DQ7
DDR1_DQ8
DDR1_DQ9
DDR1_DQ10
DDR1_DQ11
DDR1_DQ12
DDR1_DQ13
DDR1_DQ14
DDR1_DQ15
DDR1_DQ16
DDR1_DQ17
DDR1_DQ18
DDR1_DQ19
DDR1_DQ20
DDR1_DQ21
DDR1_DQ22
DDR1_DQ23
DDR1_DQ24
DDR1_DQ25
DDR1_DQ26
DDR1_DQ27
DDR1_DQ28
DDR1_DQ29
DDR1_DQ30
DDR1_DQ31
DDR0
DDR1
BI
8 61 66
=PP1V2_VDDQ_DDR
CRITICAL
C1400
1
CRITICAL
C1401
15UF
CRITICAL
C1402
1
15UF
20%
4V
X5R 2
0402
CRITICAL
C1403
1
4.3UF
20%
4V
X5R 2
0402
1
4.3UF
20%
4V
X5R-CERM 2
0610
20%
4V
X5R-CERM 2
0610
C1410
BI
8 61 66
C1420
BI
8 61 66
15UF
BI
8 61 66
BI
8 61 66
BI
8 61 66
BI
8 61 66
BI
8 61 66
BI
8 61 66
C1435
BI
8 61 66
0.1UF
BI
8 61 66
BI
8 61 66
BI
8 61 66
BI
8 61 66
BI
8 61 66
BI
8 61 66
BI
8 61 66
BI
8 61 66
CRITICAL
1
20%
4V
X5R 2
0402
C1425
1
1
1
1UF
10%
6.3V
CERM 2
402
20%
6.3V
X5R-CERM 2
01005
62 12
C1426
1UF
10%
6.3V
CERM 2
402
C1436
C1428 1
C1429 1
1.0UF
C1439
1
0.1UF
20%
6.3V
X5R 2
0201-1
1
56PF
20%
6.3V
X5R-CERM 2
01005
5%
16V
NP0-C0G 2
01005
=PP1V2_S2R_DDR
CRITICAL
C1440
1
15UF
20%
4V
X5R 2
0402
CRITICAL
C1442
1
4.3UF
20%
4V
X5R-CERM 2
0610
CRITICAL
C1443
8 61 66
BI
8 61 66
BI
8 61 66
BI
8 61 66
BI
8 61 66
BI
8 61 66
BI
8 61 66
C1448 1
C1449 1
C1455
BI
8 61 66
1.0UF
1.0UF
0.1UF
BI
8 61 66
BI
8 61 66
BI
8 61 66
BI
8 61 66
BI
8 61 66
BI
8 61 66
62 12
20%
6.3V
X5R 2
0201-1
C1446 1
1
1UF
1UF
20%
4V
X5R-CERM 2
0610
BI
20%
6.3V
X5R 2
0201-1
C1445
1
4.3UF
10%
6.3V
CERM 2
402
10%
6.3V
CERM 2
402
C1456
1
C1459
1
0.1UF
20%
6.3V
X5R-CERM 2
01005
1
56PF
20%
6.3V
X5R-CERM 2
01005
5%
16V
NP0-C0G 2
01005
=PP1V2_S2R_DDR
CRITICAL
66 61 8
BI
66 61 8
BI
66 61 8
BI
66 61 8
BI
66 61 8
BI
66 61 8
BI
66 61 8
BI
66 61 8
BI
B
DDR0_DQS_P<0>
DDR0_DQS_N<0>
B15 DDR0_PDQS0
C15 DDR0_NDQS0
DDR1_PDQS0 N2
DDR1_NDQS0 N3
DDR1_DQS_P<0>
DDR1_DQS_N<0>
BI
8 61 66
BI
8 61 66
DDR0_DQS_P<1>
DDR0_DQS_N<1>
B13 DDR0_PDQS1
C13 DDR0_NDQS1
DDR1_PDQS1 R2
DDR1_NDQS1 R3
DDR1_DQS_P<1>
DDR1_DQS_N<1>
BI
8 61 66
BI
8 61 66
DDR0_DQS_P<2>
DDR0_DQS_N<2>
B20 DDR0_PDQS2
C20 DDR0_NDQS2
DDR1_PDQS2 H2
DDR1_NDQS2 H3
DDR1_DQS_P<2>
DDR1_DQS_N<2>
BI
8 61 66
BI
8 61 66
DDR0_DQS_P<3>
DDR0_DQS_N<3>
B8 DDR0_PDQS3
C8 DDR0_NDQS3
DDR1_PDQS3 Y2
DDR1_NDQS3 Y3
DDR1_DQS_P<3>
DDR1_DQS_N<3>
BI
8 61 66
BI
8 61 66
C1460
1
15UF
20%
4V
X5R 2
0402
C1465
66 12
PPVREF_DDR0_CA_DRAM
PPVREF_DDR0_DQ_DRAM
DDR0_ZQ_DRAM
66
AF13 DDR0_VREF_CA
B14 DDR0_VREF_DQ
DDR1_VREF_CA U26
DDR1_VREF_DQ P2
AF9 DDR0_ZQ
DDR1_ZQ AA26
PPVREF_DDR1_CA_DRAM
PPVREF_DDR1_DQ_DRAM
66
C1466
10%
6.3V
CERM 2
402
1
0.1UF
20%
6.3V
X5R-CERM 2
01005
C1476
C1469 1
1.0UF
20%
6.3V
X5R 2
0201-1
C1479
1
20%
6.3V
X5R 2
0201-1
C1415
0.1UF
AF24
AE2
AF6
AD26
B3
B25
C2
F26
A3
A9
A19
A25
V25
AC26
AE1
AF5
AF7
AF23
AF19
AE12
C1
C14
E26
G26
J1
P3
L26
W1
AE26
AF25
AE13
AF8
AE10
AE16
J26
U25
AB26
P25
Y25
AF21
VDD1
VDDCA
1
12 66
1%
1/32W
MF
2 01005
1%
1/32W
MF
2 01005
62 12
=PP1V2_VDDQ_DDR
62 12
62 12
=PP1V2_VDDQ_DDR
=PP1V2_S2R_DDR
62 12
R1496
R1494
1
R1490
1
4.7K
R1492
C1490
4.7K
0.1UF
1%
1/32W
MF
2 01005
PPVREF_DDR0_DQ_DRAM
PPVREF_DDR1_CA_DRAM 12
R1491
4.7K
1%
1/32W
MF
2 01005
1
C1491
0.1UF
20%
2 6.3V
X5R-CERM
01005
7
1
R1493
4.7K
1
C1493
0.1UF
1%
1/32W
MF
2 01005
20%
2 6.3V
X5R-CERM
01005
6
1
10K
C1496
0.1UF
1%
1/32W
MF
2 01005
20%
6.3V
2 X5R-CERM
01005
20%
2 6.3V
X5R-CERM
01005
PPVREF_DDR0_CA_DRAM
66
12 66
12 66
1
1
C1494
0.1UF
1%
1/32W
MF
2 01005
20%
6.3V
2 X5R-CERM
01005
12 66
1
10K
C1492
0.1UF
1%
1/32W
MF
2 01005
20%
6.3V
2 X5R-CERM
01005
PPVREF_DDR1_DQ_DRAM
1
=PP1V2_S2R_DDR
1
1
1
C1416
C1408
1
1.0UF
20%
6.3V 2
X5R
0201-1
1
C1419 1
20%
6.3V
X5R-CERM 2
01005
5%
16V
NP0-C0G 2
01005
OMIT_TABLE
A4
A7
A12
A16
A21
A24
AA1
AA4
AB4
AC4
AD1
AE3
C3
C25
D1
D5
D6
D7
D9
D10
D11
D12
D16
D17
D18
D19
D21
D22
D23
E4
F4
G1
G4
J4
K4
L4
M1
M4
T1
T4
U4
V4
W4
0.1UF
56PF
(2 OFBGA
3)
A1
A2
A5
A8
A11
A13
A15
A17
A20
A23
A26
A27
AA5
AA24
T25
AF22
AB5
AB24
AB25
AC1
AC5
AC24
AC25
AC27
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD27
AE4
AE5
AE6
AE7
AE8
H26
AE14
AE15
R25
Y5
Y24
AE22
AE23
AE24
AE25
Y1
AE27
AF1
AF2
AF3
AF4
W5
W24
AF26
AF27
AG1
AG2
AG3
AG4
R1499
240
20%
6.3V 2
X5R
0201-1
VDDQ
12 66
240
1
1.0UF
VDD2
5%
16V
NP0-C0G 2
01005
20%
6.3V
X5R-CERM 2
01005
C1407
U1400
56PF
0.1UF
1
20%
6.3V
X5R-CERM 2
01005
1
R1498
8
C1468 1
1.0UF
1
20%
6.3V 2
X5R
0201-1
DDR1_ZQ_DRAM
1
A
1
1UF
10%
6.3V
CERM 2
402
C1475
66 12
1
1UF
1
0.47UF
1.0UF
20%
6.3V
X5R 2
0201-1
1.0UF
20%
4V
CERM-X5R-1 2
201
=PP1V8_S2R_DDR
8 61 66
C1406
C1411
1
0.47UF
BI
C1405 1
1.0UF
20%
6.3V 2
X5R
0201-1
20%
4V
CERM-X5R-1 2
201
62
66 61 8
Edited by Foxit Reader ActiveX For Evaluation Only.
1
Copyright(C)22006-2009 Foxit Corporation
3
R1495
10K
1%
1/32W
MF
2 01005
5
1
1
R1497
C1495
0.1UF
20%
6.3V
2 X5R-CERM
01005
10K
1%
1/32W
MF
2 01005
4
1
C1497
0.1UF
20%
6.3V
2 X5R-CERM
01005
3
AG5
AG23
AG24
AG25
AG26
AG27
B1
B2
B26
B27
C26
C27
OMIT_TABLE
U1400
BGA
(3 OF 3)
VSS
128MX32X2
IN
66 61 8
AE21
AF20
AE20
AE19
AF18
AF12
AE11
AF11
AF10
AE9
4
H9CCNNN8KTMLER-NTM
IN
66 61 8
DDR0_CA<0>
DDR0_CA<1>
DDR0_CA<2>
DDR0_CA<3>
DDR0_CA<4>
DDR0_CA<5>
DDR0_CA<6>
DDR0_CA<7>
DDR0_CA<8>
DDR0_CA<9>
5
128MX32X2
IN
66 61 8
6
128MX32X2
IN
66 61 8
H9CCNNN8KTMLER-NTM
66 61 8
7
H9CCNNN8KTMLER-NTM
8
VSS
D4
D14
D24
D25
D26
D27
E1
E5
E6
E7
E8
E9
E10
E11
E12
E13
E14
E15
E16
E17
E18
E19
E20
E21
E22
E23
E24
E25
E27
F5
F24
F25
G5
G24
G25
H1
H5
H24
H25
J5
J24
V24
K5
K24
L1
L5
L24
M5
M24
N1
N5
N24
V5
P4
P5
P24
R1
R5
R24
T5
T24
U1
U5
U24
D
C
B
8
7
6
5
4
Edited by Foxit Reader ActiveX For Evaluation Only.
1
Copyright(C)22006-2009 Foxit Corporation
3
JTAG
R1510
1
BOOT CONFIG ID
=PP1V8_SOC
62 58 13 7 5 4
1
NOSTUFF
1
R1500
D
10K
5%
1/32W
MF
2 01005
BOOT_CONFIG[3]
5
OUT
GPIO_BOOT_CONFIG_3
BOOT_CONFIG[2]
5
OUT
GPIO_BOOT_CONFIG_2
BOOT_CONFIG[1]
5
OUT
GPIO_BOOT_CONFIG_1
BOOT_CONFIG[0]
5
OUT
GPIO_BOOT_CONFIG_0
JTAG_SOC_SEL
2
OUT
4 60
NOSTUFF
1
R1502
10K
5%
1/32W
MF
2 01005
MODE
0000
0001
0010
0011
NOSTUFF
R1501
10K
BOOT_CONFIG[3:0]
240
1%
1/32W
MF
01005
5%
1/32W
MF
2 01005
D
1
R1503
10K
5%
1/32W
MF
2 01005
S/W READ FLOW
SPI
SPI W/TEST
NAND <-- CURRENT SETTING
NAND W/TEST
1.
2.
3.
SET GPIO AS INPUT
DISABLE PU AND ENABLE PD
READ
R1560
240
1
2
SOC_TESTMODE
OUT
4 60
SOC_FAST_SCAN_CLK
OUT
4
SOC_HOLD_RESET
OUT
4
1%
1/32W
MF
01005
MAKE_BASE=TRUE
C
C
ALIASED NETS TO ALLOW BREAKING ON DEV BOARD
5
BOARD ID
62 58 13 7 5 4
NOSTUFF
1
R1504
10K
5%
1/32W
MF
2 01005
BOARD_ID[3]
BOARD_ID[2]
BOARD_ID[1]
BOARD_ID[0]
5
5
OUT
GPIO_BOARD_ID_2
5
OUT
GPIO_BOARD_ID_1
OUT
GPIO_BOARD_ID_0
5
0000
0001
0010
0011
0100
0101
MAKE_BASE=TRUE
MLB_A
MLB_A
MLB_B
MLB_B
MLB_C
MLB_C
1
R1505
10K
5%
1/32W
MF
2 01005
MLB_B
1
R1506
10K
5%
1/32W
MF
2 01005
64 61 22 5
AP
DEV
AP
DEV
AP
DEV
I2C3_SCL_1V8
IN
MAKE_BASE=TRUE
67 4
WDOG_SOC
IN
1
0.00 2
WDOG_SOC2PMU_RESET_IN
OUT
64 61 22 5
I2C3_SDA_1V8
BI
MAKE_BASE=TRUE
OUT
5
OUT
B
SET GPIO AS INPUT
DISABLE PU AND ENABLE PD
READ
=PP1V8_SOC
5%
1/32W
MF
2 01005
GPIO_BRD_REV3
GPIO_BRD_REV2
GPIO_BRD_REV1
GPIO_BRD_REV0
67 61 60 57 47 25 4
NOSTUFF
1
R1520
10K
5%
1/32W
MF
2 01005
NOSTUFF
1
R1521
10K
5%
1/32W
MF
2 01005
CURRENT SETTING --->
8
0000
0001
0010
0011
0100
0101
0110
0111
PROTO
PROTO
PROTO
PROTO
PROTO
PROTO
EVT +
DVT +
0
0 + T2
1 + T2
1 + T1
1 + T1 + B0
2 + T2 + B0
T2 + B0
T2 + B1
IN
1
R1522
10K
5%
1/32W
MF
2 01005
NOSTUFF
R1535
1
RESET_SOC_L
NOSTUFF
0.00 2
JTAG_SOC_TRST_L
OUT
0%
1/32W
MF
01005
1
R1523
10K
NOSTUFF
1
5%
1/32W
MF
2 01005
R1536
SHORTING RESET TO TRST HERE SO THEY CAN BE SEPARATED ON DEV BOARD
NOTE: WHEN USING A0 SOC
STUFF R1535
NOSTUFF R1536
CHANGE R0620 TO 4.7K
BRD_REV[3-0]
A
45
S/W READ FLOW
1.
2.
3.
10K
5
=I2C3_PROX_ADUX1049_SDA_1V8
=I2C3_PROX_AD7149_SDA_1V8
57 67
0%
1/32W
MF
01005
R0620
OUT
45
R1507
1
5
=I2C3_PROX_ADUX1049_SCL_1V8
=I2C3_PROX_AD7149_SCL_1V8
1
10K
5%
1/32W
MF
2 01005
BOARD REVISION
OUT
45
DEV
62 58 13 7 5 4
5
=GPIO_ADUX1049_PROX2SOC_IRQ_L
=GPIO_AD7149_PROX2SOC_IRQ_L
R1530
BOARD_ID[3-0]
B
MLB_C
GPIO_BOARD_ID_3
OUT
GPIO_PROX2SOC_IRQ_L
OUT
=PP1V8_SOC
240
1%
1/32W
MF
2 01005
S/W READ FLOW
1.
2.
3.
7
SET GPIO AS INPUT
ENABLE PU AND DISABLE PD
READ
6
5
4
3
4 60 64
8
7
6
5
4
Edited by Foxit Reader ActiveX For Evaluation Only.
1
Copyright(C)22006-2009 Foxit Corporation
3
D
D
=PP1V8_NAND
=PP3V3_NAND
1
C1600
10UF
20%
2 6.3V
CERM-X5R
0402-2
1
C1601
10UF
1
1
C1602
10UF
C1640
10UF
C1641
10UF
20%
2 6.3V
CERM-X5R
0402-2
20%
6.3V
2 CERM-X5R
0402-2
20%
6.3V
2 CERM-X5R
0402-2
1
1
1
1
C1604
1.0UF
C1605
1.0UF
C1606
1.0UF
20%
6.3V
2 X5R
0201-1
20%
6.3V
2 X5R
0201-1
20%
2 6.3V
X5R
0201-1
1
1
1
C1652
27PF
5%
2 16V
NP0-C0G
01005
C1651
1.0UF
1
1
C1642
10UF
C1607
5%
16V
2 NP0-C0G
01005
1
C1610
10UF
20%
6.3V
2 CERM-X5R
0402-2
27PF
67
C1608
C1611
10UF
1
C1612
10UF
1
C1613
10UF
1
C1614
10UF
1
C1615
10UF
20%
2 6.3V
CERM-X5R
0402-2
20%
2 6.3V
CERM-X5R
0402-2
20%
2 6.3V
CERM-X5R
0402-2
20%
2 6.3V
CERM-X5R
0402-2
20%
2 6.3V
CERM-X5R
0402-2
1
1
1
1
1
1
C1620
1.0UF
20%
2 6.3V
X5R
0201-1
C1621
1.0UF
C1622
1.0UF
20%
2 6.3V
X5R
0201-1
20%
6.3V
2 X5R
0201-1
1
1
C1623
1.0UF
20%
6.3V
2 X5R
0201-1
C1624
1.0UF
20%
6.3V
2 X5R
0201-1
C1625
1.0UF
20%
2 6.3V
X5R
0201-1
PPVDDI_NAND
C1650
1.0UF
20%
6.3V
2 X5R
0201-1
1
20%
2 6.3V
CERM-X5R
0402-2
27PF
5%
2 16V
NP0-C0G
01005
20%
6.3V
2 X5R
0201-1
C1630
27PF
5%
16V
2 NP0-C0G
01005
B6
F2
M6
OB8
C
1
20%
2 6.3V
CERM-X5R
0402-2
14 57 61 62
C1631
27PF
C
5%
2 16V
NP0-C0G
01005
N1
N7
OC8
OD8
OE0
OF8
G0
OA8
62
VDDI
VCC
VCCQ
=PP1V8_NAND
66 61 6
BI
BI
66 61 6
BI
66 61 6
BI
66 61 6
BI
66 61 6
BI
66 61 6
BI
66 61 6
BI
66 61 6
BI
66 6
BI
66 6
BI
66 6
BI
66 6
BI
66 6
BI
66 6
BI
66 6
BI
FMI0_AD<0>
FMI0_AD<1>
FMI0_AD<2>
FMI0_AD<3>
FMI0_AD<4>
FMI0_AD<5>
FMI0_AD<6>
FMI0_AD<7>
G3
H2
J3
K2
L5
K6
J5
H6
IO0-0
IO1-0
IO2-0
IO3-0
IO4-0
IO5-0
IO6-0
IO7-0
FMI1_AD<0>
FMI1_AD<1>
FMI1_AD<2>
FMI1_AD<3>
FMI1_AD<4>
FMI1_AD<5>
FMI1_AD<6>
FMI1_AD<7>
G1
J1
L1
N3
N5
L7
J7
G7
IO0-1
IO1-1
IO2-1
IO3-1
IO4-1
IO5-1
IO6-1
IO7-1
OMIT_TABLE
CE0*
CLE0
ALE0
WE0*
U1600
THGBX2T0BBJLA03
LGA
NAND-19NM-128GX8-MLC-PPN1.5-64G
66 61 6
B
A5
A3
C1
E3
FMI0_CE0_L
FMI0_CLE
FMI0_ALE
FMI0_WE_L
RE0 B4
RE0* C7
DQS0 H4
DQS0* F4
61
OA0 TCKC
OB0 TMSC
CE1*
CLE1
ALE1
WE1*
IN
6 61 66
IN
6 61 66
NOSTUFF
1
R1656
RE1 D4
RE1* D6
DQS1 M4
DQS1* K4
FMI0_RE_L
IN
6 61 66
FMI0_DQS
IN
6 61 66
5%
1/32W
MF
2 01005
14 57 61 62
NOSTUFF
1
R1655
100K
5%
1/32W
MF
2 01005
NC
NAND_SLOT0_RDYBSY_L
C5
C3
D2
E1
ZQ A1
VSS
IN
6 61 66
NC
RY/BY0* E5
VREF G5
TP_FMI_TCKC_NAND
TP_FMI_TMSC_NAND
6 60 61 66
100K
FMI1_CE0_L
FMI1_CLE
FMI1_ALE
FMI1_WE_L
IN
6 61 66
IN
6 61 66
IN
6 61 66
IN
6 61 66
FMI1_RE_L
IN
6 61 66
FMI1_DQS
IN
6 61 66
=PP1V8_NAND
14 57 61 62
NC
1
R1690
1
51.1K
NC
RY/BY1* E7
61
IN
66 61
0.01UF
1%
1/32W
MF
2 01005
NAND_SLOT1_RDYBSY_L
B
C1690
10%
2 6.3V
X5R
01005
PPVREF_FMI_NAND
FMI_ZQ_NAND
VSSQ
R1654
A7
M2
OC0
OD0
OE8
OF0
G8
B2
F6
L3
1
243
1
R1691
1%
1/32W
MF
2 01005
51.1K
1%
1/32W
MF
2 01005
1
C1691
0.01UF
10%
2 6.3V
X5R
01005
A
8
7
6
5
4
3
2
1
Edited by Foxit Reader ActiveX For Evaluation Only.
Copyright(C) 2006-2009 Foxit Corporation
Edited by Foxit Reader ActiveX For Evaluation Only.
Copyright(C) 2006-2009 Foxit Corporation
Edited by Foxit Reader ActiveX For Evaluation Only.
Copyright(C) 2006-2009 Foxit Corporation
8
7
6
5
4
Edited by Foxit Reader ActiveX For Evaluation Only.
1
Copyright(C)22006-2009 Foxit Corporation
3
SPEAKER AMPLIFIER
D
APN:353S3445
TURN ON TIME: 3.5MS
TURN ON DELAY: ?MS
75HZ +/- XXX%
GAIN
12DB
9DB
6DB
3DB
0DB
EXTRA BULK
62 18 17
=PPBATT_AUDIO
1
1
C2010
10UF
C2012
10UF
20%
2 10V
X5R-CERM
0402-4
1
C2015
1
0.1UF
10%
2 6.3V
CERM-X5R
0201
8.2PF
+/-0.5PF
01005
C2025
65 60 18 15
IN
2
65
61
10%
6.3V
X5R
0201
65 60 18 15
IN
MAX98304_L2_IN_P
0.015UF65
1
2
IN
WLP
C3 IN+
C2 IN-
C2026
61
OUT+ A2
OUT- A1
SPKRAMP_L2_OUT_P
SPKRAMP_L2_OUT_N
C1 SHDN*
NC
GAIN B3
MIN_LINE_WIDTH=0.50MM
MIN_NECK_WIDTH=0.20MM
MIN_LINE_WIDTH=0.50MM
MIN_NECK_WIDTH=0.20MM
CRITICAL
MAX98304_L2_IN_N
OUT
49 60 65
OUT
49 60 65
MAX983X4_L2_GAIN
B2 NC
NOSTUFF
1
AUD_SPKRAMP_MUTE_L
C2000
15PF
PGND
B1
C
0%
1/32W
MF
01005 2
MAX98304D
10%
6.3V
X5R
0201
18 17 7
0.00
U2020
CRITICAL
LEFT_CH_OUT_N
R20201
PVDD
0.015UF
1
D
C2019
CRITICAL
LEFT_CH_OUT_P
GND
SHORT
100K
NC
NC
NC
16V
2 NP0-C0G-CERM
A3
20%
2 10V
X5R-CERM
0402-4
VDD
NC
NC
SHORT
100K
NC
C
5%
16V
2 NP0-C0G-CERM
01005
GAIN:6DB
NOSTUFF
C2001 1
15PF
5%
16V
NP0-C0G-CERM 2
01005
EXTRA BULK
62 18 17
=PPBATT_AUDIO
1
C2050
22UF
1
C2051
1
22UF
C2052
10UF
20%
6.3V
603
20%
2 10V
X5R-CERM
0402-4
2 X5R-CERM-1
1
C2055
0.1UF
10%
2 6.3V
CERM-X5R
0201
1
C2059
8.2PF
+/-0.5PF
16V
01005
2 NP0-C0G-CERM
R20401
A3
20%
6.3V
2 X5R-CERM-1
603
B
C2045
IN
1
LEFT_CH_OUT_P
MAX98304D
2
10%
6.3V
X5R
0201
65 60 18 15
IN
65 61
C2046
65
61
C1 SHDN*
MAX98304_L1_IN_N
NC
10%
6.3V
X5R
0201
MIN_LINE_WIDTH=0.50MM
MIN_NECK_WIDTH=0.20MM
B2 NC
OUT
49 60 65
OUT
49 60 65
NOSTUFF
1
C2002
15PF
5%
16V
2 NP0-C0G-CERM
01005
PGND
AUD_SPKRAMP_MUTE_L
MIN_LINE_WIDTH=0.50MM
MIN_NECK_WIDTH=0.20MM
SPKRAMP_L1_OUT_N
GAIN B3 MAX983X4_L1_GAIN
B1
18 17 7
SPKRAMP_L1_OUT_P
OUT+ A2
OUT- A1
CRITICAL
0.015UF
2
WLP
C3 IN+
C2 IN-
MAX98304_L1_IN_P
CRITICAL
1
LEFT_CH_OUT_N
B
0%
1/32W
MF
01005 2
U2040
0.015UF
65 60 18 15
0.00
PVDD
CRITICAL
NOSTUFF
C2003 1
GAIN:6DB
15PF
5%
16V
NP0-C0G-CERM 2
01005
A
8
7
6
5
4
3
2
1
8
7
6
5
4
Edited by Foxit Reader ActiveX For Evaluation Only.
1
Copyright(C)22006-2009 Foxit Corporation
3
OSCAR
OSCAR VDDIO = 1.8V HIBERNATE (NEED TO WAKE HOST)
OSCAR CORE = 1.2V HIBERNATE (NEED TO RUN IN S2R)
62
D
APN 337S4416 (A1)
=PP1V2_S2R_OSCAR
C2400
=PP1V8_S2R_OSCAR
1
C2401
VDDC C1
VDDC C6
1.0UF
20%
6.3V 2
X5R
0201-1
19 62
1
1.0UF
VDDIO C2
D
20%
6.3V 2
X5R
0201-1
R2405
CRITICAL
U2400
62 19
64 19
OUT
64 19
OUT
=PP1V8_S2R_OSCAR
1
R2400
IN
19
IN
19
IN
24
IN
OUT
5
OUT
57 5
OUT
5%
1/32W
MF
2 01005
IN
IN
19
64 24
100K
67 60 5
19
SPI_OSCAR2ACCEL_CS_L
SPI_OSCAR2GYRO_CS_L
ACCEL2OSCAR_INT1
GYRO2OSCAR_INT2
GYRO2OSCAR_INT1
ACCEL2OSCAR_INT2
COMPASS2OSCAR_INT
SPI_OSCAR2COMPASS_CS_L
OSCAR_TIME_SYNC_HOST_INT
PMU_GPIO_OSCAR2PMU_HOST_WAKE
NC_OSCAR_DEBUG_SDA NO_TEST=TRUE
GPIO_OSCAR_RESET_L
1
LPC18A1UK-CPA1
E3
E5
E6
C5
D5
E2
D3
D4
E1
A3
A2
P0_0
P0_1
P0_2
P0_3
P0_4
P0_5
P0_6
P0_7
P0_8
P0_9
P0_10
E4
RESET*
WLCSP
P0_11
P0_12
P0_13
P0_14
P0_15
P0_16
P0_17
P0_18
P0_19
P0_20
P0_21
P0_22
A1
B2
A4
B3
B4
A5
B5
C3
C4
B6
D1
A6
NC_OSCAR_DEBUG_SCL NO_TEST=TRUE
64 SPI_OSCAR_SCLK_R
SPI_OSCAR_MISO
IN
64 SPI_OSCAR_MOSI_R
UART4_OSCAR2SOC_RXD
OUT
UART4_SOC2OSCAR_TXD
IN
OSCAR2RADIO_CONTEXT_A
OUT
OSCAR2RADIO_CONTEXT_B
OUT
I2C1_SOC2OSCAR_SWDIO_1V8 BI
I2C1_SOC2OSCAR_SWDCLK_1V8 IN
PMU_GPIO_CLK_32K_OSCAR
IN
TP_OSCAR_P0_22
DBGEN D2
60
IN
R2406
5 64
1
15.0 2
5 64
19 24 64
5%
1/32W
MF
01005
29 46
29 46
5 64
NOTE: I2C1 IS ASSUMED TO USE PUSH-PULL INSTEAD OF OPEN-DRAIN
5 64
57 60 64
C
R2407
B1
D6
0.00 2
GPIO_SOC2OSCAR_DBGEN
IN
5
0%
1/32W
MF
01005
FL2450
FL2420
120-OHM-25%-250MA-0.5DCR
67 60
PP3V0_GYRO
=PP1V8_S2R_GYRO
62
62
=PP3V0_S2R_ACCEL
1
2
01005
1
C2420
0.22UF
20%
6.3V
2 X5R
01005
B
1
C2425
1.0UF
20%
6.3V
2 X5R
0201-1
C2421
NOSTUFF
1
1
1.0UF
20%
6.3V 2
X5R
0201-1
0.22UF
R2425
20%
6.3V
X5R 2
01005
0.00
0%
1/32W
MF
2 01005
C2450
67 60
1
=PP1V8_S2R_ACCEL
PP3V0_ACCEL
C2455
C2457
1
0.22UF
20%
6.3V 2
X5R
01005
64 19
IN
SPI_OSCAR2ACCEL_CS_L
R2426
4 CS
12 RES
11 RES
10 RES
0.00
OUT
19
OUT
ACCEL2OSCAR_INT1
ACCEL2OSCAR_INT2
6 INT1
5 INT2
RES 13
RES 14
GND
VDD_IO
9
RES/VDD
19
LGA
SCL/SPC 1
SDA/SDI/SDO 2
SDO/SA0 3
1
15
VDD 16
0%
1/32W
MF
2 01005
OMIT_TABLE
U2420
AP3GDL20HAB18TR
LGA
19
1
R2428
19
OUT
OUT
SPI_OSCAR2GYRO_CS_L
GYRO2OSCAR_INT2
GYRO_DEN
5
6
8
GYRO2OSCAR_INT1
7 INT1
CS
DRDY/
INT2
DEN
SCL/SPC 2
SDA/SDI/SDO 3
SDO/SA0 4
12 GND
13 GND
A
64
SPI_OSCAR_SCLK
SPI_OSCAR_MOSI
SPI_OSCAR_MISO_GYRO
CAP 14
IN
19 24 64
IN
19 24 64
R2427
1
0.00 2
SPI_OSCAR_MISO
19 24 64
0%
1/32W
MF
01005
RES0 9
RES1 10
RES2 11
0.00
0%
1/32W
MF
2 01005
GYRO_PUMP
CHARGE PUMP
OMIT_TABLE
1
C2422
0.01UF
10%
25V
2 X5R-CERM
0201
7
B
OMIT_TABLE
U2450
GYRO_RES_VDD
IN
20%
6.3V 2
X5R
01005
VDD VDD_IO
AP2DHAA24
1
64 19
62
1
0.22UF
7
2
8
1
01005
8
SPI_OSCAR_MOSI
19 24 64
ACCELEROMETER
120-OHM-25%-250MA-0.5DCR
=PP3V0_S2R_GYRO
OUT
19 24 64
1
GYRO
62
SPI_OSCAR_SCLK
5%
1/32W
MF
01005
GPIO_SOC2OSCAR_DBGEN_R
VSS
VSS
C
15.0 2
6
5
4
3
64
SPI_OSCAR_SCLK
SPI_OSCAR_MOSI
SPI_OSCAR_MISO_ACCEL
IN
19 24 64
IN
19 24 64
R2457
1
0.00 2
0%
1/32W
MF
01005
SPI_OSCAR_MISO
19 24 64
8
7
6
5
4
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Copyright(C)22006-2009 Foxit Corporation
3
D
D
HALL EFFECT
BIPOLAR ONE OUTPUT APN 353S3687
C-PANEL HALL EFFECT SENSOR
(B-PANEL HALL EFFECT SENSOR ON HB)
PP3V0_S2R_HALL_FILT
C2560
1
B1
67 60 50
0.22UF
C
20%
6.3V 2
X5R
01005
C
VDD
CRITICAL
U2560
PLACE_NEAR=U2560.B1:10MM
BU52054GWZ
UCSP
OUT B2 PMU_GPIO_MB_HALL1_IRQ
OUT
57 60
A1
A2
GND
B
B
A
8
7
6
5
4
3
8
7
6
5
4
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Copyright(C)22006-2009 Foxit Corporation
3
D
D
APN: 518S0692
CRITICAL
BUTTON CONNECTOR
L2610
5
OUT
GPIO_BTN_VOL_DOWN_L
1
2
OUT
GPIO_BTN_VOL_DOWN_R_L
01005
GPIO_BTN_VOL_UP_L
240-OHM-25%-0.20A-1.0DCR
1
2
01005
1
1.00K2
1
60
5%
1/32W
MF
01005
L2611
5
60
R2611
57 5
OUT
GPIO_BTN_SRL_L
60
1.00K2
GPIO_BTN_VOL_UP_R_L
60
1
57 5
OUT
GPIO_BTN_ONOFF_L
C
2
3
4
5
R2612
1.00K2
GPIO_BTN_SRL_R_L
1
5%
1/32W
MF
01005
L2613
240-OHM-25%-0.20A-1.0DCR
1
2
01005
GPIO_BTN_VOL_DOWN_L_FILT
GPIO_BTN_VOL_UP_L_FILT
GPIO_BTN_SRL_L_FILT
GPIO_BTN_ONOFF_L_FILT
6
5%
1/32W
MF
01005
L2612
240-OHM-25%-0.20A-1.0DCR
1
2
01005
F-RT-SM
R2610
240-OHM-25%-0.20A-1.0DCR
C
J2610
FF18-6A-R11AD-B-3H
R2613
1.00K2
GPIO_BTN_ONOFF_R_L
1
5%
1/32W
MF
01005
1
C2610
82PF
5%
25V
2 CERM
0201
1
DZ2610
2
DZ2612
C2611
1
82PF
C2612
82PF
5%
25V
2 CERM
0201
5%
2 25V
CERM
0201
1
DZ2611
C2613
82PF
5%
2 25V
CERM
0201
2
201-1
12.8V-100PF
201-1
12.8V-100PF
1
2
201-1
12.8V-100PF
DZ2613
1
1
2
201-1
12.8V-100PF
1
B
B
A
8
7
6
5
4
3
2
1
8
7
6
5
4
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Copyright(C)22006-2009 Foxit Corporation
3
FRONT CAMERA CONNECTOR
J65 CAMERA CONNECTOR
APN:MLB 516S0876
APN:FLEX 516S0869
D
CRITICAL
D
J2700
503548-1820
F-ST-SM
20
64 60 22
60 22
67 60 22
65 61 22
65 61 22
65 61 22
65 61 22
L2780
19
I2C3_CAM_ALS_SCL_1V8_F
GPIO_CAM_ALS2SOC_IRQ_L_F
2
1
4
3
PP3V0_ALS_FILT
6
5
8
7
MIPI1C_CAM_FRONT_DATA_FILT_P<0>
MIPI1C_CAM_FRONT_DATA_FILT_N<0>
MIPI1C_CAM_FRONT_CLK_FILT_P
MIPI1C_CAM_FRONT_CLK_FILT_N
I2C3_CAM_ALS_SDA_1V8_F
ISP1_CAM_FRONT_CLK_F
ISP1_CAM_FRONT_SHUTDOWN_L_F
ISP1_CAM_FRONT_SDA_F
ISP1_CAM_FRONT_SCL_F
22 60 64
22 60 64
22 60 67
10
9
12
11
14
13
PP2V9_AVDD_CAM_FRONT_FILT
22 60 67
16
15
GND_AVDD_CAM_FRONT
22 67
18
17
PP1V8_CAM_FRONT_FILT
22 60 67
22
21
22 60 64
22 60 64
80-OHM-25%-500MA
62
1
=PP1V8_CAM_FRONT
PP1V8_CAM_FRONT_FILT
2
22 60 67
0201
1
C2780
1
100PF
XW2780
XW2781
SM
SM
1
2
67
GND_PP1V8_CAM_FRONT
1
5%
16V
2 NP0-C0G
01005
C2781
1.0UF
20%
6.3V
0201-1
2 X5R
2
CRITICAL
L2700
C
L2710
80-OHM-25%-500MA
62
=PP2V9_CAM_FRONT
1
PP2V9_AVDD_CAM_FRONT_FILT
2
0201
1
C2700
1
100PF
XW2701
SM
SM
1
2
67
GND_PP2V9_CAM_FRONT
2 16V
NP0-C0G
01005
1
MIPI1C_CAM_FRONT_CLK_FILT_P
2
65 61 22
MIPI1C_CAM_FRONT_CLK_FILT_N
1
C2701
20%
MIPI1C_CAM_FRONT_CLK_P
4
MIPI1C_CAM_FRONT_CLK_N
3
MIPI1C_CAM_FRONT_DATA_P<0>
OUT
7 61 65
4
MIPI1C_CAM_FRONT_DATA_N<0>
OUT
7 61 65
OUT
OUT
7 61 65
C
7 61 65
SYM_VER-2
TCM0605-1
90-OHM-50MA
6.3V
2 X5R
0201-1
GND_AVDD_CAM_FRONT
2
3
22 60 67
1.0UF
5%
XW2700
65 61 22
22 67
CRITICAL
L2711
L2702
65 61 22
MIPI1C_CAM_FRONT_DATA_FILT_P<0>
2
65 61 22
MIPI1C_CAM_FRONT_DATA_FILT_N<0>
1
SYM_VER-2
TCM0605-1
80-OHM-25%-500MA
62
=PP3V0_ALS
1
PP3V0_ALS_FILT
2
90-OHM-50MA
22 60 67
0201
1
C2706
1
100PF
B
IN
1
I2C3_SCL_1V8
20%
6.3V
0201-1
2 X5R
B
FL2730
70-OHM-300MA
64 61 13 5
C2707
1.0UF
5%
16V
01005
2 NP0-C0G
DCR 0.45
FL2750
70-OHM-300MA
2
I2C3_CAM_ALS_SCL_1V8_F
22 60 64
64 7
01005-1
IN
ISP1_CAM_FRONT_SCL
1
DCR 0.45
2
ISP1_CAM_FRONT_SCL_F
1
C2730
1
27PF
5%
16V
2 NP0-C0G
01005
FL2731
70-OHM-300MA
64 61 13 5
IN
I2C3_SDA_1V8
01005
FL2751
DCR 0.45
70-OHM-300MA
2
I2C3_CAM_ALS_SDA_1V8_F
22 60 64
64 7
01005-1
IN
ISP1_CAM_FRONT_SDA
1
C2731
FL2740
70-OHM-300MA
A
22 60 64
5
IN
GPIO_CAM_ALS2SOC_IRQ_L
2
1
2
DCR 0.45
GPIO_CAM_ALS2SOC_IRQ_L_F
22 60
C2751
27PF
5%
16V
01005
1
ISP1_CAM_FRONT_SDA_F
1
27PF
ISP1_CAM_FRONT_SHUTDOWN_L
70-OHM-300MA
01005-1
5%
2 NP0-C0G
IN
FL2770
DCR 0.45
2
01005-1
1
67 7
C2750
27PF
5%
16V
2 NP0-C0G
1
22 60 64
01005-1
16V
2 NP0-C0G
01005
FL2760
DCR 0.45
150OHM-25%-200MA-0.7DCR
ISP1_CAM_FRONT_SHUTDOWN_L_F
01005-1
22 60 67
64 7
IN
ISP1_CAM_FRONT_CLK
1
2
DCR 0.70
ISP1_CAM_FRONT_CLK_F
22 60 64
A
01005
1
R2740
1
100K
1
27PF
5%
1/32W
MF
2 01005
8
C2740
56PF
5%
5%
16V
2 NP0-C0G
16V
2 NP0-C0G
01005
7
C2760
01005
6
5
4
3
2
1
8
7
6
5
4
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Copyright(C)22006-2009 Foxit Corporation
3
L2860
80-OHM-25%-500MA
62
=PP2V9_CAM_REAR
1
PP2V9_AVDD_CAM_REAR_FILT
2
23 60 67
0201
1
C2860
C2861
1
100PF
1.0UF
20%
6.3V
0201-1
5%
16V
01005
2 NP0-C0G
REAR CAMERA CONNECTOR
2 X5R
FLEX: 516S0974
D
D
MLB: 516S0973
L2870
80-OHM-25%-500MA
62
=PP2V6_CAM_REAR_AF
1
CRITICAL
2
PP2V6_CAM_REAR_AF_FILT
J2800
23 60 67
0201
1
AA07-S022VA1
C2870
1
27PF
C2875
C2876
1
100PF
5%
5%
2 16V
NP0-C0G
16V
2 NP0-C0G
01005
01005
F-ST-SM
24
1.0UF
20%
23
6.3V
2 X5R
0201-1
64 60 23
64 60 23
67 60 23
67 60 23
L2880
ISP0_CAM_REAR_SCL_F
ISP0_CAM_REAR_SDA_F
ISP0_CAM_REAR_SHUTDOWN_L_F
PP1V3_CAM_REAR_FILT
67 60 23
PP1V8_CAM_REAR_FILT
67 60 23
PP2V9_AVDD_CAM_REAR_FILT
CAM_REAR_VSYNC
80-OHM-25%-500MA
62
=PP1V8_CAM_REAR
1
PP1V8_CAM_REAR_FILT
2
23 60 67
0201
1
C2885
100PF
5%
2 16V
NP0-C0G
01005
C2886
1
1.0UF
67 60 23
PP2V6_CAM_REAR_AF_FILT
20%
6.3V
2 X5R
0201-1
1
C2800
1000PF
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
ISP0_CAM_REAR_CLK_F
23 60 64
MIPI0C_CAM_REAR_DATA_FILT_P<0>
MIPI0C_CAM_REAR_DATA_FILT_N<0>
MIPI0C_CAM_REAR_CLK_FILT_P
MIPI0C_CAM_REAR_CLK_FILT_N
MIPI0C_CAM_REAR_DATA_FILT_P<1>
MIPI0C_CAM_REAR_DATA_FILT_N<1>
23 61 65
23 61 65
23 61 65
23 61 65
23 61 65
23 61 65
25
26
10%
2 6.3V
X5R-CERM
01005
C
C
L2890
80-OHM-25%-500MA
62
=PP1V3_CAM_REAR
1
PP1V3_CAM_REAR_FILT
2
23 60 67
0201
1
C2890
1
27PF
C2895
100PF
5%
16V
2 NP0-C0G
01005
5%
2 16V
NP0-C0G
01005
1
C2896
1.0UF
20%
2 6.3V
X5R
0201-1
CRITICAL
L2812
65 61 23
MIPI0C_CAM_REAR_CLK_FILT_P
2
65 61 23
MIPI0C_CAM_REAR_CLK_FILT_N
1
3
MIPI0C_CAM_REAR_CLK_P
IN
7 61 65
4
MIPI0C_CAM_REAR_CLK_N
IN
7 61 65
3
MIPI0C_CAM_REAR_DATA_P<0>
IN
7 61 65
4
MIPI0C_CAM_REAR_DATA_N<0>
IN
7 61 65
3
MIPI0C_CAM_REAR_DATA_P<1>
IN
7 61 65
4
MIPI0C_CAM_REAR_DATA_N<1>
IN
7 61 65
SYM_VER-2
TCM0605-1
90-OHM-50MA
CRITICAL
L2813
65 61 23
MIPI0C_CAM_REAR_DATA_FILT_P<0>
2
65 61 23
MIPI0C_CAM_REAR_DATA_FILT_N<0>
1
SYM_VER-2
TCM0605-1
90-OHM-50MA
CRITICAL
L2814
B
65 61 23
MIPI0C_CAM_REAR_DATA_FILT_P<1>
2
65 61 23
MIPI0C_CAM_REAR_DATA_FILT_N<1>
1
SYM_VER-2
TCM0605-1
90-OHM-50MA
FL2850
70-OHM-300MA
64 7
IN
1
ISP0_CAM_REAR_SCL
FL2851
DCR 0.45
2
70-OHM-300MA
ISP0_CAM_REAR_SCL_F
23 60 64
64 7
IN
1
ISP0_CAM_REAR_SDA
01005-1
DCR 0.45
2
ISP0_CAM_REAR_SDA_F
1
C2850
C2851
1
27PF
27PF
5%
16V
2 NP0-C0G
01005
FL2852
70-OHM-300MA
A
67 7
IN
1
ISP0_CAM_REAR_SHUTDOWN_L
23 60 64
01005-1
2
5%
16V
2 NP0-C0G
01005
ISP0_CAM_REAR_SHUTDOWN_L_F
DCR 0.7
FL2853
DCR 0.45
150OHM-25%-200MA-0.7DCR
23 60 67
01005-1
64 7
IN
1
ISP0_CAM_REAR_CLK
2
ISP0_CAM_REAR_CLK_F
23 60 64
01005
1
R2850
1
100K
8
C2852
1
27PF
5%
1/32W
MF
2 01005
7
C2854
56PF
5%
16V
01005
5%
16V
01005
2 NP0-C0G
2 NP0-C0G
6
5
4
3
B
8
7
6
5
4
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1
Copyright(C)22006-2009 Foxit Corporation
3
D
D
COMPASS
APN 338S1014
FL2940
FL2941
120-OHM-25%-250MA-0.5DCR
62
=PP3V0_S2R_COMP
1
120-OHM-25%-250MA-0.5DCR
2
67 60
PP3V0_COMP
67 60 24
PP1V8_COMP
1
1.0UF
20%
6.3V 2
X5R
0201-1
67 24
C2946
0.1UF
1
C4
1
=PP1V8_S2R_COMP
62
0.1UF
CRITICAL
U2940
AK8963C
GND_COMP
GND_COMP
CSP
24 67
SCL/SK A3 SPI_OSCAR_SCLK
SDA/SI A4 SPI_OSCAR_MOSI
NC_COMPASS_TST1
NO_TEST=TRUE
C2 TST1
NC_COMPASS_RSV
NO_TEST=TRUE
B3 RSV
SO B4
NC_COMPASS_TRG
NO_TEST=TRUE
C3 TRG
DRDY A1
67 60 24
C2940
20%
2 6.3V
X5R-CERM
01005
VDD VID
20%
2 6.3V
X5R-CERM
01005
D1 CAD0
D2 CAD1
C
2
01005
C2945 1
B1
01005
CSB* A2
SPI_OSCAR2COMPASS_CS_L
64
IN
19 64
IN
19 64
IN
19 64
COMPASS2OSCAR_INT
OUT
C
R2947
SPI_OSCAR_MISO_COMP1
1
19
15.0 2
SPI_OSCAR_MISO
OUT
19 64
5%
1/32W
MF
01005
D4 RST*
PP1V8_COMP
VSS
67 24
C1
TO VID WHEN NOT USED
GND_COMP
XW2940
SHORT-10L-0.25MM-SM
1
2
TIE CSB* TO VID FOR I2C MODE
B
B
A
A
8
7
6
5
4
3
2
1
8
7
6
5
4
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1
Copyright(C)22006-2009 Foxit Corporation
3
AP INTERFACE & DEBUG CONNECTOR
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
DEBUG CONNECTOR
=PPBATT_VCC_BB
D
IN
26 34 35 36 37 38 39 40 62
D
NOSTUFF
J3003
AXE654124
56
PROBE POINTS
PP3000
P4MM
SM
PP
1 BB_ERROR_FLAG
29 68
XW3002
PP3001
P4MM
SM
PP
64 47
1 SLEEP_CLK_32K
BI
64 61 28
BI
SM
PP
64 61 28
BI
1 PMIC_SSBI
27 28 68
68 28 27
64 47
1 19P2M_MDM
BI
USB_BB_P
SHORT-10L-0.25MM-SM
1
2
27 28 68
1 WTR_SSBI_TX_GPS
64 61 28 5
IN
64 61 28 5
OUT
28
OUT
DEBUG_RST_L
BB_JTAG_TMS
BB_JTAG_TRST_L
BB_JTAG_TCK
BB_JTAG_TDO
BB_JTAG_TDI
BB_JTAG_RTCLK
68 29 25
OUT
LAT_SW1_CTL
68 40 29
OUT
2G_FEM_S1
PMU_GPIO_BB2PMU_HOST_WAKE
64 61 28 5
OUT
64 61 28 5
OUT
64 61 28 5
OUT
29 30
1 WTR_SSBI_PRX_DRX
29 30
60 57 29
1 WTR_RX_ON
29 30 68
1 WTR_RF_ON
IN
68 40 29 25
OUT
29
OUT
2G_FEM_S4
GPIO_51
GPIO53/BOOT_CONFIG_1
GPIO51/BOOT_CONFIG_3
55
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
58
57
GPIO_SOC2BB_RST_L
IN
OUT
UART3_BB2SOC_TX
GPIO_DEBUG_LED
UART3_SOC2BB_TX
UART3_BB2SOC_RTS_L
UART3_SOC2BB_RTS_L
1 UART_WLAN2BB_LTE_COEX
4 13 47 57 60 61 67
5 29 47 64
IN
29
5 29 47 64
IN
5 29 64
OUT
5 29 64
OUT
28 57 61 67
C
HSIC2_BB2SOC_DEVICE_RDY
IN
5 29 64
GPIO_BB2SOC_RESET_DET_L
HSIC2_SOC2BB_HOST_RDY
IN
5 29 67
IN
5 29 64
29 46
GPIO/BOOT_CONFIG CONFIGURATION
1 UART_BB2WLAN_LTE_COEX
29 46
PP_SMPS3_MSME_1V8 25
1
NOSTUFF
R3002
LAT_SW1_CTL
68 29 25
68 40 29 25
2G_FEM_S4
1
26 28 29 31 60
NOSTUFF
R3003
10K
10K
5%
1/32W
MF
2 01005
5%
1/32W
MF
2 01005
GPIO48/BOOT_CONFIG_6
GPIO53/BOOT_CONFIG_1
BOOT_CONFIG
SW REGISTER
VALUE
BOOT OPTIONS
6
5
4
3
2
1
0
47 48 49 50
51 52 53 54 55
BOOT_DEFAULT_OPTION
0X00
X
0
0
0
0
0
0
0
X
BOOT_NAND_OPTION
0X01
X
1
0
0
0
0
0
1
X
BOOT_HSIC_OPTION
0X02
X
1
0
0
0
0
1
0
X
BOOT_USB_OPTION
0X03
X
1
0
0
0
0
1
1
X
0X08
X
1
0
0
1
0
X
X
X
ENABLE SAHARA PROTOCOL
B
J3002
B
MM4829-2702
F-ST-SM
1
HSIC2_BB_DATA
4 28 61 64
4
2
3
NOSTUFF
J3001
MM4829-2702
F-ST-SM
A
7
6
5
4
3
4
2
3
NOSTUFF
8
5 27 60 67
25 26 28 29 31 60
IN
OUT
PMU_GPIO_BB_VBUS_DET
PP3013
P4MM
SM
PP
OUT
PP_SMPS3_MSME_1V8
RESET_SOC_L
29 30 68
PP3012
P4MM
SM
PP
GPIO48/BOOT_CONFIG_6
GPIO54/BOOT_CONFIG_0
PP3011
P4MM
SM
PP
IN
OUT
PP3010
P4MM
SM
PP
OUT
67 61 28
PP3009
P4MM
SM
PP
PS_HOLD_PMIC
GPIO_SOC2BB_RADIO_ON_L
PMU_GPIO_PMU2BBPMU_RST_L
PMIC_RESOUT_L
USB_BB_DEBUG_N
USB_BB_DEBUG_P
PP3008
P4MM
C
OUT
67 60 57 27
SHORT-10L-0.25MM-SM
1
2
XW3003
PP3003
P4MM
SM
PP
OUT
27 28 68
PP3002
P4MM
SM
PP
USB_BB_N
60 27
60 27 5
M-ST-SM
1
HSIC2_BB_STB
4 28 61 64
8
7
6
5
4
Edited by Foxit Reader ActiveX For Evaluation Only.
1
Copyright(C)22006-2009 Foxit Corporation
3
BASEBAND PMU (1 OF 2)
D
D
PP_LVS1
OUT
PP_VREG
28 68
68
INTERNAL USE ONLY
1
C3230
1.0UF
20%
6.3V
2 X5R
0201-1
L3200
2.2UH-20%-1.2A-0.15OHM
1
PP_SMPS1_MSMC_1V05
2
OUT
28 60 68
OUT
28 31 60 68
OUT
25 26 28 29 31 60
OUT
26 31 60 68
OUT
26 60 68
0806
CRITICAL
1
C3229
22UF
20%
6.3V
2 X5R-CERM-1
603
S1_GND 26
L3201
27
2.2UH-20%-1.2A-0.15OHM
1
PP_SMPS2_RF1_1V3
2
0806
1
CRITICAL
C3228
22UF
20%
6.3V
2 X5R-CERM-1
603
S2_GND
L3202
REF_BYP
C
1
PM8018-0
C3209
XW3200
SHORT-10L-0.1MM-SM
1
2
20%
6.3V
2 X5R-CERM
01005
28 REF_BYP
34 REF_GND
IN
0806
CRITICAL
C3200
1
C3201
1
C3202
10UF
10UF
10UF
20%
2 6.3V
CERM-X5R
0402-2
20%
2 6.3V
CERM-X5R
0402-2
20%
6.3V
2 CERM-X5R
0402-2
1
C3203
VREG_S1
56PF
95 VDD_S2
5%
16V
2 NP0-C0G
01005
VSW_S2
VREG_S2
6
18
24
VDD_S3
VSW_S3
VSW_S5_2
VREG_S3
98 VDD_S4
VSW_S4
VREG_S4
89
101
1
C3204
4.7UF
20%
10V
2 X5R-CERM
0402
B
26
27
S1_GND
26
27
S2_GND
1
1
C3205
4.7UF
26
27
C3206
4.7UF
20%
10V
2 X5R-CERM
0402
20%
10V
2 X5R-CERM
0402
S3_GND
26
27
S4_GND
1
C3207
4.7UF
20%
10V
2 X5R-CERM
0402
26
27
S5_GND
1
VDD_S5
VREG_S5
C3208
IN
60 31 29 28 26 25
IN
68 60 26
IN
PP_SMPS5_DSP_1V05
22UF
68
PP_VSW_S1
75
58
70
59
VDD_L7
VDD_L8
VDD_L9
VDD_L10_L11
64 VDD_L12
68
PP_VSW_S2
VREG_XO
VREG_L2
VREG_L3
VREG_L4
VREG_L5
VREG_L6
VREG_L13
VREG_L14
VREG_L7
VREG_L8
VREG_L9
VREG_L10
VREG_L11
VREG_L12
1
C3225
22UF
68
20%
6.3V
2 X5R-CERM-1
603
PP_VSW_S3
S4_GND
L3204
68
PP_VSW_S4
1
PP_SMPS5_DSP_1V05
2
2520-SM
CRITICAL
1
68
PP_VSW_S5
C3224
22UF
20%
6.3V
2 X5R-CERM-1
603
26 27
INTERNAL USE ONLY
PP_LDO1
PP_LDO2_XO_HS_1V8
PP_LDO3_AMUX_1V8
PP_LDO4_VDDA_3V3
PP_LDO5_GPS_LNA_2V5
PP_LDO6_RUIM_1V8
PP_LDO13_VDDPX_2V95
PP_LDO14_2V65
PP_LDO7_DAC_1V8
PP_LDO8_VDDPX_1V2
PP_LDO9_PLL_1V05
PP_LDO10_ADSP_1V05
PP_LDO11_MDSP_FW_1V05
PP_LDO12_MDSP_SW_1V05
20
31
32
84
11
17
23
29
63
54
77
65
55
43
1
C3211
C3210
1.0UF
20%
6.3V
2 X5R
0201-1
1
C3213
1
1.0UF
C3212
1.0UF
20%
2 6.3V
X5R
0201-1
1
1.0UF
20%
6.3V
2 X5R
0201-1
1
C3215
C3214
1.0UF
20%
6.3V
2 X5R
0201-1
1
1.0UF
20%
6.3V
2 X5R
0201-1
1
C3216
C3217
1.0UF
20%
2 6.3V
X5R
0201-1
4
1
10UF
20%
6.3V
2 X5R
0201-1
1
C3218
1
C3219
1.0UF
20%
2 6.3V
X5R
0201-1
3
C3220
1
10UF
20%
6.3V
2 CERM-X5R
0402-2
A
5
26 27
2.2UH-20%-2.34A-0.113OHM
1.0UF
6
PP_SMPS4_RF2_2V05
2
0806
CRITICAL
20%
6.3V
2 X5R
0201-1
7
NOSTUFF
26 27
2.2UH-20%-1.2A-0.15OHM
1
1
8
20%
4V
2 X5R
01005
S3_GND
L3203
C
C3227
0.1UF
S5_GND
8 VDD_XO
44 VDD_L2_L3
5 VDD_L5_L6_L13_L14
PP_SMPS4_RF2_2V05
PP_SMPS3_MSME_1V8
C3226
4.7UF
20%
10V
2 X5R-CERM
0402
78 VDD_L4
68 60 31 26
VSW_S5
92
97
79
90
102
83
42
48
100
12
81
87
105
82
88
76
1
20%
6.3V
2 X5R-CERM-1
603
VREG_RFCLK 13
VSW_S1
1
1
VOUT_LVS1 53
104 VDD_S1
=PPBATT_VCC_BB
PP_SMPS3_MSME_1V8
2
CRITICAL
REF_GND
62 40 39 38 37 36 35 34 25
1
BGA
VREG
(SYM 5 OF 5)
0.1UF
26 27
2.2UH-20%-1.2A-0.15OHM
U3300
10UF
20%
6.3V
2 CERM-X5R
0402-2
1
C3221
10UF
20%
2 6.3V
CERM-X5R
0402-2
C3222
20%
6.3V
2 CERM-X5R
0402-2
1
C3223
10UF
20%
2 6.3V
CERM-X5R
0402-2
1
C3231
1.0UF
20%
6.3V
2 X5R
0201-1
60 68
OUT
28 68
OUT
27 28 68
OUT
28 68
OUT
42 68
OUT
28 44 60 68
OUT
28 68
OUT
33 40 41 68
OUT
28 68
OUT
28 68
OUT
28 68
OUT
28 68
OUT
28 68
OUT
28 68
B
8
7
6
5
4
Edited by Foxit Reader ActiveX For Evaluation Only.
1
Copyright(C)22006-2009 Foxit Corporation
3
BASEBAND PMU (2 OF 2)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
PA_ID
68 28 27 26
D
IN
PP_LDO3_AMUX_1V8
1
R3306
1
BOARD_ID
0.7V
0.9V
1.1V
1.3V
1.5V
1.7V
IN
GPIO_SOC2BB_RST_L
IN
PS_HOLD
60 25 5
67 60 57 25
BOARD_ID
20.0K2
1
1
BI
0.3V
8.6
0.5V
8.5
1.1V
7.7
1.3V
7.6
1.5V
7.5
D
1
R3307
R3305
499K
50K
1%
1/32W
MF
2 01005
1%
1/32W
MF
2 01005
U3300
PM8018-0
BGA
MPP MISC
(SYM 4 OF 5)
28
OUT
VDDPX_BIAS
29
IN
VREF_DAC_BIAS
NC
NC
85
67
66
72
73
80
MPP_01
MPP_02
MPP_03
MPP_04
MPP_05
MPP_06
GPIO_01
GPIO_02
GPIO_03
GPIO_04
GPIO_05
GPIO_06
33
38
50
60
71
49
NC
NC
NC
NC
NC
NC
PA THERMISTOR REMOVED TO MATCH N41, AP SECTION
NEEDS ITS OWN THERMISTOR PLACED NEAR THE PA’S.
PM8018-0
60 25
PS_HOLD_PMIC
5%
1/32W
MF
01005
GPIO_SOC2BB_RADIO_ON_L
IN
IN
0.1V
PA_ID
8.7
U3300
BGA
CONTROL
(SYM 1 OF 5)
47 PS_HOLD
LED_DRV_N 86
NC
69 KPD_PWR*
PMIC_RESOUT_L
PON_RESET* 4
C
OUT
25 28 68
OUT
29
OUT
29
PMU_GPIO_PMU2BBPMU_RST_L16 PM_RESIN_N
PM_USR_INT_N 21 PM_USR_IRQ_L
PM_MDM_INT_N 14 PM_MDM_IRQ_L
62 OPT_1
NC
74 OPT_2
NC
68 28 25
1.5V
1.00K2
R3301
68 29
1%
1/32W
MF
2 01005
1%
1/32W
MF
2 01005
1
5%
1/32W
MF
01005
C
1.00M
100K
BB GPIO_29 PRODUCT_ID
JXX
1 (1.8V)
0 (NC, PD) NXX
R3300
67 60 25 5
R3304
REVISION
PROTO1
PROTO2
EVT1
EVT2
DVT
PVT
MAV VER
0.1V
PON_TRIG 41
BAT_ID 35
68 SSBI
PMIC_SSBI
GND NEEDS TO BE CLEARED UNDER THIS CRYSTAL
TO MINIMIZE THERMAL DRIFT
Y3300
19.200MHZ
2.0X1.6-SM
1
3
4
19P2M_XTAL_IN
U3300
2
PM8018-0
CRITICAL
BGA
CLOCKS
(SYM 2 OF 5)
B
1 XTAL_19M_IN
2 XTAL_19M_OUT
19P2M_XTAL_OUT
68 28 27 26
IN
PP_LDO3_AMUX_1V8
XO_OUT_A0 19
XO_OUT_D0 25
19P2M_WTR
19P2M_MDM
OUT
30 68
OUT
25 28 68
XW3300
SM
U3300
1
PM8018-0
R3303
57 VCOIN
GND
SHORT-10L-0.25MM-SM
1
2
26
26
NC
1%
1/32W
MF
2 01005
XW3301
91
GND_S1
103
GND_S2 96
30
GND_S3
36
93
GND_S4
99
GND_S5 94
NC
1
2
100K
BGA
INPUT PWR
(SYM 3 OF 5)
3 XTAL_32K_IN
15 XTAL_32K_OUT
7
19P2M_CLK_EN
IN
28 68
S1_GND
S2_GND
XW3302
XO_THERM_Y1
26
S3_GND
26
S4_GND
1
2
1
C3300
27 GND0
10 XO_THERM
22 XOADC_GND
S5_GND
39
51
61
56
46
52
40
XW3304
SM
1
XO_GND
2
2
XW3305
SHORT-10L-0.1MM-SM
1
6
5
4
SLEEP_CLK 26
RSVD 7
1000PF
10%
6.3V
2 X5R-CERM
01005
XW3303
SHORT-10L-0.25MM-SM
1
2
A
8
NC
45 GND1
SM
26
XO_OUT_A1 37
XO_OUT_D0_EN 9
3
SLEEP_CLK_32K
OUT
25 28 68
B
8
7
6
5
4
Edited by Foxit Reader ActiveX For Evaluation Only.
1
Copyright(C)22006-2009 Foxit Corporation
3
BASEBAND (1 OF 2)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
68 60 28 26
PP_SMPS1_MSMC_1V05
IN
68 28 26
1
C3400
1.0UF
20%
6.3V
2 X5R
0201-1
1
C3401
1.0UF
1
C3402
1
1.0UF
20%
6.3V
2 X5R
0201-1
C3403
1.0UF
20%
6.3V
2 X5R
0201-1
20%
6.3V
2 X5R
0201-1
1
PP_LDO8_VDDPX_1V2
IN
C3404
1
1.0UF
20%
6.3V
2 X5R
0201-1
C3431
1
1.0UF
68 28 26
IN
C3432
1
0.22UF
20%
6.3V
2 X5R
0201-1
C3433
C3434
1
1.0UF
20%
6.3V
2 X5R
01005
20%
6.3V
2 X5R
0201-1
A21
AA1
AA21
B2
B7
B11
B14
B15
C19
F6
F7
F10
F15
F16
F19
G2
G6
G10
G11
G15
G16
G17
G20
H6
H10
H11
H15
H16
J6
J7
J10
J11
J14
J15
K6
K7
K10
K11
K14
K15
K20
L2
L6
L7
L10
L11
L14
L15
M6
M7
M10
M11
0.22UF
20%
6.3V
2 X5R
0201
D
PP_LDO9_PLL_1V05
68 28 26
68 28 26
IN
IN
1
1
C3405
1
C3406
1.0UF
20%
6.3V
2 X5R
0201-1
60 31 29 28 26 25
IN
PP_SMPS3_MSME_1V8
1
C3409
1.0UF
20%
2 6.3V
X5R
0201-1
1
1.0UF
20%
6.3V
2 X5R
0201-1
28 26 25
60 31 29
IN
C3410
1
C3407
1
20%
2 6.3V
X5R
0201-1
1
68 28 26
C3412
IN
1
1.0UF
C3415
1
1.0UF
C3418
1
1.0UF
C3419
1.0UF
20%
6.3V
2 X5R
0201-1
C3416
20%
6.3V
2 X5R
0201-1
1
C3420
1.0UF
20%
6.3V
2 X5R
0201-1
C3417
1
1.0UF
20%
6.3V
2 X5R
0201-1
20%
6.3V
2 X5R
0201-1
C3414
PP_LDO12_MDSP_SW_1V05
1
1.0UF
PP_LDO11_MDSP_FW_1V05
IN
20%
6.3V
2 X5R
0201-1
20%
6.3V
2 X5R
0201-1
PP_SMPS3_MSME_1V8
C3411
C3413
1.0UF
20%
6.3V
2 X5R
0201-1
1.0UF
20%
6.3V
2 X5R
0201-1
C3408
1.0UF
20%
6.3V
2 X5R
0201-1
1
1.0UF
1
1.0UF
68
28 26
PP_LDO10_ADSP_1V05
1.0UF
20%
2 6.3V
X5R
0201-1
20%
2 6.3V
X5R
0201-1
U3400
MDM9615M
68 60 28 26
C
68 60 28 26
IN
PP_SMPS1_MSMC_1V05
PP_SMPS1_MSMC_1V05
IN
1
C3421
1.0UF
20%
6.3V
2 X5R
0201-1
B
F8
F9
F12
F13
F14
G9
G12
H9
H12
J8
J9
J12
J13
K8
K9
K12
K13
L8
L9
L12
L13
M8
M9
M12
M13
N8
N9
N12
N13
P9
P12
R9
R12
T8
T9
BGA
(5 OF 6)
PWR
VDD_DDR
VDD_ADSP
AA20
B19
F20
M20
C5
C6
E6
E7
F5
VDD_MDSP_FW
T15
T16
T17
U14
U15
U16
U17
U19
T19
VDD_MDSP_SW
N15
N16
N17
N19
P15
P16
P17
P19
VDD_CORE
PP_SMPS3_MSME_1V8
PP_LDO10_ADSP_1V05
IN
PP_LDO9_PLL_1V05
A
C17
C18
E17
F17
G7
G8
G13
G14
H7
H8
H13
H14
P7
P8
P13
P14
R7
R8
R13
R14
IN
PP_LDO11_MDSP_FW_1V05
PP_LDO12_MDSP_SW_1V05
IN
25 26 28 29 31 60
26 28 68
26 28 68
IN
26 28 68
PP_LVS1
IN
26 68
BGA
(6 OF 6)
GND
CRITICAL
GND
GND
GND_ANA
68 26
IN
IN
PP_SMPS3_MSME_1V8
A14
A19
F21
M1
M21
D
U3400
MDM9615M
BGA
(2 OF 6)
EBI1_EBI2
F11
J16
K16
L16
T6
T7
T11
U9
U12
W7
W14
Y7
Y11
Y15
Y18
U13
W13
NC
NC
NC
NC
D21
E19
D20
D19
EBI2_NAND_CS*
EBI2_OE*
EBI2_WE*
EBI2_BUSY*
C20 EBI2_CLE*
NC
E20 EBI2_ALE*
NC
R3403
EBI1_CAL C21 EBI1_CAL
EBI2_AD_0
EBI2_AD_1
EBI2_AD_2
EBI2_AD_3
EBI2_AD_4
EBI2_AD_5
EBI2_AD_6
EBI2_AD_7
J20
NC
J19
NC
G19
NC
H20
NC
J21
NC
H19
NC
H21
NC
E21
1
240
C
NC
470K
5%
1/32W
MF
2 01005
U3400
B
MDM9615M
VDD_QFUSE_PRG B13
VDD_USB_1P8 E12
VDD_USB_3P3 E10
PP_LDO2_XO_HS_1V8
PP_LDO4_VDDA_3V3
IN
VDDPX_BIAS
IN
K17 PP_LDO9_PLL_1V05
1
IN
IN
26 68
C3422
20%
6.3V
2 X5R
0201-1
20%
2 4V
X5R
01005
26 27 68
68 27 25
IN
67 61 25
IN
68 27 25
IN
64 61 25 5
IN
64 61 25 5
IN
64 61 25 5
IN
64 61 25 5
IN
1.0UF
27
C3423
0.1UF
26 28 68
VDD_PLL1
PP_LDO3_AMUX_1V8
IN
26 28 68
1
L17
VDD_PLL2 W12
Y20 RESIN*
Y4 SRST*
AA19 SLEEP_CLK
PMIC_RESOUT_L
DEBUG_RST_L
SLEEP_CLK_32K
Y3
AA2
W4
AA4
BB_JTAG_TCK
BB_JTAG_TDI
BB_JTAG_TMS
BB_JTAG_TRST_L
BGA
(1 OF 6)
DIGITAL
TCK
TDI
TMS
TRST*
NOSTUFF
VDD_A2
VDD_A2
GND
GND
U6
U7
AA11
AA18
PP_LDO7_DAC_1V8
IN
26 68
60
PP_SMPS2_RF1_1V3
IN
1
C3424
1.0UF
20%
6.3V
2 X5R
0201-1
VDD_A1 W9
VDD_A1 AA7
GND AA15
VDD_MEM
1
60
C3425
1.0UF
20%
6.3V
2 X5R
0201-1
VDD_P3
PP_SMPS3_MSME_1V8
IN
1
W20 MODE_0
Y19 MODE_1
TP_BB_TEST_MODE_0
TP_BB_TEST_MODE_1
RESOUT* U20
VDD_P4
VDD_P5
VDD_P6
VDD_P7
VDD_P1
A2
A3
A7
A11
68 27 25
68 27
IN
OUT
68 27 25
BI
64 61 25
BI
25 26 28 29 31 60
BI
19P2M_MDM
19P2M_CLK_EN
PMIC_SSBI
V20 CXO
U21 CXO_EN
Y21 SSBI_PMIC
USB_BB_DEBUG_P
USB_BB_DEBUG_N
RREFEXT
C11
E11
A12
C12
B12
C10
NC
C3426
1.0UF
61
25
57
67
20%
6.3V
2 X5R
0201-1
PP_LDO6_RUIM_1V8
PP_SMPS3_MSME_1V8
PP_LDO8_VDDPX_1V2
PP_SMPS3_MSME_1V8
TDO AA3 BB_JTAG_TDO
BB_JTAG_RTCLK
RTCK Y2
HSIC_CAL A8 68 50_HSIC_CAL
HSIC2_BB_DATA
HSIC_DATA C7
HSIC2_BB_STB
HSIC_STB B8
IN
PMU_GPIO_BB_VBUS_DET
USB_HS_DP
USB_HS_DM
USB_HS_REXT
USB_HS_ID
USB_HS_SYSCLK
USB_HS_VBUS
DNC
1
IN
26 44 60 68
IN
25 26 28 29 31 60
IN
26 28 68
IN
25 26 28 29 31 60
NC
OUT
5 25 61 64
OUT
25
R3402
1
BI
4 25 61 64
BI
4 25 61 64
240
2
1%
1/32W
MF
01005
26 31 60 68
64 61 25
A15
G1
G21
L1
U1
W19
R3401
E8
C8
B9
A9
E9
C9
B10
A10
200
1%
1/32W
MF
2 01005
SDC1_CMD K19
SDC1_CLK L21
SDC1_DATA0
SDC1_DATA1
SDC1_DATA2
SDC1_DATA3
PP_LDO13_VDDPX_2V95 K21 VDD_P2
L19
L20
N20
N21
NC
NC
NC
NC
A
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
8
7
2
1%
1/32W
MF
01005
R3400
DNC
60 31 29 28 26 25
M14
M15
M16
M17
M19
N6
N7
N10
N11
N14
P6
P10
P11
R6
R10
R11
R15
R16
R17
R19
T10
T12
T13
T14
U2
V19
1
VDD_HVPAD_BIAS E16
68 28 26
IN
U3400
MDM9615M
PP_LDO4_VDDA_3V3
6
5
4
3
2
1
8
7
6
5
4
Edited by Foxit Reader ActiveX For Evaluation Only.
1
Copyright(C)22006-2009 Foxit Corporation
3
BASEBAND (2 OF 2)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
60 31 29 28 26 25
D
PP_SMPS3_MSME_1V8
CELL
U3400
1 CELL
MDM9615M
10K
BGA
(4 OF 6)
ANALOG
R3502
VREF_DAC_BIAS
DAC0_VREF W5
CELL
1
68 30
68 30
IN
IN
68 30
IN
68 30
IN
68 30
IN
68 30
IN
68 30
IN
68 30
IN
PRX_BB_I_P
PRX_BB_I_N
PRX_BB_Q_P
PRX_BB_Q_N
U8
W8
Y8
AA8
DRX_BB_I_P
DRX_BB_I_N
DRX_BB_Q_P
DRX_BB_Q_N
Y10
AA10
Y9
AA9
W17
NC
W18
NC
W15
NC
W16
NC
BBRX_IP_CH0
BBRX_IM_CH0
BBRX_QP_CH0
BBRX_QM_CH0
BBRX_IP_CH1
BBRX_IM_CH1
BBRX_QP_CH1
BBRX_QM_CH1
BBRX_IP_CH2
BBRX_IM_CH2
BBRX_QP_CH2
BBRX_QM_CH2
5%
1/32W
MF
2 01005
OUT
27
C3500
0.1UF
20%
6.3V
2 X5R-CERM
01005
TX_DAC1_QP Y13 NC
TX_DAC1_QM AA13
NC
TX_DAC0_IP
TX_DAC0_IM
TX_DAC0_QP
TX_DAC0_QM
TX_DAC0_IREF
Y6
AA6
Y5
AA5
W6
TX_BB_I_P
TX_BB_I_N
TX_BB_Q_P
TX_BB_Q_N
BI
WTR_BB_TX_DAC_IREF
30 68
OUT
30 68
OUT
30 68
OUT
30 68
OUT
30
TX_DAC1_IP Y14 NC
TX_DAC1_IM AA14
NC
H17
NC
J17
C
68 30
IN
68 30
IN
68 30
IN
68 30
IN
W10
U10
W11
U11
GPS_BB_I_P
GPS_BB_I_N
GPS_BB_Q_P
GPS_BB_Q_N
NC
GNSS_BB_IP
GNSS_BB_IM
GNSS_BB_QP
GNSS_BB_QM
DNC
46 19
V21
NC
W21
NC
Y12
NC
Y16
NC
Y17
NC
AA12
NC
AA16
NC
AA17
NC
IN
B6
A6
A5
60 44
OUT
B5
60 44
BI
C4
BB_SPI_TO_PAC_CLK
NC
B3
NC
BB_SPI_TO_PAC_CS
B4
PAC_TO_BB_SPI_DATA_MISO NC
A4
BB_SPI_TO_PAC_DATA)MOSI NC
A16
SPI_CLK
29
OUT
A13
SPI_CS_L
29
OUT
E14
SPI_DATA_MISO
29
IN
E13
SPI_DATA_MOSI
29
OUT
C14
UART3_BB2SOC_RTS_L
64 25 5
OUT
C13
UART3_SOC2BB_RTS_L
64 25 5
IN
E15
UART3_SOC2BB_TX
64 47 25 5
OUT
A18
UART3_BB2SOC_TX
CELL 64 47 25 5 IN
R3531
C15
NC
0.00
B16
2
OSCAR2RADIO_CONTEXT_A 1
OSCAR_CONTEXT_A_MDM
GPIO_SOC2BB_WAKE_MODEM B18
0%
5
IN
1/32W
C16
GPIO_DEBUG_LED
MF
25
OUT
01005
A17
NC
B21
NC
B20
NC
A20
NC
B17
NC
P21
NC
R21
NC
P20
NC
NC R20
T20
PP_SMPS3_MSME_1V8
60 31 29 28 26 25
IN
T21
RESERVED FOR FUTURE PRODUCT ID USE NC
U5
GSM_PA_LB_EN NC
V2
GSM_PA_HB_EN NC
V1
PA_ON_B2_B3
68 35
OUT
U3
PA_ON_B1_B4
68 34
OUT
T3
NC
T1
PA_ON_B5_B8
68 37
OUT
T5
PA_ON_B7_B20
68 36
OUT
R5
PA_ON_B13_B17
68 38
OUT
R3
PA_BS
68 38 37 36 35 34
OUT
T2
DRX_ASM_V1
68 41
OUT
R2
WTR_RX_ON
68 30 25
OUT
P5
WTR_RF_ON
68 30 25
OUT
P1
PA_R0 NC
60 44
IN
60 44
OUT
SIM_TRAY_DETECT
SIMCRD_RST_CONN
SIMCRD_CLK_CONN
SIMCRD_IO_CONN
GPIO_29
PRODUCT_ID
1 (1.8V)
JXX
0 (NC, PD) NXX
D
CELL
U3400
MDM9615M
BGA
(3 OF 6)
GPIO
GPIO_0
GRFC_14 GPIO_44
GPIO_1
GRFC_15 GPIO_45
GPIO_2
GRFC_18,SW GPIO_46
GPIO_3
GRFC_19,SW GPIO_47
GPIO_4
GRFC_20 GPIO_48
GRFC_21 GPIO_49
GPIO_5
GPIO_6
GRFC_22 GPIO_50
GPIO_7
GRFC_23 GPIO_51
GPIO_8
GRFC_24,SW GPIO_52
GPIO_9
GRFC_25,SW GPIO_53
GPIO_10
GRFC_26,SW GPIO_54
GPIO_11
GRFC_27,SW GPIO_55
GPIO_12
GRFC_28,SW GPIO_56
GPIO_13
GRFC_29,SW GPIO_57
GPIO_14
GRFC_30,SW GPIO_58
GPIO_15
GRFC_31 GPIO_59
GRFC_32 GPIO_60
GPIO_16
GRFC_33 GPIO_61
GPIO_17
GPIO_18
GRFC_34 GPIO_62
GPIO_19
GRFC_35,SWGPIO_63
GPIO_20
GRFC_36 GPIO_64
GPIO_21
GRFC_37 GPIO_65
GPIO_22
GRFC_38 GPIO_66
GPIO_23
GRFC_39 GPIO_67
GPIO_24
GPIO_68
GPIO_25
GPIO_69
GPIO_26
GPIO_70
GPIO_27
GPIO_71
GPIO_28
GPIO_72
GPIO_29
GPIO_73
GPIO_30
GPIO_74
GPIO_31 GRFC_0,PA_ON GPIO_75
GPIO_32 GRFC_1,PA_ON GPIO_76
GPIO_33 GRFC_2,PA_ON GPIO_77
GPIO_34 GRFC_3,PA_ON GPIO_78
GPIO_35 GRFC_4,PA_ON GPIO_79
GPIO_36 GRFC_5,PA_ON GPIO_80
GPIO_37 GRFC_6,PA_ON GPIO_81
GPIO_38 GRFC_7,PA_ON GPIO_82
GPIO_39 GRFC_8,PA_ON GPIO_83
GPIO_40 GRFC_9,SW
GPIO_84
GPIO_41 GRFC_10
GPIO_85
GPIO_42 GRFC_11
GPIO_86
GPIO_43 GRFC_13
GPIO_87
P3
R1
N5
N3
P2
M2
N1
N2
M3
L3
M5
L5
K1
K5
K3
K2
J2
J5
J1
J3
H3
H5
G5
H1
H2
F3
F1
G3
V3
W3
W2
W1
Y1
F2
E2
E3
D1
E1
D2
D3
C1
B1
C2
C3
PA_R1
DRX_ASM_V2
OUT
34 35 36 37 38 68
OUT
41 68
2G_FEM_S6
BOOT_CONFIG_6
LAT_SW1_CTL
GPIO_BB2SOC_GSM_TXBURST
OUT
40 68
OUT
25 68
OUT
5
NC
NC
ELNA CONTROL
GPIO_51
2G_FEM_S5
2G_FEM_S4
2G_FEM_S1
2G_FEM_S0
DRX_ASM_V3
2G_FEM_S2
2G_FEM_S3
BOOT_CONFIG_4
BOOT_CONFIG_3
BOOT_CONFIG_2
BOOT_CONFIG_1
BOOT_CONFIG_0
IN
BOOT_CONFIG_5
25
OUT
40 68
OUT
25 40 68
OUT
25 40 68
OUT
40 68
OUT
41 68
OUT
33 40 68
OUT
33 40 68
NC
DCDC_EN
DCDC_MODE
DRX_ASM_V4
NC
NC
NC
NC
BB_PDM
UART_WLAN2BB_LTE_COEX
UART_BB2WLAN_LTE_COEX
OUT
39
OUT
39 68
OUT
41 68
OUT
39 68
IN
25 46
OUT
25 46
OUT
5 64
C
LTE_ACTIVE
HSIC2_BB2SOC_REMOTE_WAKE
BB_IPC_GPIO
WTR_SSBI_PRX_DRX
WTR_SSBI_TX_GPS
BB_ERROR_FLAG
WTR_GP_DATA0 GPH
WTR_GP_DATA1 GPH
BI
7
BI
25 30
BI
25 30
OUT
25 68
OUT
30 68
OUT
30 68
WTR_GP_DATA2
WLAN_TX_BLANK
OSCAR_CONTEXT_B_MDM
HSIC2_BB2SOC_DEVICE_RDY
HSIC2_SOC2BB_HOST_RDY
PM_MDM_IRQ_L
GPIO_BB2SOC_RESET_DET_L
PS_HOLD
CELL
IN
46
R3530
1
0.00
OUT
5 25 64
0%
IN
5 25 64
1/32W
MF
01005
OUT
27
OUT
5 25 67
OUT
27 68
OUT
5
OUT
25 57 60
OUT
27
2
OSCAR2RADIO_CONTEXT_B
IN
19 46
NC
GPIO_BB2SOC_GPS_SYNC
PMU_GPIO_BB2PMU_HOST_WAKE
PM_USR_IRQ_L
B
B
CELL
L3520
70-OHM-300MA
PP_SMPS3_MSME_1V8
60 31 29 28 26 25
IN
1
2
68
PP_SMPS3_MSME_1V8_FILT
01005-1
CELL
1
C3520
0.1UF
B2
20%
6.3V
2 X5R-CERM
01005
VCC
CELL
U3520
SERIAL-SPI-2MX8-1.8V
WLCSP
MX25U1635EBAI-10G
D3
A
29
IN
SPI_DATA_MOSI
E2
IN
SPI_CLK
D2 SCLK
C2
NC/SIO3
CRITICAL
SI/SIO0
CS*
B3
SPI_CS_L
SO/SIO1
C3
SPI_DATA_MISO
IN
29
OUT
29
A
A4
NC
GND
NC
F1
NC
F4
NC
E3
29
WP*/SIO2
8
7
6
5
4
3
8
7
6
5
4
Edited by Foxit Reader ActiveX For Evaluation Only.
1
Copyright(C)22006-2009 Foxit Corporation
3
RF
TRANSCEIVER (1 OF 2)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
TRANSCEIVER PHASE CONTROL, TX RF & IQ PORTS
PRX TRANSCEIVER RF AND IQ PORTS
D
U3600
U3600
WTR1605
WTR1605
SM
SM
68 33
IN
68 33
IN
68 32
68 32
68 32
68 32
68 32
IN
IN
IN
IN
IN
68 32
IN
68 32
IN
68 32
IN
68 32
IN
68 32
IN
68 32
IN
68 32
IN
100_XCVR_B13_B17_B20_PRX_P
100_XCVR_B13_B17_B20_PRX_N
78
69
100_XCVR_B8_PRX_N
100_XCVR_B8_PRX_P
61
54
100_XCVR_B5_B18_PRX_P
100_XCVR_B5_B18_PRX_N
48
43
SYM 3 OF 5
PRX
PRX_BB_I_P
PRX_BB_IP 84
PRX_BB_IM 92
PRX_BB_I_N
PRX_LB2_INP
PRX_LB2_INM
PRX_BB_QP 91
PRX_BB_QM 82
PRX_BB_Q_P
PRX_BB_Q_N
PRX_LB3_INP
PRX_LB3_INM
DNC 86
PRX_LB1_INP
PRX_LB1_INM
100_XCVR_B2_B25_PRX_P
100_XCVR_B2_B25_PRX_N
36
30
PRX_MB1_INP
PRX_MB1_INM
100_XCVR_B3_PRX_P
100_XCVR_B3_PRX_N
23
17
PRX_MB2_INP
PRX_MB2_INM
OUT
29 68
OUT
29 68
OUT
29 68
OUT
29 68
68 29
IN
68 29
IN
68 29
IN
68 29
IN
29
IN
NC
68 29
IN
68 29
IN
8
16
PRX_MB3_INP
PRX_MB3_INM
100_XCVR_B7_PRX_P
100_XCVR_B7_PRX_N
7
15
PRX_HB_INP
PRX_HB_INM
C
68 29 25
B7 DIFF PAIR NET NAME
TO BE UPDATED
68 41
IN
68 41
IN
68 41
IN
68 41
IN
68 41
IN
68 41
IN
68 41
IN
WTR_BB_TX_DAC_IREF
109
DAC_REF
WTR_GP_DATA0
WTR_GP_DATA1
GPH 105
GPH 121
88
WTR_GP_DATA2 NC 114
NC
96
SYM 1 OF 5
DRX_GPS
68 27
DRX_LB1_INP
DRX_LB1_INM
DRX_BB_I_P
DRX_BB_I_N
OUT
29 68
OUT
29 68
DRX_LB2_INP
DRX_LB2_INM
DRX_BB_QP 50
DRX_BB_QM 57
DRX_BB_Q_P
DRX_BB_Q_N
OUT
29 68
OUT
29 68
GNSS_BB_IP 56
GNSS_BB_IM 62
GPS_BB_I_P
GPS_BB_I_N
OUT
29 68
OUT
29 68
GNSS_BB_QP 70
GNSS_BB_QM 71
GPS_BB_Q_P
GPS_BB_Q_N
OUT
29 68
OUT
29 68
5
14
100_XCVR_B5_B18_B13_B17_DRX_P
100_XCVR_B5_B18_B13_B17_DRX_N
4
13
100_XCVR_B2_B25_B3_DRX_P
100_XCVR_B2_B25_B3_DRX_N
3
12
DRX_MB_INP
DRX_MB_INM
100_XCVR_B1_B4_DRX_P
100_XCVR_B1_B4_DRX_N
2
11
DRX_HB_INP
DRX_HB_INM
100_XCVR_GPS_RX_P
100_XCVR_GPS_RX_N
10
18
GNSS_INP
GNSS_INM
IN
BI
29 25
BI
IN
19P2M_WTR
100PF
1
2
GP_DATA0
GP_DATA1
GP_DATA2
DNC
DNC
90
DNC
60
RBIAS
79
VTUNE_PRX
45
100
89
80
RX_ON
RF_ON
SSBI_TX_GNSS
SSBI_PRX_DRX
134
GND
120
XO_IN
CELL
DRX_BB_IP 63
DRX_BB_IM 72
100_XCVR_B8_B20_DRX_P
100_XCVR_B8_B20_DRX_N
IN
29 25
WTR_RX_ON
WTR_RF_ON
WTR_SSBI_TX_GPS
WTR_SSBI_PRX_DRX
C3600
SM
IN
TX_BB_QP
TX_BB_QM
WTR_VTUNE NC
WTR1605
68 41
131
139
WTR_RBIAS
1%
1/32W
MF
01005
U3600
IN
TX_BB_Q_P
TX_BB_Q_N
NC
4.75K2
1
CELL
IN
TX_BB_IP
TX_BB_IM
CELL
68 29 25
68 41
130
138
NC
SWAPPED B1/4 AND B7 PRX INPUTS
DRX TRANSCEIVER RF AND IQ PORTS
68 41
TX_BB_I_P
TX_BB_I_N
R3600
100_XCVR_B1_B4_PRX_N
100_XCVR_B1_B4_PRX_P
D
CELL
CELL
SYM 2 OF 5
TX
CRITICAL
TX_LB1
TX_LB2
TX_LB3
TX_LB4
140
132
141
133
50_XCVR_B13_B17_B20_TX
50_XCVR_2G_LB_TX
50_XCVR_B8_TX
50_XCVR_B5_B18_TX
TX_MB1
TX_MB2
TX_MB3
TX_MB4
126
119
112
95
50_XCVR_B2_B25_TX
50_XCVR_2G_HB_TX
50_XCVR_B3_B4_TX
50_XCVR_B1_TX
TX_HB 103
DNC 93
50_XCVR_B7_TX
CELL
NC
PDET_IN 101 68 50_PDET_IN
OUT
33 68
OUT
40 68
OUT
33 68
OUT
33 68
OUT
32 68
OUT
40 68
OUT
32 68
OUT
32 68
OUT
36 68
CELL
C3602
R3602
56PF
1
2 68 50_PDET_PAD_OUT
5%
16V
NP0-C0G
01005
DC-BLOCK NEEDED
FOR SELF CAL
47
1
CELL
1
5%
1/32W
MF
01005
R3601
2
50_PDET_PAD_IN
IN
40 68
CELL
1
R3603
130
130
1%
1/32W
MF
2 01005
1%
1/32W
MF
2 01005
7 DB ATTENUATOR
C
19P2M_WTR_IN
5%
16V
NP0-C0G
01005
1
C3601
10PF
5%
2 16V
CERM
01005
NOSTUFF
GND 1
TRANSCEIVER GROUND CONNECTIONS
CELL
B
B
U3600
WTR1605
SM
SYM 5 OF 5
GND
A
8
7
46
77
47
68
29
22
27
21
20
33
6
75
38
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
41
58
74
59
52
39
73
34
64
81
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
35
GND
142
GND
GND 125
GND 124
GND
GND
GND
GND
GND
GND
GND
123
110
102
99
129
94
115
GND
GND
GND
GND
GND
GND
GND
GND
137
122
107
106
135
128
104
113
GND 19
GND 32
GND 49
GND 9
6
5
4
3
8
7
6
5
4
Edited by Foxit Reader ActiveX For Evaluation Only.
1
Copyright(C)22006-2009 Foxit Corporation
3
RF TRANSCEIVER (2 OF 2)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
RF1_1V3
CELL
R3700
D
60 28 26
68
PP_SMPS2_RF1_1V3
1
0
5%
1/20W
MF
201
2
STAR ROUTING
31
CELL
PP_SMPS2_RF1_1V3_FILT
ALIAS
CELL
1
RF2_2V05
R3702
STAR ROUTING
PP_RF1_1V3_PRX_PLL
CELL
1
C3701
31
68 60 26
PP_SMPS4_RF2_2V05
1
20%
2 6.3V
X5R-CERM
01005
20%
10V
2 X5R-CERM
0402-1
2
STAR ROUTING
PP_SMPS4_RF2_2V05_FILT
5%
1/20W
MF
201
C3702
0.1UF
10UF
0
PP_RF1_1V3_SHDR_PLL
20%
6.3V
2 X5R-CERM
01005
ALIAS
10UF
PP_RF1_1V3_PRX_VCO
PP_RF2_2V05_TX_DA
31
PP_SMPS2_RF1_1V3_FILT
ALIAS
CELL
20%
6.3V
2 X5R-CERM
01005
C3704
PP_RF1_1V3_GPS_LNA
100PF
5%
2 16V
NP0-C0G
01005
PLACE NEAR U3600.111
31
PP_RF2_2V05_PRX_BB
ALIAS
C3713
0.1UF
31
CELL
31
ALIAS
STAR ROUTING
PP_RF1_1V3_GPS_DIG
PP_RF2_2V05_TX_BB
31
ALIAS
CELL
1
ALIAS
PP_RF1_1V3_GPS_VCO
20%
6.3V
2 X5R-CERM
01005
31
PLACE NEAR U3600.67
CELL
1
20%
2 6.3V
X5R-CERM
01005
0.1UF
ALIAS
PP_RF1_1V3_GPS_PLL
PP_RF2_2V05_SHDR_VCO
31
31
ALIAS
CELL
1
PLACE NEAR U3600.37 AND U3.55
20%
6.3V
2 X5R-CERM
01005
C
C3714
0.1UF
CELL
C3705
ALIAS
1
0.1UF
RF1_1V8
31
60 29 28 26 25
C3706
PLACE NEAR U3600.51
PP_RF1_1V8_DIG
ALIAS
31
ALIAS
31 68
CELL
CELL
20%
2 6.3V
X5R-CERM
01005
1
1
C3700
STAR ROUTING
20%
2 6.3V
X5R-CERM
01005
PLACE NEAR U3600.136
PLACE NEAR U3600.87
ALIAS
PP_RF1_1V3_TX_SYNTH
31
CELL
1
C3719
0.1UF
1.0UF
20%
10V
2 X5R-CERM
0201-1
PLACE NEAR U3600.118
CELL
C
PP_RF2_2V05_TX_VCO
PP_SMPS3_MSME_1V8
0.1UF
C3718
20%
2 6.3V
X5R-CERM
01005
PLACE NEAR U3600.40
PP_RF1_1V3_TX_DA
C3717
0.1UF
STAR ROUTING
PLACE NEAR U3600.76
31
31
PP_RF2_2V05_PRX_VCO
31
PLACE NEAR U3600.24 AND U3.31
20%
6.3V
2 X5R-CERM
01005
1
C3716
ALIAS
1
PP_RF1_1V3_SHDR_VCO
D
31
STAR ROUTING
0.1UF
ALIAS
31 68
NOSTUFF
1
STAR ROUTING
STAR ROUTING
PLACE NEAR U3600.65
1
C3715
RF1_1V3
C3703
0.1UF
ALIAS
1
31
CELL
1
PP_RF2_2V05_DRX_BB
20%
10V
2 X5R-CERM
0402-1
PLACE NEAR U3600.66
ALIAS
ALIAS
CELL
ALIAS
PP_RF2_2V05_TX_PLL
31
C3707
0.1UF
20%
2 6.3V
X5R-CERM
01005
ALIAS
PP_RF2_2V05_XO_FILT
31
CELL
PLACE NEAR U3600.98
1
C3720
0.1UF
ALIAS
PP_RF1_1V3_TX_LO
20%
6.3V
2 X5R-CERM
01005
31
CELL
1
PLACE NEAR U3600.127
C3708
0.1UF
20%
2 6.3V
X5R-CERM
01005
PLACE NEAR U3600.116
ALIAS
B
TRANSCEIVER POWER CONNECTIONS
PP_RF1_1V3_TX_UPCONVERTER
31
CELL
CELL
1
WTR1605
100PF
5%
16V
2 NP0-C0G
01005
SM
SRM 4 OF 5
PWR
PLACE NEAR U3600.117
PP_RF1_1V3_PRX_FELO1
PP_RF1_1V3_PRX_FELO2
PP_RF1_1V3_DRX_LBLO
31
31 PP_RF1_1V3_DRX_FE
PP_RF1_1V3_DRX_MBLO
31
PP_RF1_1V3_JAM_DET
31
PP_RF2_2V05_PRX_BB
31
31 PP_RF2_2V05_DRX_BB
53
42
28
26
25
85
83
44
VDD_RF1_P_FELO
VDD_RF1_P_FELO
VDD_RF1_D_LBLO
VDD_RF1_D_FE
VDD_RF1_D_MBLO
VDD_RF1_JDET
VDD_RF2_P_BB
VDD_RF2_D_BB
PP_RF2_2V05_PRX_VCO
31
PP_RF1_1V3_PRX_VCO
31
PP_RF1_1V3_PRX_PLL
31
31 PP_RF2_2V05_SHDR_VCO
PP_RF1_1V3_SHDR_VCO
31
PP_RF1_1V3_SHDR_PLL
31
67
76
66
51
40
65
VDD_RF2_P_VCO
VDD_RF1_P_VCO
VDD_RF1_P_PLL
VDD_RF2_S_VCO
VDD_RF1_S_VCO
VDD_RF1_S_PLL
31
STAR ROUTING
STAR ROUTING
PP_RF1_1V3_PRX_FELO1
ALIAS
CELL
1
31
31
C3710
68
0.1UF
PP_RF1_1V3_DRX_FE
20%
6.3V
2 X5R-CERM
01005
ALIAS
31 68
PLACE NEAR U3600.53 AND U3.26
68
PP_RF1_1V3_PRX_FELO2
31
ALIAS
CELL
1
C3711
0.1UF
20%
6.3V
2 X5R-CERM
01005
PLACE NEAR U3600.42
PP_RF1_1V3_DRX_LBLO
ALIAS
31
CELL
C3712
PP_RF1_1V3_DRX_MBLO
0.1UF
A
ALIAS
20%
6.3V
2 X5R-CERM
01005
31
PLACE NEAR U3600.25 AND U3.28
ALIAS
8
7
PP_RF1_1V3_JAM_DET
6
VDD_RF2_T_DA
VDD_RF1_T_DA
VDD_RF1_T_UPC
VDD_RF1_T_LO
VDD_RF2_T_BB
111
118
117
116
108
PP_RF2_2V05_TX_DA
31
PP_RF1_1V3_TX_DA
31
PP_RF1_1V3_TX_UPCONVERTER 31
PP_RF1_1V3_TX_LO
31
PP_RF2_2V05_TX_BB
31
VDD_RF2_T_VCO
VDD_RF2_XO
VDD_RF1_T_SYN
VDD_RF2_T_PLL
136
127
98
97
PP_RF2_2V05_TX_VCO
PP_RF2_2V05_XO_FILT
PP_RF1_1V3_TX_SYNTH
PP_RF2_2V05_TX_PLL
VDD_RF1_G_LNA
VDD_RF1_G_VCO
VDD_RF1_G_PLL
VDD_RF1_G_BB
24
37
55
31
PP_RF1_1V3_GPS_LNA
PP_RF1_1V3_GPS_VCO
PP_RF1_1V3_GPS_PLL
PP_RF1_1V3_GPS_DIG
VDD_DIO 87
STAR ROUTING
1
B
U3600
C3709
31
5
4
3
PP_RF1_1V8_DIG
31
31
31
31
31
31
31
31
31 68
8
7
6
5
4
Edited by Foxit Reader ActiveX For Evaluation Only.
1
Copyright(C)22006-2009 Foxit Corporation
3
TRANSCEIVER TX AND RX MATCHING NETWORKS
TX MATCHING NETWORKS
CELL
R3800
D
68 30
IN
50_XCVR_B1_TX
1
0.00 2
50_B1_TX_SAW_IN
OUT
D
33 68
0%
1/32W
MF
01005
68 36
IN
50_B7_DUPLX_RX
1
CELL
68 30
IN
CELL
CELL
R3801
50_B3_B4_TX_SAW_IN OUT
9.1NH-3%-220MA
33 68
0201
0%
1/32W
MF
01005
CRITICAL
2
CELL
C3806
L3825
0.00 2
50_XCVR_B3_B4_TX
1
CELL
U3803
L3813
27PF
1
100_B7_PRX_BALUN_OUT_N
68
2.3-2.69GHZ
LLP
2
68
33PF
UNBAL_PORT 2
CELL
50_B2_B25_TX_SAW_IN
OUT
OUT
30 68
CELL
C3807
2
L3815
27PF
33 68
0%
1/32W
MF
01005
30 68
0201
CELL
GND
1
IN
OUT
2.5NH+/-0.1NH-500MA
R3802
68 30
100_XCVR_B7_PRX_N
L3814
CRITICAL
0.00 2
50_XCVR_B2_B25_TX
1
2
5%
25V
NPO-C0G
0201
1
BAL_PORT1 3
BAL_PORT2 4
CELL
1
100_B7_PRX_MATCH_N
5%
16V
NP0-C0G
01005
68
1
100_B7_PRX_BALUN_OUT_P
2
68
33PF
1
100_B7_PRX_MATCH_P
5%
16V
NP0-C0G
01005
2
100_XCVR_B7_PRX_P
5%
25V
NPO-C0G
0201
CELL
L3805
C
100PF
68 34
IN
100_B1_B4_DUPLX_RX_P
1
CELL
1
100_XCVR_B1_B4_PRX_N
2
OUT
30 68
OUT
30 68
OUT
30 68
C
5%
16V
NP0-C0G
01005
CRITICAL
L3804
0.8PF
+/-0.05PF
16V
2 C0G-CERM
01005
RX MATCHING NETWORKS
CELL
CRITICAL
L3806
100PF
68 34
IN
100_B1_B4_DUPLX_RX_N
1
CELL
C3800
0.6PF
68 35
IN
50_B2_DUPLX_RX
1
1
CELL
L3800
100_XCVR_B2_B25_PRX_N
2
+/-0.05PF
16V
CERM
01005
1
NO_XNET_CONNECTION=TRUE
CRITICAL
68
B
1
C3802
0.6PF
IN
100_B5_B18_DUPLX_RX_N
1
1
2
NO_XNET_CONNECTION=TRUE
L3807
10NH-3%-140MA
01005
CELL
CRITICAL
2
100_XCVR_B2_B25_PRX_P
OUT
L3802
10NH-3%-140MA
01005
CELL
CELL
CRITICAL
+/-0.05PF
16V
CERM
01005
50_B3_RX_BALUN
C3805
1.5PF
2
100_B5_B18_DUPLX_RX_P
1
30 68
OUT
30 68
OUT
30 68
L3810
CRITICAL
68 37
IN
100_B8_DUPLX_RX_P
1
2
100_XCVR_B8_PRX_P
0201
2
CRITICAL
CELL
1
100_XCVR_B3_PRX_P
OUT
CELL
30 68
L3811
5%
16V
NP0-C0G
01005
18NH+/-3%-0.2A-0.8OHM
0201
CRITICAL
NO_XNET_CONNECTION=TRUE
68 37
IN
CELL
L3812
10NH-3%-250MA
2
100_B8_DUPLX_RX_N
1
2
0201
CRITICAL
CRITICAL
A
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
7
OUT
10NH-3%-250MA
+/-0.1PF
2 16V
NP0-C0G
01005-1
8
100_XCVR_B5_B18_PRX_P
2
CRITICAL
L3803
CELL
1
IN
0201
0201
CELL
1
68 37
5.1NH-3%-0.35A
27PF
5.6NH-3%-0.35A
30 68
CELL
CRITICAL
C3804
CELL
L3809
2
OUT
1
0201
CRITICAL
68
100_XCVR_B3_PRX_N
2
8.2NH+/-3%-0.25A-0.7OHM
2
B
NO_XNET_CONNECTION=TRUE
CELL
CRITICAL
L3816
1
CELL
2
+/-0.1PF
16V
NP0-C0G
01005
1
NO_XNET_CONNECTION=TRUE
0.9PF
1
1
50_B5_RX_BAL_TERM
C3803
50_B3_DUPLX_RX
7.0PF
30 68
5%
16V
NP0-C0G
01005
CRITICAL
IN
C3808
2
+/-0.05PF
2 16V
CERM
01005
68 35
100_XCVR_B5_B18_PRX_N
2
0201
CRITICAL
1
CELL
27PF
CELL
68 37
0201DS
C3801
50_B2_RX_BALUN
30 68
CELL
CRITICAL
6.8NH-5%-0.5A
0201DS
2
OUT
CELL
L3808
5.6NH-3%-0.35A
L3801
13NH-5%-0.28A
CRITICAL
100_XCVR_B1_B4_PRX_P
2
5%
16V
NP0-C0G
01005
CRITICAL
6
5
4
3
100_XCVR_B8_PRX_N
8
7
6
5
4
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1
Copyright(C)22006-2009 Foxit Corporation
3
SAW BANK
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
D
D
HB TX SAW BANK +
B13/B17/B20 DP6T SWITCH AND MATCHING
68 40 29
IN
68 40 29
IN
68 41 40 26
IN
2G_FEM_S3
2G_FEM_S2
PP_LDO14_2V65
LB TX SAW BANK
CELL
FL3901
LMTPFJGA-E50
68 30
IN
50_XCVR_B5_B18_TX
CRITICAL
1 B5/18/BC10_TX_IN B5/18/BC10_TX_OUT 11 50_B5_TX_SAW_OUT OUT
37 68
68 30
IN
50_XCVR_B8_TX
2 B8_TX_IN
50_B8_TX_SAW_OUT
B8_TX_OUT 10
OUT
37 68
68 30
IN
50_XCVR_B13_B17_B20_TX 3 B13/17/20_TX_IN
50_B13_TX_SAW_OUT
B13_TX_OUT 9
OUT
38 68
50_B17_TX_SAW_OUT
B17_TX_OUT 8
OUT
38 68
50_B20_TX_SAW_OUT
B20_TX_OUT 7
OUT
36 68
7
8
9
6
LGA
VDD V1 V2 V3
CELL
U3900
HFQSMXXFA
LGA
50_B1_TX_SAW_IN
68 32
IN
50_B2_B25_TX_SAW_IN
5 B25_TXIN
68 32
IN
50_B3_B4_TX_SAW_IN
4
IN
100_B13_DUPLX_RX_N
100_B13_DUPLX_RX_P
15
16
B13_RXIN
B13_RXIN
100_B17_DUPLX_RX_P
100_B17_DUPLX_RX_N
17
18
B17_RXIN
B17_RXIN
100_B20_DUPLX_RX_P
100_B20_DUPLX_RX_N
19
20
B20_RXIN
B20_RXIN
B3/4_TXIN
C
68 38
68 38
IN
68 38
IN
68 38
IN
68 36
IN
68 36
IN
10
GND
BAND
B3 TX
B4 TX
B13 RX
B17 RX
B20 RX
B
OUT
34 68
OUT
35 68
50_B3_TX_SAW_OUT
B3TXOUT 12
OUT
35 68
50_B4_TX_SAW_OUT
BAND4TXOUT 13
OUT
34 68
OUT
30 68
OUT
30 68
B13_17_20_RXOUT0 1 100_XCVR_B13_B17_B20_PRX_N
B13_17_20_RXOUT1 2 100_XCVR_B13_B17_B20_PRX_P
GND
THRM
PAD
V3=V2 V1
HIGH
X
LOW
X
HIGH HIGH
HIGH LOW
LOW
HIGH
B
A
8
7
C
23
IN
21
22
68 32
4
5
6
12
13
14 50_B1_TX_SAW_OUT
CRITICALBAND1TXOUT
50_B2_TX_SAW_OUT
B25TXOUT 11
3 B1TXIN
6
5
4
3
8
7
6
5
4
Edited by Foxit Reader ActiveX For Evaluation Only.
1
Copyright(C)22006-2009 Foxit Corporation
3
BAND 1/4 PAD
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
D
D
68 40 39 38 37 36 35
IN
62 40 39 38 37 36 35 26 25
IN
PA_ON_B1_B4
PA_BS
PA_R1
PP_PA
=PPBATT_VCC_BB
CELL
CELL
1
C4005
0.1UF
20%
6.3V
2 X5R-CERM
01005
CELL
1
CELL
C4006
1000PF
10%
6.3V
2 X5R-CERM
01005
1
C4007
1.0UF
20%
6.3V
2 X5R
0201-1
1
CELL
1
C4009
56PF
C4008
5%
16V
2 NP0-C0G
01005
27PF
5%
25V
2 NP0-C0G
0201
CELL
1
IN
29 68
IN
29 35 36 37 38 68
IN
29 35 36 37 38 68
CELL
C4010
56PF
5%
16V
2 NP0-C0G
01005
1
C4011
56PF
5%
16V
2 NP0-C0G
01005
0.6PF
1.2PF
+/-0.05PF
16V
2 CERM
01005
+/-0.1PF 68
16V
2 NP0-C0G
68
01005
NOSTUFF
CELL
C4003
3.0NH+/-0.1NH-200MA
50_B4_TX_SAW_OUT
IN
28 RFIN_B1
26 RFIN_B4
CELL
U4000
GND
CRITICAL
0.7PF
CELL
R4000
50_B1_B4_DPLX_ANT
1
2
68
50_B1_B4_ANT_PHASESHIFT
0201
CELL
1
C4012
1.3PF
+/-0.1PF
25V
2 C0G-CERM
201
CRITICAL
1
1
0
CELL
C4013
CRITICAL
1.5PF
+/-0.1PF
25V
2 C0G-CERM
0201
CRITICAL
50_B1_B4_ANT
2
5%
1/20W
MF
201
CRITICAL
ANT_B1_4 16
2
C4004
68
SM
CRITICAL
1
2
3
5
6
7
10
11
12
13
14
15
1
GND 4
GND 20
TQF6514
9 RX_P_B1_B4
8 RX_N_B1_B4
01005
CELL
L4000
3.3NH+/-0.1NH-0.45A
THRM
PAD
68 33
1
50_B1_TX_PAD_IN
50_B4_TX_PAD_IN
23
27
C
CELL
21
CRITICAL
C4002
31
1
C4000
18
19
1
VMODE 30
2
01005
CRITICAL
CELL
VEN_B1_B4 24
BS 25
VBATT 29
1
50_B1_TX_SAW_OUT
IN
17
68 33
VCC 22
CELL
C4001
2.2NH+/-0.1NH-200MA
BI
40 68
1
R4001
0
5%
1/20W
MF
2 201
C
NOSTUFF
+/-0.05PF
16V
2 NP0-C0G
01005
CRITICAL
100_B1_B4_DUPLX_RX_N
100_B1_B4_DUPLX_RX_P
OUT
32 68
OUT
32 68
B
B
BAND
PA POWER MODE
PA_BS
PA_ON_B1_B4
PA_R1
============================================================
POWER DOWN
X
0
0
0
STANDBY
X
X
0
X
B4
HPM
0
1
0
B4
LPM
0
1
1
B1
HPM
1
1
0
B1
LPM
1
1
1
A
8
7
6
5
4
3
8
7
6
5
4
Edited by Foxit Reader ActiveX For Evaluation Only.
1
Copyright(C)22006-2009 Foxit Corporation
3
BAND 2/3 PAD
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
D
D
68 40 39 38 37 36 34
IN
62 40 39 38 37 36 34 26 25
IN
PP_PA
=PPBATT_VCC_BB
CELL
1
C4105
0.1UF
20%
6.3V
2 X5R-CERM
01005
PA_ON_B2_B3
PA_BS
CELL
1
PA_R1
C4106
1000PF
10%
6.3V
2 X5R-CERM
01005
CELL
2.0NH+/-0.1NH-0.2A-1.35OHM
2
01005
C4100
68
50_B3_TX_PAD_IN
50_B2_TX_PAD_IN
+/-0.05PF
16V
2 C0G-CERM
01005
C
CRITICAL
3.9NH+/-0.1NH-180MA
IN
50_B2_TX_SAW_OUT
1
2
01005
CELL
1
CRITICAL
C4102
CELL
1
1.0PF
26 RFIN_B3
28 RFIN_B2
U4100
1
C4115
56PF
5%
16V
2 NP0-C0G
01005
5%
16V
2 NP0-C0G
01005
CELL
L4100
NC
NC
R4102
3.9NH+/-0.1NH-0.40A
68
50_B3_DPLX_ANT
1
3.6NH+/-0.1NH-400MA
68
2
CRITICAL
50_B3_ANT_PHASESHIFT
2
50_B3_ANT
BI
40 68
0201
C
CRITICAL
CELL
1
C4111
1.8PF
THRM_PAD
+/-0.1PF
25V
2 C0G
201
C4104
CRITICAL
0.5PF
+/-0.1PF
16V
2 NP0-C0G
01005
+/-0.05PF
16V
2 C0G-CERM
01005
CRITICAL
CRITICAL
CELL
CELL
L4101
R4100
3.8NH+/-0.1NH-0.4A-0.30OHM
68
50_B2_DUPLX_RX
50_B3_DUPLX_RX
OUT
32 68
OUT
32 68
50_B2_DPLX_ANT
1
2
68
50_B2_ANT_PHASESHIFT
0201
CELL
C4110
1.8PF
+/-0.1PF
2 25V
C0G
201
CRITICAL
1
0
50_B2_ANT
2
BI
40 68
5%
1/20W
MF
201
CRITICAL
1
CELL
1
C4112
1.3PF
+/-0.1PF
25V
2 C0G-CERM
201
CRITICAL
CRITICAL
1
R4101
0
5%
1/20W
MF
2 201
NOSTUFF
B
B
A
1
0201
CRITICAL
ANT_B3 16
ANT_B2 8
GND
29 34 36 37 38 68
CELL
CPL_IN 4
CPL_OUT 20
LGA
11 RX_B2
10 GND
29 34 36 37 38 68
IN
CELL
C4114
56PF
5%
16V
2 NP0-C0G
01005
AFEM-792503
13 RX_B3
14 GND
CELL
C4103
68 33
1
56PF
CELL
68
0.5PF
27
1
CRITICAL
23
CELL
CELL
C4113
29 68
IN
31
32
33
34
35
36
37
38
39
40
41
42
1
50_B3_TX_SAW_OUT
22
IN
1
3
5
6
7
9
12
15
17
18
19
21
68 33
VMODE 24
C4101
VEN_B2_B3 30
BS 29
CELL
VCC 2
VBATT 25
1
IN
BAND
PA POWER MODE
PA_BS
PA_ON_B2_B3
PA_R1
============================================================
POWER DOWN
X
0
0
0
STANDBY
X
X
0
X
B3
HPM
0
1
0
B3
LPM
0
1
1
B2
HPM
1
1
0
B2
LPM
1
1
1
8
7
6
5
4
3
8
7
6
5
4
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1
Copyright(C)22006-2009 Foxit Corporation
3
BAND 20/7 PAD
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
D
D
PP_PA BULK BYPASSING SHARED WITH B1/4 PAD
68 40 39 38 37 35 34
IN
62 40 39 38 37 35 34 26 25
IN
PP_PA
PA_ON_B7_B20
=PPBATT_VCC_BB
PA_BS
CELL
1
CELL
C4202
0.1UF
20%
6.3V
2 X5R-CERM
01005
1
CELL
C4203
1
1000PF
CELL
C4213
1
1.0UF
10%
6.3V
2 X5R-CERM
01005
PA_R1
C4204
0.1UF
20%
6.3V
2 X5R
0201-1
CELL
10%
6.3V
2 CERM-X5R
0201
1
C4205
CELL
1
56PF
5%
2 16V
NP0-C0G
01005
IN
29 68
IN
29 34 35 37 38 68
IN
29 34 35 37 38 68
CELL
C4214
1
56PF
C4206
56PF
5%
2 16V
NP0-C0G
01005
CELL
5%
2 16V
NP0-C0G
01005
C4207
1.0PF
1
2
68
68
+/-0.1PF
16V
NP0-C0G
01005
1
VMODE 24
CELL
L4200
CELL
11 RX_B7
10 GND
C4209
C4200
8.2NH-3%-140MA
8.2NH-3%-140MA
01005
01005
CPL_IN 4
CPL_OUT 20
AFEM-790720
LGA
CRITICAL
12 RX_P_B20
13 RX_N_B20
1
CRITICAL
CELL
8.2NH+/-3%-0.25A-0.7OHM
1
68
50_B20_DPLX_ANT
2
50_B20_ANT
GND
40 68
C
CELL
1
ANT_B20 16
ANT_B7 8
C4208
4.7PF
+/-0.1PF
2 25V
COG-CERM
0201
THRM_PAD
CRITICAL
CRITICAL
1
3
5
6
7
9
14
15
17
18
19
21
CRITICAL
BI
0201
CRITICAL
31
32
33
34
35
36
37
38
39
40
41
42
C
50_B20_TX_PAD_IN 26 RFIN_B20
50_B7_TX_PAD_IN
28 RFIN_B7
27
50_B20_TX_SAW_OUT
22
23
IN
U4200
2
CRITICAL
CELL
3.0PF
68 33
VEN_B7_B20 30
BS 29
CELL
C4201
VCC 2
VBATT 25
1
+/-0.1PF
16V
NP0-C0G
01005
2
2
CRITICAL
L4204
3.0NH+/-0.1NH-0.45A
68
50_B7_DPLX_ANT
1
2
50_B7_ANT
BI
40 68
0201
50_B7_DUPLX_RX
CELL
CRITICAL
OUT
32 68
1
OUT
33 68
+/-0.05PF
25V
2 C0G-CERM
0201
OUT
33 68
FL4200
100_B20_DUPLX_RX_N
SAW-BAND7-TX
SAFFB2G53KA0F57
CRITICAL
R4202
LGA
C4210
0.8PF
68 30
IN
1
50_XCVR_B7_TX
2
68
50_B7_TX_SAW_IN 1 UNB_PORT1
UNB_PORT2 4
68
50_B7_TX_SAW_OUT
GND
+/-0.05PF
16V
C0G-CERM
01005
1
2
3
5
1
L4205
1
A
L4201
L4202
2.2NH+/-0.1NH-200MA
3.3NH+/-0.1NH-180MA
01005
01005
NOSTUFF
CELL
CRITICAL
0.3PF
1
CELL
+/-0.1PF
2 25V
C0G
201
CELL
L4203
3.3NH+/-0.1NH-180MA
01005
01005
CRITICAL
B
2
2
7
6
1.0PF
1
CELL
CRITICAL
BAND
PA POWER MODE
PA_ON_B20
PA_R1
=====================================================
POWER DOWN
LPM
0
0
STANDBY
X
0
X
B20
HPM
1
0
B20
LPM
1
1
8
C4212
CELL
CELL
CRITICAL
2
C4211
2
2.4NH+/-0.1NH-200MA
CRITICAL
2
1
+/-0.1PF
16V
NP0-C0G
01005
CELL
B
100_B20_DUPLX_RX_P
2.0PF
CELL
5
4
3
8
7
6
5
4
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1
Copyright(C)22006-2009 Foxit Corporation
3
BAND 5/8 PAD
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
D
D
68 40 39 38 36 35 34
IN
62 40 39 38 36 35 34 26 25
IN
PP_PA
=PPBATT_VCC_BB
CELL
1
C4306
0.1UF
20%
6.3V
2 X5R-CERM
01005
PA_ON_B5_B8
CELL
CELL
1
1
C4307
1000PF
10%
2 6.3V
X5R-CERM
01005
PA_BS
CELL
1
C4308
1.0UF
C4309
PA_R1
27PF
20%
6.3V
2 X5R
0201-1
CELL
5%
25V
2 NP0-C0G
0201
1
CELL
C4310
1
56PF
5%
16V
2 NP0-C0G
01005
C4311
56PF
5%
16V
2 NP0-C0G
01005
CELL
1
IN
29 68
IN
29 34 35 36 38 68
IN
29 34 35 36 38 68
C4312
56PF
5%
2 16V
NP0-C0G
01005
CELL
1
+/-0.05PF
16V
2 NP0-C0G
01005
CRITICAL
CELL
C4304
4.3NH-3%-180MA
50_B8_TX_SAW_OUT
68 33
IN
1
2
01005
CRITICAL
1
C4303
1.2PF
+/-0.1PF
16V
2 NP0-C0G
01005
NOSTUFF
CELL
1
68
68
U4300
50_B5_TX_PAD_IN 26 RFIN_B5
50_B8_TX_PAD_IN 28 RFIN_B8
13
14
RX_P_B5
RX_N_B5
11
10
RX_P_B8
RX_N_B8
6.2NH-3%-140MA
CPL_IN 4
CPL_OUT 20
SKY77493
LGA
NC
NC
68
0.7PF
2
50_B5_ANT
CRITICAL
C
40 68
CELL
1
ANT_B5 16
ANT_B8 8
GND
C4315
4.8PF
+/-0.1PF
16V
2 NP0-C0G
01005
CRITICAL
THRM_PAD
CRITICAL
CELL
CELL
L4301
R4302
5.1NH-3%-0.35A
68
100_B8_DUPLX_RX_N
OUT
100_B8_DUPLX_RX_P
OUT
CELL
1
100_B5_B18_DUPLX_RX_P
1
2
68
50_B8_ANT_PHASESHIFT
0201
32 68
OUT
OUT
50_B8_DPLX_ANT
32 68
100_B5_B18_DUPLX_RX_N
CRITICAL
1
C4314
2.0PF
32 68
32 68
C4316
27PF
+/-0.1PF
25V
2 C0G-CERM
0201
1
0
50_B8_ANT
2
5%
1/20W
MF
201
BI
40 68
1
R4303
CRITICAL
0
5%
1/20W
MF
2 201
5%
25V
2 NP0-C0G
0201
NOSTUFF
NOSTUFF
CRITICAL
B
B
A
BI
01005
CRITICAL
C4305
+/-0.05PF
16V
2 NP0-C0G
01005
1
50_B5_DPLX_ANT
31
32
33
34
35
36
37
38
39
40
41
42
NOSTUFF
CELL
R4300
CELL
0.7PF
+/-0.1PF
16V
2 NP0-C0G
01005
C
C4302
1
3
5
6
7
9
12
15
17
18
19
21
1.2PF
27
CRITICAL
C4300
VMODE 30
2
01005
1
VCC 2
VBATT 29
1
IN
22
23
50_B5_TX_SAW_OUT
68 33
VEN_B5_B8 24
BS 25
CELL
C4301
4.3NH-3%-180MA
BAND
PA POWER MODE
PA_BS
PA_ON_B5_B8
PA_R1
============================================================
POWER DOWN
X
0
0
0
STANDBY
X
X
0
X
B5
HPM
0
1
0
B5
LPM
0
1
1
B8
HPM
1
1
0
B8
LPM
1
1
1
8
7
6
5
4
3
8
7
6
5
4
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1
Copyright(C)22006-2009 Foxit Corporation
3
BAND 13/17 PAD
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
D
D
PA_ON_B13_B17
68 40 39 37 36 35 34
IN
62 40 39 37 36 35 34 26 25
IN
PP_PA
PA_BS
=PPBATT_VCC_BB
PA_R1
CELL
1
C4404
0.1UF
20%
6.3V
2 X5R-CERM
01005
CELL
1
CELL
C4405
1000PF
10%
6.3V
2 X5R-CERM
01005
1
27PF
1.0UF
C4401
1.5PF
+/-0.1PF
16V
2 NP0-C0G
01005
CELL
CELL
C4402
6.2NH-3%-140MA
68
50_B13_TX_PAD_IN 26 RFIN_B13
50_B17_TX_PAD_IN 28 RFIN_B17
29 34 35 36 37 68
CELL
1
C4412
56PF
C4414
56PF
5%
16V
2 NP0-C0G
01005
5%
16V
2 NP0-C0G
01005
CELL
CRITICAL
01005
VMODE 24
CPL_IN 4
CPL_OUT 20
CELL
CRITICAL
L4400
R4402
50_B13_DPLX_ANT
1
CELL
1
CELL
CRITICAL
CELL
CRITICAL
2.2PF
68
LGA
GND
2
0201
U4400
13 RX_P_B13
14 RX_N_B13
11 RX_P_B17
10 RX_N_B17
2
1
SKY77494
2
68
50_B13_LPF_IN
CELL
+/-0.05PF
25V
C0G-CERM
0201
C4408
2.0PF
ANT_B13 16
ANT_B17 8
1
0
CELL
CRITICAL
3.3NH+/-0.1NH-180MA
100_B13_DUPLX_RX_N
100_B13_DUPLX_RX_P
68
33 68
50_B17_DPLX_ANT
1
2
33 68
OUT
33 68
OUT
R4403
2.0PF
+/-0.1PF
25V
2 C0G-CERM
0201
C
R4400
68
50_B17_ANT_PHASESHIFT
01005
OUT
40 68
CELL
CRITICAL
L4401
100_B17_DUPLX_RX_P
BI
NOSTUFF
CELL
OUT
1
CRITICAL
+/-0.1PF
16V
2 NP0-C0G
01005
100_B17_DUPLX_RX_N
50_B13_ANT
2
5%
1/20W
MF
201
31
32
33
34
35
36
37
38
39
40
41
42
2.0PF
23
27
C4403
1
+/-0.1PF
25V
2 C0G-CERM
0201
CRITICAL
1
C4410
2.0PF
+/-0.1PF
25V
2 C0G-CERM
0201
THRM_PAD
21
IN
68
1
2
3
5
6
7
9
12
15
17
18
19
C
68 33
VEN_B13_B17 30
BS 29
1
VCC 22
VBATT 25
2
01005
1
29 34 35 36 37 68
IN
4.7NH-3%-0.35A
1
50_B17_TX_SAW_OUT
5%
16V
2 NP0-C0G
01005
CELL
1
29 68
IN
L4402
CELL
50_B13_TX_SAW_OUT
C4413
56PF
5%
16V
2 NP0-C0G
01005
20%
6.3V
2 X5R
0201-1
C4400
IN
1
C4407
5.1NH-3%-0.16A
68 33
CELL
CELL
1
C4406
IN
1
1
C4409
0.00 2
0%
1/32W
MF
01005
56PF
1.0PF
50_B17_ANT
BI
40 68
1
R4401
0.00
0%
1/32W
MF
2 01005
5%
16V
2 NP0-C0G
01005
+/-0.1PF
2 16V
NP0-C0G
01005
33 68
C4411
1
NOSTUFF
NOSTUFF
CRITICAL
CELL
B
B
A
BAND
PA POWER MODE
PA_BS
PA_ON_B13_B17
PA_R1
============================================================
POWER DOWN
X
0
0
0
STANDBY
X
X
0
X
B17
HPM
0
1
0
B17
LPM
0
1
1
B13
HPM
1
1
0
B13
LPM
1
1
1
8
7
6
5
4
3
2
1
8
7
6
5
4
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1
Copyright(C)22006-2009 Foxit Corporation
3
PA DC/DC CONVERTER
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
D
D
STAR ROUTE INTO IN1 AND IN2
=PPBATT_VCC_BB
C
CELL
1
CELL
C4502
1
56PF
10%
6.3V
2 X5R
01005
PLACE NEAR U4500.A2
CELL
CELL
IN
BB_PDM
1
1.00K
1%
1/32W
MF
01005
2
BB_PDM_FILT
CELL
1
C4500
6800PF
10%
6.3V
2 X5R
01005
1
1.00K
1%
1/32W
MF
01005
2
68
CELL
1
C4501
4700PF
10%
6.3V
2 X5R
01005
29
IN
68 29
IN
1
CELL
10UF
1
20%
2 10V
X5R-CERM
0402-1
DCDC_ADJ
A2 REFIN
DCDC_EN
B1 EN
DCDC_MODE
C1 MODE
10%
6.3V
2 X5R
01005
1.0UF
DCDC_PGND
C4506
0.01UF
C4505
20%
6.3V
2 X5R
0201-1
DCDC_PGND
R4501
68
C
CELL
C4504
CELL
U4500
39
CELL
OUT C3
L4500
2.2UH-20%-1.5A-0.160OHM
MAX77100
WLP
CRITICAL
LX B3
DCDC_OUT
1
PP_PA
2
OUT
34 35 36 37 38 40 68
MAKK2016-SM
A1 AGND
R4500
68 29
CELL
1
IN1 B2
39
PLACE NEAR U3400.H3
C4503
0.01UF
5%
2 16V
NP0-C0G
01005
IN2 C2
IN
A3 PGND
62 40 38 37 36 35 34 26 25
CRITICAL
CELL
1
C4507
10%
2 6.3V
X5R-CERM
01005
20%
6.3V
2 X5R
402
SHORT-10L-0.25MM-SM
2
DCDC_PGND 1
NOSTUFF
XW4502
DCDC_PGND
C4508
1000PF
4.7UF
XW4501
39
CELL
1
39
SHORT-10L-0.25MM-SM
1
2
NOSTUFF
B
B
A
8
7
6
5
4
3
8
7
6
5
4
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1
Copyright(C)22006-2009 Foxit Corporation
3
2G FEM
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
D
2G FEM
D
68 41 33 26
IN
68 39 38 37 36 35 34
IN
PP_LDO14_2V65
PP_PA
CELL
FL4600
70-OHM-300MA
1
IN
CELL
1
2
68
PP_BATT_VCC_2G_FEM
01005-1
CELL
C4600
1
C4601
56PF
0.1UF
5%
16V
2 NP0-C0G
01005
20%
6.3V
2 X5R-CERM
01005
CELL
1
C4602
10UF
20%
10V
2 X5R-CERM
0402-1
CELL
1
C4603
0.1UF
20%
6.3V
2 X5R-CERM
01005
CELL
1
CELL
C4604
1
0.01UF
C4605
0.1UF
10%
6.3V
2 X5R
01005
20%
6.3V
2 X5R-CERM
01005
CELL
1
1
0.01UF
10%
6.3V
2 X5R
01005
2G_FEM_S6
2G_FEM_S5
2G_FEM_S4
2G_FEM_S3
2G_FEM_S2
2G_FEM_S1
2G_FEM_S0
CELL
C4606
C4607
56PF
5%
16V
2 NP0-C0G
01005
CELL
CELL
C4610
56PF
1.5PF
+/-0.1PF
16V
2 NP0-C0G
01005
5%
16V
NP0-C0G
01005
68 34
BI
68 37
BI
68 37
BI
68 35
BI
NOSTUFF
68 35
BI
68 36
BI
68 38
BI
68 38
BI
50_B1_B4_ANT
50_B8_ANT
50_B5_ANT
50_B2_ANT
50_B3_ANT
50_B20_ANT
50_B17_ANT
50_B13_ANT
32 LB_RFIN
36 HB_RFIN
25 TRX1
24 TRX2
23 TRX3
22 TRX4
21 TRX5
2
4
3
56PF
5%
2 16V
NP0-C0G
01005
C4615
56PF
5%
2 16V
NP0-C0G
01005
1
C4616
56PF
5%
16V
2 NP0-C0G
01005
CELL
1
CELL
C4617
56PF
1
NC_0
T2
CELL
29 33 68
IN
25 29 68
IN
C4618
5%
2 16V
NP0-C0G
01005
1
29 68
C4619
13
19 50_B7_ANT
BI
36 68
FL4630
SKY77575
FIL-COUPLER+LPF-BROADBAND
LGA
CRITICAL
LDJ21832M22HC036
11 TRX6
10 TRX7
9 TRX8
ANT1
15
NC_1
17
68
0805-6SM
50_PRI_ANT_ASM
3
IN
4
COUPLE OUT
OUT
6
TERMINATE
1
CELL MAIN
CRITICAL
50_PRI_ANT_COAX
L4630
49.9
41
42
40
39
35
37
31
33
30
26
28
20
16
18
14
43 68
1
1 CELL
R4620
56NH-100MA-3.9OHM
1%
1/32W
MF
2 01005
THRM_PAD
BI
COUPLER_TERM
GND
8 TRX9
7 TRX10
12
C
56PF
5%
2 16V
NP0-C0G
01005
U4600
GND
0201
2
B
68 30
A
29 33 68
IN
CELL
56PF
5%
16V
2 NP0-C0G
01005
25 29 68
IN
1
38
S1
S0
50_2G_LB_PA_IN
50_2G_HB_PA_IN
C4614
1
CELL
29 68
IN
2
C4611
68
48
1
68
2
46
47
50_XCVR_2G_HB_TX_MATCH1
44
45
0%
1/32W
MF
01005
68
43
IN
56PF
S2
CELL
C4612
VBATT
68 30
0.00 2
1
50_XCVR_2G_HB_TX
S4
S3
NOSTUFF
CELL
R4601
5
5%
16V
NP0-C0G
01005
6
1.5PF
+/-0.1PF
16V
2 NP0-C0G
01005
5%
2 16V
NP0-C0G
01005
S6
S5
C4609
56PF
2
27
1
C4613
1
CELL
29 68
IN
49
50
1
34
50_XCVR_2G_LB_TX
VDD_SWITCH
IN
29
68 30
VCC
C
1
CELL
IN
5
=PPBATT_VCC_BB
62 39 38 37 36 35 34 26 25
OUT
50_PDET_PAD_IN
B
8
7
6
5
4
Edited by Foxit Reader ActiveX For Evaluation Only.
1
Copyright(C)22006-2009 Foxit Corporation
3
RX DIVERSITY
D
D
DRX_ASM_V1
DRX_ASM_V2
DRX_ASM_V3
DRX_ASM_V4
CRITICAL
CELL
68 40 33 26
IN
1
PP_LDO14_2V65 100PF BYPASS INCLUDED IN MODULE
C4701
12PF
C
1
C4702
12PF
1
C4703
12PF
5%
16V
2 CER
01005
29 68
IN
29 68
IN
29 68
CELL
CRITICAL
1
C4704
12PF
5%
16V
2 CER
01005
5
6
7
8
5%
16V
2 CER
01005
CRITICAL
CELL
29 68
IN
V1
V2
V3
V4
VDD 4
5%
16V
2 CER
01005
CRITICAL
CELL
IN
C
U4700
HFQSWKFUA-227
LGA
L4700
68 43
IN
50_DRX_ANT_TEST
1
0
2
68
5%
1/20W
MF
201
50_DIVERSITY_SWITCH_MATCH
CELL
CRITICAL
1 ANT
NOSTUFF
1
C4700
1.0PF
68 42
IN
50_GPS_LNA_OUT
10
GPS/GNSS OUT_P 13
GPS/GNSS OUT_N 14
BAND7 OUT_P 16
BAND7 OUT_N 17
GPS/GNSS IN
+/-0.1PF
25V
2 C0G
201
B5/18/13/17 OUT_P 20
B5/18/13/17 OUT_N 21
CRITICAL
B8/20 OUT_P 22
B8/20 OUT_N 23
B1/4/25/3 OUT_P 18
B1/4/25/3 OUT_N 19
B
NEED TO UPDATE
BAND
DRX_ASM_V4 DRX_ASM_V3 DRX_ASM_V2 DRX_ASM_V1
B1/B4
LOW
LOW
LOW
LOW
B2/25
LOW
HIGH
LOW
LOW
B3
HIGH
LOW
LOW
LOW
B5/6/18
LOW
LOW
HIGH
LOW
B8
LOW
LOW
LOW
HIGH
B13/17
LOW
HIGH
HIGH
HIGH
B20
LOW
HIGH
HIGH
LOW
OFF
LOW
LOW
HIGH
HIGH
SWITCH IS TERMINATED IN ALL OTHER POSSIBLE STATES
A
8
7
6
OUT
30 68
OUT
30 68
100_XCVR_B1_B4_DRX_P
100_XCVR_B1_B4_DRX_N
OUT
30 68
OUT
30 68
100_XCVR_B5_B18_B13_B17_DRX_P
100_XCVR_B5_B18_B13_B17_DRX_N
OUT
30 68
OUT
30 68
100_XCVR_B8_B20_DRX_P
100_XCVR_B8_B20_DRX_N
OUT
30 68
OUT
30 68
100_XCVR_B2_B25_B3_DRX_P
100_XCVR_B2_B25_B3_DRX_N
OUT
30 68
OUT
30 68
B7 DIFF PAIR NET NAME TO BE UPDATED
THRM
PAD
31
32
33
34
35
36
2
3
9
11
12
15
24
25
26
27
28
29
30
GND
100_XCVR_GPS_RX_N
100_XCVR_GPS_RX_P
B
8
7
6
5
4
Edited by Foxit Reader ActiveX For Evaluation Only.
1
Copyright(C)22006-2009 Foxit Corporation
3
GPS
D
D
CKPLUS_WAIVE=TERMSHORTED
BYPASSING INCLUDED IN MODULE
NOSTUFF
R4802
1
0
L4801
150OHM-25%-200MA-0.7DCR
2
VCC_GPS_LNA_2V5_INPUT
5%
1/10W
MF-LF
603
GPS_ANT
MS-180
5%
2 16V
NP0-C0G
01005
G
F-ST-SM
50_GPS_ANT_COAX
B
G
G
A
C
G
C
3
2
1
4
U4800
SKY65736
68
50_GPS_LNA_IN
8 RFIN
LGA
CRITICAL
RFOUT 4
50_GPS_LNA_OUT
OUT
41 68
4
GND
1
2
3
5
7
9
10
11
12
THRM_PAD
BOTTOM MOUNT
13
3
2
26 68
27PF
VCC
J4800
MM5829-2700
68
IN
C4803
J4802
1
F-ST-SM
1
PP_LDO5_GPS_LNA_2V5
2
01005
6
C
1
TOP MOUNT
B
B
A
8
7
6
5
4
3
2
1
8
7
6
5
4
Edited by Foxit Reader ActiveX For Evaluation Only.
1
Copyright(C)22006-2009 Foxit Corporation
3
ANTENNA FEEDS
D
D
DRX_ANT COAX
CRITICAL
J4900
FL4900
MM5829-2700
R4901
LFE21832MHC1D765
F-ST-SM
0805-SM
68
1
50_DRX_ANT_FEED
1
3
68
50_DRX_ANT_PHASESHIFT
1
3
4
2
0
50_DRX_ANT_TEST
2
OUT
5%
1/20W
MF
201
GND
2
1
C4900
1
R4900
0.00
0.00
0%
1/32W
MF
2 01005
0%
1/32W
MF
2 01005
C
41 68
C
NOSTUFF
NOSTUFF
PRI_ANT COAX
J4910
MM5829-2700
F-ST-SM
50_PRI_ANT_COAX
BI
40 68
4
3
2
1
B
B
A
8
7
6
5
4
3
8
7
6
5
4
Edited by Foxit Reader ActiveX For Evaluation Only.
1
Copyright(C)22006-2009 Foxit Corporation
3
D
D
SIM CARD FLEX CONN
L5100
80-OHM-25%-500MA
68 60 28
PP_LDO6_RUIM_1V8
26
1
2
68
PP_LDO6_RUIM_1V8_FILT
0201
C5101
1
1
1.0UF
20%
6.3V 2
X5R
0201-1
C5100
1
12V-33PF
01005-1
2
R5100
15.00K
1%
1/32W
MF
2 01005
APN: 518S0692
FL5120
CRITICAL
150OHM-25%-200MA-0.7DCR
60 29
IN
SIMCRD_RST_CONN
1
J5100
2
FF18-6A-R11AD-B-3H
01005
F-RT-SM
FL5121
1
150OHM-25%-200MA-0.7DCR
C
60 29
IN
SIMCRD_CLK_CONN
1
SIMCRD_RST_CONN_FILT
SIMCRD_CLK_CONN_FILT
44 SIMCRD_IO_CONN_FILT
44 SIM_TRAY_DETECT_FILT
2
01005
44
2
44
3
5
FL5122
6
150OHM-25%-200MA-0.7DCR
60 29
BI
SIMCRD_IO_CONN
1
C
4
1
2
C5102
100PF
5%
2 6.3V
CERM
01005
01005
FL5123
150OHM-25%-200MA-0.7DCR
60 29
OUT
SIM_TRAY_DETECT
1
2
01005
SIM CARD ESD PROTECTION
U5100
ESDAVLC5-4BX4-TPD4E101DPWR
LGA-COMBO
44
B
SIMCRD_IO_CONN_FILT
1
4
SIM_TRAY_DETECT_FILT
44
B
5 GND
TABLE_ALT_HEAD
44
SIMCRD_RST_CONN_FILT
2
3
SIMCRD_CLK_CONN_FILT
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
377S0130
377S0159
?
7
6
5
COMMENTS:
TABLE_ALT_ITEM
U5100
A
8
REF DES
44
4
3
RDAR://PROBLEM/12840016
8
7
6
5
4
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1
Copyright(C)22006-2009 Foxit Corporation
3
PROX SENSOR
D
62 45
D
VDRIVE FOR: I2C AND GPIO
=PP1V8_PROX_AD7149
C5604
C5605
1
0.1UF
1
68PF
20%
6.3V
X5R-CERM 2
01005
5%
6.3V
NP0-C0G 2
01005
L5600
120-OHM-25%-250MA-0.5DCR
62
=PP3V0_PROX_AD7149
2
1
67 60
PP3V0_SENSOR_PROX_AD7149_FILT
1.8 MA MAX
01005
C5600
1
2.2UF
10%
6.3V 2
X5R
402
68PF
5%
6.3V
NP0-C0G 2
01005
20%
6.3V
X5R-CERM 2
01005
I2C ADDRESS: 0101100+R/W
READ: 0X59, WRITE: 0X58
APN: 516S0872
FLEX: 516S0865
=PP1V8_PROX_AD7149
C2
62 45
C5606
0.1UF
1
D2
C
C5601
1
R56001
2.2K
5%
1/32W
MF
01005 2
SDA
=I2C3_PROX_AD7149_SCL_1V8
C1
SCLK
IN
OUT
=GPIO_AD7149_PROX2SOC_IRQ_L
61
PROX_AD7149_GPIO
B1
ADD1
A1
INT*
A2
GPIO
B2
TP
INT* IS OPEN DRAIN PU RAIL MATCH VDRIVE
0.1UF
10%
16V
X5R-CERM 2
0201
PROX GPIO WILL NOT BE USED.
THEREFORE,PROX GPIO IS NOT
CONNECTED TO MLB INTERCONNECT.
C5607
1
27PF
5%
25V
NP0-C0G 2
0201
100K
5%
1/32W
MF
01005 2
E4
C5602
1
CRITICAL
ACSHIELD
NC
R56011
INT IS 1.8V LEVEL.
ADD0
353S2964
CIN0
CIN1
CIN2
CIN3
CIN4
CIN5
CIN6
CIN7
CIN8
CIN9
CIN10
CIN11
CIN12
D3
A3
B3
A4
C3
A5
B4
B5
C4
C5
D4
D5
E5
CRITICAL
CRITICAL
L5604
2
61
1
68NH-2%-320MA-1.0OHM
PROX_AD7149_CIN7_FILT
2
1
0402
0402
61
PROX_AD7149_CIN5
61
PROX_AD7149_CIN7
CRITICAL
61
PROX_AD7149_CIN9
0.1UF
1
10%
16V
X5R-CERM 2
0201
C5603
0.5PF
61
1
7
2
1
4
3
6
5
10
9
NC_J2800_1
NC_J2800_3
NC_J2800_5
61
PROX_AD7149_CIN9_FILT
PCB: ACSHIELD NEEDS TO BE
A PLANE UNDER PROX_CIN NETS
AND ALSO TIE TO CONNECTOR.
0.5 PF
JUST IN CASE
NEED EXTERNAL
REF CAP TO MEASURE
L5608
220NH-2%-0.16A-3.1OHM
ACSHIELD_SB
2
B
CRITICAL
CRITICAL
1
61
ACSH_SB
L5607
68NH-2%-320MA-1.0OHM
2
0402
1
0402
PCB: ENSURE ACSHIELD PLANE UNDER
U3200, NO GND PLANE NEAR PROX_CIN NETS..
A
7
6
5
NO_TEST=TRUE
CIN7 DUMMY
CIN9 SENSOR ELECTRODE
1
CHOSE CIN NUMBERS FOR LAYOUT EASE
8
NO_TEST=TRUE
0402
B
61
NO_TEST=TRUE
L5601
2
1
+/-0.05PF
25V
COG-CERM 2
0201
61
PROX_AD7149_ACSHIELD_CONN
PROX_AD7149_CIN7_CONN
PROX_AD7149_CIN9_CONN
68NH-2%-320MA-1.0OHM
0402
C5610
61
CRITICAL
L5602
220NH-2%-0.16A-3.1OHM
2
8
L5603
220NH-2%-0.16A-3.1OHM
PROX_AD7149_CIN_UNUSED
E2
E1
BI
F-ST-SM
WLCSP
BIAS
=I2C3_PROX_AD7149_SDA_1V8
D1
13
503548-0620
GND
PROX_AD7149_BIAS E3
VDRIVE RAIL
13
13
J5600
U5600
AD7149
61
C
CRITICAL
VCC VDRIVE
4
3
2
.
1
8
7
6
5
4
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1
Copyright(C)22006-2009 Foxit Corporation
3
WIFI/BT: MODULE
D
MODULE ISOLATION
D
XW5890
61 57
IN
PMU_GPIO_WLAN_REG_ON
SHORT-10L-0.25MM-SM
1
2
PMU_GPIO_BT_REG_ON
SHORT-10L-0.25MM-SM
1
2
PMU_GPIO_WLAN_REG_ON_R
46 60
=PPVCC_MAIN_WLAN
62
XW5891
=PP3V3_S2R_WIFI_PA
1
PMU_GPIO_BT_REG_ON_R
46 60
IN
29 25
OUT
PMU_GPIO_CLK_32K_WLAN
1
10UF
SHORT-10L-0.25MM-SM
1
2
PMU_GPIO_CLK_32K_WLAN_R
C5881
10UF
20%
2 6.3V
CERM-X5R
0402-2
XW5892
64 57
C5880
20%
2 6.3V
CERM-X5R
0402-2
1
10UF
SHORT-10L-0.25MM-SM
1
2
46 60
UART_WLAN2BB_LTE_COEX_R
46 61
60 46
33
PMU_GPIO_CLK_32K_WLAN_R
CLK_32K
XW5894
29 25
UART_BB2WLAN_LTE_COEX
IN
SHORT-10L-0.25MM-SM
1
2
UART_BB2WLAN_LTE_COEX_R
46 61
UART2_WLAN2SOC_TX_R
46 61 64
OUT
SHORT-10L-0.25MM-SM
1
2
UART2_WLAN2SOC_TX
60 46
60 46
XW5896
C
64 5
61
SHORT-10L-0.25MM-SM
1
2
UART2_SOC2WLAN_TX
IN
UART2_SOC2WLAN_TX_R
46 61 64
C5801
4.7UF
4.7UF
20%
6.3V
2 X5R-CERM1
402
20%
6.3V
2 X5R-CERM1
402
51
50
55
56
UART_WLAN2BB_LTE_COEX_R
UART_BB2WLAN_LTE_COEX_R
PMU_GPIO_BT_HOST_WAKE
GPIO_BT_WAKE
BT_UART_RXD
BT_UART_TXD
BT_UART_RTS*
BT_UART_CTS*
37
38
36
39
UART1_SOC2BT_TX
UART1_BT2SOC_TX
UART1_BT2SOC_RTS_L
UART1_SOC2BT_RTS_L
BT_PCM_CLK
BT_PCM_SYNC
BT_PCM_OUT
BT_PCM_IN
41
42
43
44
I2S4_SOC2BT_BCLK
I2S4_SOC2BT_LRCK
I2S4_BT2SOC_DATA
I2S4_SOC2BT_DATA
BT_GPIO5/LTE_COEX_UART_TX
BT_GPIO4/LTE_COEX_UART_RX
BT_GPIO1/HOSTWAKE
BT_GPIO0/BTWAKE
4
PMU_GPIO_WLAN_REG_ON_R
3
PMU_GPIO_BT_REG_ON_R
46 61
46 61
OUT
57
IN
5 61
23
JTAG_WLAN_SEL
U5800
WL_REG_ON
WIFI-BT-DOPPELBOCK
BT_REG_ON
LGA
JTAG_SEL
1
R5800
IN
5 64
OUT
5 64
OUT
5 64
IN
5 64
IN
5 64
IN
5 64
C
10K
HSIC1_SOC2WLAN_HOST_RDY
IN
SHORT-10L-0.25MM-SM
1
2
HSIC1_SOC2WLAN_HOST_RDY_R
46 61 64
BI
64 61 4
BI
13
14
HSIC1_WLAN_DATA
HSIC1_WLAN_STB
7
NC
6
NC
8
NC
9
NC
10
NC
11
NC
CRITICAL
U5811
BAW-2436MHZ
CRITICAL
R5811
69 RF_G_0_DIPLEXER
1
0.00 2
SM
69
RF_G_0_BAW_ANT
4
1%
1/20W
MF
0201
LOW(2.4GHZ) 3
HIGH(5.0GHZ) 1
69
1 RF_G_0_BAW_MOD 1
IN
OUT
1
L5811
NC
2
69
RF_G_0_MATCH_MOD
CRITICAL
1
CRITICAL
C5810
0.5PF
L5810
10NH-3%-250MA
8.2NH+/-3%-0.25A-0.7OHM
0201
0201
+/-0.05PF
25V
2 CERM
201
2
4
6
GND
2
2
CRITICAL
C5814
1.0NH+/-0.1NH-0.75A
CRITICAL
69
J5810
CRITICAL
MM4829-2702
69 RF_0_ANT
3
4
2
1
1
NOSTUFF
0.00 2
1%
1/20W
MF
0201
C5817
0.2PF
+/-0.1PF
25V
2 COG-CERM
201
1
2
1
69
0201
C5815
RF_A_0_MATCH
CRITICAL
1
0.2PF
69 RF_0_ANT_MATCH_T
C5816
C5813
0.2PF
+/-0.1PF
25V
2 COG-CERM
201
NOSTUFF
GPIO0/WL_HOST_WAKE
GPIO1/HOST_READY
GPIO2/WL_TCK
GPIO3/WL_TMS
GPIO4/WL_TDI
GPIO5/WL_TDO
GPIO12/WL_TRST*
GPIO9/AGG_CHANNEL
GPIO10/HSIC_DEVICE_READY
GPIO11/HSIC_RESUME
GPIO15/WLAN_UART_TX
GPIO14/WLAN_UART_RX
GPIO6
GPIO7
GPIO8
RF_SW_CTRL11
+/-0.05PF
25V
2 COG-CERM
0201
I2SWS
NC
46 I2SDO
NC
48 I2SDI
NC
49 I2SCLK
NC
67
79
RF_A_0
RF_A_1
62
74
RF_G_0
RF_G_1
22
20
27
28
26
24
25
19
1
2
52
53
30
29
31
PMU_GPIO_WLAN_HOST_WAKE
HSIC1_SOC2WLAN_HOST_RDY_R
TP_JTAG_WLAN_TCK
61 64
64
61 JTAG_WLAN_TMS_TX_BLANK
64
61 JTAG_WLAN_TDI_OSCAR_A
64
61 JTAG_WLAN_TDO_OSCAR_B
TP_JTAG_WLAN_TRST_L 61 64
5 64
IN
5 64
1
WLAN_TX_BLANK
0.00 2 OSCAR2RADIO_CONTEXT_A
IN
R5802
OUT
5 61 64
OUT
5 61 64
0.00 2 OSCAR2RADIO_CONTEXT_B
IN
46 61 64
46 61 64
=PP1V8_S2R_VDDIO_WLAN_BT
NC
NOSTUFF
3
4
1
C5827
0.2PF
+/-0.1PF
25V
2 COG-CERM
201
1
0.00 2
1
R5803
NC
10K
=PP1V8_S2R_VDDIO_WLAN_BT
NC
46 62
5%
1/32W
MF
2 01005
B
SM
1%
1/20W
MF
0201
5 COM
69 RF_1_ANT_MATCH_T
CRITICAL
HI 1
NOSTUFF
1
C5821
LO 3
C5826
0.2PF
69
NOSTUFF
GND
+/-0.1PF
25V
2 COG-CERM
201
1
RF_G_1_DIPLEXER
1
0.00 2
69
RF_G_1_MATCH_MOD
CRITICAL
1%
1/20W
MF
0201
C5822
0.2PF
6
4
2
69 RF_1_ANT
+/-0.1PF
25V
2 COG-CERM
201
1
C5820
1.0PF
+/-0.05PF
25V
2 C0G-CERM
0201
CRITICAL
C5824
A
0.8NH-+/-0.1NH-0.8MA
69
1
RF_A_1_DIPLEXER
2
69
RF_A_1_MATCH
0201
NOSTUFF
CRITICAL
1
C5825
0.2PF
+/-0.05PF
25V
2 COG-CERM
0201
8
7
6
1
C5823
0.2PF
+/-0.05PF
25V
2 COG-CERM
0201
5
4
3
46 62
WLAN_GPIO7
U5820
1
19 29
0%
1/32W
MF
01005
DPX205850DT-9038A1SJ
R5820
F-ST-SM
19 29
0%
1/32W
MF
01005
+/-0.1PF
25V
2 COG-CERM
201
CRITICAL
29
R5801
1
CRITICAL
J5820
IN
0%
1/32W
MF
01005
1
HSIC1_WLAN2SOC_DEVICE_RDY
HSIC1_WLAN2SOC_REMOTE_WAKE
UART2_WLAN2SOC_TX_R
UART2_SOC2WLAN_TX_R
0.00 2
57
46 61 64
NC
VIO 35
DUMMY 57
OUT
OUT
R5804
0.2PF
CRITICAL
MM4829-2702
2
1
NOSTUFF
R5810
F-ST-SM
1
RF_A_0_DIPLEXER
77
SDIO_CLK
SDIO_CMD
SDIO_DATA0
SDIO_DATA1
SDIO_DATA2
SDIO_DATA3
47
0201
1
GND
CRITICAL
ANT(COMMON) 5
C5811
2.5NH+/-0.1NH-500MA
5
3
2
2.4-5.0GHZ
CRITICAL
885061
LGA
CRITICAL
U5810
HSIC_DATA
HSIC_STROBE
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
64 5
64 61 4
5
12
15
18
21
32
34
40
45
54
58
59
60
61
63
64
65
66
68
69
72
73
75
76
78
80
81
82
83
84
85
86
87
88
5%
1/32W
MF
2 01005
XW5897
B
C5800
1
CRITICAL
XW5895
64 5
1
20%
2 6.3V
CERM-X5R
0402-2
XW5893
UART_WLAN2BB_LTE_COEX
61 62
C5882
RF_VCC_FEM 70
RF_VCC_FEM 71
IN
VBAT 16
VBAT 17
61 57
2
1
8
7
6
5
4
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Copyright(C)22006-2009 Foxit Corporation
3
D
D
TABLE_ALT_HEAD
62
=PP3V0_S2R_TRISTAR
=PP3V3_ACC
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
377S0155
377S0104
?
62
REF DES
COMMENTS:
TABLE_ALT_ITEM
1
C6030
1.0UF
20%
2 6.3V
X5R
0201-1
C6035
0.22UF
20%
6.3V
2 X5R
0201
1
1
C6040
8.2PF
1
C6042
8.2PF
RDAR://PROBLEM/12840267
C6032
DZ6000,DZ6001,DZ6002,DZ6003,DZ6090
0.22UF
+/-0.5PF
16V
2 NP0-C0G-CERM
01005
+/-0.5PF
16V
2 NP0-C0G-CERM
01005
20%
6.3V
2 X5R
0201
C6031
0.22UF
20%
2 6.3V
X5R
0201
1
C6041
8.2PF
+/-0.5PF
16V
2 NP0-C0G-CERM
01005
CRITICAL
ACC_PWR D5
1
VDD_3V0 F4
=PP1V8_S2R_TRISTAR
VDD_1V8 F3
62
1
PPVBUS_PROT
1
1
C6043
8.2PF
1UF
+/-0.25PF
2 25V
NP0-C0G
0201
U6000
C6034
1
10%
2 25V
X5R
0402
L6030
90-OHM-50MA
55 60 67
TCM0605-1
SYM_VER-1
C6045
1
4
E75_DPAIR1_CONN_P
BI
49 60 64
2
3
E75_DPAIR1_CONN_N
BI
49 60 64
1UF
10%
25V
0402
2 X5R
CBTL1610A1UK
TO BB USB
C
65 15
BI
65 15
BI
64 25
BI
64 25
BI
57
ACCESSORY USB
ACCESSORY UART
AP DEBUG UART
BI
64 60 4
BI
64 5
IN
64 5
OUT
64 60 5
IN
64 60 5
OUT
64 29 25 5
IN
64 29 25 5
OUT
USB_BB_P
USB_BB_N
A1
B1
PMU_USB_BRICKID
C2
USB_SOC_P
USB_SOC_N
A3
B3
UART6_TS_ACC_TXD
UART6_TS_ACC_RXD
E2
E1
UART0_SOC_TXD
UART0_SOC_RXD
F2
F1
UART3_BB2SOC_TX
UART3_SOC2BB_TX
D2
D1
JTAG_SOC_TCK_R
JTAG_SOC_TMS_R
A5
B5
DIG_DP
OUT
JTAG_SOC_TCK
P_IN F6
ACC1 C5
ACC2 E5
DIG_DN
USB1_DP
USB1_DN
DP1 A2
DN1 B2
BRICK_ID
DP2 A4
DN2 B4
USB0_DP
USB0_DN
CON_DET_L E3
UART0_TX
UART0_RX POW_GATE_EN* D6
UART1_TX
UART1_RX
SWITCH_EN E4
HOST_RESET B6
UART2_TX
UART2_RX
SDA
SCL
INT
BYPASS
JTAG_CLK
JTAG_DIO
R6030
64 60 4
WLCSP
D3
D4
C6
E6
PPOUT_E75_ACC_ID1
PPOUT_E75_ACC_ID2
0.00 2
1
48 67
E75_DPAIR1_P
64 E75_DPAIR1_N
1
CRITICAL
2
DZ6000
CRITICAL
DZ6001
ESD0P2RF-02LS
ESD0P2RF-02LS
TSSLP-2-1
0.4PF
TSSLP-2-1
1
C
0.4PF
E75_DPAIR2_P
64 E75_DPAIR2_N
64
60
CRITICAL
TS_E75_ACC_DET_L
L6031
OVP_SW_EN_L
OUT
RESET_SOC_L
TS2PMU_RESET_IN
OUT
57 67
OUT
5 64
IN
5 64
OUT
5 57
IN
I2C2_SDA_1V8
I2C2_SCL_1V8
GPIO_TS2SOC2PMU_INT
BYPASS_U5900
90-OHM-50MA
55
TCM0605-1
SYM_VER-1
4 13 25 57 60 61 67
1
4
E75_DPAIR2_CONN_P
BI
49 60 64
2
3
E75_DPAIR2_CONN_N
BI
49 60 64
2
1
CRITICAL
2
DZ6002
ESD0P2RF-02LS
C6033
20%
6.3V
2 X5R
0201-1
DZ6003
TSSLP-2-1
0.4PF
1
CRITICAL
ESD0P2RF-02LS
TSSLP-2-1
1.0UF
F5
C1
A6
0%
1/32W
MF
01005
2
48 67
64
DVSS
DVSS
DVSS
BB DEBUG UART
(T’S OFF TO SOC UART3)
OUT
64 60 4
MIKEY_TS_P
MIKEY_TS_N
C3
C4
1
0.4PF
R6031
64 60 4
BI
JTAG_SOC_TMS
1
0.00 2
0%
1/32W
MF
01005
PPVCC_MAIN
TRISTAR 2:
AS OF 10/11/12 STILL PLAN TO STUFF CAP EVEN WITH TRISTAR2
RDAR://PROBLEM/12580126
B
NOSTUFF
1
R6091
100K
5%
1/32W
MF
2 01005
XW6000
15
OUT
L81_MBUS_REF
55 56 57 58 60 62 67
1
B
C6091
8.2PF
+/-0.5PF
2 16V
NP0-C0G-CERM
01005
SHORT-10L-0.25MM-SM
1
2
FL6090
120-OHM-25%-250MA-0.5DCR
R6090
PLACE_NEAR=U6000.F5:5MM
1
10K
2
E75_ACC_DET_R_L
1
2
01005
5%
1/32W
MF
01005
1
NOSTUFF
C6090
2
8.2PF
+/-0.5PF
16V
2 NP0-C0G-CERM
01005
K CRITICAL
D6090
SM-201
E75_ACC_DET_CONN_L
CRITICAL
IN
49 60
DZ6090
ESD0P2RF-02LS
TSSLP-2-1
1
DSF01S30SC
A
TRISTAR 2:
FOR PULSED CON_DET_L SUPPORT
NOSTUFF R6080, STUFF R6081
NOSTUFF
R6080
A
60 57
PMU_E75_ACC_DET_L
1
0.00 2
A
0%
1/32W
MF
01005
1
R6081
0.00
0%
1/32W
MF
2 01005
8
7
6
5
4
3
8
7
6
5
4
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1
Copyright(C)22006-2009 Foxit Corporation
3
L6100
FERR-22-OHM-1A-0.065-OHM
PPOUT_E75_ACC_ID1 1
2
0201
0.055 OHM DCR
PPOUT_E75_ACC_ID1_CONN
C
67 47
DZ6191
14.2V-6PF
D
0201-1
1
49 60 67
C6170
8.2PF
D
+/-0.5PF
2 16V
NP0-C0G-CERM
01005
A
TABLE_ALT_HEAD
L6101
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
377S0116
377S0108
DZ6160
RDAR:8370432
155S0320
155S0513
L6100,L6101
155S0741
155S0397
L6157
TABLE_ALT_ITEM
FERR-22-OHM-1A-0.065-OHM
TABLE_ALT_ITEM
PPOUT_E75_ACC_ID2 1
2
0201
0.055 OHM DCR
PPOUT_E75_ACC_ID2_CONN
C
67 47
49 60 67
RDAR://PROBLEM/9625601
TABLE_ALT_ITEM
DZ6192
14.2V-6PF
0201-1
1
C6171
RDAR://PROBLEM/11238851
8.2PF
+/-0.5PF
2 16V
NP0-C0G-CERM
01005
A
L6157
FERR-70-OHM-4A
62
1
=PPVBUS_USB_EMI
2
PPVBUS_E75_USB_CONN
49 60 67
0603
1
C6122
15PF
5%
16V
2 NP0-C0G-CERM
01005
C
2
1
R6190
DZ6160
27V-100PF
100K
0402
5%
1/20W
MF
2 201
1
C6183
0.01UF
10%
2 50V
X7R
402
1
C6172
15PF
5%
2 16V
NP0-C0G-CERM
01005
C
1
B
B
A
8
7
6
5
4
3
8
7
6
5
4
3
Edited by Foxit Reader ActiveX For Evaluation Only.
1
Copyright(C)22006-2009 Foxit Corporation
D
D
IO FLEX HOTBAR PADS
MLB 998-5877
FLEX 998-5876
OMIT
J6200
PCB-X110
HB-SM
1
2
3
4
C
5
65 60 17
IN
65 60 17
IN
65 60 17
IN
65 60 17
IN
65 60 18
IN
65 60 18
IN
65 60 18
IN
65 60 18
IN
6
SPKRAMP_R2_OUT_N
SPKRAMP_R1_OUT_N
SPKRAMP_R2_OUT_P
SPKRAMP_R1_OUT_P
SPKRAMP_L1_OUT_P
SPKRAMP_L2_OUT_P
SPKRAMP_L1_OUT_N
SPKRAMP_L2_OUT_N
7
8
E75_DPAIR1_CONN_N
E75_DPAIR1_CONN_P
BI
47 60 64
BI
47 60 64
C
9
10
11
12
E75_ACC_DET_CONN_L
OUT
47 60
13
14
15
16
PPOUT_E75_ACC_ID2_CONN
48 60 67
17
18
19
20
21
22
23
24
25
67 60 48
PPOUT_E75_ACC_ID1_CONN
26
E75_DPAIR2_CONN_P
E75_DPAIR2_CONN_N
BI
47 60 64
BI
47 60 64
27
28
29
30
31
67 60 49 48
PPVBUS_E75_USB_CONN
32
33
34
35
36
PPVBUS_E75_USB_CONN
48 49 60 67
37
38
39
40
41
42
43
44
45
46
47
B
PINOUT MATCHES IO_FLEX 4.2.0
B
3/12/13
A
8
7
6
5
4
3
8
7
6
5
4
3
HOME BUTTON FILTERS
Edited by Foxit Reader ActiveX For Evaluation Only.
1
Copyright(C)22006-2009 Foxit Corporation
D
D
FL6310
240-OHM-25%-0.20A-1.0DCR
60 57 5
OUT
GPIO_BTN_HOME_L
1
2
61
R6311
GPIO_BTN_HOME_CONN_R_L
01005
1
C6311
27PF
100
1
2
5%
1/20W
MF
201
MLB: 518S0888
FLEX: 998-5374
5%
2 16V
NP0-C0G
01005
CRITICAL
J6300
TF13BS-14S-0.4SH
F-RT-SM
15
FL6304
C
1
GPIO_BTN_HOME_CONN_L
240-OHM-25%-0.20A-1.0DCR
60 57
OUT
PMU_GPIO_MB_HALL2_IRQ
1
NC
2
PMU_GPIO_MB_HALL2_IRQ_FILT
01005
NC
NC
NC
NC
NC
NC
L6330
=PP3V0_S2R_HALL
1
3
4
120-OHM-25%-250MA-0.5DCR
62
C
2
2
67 60 20
NC
PP3V0_S2R_HALL_FILT
5
6
7
8
9
10
11
12
13
14
01005
1
C6331
1.0UF
20%
6.3V
2 X5R
0201-1
1
C6333
16
8.2PF
+/-0.5PF
2 16V
NP0-C0G-CERM
01005
PINOUT MATCHES HOME BUTTON ALT 3.0.0
5/9/13
B
B
A
8
7
6
5
4
3
8
7
6
5
D
4
3
D
GRAPE CONNECTOR SUPPORT
62
=PP1V8_S2R_GRAPE
1
=PPVCC_MAIN_GRAPE
C6500
0.1UF
C
60
U6500
100K
5%
1/32W
MF
2 01005
1
7
CAP
2
ON
TDFN
CRITICAL
GND
C6505
8
=PP1V8_GRAPE
R6505
2 X5R
SLG5AP1443V
VCC_MAIN_GRAPE_RAMP
1
20%
6.3V
0201-1
CRITICAL
VDD
10%
16V
2 X5R-CERM
0201
62
C6515
1.0UF
1
1
62
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1
Copyright(C)22006-2009 Foxit Corporation
4700PF
D
3
S
5
C
PP1V8_GRAPE_SW
1
52 60 61 67
CRITICAL
C6510
10UF
20%
2 10V
X5R-CERM
0402-2
10%
2 10V
X7R
201
LAYOUT NOTE:
PUT THERMAL VIAS AROUND U2300 IN CASE OF SHORTED CONDITION
B
B
A
8
7
6
5
4
3
8
7
6
5
4
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1
Copyright(C)22006-2009 Foxit Corporation
3
CUMULUS C1 (CSP) IN MASTER-SLAVE CONFIG
MASTER CUMULUS
SLAVE CUMULUS
PP1V8_GRAPE_SW
=PP5V25_GRAPE
5%
6.3V
2 CERM
01005
1UF
PP1V8_GRAPE_SW
CUMULUS_M_VDDANA
65 61 52
65 61 52
65 61 52
65 61 52
65 61 52
65 61 52
65 61 52
65 61 52
65 61 52
65 61 52
65 61 52
65 61 52
65 61 52
65 61 52
60 52 51
67 61
PP1V8_GRAPE_SW
65 61 52
C
64 61 60 5
61 60 5
64 61 60 5
R66001
4.7K
1%
1/32W
MF
01005 2
64 61 60 5
1
R6601
4.7K
1%
1/32W
MF
2 01005
10%
2 10V
X5R-CERM
0402
B9
B8
A9
B7
B6
A8
B5
B4
A7
B3
A6
A3
A5
A4
B2
A2
E4
SPI2_GRAPE_CS_L
GPIO_GRAPE2SOC_IRQ_L F1
D3
SPI2_GRAPE_SCLK
D2
SPI2_GRAPE_MOSI
E1
SPI2_GRAPE_MISO
61 60 5
64
64 61
64 61
64 61
64 61
TP_JTAG_CUMULUS_M_TCK
TP_JTAG_CUMULUS_M_TDI
TP_JTAG_CUMULUS_M_TDO
JTAG_CUMULUS_M_TMS
C4
C3
E2
C6
IN0_0
IN1_0
IN2_0
IN3_0
IN4_0
IN5_0
IN6_0
IN7_0
IN8_0
IN9_0
IN10_0
IN11_0
IN12_0
IN13_0
IN14_0
IN14_1
VDDIO
VSTM_0
VSTM_1
VSTM_2
VSTM_3
VSTM_4
VSTM_5
VSTM_6
VSTM_7
VSTM_8
VSTM_9
VSTM_10
VSTM_11
VSTM_12
VSTM_13
VSTM_14
VSTM_15
VSTM_16
VSTM_17
VSTM_18
VSTM_19
E9
E5
F7
E6
E7
F8
G9
D6
D7
D8
F9
D5
F6
F5
G4
E8
G8
G7
G6
G5
64 61 52
GPIO_1/CK
GPIO_2/SD
GPIO_3
GPIO_4
G1
D4
F2
F3
U6600
CUMULUS-C1
WLBGA
CRITICAL
H_CS*
H_INT*
H_SCLK
H_SDI
H_SDO
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
20%
10V
2 X5R-CERM
0402
VDDLDO A1
2.2UF
MT_PANEL_IN<15>
MT_PANEL_IN<16>
MT_PANEL_IN<17>
MT_PANEL_IN<18>
MT_PANEL_IN<19>
MT_PANEL_IN<20>
MT_PANEL_IN<21>
MT_PANEL_IN<22>
MT_PANEL_IN<23>
MT_PANEL_IN<24>
MT_PANEL_IN<25>
MT_PANEL_IN<26>
MT_PANEL_IN<27>
MT_PANEL_IN<28>
MT_PANEL_IN<29>
NC_CUMULUS_M_IN14_1
NO_TEST=TRUE
C6604
4.7UF
C5
F4
10%
10V
2 X5R-CERM
0402
1
C6601
VDDH C8
2.2UF
1
VDDCORE C1
C6600
VDDANA B1
1
1
C6605
0.1UF
10%
16V
2 X5R-CERM
0201
1
CUMULUS_MS_CK
CUMULUS_MS_SD 52 61 64
DISPLAY_SYNC
4 60 61
NC_ESD_SENSE_R
NO_TEST=TRUE
5%
6.3V
2 CERM
01005
1
65 61 52
65 61 52
65 61 52
65 61 52
65 61 52
65 61 52
65 61 52
65 61 52
65 61 52
65 61 52
65 61 52
65 61 52
65 61 52
67 61 60 52 51
PP1V8_GRAPE_SW
61
R6650 1
4.7K
61
2
R6604
100K
5%
1/32W
MF
2 01005
64 61 60 52 5
1
R6651
4.7K
C7
C9
G2
B
61
1
GND
1%
1/32W
MF
2 01005
61
1%
1/32W
MF
01005
CUMULUS_M_BCFG_RTCK
E3 BCFG_RTCK
D1 CLKIN/RESET*
CLK_32K_SOC2CUMULUS
GPIO_SOC2GRAPE_RESET_L D9 RSTOVR*
4.7K
2
PINOUT MATCHES GRAPE_FLEX_DRIVE_ALT 0.1.0
65 61 52
65 61 52
65 61 52
65 61 52
65 61 52
65 61 52
65 61 52
65 61 52
65 61 52
65 61 52
65 61 52
65 61 52
A
65 61 52
65 61 52
65 61 52
65 61 52
65 61 52
8
7
MT_PANEL_IN<0>
MT_PANEL_IN<1>
MT_PANEL_IN<2>
MT_PANEL_IN<3>
MT_PANEL_IN<4>
MT_PANEL_IN<5>
MT_PANEL_IN<6>
MT_PANEL_IN<7>
MT_PANEL_IN<8>
MT_PANEL_IN<9>
MT_PANEL_IN<10>
MT_PANEL_IN<11>
MT_PANEL_IN<12>
MT_PANEL_IN<13>
MT_PANEL_IN<14>
NC_CUMULUS_S_IN14_1
NO_TEST=TRUE
B9
B8
A9
B7
B6
A8
B5
B4
A7
B3
A6
A3
A5
A4
B2
A2
IN0_0
IN1_0
IN2_0
IN3_0
IN4_0
IN5_0
IN6_0
IN7_0
IN8_0
IN9_0
IN10_0
IN11_0
IN12_0
IN13_0
IN14_0
IN14_1
TP_CUMULUS_S_H_CS_L
NC_CUMULUS_S_H_INT_L
NO_TEST=TRUE
TP_CUMULUS_S_H_SCLK
TP_CUMULUS_S_H_SDI
TP_CUMULUS_S_H_SDO
E4
F1
D3
D2
E1
H_CS*
H_INT*
H_SCLK
H_SDI
H_SDO
NC_JTAG_CUMULUS_S_TCK
NO_TEST=TRUE
NC_JTAG_CUMULUS_S_TDI
NO_TEST=TRUE
NC_JTAG_CUMULUS_S_TDO
NO_TEST=TRUE
JTAG_CUMULUS_S_TMS
C4
C3
E2
C6
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
WLBGA
CRITICAL
GPIO_1/CK
GPIO_2/SD
GPIO_3
GPIO_4
G1
D4
F2
F3
TM_ACS* C2
TM_OVR G3
MT_PANEL_OUT<20>
MT_PANEL_OUT<21>
MT_PANEL_OUT<22>
MT_PANEL_OUT<23>
MT_PANEL_OUT<24>
MT_PANEL_OUT<25>
MT_PANEL_OUT<26>
MT_PANEL_OUT<27>
MT_PANEL_OUT<28>
MT_PANEL_OUT<29>
MT_PANEL_OUT<30>
MT_PANEL_OUT<31>
MT_PANEL_OUT<32>
MT_PANEL_OUT<33>
MT_PANEL_OUT<34>
MT_PANEL_OUT<35>
MT_PANEL_OUT<36>
MT_PANEL_OUT<37>
MT_PANEL_OUT<38>
MT_PANEL_OUT<39>
2
3
4
5
6
7
8
9
10
12
13
14
15
16
18
19
20
21
22
23
24
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
45
46
MT_PANEL_OUT<13>
MT_PANEL_OUT<14>
MT_PANEL_OUT<15>
MT_PANEL_OUT<16>
MT_PANEL_OUT<17>
MT_PANEL_OUT<18>
MT_PANEL_OUT<19>
MT_PANEL_OUT<20>
MT_PANEL_OUT<21>
MT_PANEL_OUT<22>
MT_PANEL_OUT<23>
MT_PANEL_OUT<24>
MT_PANEL_OUT<25>
MT_PANEL_OUT<39>
MT_PANEL_OUT<38>
MT_PANEL_OUT<37>
MT_PANEL_OUT<36>
MT_PANEL_OUT<35>
MT_PANEL_OUT<34>
MT_PANEL_OUT<33>
6
52 61 65
52 61 65
52 61 65
52 61 65
52 61 65
52 61 65
52 61 65
52 61 65
52 61 65
52 61 65
52 61 65
52 61 65
52 61 65
52 61 65
65 61 52
65 61 52
65 61 52
65 61 52
65 61 52
65 61 52
65 61 52
65 61 52
65 61 52
65 61 52
65 61 52
65 61 52
65 61 52
65 61 52
MT_PANEL_IN<14>
MT_PANEL_IN<13>
MT_PANEL_IN<12>
MT_PANEL_IN<11>
MT_PANEL_IN<10>
MT_PANEL_IN<9>
MT_PANEL_IN<8>
MT_PANEL_IN<17>
MT_PANEL_IN<6>
MT_PANEL_IN<5>
MT_PANEL_IN<4>
MT_PANEL_IN<3>
MT_PANEL_IN<2>
MT_PANEL_IN<16>
MT_PANEL_IN<15>
52 61 65
52 61 65
52 61 65
52 61 65
52 61 65
52 61 65
52 61 65
52 61 65
52 61 65
52 61 65
52 61 65
52 61 65
52 61 65
52 61 65
52 61 65
52 61 65
C
52 61 65
52 61 65
52 61 65
61 64
61 64
B
1/8/13
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
37
38
MT_PANEL_IN<29>
MT_PANEL_IN<28>
MT_PANEL_IN<27>
MT_PANEL_IN<26>
MT_PANEL_IN<25>
MT_PANEL_IN<24>
MT_PANEL_IN<23>
MT_PANEL_IN<22>
MT_PANEL_IN<21>
MT_PANEL_IN<20>
MT_PANEL_IN<19>
MT_PANEL_IN<18>
MT_PANEL_IN<7>
MT_PANEL_IN<0>
MT_PANEL_IN<1>
52 61 65
52 61 65
52 61 65
52 61 65
52 61 65
52 61 65
52 61 65
52 61 65
52 61 65
52 61 65
52 61 65
52 61 65
52 61 65
52 61 65
52 61 65
52 61 65
52 61 65
52 61 65
5
52 61 65
NO_TEST=TRUE
52 61 65
52 61 65
52 61 65
NC_CUMULUS_S_TM_ACS_L
NO_TEST=TRUE
44
1
100PF
CUMULUS_MS_CK
52
CUMULUS_MS_SD
52
NC_AG_TEST_GND_SNS
NO_TEST=TRUE
NC_AG_TEST_GND_DRV
J6640
F-ST-SM
35
36
25
E9
E5
F7
E6
E7
F8
G9
D6
D7
D8
F9
D5
F6
F5
G4
E8
G8
G7
G6
G5
C6656
5%
6.3V
2 CERM
01005
GND
AA03-S034VA1
17
VSTM_0
VSTM_1
VSTM_2
VSTM_3
VSTM_4
VSTM_5
VSTM_6
VSTM_7
VSTM_8
VSTM_9
VSTM_10
VSTM_11
VSTM_12
VSTM_13
VSTM_14
VSTM_15
VSTM_16
VSTM_17
VSTM_18
VSTM_19
U6650
CUMULUS-C1
1
51 52 60 61 67
E3 BCFG_RTCK
CUMULUS_S_BCFG_RTCK
D1 CLKIN/RESET*
CLK_32K_SOC2CUMULUS
GPIO_SOC2GRAPE_RESET_L D9 RSTOVR*
J6620
11
VDDIO
CRITICAL
65 61 52
65 61 52
10%
10V
2 X5R-CERM
0402
PINOUT MATCHES GRAPE_FLEX_SENSE_ALT 0.1.0
1/8/13
F-ST-SM
MT_PANEL_OUT<12>
MT_PANEL_OUT<11>
MT_PANEL_OUT<10>
MT_PANEL_OUT<9>
MT_PANEL_OUT<8>
MT_PANEL_OUT<7>
MT_PANEL_OUT<6>
MT_PANEL_OUT<5>
MT_PANEL_OUT<4>
MT_PANEL_OUT<3>
MT_PANEL_OUT<2>
MT_PANEL_OUT<1>
MT_PANEL_OUT<0>
MT_PANEL_OUT<26>
MT_PANEL_OUT<27>
MT_PANEL_OUT<28>
MT_PANEL_OUT<29>
MT_PANEL_OUT<30>
MT_PANEL_OUT<31>
MT_PANEL_OUT<32>
2.2UF
AA03-S042VA1
43
65 61 52
60 52 5
67 61
C6654
10%
16V
2 X5R-CERM
0201
C6651
1%
1/32W
MF
01005
CRITICAL
65 61 52
1
10%
10V
2 X5R-CERM
0402
65 61 52
1
0.1UF
C6650
2.2UF
65 61 52
D
PP1V8_GRAPE_SW
CUMULUS_S_VDDANA
100PF
61 60 52 5
64
67
61 60 52 5
R6603
10%
16V
2 X5R-CERM
0201
CUMULUS_S_VDDCORE
51 52 60 61 67
C6606
MT_PANEL_OUT<0> 52 61 65
MT_PANEL_OUT<1> 52 61 65
MT_PANEL_OUT<2> 52 61 65
MT_PANEL_OUT<3> 52 61 65
MT_PANEL_OUT<4> 52 61 65
MT_PANEL_OUT<5> 52 61 65
MT_PANEL_OUT<6> 52 61 65
MT_PANEL_OUT<7> 52 61 65
MT_PANEL_OUT<8> 52 61 65
MT_PANEL_OUT<9> 52 61 65
MT_PANEL_OUT<10> 52 61 65
MT_PANEL_OUT<11> 52 61 65
MT_PANEL_OUT<12> 52 61 65
MT_PANEL_OUT<13> 52 61 65
MT_PANEL_OUT<14> 52 61 65
MT_PANEL_OUT<15> 52 61 65
MT_PANEL_OUT<16> 52 61 65
MT_PANEL_OUT<17> 52 61 65
MT_PANEL_OUT<18> 52 61 65
MT_PANEL_OUT<19> 52 61 65
TM_ACS* C2 NC_CUMULUS_M_TM_ACS_L
NO_TEST=TRUE
TM_OVR G3
1
0.1UF
10%
2 25V
X5R
0402
CUMULUS_M_VDDCORE
51 52 60 61 67
C6653
VDDLDO A1
100PF
10%
25V
2 X5R
0402
1
C5
F4
1UF
10%
16V
2 X5R-CERM
0201
C6609
PP1V8_GRAPE_SW
C6652
VDDH C8
1
1
0.1UF
VDDCORE C1
C6602
C6603
C7
C9
G2
1
D
=PP5V25_GRAPE
62 61 52
1
VDDANA B1
62 61 52
51 52 60 61 67
4
3
8
7
6
5
4
Edited by Foxit Reader ActiveX For Evaluation Only.
1
Copyright(C)22006-2009 Foxit Corporation
3
EDP CONNECTOR SUPPORT
62
=PPVCC_MAIN_LCD
1
C7040
1
0.1UF
C7039
0.1UF
10%
2 16V
X5R-CERM
0201
1
10%
2 16V
X5R-CERM
0201
VDD
U7000
CRITICAL
SLG5AP304V
D
LCD_RAMP 7 CAP
5
IN
2
GPIO_SOC2LCD_PWREN
ON
3
S
5
D
L7001
FERR-120-OHM-1.5A
PPVCC_MAIN_LCD_SW
67 60 53
1
2
PPVCC_MAIN_LCD_SW_CONN
53 60 67
0402A
R7005
GND
1
C7041
1
8
5%
1/32W
MF
2 01005
D
CRITICAL
1
100K
TDFN
3900PF
0.1UF
LAYOUT NOTE:
PUT THERMAL VIAS AROUND U2200 IN CASE OF SHORTED CONDITION
10%
2 50V
X7R
0402
67 60 53
C7003
10%
16V
2 X5R-CERM
0201
1
CRITICAL
C7002
10UF
1
1
C7030
C7032
15PF
82PF
20%
2 6.3V
CERM-X5R
0402
5%
2 16V
NP0-C0G-CERM
01005
5%
25V
2 CERM
0201
PPVCC_MAIN_LCD_SW
NOSTUFF
1
R7040
100K
65 7
IN
EDP_AUX_P
20.1UF 65 EDP_AUX_EMI_P
20%
X5R-CERM
C7050 1
010056.3V
65 7
IN
EDP_AUX_N
5%
1/32W
MF
2 01005
HPD VOLTAGE DIVIDER 2.5V TO 1.8V
CRITICAL
L7042
2
EDP_AUX_EMI_CONN_P
3
OUT
0.1UF
C7051 1
2
20%
X5R-CERM
010056.3V
53
65
1
EDP_AUX_EMI_N
1
1
R7041
R7043
100K
EDP_AUX_EMI_CONN_N
OUT
EDP_HPD_EMI_CONN
53 65
1
5%
1/32W
MF
01005
SYM_VER-2
TAM0605-4SM
3.25-OHM-0.1A-2.4GHZ
240-OHM-25%-0.20A-1.0DCR
7.5K 2
100K
5%
1/32W
MF
2 01005
C
4
L7090
R7090
53 65
2
EDP_HPD
OUT
7 65
01005
1
R7091
1
20.0K
C7090
27PF
5%
16V
01005
5%
1/32W
MF
2 01005
5%
1/32W
MF
2 01005
1
EDP_HPD_EMI
2 NP0-C0G
C
CRITICAL
65 61 7
IN
EDP_DATA_N<0>
C7043 1
2 0.1UF65
20%
X5R-CERM
010056.3V
65 61 7
IN
EDP_DATA_P<0>
C7042 1
2 0.1UF65
20%
X5R-CERM
010056.3V
61
61
L7012
EDP_DATA_EMI_N<0>
EDP_DATA_EMI_P<0>
2
3
1
4
EDP_DATA_EMI_CONN_N<0>
53 61 65
EDP_DATA_EMI_CONN_P<0>
53 61 65
EDP_DATA_EMI_CONN_N<1>
53 61 65
EDP_DATA_EMI_CONN_P<1>
53 61 65
SYM_VER-2
TAM0605-4SM
3.25-OHM-0.1A-2.4GHZ
CRITICAL
65 61 7
IN
EDP_DATA_N<1>
C7044 1
2 0.1UF 65
20%
X5R-CERM
010056.3V
65 61 7
IN
EDP_DATA_P<1>
C7045 1
2 0.1UF 65
20%
X5R-CERM
010056.3V
61
61
L7022
EDP_DATA_EMI_N<1>
EDP_DATA_EMI_P<1>
2
3
1
4
EDP CONNECTOR
SYM_VER-2
TAM0605-4SM
3.25-OHM-0.1A-2.4GHZ
PINOUT MATCHES DISPLAY_EDP_FLEX 1.0.0
1/7/13
CRITICAL
CRITICAL
65 61 7
IN
EDP_DATA_N<2>
C7046 1
2 0.1UF 65
20%
X5R-CERM
010056.3V
61
J7000
L7032
EDP_DATA_EMI_N<2>
EDP_DATA_EMI_CONN_N<2>
2
3
1
4
AA03-S042VA1
53 61 65
F-ST-SM
43
65 61 7
IN
EDP_DATA_P<2>
C7047 1
2 0.1UF65
20%
X5R-CERM
010056.3V
61
EDP_DATA_EMI_P<2>
R7080
1.00M2
1
B
EDP_DATA_EMI_CONN_N<0>
EDP_DATA_EMI_CONN_P<2>
53 61 65
01005
CRITICAL
65 61 7
IN
EDP_DATA_N<3>
R7081
1.00M2 EDP_DATA_EMI_CONN_P<0>
1
65 61 7
53 61 65
IN
EDP_DATA_P<3>
01005
C7048
2 0.1UF65
20%
X5R-CERM
1
010056.3V
C7049
2 0.1UF65
20%
X5R-CERM
1
010056.3V
61
2
61
OUT
65 60 56
OUT
EDP_DATA_EMI_CONN_N<3>
53 61 65
4
EDP_DATA_EMI_CONN_P<3>
53 61 65
OUT
65 60 56
OUT
65 60 56
OUT
65 60 56
OUT
3
1
EDP_DATA_EMI_P<3>
65 60 56
65 60 56
L7002
EDP_DATA_EMI_N<3>
SYM_VER-2
TAM0605-4SM
3.25-OHM-0.1A-2.4GHZ
67 60 53
LED_IO_1_B
LED_IO_2_B
LED_IO_3_B
LED_IO_4_B
LED_IO_5_B
LED_IO_6_B
PPVCC_MAIN_LCD_SW_CONN
R7082
1.00M2
1
EDP_DATA_EMI_CONN_N<1>
53 61 65
01005
R7083
1.00M2
1
CRITICAL
65 53
L7080
65 53
53 61 65
62
01005
=PPLED_REG_B
1
PPLED_BACK_REG_B
2
1
C7080
8.2PF
R7084
1.00M2
67 60 53
53 60 67
PPLED_BACK_REG_A
0201
1
1
EDP_AUX_EMI_CONN_N
EDP_AUX_EMI_CONN_P
120-OHM-25%-450MA
EDP_DATA_EMI_CONN_P<1>
EDP_DATA_EMI_CONN_N<2>
53 61 65
EDP_DATA_EMI_CONN_P<2>
53 61 65
C7081
67 60 53
56PF
+/-0.5PF
2 50V
C0G-CERM
201
44
53 61 65
SYM_VER-2
TAM0605-4SM
3.25-OHM-0.1A-2.4GHZ
2%
2 50V
NP0-C0G-CERM
0201
PPLED_BACK_REG_B
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
45
46
LED_IO_6_A
LED_IO_5_A
LED_IO_4_A
LED_IO_3_A
LED_IO_2_A
LED_IO_1_A
EDP_HPD_EMI_CONN
EDP_DATA_EMI_CONN_N<0>
EDP_DATA_EMI_CONN_P<0>
EDP_DATA_EMI_CONN_N<1>
EDP_DATA_EMI_CONN_P<1>
EDP_DATA_EMI_CONN_N<2>
EDP_DATA_EMI_CONN_P<2>
EDP_DATA_EMI_CONN_N<3>
EDP_DATA_EMI_CONN_P<3>
R7085
1.00M2
CRITICAL
L7085
01005
120-OHM-25%-450MA
A
62
=PPLED_REG_A
1
1.00M2
1
PPLED_BACK_REG_A
2
53 60 67
0201
R7086
1
EDP_DATA_EMI_CONN_N<3>
1
C7085
8.2PF
53 61 65
C7086
56PF
+/-0.5PF
50V
2 C0G-CERM
201
01005
2%
2 50V
NP0-C0G-CERM
0201
R7087
1.00M2
1
EDP_DATA_EMI_CONN_P<3>
53 61 65
01005
8
7
6
5
4
3
2
56 60 65
OUT
56 60 65
OUT
56 60 65
OUT
56 60 65
OUT
56 60 65
OUT
56 60 65
53
01005
1
OUT
1
53 61 65
53 61 65
53 61 65
53 61 65
53 61 65
53 61 65
53 61 65
53 61 65
B
8
7
6
5
4
3
Edited by Foxit Reader ActiveX For Evaluation Only.
1
Copyright(C)22006-2009 Foxit Corporation
D
D
TABLE_ALT_HEAD
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
155S0644
155S0823
?
REF DES
COMMENTS:
TABLE_ALT_ITEM
RDAR://PROBLEM/11282371
FL7500,L1920
C
C
62
=PPBATT_POS_CONN
CRITICAL
J7500
BATT-J72
F-ST-TH
FL7500
6
240-OHM-0.2A-0.8-OHM
64 57 5
BI
UART5_BATT_TRXD
1
2
64 60
0201-2
67 60 57
BI
67 55
1
BATT_NTC
C7522
1
C7523
33PF
33PF
5%
2 25V
NPO-C0G
0201
5%
2 25V
NPO-C0G
0201
1
C7524
18PF
1
C7525
56PF
1
C7526
68PF
5%
5%
5%
25V
50V
2 25V
NP0-C0G-CERM2 NP0-C0G-CERM2 CERM
0201
402-1
0201
1
C7527
82PF
5%
50V
2 CERM
0402
1
C7528
BATT_SWI_CONN
1
2
3
4
5
HDQ
THERM
PACK_NEG
PACK_POS
SENSE
56PF
5%
2 25V
NP0-C0G-CERM
0201
7
BATT_SNS
APN:516-0254
B
B
A
8
7
6
5
4
3
8
7
6
5
4
PLACEMENT_NOTE=PLACE NEAR L8225.1
CRITICAL
C8140
PPVCC_MAIN
CRITICAL
1
C8141
150UF
1
150UF
20%
6.3V 2
TANT-1
B15G
ESR MAX=70MOHM
C8150
1
10UF
20%
6.3V 2
TANT-1
B15G
CRITICAL
CRITICAL
CRITICAL
1
C8151
10UF
20%
6.3V
2 CERM-X5R
0402
C8152
1
10UF
20%
6.3V
2 CERM-X5R
0402
CRITICAL
CRITICAL
C8153
1
10UF
20%
6.3V
2 CERM-X5R
0402
CRITICAL
C8154
1
10UF
20%
6.3V
2 CERM-X5R
0402
C8155
1
10UF
20%
6.3V
2 CERM-X5R
0402
CRITICAL
1
C8156
10UF
20%
6.3V
2 CERM-X5R
0402
CRITICAL
CRITICAL
C8157
1
10UF
20%
6.3V
2 CERM-X5R
0402
10UF
20%
6.3V
2 CERM-X5R
0402
1
C8159
1
C8144
1
1.0UF
10UF
20%
6.3V
2 CERM-X5R
0402
47 55 56 57 58 60 62 67
CRITICAL
CRITICAL
C8158
1
Edited by Foxit Reader ActiveX For Evaluation Only.
1
Copyright(C)22006-2009 Foxit Corporation
3
82PF
20%
6.3V
2 X5R
0201-1
20%
6.3V
2 CERM-X5R
0402
C8142
5%
2 25V
CERM
0201
1
CRITICAL
C8143
L8100
18PF
1.0UH-3.51A-0.036OHM
5%
25V
2 NP0-C0G-CERM
0201
67
DIDT=TRUE
CRITICAL
1
CRITICAL
1
C8160
10UF
PLACE TWO 10UF CAP
AT EACH VDD INPUT
10UF
20%
6.3V
2 CERM-X5R
0402
D
CRITICAL
1
C8161
10UF
20%
6.3V
2 CERM-X5R
0402
CRITICAL
1
C8162
CRITICAL
1
C8163
10UF
20%
6.3V
2 CERM-X5R
0402
CRITICAL
1
C8164
10UF
20%
6.3V
2 CERM-X5R
0402
C8165
10UF
20%
6.3V
2 CERM-X5R
0402
CRITICAL
1
C8166
10UF
20%
6.3V
2 CERM-X5R
0402
20%
6.3V
2 CERM-X5R
0402
CRITICAL
1
CRITICAL
1
C8167
10UF
10UF
20%
6.3V
2 CERM-X5R
0402
CRITICAL
1
C8168
CRITICAL
1
C8169
10UF
20%
6.3V
2 CERM-X5R
0402
C8170
10UF
20%
6.3V
2 CERM-X5R
0402
20%
6.3V
2 CERM-X5R
0402
CRITICAL
1
C8171
10UF
20%
6.3V
2 CERM-X5R
0402
1
L8101
1.0UH-3.51A-0.036OHM
C8172
67
10UF
1
BUCK0_LX1
2
MIN_LINE_WIDTH=0.60MM
MIN_NECK_WIDTH=0.20MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=0.5 MM
20%
6.3V
2 CERM-X5R
0402
DIDT=TRUE
L8112
L8102
1
NOSTUFF
R8170
55 47
1
4.7K 2
1
OVP_SW_EN_L
2
SW_CHGA
CRITICAL K
67 61
PILE101D-SM
2
DCR=30MOHM MAX
3
SOD-123W
S
5%
1/20W
MF
201
A
Q8104
PLACE_NEAR=U8100.R17:2MM
FDMC6683
R8172
MLP3.3X3.3
BATT_SNS
67 54
0
1
2
67
PLACE_NEAR=U8100.R17:10MM
5%
1/20W
MF
201
D
RDSON=0.0136@VGS=-2.5V 5
ID=12.0A
BATT_SNS_R
1 PLACE_NEAR=U8100.R17:10MM
NOSTUFF
1
R8173
C8149
499
0.022UF
LAYOUT NOTE R8172- PLACE NEAR PMU
C8149- PLACE NEAR PMU
R8173- PLACE NEAR PMU
1%
1/20W
MF
2 201
10%
25V
2 X7R
0402
PPBATT_VCC
67 62 60 55
ACT_DIO
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.1 MM
NET_SPACING_TYPE=ANLG
MOSFET
CHANNEL
FDMC6676BZ
USB_VBUS_DETECT
67 4
MIN_LINE_WIDTH=0.20MM
MIN_NECK_WIDTH=0.15MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
VOLTAGE=6.0V
P-TYPE
RDS(ON)
27 MOHM @-4.5V
IMAX
6.9 A
VGS MAX
+/- 25V
XW8114
PLACE_NEAR=U8100.F18:2MM
C8148
4.7UF
K
Q8123
470K
BZT52C10LP
S
LLP
MLP3.3X3.3
G 4
VBUS_PROT_G
5
67 62 60
CRITICAL
C8145
R8130
1
2.2UF
10%
25V
X5R-CERM 2
603
60
LAYOUT NOTE: PLACE
RIGHT AT THE PIN
220K
1%
1/20W
MF
201 2
PPVBUS_USB_DCIN
55 47
USB REVERSE VOLTAGE PROTECTION
1
R17
P17
VBAT
IBAT_S
M19
N19
P19
R19
IBAT0
IBAT1
IBAT2
IBAT3
N17
ACT_DIO
F18
F19
G18
H18
J18
K18
L18
L19
4.7K 2
5%
1/20W
MF
201
1
C8146
10%
25V
2 X5R-CERM
0201
62 55
62 55
=PPVCC_MAIN_CPU
=PPVCC_MAIN_GPU
K2
B
V2
V3
62 55
U8
V8
=PPVCC_MAIN_SOC
67 62 60 58 57 56 55 47
A4
B4
PPVCC_MAIN
=PPVCC_MAIN_CPU
CRITICAL
C8175
1
10UF
20%
2 6.3V
CERM-X5R
0402
CRITICAL
1
C8176
10UF
20%
2 6.3V
CERM-X5R
0402
CRITICAL
1
C8177
10UF
20%
2 6.3V
CERM-X5R
0402
CRITICAL
1
C8178
10UF
20%
2 6.3V
CERM-X5R
0402
CRITICAL
C8179
1
10UF
20%
2 6.3V
CERM-X5R
0402
CRITICAL
1
C8180
10UF
20%
2 6.3V
CERM-X5R
0402
A8
B8
CRITICAL
1
C8181
U4
V4
10UF
20%
2 6.3V
CERM-X5R
0402
62 55
VDD_BUCK2
=PPVCC_MAIN_GPU
VDD_BUCK3
VDD_BUCK4
VDD_BUCK5
C8182
10UF
20%
6.3V
2 CERM-X5R
0402
CRITICAL
1
C8183
10UF
20%
6.3V
2 CERM-X5R
0402
CRITICAL
1
C8184
10UF
20%
6.3V
2 CERM-X5R
0402
CRITICAL
1
C8185
10UF
20%
6.3V
2 CERM-X5R
0402
CRITICAL
1
1
C8186
20%
6.3V
2 CERM-X5R
0402
P18
R18
20%
4V
2 X5R
0402
62 55
=PPVCC_MAIN_SOC
67 62 60 55
CRITICAL
CRITICAL
1
C8187
10UF
20%
6.3V
2 CERM-X5R
0402
1
CRITICAL
1
2
MIN_LINE_WIDTH=0.60MM
MIN_NECK_WIDTH=0.20MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=0.5 MM
C8188
1
10UF
C8193
1
10UF
20%
6.3V
2 CERM-X5R
0402
67
60
R81001
0.5
TABLE_ALT_HEAD
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
128S0279
8
?
C8140,C8141
RDAR://PROBLEM/8967213
7
6
67
2
C8112
20%
4V
2 X5R
0402
15UF
CRITICAL
1
D
C8109
15UF
20%
4V
2 X5R
0402
20%
4V
2 X5R
0402
SWITCH_NODE=TRUE
1
C8117
20%
4V
2 X5R
0402
XW8102
BUCK1_FB
CRITICAL
1
67
C8113
15UF
15UF
20%
4V
2 X5R
0402
20%
2 4V
X5R
0402
CRITICAL
1
15UF
20%
4V
2 X5R
0402
20%
4V
2 X5R
0402
1
C8121
15UF
XW8103
SWITCH_NODE=TRUE
20%
2 4V
X5R
0402
2
SM
CRITICAL
1
BUCK3_LX0
MIN_LINE_WIDTH=0.60MM
MIN_NECK_WIDTH=0.20MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=0.5 MM
CRITICAL
1
C8122
15UF
1
C8124
15UF
XW8104
SWITCH_NODE=TRUE
20%
4V
2 X5R
0402
2
SM
CRITICAL
1
BUCK4_LX0
MIN_LINE_WIDTH=0.60MM
MIN_NECK_WIDTH=0.20MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=0.5 MM
20%
4V
2 X5R
0402
CRITICAL
1
C8125
15UF
15UF
20%
4V
2 X5R
0402
20%
4V
2 X5R
0402
PP1V2_S2R
CRITICAL
1
C8127
15UF
XW8105
SWITCH_NODE=TRUE
20%
4V
2 X5R
0402
2
SM
CRITICAL
CRITICAL
1
C8128
15UF
L8110
1
MIN_LINE_WIDTH=0.60MM
MIN_NECK_WIDTH=0.20MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=0.5 MM
DIDT=TRUE
PPVDD_SRAM
CRITICAL
1
C8130
15UF
XW8106
SWITCH_NODE=TRUE
20%
4V
2 X5R
0402
2
SM
CRITICAL
CRITICAL
1
C8131
15UF
L8111
1
MIN_LINE_WIDTH=0.60MM
MIN_NECK_WIDTH=0.20MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=0.5 MM
DIDT=TRUE
PP3V3_S2R
CRITICAL
1
C81A0
10UF
XW8107
SWITCH_NODE=TRUE
20%
6.3V
2 CERM-X5R
0402
2
SM
PP1V8_S2R
PP1V8_SW1
PP1V8_SW2
PP1V8_S2R_SW3
PP1V2_S2R
PP1V2_SW1
PP1V2_S2R_SW2
C8196
0.22UF
20%
6.3V
2 X5R
0201
1
C8135
1.0UF
20%
6.3V
2 X5R
0201-1
1
C8136
1UF
10%
6.3V
2 CERM
402
1
C8137
1.0UF
20%
6.3V
2 X5R
0201-1
1
C81A8
1.0UF
20%
6.3V
2 X5R
0201-1
1
C8138
1.0UF
20%
6.3V
2 X5R
0201-1
1
C8137 0201 OKAY IF GRAPE HAS EXT FET
3
C8139
1UF
10%
6.3V
2 CERM
402
1
CRITICAL
1
C81A1
10UF
20%
6.3V
2 CERM-X5R
0402
CRITICAL
1
C81A2
10UF
20%
6.3V
2 CERM-X5R
0402
CRITICAL
1
C81A3
10UF
20%
6.3V
2 CERM-X5R
0402
55 56 60 62 67
57 59 60 62 67
60 62 67
60 62 67
CRITICAL
1
C81A4
10UF
20%
6.3V
2 CERM-X5R
0402
1
15UF
20%
4V
2 X5R
0402
ADDITIONAL DISTRIBUTED
32UF (NO DERATING)
1
PMU_VPUMP
60 62 67
C8132
2
PILE25201D
BUCK6_FB
B
CRITICAL
1
20%
4V
2 X5R
0402
2.2UH-2.35A-0.073OHM
BUCK6_LX0
15UF
20%
4V
2 X5R
0402
2
1
MIN_LINE_WIDTH=0.25MM
MIN_NECK_WIDTH=0.20MM
C8129
ADDITIONAL DISTRIBUTED
64UF (NO DERATING)
PILE20161D-SM
BUCK5_FB
55 56 60 62 67
CRITICAL
1
20%
4V
2 X5R
0402
1.0UH-3.7A-0.055OHM
BUCK5_LX0
C8126
ADDITIONAL DISTRIBUTED
27UF (NO DERATING)
1
MIN_LINE_WIDTH=0.25MM
MIN_NECK_WIDTH=0.20MM
55 56 60 62 67
CRITICAL
1
2
PILE25201D
BUCK4_FB
60 62 67
C8123
PP1V8_S2R
CRITICAL
L8109
67
C
15UF
20%
2 4V
X5R
0402
1.0UH-3.51A-0.036OHM
67
15UF
20%
4V
2 X5R
0402
ADDITIONAL DISTRIBUTED
64UF (NO DERATING)
1
BUCK3_FB
DIDT=TRUE
C8120
CRITICAL
1
2
PILE25201D
MIN_LINE_WIDTH=0.25MM
MIN_NECK_WIDTH=0.20MM
67
15UF
20%
4V
2 X5R
0402
CRITICAL
1
PPVDD_SOC
CRITICAL
L8108
67
C8116
ADDITIONAL DISTRIBUTED
27UF (NO DERATING)
1
BUCK2_FB
DIDT=TRUE
C8119
15UF
1.0UH-3.51A-0.036OHM
67
60 62 67
CRITICAL
1
15UF
20%
2 4V
X5R
0402
CRITICAL
1
C8118
2
PILE25201D
MIN_LINE_WIDTH=0.25MM
MIN_NECK_WIDTH=0.20MM
67
C8115
2
1
BUCK2_LX0
DIDT=TRUE
C8114
CRITICAL
1
CRITICAL
MIN_LINE_WIDTH=0.60MM
MIN_NECK_WIDTH=0.20MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=0.5 MM
67
CRITICAL
1
SM
MIN_LINE_WIDTH=0.25MM
MIN_NECK_WIDTH=0.20MM
4
15UF
20%
4V
2 X5R
0402
L8107
VPUMP A11
MIN_LINE_WIDTH=0.30MM
MIN_NECK_WIDTH=0.20MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
VOLTAGE=4.7V
C8111
1.0UH-3.51A-0.036OHM
67
MIN_LINE_WIDTH=0.30MM
MIN_NECK_WIDTH=0.20MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
VOLTAGE=4.6V
CRITICAL
1
CRITICAL
1
15UF
PILE25201D
MIN_LINE_WIDTH=0.25MM
MIN_NECK_WIDTH=0.20MM
B10
B11
C11
A9
B9
C9
BUCK4_SW1
C10
BUCK4_SW2 A10
PPBATT_POS_RC
5
C8108
L8106
BUCK1_LX2
DIDT=TRUE
C1
C2
F6
A1
A2
A3
1%
1/16W
MF
402 2
TABLE_ALT_ITEM
128S0339
C8194
20%
4V
2 X5R
0402
CRITICAL
1
PILE25201D
1
VCC_MAIN
20%
6.3V
2 CERM-X5R
0402
15UF
CRITICAL
SWITCH_NODE=TRUE
MIN_LINE_WIDTH=0.60MM
MIN_NECK_WIDTH=0.20MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=0.5 MM
67
10UF
20%
6.3V
2 CERM-X5R
0402
20%
4V
2 X5R
0402
PPVDD_GPU
1.0UH-3.51A-0.036OHM
VDD_BUCK6
CRITICAL
C8107
1
20%
4V
2 X5R
0402
15UF
L8105
SWITCH_NODE=TRUE
PPBATT_VCC
CRITICAL
CRITICAL
C8106
15UF
CRITICAL
1
NOTE: FOR NO BATTERY SITUATION
A
15UF
20%
2 4V
X5R
0402
2
PILE25201D
BUCK1_LX1
M18
N18
10UF
2
SM
CRITICAL
BUCK1_LX0
DIDT=TRUE
T16 VCC_MAIN_S
CRITICAL
1
1
C8110
15UF
1.0UH-3.51A-0.036OHM
VBUCK4
B1
B2
B3
BUCK0_FB
DIDT=TRUE
67
B13
B14
VBUCK3
C14
A12
B12
C12
BUCK3_SW1
C13
BUCK3_SW2 A13
BUCK3_SW3 A14
VDD_BUCK1_2
CRITICAL
1
CRITICAL
1
XW8101
SWITCH_NODE=TRUE
MIN_LINE_WIDTH=0.60MM
MIN_NECK_WIDTH=0.20MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=0.5 MM
U7
V7
BUCK2_LX0
BUCK2_FB P7
BUCK6_FB
BUCK6_BYP0
BUCK6_BYP1
BUCK6_BYP2
VDD_BUCK1_01
15UF
C8104
L8104
N1
N2
BUCK1_LX0
R1
R2
BUCK1_LX1
U1
U2
BUCK1_LX2
BUCK1_FB M6
BUCK6_LX0
VDD_BUCK0_23
60 62
67
CRITICAL
1
1.0UH-3.51A-0.036OHM
67
U5
V5
BUCK5_FB P6
VDD_BUCK0_01
20%
2 4V
X5R
0402
C8103
2
PILE25201D
BUCK5_LX0
F1
F2
K1
P1
P2
V1
L8103
MIN_LINE_WIDTH=0.25MM
MIN_NECK_WIDTH=0.20MM
A7
B7
BUCK4_LX0
BUCK4_FB E7
D17 HV_CHG_DIS
TP_HV_CHG_EN
67
A5
B5
BUCK3_FB E6
VBUS
20%
4V
2 X5R
0402
PILE25201D
1
BUCK3_LX0
C16 VBUS_OVP_OFF
OVP_SW_EN_L_R
NOSTUFF
0.01UF
LAYOUT NOTE:
R8146, C8146 CAN BE
ANYWHERE BET.TRISTAR
AND PMU
62 55
VCENTER
C8105
15UF
CRITICAL
SWITCH_NODE=TRUE
BUCK0_LX3
DIDT=TRUE
E1
E2
BUCK0_LX0
G1
G2
BUCK0_LX1
J1
J2
BUCK0_LX2
L1
L2
BUCK0_LX3
BUCK0_FB H6
L17
R8146
OVP_SW_EN_L
CHG_LX0
CHG_LX1
CHG_LX2
CHG_LX3
F16
F17
G16
G17
H16
H17
J17
K16
K17
L16
PLACE_NEAR=U8100.F16:10MM
MIN_LINE_WIDTH=0.20MM
MIN_NECK_WIDTH=0.1MM
NET_SPACING_TYPE=ANLG
1
D
LAYOUT NOTE: PLACE
RIGHT AT THE PIN
NOTE: 10V ZENER
A
FDMC6676BZ
2
MIN_LINE_WIDTH=0.20MM
MIN_NECK_WIDTH=0.15MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
VOLTAGE=6.0V
DZ8120
CRITICAL
C8147
10%
35V
2 X5R-CERM
0603
PPVBUS_PROT
CRITICAL
3
2
1
R81161
MIN_LINE_WIDTH=0.60MM
MIN_NECK_WIDTH=0.20MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
VOLTAGE=6.0V
CRITICAL
1
4.7UF
NOSTUFF
PMU_VCENTER
PLACE_NEAR=U8100.L18:2MM
CRITICAL
1
10%
35V
2 X5R-CERM
0603
67 60 47
1%
1/20W
MF
201
67 60
SHORT-0201
2
1
G19
H19
J19
K19
15UF
20%
4V
2 X5R
0402
CRITICAL
2
MIN_LINE_WIDTH=0.60MM
MIN_NECK_WIDTH=0.20MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=0.5 MM
SYM 1 OF 4
PMEG4030ER
CRITICAL
G
4
D8100
67
FCBGA
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.20 MM
NET_SPACING_TYPE=PWR
DIDT=TRUE
SWITCH_NODE=TRUE
USB/BAT
BUCK
PPVCC_MAIN
15UF
CRITICAL
1
1.0UH-3.51A-0.036OHM
D2089A0
VCC-MAIN
SWITCHED POWER
67 62 60 58 57 56 55 47
1
U8100
2.2UH-20%-5.6A-0.03OHM
C8102
1
PILE25201D
BUCK0_LX2
DIDT=TRUE
CRITICAL
C8101
CRITICAL
SWITCH_NODE=TRUE
MIN_LINE_WIDTH=0.60MM
MIN_NECK_WIDTH=0.20MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=0.5 MM
OMIT_TABLE
CRITICAL
1
15UF
1
CRITICAL
C8100
20%
4V
2 X5R
0402
1.0UH-3.51A-0.036OHM
67
C
CRITICAL
PILE25201D
CRITICAL
SWITCH_NODE=TRUE
CRITICAL
1
PPVDD_CPU
2
MIN_LINE_WIDTH=0.60MM
MIN_NECK_WIDTH=0.20MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=0.5 MM
ESR MAX=70MOHM
VCC_MAIN BYPASS
1
BUCK0_LX0
55 56 60 62 67
60 62 67
60 62 67
C81A9
1.0UF
20%
6.3V
2 X5R
0201-1
CRITICAL
1
C81A5
10UF
20%
6.3V
2 CERM-X5R
0402
CRITICAL
1
C81A6
10UF
20%
6.3V
2 CERM-X5R
0402
CRITICAL
1
C81A7
10UF
20%
6.3V
2 CERM-X5R
0402
60 62 67
8
7
6
5
4
Edited by Foxit Reader ActiveX For Evaluation Only.
1
Copyright(C)22006-2009 Foxit Corporation
3
OMIT_TABLE
LDO INPUTS
U8100
D2089A0
PP1V8_S2R
1UF
D
1UF
10%
2 6.3V
CERM
402
62 60 58 57 56 55 47
67
10%
2 6.3V
CERM
402
67 62 60 58 57 56 55 47
PPVCC_MAIN
PPVCC_MAIN
PP1V2_S2R
67 62 60 55
1
C8201
1UF
10%
2 6.3V
CERM
402
CRITICAL
CRITICAL
L8225
D8228
4.7UH-3.4A-0.075OHM
=PPVCC_MAIN_LED
62 56
CRITICAL
C8226
1
67 61
2
A
WLED_LX_A
(PPLED_OUT_A)
K
SOD-323
R8270
65 60 53
PPLED_OUT_A
CRITICAL
4.7UF
10%
35V
2 X5R-CERM
0603
CRITICAL
1
CRITICAL
1
C8251
4.7UF
10%
35V
2 X5R-CERM
0603
IN
LED_IO_1_A
1
CRITICAL
1
C8252
4.7UF
LED_IO_2_A
1.00 2
1
1
C8254
4.7UF
10%
35V
2 X5R-CERM
0603
C8259
65
65
1
C8271
1
56PF
56PF
C
DIDT=TRUE
SWITCH_NODE=TRUE
56PF
LED_IO1_B_R
65 LED_IO2_B_R
65 LED_IO3_B_R
65 LED_IO4_B_R
65 LED_IO5_B_R
65 LED_IO6_B_R
65
R8272
65 60 53
IN
LED_IO_3_A
IN
LED_IO_4_A
1
1.00 2
1
1.00 2
REF DES
WLED_LXA0
WLED_LXA1
VOUT_WLED_A
WLED1_A
WLED2_A
WLED3_A
WLED4_A
WLED5_A
WLED6_A
E18
E19
E16
K14
L14
M14
M16
N14
P14
WLED_LXB0
WLED_LXB1
VOUT_WLED_B
WLED1_B
WLED2_B
WLED3_B
WLED4_B
WLED5_B
WLED6_B
VDD_LCM_SW
VDD_BOOST_LCM
BOOST_LCM_LX
LCM_FB
VDD_LCM
VLCM1
VLCM2
LCM2_EN
VLCM3
PP3V0_SPARE1
PP1V7_VA_VCP
PP3V0_S2R_SENSOR
PP3V0_ALS
PP3V0_UVLO
PP3V3_ACC
PP3V0_S2R_TRISTAR
PP3V0_S2R_HALL
PP1V3_CAM
PP1V0_SOC
PP2V6_CAM_AF
PP2V9_CAM
PP1V8_ALWAYS
56 60 62 67
56 60 62 67
56 60 62 67
56 60 62 67
56 60 62 67
56 60 62 67
56 60 62 67
56 60 62 67
CRITICAL
56 60 62 67
L8229
62 67
56
60
56 60 62 67
1
56 60 62 67
10UF
XTAL1 V18
XTAL2 V17
20%
2 25V
X5R-CERM
0603
PMU_XTAL
PMU_EXTAL
MIN_LINE_WIDTH=0.4 MM
MIN_NECK_WIDTH=0.2 MM
2.2UH-1.05A-0.195OHM NET_SPACING_TYPE=PWR
C17 =PPVCC_MAIN_VDD_LCM 62
A18
67 61 PP6V0_LCM_HI (NOTE: 2MHZ)
B19
67 LCM_LX
C15
U11
67 60 PP6V0_LCM_VBOOST
V11 (100MA; 5.0-6.0V)
PP5V25_GRAPE
60 62 67
V12 (100MA; 5.0-6.0V) NO_TEST=TRUE NC_VLCM2
E8
LCM2_EN
1 C8212
1
U12 (5MA; 5.0-6.0V)
NO_TEST=TRUE NC_VLCM3
2
MAKE_BASE=TRUE
VLS201612E-SM
VOLTAGE=6.0V
MIN_LINE_WIDTH=0.4MM
MIN_NECK_WIDTH=0.2MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
DIDT=TRUE
CRITICAL
D8230
PMEG2005AEL
MAKE_BASE=TRUE
A
K
SOD882
1
C8210
2.2UF
VOLTAGE=6.0V
MIN_LINE_WIDTH=0.4MM
MIN_NECK_WIDTH=0.2MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
CRITICAL
C8211
10UF
20%
10V
2 X5R-CERM
402
20%
2 10V
X5R-CERM
0402-2
65
65
C
1K
CRITICAL
5%
1/20W
MF
2 201
Y8200
2
1
CRITICAL
1
C8273
1
56PF
2%
2012-1
18PF
2%
0201
CRITICAL
C8215 1
C8272
0201
1
C8216
18PF
5%
25V
C0G-CERM 2
0201
50V
2 50V
NP0-C0G-CERM 2 NP0-C0G-CERM
COMMENTS:
D
56 60 62 67
R8250
TABLE_ALT_HEAD
BOM OPTION
C18
C19
D16
E14
F14
G14
H14
J14
J16
VLDO1
VLDO2
VLDO3
VLDO4
VLDO5
VLDO6
VLDO7
VLDO8
VLDO9
VLDO10
VLDO11
VLDO13
ON_BUF
(50MA; 2.5-3.3V)
(100MA; 1.65-1.805V; BUCK3)
(50MA; 2.5-3.3V)
(50MA; 2.5-3.3V)
(1000MA; 2.5-3.6V)
(150MA; 2.5-3.6V)
(300MA; 1.7-3.0V)
(300MA; 1.7-3.0V)
(300MA; 1.2-3.0V)
(150MA; 0.6-1.3V)
(300MA; 1.7-3.0V)
(300MA; 1.7-3.0V)
(5MA; 1.8V; ON_BUFF)
1
56PF
ALTERNATE FOR
PART NUMBER
VDD_LDO1_3_4
VDD_LDO2
VDD_LDO5
VDD_LDO6
VDD_LDO7
VDD_LDO8
VDD_LDO9
VDD_LDO10
VDD_LDO11
VDD_LDO13
U19
A16
U18
T19
V9
V10
V14
V15
A15
A17
V16
U17
T10
32.768K-20PPM-12.5PF
1%
1/32W
MF
01005
PART NUMBER
T18
B16
U9
U10
U14
U15
B15
B17
U16
T17
1%
1/32W
MF
01005
R8273
65 60 53
LED_IO1_A_R
LED_IO2_A_R
LED_IO3_A_R
LED_IO4_A_R
LED_IO5_A_R
LED_IO6_A_R
NET_SPACING_TYPE=PWR
C8270
2%
2%
50V
50V
2 NP0-C0G-CERM 2 NP0-C0G-CERM
0201
0201
2%
50V
2 NP0-C0G-CERM
0201
10%
2 35V
X5R-CERM
0603
65
65
1%
1/32W
MF
01005
CRITICAL
1
C8253
4.7UF
10%
35V
2 X5R-CERM
0603
IN
65
1.00 2
1%
1/32W
MF
01005
R8271
65 60 53
C8250
NET_SPACING_TYPE=PWR
DIDT=TRUE
SWITCH_NODE=TRUE
65
DCR=106MOHM MAX
20%
6.3V
CERM-X5R 2
0402
1
PPVCC_MAIN
PILE051D-SM-COMBO-J72
1
10UF
67 62 60
67 62 60 58 57 56 55 47
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.20 MM
PMEG4010BEA
LDO OUTPUTS
FCBGA
SYM 2 OF 4
C8203
LDO INPUT
LDO
1
C8200
LCM/GRAPE
1
LCD BACKLIGHT
1 CAP PER PIN
XTAL
67 62 60 55
5%
2 25V
C0G-CERM
0201
TABLE_ALT_ITEM
152S1837
152S1789
?
L8225,L8255
TABLE_ALT_HEAD
RDAR://PROBLEM/13487208
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
197S0399
197S0392
?
Y8200
COMMENTS:
TABLE_ALT_ITEM
RDAR://PROBLEM/9936684
R8274
65 60 53
IN
LED_IO_5_A
1
R8275
65 60 53
IN
LED_IO_6_A
1
1.00 2
1.00 2
LDO BYPASS
1%
1/32W
MF
01005
1%
1/32W
MF
01005
67 62 60 56
67 62 60 56
67 62 60 56
67 62 60 56
1
C8275
56PF
2%
1
C8274
67 62 60 56
56PF
67 62 60 56
2%
50V
2 50V
NP0-C0G-CERM 2 NP0-C0G-CERM
0201
67 62 60 56
0201
67 62 60 56
B
PP3V0_SPARE1
PP1V7_VA_VCP
PP3V0_S2R_TRISTAR
PP3V0_ALS
PP3V0_UVLO
PP3V3_ACC
PP3V0_S2R_HALL
PP3V0_S2R_SENSOR
CRITICAL
CRITICAL
1
C8236 1
C8237
2.2UF
67 61
CRITICAL
D8258
4.7UH-3.4A-0.075OHM
62 56
=PPVCC_MAIN_LED
CRITICAL
C8256
1
PMEG4010BEA
2
A
67 62 60 56
(PPLED_OUT_B)
67 62 60 56
DCR=106MOHM MAX
R8280
SOD-323
10UF
65 60 53
20%
6.3V
CERM-X5R 2
0402
IN
LED_IO_1_B
IN
LED_IO_2_B
IN
LED_IO_3_B
PPLED_OUT_B
CRITICAL
CRITICAL
1
C8260
4.7UF
10%
35V
2 X5R-CERM
0603
1
C8261
4.7UF
10%
35V
2 X5R-CERM
0603
1
CRITICAL
1
C8262
4.7UF
10%
2 35V
X5R-CERM
0603
CRITICAL
1
C8263
4.7UF
10%
2 35V
X5R-CERM
0603
CRITICAL
1
C8264
4.7UF
10%
2 35V
X5R-CERM
0603
CRITICAL
CRITICAL
CRITICAL
CRITICAL
C8234 1
C8233
1
C8232 1
C8231
1
C8230 1
20%
20%
6.3V
6.3V 2
CERM-X5R 2 X5R-CERM1
0402
402
10UF
20%
6.3V
CERM-X5R 2
0402
2.2UF
10%
6.3V 2
X5R
402
20%
6.3V
CERM-X5R 2
0402
CRITICAL
CRITICAL
CRITICAL
CRITICAL
C8240 1
C8239
1
C8238 1
4.7UF
1
C8269
65 60 53
1
1.00 2
1%
1/32W
MF
01005
67 62 60 56
1.00 2
67 62 60 56
PP1V3_CAM
PP1V0_SOC
PP2V6_CAM_AF
PP2V9_CAM
PP1V8_ALWAYS
R8282
1
1.00 2
1%
1/32W
MF
01005
56PF
2%
2 50V
NP0-C0G-CERM
0201
C8242
0.22UF
1
C8280
1
56PF
C8281
1
56PF
C8282
56PF
2
2%
2%
2%
50V
50V
50V
NP0-C0G-CERM 2 NP0-C0G-CERM 2 NP0-C0G-CERM
0201
0201
0201
1
C8283
1
20%
6.3V 2
X5R
0201
C8241
10UF
65 60 53
IN
LED_IO_4_B
65 60 53
IN
LED_IO_5_B
IN
LED_IO_6_B
1
1.00 2
1%
1/32W
MF
01005
R8284
1
R8285
65 60 53
1
1.00 2
1%
1/32W
MF
01005
1.00 2
1%
1/32W
MF
01005
56PF
1
C8284
56PF
1
C8285
56PF
2%
2%
2%
50V
50V
50V
2 NP0-C0G-CERM 2 NP0-C0G-CERM 2 NP0-C0G-CERM
0201
0201
0201
8
7
6
5
4
1
4.7UF
4.7UF
4.7UF
20%
20%
20%
20%
6.3V
6.3V 2
6.3V
6.3V
CERM-X5R 2 X5R-CERM1
X5R-CERM1 2 X5R-CERM1 2
0402
402
402
402
R8283
A
10UF
1%
1/32W
MF
01005
R8281
65 60 53
67 62 60
67 62 60 56
K
PILE051D-SM-COMBO-J72
1
CRITICAL
1
C8235
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.20 MM
CRITICAL
L8255
10%
6.3V 2
X5R
402
WLED_LX_B
CRITICAL
10UF
3
10UF
20%
6.3V
CERM-X5R 2
0402
2.2UF
10%
6.3V 2
X5R
402
B
8
7
6
5
4
Edited by Foxit Reader ActiveX For Evaluation Only.
Copyright(C) 2006-2009 Foxit Corporation
3
1
R8303
I2C ADDRESS: 0111100X (0X78)
1
R8398
1
0.00
0%
1/32W
MF
2 01005
C8305
200K
0.1UF
1%
1/20W
MF
2 201
C8306
1
10%
6.3V
2 CERM-X5R
0201
OMIT_TABLE
U8100
D
D2089A0
D
FCBGA
SYM 3 OF 4
R8399
(TEMP1 - NEAR BB)
47
IN
PMU_USB_BRICKID
0
1
TRISTAR1 USE 6.34K
2
5%
1/20W
MF
201
PLACE_NEAR=U8100.R10:10MM
1
R8328
65 60
BOARD_TEMP2_P
100PF
5%
2 16V
NP0-C0G
01005
10KOHM-1%-0.31MA
0201
PLACE_NEAR=U5600.D2:10MM
PLACE_SIDE=TOP
C8328
65
BOARD_TEMP2_N
67 13
PLACE XW AND CAP
CLOSE TO PMU
67 47
5
PLACE_NEAR=U8100.R9:10MM
2
XW8327
1
(TEMP2 - NEAR PROX)
IN
IN
IN
67
2
IN
21 5
IN
60 47
IN
5
IN
59
IN
T8
GPIO_SOC2PMU_KEEPACT
(INTERNAL PULL-DOWN) T9
PMU_SHDWN
64 60 5
IN
64 60 5
BI
64 5
IN
64 5
IN
2
SM
1
R8321
C
65
BOARD_TEMP3_N
E12
E13
DWI_AP_CLK
DWI_AP_DO
NC_DWI_AP_DI
(INTERNAL PULL-DOWN) E11
(INTERNAL PULL-DOWN) E10
E9
NO_TEST=TRUE
100PF
0201
PLACE_SIDE=TOP
C8321
64
I2C0_SCL_1V8
I2C0_SDA_1V8
NET_SPACING_TYPE=BOARD_TEMP
NET_SPACING_TYPE=BOARD_TEMP
2
PLACE_NEAR=U8100.R13:10MM
NET_SPACING_TYPE=BOARD_TEMP
XW8321
(TEMP3 - TOP SIDE NEAR WIFI)
1
2
NET_SPACING_TYPE=BOARD_TEMP
SM
1
1
R8322
C8322
100PF
65
BOARD_TEMP4_N
0201
NET_SPACING_TYPE=BOARD_TEMP
XW8322
1
67 60 54
BATT_NTC
IN
2
XW8323
C8340
65
60
BOARD_TEMP5_P
65
BOARD_TEMP5_N
R8323
C8323
TDEV1
TDEV2
TDEV3
TDEV4
TDEV5
TDEV6
TDEV7
TDEV8
TBAT
TCAL
CRITICAL
R8340
T12
V13
M17
T11
U13
T13
PMU_IREF
PMU_VREF
PMU_VDD_REF
NET_SPACING_TYPE=ANLG
NET_SPACING_TYPE=ANLG
NET_SPACING_TYPE=ANLG
T6
T5
T4
R3
P3
N3
M3
L3
K3
J3
H3
G3
F3
E3
D3
C3
C4
AMUX_A0
AMUX_A1
AMUX_A2
AMUX_A3
AMUX_AY
AMUX_B0
AMUX_B1
AMUX_B2
AMUX_B3
AMUX_BY
E4
F4
G6
J6
G4
K4
1UF
C8308
1.0UF
20%
2 10V
X5R-CERM
0201-1
10%
2 10V
X5R
402-1
PMU_VDD_RTC
PMU_ADC_REF
NET_SPACING_TYPE=ANLG
OUT_32K T14
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
0.1UF
10%
2 6.3V
CERM-X5R
0201
PLACE_NEAR=U8100.M17:4MM
1
PMU_OUT_32K_CLK_GPS
67
PMU_GPIO_CLK_32K_OSCAR
PMU_GPIO_CLK_32K_WLAN
PMU_GPIO_BT_REG_ON
PMU_GPIO_WLAN_REG_ON
PMU_GPIO_PMU2BBPMU_RST_R_L
UART5_BATT_TRXD
PMU_GPIO_BT_HOST_WAKE
PMU_GPIO_WLAN_HOST_WAKE
PMU_GPIO_BB2PMU_HOST_WAKE
PMU_GPIO_CODEC_HS_INT_L
PMU_GPIO_MB_HALL1_IRQ
GPIO_TS2SOC2PMU_INT
PMU_GPIO_MB_HALL2_IRQ
PMU_GPIO_CODEC_RST_L
NC_PMU_GPIO15 NO_TEST=TRUE
PMU_GPIO_OSCAR2PMU_HOST_WAKE
PMU_GPIO_BB_VBUS_DET
PPVDD_CPU_SOC_SENSE
PPVDD_GPU_SOC_SENSE
PPVDD_SOC_SOC_SENSE
NET_SPACING_TYPE=ANLG
MIN_LINE_WIDTH=0.1MM
MIN_NECK_WIDTH=0.1MM
OUT
64 68
1
OUT
19 60 64
OUT
46 64
10%
6.3V
2 X5R-CERM
01005
OUT
46 61
OUT
46 61
C8310
1000PF
R8330
1.00K2
1
IN
5 54 64
IN
46
IN
46
IN
25 29 60
IN
15 60
IN
20 60
IN
5 47
IN
50 60
OUT
15 67
IN
OUT
PMU_GPIO_PMU2BBPMU_RST_L
OUT
25 27 60 67
5%
1/32W
MF
01005
5 19
C
25 28 61 67
IN
11 61 67
IN
11 61 67
IN
10 61 67
IN
11 67
IN
11 67
IN
10 67
TP_AMUX_A3
TP_AMUX_AY
PPVDD_CPU_RAIL_SENSE
PPVDD_GPU_RAIL_SENSE
PPVDD_SOC_RAIL_SENSE
J4
K6
L6
H4
TP_AMUX_B3
TP_AMUX_BY
3.92K
5%
16V
NP0-C0G 2
01005
1
0.1%
0201
1/20W
MF
RESISTOR FOR TEMP CALIBRATION
2
SM
5%
2 16V
NP0-C0G
01005
0201
DWI_CK
DWI_DI
DWI_DO
IREF
VREF
VDD_REF
VDD_REF_A
VDD_RTC
ADC_REF
C8307
XW8324
1
100PF
10KOHM-1%-0.31MA
SCL
SDA
PLACE_NEAR=U8100.T11:3MM
1
PLACE_NEAR=U8100.M4:10MM
PLACE_NEAR=U8100.L4:10MM
1
1
100PF
2
SM
1
PMU_TCALNET_SPACING_TYPE=ANLG
PLACE_NEAR=U8100.L4:10MM
2
CRITICAL
NET_SPACING_TYPE=ANLG
60
1
PLACE_SIDE=TOP
NET_SPACING_TYPE=BOARD_TEMP
2
SM
(TEMP4 - TOP SIDE NEAR AJ FLEX CONN)
PLACE_NEAR=U1600.A1:10MM
NET_SPACING_TYPE=BOARD_TEMP
PLACE_NEAR=U8100.R14:10MM
5%
16V
2 NP0-C0G
01005
10KOHM-1%-0.31MA
PLACE_SIDE=TOP
BOARD_TEMP4_P
PLACE_NEAR=U8100.R14:10MM
CRITICAL
PLACE_NEAR=J1800.18:10MM
65
60
RESET_IN1
RESET_IN2
RESET_IN3
RESET*
IRQ*
R9
R10
R13
R14
L4
M4
N4
P4
R16
R15
NET_SPACING_TYPE=BOARD_TEMP
5%
2 16V
NP0-C0G
01005
10KOHM-1%-0.31MA
PLACE_NEAR=U5800.30:10MM
BOARD_TEMP3_P
PLACE_NEAR=U8100.R13:10MM
CRITICAL
KEEPACT
SHDN
OUT
XW8328
1
ACC_ID
BRICK_ID
ADC_IN7
ADC_IN31
(INTERNAL PULL-DOWN) R5
WDOG_SOC2PMU_RESET_IN
R6
TS2PMU_RESET_IN
R7
SOCHOT1_L
R8
RESET_SOC_L
61 60 47 25 13 4
OUT
T15
(PULLUP
INSIDE
SOC)
GPIO_PMU2SOC_IRQ_L
5
PLACE_NEAR=U8100.R10:10MM
1
BUTTON1
BUTTON2
BUTTON3
BUTTON4
ACC_DET
R12
P16
N16
R11
SM
65
60
D5
D6
D7
D8
T7
GPIO_BTN_HOME_L
GPIO_BTN_ONOFF_L
GPIO_BTN_SRL_L
GPIO_BTN_BUTTON4
PMU_E75_ACC_DET_L
PMU_ACC_ID
PMU_USB_BRICKID_R
ADC_IN7
1
CRITICAL
IN
21 5
ANALOG MUX
PA_NTC_N
2
60 50 5
DIGITAL
ANALOG
INPUT
INPUT
32K REFRENCES
CLK
PLACE_NEAR=U4000.1:10MM
PA_NTC_P
65
0.01UF
WDOG
100PF
5%
16V
2 NP0-C0G
01005
0201
65
60
C8302
10%
2 6.3V
X5R
01005
RESET
R8327
C8327
0.01UF
10%
6.3V
2 X5R
01005
GPIO
1
C8301
1
I2C & DWI
10%
6.3V
2 X5R
01005
PLACE_NEAR=U8100.R9:10MM
10KOHM-1%-0.31MA
PLACE_SIDE=TOP
C8300
0.01UF
1
CRITICAL
1
TEMPERATURE
1
PLACE_NEAR=U8100.N4:10MM
XW8325
2
1
(TEMP5 - TOP SIDE NEAR NAND)
2
SM
PLACE_NEAR=U8100.P4:10MM
65
60
1
PLACE_NEAR=U8100.M4:10MM
65
R8324
SWITCH TO GATE POWER TO SOC AND NAND.
100PF
0201
PLACE_NEAR=J2800.1:10MM
TPS22924X
2
62
1
1
BOARD_TEMP7_P
10UF
65
BOARD_TEMP7_N
10V
2 X5R-CERM
67 62 60 59 55
10KOHM-1%-0.31MA
2
10%
6.3V
01005
65 60
BOARD_TEMP8_P
65
BOARD_TEMP8_N
BUCK6 POWER IS ON IN HIBERNATE DUE TO WIFI PAS
SWITCH NEEDED TO GATE POWER TO NAND AND SOC
PLACE_NEAR=U8100.P4:10MM
1
C8326
100PF
5%
16V
2 NP0-C0G
01005
10KOHM-1%-0.31MA
0201
PLACE_NEAR=U8100.K9:10MM
PLACE_SIDE=BOTTOM
C8365
0.01UF
1
R8326
60 62 67
2 X5R
(TEMP7 - BOTTOM SIDE NEAR SOC)
CRITICAL
PP1V8_EXT_SW
GND
1
5%
2 16V
NP0-C0G
01005
0201
A1
B1
C2 ON
PP1V8_SW1
0402-2
100PF
PLACE_NEAR=U0600.W19:10MM
PLACE_SIDE=BOTTOM
65 60
C8325
VOUT
VIN
C8360
20%
PLACE_NEAR=U8100.N4:10MM
CSP
A2
B2
=PP1V8_S2R_EXT_SWITCH
1
R8325
B
U8360
(TEMP6 TOP SIDE NEAR REAR CAM)
CRITICAL
NEEDED FOR J72 ROUTING.
CRITICAL
5%
2 16V
NP0-C0G
01005
10KOHM-1%-0.31MA
PLACE_SIDE=TOP
2
SM
C8324
2
62
(TEMP8 - BOTTOM SIDE NEAR PMU)
67 62 60 58 56 55 47
=PP3V3_S2R_SWITCH
1
PPVCC_MAIN
C8355
1.0UF
1
A
1
B
1
XW8326
1
C1
CRITICAL
BOARD_TEMP6_P
BOARD_TEMP6_N
C8550
20%
6.3V
0201-1
CRITICAL
2 X5R
VDD
0.1UF
10%
16V
2 X5R-CERM
0201
A
U8350
SLG5AP1443V
VCC_MAIN_PP3V3SW_RAMP 7
CAP
TDFN
D
3
S
5
TABLE_ALT_HEAD
ALTERNATE FOR
PART NUMBER
BOM OPTION
107S0150
107S0208
?
REF DES
COMMENTS:
62 61 14
2
=PP1V8_NAND
TABLE_ALT_ITEM
1
R8352
RDAR://PROBLEM/8380367
100K
R8321,R8322,R8323,R8324,R8325,R8326
5%
1/32W
MF
2 01005
8
7
6
5
1
CRITICAL
C8552
ON
PP3V3_SW
GND
8
PART NUMBER
4700PF
1
60 62 67
CRITICAL
C8356
10UF
20%
10V
2 X5R-CERM
0402-2
10%
10V
201
2 X7R
4
3
2
1
8
7
6
5
4
Edited by Foxit Reader ActiveX For Evaluation Only.
1
Copyright(C)22006-2009 Foxit Corporation
3
OMIT_TABLE
U8100
D2089A0
FCBGA
SYM 4 OF 4
D
THROTTLER
M1
M2
VSS_BUCK01
T1
T2
VSS_BUCK1_12
H1
H2
VSS_BUCK0_12
U6
V6
VSS_BUCK25
A6
B6
VSS_BUCK34
D1
D2
VSS_BUCK06
D18 VSS_WLED
D19
B18 VSS_LCM
62 13 7 5 4
ADDITIONAL PARALLEL RESISTORS
TO INCREASE RESISTANCE OPTIONS
XW8410
67 62 60 57 56 55 47
STUFF EITHER R8440 OR R8445 BUT NOT BOTH
SHORT-10L-0.1MM-SM
1
2
61 VCC_MAIN_UVLO_SENSE
PPVCC_MAIN
=PP3V0_SPARE1
1
1
C
R8412
100K
392K
1%
1/32W
MF
01005 2
1%
1/32W
MF
01005 2
A3
61
UVLO_COMP_NEG B2
3
MAX9039BEBT+
D
UCSP
APN 353S4103
A2
NOSTUFF
R84111
51.1K
1%
1/32W
MF
01005 2
B1
R84131
51.1K
THROTTLER_OUT
1.00K2
R8445
SOCHOT0_R_L
1
0.00 2
SOCHOT0_L
OUT
5
0%
1/32W
MF
01005
Q8440
G
DMN2990UFA
DFN0806-VML0806-COMBO-N78
1
R8435
100K
UVLO_COMP_REF
1
2
S
A1
1%
1/32W
MF
01005 2
UVLO_COMP_REF
61
B3
R8425
61 58
5%
1/32W
MF
2 01005
U8400
REF
1%
1/32W
MF
01005
VCC
150K 2
VEE
1
100K
61
R8420
=PP3V0_UVLO
NOSTUFF
R8440
C8400
20%
6.3V
2 X5R-CERM
01005
NOSTUFF
62
1
62
0.1UF
1
R8410
A19
D15
V19
D4
C5
C6
C7
C8
D9
D10
D11
D12
D13
D14
E17
F7
F8
F9
F10
F11
F12
F13
G7
G8
G9
G10
G11
G12
G13
H7
H8
H9
=PP1V8_SOC
5%
1/32W
MF
2 01005
58 61
1
R8430
61
1%
1/32W
MF
01005
UVLO_COMP_POS
1
187K 2
1%
1/32W
MF
01005
VSS
VSS
H10
H11
H12
H13
J7
J8
J9
J10
J11
J12
J13
K7
K8
K9
K10
K11
K12
K13
L7
L8
L9
L10
L11
L12
L13
M7
M8
M9
M10
M11
M12
M13
N6
N7
N8
N9
N10
N11
N12
N13
P8
P9
P10
P11
P12
P13
R4
T3
U3
D
C
B
B
ADD A VIA PER PIN FOR ALL VSS_* AND VSSA_* PINS
A
A
8
7
6
5
4
3
8
7
6
5
4
Edited by Foxit Reader ActiveX For Evaluation Only.
1
Copyright(C)22006-2009 Foxit Corporation
3
D
D
DEBUG RESET ACCESS
62 5
=PP1V8_S2R_MISC
NOSTUFF
1
R9000
1K
67 62 60 57 55
PP1V8_SW1
5%
1/16W
MF-LF
2 402
NOSTUFF
1
R9001
1K
60 5
OUT
GPIO_FORCE_DFU
5%
1/16W
MF-LF
2 402
TP9000
1
A
TP-P55
PLACE_SIDE=TOP
57
OUT
PMU_SHDWN
TP9001
1
A
TP-P55
C
C
B
B
A
8
7
6
5
4
3
8
7
POWER
I211
I212
I215
I216
I219
I218
I217
I220
I221
I222
D
I223
I225
I224
I227
I228
I229
I230
I233
I232
I231
I234
I235
I237
I236
I238
I239
I240
I241
I244
I243
I242
I245
I246
I247
I145
I402
I349
I352
I407
I298
I297
I347
I296
C
I299
I401
I345
6
I295
I302
I303
I304
I305
I306
I307
PPVDD_CPU
PPVDD_GPU
PPVDD_SOC
PP1V8_S2R
PP1V8_SW1
PP1V8_SW1_FOREHEAD
PP1V8_EXT_SW
PP1V8_SW2
PP1V8_S2R_SW3
PP1V8_S2R_SW3_COMP
PP1V2_S2R
PP1V2_SW1
PP1V2_S2R_SW2
PPVDD_SRAM
PP3V3_S2R
PP3V3_SW
PP3V0_SPARE1
PP1V7_VA_VCP
PP3V0_S2R_SENSOR
PP3V0_ALS
PP3V3_ACC
PP3V0_S2R_TRISTAR
PP3V0_S2R_HALL
PP1V3_CAM
PP1V0_SOC
PP2V6_CAM_AF
PP2V9_CAM
PP5V25_GRAPE
PPVCC_MAIN
PPBATT_VCC
PPVBUS_USB_DCIN
PP1V8_ALWAYS
PPLED_OUT_A
PPLED_OUT_B
PP6V0_LCM_VBOOST
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
I336
I338
I380
I381
I308
I311
I346
PPBATT_POS_RC
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
PMU_VCENTER
PPVBUS_PROT
VBUS_PROT_G
PP1V2_CAM_FRONT_FILT
PP1V3_CAM_REAR_FILT
PP1V7_VCP
PP1V8_CAM_FRONT_FILT
PP1V8_CAM_REAR_FILT
PP1V8_DMIC_FILT
PP1V8_GRAPE_SW
55 56 62 67
I273
55 57 59 62 67
I274
62 67
I275
I277
55 62 67
I278
62 67
I279
55 56 62 67
I286
55 62 67
I292
55 62 67
I293
I397
I398
I333
GPIO_SOC2BB_RADIO_ON_L
GPIO_SOC2BB_RST_L
GPIO_SOC2GRAPE_RESET_FILT_L
GPIO_OSCAR_RESET_L
CLK_32K_SOC2CUMULUS_FILT
HP_ALS_IRQ_L_CONN_FILT
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
22
I79
5 59
I50
I51
5 25 27
I53
5 25 27 67
I54
I55
I59
PMU GPIO
FUNC_TEST=TRUE
I280
56 62 67
I281
56 62 67
I283
56 62 67
I282
56 62 67
I284
PMU_GPIO_BB2PMU_HOST_WAKE
PMU_GPIO_BT_REG_ON_R
PMU_GPIO_CLK_32K_OSCAR
PMU_GPIO_CLK_32K_WLAN_R
PMU_GPIO_CODEC_HS_INT_L
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
PMU_GPIO_PMU2BBPMU_RST_L
PMU_GPIO_WLAN_REG_ON_R
PMU_TCAL
PMU_E75_ACC_DET_L
TS_E75_ACC_DET_L
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
PMU_GPIO_MB_HALL1_IRQ
PMU_GPIO_MB_HALL2_IRQ
FUNC_TEST=TRUE
FUNC_TEST=TRUE
I58
25 29 57
I57
46
I60
19 57 64
I61
I285
56 62 67
I287
56 62 67
I291
56 62 67
I353
56 62 67
I408
I354
55 60 62 67
I355
I63
46
I64
47 57
47
I65
I66
20 57
I67
50 57
I68
I69
I71
56 62 67
I70
56 62 67
I72
B
I419
PP3V0_UVLO
FUNC_TEST=TRUE
55
I73
55 67
I74
47 55 67
I76
55
I75
AUDIO
I267
15 67
I266
22 67
I265
23 67
I268
16 67
I269
51 52 61 67
I324
24 67
I270
23 67
I271
22 67
I158
23 67
I159
22 67
I162
67
I163
67
I358
20 50 67
I359
I78
CONN_HP_HEADSET_DET_FILT
CONN_HP_HS3_FILT
CONN_HP_HS3_REF_FILT
CONN_HP_HS3_FILT
CONN_HP_HS3_REF_FILT
CONN_HP_HS4_FILT
CONN_HP_HS4_REF_FILT
CONN_HP_LEFT_FILT
CONN_HP_RIGHT_FILT
SPKRAMP_L1_OUT_N
SPKRAMP_L1_OUT_P
SPKRAMP_R1_OUT_N
SPKRAMP_R1_OUT_P
SPKRAMP_L2_OUT_N
SPKRAMP_L2_OUT_P
SPKRAMP_R2_OUT_N
SPKRAMP_R2_OUT_P
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
LEFT_CH_OUT_P
LEFT_CH_OUT_N
RIGHT_CH_OUT_P
RIGHT_CH_OUT_N
AIN3P
AIN3N
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
TP_BB_TEST_MODE_0
TP_BB_TEST_MODE_1
FUNC_TEST=TRUE
FUNC_TEST=TRUE
24 67
I387
67
I388
67
I389
45 67
I390
56 60 62 67
I391
53 67
I392
I400
26 28 68
I77
15 16
I309
15 16 60 65
I290
15 16 60 65
15 16 60 65
I310
E75_DPAIR1_CONN_P
E75_DPAIR1_CONN_N
E75_DPAIR2_CONN_P
E75_DPAIR2_CONN_N
PPVBUS_E75_USB_CONN
JTAG_SOC_SEL
JTAG_SOC_TCK
JTAG_SOC_TDI
TP_JTAG_SOC_TDO
JTAG_SOC_TMS
JTAG_SOC_TRST_L
SOC_TESTMODE
RESET_SOC_L
PS_HOLD_PMIC
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
SL9311
53 56 65
1
53 56 65
SL-1.1X0.4-1.4X0.7
53 56 65
54 64
54 57 60 67
FOREHEAD B2B STANDOFFS
STD9300
47 49 60
STDOFF-3.3X1.8R1.17H-SM-1
48 49 60 67
48 49 60 67
1
47 49 60 64
47 49 60 64
47 49 60 64
47 49 60 64
STD9301
48 49 60 67
STDOFF-3.3X1.8R1.17H-SM-1
4 13
1
4 47 64
4 64
4 64
4 47 64
STD9302
4 13 64
STDOFF-3.3X1.8R1.02H-SM
4 13
4 13 25 47 57 61 67
1
NOTE: BOTTOM OF FOREHEAD
25 27
C
BUTTONS
FUNC_TEST=TRUE
15 16 65
18 49 65
I124
18 49 65
I125
17 49 65
I126
17 49 65
I127
18 49 65
I128
GPIO_BTN_ONOFF_L_FILT
GPIO_BTN_HOME_L
GPIO_BTN_VOL_UP_L_FILT
GPIO_BTN_VOL_DOWN_L_FILT
GPIO_BTN_SRL_L_FILT
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
21
5 50 57
21
21
GRAPE AND DISPLAY B2B STANDOFFS
21
18 49 65
STD9305
17 49 65
STDOFF-3.3X1.8R1.17H-SM-1
17 49 65
15 18 65
STD9306
15 18 65
STDOFF-3.3X1.8R1.17H-SM-1
15 17 65
15 17 65
1
15
15
STD9307
I414
GND_AUDIO_CODEC
DMIC1_FF_SCLK_FILT
DMIC1_FF_SD_FILT
L81_SPEAKER_VQ
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
BOARD TEMPFUNC_TEST=TRUE
15 67
16 64
I395
16 64
I166
15
I167
I168
I169
26 31 68
I170
26 68
PA_NTC_P
BOARD_TEMP2_P
BOARD_TEMP3_P
BOARD_TEMP4_P
BOARD_TEMP5_P
BOARD_TEMP6_P
BOARD_TEMP7_P
BOARD_TEMP8_P
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
STDOFF-3.3X1.8R1.17H-SM-1
1
57 65
57 65
57 65
57 65
57 65
57 65
57 65
57 65
26 68
56 62 67
USB
GRAPE
I368
28
I375
28
I156
19
GPIO_GRAPE2SOC_IRQ_L
GPIO_SOC2GRAPE_RESET_L
CLK_32K_SOC2CUMULUS
DISPLAY_SYNC
SPI2_GRAPE_SCLK
SPI2_GRAPE_MISO
SPI2_GRAPE_MOSI
SPI2_GRAPE_CS_L
VCC_MAIN_GRAPE_RAMP
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
5 52 61
I288
5 52 61 67
I289
PLACE_NEAR=J7500.4:10MM
5 52 61 64
5 52 61 64
I259
5 52 61 64
I260
51
I258
I263
I406
55 60 62 67
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FID9300
I409
5 47 64
0P5SM1P0SQ-NSP
I410
1
FUNC_TEST=TRUE
ISP0_CAM_REAR_CLK_F
FUNC_TEST=TRUE
ISP0_CAM_REAR_SCL_F
FUNC_TEST=TRUE
ISP0_CAM_REAR_SDA_F
ISP0_CAM_REAR_SHUTDOWN_L_F FUNC_TEST=TRUE
FUNC_TEST=TRUE
ISP1_CAM_FRONT_CLK_F
FUNC_TEST=TRUE
ISP1_CAM_FRONT_SCL_F
FUNC_TEST=TRUE
ISP1_CAM_FRONT_SDA_F
ISP1_CAM_FRONT_SHUTDOWN_L_F FUNC_TEST=TRUE
FID9301
FID
0P5SM1P0SQ-NSP
1
23 64
23 64
FID9302
23 64
23 67
FID
22 64
0P5SM1P0SQ-NSP
1
22 64
FID9303
FID
0P5SM1P0SQ-NSP
22 64
1
22 67
5 47 64
FID9304
TP-1P0-TOP
PLACE_NEAR=J7500.4:10MM
4 47 64
CAMERA
5 52 61 64
I261
UART0_SOC_RXD
UART0_SOC_TXD
B
4 47 64
FID
4 52 61
55 60 62 67
I405
PLACE_NEAR=J7500.4:10MM
FUNC_TEST=TRUE
FUNC_TEST=TRUE
USB_SOC_N
USB_SOC_P
5 52 61 64
UART
TP-1P0-TOP
FID
NAND
55 60 62 67
TP-1P0-TOP
I272
0P5SM1P0SQ-NSP
FUNC_TEST=TRUE
FMI0_CE0_L
1
6 14 61 66
FID9305
FID
0P5SM1P0SQ-NSP
TP9305
1
DISPLAY
PLACE_NEAR=J7500.3:10MM
A
TP-1P0-TOP
I313
TP9306
1
I2C
I314
I315
TP-1P0-TOP
TP9307
1
PLACE_NEAR=J7500.3:10MM
A
I253
I252
TP-1P0-TOP
I254
I255
I420
TP9310
1
PPVBUS_E75_USB_CONN
A
I421
1
RF FIXTURE
FUNC_TEST=TRUE
DISPLAY_SYNC_FILT
PLACE_NEAR=J7500.3:10MM
A
A
SL-1.1X0.4-1.4X0.7
TH-NSP
53 56 65
53 56 65
15 16 65
15 16 65
I262
TP9302
1
PPBATT_VCC
A
D
1
15 16 65
25 26 28 29 31
I157
TP9301
1
PPBATT_VCC
A
SL9310
TH-NSP
53 56 65
15 16 60 65
26 28 31 68
I404
TP9300
1
PPBATT_VCC
A
SL-1.1X0.4-1.4X0.7
SL-1.1X0.4-1.4X0.7
53 67
53 67
I155
I369
SL9302
TH-NSP
53 56 65
1
19 67
I154
GPIO_SOC2OSCAR_DBGEN_RFUNC_TEST=TRUE
1
53 56 65
19 67
I363
I341
PPOUT_E75_ACC_ID1_CONN
PPOUT_E75_ACC_ID2_CONN
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
REEST JTAG/CONFIG
FUNC_TEST=TRUE
I364
I340
E75_ACC_DET_CONN_L
56 67
23 67
SL9301
TH-NSP
SL-1.1X0.4-1.4X0.7
53 56 65
E75
I171
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
BATT_SWI_CONN
BATT_NTC
57
55 62 67
67
53 56 65
BATTERY
25 27 57 67
56 62 67
FUNC_TEST=TRUE
PP3V0_GYRO
FUNC_TEST=TRUE
PP3V0_ACCEL
FUNC_TEST=TRUE
PP3V0_COMP
FUNC_TEST=TRUE
PP3V0_SENSOR_PROX_FILT
FUNC_TEST=TRUE
PP3V0_SENSOR_PROX_ADUX1049_FILT
FUNC_TEST=TRUE
PP3V0_SENSOR_PROX_AD7149_FILT
FUNC_TEST=TRUE
PP5V25_GRAPE
FUNC_TEST=TRUE
PPVCC_MAIN_LCD_SW_CONN
FUNC_TEST=TRUE
PPVCC_MAIN_LCD_SW
PP_LDO1
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
LED_IO_1_B
LED_IO_2_B
LED_IO_3_B
LED_IO_4_B
LED_IO_5_B
LED_IO_6_B
15 57
56 60 62 67
47 55 56 57 58 62 67
1
53 56 65
46
I172
I384
PPLED_BACK_REG_B
56 62 67
56 62 67
SL9300
TH-NSP
53 67
53 56 65
1
I80
55 62 67
56 62 67
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
5 19 67
I56
57 62 67
PPLED_BACK_REG_A
LED_IO_1_A
LED_IO_2_A
LED_IO_3_A
LED_IO_4_A
LED_IO_5_A
LED_IO_6_A
64
55 62 67
I399
I331
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
I52
55 62 67
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
GPIO_CAM_ALS2SOC_IRQ_L_F
GPIO_FORCE_DFU
GPIO_GRAPE2SOC_IRQ_FILT_L
57 62 67
FUNC_TEST=TRUE
PP1V8_COMP
FUNC_TEST=TRUE
PP2V6_CAM_REAR_AF_FILT
PP2V9_AVDD_CAM_FRONT_FILTFUNC_TEST=TRUE
PP2V9_AVDD_CAM_REAR_FILT FUNC_TEST=TRUE
FUNC_TEST=TRUE
PP3V0_ALS_FILT
FUNC_TEST=TRUE
PP3V0_HP_ALS_FILT
FUNC_TEST=TRUE
PP3V0_IO_ALS_FILT
FUNC_TEST=TRUE
PP3V0_S2R_HALL_FILT
PP_SMPS1_MSMC_1V05
PP_SMPS2_RF1_1V3
PP_SMPS3_MSME_1V8
PP_SMPS4_RF2_2V05
PP_SMPS5_DSP_1V05
DRILL SIZE: 1.1MM X 0.4MM
PLATING SIZE: 1.4MM X 0.7MM
BACKLIGHT
GPIO
I396
I330
PLATED THROUGH HOLES
55 62 67
55 62 67
I361
I337
Edited by Foxit Reader ActiveX For Evaluation Only.
1
Copyright(C)22006-2009 Foxit Corporation
3
55 62 67
I360
I334
4
SMT TEST FIXTURE TP
I323
I339
5
I2C3_CAM_ALS_SCL_1V8_F
I2C3_CAM_ALS_SDA_1V8_F
I2C0_HP_ALS_SCL_1V8_FILT
I2C0_HP_ALS_SDA_1V8_FILT
I2C0_SCL_1V8
I2C0_SDA_1V8
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
I194
22 64
I195
22 64
I196
64
I197
64
I198
5 57 64
I199
5 57 64
I316
E75_DPAIR1_CONN_N
E75_DPAIR1_CONN_P
E75_DPAIR2_CONN_N
E75_DPAIR2_CONN_P
PPVBUS_E75_USB_CONN
PPOUT_E75_ACC_ID1_CONN
PPOUT_E75_ACC_ID2_CONN
E75_ACC_DET_CONN_L
BATT_NTC
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
47 49 60 64
47 49 60 64
47 49 60 64
47 49 60 64
48 49 60 67
48 49 60 67
48 49 60 67
47 49 60
54 57 60 67
48 49 60 67
PLACE_NEAR=J6200.9:20MM
TP-1P0-TOP
TP9311
1
PPVBUS_E75_USB_CONN
A
A
48 49 60 67
PLACE_NEAR=J6200.9:20MM
TP-1P0-TOP
TP9312
1
PPVBUS_E75_USB_CONN
A
48 49 60 67
SIM
PLACE_NEAR=J6200.9:20MM
TP-1P0-TOP
TP9315
1
A
I370
PLACE_NEAR=TP9310.1:30MM
TP-1P0-TOP
I371
TP9316
1
I372
A
TEST POINT RULES:
CENTER TO CENTER SPACING >= 1MM
DIAMETER >= 0.5MM
EDGE TO SHIELD >=0.55MM
PLACE_NEAR=TP9310.1:30MM
TP-1P0-TOP
TP9317
1
A
PLACE_NEAR=TP9310.1:30MM
TP-1P0-TOP
8
7
I373
I374
6
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
SIMCRD_RST_CONN
SIMCRD_CLK_CONN
SIMCRD_IO_CONN
SIM_TRAY_DETECT
PP_LDO6_RUIM_1V8
5
29 44
29 44
29 44
29 44
26 28 44 68
4
3
2
1
8
7
6
5
4
3
Edited by Foxit Reader ActiveX For Evaluation Only.
1
Copyright(C)22006-2009 Foxit Corporation
FOR FRANK (SEG)
EE CHARACTERIZATION TP
PP9400
P4MM SM
PP9401
P4MM SM
PP9402
SM
NAND
BOTTOM SIDE
BOTTOM SIDE
PP9460
P4MM SM PP
PP9461
P4MM SM PP
1
1
I40
I41
I42
I43
I45
I46
I47
I48
I49
I50
I53
TOP SIDE
TOP SIDE
1
PLACE_NEAR=U0600.AA7:1MM
11 57 67
11 57 67
DRAM
6 14 61 66
NEAR DRAM
PP9410
P4MM SM
PP9411
P4MM SM
PP9412
P4MM SM
PP9413
P4MM SM
PP9414
P4MM SM
PP9415
P4MM SM
PP9416
P4MM SM
PP9417
P4MM SM
PP9418
P4MM SM
PP9419
P4MM SM
6 14 66
6 14 66
FUNC_TEST=TRUE
FUNC_TEST=TRUE
PLACE_SIDE=TOP
TP_FMI_TCKC_NAND
=PP1V8_NAND
PLACE_SIDE=TOP
6 66
14 66
14
14
14 57 62
PLACE_SIDE=TOP
GND
EE
RESET_SOC_L
4 13 25 47 57 60 67
1
TP_ANALOGMUXOUT
4
1
SOCHOT0_R_L
58
FUNC_TEST=TRUE
TP_GPIO_DFU_STATUS
PLACE_NEAR=U0600.AM36:3MM
MIPI1C_CAM_FRONT_CLK_N
PLACE_NEAR=U0600.AN35:3MM
MIPI1C_CAM_FRONT_DATA_P<0>
PLACE_NEAR=U0600.AN36:3MM
MIPI1C_CAM_FRONT_DATA_N<0>
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
1
PLACE_NEAR=U1400.AF14:1MM
DDR0_CK_N
8 12 61 66
NO_XNET_CONNECTION=TRUE
1
I237
PLACE_NEAR=U1400.AF15:1MM
DDR0_CK_P
I238
8 12 61 66
NO_XNET_CONNECTION=TRUE
1
I239
PLACE_NEAR=U1400.AF16:1MM
DDR0_CKE<0>
I240
8 12 61 66
NO_XNET_CONNECTION=TRUE
1
I243
PLACE_NEAR=U1400.AE17:1MM
DDR0_CKE<1>
I242
8 12 61 66
NO_XNET_CONNECTION=TRUE
1
I241
PLACE_NEAR=U1400.AE21:1MM
DDR0_CA<0>
PLACE_NEAR=U1400.B18:1MM
DDR0_DQ<2>
I246
8 12 61 66
I247
PLACE_NEAR=U1400.C8:1MM
DDR0_DQS_N<3>
I248
8 12 61 66
NO_XNET_CONNECTION=TRUE
1
I249
PLACE_NEAR=U1400.B8:1MM
DDR0_DQS_P<3>
I258
8 12 61 66
NO_XNET_CONNECTION=TRUE
1
I250
PLACE_NEAR=U1400.C15:1MM
DDR0_DQS_N<0>
I251
8 12 61 66
NO_XNET_CONNECTION=TRUE
1
I254
PLACE_NEAR=U1400.B15:1MM
DDR0_DQS_P<0>
PP9420
P4MM SM
PP9421
P4MM SM
PP9422
P4MM SM
PP9423
P4MM SM
PP9424
P4MM SM
PP9425
P4MM SM
PP9426
P4MM SM
PP9427
P4MM SM
PP9428
P4MM SM
7 22 61 65
7 22 61 65
7 22 61 65
7 22 61 65
PP
I253
8 12 61 66
NO_XNET_CONNECTION=TRUE
PP
PP
PP
PP
PP
PP
PP
PP
1
I244
PLACE_NEAR=U1400.T26:1MM
DDR1_CK_N
I252
8 12 61 66
NO_XNET_CONNECTION=TRUE
1
PLACE_NEAR=U1400.R26:1MM
DDR1_CK_P
52 64
52 64
I255
PLACE_NEAR=U1400.P26:1MM
DDR1_CKE<0>
PLACE_NEAR=U1400.N25:1MM
DDR1_CKE<1>
I61
52 64
I62
52 64
I63
I65
GPIO_GRAPE2SOC_IRQ_L
GPIO_SOC2GRAPE_RESET_L
CLK_32K_SOC2CUMULUS
SPI2_GRAPE_MOSI
SPI2_GRAPE_MISO
SPI2_GRAPE_SCLK
SPI2_GRAPE_CS_L
TP_CUMULUS_S_H_CS_L
TP_CUMULUS_S_H_SCLK
TP_CUMULUS_S_H_SDI
TP_CUMULUS_S_H_SDO
5 52 60
I66
5 52 60 67
I67
5 52 60 64
I68
I260
PLACE_NEAR=U1400.J25:1MM
DDR1_CA<0>
MT_PANEL_IN<0..29>
MT_PANEL_OUT<0..39>
I69
5 52 60 64
I70
52
I71
52 62
51 52 60 67
NO_TEST=TRUE
52 65
NO_TEST=TRUE
52 65
PP9480
P4MM SM PP
PP9481
P4MM SM PP
PP9482
P4MM SM PP
PP9483
P4MM SM PP
PLACE_NEAR=U1400.L25:1MM
DDR1_CA<3>
PLACE_NEAR=U1400.N35:1MM
DDR1_CSN<0>
1
FOR HSIC CHARACTERIZATION
PLACE_NEAR=U0600.A27:3MM
PLACE_NEAR=U0600.B27:3MM
1
HSIC1_WLAN_DATA
PLACE_NEAR=U5800.13:3MM
1
HSIC1_WLAN_STB
PLACE_NEAR=U5800.14:3MM
PMU_GPIO_WLAN_REG_ON
PMU_GPIO_BT_REG_ON
GPIO_BT_WAKE
I5
I267
I6
I8
I7
I9
I10
I11
I12
I13
I14
I268
I15
I16
I17
I18
I141
I140
I139
I138
I142
I144
I145
I143
I146
I149
I150
I148
I147
I152
A
I151
I153
I187
I185
I186
I188
I190
I189
PLACE_NEAR=U0600.AR31:3MM
MIPI0C_CAM_REAR_CLK_P
PLACE_NEAR=U0600.AT31:3MM
MIPI0C_CAM_REAR_CLK_N
1
C
46 57
46 57
5 46
AUDIO
8 12 61 66
I282
L81_DMIC1_FF_SD
FUNC_TEST=TRUE
15
8 12 61 66
7 23 61 65
BASEBAND
7 23 61 65
PLACE_NEAR=U0600.AR33:3MM
MIPI0C_CAM_REAR_DATA_P<0>
NEAR SOC
7 23 61 65
1
PLACE_NEAR=U0600.AT33:3MM
MIPI0C_CAM_REAR_DATA_N<0>
BB_JTAG_TMS
BB_JTAG_TCK
BB_JTAG_TDI
BB_JTAG_TDO
BB_JTAG_TRST_L
USB_BB_DEBUG_P
USB_BB_DEBUG_N
DEBUG_RST_L
PMU_GPIO_BB_VBUS_DET
I27
NO_XNET_CONNECTION=TRUE
PP9435
P4MM SM
PP9436
P4MM SM
PP9437
SM
7 23 61 65
NO_XNET_CONNECTION=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
PP
PP
PP
1
PLACE_NEAR=U0600.D5:1MM
DDR0_DQ<28>
I28
8 12 61 66
NO_XNET_CONNECTION=TRUE
1
I29
PLACE_NEAR=U0600.A6:1MM
DDR0_DQS_N<3>
I30
8 12 61 66
NO_XNET_CONNECTION=TRUE
1
I31
PLACE_NEAR=U0600.A5:1MM
DDR0_DQS_P<3>
I192
8 12 61 66
NO_XNET_CONNECTION=TRUE
I193
NO TEST DUE TO LAYOUT
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
POWER, NO TEST
8 12 61 66
I2C3 TP AT ALS FILTER SIDE
8 12 61 66
8 12 61 66
I194
8 12 61 66
I199
8 12 61 66
I201
8 12 66
I200
PP6V0_LCM_HI
SW_CHGA
WLED_LX_A
WLED_LX_B
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
I307
56 67
55 67
I308
56 67
I274
56 67
I275
8 12 66
I276
8 12 61 66
I277
8 12 61 66
8 12 61 66
I272
8 12 61 66
I273
L81_PVCP
L81_NVCP
NO_TEST=TRUE
NO_TEST=TRUE
I278
15 65
15 65
8 12 61 66
I279
I280
I281
8 12 61 66
I2C3_SCL_1V8
I2C3_SDA_1V8
NO_TEST=TRUE
MAX98304_L1_IN_N
MAX98304_L1_IN_P
MAX98304_R1_IN_N
MAX98304_R1_IN_P
MAX98304_L2_IN_N
MAX98304_L2_IN_P
MAX98304_R2_IN_N
MAX98304_R2_IN_P
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
GPIO_BTN_HOME_CONN_R_L
NO_TEST=TRUE
NO_TEST=TRUE
5 13 22 64
5 13 22 64
18 65
18 65
17 65
17 65
18 65
18 65
17 65
I269
8 12 61 66
I270
8 12 61 66
I271
L81_FLYC
L81_FLYN
L81_FLYP
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
17 65
15 65
15 65
I306
50
15 65
8 12 66
8 12 66
8 12 66
8 12 66
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
EDP_DATA_P<0..3>
EDP_DATA_N<0..3>
EDP_DATA_EMI_P<0..3>
EDP_DATA_EMI_N<0..3>
EDP_DATA_EMI_CONN_P<0..3>
EDP_DATA_EMI_CONN_N<0..3>
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
I300
I301
7 23 61 65
I302
7 23 61 65
I303
7 23 61 65
I304
THROTTLER_OUT
UVLO_COMP_NEG
UVLO_COMP_POS
UVLO_COMP_REF
VCC_MAIN_UVLO_SENSE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
58
NO TEST ON PROX
58
58
58
58
7 23 61 65
23 65
I285
23 65
I286
23 65
I288
23 65
I287
7 22 61 65
I289
7 22 61 65
I290
7 22 61 65
I291
7 22 61 65
I292
22 65
I293
22 65
I294
22 65
I295
22 65
I298
PROX_AD7149_CIN5
PROX_AD7149_CIN7
PROX_AD7149_CIN9
PROX_AD7149_CIN7_FILT
PROX_AD7149_CIN9_FILT
PROX_AD7149_CIN7_CONN
PROX_AD7149_CIN9_CONN
PROX_AD7149_ACSHIELD_CONN
PROX_AD7149_BIAS
ACSHIELD_SB
ACSH_SB
PROX_AD7149_GPIO
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
45
45
45
45
45
45
45
45
45
45
45
45
7 53 65
7 53 65
53 65
53 65
53 65
53 65
7
6
5
4
3
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
5 25 28 64
5 25 28 64
5 25 28 64
5 25 28 64
5 25 28 64
25 28 64
25 28 64
25 28 67
25 28 57 67
FOR HSIC CHARACTERIZATION
PP9485
P4MM SM PP
PP9486
P4MM SM PP
PP9487
P4MM SM PP
PP9488
SM PP
P4MM
CHARGE PUMP OUTPUTS
8 12 61 66
MIPI0C_CAM_REAR_CLK_P
MIPI0C_CAM_REAR_CLK_N
MIPI0C_CAM_REAR_DATA_P<0..1>
MIPI0C_CAM_REAR_DATA_N<0..1>
MIPI0C_CAM_REAR_CLK_FILT_P
MIPI0C_CAM_REAR_CLK_FILT_N
MIPI0C_CAM_REAR_DATA_FILT_P<0..3>
MIPI0C_CAM_REAR_DATA_FILT_N<0..3>
MIPI1C_CAM_FRONT_CLK_P
MIPI1C_CAM_FRONT_CLK_N
MIPI1C_CAM_FRONT_DATA_P<0>
MIPI1C_CAM_FRONT_DATA_N<0>
MIPI1C_CAM_FRONT_CLK_FILT_P
MIPI1C_CAM_FRONT_CLK_FILT_N
MIPI1C_CAM_FRONT_DATA_FILT_P<0>
MIPI1C_CAM_FRONT_DATA_FILT_N<0>
8
4 46 61 64
4 46 61 64
NO_XNET_CONNECTION=TRUE
NO_XNET_CONNECTION=TRUE
DDR0_CA<0..9>
DDR0_CK_P
DDR0_CK_N
DDR0_CA<0..9>
DDR0_CKE<0..1>
DDR0_CSN<0..1>
DDR0_DM<0..3>
DDR0_DQ<0..31>
DDR0_DQS_P<0..3>
DDR0_DQS_N<0..3>
DDR1_CA<0..9>
DDR1_CK_P
DDR1_CK_N
DDR1_CA<0..9>
DDR1_CKE<0..1>
DDR1_CSN<0..1>
DDR1_DM<0..3>
DDR1_DQ<0..31>
DDR1_DQS_P<0..3>
DDR1_DQS_N<0..3>
I4
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
4 46 61 64
4 46 61 64
8 12 61 66
NO_XNET_CONNECTION=TRUE
1
HIGH SPEED, NO TEST
I3
5 46 64
HSIC1_WLAN_DATA
I297
I2
46 64
5 46 64
HSIC1_WLAN_STB
I296
B
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
NO_XNET_CONNECTION=TRUE
P4MM
I1
46
46 62
1
I75
8 12 61 66
NO_XNET_CONNECTION=TRUE
1
46 64
46
1
8 12 61 66
NO_XNET_CONNECTION=TRUE
1
46
46 64
52
I76
PLACE_NEAR=U1400.K25:1MM
DDR1_CA<2>
46 64
52
NO_XNET_CONNECTION=TRUE
1
46 64
52
I78
PLACE_NEAR=U1400.K26:1MM
DDR1_CA<1>
HSIC1_SOC2WLAN_HOST_RDY_R
HSIC1_WLAN2SOC_DEVICE_RDY
HSIC1_WLAN2SOC_REMOTE_WAKE
5 52 60 64
NO_XNET_CONNECTION=TRUE
1
46 64
5 52 60 64
GRAPE NO_TEST
I259
8 12 61 66
=PP3V3_S2R_WIFI_PA
46 64
46 64
5 52 60 64
=PP5V25_GRAPE
PP1V8_GRAPE_SW
8 12 61 66
NO_XNET_CONNECTION=TRUE
1
I60
4 52 60
8 12 61 66
NO_XNET_CONNECTION=TRUE
1
I59
52 64
NO_XNET_CONNECTION=TRUE
1
I58
52 64
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
JTAG_WLAN_TMS_TX_BLANK
TP_JTAG_WLAN_TCK
JTAG_WLAN_TDI_OSCAR_A
JTAG_WLAN_TDO_OSCAR_B
TP_JTAG_WLAN_TRST_L
JTAG_WLAN_SEL
UART2_SOC2WLAN_TX_R
UART2_WLAN2SOC_TX_R
UART_BB2WLAN_LTE_COEX_R
UART_WLAN2BB_LTE_COEX_R
I64
NO_XNET_CONNECTION=TRUE
1
TP_JTAG_CUMULUS_M_TCK
TP_JTAG_CUMULUS_M_TDI
JTAG_CUMULUS_M_TMS
TP_JTAG_CUMULUS_M_TDO
DISPLAY_SYNC
CUMULUS_MS_CK
CUMULUS_MS_SD
8 12 61 66
NO_XNET_CONNECTION=TRUE
1
WIFI
CONVERT TO PROBE POINTS IF NOT ABLE TO PLACE TESTPOINT
I245
5
PLACE_NEAR=U0600.AM35:3MM
MIPI1C_CAM_FRONT_CLK_P
GRAPE
6 14 66
6 14 66
1
1
D
6 14 66
NO_XNET_CONNECTION=TRUE
1
PPVDD_GPU_SOC_SENSE
6 14 66
NO_XNET_CONNECTION=TRUE
1
1
10 57 67
6 14 66
NO_XNET_CONNECTION=TRUE
1
PLACE_NEAR=U0600.AL31:1MM
6 14 66
CAMERA
PP9470
P4MM SM PP
PP9471
P4MM SM PP
PP9472
P4MM SM PP
PP9473
P4MM SM PP
PP9474
P4MM SM PP
PP9475
P4MM SM PP
PP9476
P4MM SM PP
PP9477
P4MM SM PP
PLACE_NEAR=U0600.V31:1MM
PPVDD_CPU_SOC_SENSE
6 14 60 66
6 14 66
PLACE_SIDE=TOP
PP9452
P4MM SM PP
1
PPVDD_SOC_SOC_SENSE
1
6 14 61 66
6 14 66
TP_FMI_TMSC_NAND
1
I266
PP
1
6 14 66
1
PP9450
P4MM SM PP
PP9451
SM PP
C
PP
6 14 61 66
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
P4MM
TOP SIDE
P4MM
FUNC_TEST=TRUE
PPVREF_FMI_SOC
PPVREF_FMI_NAND
I51
TOP SIDE
EE_TEST=TRUE
FMI1_AD<0>
FMI1_CE0_L
FMI1_ALE
FMI1_CLE
FMI1_WE_L
FMI1_RE_L
FMI1_DQS
I44
TOP SIDE
FMI0_DQS
FMI0_AD<0..7>
FMI0_CE0_L
FMI0_ALE
FMI0_CLE
FMI0_WE_L
FMI0_RE_L
FMI0_DQS
I38
PP9440
P4MM SM PP
PP9441
P4MM SM PP
PP9442
P4MM SM PP
PP9443
P4MM SM PP
6 14 61 66
PLACE_SIDE=BOTTOM
PLACE_NEAR=U0600.B34:2MM
PP
NO_XNET_CONNECTION=TRUE
I39
TOP SIDE
FMI0_AD<0>
NO_XNET_CONNECTION=TRUE
I37
D
PLACE_SIDE=BOTTOM
PLACE_NEAR=U0600.A32:2MM
1
HSIC2_BB_DATA
PLACE_NEAR=U0600.AJ35:3MM
1
HSIC2_BB_STB
PLACE_NEAR=U0600.AJ36:3MM
1
HSIC2_BB_DATA
PLACE_NEAR=U3400.C7:3MM
1
HSIC2_BB_STB
PLACE_NEAR=U3400.B8:3MM
4 25 28 61 64
4 25 28 61 64
4 25 28 61 64
4 25 28 61 64
B
8
7
6
5
4
Edited by Foxit Reader ActiveX For Evaluation Only.
1
Copyright(C)22006-2009 Foxit Corporation
3
POWER CONNECTIONS
BUCK0
PPVDD_CPU
67 60 55
CHARGER MAIN
=PPVDD_CPU
11
MAKE_BASE=TRUE
67 60 58 57 56 55 47
PPVCC_MAIN
MAKE_BASE=TRUE
D
BUCK1
67 60 55
PPVDD_GPU
BUCK5
=PPVDD_GPU
LDO7
MAKE_BASE=TRUE
PPVDD_SRAM
=PPVDD_SRAM_CPU
10
=PPVDD_SRAM_SOC
10
67 60 56
MAKE_BASE=TRUE
PP3V0_S2R_TRISTAR
=PP3V0_S2R_TRISTAR
47
MAKE_BASE=TRUE
BUCK2
67 60 55
PPVDD_SOC
=PPVDD_SOC
10
MAKE_BASE=TRUE
PP1V8_S2R
=PP1V8_S2R_MISC
5 59
=PP1V8_S2R_VDDIO_WLAN_BT 46
=PP1V8_S2R_TRISTAR
47
=PP1V8_S2R_DDR
12
=PP1V8_S2R_GRAPE
51
=PP1V8_S2R_EXT_SWITCH
57
MAKE_BASE=TRUE
PP3V3_S2R
67 60 55
57
=PP3V3_S2R_WIFI_PA
46 61
PP3V0_S2R_HALL
67 60 56
=PP3V0_S2R_HALL
=PP3V3_EDP_PU
=PP3V3_NAND
=PP3V3_USB_SOC
67 60 55
SM
PP3V0_SPARE1
67 60 56
2
PP1V8_SW1_FOREHEAD
MAKE_BASE=TRUE
PP1V8_SW1_FOREHEAD
BACKUP RAIL. CAN BE BOOSTED TO MEET
1.1V MIN ON CAMERA IF NEEDED.
PP1V3_CAM
=PP1V3_CAM_REAR
=PP3V0_SPARE1
PPVBUS_USB_DCIN
=PPVBUS_USB_EMI
48
=PP1V8_ALWAYS
5
MAKE_BASE=TRUE
LDO10
23
45
PP1V0_SOC
=PP1V0_USB_SOC
=PP1V0_MIPI_SOC
=PP1V0_EDP_PAD_DVDD_SOC
4
7
7
9 10
4 5 7 13 58
67 60 56
PP1V7_VA_VCP
=PP1V7_VA_VCP
15
ON_BUF
MAKE_BASE=TRUE
7
LDO11
7
6
67 60 56
PP1V8_ALWAYS
MAKE_BASE=TRUE
14 57 61
4
LDO3
5
=PP1V8_GRAPE
51
67 60 56
MAKE_BASE=TRUE
PP3V0_S2R_SENSOR
MAKE_BASE=TRUE
=PP1V8_S2R_GYRO
=PP1V8_S2R_ACCEL
=PP1V8_S2R_OSCAR
B
C
67 60 55
22
LDO2
PP1V8_S2R_SW3
17 18
23
16
=PP1V8_VDDIO18_SOC
=PP1V8_SOC
=PP1V8_MIPI_SOC
=PP1V8_EDP_SOC
=PP1V8_NAND_SOC
=PP1V8_NAND
=PP1V8_PLL_SOC
=PP1V8_EEPROM
MAKE_BASE=TRUE
25 26 34 35 36 37 38 39 40
58
MAKE_BASE=TRUE
PP1V8_SW2
54
USB POWER INPUT
67 60 56
MAKE_BASE=TRUE
=PPBATT_VCC_BB
=PPBATT_AUDIO
MAKE_BASE=TRUE
60 62 67
=PP1V8_DMIC
=PP1V8_CAM_FRONT
=PP1V8_CAM_REAR
=PP1V8_PROX_AD7149
PP1V8_EXT_SW
=PPBATT_POS_CONN
MAKE_BASE=TRUE
LDO1
15
XWC130
1
PPBATT_VCC
MAKE_BASE=TRUE
=PP1V8_AUDIO
MAKE_BASE=TRUE
67 60 55
67 60 56
=PP2V6_CAM_REAR_AF
PP2V6_CAM_AF
23
MAKE_BASE=TRUE
=PP3V0_S2R_GYRO
=PP3V0_S2R_ACCEL
=PP3V0_S2R_COMP
19
19
BACKLIGHT BOOST
24
19
19
LDO13
19
67 60
56 PPLED_OUT_A
=PPLED_REG_A
53
=PPLED_REG_B
53
MAKE_BASE=TRUE
XWC133
SM
1
67 62 60
PP1V8_S2R_SW3_COMP
2
PP1V8_S2R_SW3_COMP
LDO4
60 62 67
=PP1V8_S2R_COMP
67 60 56
PP2V9_CAM
=PP2V9_CAM_FRONT
=PP2V9_CAM_REAR
MAKE_BASE=TRUE
22
23
24
67 60 56
MAKE_BASE=TRUE
PP3V0_ALS
=PP3V0_ALS
=PP3V0_PROX_AD7149
MAKE_BASE=TRUE
22
45
BUCK4
PP1V2_S2R
MAKE_BASE=TRUE
=PP1V2_S2R_DDR
=PP1V2_S2R_DDR_SOC
12
8
LDO5
67 60 56
PP3V0_UVLO
=PP3V0_UVLO
58
MAKE_BASE=TRUE
BUCK4_SW
67 60 55
PP1V2_SW1
MAKE_BASE=TRUE
A
VLCM1
=PP1V2_VDDQ_DDR
=PP1V2_VDDIOD_SOC
=PP1V2_HSIC_SOC
12
67 60 56
8 9
PP5V25_GRAPE
=PP5V25_GRAPE
52 61
MAKE_BASE=TRUE
4
LDO6
67 60 55
PP1V2_S2R_SW2
=PP1V2_S2R_OSCAR
MAKE_BASE=TRUE
19
67 60 56
PP3V3_ACC
=PP3V3_ACC
47
MAKE_BASE=TRUE
8
PPLED_OUT_B
MAKE_BASE=TRUE
67 60 56
67 60 56 55
53
50
4
67 60 56
PP1V8_SW1
67 60 55
46
51
14
BUCK3_SW
67 60 57
=PPVCC_MAIN_WLAN
55
BATTERY
PP3V3_SW
LDO9
67 62 60
56
55
MAKE_BASE=TRUE
MAKE_BASE=TRUE
67 60 59 57 55
D
55
=PPVCC_MAIN_GPU
=PPVCC_MAIN_SOC
=PPVCC_MAIN_GRAPE
=PPVCC_MAIN_LCD
=PPVCC_MAIN_VDD_LCM
LDO8
=PP3V3_S2R_SWITCH
MAKE_BASE=TRUE
67 60 57
C
56
BUCK6
BUCK3
67 60 56 55
15
=PPVCC_MAIN_CPU
11
67 60 55
=PPVCC_MAIN_AUDIO
=PPVCC_MAIN_LED
7
6
5
4
3
B
8
7
6
5
4
Edited by Foxit Reader ActiveX For Evaluation Only.
1
Copyright(C)22006-2009 Foxit Corporation
3
JTAG
Clock Signal Constraints
TABLE_SPACING_ASSIGNMENT_HEAD
TABLE_PHYSICAL_ASSIGNMENT_HEAD
NET_PHYSICAL_TYPE
AREA_TYPE
TABLE_SPACING_ASSIGNMENT_HEAD
PHYSICAL_RULE_SET
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
TABLE_PHYSICAL_ASSIGNMENT_ITEM
CLK_50S
*
SPACING_RULE_SET
I2C
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
JTAG
*
*
2:1_SPACING
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
45_OHM_SE
CLK
*
*
3:1_SPACING
TABLE_PHYSICAL_ASSIGNMENT_HEAD
NET_PHYSICAL_TYPE
AREA_TYPE
PHYSICAL_RULE_SET
I2C_50S
*
45_OHM_SE
NET_TYPE
TABLE_PHYSICAL_ASSIGNMENT_ITEM
NET_TYPE
ELECTRICAL_CONSTRAINT_SET
PHYSICAL
ELECTRICAL_CONSTRAINT_SET
SPACING
PHYSICAL
SPACING
JTAG_SOC_TCK
JTAG_SOC_TMS
JTAG_SOC_TDI
TP_JTAG_SOC_TDO
JTAG_SOC_TRST_L
NC_JTAG_SOC_TRTCK
BB_JTAG_TMS
BB_JTAG_TCK
BB_JTAG_TDO
BB_JTAG_TDI
BB_JTAG_TRST_L
JTAG_WLAN_TMS_TX_BLANK
TP_JTAG_WLAN_TCK
JTAG_WLAN_TDO_OSCAR_B
JTAG_WLAN_TDI_OSCAR_A
TP_JTAG_WLAN_TRST_L
TP_JTAG_CUMULUS_M_TCK
TP_JTAG_CUMULUS_M_TDI
JTAG_CUMULUS_M_TMS
TP_JTAG_CUMULUS_M_TDO
TABLE_SPACING_ASSIGNMENT_HEAD
CLK_50S
CLK_50S
CLK_50S
CLK_50S
I63
I371
I381
I380
CLK_32K_SOC2CUMULUS
CLK_32K_SOC2CUMULUS_FILT
CUMULUS_MS_CK
CUMULUS_MS_SD
CLK
CLK
CLK
CLK
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
I2C
*
*
1.5:1_SPACING
JTAG
JTAG
JTAG
JTAG
RST
JTAG
JTAG
JTAG
JTAG
JTAG
RST
JTAG
JTAG
JTAG
JTAG
RST
JTAG
JTAG
JTAG
JTAG
I16
5 52 60 61
TABLE_SPACING_ASSIGNMENT_ITEM
60
I15
I14
52 61
52 61
I13
D
NET_TYPE
I20
ELECTRICAL_CONSTRAINT_SET
SPACING
PHYSICAL
I289
I162
I268
I372
I88
I89
I96
I94
I130
I131
CLK_50S
CLK_50S
CLK_50S
CLK
CLK
CLK
PMU_GPIO_CLK_32K_WLAN
PMU_GPIO_CLK_32K_OSCAR
PMU_OUT_32K_CLK_GPS
CLK_50S
CLK_50S
CLK_50S
CLK
CLK
CLK
ISP1_CAM_FRONT_CLK_R
ISP1_CAM_FRONT_CLK
ISP1_CAM_FRONT_CLK_F
CLK_50S
CLK_50S
CLK_50S
CLK
CLK
CLK
ISP0_CAM_REAR_CLK_R
ISP0_CAM_REAR_CLK
ISP0_CAM_REAR_CLK_F
46 57
I1
19 57 60
I2
57 68
I3
I4
7
I305
7 22
I306
NET_SPACING_TYPE2
I300
AREA_TYPE
PHYSICAL_RULE_SET
UART_50S
*
45_OHM_SE
AREA_TYPE
I61
SPACING_RULE_SET
TABLE_SPACING_ASSIGNMENT_ITEM
UART
*
*
3:1_SPACING
UART
UART
*
2:1_SPACING
TABLE_PHYSICAL_ASSIGNMENT_ITEM
UART_50S
UART_50S
UART_50S
UART_50S
UART_50S
UART_50S
UART_50S
UART_50S
UART_50S
UART_50S
UART_50S
UART_50S
UART_50S
UART_50S
UART_50S
UART_50S
UART_50S
UART_50S
I237
I236
I174
I173
C
I175
I176
I177
I178
I179
I182
I181
I180
I298
I297
I377
I378
I269
I270
I337
I295
I296
I302
UART0_SOC_RXD
UART0_SOC_TXD
UART3_SOC2BB_RTS_L
UART3_BB2SOC_RTS_L
UART3_SOC2BB_TX
UART3_BB2SOC_TX
UART4_OSCAR2SOC_RXD
UART4_SOC2OSCAR_TXD
UART1_SOC2BT_RTS_L
UART1_BT2SOC_RTS_L
UART1_SOC2BT_TX
UART1_BT2SOC_TX
UART2_SOC2WLAN_TX
UART2_WLAN2SOC_TX
UART2_SOC2WLAN_TX_R
UART2_WLAN2SOC_TX_R
UART6_TS_ACC_RXD
UART6_TS_ACC_TXD
UART5_BATT_TRXD
BATT_SWI_CONN
UART
UART
UART
UART
UART
UART
UART
UART
UART
UART
UART
UART
UART
UART
UART
UART
UART
UART
UART
UART
I310
I2C1_SOC2OSCAR_SWDCLK_1V8
I2C1_SOC2OSCAR_SWDIO_1V8
I2C_50S
I2C_50S
I2C
I2C
I2C2_SDA_1V8
I2C2_SCL_1V8
I315
I317
22 60
I319
60
I318
60
I365
5 19
I366
5 19
I368
I367
5 47
I373
5 47
I374
I301
SPACING
PHYSICAL
I2C
I2C
I316
5 57 60
I2C_50S
I2C_50S
I2C
I2C
I2C3_SDA_1V8
I2C3_SCL_1V8
I2C_50S
I2C_50S
I2C_50S
I2C_50S
I2C
I2C
I2C
I2C
DMIC1_FF_SD_FILT
DMIC1_FF_SCLK_FILT
DMIC1_FF_SD
DMIC1_FF_SCLK
I375
5 13 22 61
I376
4 47 60
4 60
4 60
4
5 25 28 61
5 25 28 61
5 25 28 61
5 25 28 61
46 61
46 61
46 61
46 61
46 61
52 61
52 61
52 61
52 61
5 13 22 61
I303
5 47 60
I304
16 60
16 60
TABLE_PHYSICAL_ASSIGNMENT_HEAD
15 16
NET_PHYSICAL_TYPE
AREA_TYPE
TABLE_SPACING_ASSIGNMENT_HEAD
PHYSICAL_RULE_SET
5 47 60
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
USB
*
*
4:1_SPACING
TABLE_PHYSICAL_ASSIGNMENT_ITEM
5 25 29
I307
5 25 29
I308
I2C_50S
I2C_50S
I2C
I2C
SEP_I2C0_SCL
SEP_I2C0_SDA
I2C_50S
I2C_50S
I2C_50S
I2C_50S
I2C
I2C
I2C
I2C
ISP0_CAM_REAR_SCL
ISP0_CAM_REAR_SDA
ISP0_CAM_REAR_SCL_F
ISP0_CAM_REAR_SDA_F
USB_90D
5
*
TABLE_SPACING_ASSIGNMENT_ITEM
90_OHM_DIFF
5
C
NET_TYPE
5 25 29 47
5 25 29 47
I98
5 19
I99
5 19
I312
5 46
I311
7 23
ELECTRICAL_CONSTRAINT_SET
I5
23 60
I6
23 60
I248
5 46
I100
5 46
I101
5 46
I102
5 46
I103
I2C_50S
I2C_50S
I2C_50S
I2C_50S
ISP1_CAM_FRONT_SCL
ISP1_CAM_FRONT_SDA
ISP1_CAM_FRONT_SCL_F
ISP1_CAM_FRONT_SDA_F
I2C
I2C
I2C
I2C
I249
7 22
I369
7 22
I370
USB_90D
USB_90D
USB_90D
USB_90D
USB_90D
USB_90D
USB
USB
USB
USB
USB
USB
USB_SOC_P
USB_SOC_N
USB_BB_P
USB_BB_N
USB_BB_DEBUG_P
USB_BB_DEBUG_N
USB
USB
USB
USB
USB
USB
USB
USB
USB_90D
USB_90D
USB_90D
USB_90D
USB_90D
USB_90D
USB_90D
USB_90D
USB
USB
USB
USB
USB
USB
USB
USB
E75_DPAIR1_CONN_P
E75_DPAIR1_CONN_N
E75_DPAIR2_CONN_P
E75_DPAIR2_CONN_N
E75_DPAIR1_P
E75_DPAIR1_N
E75_DPAIR2_P
E75_DPAIR2_N
4 47 60
4 47 60
25 47
25 47
25 28 61
25 28 61
22 60
I258
I259
46 61
I260
5 47
I261
5 47
I263
5 54 57
I262
SPI
I265
AREA_TYPE
USB
USB
USB
USB
USB
USB
22 60
46 61
54 60
SPACING
PHYSICAL
7 23
5 46
NET_PHYSICAL_TYPE
I2S
USB
15 16
TABLE_PHYSICAL_ASSIGNMENT_HEAD
I264
47 49 60
47 49 60
47 49 60
47 49 60
47
47
47
47
PHYSICAL_RULE_SET
TABLE_SPACING_ASSIGNMENT_HEAD
TABLE_PHYSICAL_ASSIGNMENT_ITEM
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
I2S
*
*
3:1_SPACING
I2S
I2S
*
2:1_SPACING
TABLE_PHYSICAL_ASSIGNMENT_HEAD
NET_PHYSICAL_TYPE
AREA_TYPE
PHYSICAL_RULE_SET
I2S_50S
*
45_OHM_SE
TABLE_SPACING_ASSIGNMENT_HEAD
SPI_50S
*
45_OHM_SE
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
HSIC
*
*
4:1_SPACING
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_PHYSICAL_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_HEAD
TABLE_SPACING_ASSIGNMENT_ITEM
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
SPI
*
*
TABLE_SPACING_ASSIGNMENT_ITEM
HSIC
TABLE_SPACING_ASSIGNMENT_ITEM
2:1_SPACING
HSIC
GND
*
1.5:1_SPACING
HSIC_RDY
*
*
2:1_SPACING
HSIC_RDY
GND
*
1.5:1_SPACING
TABLE_SPACING_ASSIGNMENT_ITEM
NET_TYPE
TABLE_PHYSICAL_ASSIGNMENT_HEAD
ELECTRICAL_CONSTRAINT_SET
PHYSICAL
SPACING
NET_TYPE
NET_PHYSICAL_TYPE
AREA_TYPE
PHYSICAL_RULE_SET
HSIC
*
45_OHM_SE
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_PHYSICAL_ASSIGNMENT_ITEM
B
I2S_50S
I2S_50S
I2S_50S
I2S_50S
I2S_50S
I2S_50S
I2S_50S
I157
I158
I140
I143
I142
I141
I159
I2S0_CODEC_ASP_MCK_R
I2S0_CODEC_ASP_MCK
I2S0_CODEC_ASP_BCLK
I2S0_CODEC_ASP_LRCK
I2S0_CODEC_ASP_DIN
I2S0_CODEC_ASP_DOUT
I2S0_CODEC_ASP_SDOUT
CLK
CLK
I2S
I2S
I2S
I2S
I2S
ELECTRICAL_CONSTRAINT_SET
SPACING
PHYSICAL
5 15
5
I240
5 15
I241
5 15
I242
5 15
I243
SPI_50S
SPI_50S
SPI_50S
SPI_50S
SPI
SPI
SPI
SPI
SPI3_CODEC_MISO
SPI3_CODEC_MOSI
SPI3_CODEC_SCLK
SPI3_CODEC_CS_L
I145
I149
I150
I151
I309
I2S_50S
I2S_50S
I2S_50S
I2S_50S
I2S_50S
I2S_50S
I2S
I2S
I2S
I2S
I2S
I2S
NC_I2S1_MCK
I2S1_CODEC_XSP_BCLK
I2S1_CODEC_XSP_LRCK
I2S1_CODEC_XSP_DIN
I2S1_CODEC_XSP_DOUT
I2S1_CODEC_XSP_SDOUT
NET_TYPE
5 15
ELECTRICAL_CONSTRAINT_SET
5 15
5 15
I191
5 15
I194
15
I2S_50S
I2S_50S
I2S_50S
I2S_50S
I2S_50S
I2S_50S
CLK
CLK
I2S
I2S
I2S
I2S
NC_I2S2_MCK_R
NC_I2S2_MCK
NC_I2S2_BCLK
NC_I2S2_LRCK
NC_I2S2_DIN
NC_I2S2_DOUT
I2S_50S
I2S_50S
I2S_50S
I2S_50S
I2S_50S
I2S
I2S
I2S
I2S
I2S
NC_I2S4_MCK
I2S4_SOC2BT_BCLK
I2S4_SOC2BT_LRCK
I2S4_SOC2BT_DATA
I2S4_BT2SOC_DATA
I192
5
5 15
I291
5 15
I292
5 15
I293
5 15
I294
SPI_50S
SPI_50S
SPI_50S
SPI_50S
SPI
SPI
SPI
SPI
SPI2_GRAPE_MISO
SPI2_GRAPE_MOSI
SPI2_GRAPE_SCLK
SPI2_GRAPE_CS_L
I287
5 52 60 61 64
I288
I235
I276
I277
5 52 60 61 64
I195
5 52 60 61 64
I196
15
I197
I278
I279
5
I198
5
5
I346
5
I347
5
I348
I349
I290
I281
I280
I282
I283
SPI_50S
SPI_50S
SPI_50S
SPI_50S
SPI
SPI
SPI
SPI
SPI2_GRAPE_MISO
SPI2_GRAPE_MOSI
SPI2_GRAPE_SCLK
SPI2_GRAPE_CS_L
SPI_50S
SPI_50S
SPI_50S
SPI_50S
SPI_50S
SPI_50S
SPI
SPI
SPI
SPI
SPI
SPI
SPI_OSCAR_MISO
SPI_OSCAR_MOSI
SPI_OSCAR_SCLK
SPI_OSCAR_MISO_GYRO
SPI_OSCAR_MISO_ACCEL
SPI_OSCAR_MISO_COMP1
SPI_50S
SPI_50S
SPI_50S
SPI_50S
SPI_50S
SPI
SPI
SPI
SPI
SPI_OSCAR_MOSI_R
SPI_OSCAR_SCLK_R
SPI_OSCAR2ACCEL_CS_L
SPI_OSCAR2GYRO_CS_L
SPI_OSCAR2COMPASS_CS_L
I199
5 52 60 61 64
I286
5 52 60 61 64
5 52 60 61 64
5 52 60 61 64
5
5 46
I351
5 46
I350
5 46
I352
5 46
I353
I356
DWI
I357
19 24
19 24
19 24
19
19
24
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
DWI
*
*
2:1_SPACING
TABLE_SPACING_ASSIGNMENT_ITEM
I354
I355
NET_TYPE
ELECTRICAL_CONSTRAINT_SET
PHYSICAL
I360
SPACING
DWI
DWI
DWI
I152
I324
I156
8
I361
DWI_AP_CLK
NC_DWI_AP_DI
DWI_AP_DO
7
I362
19
19
19
19
19 24
5 57
57
5 57
6
5
PHYSICAL
SPACING
HSIC
HSIC
HSIC
HSIC
HSIC
HSIC
HSIC
HSIC
HSIC
HSIC
HSIC
HSIC
HSIC1_WLAN_DATA
HSIC1_WLAN_STB
HSIC2_BB_DATA
HSIC2_BB_STB
NC_HSIC0_DATA
NC_HSIC0_STB
HSIC
HSIC
HSIC
HSIC
HSIC_RDY
HSIC_RDY
HSIC_RDY
HSIC_RDY
HSIC1_WLAN2SOC_REMOTE_WAKE 5 46 61
HSIC1_WLAN2SOC_DEVICE_RDY 5 46 61
HSIC1_SOC2WLAN_HOST_RDY
5 46
HSIC1_SOC2WLAN_HOST_RDY_R 46 61
HSIC
HSIC
HSIC
HSIC_RDY
HSIC_RDY
HSIC_RDY
HSIC2_BB2SOC_REMOTE_WAKE
HSIC2_BB2SOC_DEVICE_RDY
HSIC2_SOC2BB_HOST_RDY
4 46 61
4 46 61
4 25 28 61
4 25 28 61
4
4
5 52 60 61 64
I379
I234
B
5 15
I193
I161
A
D
4 13 60
5 25 28 61
TABLE_SPACING_ASSIGNMENT_ITEM
NET_TYPE
ELECTRICAL_CONSTRAINT_SET
I2C_50S
I2C_50S
5 57 60
22 60
7 23
23 60
TABLE_PHYSICAL_ASSIGNMENT_HEAD
NET_PHYSICAL_TYPE
I2C0_SDA_1V8
I2C0_SCL_1V8
I2C3_CAM_ALS_SDA_1V8_F
I2C3_CAM_ALS_SCL_1V8_F
I2C0_HP_ALS_SDA_1V8_FILT
I2C0_HP_ALS_SCL_1V8_FILT
I364
I299
7
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
I2C
I2C
I2C
I2C
I2C
I2C
22 60
I62
UART
I2C_50S
I2C_50S
I2C_50S
I2C_50S
I2C_50S
I2C_50S
4 47 60
4
3
5 29
5 25 29
5 25 29
8
7
6
5
TABLE_SPACING_ASSIGNMENT_HEAD
MIPI
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
*
*
4:1_SPACING
TABLE_PHYSICAL_ASSIGNMENT_HEAD
NET_PHYSICAL_TYPE
AREA_TYPE
4
AUDIO/SPEAKER
TABLE_SPACING_ASSIGNMENT_ITEM
MIPI0C
PHYSICAL_RULE_SET
Edited by Foxit Reader ActiveX For Evaluation Only.
1
Copyright(C)22006-2009 Foxit Corporation
3
EMBEDDED DISPLAYPORT
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
AUDIO
*
*
3:1_SPACING
TABLE_PHYSICAL_ASSIGNMENT_HEAD
TABLE_PHYSICAL_ASSIGNMENT_ITEM
MIPI_90D
*
TABLE_SPACING_ASSIGNMENT_ITEM
90_OHM_DIFF
MIPI1C
*
*
TABLE_PHYSICAL_ASSIGNMENT_HEAD
TABLE_SPACING_ASSIGNMENT_ITEM
4:1_SPACING
NET_PHYSICAL_TYPE
AREA_TYPE
PHYSICAL_RULE_SET
NET_PHYSICAL_TYPE
AREA_TYPE
PHYSICAL_RULE_SET
EDP_50S
*
45_OHM_SE
TABLE_PHYSICAL_ASSIGNMENT_ITEM
TABLE_PHYSICAL_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
AUDIO
AUDIO
*
EDP_90D
2:1_SPACING
*
90_OHM_DIFF
NET_TYPE
TABLE_SPACING_ASSIGNMENT_HEAD
ELECTRICAL_CONSTRAINT_SET
MIPI0C_PP
MIPI0C_PP
MIPI0C_PP
MIPI0C_PP
MIPI0C
MIPI0C
MIPI0C
MIPI0C
MIPI0C
MIPI0C
MIPI0C_PP
MIPI0C_PP
MIPI0C_PP
MIPI0C_PP
MIPI0C
MIPI0C
MIPI0C
MIPI0C
MIPI0C
MIPI0C
I315
I316
I343
I342
D
I311
I312
I395
I394
I519
I518
I521
I520
I345
I346
I347
I348
I706
I707
I708
I709
I607
I608
I610
I609
I611
I612
I613
I614
I616
MIPI0C_CAM_REAR_CLK_P
MIPI0C_CAM_REAR_CLK_N
MIPI0C_CAM_REAR_DATA_P<0>
MIPI0C_CAM_REAR_DATA_N<0>
MIPI0C_CAM_REAR_DATA_P<1>
MIPI0C_CAM_REAR_DATA_N<1>
NC_MIPI0C_CAM_REAR_DATA_P<2>
NC_MIPI0C_CAM_REAR_DATA_N<2>
NC_MIPI0C_CAM_REAR_DATA_P<3>
NC_MIPI0C_CAM_REAR_DATA_N<3>
MIPI0C_CAM_REAR_CLK_FILT_P
MIPI0C_CAM_REAR_CLK_FILT_N
MIPI0C_CAM_REAR_DATA_FILT_P<0>
MIPI0C_CAM_REAR_DATA_FILT_N<0>
MIPI0C_CAM_REAR_DATA_FILT_P<1>
MIPI0C_CAM_REAR_DATA_FILT_N<1>
NC_MIPI0C_CAM_REAR_DATA_FILT_P<2>
NC_MIPI0C_CAM_REAR_DATA_FILT_N<2>
NC_MIPI0C_CAM_REAR_DATA_FILT_P<3>
NC_MIPI0C_CAM_REAR_DATA_FILT_N<3>
MIPI1C_CAM_FRONT_CLK_P
MIPI1C_CAM_FRONT_CLK_N
MIPI1C_CAM_FRONT_DATA_P<0>
MIPI1C_CAM_FRONT_DATA_N<0>
NC_MIPI1C_CAM_FRONT_DATA_P<1>
NC_MIPI1C_CAM_FRONT_DATA_N<1>
MIPI1C_CAM_FRONT_CLK_FILT_P
MIPI1C_CAM_FRONT_CLK_FILT_N
MIPI1C_CAM_FRONT_DATA_FILT_P<0>
MIPI1C_CAM_FRONT_DATA_FILT_N<0>
MIPI1C
MIPI1C
MIPI1C
MIPI1C
MIPI1C
MIPI1C
MIPI1C
MIPI1C
MIPI1C
MIPI1C
ELECTRICAL_CONSTRAINT_SET
I658
I659
I660
I661
I662
I663
I664
I665
I666
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
I647
I649
I650
I651
I652
I653
I654
I656
I655
I667
I668
I669
I670
I671
I672
7 23 61
I435
7 23 61
I436
7
SPKR_DIFF
SPKR_DIFF
SPKR_DIFF
SPKR_DIFF
SPKR_DIFF
SPKR_DIFF
SPKR_DIFF
SPKR_DIFF
I564
7
I565
7
I639
7
I640
23 61
I558
23 61
I560
23 61
I641
23 61
I642
SPEAKER
SPEAKER
SPEAKER
SPEAKER
SPEAKER
SPEAKER
SPEAKER
SPEAKER
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
SPKRAMP_L1_OUT_P
SPKRAMP_L1_OUT_N
SPKRAMP_L2_OUT_P
SPKRAMP_L2_OUT_N
SPKRAMP_R1_OUT_P
SPKRAMP_R1_OUT_N
SPKRAMP_R2_OUT_P
SPKRAMP_R2_OUT_N
USB_90D
USB_90D
USB
USB
MIKEY_TS_P
MIKEY_TS_N
18 49 60
I437
18 49 60
I439
18 49 60
I438
18 49 60
I440
17 49 60
I442
17 49 60
I441
17 49 60
I444
17 49 60
I443
23 61
I570
23 61
I569
MAXIMUM_NECK_LENGTH=0.5 MM
MIN_NECK_WIDTH=0.06 MM
I600
I601
I447
15 47
I446
USB_90D
USB_90D
USB
USB
L81_MBUS_P
L81_MBUS_N
AUDIO_DIFF
AUDIO_DIFF
AUDIO_DIFF
AUDIO_DIFF
AUDIO_DIFF
AUDIO_DIFF
AUDIO_DIFF
AUDIO_DIFF
AUDIO_DIFF
AUDIO_DIFF
AUDIO_DIFF
AUDIO_DIFF
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
LEFT_CH_OUT_P
LEFT_CH_OUT_N
RIGHT_CH_OUT_P
RIGHT_CH_OUT_N
MAX98304_L1_IN_P
MAX98304_L1_IN_N
MAX98304_R1_IN_P
MAX98304_R1_IN_N
MAX98304_L2_IN_P
MAX98304_L2_IN_N
MAX98304_R2_IN_P
MAX98304_R2_IN_N
15
I449
15
I448
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
I450
SPKR_DIFF
SPKR_DIFF
SPKR_DIFF
SPKR_DIFF
SPKR_DIFF
SPKR_DIFF
SPKR_DIFF
SPKR_DIFF
SPKR_DIFF
SPKR_DIFF
SPKR_DIFF
SPKR_DIFF
I702
7 22 61
I703
7 22 61
I705
7 22 61
I704
7 22 61
I711
7
I710
7
I713
22 61
I712
22 61
I714
22 61
I715
22 61
15 18 60
15 18 60
I451
I452
15 17 60
I454
15 17 60
I453
18 61
I455
18 61
I457
17 61
I456
17 61
I458
18 61
I460
18 61
I459
17 61
I462
17 61
I461
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
7
I463
7
I673
7
I674
AUDIO_DIFF
AUDIO_DIFF
AUDIO
AUDIO
SPKR_L1_VSNS_P
SPKR_L1_VSNS_N
AUDIO_DIFF
AUDIO_DIFF
AUDIO
AUDIO
SPKR_R1_VSNS_P
SPKR_R1_VSNS_N
I464
7
I675
7
I465
I676
MAXIMUM_NECK_LENGTH=15 MM
7
PWR_0P5MM
PWR_0P5MM
PWR_0P5MM
PWR_0P5MM
PWR_0P2MM
PWR_0P2MM
PWR_0P2MM
PWR_0P2MM
I684
7
I683
7
I686
I689
I690
I688
I687
CODEC_HP_HS3
CODEC_HP_HS4
CONN_HP_HS3_FILT
CONN_HP_HS4_FILT
CODEC_HP_LEFT
CODEC_HP_RIGHT
CONN_HP_LEFT_FILT
CONN_HP_RIGHT_FILT
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
15
NET_PHYSICAL_TYPE
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
I696
I695
I697
I698
I700
I699
I483
I485
I487
I486
I489
I488
I490
I491
I492
I493
A
I494
I495
I496
I497
I498
I499
I500
I501
I502
I503
I504
I505
8
LEDA
*
*
2.4:1_SPACING
7 53 61
7 53 61
7 53 61
7 53 61
53
53
53 61
53 61
53 61
53 61
53 61
53 61
53 61
53 61
53
53
53 61
53 61
53 61
C
53 61
53 61
53 61
53 61
53 61
TABLE_SPACING_ASSIGNMENT_HEAD
PHYSICAL_RULE_SET
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
*
BOARD_TEMP
*
*
3:1_SPACING
TABLE_SPACING_ASSIGNMENT_ITEM
TEMP_SENSE
15 16 60
L81_NVCP
L81_PVCP
L81_FLYP
L81_FLYN
L81_FLYC
SPEAKER_VQ
L81_FILT
PWR
PWR
PWR
PWR
PWR
PWR
PWR
*
15 61
I726
15 61
I725
15 61
I576
15 61
I577
I578
15
I579
I602
I603
2.4:1_SPACING
I584
PWR_0P1MM
I585
PWR_0P1MM
SPACING
I587
PWR_0P1MM
56
I586
PWR_0P1MM
56
I691
PWR_0P1MM
56
I693
PWR_0P1MM
56
I692
PWR_0P1MM
56
I694
PWR_0P1MM
AUDIO
AUDIO
HP_MIC_POS
HP_MIC_NEG
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
L81_AIN2_POS
L81_AIN2_NEG
CODEC_HP_HS3_REF
CODEC_HP_HS4_REF
CONN_HP_HS3_REF_FILT
CONN_HP_HS4_REF_FILT
PHYSICAL
SPACING
MIN_NECK_WIDTH=0.053 MM
BOARD_TEMP
BOARD_TEMP
BOARD_TEMP
MIN_NECK_WIDTH=0.053
BOARD_TEMP
PA_NTC_P
PA_NTC_N
BOARD_TEMP
MM
BOARD_TEMP
57 60
57
15 61
TABLE_SPACING_ASSIGNMENT_ITEM
7
7 53 61
15 16 60
TABLE_SPACING_ASSIGNMENT_HEAD
NET_TYPE
I484
7 53 61
15
I681
DEV
SPACING_RULE_SET
LED_IO1_A_R
LED_IO1_B_R
LED_IO2_A_R
LED_IO2_B_R
LED_IO3_A_R
LED_IO3_B_R
LED_IO4_A_R
LED_IO4_B_R
LED_IO5_A_R
LED_IO5_B_R
LED_IO6_A_R
LED_IO6_B_R
LED_IO_1_A
LED_IO_1_B
LED_IO_2_A
LED_IO_2_B
LED_IO_3_A
LED_IO_3_B
LED_IO_4_A
LED_IO_4_B
LED_IO_5_A
LED_IO_5_B
LED_IO_6_A
LED_IO_6_B
AREA_TYPE
BOARD_TEMP
15
I682
AREA_TYPE
LEDA
LEDB
LEDA
LEDB
LEDA
LEDB
LEDA
LEDB
LEDA
LEDB
LEDA
LEDB
LEDA
LEDB
LEDA
LEDB
LEDA
LEDB
LEDA
LEDB
LEDA
LEDB
LEDA
LEDB
7 53 61
TABLE_PHYSICAL_ASSIGNMENT_ITEM
I604
PHYSICAL
7 53 61
15 16 60
TABLE_SPACING_ASSIGNMENT_ITEM
LED
LED
LED
LED
LED
LED
LED
LED
LED
LED
LED
LED
LED
LED
LED
LED
LED
LED
LED
LED
LED
LED
LED
LED
7 53
NET_TYPE
TABLE_PHYSICAL_ASSIGNMENT_ITEM
I482
7 53
TABLE_PHYSICAL_ASSIGNMENT_HEAD
15 16 60
I583
ELECTRICAL_CONSTRAINT_SET
D
7 53
TEMP SENSORS
15
ELECTRICAL_CONSTRAINT_SET
NET_SPACING_TYPE2
*
EDP_AUX_P
EDP_AUX_N
EDP_HPD
EDP_DATA_P<0>
EDP_DATA_N<0>
EDP_DATA_P<1>
EDP_DATA_N<1>
EDP_DATA_P<2>
EDP_DATA_N<2>
EDP_DATA_P<3>
EDP_DATA_N<3>
EDP_AUX_EMI_P
EDP_AUX_EMI_N
EDP_DATA_EMI_P<0>
EDP_DATA_EMI_N<0>
EDP_DATA_EMI_P<1>
EDP_DATA_EMI_N<1>
EDP_DATA_EMI_P<2>
EDP_DATA_EMI_N<2>
EDP_DATA_EMI_P<3>
EDP_DATA_EMI_N<3>
EDP_AUX_EMI_CONN_P
EDP_AUX_EMI_CONN_N
EDP_DATA_EMI_CONN_P<0>
EDP_DATA_EMI_CONN_N<0>
EDP_DATA_EMI_CONN_P<1>
EDP_DATA_EMI_CONN_N<1>
EDP_DATA_EMI_CONN_P<2>
EDP_DATA_EMI_CONN_N<2>
EDP_DATA_EMI_CONN_P<3>
EDP_DATA_EMI_CONN_N<3>
7
NET_SPACING_TYPE1
LEDB
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
7
TABLE_PHYSICAL_ASSIGNMENT_HEAD
LED
SPACING
EDP_90D
EDP_90D
EDP_50S
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
EDP_90D
I445
I582
*
PHYSICAL
EDP
EDP
EDP
EDP
EDP
EDP
EDP
EDP
I581
LED
4:1_SPACING
15 47
BACKLIGHT
PHYSICAL_RULE_SET
*
NET_TYPE
I580
AREA_TYPE
*
EDP
ELECTRICAL_CONSTRAINT_SET
I701
NET_PHYSICAL_TYPE
SPACING_RULE_SET
7 23 61
MIPI_CAM0_CLKCON_P
MIPI_CAM0_CLKCON_N
MIPI_CAM0_D0CON_P
MIPI_CAM0_D0CON_N
MIPI_CAM0_D1CON_P
MIPI_CAM0_D1CON_N
MIPI_CAM0_D2CON_P
MIPI_CAM0_D2CON_N
MIPI_CAM0_D3CON_P
MIPI_CAM0_D3CON_N
MIPI_CAM1_CLKCON_P
MIPI_CAM1_CLKCON_N
MIPI_CAM1_D0CON_P
MIPI_CAM1_D0CON_N
MIPI_CAM1_D1CON_P
MIPI_CAM1_D1CON_N
MIPI0C
MIPI0C
MIPI0C
MIPI0C
MIPI0C
MIPI0C
MIPI0C
MIPI0C
MIPI0C
MIPI0C
MIPI1C
MIPI1C
MIPI1C
MIPI1C
MIPI1C
MIPI1C
AREA_TYPE
7 23 61
I685
I648
NET_SPACING_TYPE2
TABLE_SPACING_ASSIGNMENT_ITEM
SPACING
7 23 61
I717
NC_MIPI0D_DPCLK
NC_MIPI0D_DNCLK
NC_MIPI0D_DPDATA0
NC_MIPI0D_DNDATA0
NC_MIPI0D_DPDATA1
NC_MIPI0D_DNDATA1
NC_MIPI0D_DPDATA2
NC_MIPI0D_DNDATA2
NC_MIPI0D_DPDATA3
NC_MIPI0D_DNDATA3
MIPI1C
MIPI1C
MIPI1C
MIPI1C
MIPI1C
MIPI1C
MIPI1C
MIPI1C
MIPI1C
MIPI1C
PHYSICAL
7 23 61
I716
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
NET_SPACING_TYPE1
NET_TYPE
MIPI0C
MIPI0C
MIPI0C
MIPI0C
MIPI0C
MIPI0C
MIPI0C
MIPI0C
MIPI0C
MIPI0C
MIPI0C
MIPI0C
MIPI0C
MIPI0C
MIPI0C
MIPI0C
MIPI0C
MIPI0C
MIPI0C
MIPI0C
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
I657
B
SPACING
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI_90D
MIPI1C_PP
MIPI1C_PP
MIPI1C_PP
MIPI1C_PP
MIPI1C
MIPI1C
MIPI1C_PP
MIPI1C_PP
MIPI1C_PP
MIPI1C_PP
I606
C
PHYSICAL
I605
BOARD_TEMP
BOARD_TEMP
BOARD_TEMP
BOARD_TEMP
BOARD_TEMP
BOARD_TEMP
BOARD_TEMP
BOARD_TEMP
BOARD_TEMP
BOARD_TEMP
BOARD_TEMP
BOARD_TEMP
BOARD_TEMP
BOARD_TEMP
BOARD_TEMP
BOARD_TEMP
BOARD_TEMP
BOARD_TEMP
BOARD_TEMP
BOARD_TEMP
BOARD_TEMP
BOARD_TEMP
BOARD_TEMP
BOARD_TEMP
BOARD_TEMP
BOARD_TEMP
BOARD_TEMP
BOARD_TEMP
BOARD_TEMP2_P
BOARD_TEMP2_N
BOARD_TEMP3_P
BOARD_TEMP3_N
BOARD_TEMP4_P
BOARD_TEMP4_N
BOARD_TEMP5_P
BOARD_TEMP5_N
BOARD_TEMP6_P
BOARD_TEMP6_N
BOARD_TEMP7_P
BOARD_TEMP7_N
BOARD_TEMP8_P
BOARD_TEMP8_N
BOARD_TEMP
BOARD_TEMP
BOARD_TEMP
BOARD_TEMP
BOARD_TEMP
BOARD_TEMP
BOARD_TEMP
BOARD_TEMP
BOARD_TEMP
BOARD_TEMP
BOARD_TEMP
BOARD_TEMP
BOARD_TEMP
BOARD_TEMP
57 60
57
57 60
57
57
57 60
57
57 60
57
57 60
57
57 60
57
15
15
GRAPE
15
TABLE_PHYSICAL_ASSIGNMENT_HEAD
15
NET_PHYSICAL_TYPE
AREA_TYPE
PHYSICAL_RULE_SET
GRAPE
*
GRAPE_SE
15
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
GRAPE
*
*
2:1_SPACING
TABLE_PHYSICAL_ASSIGNMENT_ITEM
15
TABLE_SPACING_ASSIGNMENT_ITEM
15 16 60
NET_TYPE
15 16 60
ELECTRICAL_CONSTRAINT_SET
PHYSICAL
SPACING
56
56
I723
56
I724
56
56
XTAL
56
56
TABLE_SPACING_ASSIGNMENT_HEAD
53 56 60
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
CRYSTAL
*
*
5:1_SPACING
TABLE_SPACING_ASSIGNMENT_ITEM
53 56 60
53 56 60
53 56 60
NET_TYPE
53 56 60
ELECTRICAL_CONSTRAINT_SET
PHYSICAL
SPACING
53 56 60
CRYSTAL
CRYSTAL
CRYSTAL
CRYSTAL
CRYSTAL
I718
53 56 60
53 56 60
I719
53 56 60
I720
53 56 60
I721
53 56 60
I722
XTAL_SOC_24M_I
XTAL_SOC_24M_O
SOC_24M_O
PMU_XTAL
PMU_EXTAL
4
4
4
56
56
53 56 60
6
5
4
B
57 60
3
GRAPE
GRAPE
GRAPE
GRAPE
MT_PANEL_IN<0..29>
MT_PANEL_OUT<0..39>
52 61
52 61
8
7
6
5
4
DDR
TABLE_PHYSICAL_ASSIGNMENT_HEAD
NET_PHYSICAL_TYPE
AREA_TYPE
NAND
TABLE_SPACING_ASSIGNMENT_HEAD
PHYSICAL_RULE_SET
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
DDR
*
*
3:1_SPACING
Edited by Foxit Reader ActiveX For Evaluation Only.
1
Copyright(C)22006-2009 Foxit Corporation
3
TABLE_PHYSICAL_ASSIGNMENT_HEAD
TABLE_PHYSICAL_ASSIGNMENT_ITEM
DDR_50S
*
TABLE_SPACING_ASSIGNMENT_ITEM
DRAM_SE
NET_PHYSICAL_TYPE
AREA_TYPE
PHYSICAL_RULE_SET
NAND_50S
*
45_OHM_SE
TABLE_PHYSICAL_ASSIGNMENT_ITEM
TABLE_PHYSICAL_ASSIGNMENT_HEAD
NET_PHYSICAL_TYPE
AREA_TYPE
PHYSICAL_RULE_SET
DDR_90D
*
DRAM_DIFF
TABLE_SPACING_ASSIGNMENT_HEAD
TABLE_PHYSICAL_ASSIGNMENT_ITEM
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
NAND
*
*
3:1_SPACING
TABLE_SPACING_ASSIGNMENT_ITEM
NET_TYPE
ELECTRICAL_CONSTRAINT_SET
PHYSICAL
SPACING
D
I333
I221
I222
I223
I225
I226
I224
DDR_50S
DDR_50S
DDR_50S
DDR_90D
DDR_90D
DDR_50S
DDR_50S
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR0_CA<0>
DDR0_CA<9..1>
DDR0_DM<3..0>
DDR0_CK_P
DDR0_CK_N
DDR0_CKE<1..0>
DDR0_CSN<1..0>
DDR_50S
DDR_50S
DDR_50S
DDR_90D
DDR_90D
DDR_50S
DDR_90D
DDR_90D
DDR_50S
DDR_90D
DDR_90D
DDR_50S
DDR_50S
DDR_50S
DDR_90D
DDR_90D
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR0_CA_ZQ_SOC
DDR0_DQ_ZQ_SOC
DDR0_ZQ_DRAM
DDR0_DQ<1..0>
DDR0_DQ<2>
DDR0_DQ<7..3>
DDR0_DQS_P<0>
DDR0_DQS_N<0>
DDR0_DQ<15..8>
DDR0_DQS_P<1>
DDR0_DQS_N<1>
DDR0_DQ<23..16>
DDR0_DQS_P<2>
DDR0_DQS_N<2>
DDR0_DQ<27..25>
DDR0_DQ<28>
DDR0_DQ<31..29>
DDR0_DQS_P<3>
DDR0_DQS_N<3>
DDR_50S
DDR_50S
DDR_50S
DDR_90D
DDR_90D
DDR_50S
DDR_50S
DDR_50S
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR1_CA<3..0>
DDR1_CA<9..4>
DDR1_DM<3..0>
DDR1_CK_P
DDR1_CK_N
DDR1_CKE<1..0>
DDR1_CSN<0>
DDR1_CSN<1>
DDR_50S
DDR_90D
DDR_90D
DDR_50S
DDR_90D
DDR_90D
DDR_50S
DDR_90D
DDR_90D
DDR_50S
DDR_90D
DDR_90D
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR1_CA_ZQ_SOC
DDR1_DQ_ZQ_SOC
DDR1_ZQ_DRAM
DDR1_DQ<7..0>
DDR1_DQS_P<0>
DDR1_DQS_N<0>
DDR1_DQ<15..8>
DDR1_DQS_P<1>
DDR1_DQS_N<1>
DDR1_DQ<23..16>
DDR1_DQS_P<2>
DDR1_DQS_N<2>
DDR1_DQ<31..24>
DDR1_DQS_P<3>
DDR1_DQS_N<3>
I329
I327
I294
I230
I334
I335
I229
I231
I232
I233
I235
I234
I236
I237
I337
I238
I336
C
NET_TYPE
ELECTRICAL_CONSTRAINT_SET
I239
I240
I201
I202
I203
I205
I206
I204
I339
D
SPACING
8 12 61
8 12 61
I68
8 12 61
I69
8 12 61
I70
8 12 61
I71
8 12 61
I72
8 12 61
I73
I74
8
I75
8
I76
12
I77
8 12 61
I126
FMI0_AD_CTRL
FMI0_AD_CTRL
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
FMI0_AD<0>
FMI0_AD<1>
FMI0_AD<2>
FMI0_AD<3>
FMI0_AD<4>
FMI0_AD<5>
FMI0_AD<6>
FMI0_AD<7>
FMI0_ALE
FMI0_CE0_L
FMI0_CLE
FMI0_DQS
FMI0_RE_L
FMI0_WE_L
FMI1_AD_CTRL
FMI1_AD_CTRL
FMI1_AD_CTRL
FMI1_AD_CTRL
FMI1_AD_CTRL
FMI1_AD_CTRL
FMI1_AD_CTRL
FMI1_AD_CTRL
FMI1_AD_CTRL
FMI1_CE
FMI1_AD_CTRL
FMI1_AD_CTRL
FMI1_AD_CTRL
FMI1_AD_CTRL
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
FMI1_AD<0>
FMI1_AD<1>
FMI1_AD<2>
FMI1_AD<3>
FMI1_AD<4>
FMI1_AD<5>
FMI1_AD<6>
FMI1_AD<7>
FMI1_ALE
FMI1_CE0_L
FMI1_CLE
FMI1_DQS
FMI1_RE_L
FMI1_WE_L
FMI0_AD_CTRL_PP
FMI0_AD_CTRL
FMI0_AD_CTRL
FMI0_AD_CTRL
FMI0_AD_CTRL
FMI0_AD_CTRL
FMI0_AD_CTRL
FMI0_AD_CTRL
FMI0_AD_CTRL
FMI0_CE
FMI0_AD_CTRL
8 12 61
I128
8 12 61
I131
8 12 61
I133
6 14 61
6 14 61
6 14 61
6 14 61
6 14 61
6 14 61
6 14 61
6 14 61
6 14 61
6 14 60 61
6 14 61
6 14 61
6 14 61
6 14 61
8 12 61
8 12 61
I135
8 12 61
I136
8 12 61
I137
8 12 61
I138
8 12 61
I139
8 12 61
I140
8 12 61
I141
8 12 61
I142
8 12 61
I143
8 12 61
I144
8 12 61
I152
I154
I338
PHYSICAL
8 12 61
I156
8 12 61
I160
6 14 61
6 14
6 14
6 14
6 14
6 14
6 14
6 14
6 14 61
6 14 61
6 14 61
C
6 14 61
6 14 61
6 14 61
8 12 61
8 12 61
8 12 61
8 12 61
NAND DEV
8 12 61
8 12 61
NET_TYPE
I330
I331
I332
I210
I209
I211
I212
I213
I215
I214
I216
I217
I218
B
I219
I220
ELECTRICAL_CONSTRAINT_SET
12
I295
8 12 61
I297
8 12 61
I296
8 12 61
I298
8 12 61
I299
8 12 61
I300
8 12 61
I302
8 12 61
I301
8 12 61
I303
8 12 61
I305
8 12 61
I304
8 12 61
I306
8 12 61
I307
I309
I310
VREF (DDR/FMI)
I311
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE2
AREA_TYPE
I312
SPACING_RULE_SET
I314
TABLE_SPACING_ASSIGNMENT_ITEM
VREF
*
*
5:1_SPACING
I313
I315
NET_TYPE
VOLTAGE
0.6V
0.6V
0.6V
0.6V
0.6V
0.6V
0.6V
0.6V
I166
I167
I169
I168
I244
I243
I241
I242
I316
SPACING
MIN_NECK_WIDTH=0.15 MM
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
I317
PPVREF_DDR0_CA_SOC
PPVREF_DDR0_DQ_SOC
PPVREF_DDR1_CA_SOC
PPVREF_DDR1_DQ_SOC
PPVREF_DDR0_CA_DRAM
PPVREF_DDR0_DQ_DRAM
PPVREF_DDR1_CA_DRAM
PPVREF_DDR1_DQ_DRAM
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
I318
8
I319
8
I320
8
I322
8
I323
12
I321
12
I324
12
I325
12
I326
0.9V
0.9V
I291
A
PHYSICAL
I292
8
PP_PWR
PP_PWR
PPVREF_FMI_SOC
PPVREF_FMI_NAND
VREF
VREF
7
SPACING
8
I308
NET_SPACING_TYPE1
PHYSICAL
8
6 61
14 61
6
5
4
3
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
FMI0_AD_BUF<0>
FMI0_AD_BUF<1>
FMI0_AD_BUF<2>
FMI0_AD_BUF<3>
FMI0_AD_BUF<4>
FMI0_AD_BUF<5>
FMI0_AD_BUF<6>
FMI0_AD_BUF<7>
FMI0_ALE_BUF
FMI0_CE0_BUF_L
FMI0_CLE_BUF
FMI0_DQS_BUF
FMI0_DQSN_BUF
FMI0_REP_BUF
FMI0_RE_BUF_L
FMI0_WE_BUF_L
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND_50S
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
FMI1_AD_BUF<0>
FMI1_AD_BUF<1>
FMI1_AD_BUF<2>
FMI1_AD_BUF<3>
FMI1_AD_BUF<4>
FMI1_AD_BUF<5>
FMI1_AD_BUF<6>
FMI1_AD_BUF<7>
FMI1_ALE_BUF
FMI1_CE0_BUF_L
FMI1_CLE_BUF
FMI1_DQS_BUF
FMI1_DQSN_BUF
FMI1_REP_BUF
FMI1_RE_BUF_L
FMI1_WE_BUF_L
B
8
7
6
5
4
Edited by Foxit Reader ActiveX For Evaluation Only.
1
Copyright(C)22006-2009 Foxit Corporation
3
GND
NET_TYPE
VOLTAGE
PHYSICAL
SPACING
MAX_LINE_WIDTH=0.6 MM
PWR
0V
I376
NET_TYPE
VOLTAGE
PHYSICAL
NET_TYPE
SPACING
VOLTAGE
PHYSICAL
D
I221
I1
I2
I3
I4
I5
I6
I7
I8
I9
I12
I11
I10
I13
I15
I14
I16
I17
I18
4.7V
4.7V
4.7V
4.7V
1.1V
4.7V
4.7V
4.7V
1.1V
4.7V
1.0V
4.7V
1.8V
4.7V
1.2V
4.7V
1.0V
4.7V
3.3V
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
BUCK0_LX0
BUCK0_LX1
BUCK0_LX2
BUCK0_LX3
BUCK0_FB
BUCK1_LX0
BUCK1_LX1
BUCK1_LX2
BUCK1_FB
BUCK2_LX0
BUCK2_FB
BUCK3_LX0
BUCK3_FB
BUCK4_LX0
BUCK4_FB
BUCK5_LX0
BUCK5_FB
BUCK6_LX0
BUCK6_FB
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PP1V8_PLL_SOC_F
PP1V8_EDP_AVDD_AUX
55
I61
55
I64
55
I263
55
I264
I393
0V
I369
0V
MM
MM
MM
I380
1.8V
PWR_0P2MM
PWR
PP1V8_XTAL
I301
1.8V
PP_PWR
PWR
PP1V8_VDD_ANA_TMPSADC
1.2V
1.8V
3.0V
PP_PWR
PP_PWR
PP_PWR
PWR
PWR
PWR
PPVDDI_NAND
PP1V8_DMIC_FILT
PP3V0_HP_ALS_FILT
8.75V
8.75V
PP_PWR
PP_PWR
PWR
PWR
SPKR_L1_SWITCH
SPKR_R1_SWITCH
TP_PP0V4_MIPI0D
TP_PP0V4_MIPI1D
GND
GND
GND
GND
GND
GND
0V
I338
4
I382
0V
I383
0V
7
7
0V
I384
7
0V
I385
I20
C
I21
I34
1.8V
1.8V
1.8V
1.8V
1.8V
I365
1.8V
I26
I364
I30
I28
I23
I29
I267
1.2V
1.2V
1.2V
MIN_NECK_WIDTH=0.15 MM
PWR_15MM
PWR_10MM
PWR_2MM
MAXIMUM_NECK_LENGTH=5
PP_PWR
MIN_NECK_WIDTH=0.15 MM
MIN_NECK_WIDTH=0.15 MM
MM
MAX_LINE_WIDTH=0.6 MM
PWR_0P3MM
PWR_0P5MM
MIN_NECK_WIDTH=0.15
PP_PWR
PWR_0P1MM
PP_PWR
MAXIMUM_NECK_LENGTH=10 MM
MM
MAX_LINE_WIDTH=0.5 MM
MAXIMUM_NECK_LENGTH=10 MM
PWR_0P3MM
MAXIMUM_NECK_LENGTH=5 MM
PP_PWR
PWR_1MM
MAXIMUM_NECK_LENGTH=15
PP_PWR
MM
I346
55
I226
55
I255
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
RST
*
*
3:1_SPACING
NET_TYPE
ELECTRICAL_CONSTRAINT_SET
55
I276
55
I277
PHYSICAL
SPACING
I165
I166
55
I377
55
1.8V
PP_PWR
PWR
I167
PPDVDD_SPKRAMP
I171
55
PP1V8_SW1
PP1V8_SW1_FOREHEAD
PP1V8_EXT_SW
PP1V8_SW2
PP1V8_S2R_SW3
PWR
PP1V8_S2R_SW3_COMP
I170
I172
I173
55 60 62
55 60 62
I357
55 60 62
I358
55 56 60 62
I359
I360
55 57 59 60 62
I347
60 62
I348
1.7V
4.2V
4.2V
4.2V
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PWR
PWR
PWR
PWR
4.7V
4.7V
PWR_1MM
PWR_1MM
PWR
PWR
PP1V7_VCP
PPVCC_VPROG_CP
PPVCC_VPROG_MB
PPVCC_VPROG_MB_F
PPVCC_MAIN_LCD_SW
PPVCC_MAIN_LCD_SW_CONN
4.7V
5.25V
1.8V
1.8V
PWR_1MM
PP_PWR
PP_PWR
PP_PWR
PWR
PWR
PWR
PWR
PPVCC_MAIN_GRAPE_FILT
PP5V25_GRAPE_FILT
PP1V8_GRAPE_SW
PP1V8_GRAPE_FILT
15 60
I175
15
I176
I177
I178
15
I375
53 60
I181
53 60
57 60 62
55 60 62
I381
55 60 62
I234
I231
60 62
I232
I261
I262
I275
51 52 60 61
I182
I183
I367
PWR
PWR
PWR
PP1V2_S2R
PP1V2_SW1
PP1V2_S2R_SW2
I24
I35
I269
I31
I36
I271
I345
I272
I33
I32
B
I37
I38
I39
I40
I274
3.3V
3.3V
3.3V
3.0V
1.7V
3.0V
3.0V
3.0V
3.3V
3.0V
3.0V
1.3V
1.0V
2.6V
2.9V
5.25V
MIN_NECK_WIDTH=0.1 MM
PWR_1MM
PWR_1P2MM
MAXIMUM_NECK_LENGTH=15
PP_PWR
PWR
PWR
PWR
PPVDD_SRAM
PP3V3_S2R
PP3V3_SW
MM
MAXIMUM_NECK_LENGTH=20 MM
PWR
PWR
LDOS
PP3V0_SPARE1
PP1V7_VA_VCP
PP_PWR
PP_PWR
MAX_LINE_WIDTH=0.5 MM
MAXIMUM_NECK_LENGTH=10 MM
PWR_0P3MM
PWR_0P3MM
PWR_0P4MM
PP_PWR
PWR_0P3MM
PWR_0P3MM
MAXIMUM_NECK_LENGTH=7 MM
PP_PWR
MAXIMUM_NECK_LENGTH=15 MM
PP_PWR
MAXIMUM_NECK_LENGTH=45 MM
PP_PWR
MAXIMUM_NECK_LENGTH=40 MM
PP_PWR
MAXIMUM_NECK_LENGTH=5 MM
PP_PWR
MAXIMUM_NECK_LENGTH=10 MM
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PP3V0_S2R_SENSOR
PP3V0_ALS
PP3V0_UVLO
PP3V3_ACC
PP3V0_S2R_TRISTAR
PP3V0_S2R_HALL
PP1V3_CAM
PP1V0_SOC
PP2V6_CAM_AF
PP2V9_CAM
PP5V25_GRAPE
D
60
55
PWR
PWR
PWR
PWR
PWR
24
16 60
55
PPVDD_CPU
PPVDD_GPU
PPVDD_SOC
PP1V8_S2R
22
TABLE_SPACING_ASSIGNMENT_ITEM
14
55
PWR
PWR
PWR
PWR
22
TABLE_SPACING_ASSIGNMENT_HEAD
55
55 56 60 62
I368
55 60 62
I236
55 60 62
I235
3.0V
3.0V
PP_PWR
PP_PWR
PWR
PWR
PP3V0_GYRO
PP3V0_ACCEL
19 60
55 60 62
I298
3.0V
PWR_0P3MM
PWR
PP3V0_S2R_HALL_FILT
20 50 60
RST
RST
RST
RST
RST
RST
RST
RST
RST
RST
RST
RST
RST
RST
RST
RST
RST
RST
RST
RST
RST
RST
BB_TRST_L
DBG_RST
DEBUG_RST_L
GSM_TXBURST_IND
RST_AP_1V8_L
RESET_SOC_L
GPIO_SOC2BB_RST_L
RST_BB_PMU_L
RST_BT_L
RST_DET_L
GPIO_SOC2GRAPE_RESET_L
PMU_GPIO_CODEC_RST_L
TS2PMU_RESET_IN
GPIO_BB2SOC_RESET_DET_L
SIMCRD_RST
WDOG_SOC
WDOG_SOC2PMU_RESET_IN
GPIO_OSCAR_RESET_L
ISP1_CAM_FRONT_SHUTDOWN_L
ISP0_CAM_REAR_SHUTDOWN_L
ISP1_CAM_FRONT_SHUTDOWN_L_F
ISP0_CAM_REAR_SHUTDOWN_L_F
RST
RST
RST
RST
RST
RST
RST
PMU_GPIO_PMU2BBPMU_RST_L
PMU_GPIO_PMU2BBPMU_RST_R_L
JTAG_AP_TRST_L
GPIO_BB_RST_L
RST_PMU_IN
UD881_RST
UD882_RST
DEV
25 28 61
4 13 25 47 57 60 61
5 25 27 60
5 52 60 61
15 57
I332
I373
55 60 62
I374
57 60 62
I335
I337
56 60 62
4 13
13 57
5 19 60
7 22
7 23
22 60
23 60
I336
25 27 57 60
57
DEV
DEV
56 60 62
56 60 62
56 60 62
I285
56 60 62
I244
56 60 62
I240
56 60 62
I242
1.2V
1.8V
2.9V
3.0V
PWR_0P3MM
PP_PWR
PP_PWR
PWR_0P3MM
PWR
PWR
PWR
PWR
PP1V2_CAM_FRONT_FILT
PP1V8_CAM_FRONT_FILT
PP2V9_AVDD_CAM_FRONT_FILT
PP3V0_ALS_FILT
2.6V
1.28V
1.8V
1.28V
2.8V
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PWR
PWR
PWR
PWR
PWR
PP2V6_CAM_REAR_AF_FILT
PP1V3_CAM_REAR_FILT
PP1V8_CAM_REAR_FILT
PP1V3_CAM_REAR
PP2V9_AVDD_CAM_REAR_FILT
3.0V
1.8V
PP_PWR
PP_PWR
PWR
PWR
PP3V0_COMP
PP1V8_COMP
3.0V
3.0V
3.0V
3.0V
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PWR
PWR
PWR
PWR
PP3V0_SENSOR_PROX_FILT
60
PP3V0_SENSOR_PROX_ADUX1049_FILT
PPAVDD_SENSOR_PROX_ADUX1049
PP3V0_SENSOR_PROX_AD7149_FILT
6.0V
3.3V
3.3V
3.3V
3.3V
PWR_2MM
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PWR
PWR
PWR
PWR
PWR
PPVBUS_E75_USB_CONN
PPOUT_E75_ACC_ID1_CONN
PPOUT_E75_ACC_ID2_CONN
PPOUT_E75_ACC_ID1
PPOUT_E75_ACC_ID2
60
22 60
22 60
22 60
56 60 62
B
56 60 62
56 60 62
I247
56 60 62
I246
56 60 62
I243
56 60 62
I300
I245
23 60
23 60
23 60
PMU SENSE
23 60
TABLE_SPACING_ASSIGNMENT_HEAD
I238
INPUT/MAIN/ALWAYS
I239
MIN_NECK_WIDTH=0.15 MM
I43
I59
I58
I41
I390
4.7V
4.7V
6.0V
1.8V
4.7V
PWR_15MM
MAXIMUM_NECK_LENGTH=15
PWR_10MM
PWR_2MM
MAX_LINE_WIDTH=0.6 MM
PWR_0P2MM
PWR_10MM
MM
PPVCC_MAIN
PPBATT_VCC
PPVBUS_USB_DCIN
PP1V8_ALWAYS
PPBATT_AUDIO_AMP
PWR
PWR
PWR
PWR
PWR
I241
55 60 62
I388
55 60 62
I389
56 60 62
I391
PMU
I252
I253
I47
I49
I50
I229
I230
20.4V
20.4V
20.4V
20.4V
20.4V
20.4V
PP_PWR
PP_PWR
PWR_0P5MM
MAX_LINE_WIDTH=0.6
PWR_0P5MM
PWR_PMU
PWR_PMU
MAX_LINE_WIDTH=0.6 MM
MM
WLED_LX_B
WLED_LX_A
PWR
PWR
PWR
PWR
PWR
PWR
PPLED_OUT_A
PPLED_OUT_B
PPLED_BACK_REG_A
PPLED_BACK_REG_B
56 61
I352
56 61
I351
I297
56 60 62
3.0V
PP_PWR
I356
53 60
MAXIMUM_NECK_LENGTH=20 MM
PP_PWR
PP_PWR
I361
A
I55
I57
I53
I52
I60
I56
I289
I256
47 55 60
PMU_VCENTER
55 60
PP6V0_LCM_HI
56 61
PWR
PWR
6.0V
6.0V
20.4V
4.7V
PP_PWR
PP_PWR
PP_PWR
PP_PWR
PWR
PWR
PWR
PWR
LCM_LX
SW_CHGA
6.0V
6.0V
PWR_0P2MM
PWR_0P2MM
PWR
PWR
USB_VBUS_DETECT
USB_VBUS_DETECT_R
PWR
PMU_GPIO_BB_VBUS_DET
6.0V
8
7
AREA_TYPE
SPACING_RULE_SET
PMU_SENSE
*
*
3:1_SPACING
PMU_SENSE
GND
*
1.5:1_SPACING
TABLE_SPACING_ASSIGNMENT_ITEM
60
NET_TYPE
VOLTAGE
45 60
48 49 60
I290
48 49 60
I291
48 49 60
I292
47 48
I342
47 48
PWR
PP3V0_IO_ALS_FILT
ANLG
ANLG
BATT_NTC
BATT_SNS
ANLG
BATT_SNS_R
I371
54 57 60
I372
54 55
55
56 60
56
55 61
4 55
4
25 28 57 61
6
5
4
1.1V
1.1V
1.0V
1.1V
1.1V
1.0V
I344
60
53 60
PP6V0_LCM_VBOOST
PPVBUS_PROT
PP_PWR
PWR_0P2MM
NET_SPACING_TYPE2
56 60 62
MAXIMUM_NECK_LENGTH=5 MM
6.0V
6.0V
NET_SPACING_TYPE1
24 60
I343
I355
I54
24 60
TABLE_SPACING_ASSIGNMENT_ITEM
47 55 56 57 58 60 62
I254
I51
C
47 57
5 25 29
19 60
I331
I22
GND_COMP
GND_PMU
GND_SPKR_AMP_L1
GND_SPKR_AMP_L2
GND_SPKR_AMP_R1
GND_SPKR_AMP_R2
22
RST
I174
1.1V
1.1V
1.0V
1.8V
GND
GND
GND
GND
GND
GND
15 60
10
I168
I268
GND_AUDIO_CODEC
GND_AVDD_CAM_FRONT
GND_PP1V8_CAM_FRONT
GND_PP2V9_CAM_FRONT
55
RAILS
I19
GND
GND
GND
GND
9
55
55
0V
MAX_LINE_WIDTH=0.6 MM
1.8V
1.8V
0.4V
0.4V
55
I392
SPACING
BUCKS
PP_PWR
PP_PWR
PP_PWR
PP_PWR
GND
MAX_LINE_WIDTH=0.6
GND
MAX_LINE_WIDTH=0.6
GND
MAX_LINE_WIDTH=0.6
GND
0V
I200
3
1.05V
1.8V
PHYSICAL
PWR_SENSE
PWR_SENSE
PWR_SENSE
PWR_SENSE
PWR_SENSE
PWR_SENSE
SPACING
PMU_SENSE
PMU_SENSE
PMU_SENSE
PMU_SENSE
PMU_SENSE
PMU_SENSE
MIN_NECK_WIDTH=0.053 MM
PWR_SENSE
PWR_SENSE
PMU_SENSE
PMU_SENSE
MIN_NECK_WIDTH=0.053 MM
PPVDD_CPU_SOC_SENSE
PPVDD_GPU_SOC_SENSE
PPVDD_SOC_SOC_SENSE
PPVDD_CPU_RAIL_SENSE
PPVDD_GPU_RAIL_SENSE
PPVDD_SOC_RAIL_SENSE
ADC_SMPS1_MSMC_1V05
ADC_SMPS3_MSME_1V8
11 57 61
11 57 61
10 57 61
11 57
11 57
10 57
8
7
6
5
4
Edited by Foxit Reader ActiveX For Evaluation Only.
1
Copyright(C)22006-2009 Foxit Corporation
3
RF
NET_TYPE
TABLE_PHYSICAL_ASSIGNMENT_HEAD
NET_PHYSICAL_TYPE
AREA_TYPE
PHYSICAL_RULE_SET
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
PHYSICAL
TABLE_PHYSICAL_ASSIGNMENT_ITEM
RF_50S
*
100_RF
*
*
50_RF
*
*
I89
50_RF_SPACING
PHYSICAL_RULE_SET
I87
TABLE_SPACING_ASSIGNMENT_ITEM
50_RF_CLEAR
TABLE_PHYSICAL_ASSIGNMENT_ITEM
RF_100D
*
PHYSICAL
100_OHM_RF
*
*
50_RF_CLEAR_SPACING
TABLE_SPACING_ASSIGNMENT_ITEM
RF_60
*
*
I88
I86
1.2:1_SPACING
RF_50S
RF_50S
RF_50S
RF_50S
RF_50S
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
I226
50_B1_TX_PAD_IN
50_B4_TX_PAD_IN
50_B1_B4_DPLX_ANT
50_B1_B4_ANT
50_B1_B4_ANT_PHASESHIFT
34
I272
34
I273
34
I274
34 40
I276
34
I275
I277
I85
NET_TYPE
D
VOLTAGE
I3
PHYSICAL
PWR_RF
MAX_LINE_WIDTH=1
PWR_RF
I4
I8
I11
I12
PWR_0P1MM
1.3V
4.7V
UNDEFINED
2.05V
4.7V
1.8V
1.8V
1.8V
3.3V
I13
I24
1.2V
1.05V
1.05V
1.05V
1.05V
2.95V
2.65V
I22
I27
I25
I29
I28
I30
I218
I32
I31
I33
MIN_NECK_WIDTH=0.06 MM
MAX_LINE_WIDTH=1 MM
PWR_0P1MM
MAX_LINE_WIDTH=1 MM
PWR_0P1MM
MAX_LINE_WIDTH=1 MM
PWR_0P1MM
MAX_LINE_WIDTH=1 MM
PWR_0P25MM
1.8V
I23
I26
MM
MIN_NECK_WIDTH=0.15 MM
MAX_LINE_WIDTH=1 MM
I17
C
MM
1.8V
1.8V
I20
MM
MAXIMUM_NECK_LENGTH=5 MM
MIN_NECK_WIDTH=0.15 MM
MAX_LINE_WIDTH=1 MM
I269
I16
PWR_RF
MAX_LINE_WIDTH=1
PWR_RF
MAX_LINE_WIDTH=1
PWR_RF
MAX_LINE_WIDTH=1
PWR_RF
MIN_NECK_WIDTH=0.06 MM
MAX_LINE_WIDTH=1 MM
I15
I19
MAX_LINE_WIDTH=1 MM
2.5V
I14
I18
PP_BATT_VCC_2G_FEM
PP_PA
I90
40
I92
34 35 36 37 38 39 40
PWR_RF
PP_LVS1
I100
26 28
I96
I9
I10
MM
I91
I93
1.8V
I6
PWR_RF
PWR_RF
MIN_NECK_WIDTH=0.06 MM
MAX_LINE_WIDTH=1 MM
I7
I5
I94
SPACING
MAX_LINE_WIDTH=1 MM
4.7V
3.8V
1.05V
1.05V
1.3V
1.3V
1.8V
1.8V
1.8V
2.05V
2.05V
1.05V
1.05V
I34
PWR_0P1MM
PWR_0P3MM
PWR_0P3MM
MAX_LINE_WIDTH=1 MM
PWR_0P25MM
MAXIMUM_NECK_LENGTH=9 MM
MAX_LINE_WIDTH=1 MM
PWR_0P3MM
MAX_LINE_WIDTH=1 MM
PWR_0P75MM
MAX_LINE_WIDTH=1 MM
PWR_0P75MM
MAX_LINE_WIDTH=1 MM
PWR_0P75MM
MAX_LINE_WIDTH=1 MM
PWR_0P75MM
MAX_LINE_WIDTH=1 MM
PWR_0P1MM
MAXIMUM_NECK_LENGTH=4 MM
MAX_LINE_WIDTH=1 MM
PWR_0P1MM
PWR_RF
PWR_RF
PWR_RF
PWR_RF
PP_RF1_1V3_DRX_FE
PP_VREG
PP_RF2_2V05_DRX_BB
PP_BATT_VCC_PA_DCDC
PWR_RF
PWR_RF
PWR_RF
PWR_RF
PP_LDO1
PP_LDO2_XO_HS_1V8
PP_LDO3_AMUX_1V8
PP_LDO4_VDDA_3V3
PWR_RF
PP_LDO5_GPS_LNA_2V5
I69
31
I73
26
I227
31
PWR_RF
MAX_LINE_WIDTH=1 MM
PWR_0P75MM
MAX_LINE_WIDTH=1 MM
PWR_RF
MAX_LINE_WIDTH=1 MM
PWR_RF
MAX_LINE_WIDTH=1 MM
PWR_RF
MAX_LINE_WIDTH=1 MM
PWR_RF
MAX_LINE_WIDTH=1 MM
PWR_RF
MAX_LINE_WIDTH=1 MM
PWR_RF
MAX_LINE_WIDTH=1 MM
PWR_RF
MAX_LINE_WIDTH=1 MM
PWR_RF
MAX_LINE_WIDTH=1 MM
PWR_RF
RF_50S
RF_50S
RF_50S
RF_50S
RF_50S
RF_50S
RF_50S
RF_50S
RF_50S
RF_50S
RF_50S
RF_50S
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
I228
I98
26 28
I97
26 27 28
I99
26 28
PWR_RF
PP_LDO6_RUIM_1V8
26 42
I101
26 28 44 60
I104
PWR_RF
PP_LDO6_RUIM_1V8_FILT
PWR_RF
PP_LDO7_DAC_1V8
44
I103
I105
26 28
I106
PWR_RF
PWR_RF
PWR_RF
PWR_RF
PWR_RF
PWR_RF
PP_LDO8_VDDPX_1V2
PP_LDO9_PLL_1V05
PP_LDO10_ADSP_1V05
PP_LDO11_MDSP_FW_1V05
PP_LDO12_MDSP_SW_1V05
PP_LDO13_VDDPX_2V95
26 28
I230
26 28
I231
I234
PWR_RF
26 28
I253
26 28
I254
26 28
I255
PP_LDO14_2V65
26 33 40 41
I257
PP_VSW_S1
PP_SMPS1_MSMC_1V05
PP_VSW_S2
PP_SMPS2_RF1_1V3
PP_VSW_S3
PP_RF1_1V8_DIG
PP_SMPS3_MSME_1V8_FILT
PP_VSW_S4
PP_SMPS4_RF2_2V05
PP_VSW_S5
PP_SMPS5_DSP_1V05
26
50_B20_TX_PAD_IN
50_B20_DPLX_ANT
50_B20_ANT
50_B20_ANT_PHASESHIFT
RF_50S
RF_50S
RF_50S
RF_50S
RF_50S
RF_50S
RF_50S
RF_50S
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
50_B5_TX_PAD_IN
50_B8_TX_PAD_IN
50_B5_DPLX_ANT
50_B8_DPLX_ANT
50_B5_ANT
50_B8_ANT
50_B5_ANT_PHASESHIFT
50_B8_ANT_PHASESHIFT
26 28 60
I262
26
I123
26 28 31 60
I124
26
I126
31
I125
29
I127
26
I130
26 31 60
I128
26
I232
26 60
PWR_RF
PP_BATT_VCC_PA_DCDC_IN2
I134
NET_TYPE
45_OHM_SE
I201
35
I280
32 35
I285
32 35
I286
35
I284
35
I283
35 40
I282
35 40
I281
32
I293
32
I294
35
I292
35
RF_50S
RF_50S
RF_50S
RF_50S
RF_50S
RF_50S
RF_50S
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
50_B7_ANT
50_B7_BALUN_IN_RX
50_B7_DPLX_ANT
50_B7_DUPLX_RX
50_B7_TX_PAD_IN
50_B7_TX_SAW_IN
50_B7_TX_SAW_OUT
RF_50S
RF_50S
RF_50S
RF_50S
RF_50S
RF_50S
RF_50S
RF_50S
RF_50S
RF_50S
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
50_XCVR_B7_TX
50_B13_TX_PAD_IN
50_B17_TX_PAD_IN
50_B13_DPLX_ANT
50_B17_DPLX_ANT
50_B13_LPF_IN
50_B13_ANT
50_B17_ANT
50_B13_ANT_PHASESHIFT
50_B17_ANT_PHASESHIFT
I132
SPACING
RF_60
I289
36
I288
29 30
I109
29 30
I108
25 29
I110
29 34
I112
29 35
I111
29 37
I113
29 36
I114
29 38
I115
29 34 35 36
37 38
25 29
I116
27 29
I118
25 29 30
I119
25 29 30
I120
29 39
I122
I117
I121
29 41
I169
29 41
I170
29 41
I171
27 28
I172
25 27 28
I173
25 27 28
I174
36 40
I175
I177
37
I179
37
I178
37
I181
37
I182
37 40
I180
37 40
I184
I183
37
I187
36 40
I186
I189
36
I190
32 36
I188
36
I192
36
I191
36
I195
RF_50S
RF_50S
RF_50S
RF_50S
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
50_XCVR_2G_LB_TX_MATCH
50_XCVR_2G_HB_TX_MATCH
50_2G_LB_PA_IN
50_2G_HB_PA_IN
RF_50S
50_RF_CLEAR
50_PRI_ANT_ASM
RF_50S
RF_50S
RF_50S
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
50_DRX_ANT_TEST
50_DRX_ANT_PHASESHIFT
50_DRX_ANT_FEED
RF_50S
50_RF_CLEAR
50_COUPLER_TERM
RF_50S
RF_50S
50_RF_CLEAR
50_RF_CLEAR
50_DIVERSITY_SWITCH_MATCH
50_GPS_LNA_OUT
30 36
I193
38
I194
38
I197
38
I196
38
I199
38
I198
38 40
I200
38 40
I205
I206
38
I207
I210
I211
40
I209
40
I265
40
I264
I263
28
I225
I267
40
I268
RF_50S
RF_50S
RF_50S
RF_50S
RF_50S
RF_50S
RF_50S
RF_50S
RF_50S
RF_50S
RF_50S
I53
B
I55
I56
I57
I58
I60
I61
I59
I62
I66
I67
50_RF_CLEAR
50_RF
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
50_RF
50_RF_CLEAR
50_RF_CLEAR
50_RF
50_RF_CLEAR
50_RF_CLEAR
50_XCVR_B13_B17_B20_TX
50_XCVR_2G_LB_TX
50_XCVR_B8_TX
50_XCVR_B5_B18_TX
50_XCVR_B2_B25_TX
50_XCVR_2G_HB_TX
50_XCVR_B3_B4_TX
50_XCVR_B1_TX
50_PDET_IN
50_PDET_PAD_OUT
50_PDET_PAD_IN
30 33
I149
30 40
I221
30 33
I222
RF_50S
RF_50S
RF_50S
I64
I63
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
50_B1_TX_SAW_IN
50_B3_B4_TX_SAW_IN
50_B2_B25_TX_SAW_IN
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_60
RF_60
RF_60
RF_60
RF_60
RF_60
RF_60
RF_60
RF_60
RF_60
RF_60
RF_60
RF_60
RF_60
RF_60
RF_60
TX_BB_Q_P
TX_BB_Q_N
DRX_BB_Q_P
DRX_BB_Q_N
GPS_BB_Q_P
GPS_BB_Q_N
PRX_BB_Q_P
PRX_BB_Q_N
DRX_BB_I_P
DRX_BB_I_N
GPS_BB_I_P
GPS_BB_I_N
PRX_BB_I_P
PRX_BB_I_N
TX_BB_I_P
TX_BB_I_N
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_100D
RF_100D
RF_100D
RF_100D
RF_100D
RF_100D
RF_100D
RF_100D
RF_100D
RF_100D
RF_100D
RF_100D
RF_100D
RF_100D
RF_100D
RF_100D
RF_100D
RF_100D
RF_100D
RF_100D
RF_100D
RF_100D
RF_100D
RF_100D
RF_100D
RF_100D
RF_100D
RF_100D
RF_100D
RF_100D
RF_100D
RF_100D
RF_100D
RF_100D
RF_100D
RF_100D
RF_100D
RF_100D
RF_100D
RF_100D
RF_100D
RF_100D
RF_100D
RF_100D
100_RF
100_RF
100_RF
100_RF
100_RF
100_RF
100_RF
100_RF
100_RF
100_RF
100_RF
100_RF
100_RF
100_RF
100_RF
100_RF
100_RF
100_RF
100_RF
100_RF
100_RF
100_RF
100_RF
100_RF
100_RF
100_RF
100_RF
100_RF
100_RF
100_RF
100_RF
100_RF
100_RF
100_RF
100_RF
100_RF
100_RF
100_RF
100_RF
100_RF
100_RF
100_RF
100_RF
100_RF
100_XCVR_B13_B17_B20_PRX_P 30 33
100_XCVR_B13_B17_B20_PRX_N 30 33
100_XCVR_B8_PRX_P
30 32
100_XCVR_B8_PRX_N
30 32
100_XCVR_B5_B18_PRX_P
30 32
100_XCVR_B5_B18_PRX_N
30 32
100_XCVR_B2_B25_PRX_P
30 32
100_XCVR_B2_B25_PRX_N
30 32
100_XCVR_B3_PRX_P
30 32
100_XCVR_B3_PRX_N
30 32
100_XCVR_DCS_PCS_PRX_P
100_XCVR_DCS_PCS_PRX_N
100_XCVR_B1_B4_PRX_P
30 32
100_XCVR_B1_B4_PRX_N
30 32
100_XCVR_B8_B20_DRX_P
30 41
100_XCVR_B8_B20_DRX_N
30 41
100_XCVR_B5_B18_B13_B17_DRX_P 30
100_XCVR_B5_B18_B13_B17_DRX_N 30
100_XCVR_B2_B25_B3_DRX_P 30 41
100_XCVR_B2_B25_B3_DRX_N 30 41
100_XCVR_B1_B4_DRX_P
30 41
100_XCVR_B1_B4_DRX_N
30 41
100_XCVR_GPS_RX_P
30 41
100_XCVR_GPS_RX_N
30 41
100_B13_DUPLX_RX_P
33 38
100_B13_DUPLX_RX_N
33 38
100_B17_DUPLX_RX_P
33 38
100_B17_DUPLX_RX_N
33 38
100_B20_DUPLX_RX_P
33 36
100_B20_DUPLX_RX_N
33 36
100_DCS_PCS_RX_FILTER_P
100_DCS_PCS_RX_FILTER_N
100_B1_B4_DUPLX_RX_P
32 34
100_B1_B4_DUPLX_RX_N
32 34
100_B8_DUPLX_RX_P
32 37
100_B8_DUPLX_RX_N
32 37
100_B5_B18_DUPLX_RX_P
32 37
100_B5_B18_DUPLX_RX_N
32 37
100_B7_PRX_BALUN_OUT_P
32
100_B7_PRX_BALUN_OUT_N
32
100_B7_PRX_MATCH_P
32
100_B7_PRX_MATCH_N
32
100_XCVR_B7_PRX_P
30 32
100_XCVR_B7_PRX_N
30 32
29 30
29 30
29 30
29 30
29 30
29 30
29 30
29 30
29 30
29 30
29 30
29 30
29 30
29 30
29 30
I266
30 40
I157
30 32
30 32
I156
30
I159
30
I158
30 40
32 33
I162
32 33
I220
RF_50S
RF_50S
RF_50S
RF_50S
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
50_GPS_ANT_COAX
50_GPS_ANT_MATCH
50_GPS_ANT_TEST
50_GPS_LNA_IN
43
41
RF_CLK
RF_CLK
RF_CLK
I250
41 42
I251
SLEEP_CLK_32K
19P2M_WTR
19P2M_MDM
25 27 28
27 30
25 27 28
42
TABLE_SPACING_RULE_HEAD
SPACING_RULE_SET
42
LAYER
LINE-TO-LINE SPACING
WEIGHT
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
GND
50_RF
*
50_RF_CLEAR_SPACING
GND
50_RF_CLEAR
*
50_RF_CLEAR_SPACING
GND
100_RF
*
100_RF_CLEAR_SPACING
GND
RF_60
*
1.2:1_SPACING
GND
PWR_RF
*
1.2:1_SPACING
PWR_RF
PWR_RF
*
1.2:1_SPACING
RF_CLK
*
*
3:1_SPACING
RF_CLK
GND
*
1.2:1_SPACING
TABLE_SPACING_RULE_ITEM
50_RF_SPACING
32 33
RF_50S
RF_50S
50_RF_CLEAR
50_RF_CLEAR
I219
I223
RF_50S
RF_50S
RF_50S
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
50_PRI-ANT_COUPLER
50_PRI-ANT_PHASE
I224
I72
I71
I75
I78
I79
A
I77
I76
I84
50_B1_TX_SAW_OUT
50_B2_TX_SAW_OUT
50_B3_TX_SAW_OUT
50_B4_TX_SAW_OUT
50_B5_TX_SAW_OUT
50_B8_TX_SAW_OUT
50_B13_TX_SAW_OUT
50_B17_TX_SAW_OUT
50_B20_TX_SAW_OUT
I235
33 34
TOP,BOTTOM
TABLE_SPACING_ASSIGNMENT_ITEM
?
0.178 MM
TABLE_SPACING_RULE_ITEM
50_RF_SPACING
ISL3
TABLE_SPACING_ASSIGNMENT_ITEM
?
0.130 MM
RF_50S
RF_50S
RF_50S
RF_50S
I82
I83
50_RF_CLEAR
50_RF
50_RF_CLEAR
50_RF_CLEAR
TABLE_SPACING_RULE_ITEM
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR_SPACING
TOP,BOTTOM
0.178 MM
?
50_RF_CLEAR_SPACING
ISL3
0.130 MM
?
TABLE_SPACING_ASSIGNMENT_ITEM
40 43
50_ANT2_TERM
50_DRX_ANT_TERM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_RULE_ITEM
*
50_RF_CLEAR_SPACING
100_RF_CLEAR_SPACING
33 35
TABLE_SPACING_ASSIGNMENT_ITEM
?
0.138 MM
TOP,BOTTOM
TABLE_SPACING_ASSIGNMENT_ITEM
?
0.143 MM
TABLE_SPACING_RULE_ITEM
33 34
33 37
I237
33 37
I238
33 38
I239
33 38
I240
33 36
50_PCS_RX
50_PCS_RX_MATCH
50_DCS_RX
50_DCS_RX_MATCH
7
TABLE_SPACING_ASSIGNMENT_ITEM
?
0.092 MM
TABLE_SPACING_RULE_ITEM
I243
I244
I245
I246
I247
8
*
33 35
I242
I80
50_RF_SPACING
TABLE_SPACING_RULE_ITEM
RF_50S
RF_50S
I236
I241
I81
50_PRI_ANT_TEST
50_PRI_ANT_TEST_IN
50_PRI_ANT_COAX
6
RF_60
RF_60
RF_60
RF_60
RF_60
RF_60
RF_60
RF_60
RF_60
RF_60
RF_60
100_RF_CLEAR_SPACING
2G_FEM_S0
2G_FEM_S1
2G_FEM_S2
2G_FEM_S3
2G_FEM_S4
2G_FEM_S5
2G_FEM_S6
BB_PDM
BB_PDM_FILT
DCDC_ADJ
PA_R1
5
C
B
43
TABLE_SPACING_RULE_ITEM
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
41
41 43
I252
I261
RF_50S
RF_50S
RF_50S
RF_50S
RF_50S
RF_50S
RF_50S
RF_50S
RF_50S
41
30 32
I260
I74
D
29 30
30 33
I160
I65
SPACING
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
29 41
I185
I133
50_HSIC_CAL
36
WTR_GP_DATA0
WTR_GP_DATA1
BB_ERROR_FLAG
PA_ON_B1_B4
PA_ON_B2_B3
PA_ON_B5_B8
PA_ON_B7_B20
PA_ON_B13_B17
PA_BS
LAT_SW1_CTL
PS_HOLD
WTR_RF_ON
WTR_RX_ON
DCDC_MODE
DCDC_ENABLE
DRX_ASM_V1
DRX_ASM_V2
DRX_ASM_V3
DRX_ASM_V4
19P2M_CLK_EN
PMIC_RESOUT_L
PMIC_SSBI
I176
I259
I135
PHYSICAL
I279
RF_60
RF_60
RF_60
RF_60
RF_60
RF_60
RF_60
RF_60
RF_60
RF_60
RF_60
RF_60
RF_60
RF_60
RF_60
RF_60
RF_60
RF_60
RF_60
RF_60
RF_60
RF_60
26 28
I256
PWR_RF
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
50_RF_CLEAR
I229
I102
PWR_RF
PWR_RF
PWR_RF
PWR_RF
PWR_RF
PWR_RF
PWR_RF
PWR_RF
PWR_RF
PWR_RF
PWR_RF
MAX_LINE_WIDTH=1 MM
I278
35
I291
RF_50S
RF_50S
RF_50S
RF_50S
I233
4.7V
50_B2_TX_PAD_IN
50_B3_TX_PAD_IN
50_B2_DUPLX_RX
50_B3_DUPLX_RX
50_B2_DPLX_ANT
50_B3_DPLX_ANT
50_B2_ANT
50_B3_ANT
50_B2_RX_BALUN
50_B3_RX_BALUN
50_B2_ANT_PHASESHIFT
50_B3_ANT_PHASESHIFT
I290
26 60
I258
MAX_LINE_WIDTH=1 MM
SPACING
I107
100_RF_CLEAR_SPACING
TABLE_SPACING_ASSIGNMENT_ITEM
AREA_TYPE
SPACING
TABLE_SPACING_ASSIGNMENT_ITEM
50_OHM_RF
TABLE_PHYSICAL_ASSIGNMENT_HEAD
NET_PHYSICAL_TYPE
PHYSICAL
NET_TYPE
NET_TYPE
SPACING_RULE_SET
*
TABLE_SPACING_ASSIGNMENT_ITEM
?
0.118 MM
29 40
25 29 40
29 33 40
29 33 40
NC_PMU_OUT_32K_CLK_GPS
25 29 40
NO_TEST=TRUE
MAKE_BASE=TRUE
PMU_OUT_32K_CLK_GPS
IN
57
64
29 40
29 40
29 39
39
39
29 34 35 36 37 38
4
3
2
1
8
7
6
5
4
3
Edited by Foxit Reader ActiveX For Evaluation Only.
1
Copyright(C)22006-2009 Foxit Corporation
RF
TABLE_PHYSICAL_ASSIGNMENT_HEAD
NET_PHYSICAL_TYPE
AREA_TYPE
PHYSICAL_RULE_SET
WIFI_50S
*
50_OHM_RF
TABLE_PHYSICAL_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
WIFI
*
*
4:1_SPACING
TABLE_SPACING_ASSIGNMENT_ITEM
D
D
NET_TYPE
PHYSICAL
WIFI_50S
WIFI_50S
WIFI_50S
WIFI_50S
WIFI_50S
WIFI_50S
WIFI_50S
WIFI_50S
WIFI_50S
WIFI_50S
WIFI_50S
WIFI_50S
WIFI_50S
WIFI_50S
I2
I52
I53
I54
I1
I42
I43
I44
I55
I56
I57
I45
I46
I47
WIFI_50S
WIFI_50S
WIFI_50S
WIFI_50S
I48
I50
I51
I49
SPACING
WIFI
WIFI
WIFI
WIFI
WIFI
WIFI
WIFI
WIFI
WIFI
WIFI
WIFI
WIFI
WIFI
WIFI
RF_G_0_MATCH_MOD
RF_G_0_MATCH_ANT
RF_G_0_BAW_MOD
RF_G_0_BAW_ANT
RF_G_0_DIPLEXER
RF_A_0_MATCH
RF_A_0_DIPLEXER
RF_G_1_MATCH_MOD
RF_G_1_MATCH_ANT
RF_G_1_BAW_MOD
RF_G_1_BAW_ANT
RF_G_1_DIPLEXER
RF_A_1_MATCH
RF_A_1_DIPLEXER
WIFI
WIFI
WIFI
WIFI
RF_0_ANT_MATCH_T
RF_0_ANT
RF_1_ANT_MATCH_T
RF_1_ANT
46
46
46
46
46
46
46
46
46
46
46
46
46
46
C
C
B
B
A
8
7
6
5
4
3