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N3 Industrial Electronics November 2016 Memorandum

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MARKING GUIDELINE
NATIONAL CERTIFICATE
NOVEMBER EXAMINATION
INDUSTRIAL ELECTRONICS N3
18 NOVEMBER 2016
This marking guideline consists of 7 pages.
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MARKING GUIDELINE
-2INDUSTRIAL ELECTRONICS N3
T640(E)(N18)T
QUESTION 1
1.1
1.2
1.1.1
1.1.2
1.1.3
1.1.4
1.1.5
1.1.6
1.1.7
1.2.1
1.2.2
1.2.3
1.2.4
1.2.5
1.2.6
1.2.7
True
True
True
True
False
True
False
(7 × 1)
(7)
(7 × 1)
(7)
[14]
C
A
C
B
B
C
C
QUESTION 2
2.1
2.1.1
2.1.2
2.1.3
Loop ABCDA
RsI2 +R1I1 = 10
20I2 + 25I1 = 10ü
25I1 + 20I2 = 10 ------------(1)ü
(2)
Loop AFEDA
Rs(I1 – I2) + R1I1 = 10
30I1 – 30I2 + 25 I1 = 10ü
55I1 – 30I2 = 10 --------------(2)ü
(2)
(1) x -55 : -1 375I1 -1 100I2 = -550
(2) x 25 : 1 375I1 - 750I2 = 250
-1 850I2 = -300ü
I2 = 300/1 850
I2 = 0,162 Aü
(2)
Substitute I2 in Equation 1
25I1 + 20(0,162) = 10
25I1 = 10 – 3,24ü
I1 = 6,76/25
I1 = 0,27 Aü
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MARKING GUIDELINE
2.2
-3INDUSTRIAL ELECTRONICS N3
T640(E)(N18)T
XL = 2πfL
= 2 × π × 50 × 32 × 10-3
= 10,053 Ωü
ZRL = R2 + XL2
=
122 + 10,0532
ü
= 15,564 Ωü
Cos ƟL = R/ZRL
ƟL = Cos-1(12/15,564)
= 39,952°ü
IRL = V/ZRL
= 240/15,654
= 15,332 Aü
IC = IRL SinƟ
= 15,332 × 0,642ü
= 9,845 Aü
XC= V/IC
= 240/9,845
= 24,378 Ωü
C = 1/2πfXc
= 1/(2πx 50 × 24,378) ü
= 130,573 µFü
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MARKING GUIDELINE
-4INDUSTRIAL ELECTRONICS N3
T640(E)(N18)T
QUESTION 3
3.1
3.1.1
3.1.2
3.1.3
3.1.4
Cycle control
Cyclotronic control
Phase control
Static control
(4 × 1)
(4)
(ONE mark for diagram and THREE marks for correctness)
(4)
3.2
Load
^
^
SCR1
ü
D1
^
^
^
^
Control
circuit
SCR2
3.3
D2
3.3.1
(a) piezo-electric effect (b) subjected to a force
(2)
3.3.2
(a) 180° (b) high (c) high
(3)
3.3.3
(a) resistor (b) diode
(2)
3.3.4
(a) dual-beam (b) dual-trace
(2)
3.3.5
MOSFET
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MARKING GUIDELINE
-5INDUSTRIAL ELECTRONICS N3
T640(E)(N18)T
QUESTION 4
4.1
ü
^
Q1
^
T1
R1
VIN
R2
T1
^
- VCC +
^
Q2
VOUT
RL
^
^
^
^
^
^
ü
4.2
4.3
4.4
4.5
(7)
4.2.1
In class A amplifiers the bias point corresponds to the midpoint of
the active regionü of the characteristic curve and is selected so
that the current flows during the whole of the input cycle.ü
4.2.2
In class B amplifiers the bias point corresponds to the cut-off
regionü of the characteristic curve and the current flows only
during the positive half cycles of the signal voltage.ü
(2 × 2)
4.3.1
4.3.2
4.3.3
C
A
B
• Seven-segment
• Dot Mix
• Bar-graph displays
4.5.1
4.5.2
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(4)
(3 × 1)
(3)
(Any 2 × 1)
(2)
(2 × 1)
(2)
[18]
capacitor
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MARKING GUIDELINE
-6INDUSTRIAL ELECTRONICS N3
T640(E)(N18)T
QUESTION 5
5.1
5.2
•
•
•
•
Low output impedance
High input impedance
High voltage gain
Wide band width
(4 × 1)
(4)
(2 × 3)
(6)
Fermi level is a convenient way of showing the relative distribution of charge
carriers in different materials.
(2)
5.2.1
V1
V2
V3
5.2.2
R1
R2
R3
R1
Vin
5.3
5.4
5.4.1
Rf
VO
C1
VO
R1, R2, R3 and Rf = 1ü
Correct connections = 1ü
Correctness = 1ü
R1 and C1 =1ü
Correct connectionsü
Correctnessü
Covalent bond
üü
5.4.2
Ionic bond
üü
(2 × 2)
5.5
VF – static forward voltage.ü This is the maximum voltage level necessary to
produce the desired forward-current level.ü
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MARKING GUIDELINE
-7INDUSTRIAL ELECTRONICS N3
T640(E)(N18)T
QUESTION 6
6.1
6.1.1
Capacitive pressure transducer
(1)
6.1.2
The distance between the plates is varied by the externally applied
force or pressure which causes change in capacitance.
(2)
• Displacement
• Pressure
• Force
(Any 1 × 1)
(1)
Drawing = 2 marks
Labels = 2 marks
(4)
A voltage is generated in a semiconductor junction deviceü when
the incident light activates the cell.ü
(2)
Deflection plates position the CRT spot anywhere on the screenü
by simultaneous application of appropriate vertical and horizontal
voltage inputs.ü
(2)
6.1.3
6.2
6.2.1
RING-SHAPED
ELECTRODES
LIGHT
GLASS COVER
+
GOLD
SELENIUM DEPOSIT
ON METAL BASE
6.2.2
6.3
6.3.1
6.3.2
V
-
The delay line delays the arrivalü of the input waveform at the
vertical deflection plates until the trigger and time-base circuits
have had a chance to start the sweep of the beam.ü
TOTAL:
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(2)
[14]
100
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