Chi X is u timesfasterthan4 Performance Iggy Executiontime Performance h romance of cycles Exectiontime instructioncount or Instructioncount clockrate cycletime period CPI EtcCPI frequency usinginstructioncount cyclesperinstruction instructioncountis SPECratio reference time execution time powerscapacitiveloudXvoltagex frequency factor improvement 109 z CPI ofclockcycles instructioncount Timpound Taffected GHz CPI cycletime period ofclockcycles Instructionscount ofclockcycles IEraftergeny Tunaffected Geometricmean avg specratio is MIPS Clockrate frequency CPI x 106 A Amdahl'sLaw SRAM static Fast large expensive Cache DRAM Dynamic slow small cheap memory Volatilememory loses data whenpower is off RAM CreweRegisters NonVolatilememory docentlose datawhenpower is off harddisk readonlymemory Ch Z FPGA Faster simplerdesignmorepredictable AS I C incomputers lowercostcostumecapabilitysmallerform Hardwareplatforms L Mt Frequencythroughput latency efficiency power outputbit sea 2s complement operations Is everyy ofcyclesbeforerightoutput always discard the carry out bit if overflow add zeros tothepositivenumbersand add ones to the negativenumbers RISC V Byte 8 bits word j al s 32 bits double word 64bi jump and link jolts jumpand link register non lead callsotherprocedures Instruction formats immediate contain constant R type or address offset registers operations with two sourceregisters add sub type arithmeticoperations with one constant or loadinstructions S type s storingoperations no destinationregister beit's amemoryaddress I Memory shifts data memory ex arrays instructionmemory logical Shi soli Fill therest of bits with Os stat fill therest of bits with sighbit Z arithmetic