SM-A107F SVC SCHEMATIC (مخطط صيانة) HALABTECH

5 Revision History D REV 4 3 2 1 DESCRIPTION DATE D A1 20181203 Refer to MTK DVT1.1 Reference design A1 20181205 Change from K4 Sch 1. Change PA from 87318 to 87319 2.Change Charger IC from SM5414 to ETA6793 3.Change P-L sensor from STK3331 to Spring board STK3332 4. Delete LCM I2C switch 5. Delete USB switch 6.Delete KEY Pressed force download circuit 7.Change CAM I2C connection 8.Change BAT CONN C C B B A A Title 00_History REV: V10 DOCUMENT NO.: S96116-1-13_MB_20190409-1317 Size DEPARTMENT: WINGTECH-SH Date: Monday, April 08, 2019 DESIGNER: Sheet A2 LIUFENGLEI 1 of 53 5 4 3 2 1 U101E [8] DVDD_MODEM MT6762-SBS MODEM [8] DVDD_MODEM_6357_FB [8] DVDD_MODEM_6357_GND SH101 C101 D R9 T10 U9 U13 V10 V13 W9 W10 W8 Y8 SH102 22uF;20%;6.3V;0603 C108 22uF;20%;6.3V;0603 C113 1.0UF;20%;6.3V;0201 C115 1.0UF;20%;6.3V;0201 C116 1.0UF;20%;6.3V;0201 C102 1.0UF;20%;6.3V;0201 DVDD_CORE [2,3,8] GPU DVDD_VDD_MODEM1 DVDD_VDD_MODEM2 DVDD_VDD_MODEM3 DVDD_VDD_MODEM4 DVDD_VDD_MODEM5 DVDD_VDD_MODEM6 DVDD_VDD_MODEM7 DVDD_VDD_MODEM8 DVDD_VDD_MODEM9 DVDD_VDD_MODEM10 DVDD_MFGSYS1 DVDD_MFGSYS2 DVDD_MFGSYS3 DVDD_MFGSYS4 DVDD_MFGSYS5 DVDD_MFGSYS6 DVDD_MFGSYS7 DVDD_MFGSYS8 DVDD_MFGSYS9 K20 L19 L20 M20 N19 N20 P20 T20 T21 C105 22uF;20%;6.3V;0603 C107 1.0UF;20%;6.3V;0201 C109 1.0UF;20%;6.3V;0201 C111 1.0UF;20%;6.3V;0201 C112 1.0UF;20%;6.3V;0201 D GND DVDD_DVFS [8] CPU GND [2,9] DVDD_DVFS1 DVDD_DVFS2 DVDD_DVFS3 DVDD_DVFS4 DVDD_DVFS5 DVDD_DVFS6 DVDD_DVFS7 DVDD_DVFS8 DVDD_DVFS9 DVDD_DVFS10 DVDD_DVFS11 DVDD_DVFS12 DVDD_DVFS13 DVDD_DVFS14 DVDD_DVFS15 DVDD_DVFS16 VSRAM_OTHERS_PMU SRAM C120 0.47UF;20%;6.3V;0201 R19 U16 U18 U20 U22 Y16 Y18 Y20 Y21 Y22 AA16 AA18 AA20 AA21 AA22 AB16 AB18 DVDD_DVFS_6357_FB [8] DVDD_DVFS_6357_GND [8] SH103 SH104 C117 22uF;20%;6.3V;0603 C118 22uF;20%;6.3V;0603 C121 1.0UF;20%;6.3V;0201 C123 1.0UF;20%;6.3V;0201 C124 1.0UF;20%;6.3V;0201 C125 1.0UF;20%;6.3V;0201 DVDD_MFG_SRAM C C [2,9] GND C127 C129 L13 V12 0.47UF;20%;6.3V;0201 DVDD_TOP_SRAM1 DVDD_TOP_SRAM2 0.47UF;20%;6.3V;0201 GND [9] C134 VSRAM_OTHERS_PMU C130 2.2uF;20%;6.3V;0402 C131 2.2uF;20%;6.3V;0402 DVDD_SRAM_DVFS V15 1.0UF;20%;6.3V;0201 GND DVDD_MCUSYS_SRAM GND CORE DVDD_CORE SH105 [2,3,8] DVDD_CORE_6357_FB [8] DVDD_CORE_6357_GND [8] SH106 B [9,16] VDRAM_PMU VDDQ C141 0.1uF;20%;6.3V;0201 C143 0.1uF;20%;6.3V;0201 C145 0.1uF;20%;6.3V;0201 C147 0.1uF;20%;6.3V;0201 C150 2.2uF;20%;6.3V;0402 C153 4.7uF;20%;6.3V;0402 C155 10uF;20%;6.3V;0402 H11 H12 H18 H19 DVDD_TOP1 DVDD_TOP2 DVDD_TOP3 DVDD_TOP4 DVDD_TOP5 DVDD_TOP6 DVDD_TOP7 DVDD_TOP8 DVDD_TOP9 DVDD_TOP10 DVDD_TOP11 DVDD_TOP12 DVDD_TOP13 DVDD_TOP14 DVDD_TOP15 DVDD_TOP16 DVDD_TOP17 DVDD_TOP18 DVDD_TOP19 J21 K10 K13 K14 K17 L17 M10 M14 M18 N13 N17 P10 P13 P14 P18 P23 R13 R17 T18 C166 22uF;20%;6.3V;0603 C136 22uF;20%;6.3V;0603 C138 1.0UF;20%;6.3V;0201 C139 1.0UF;20%;6.3V;0201 C140 1.0UF;20%;6.3V;0201 C142 1.0UF;20%;6.3V;0201 C144 1.0UF;20%;6.3V;0201 C146 1.0UF;20%;6.3V;0201 C148 1.0UF;20%;6.3V;0201 C149 1.0UF;20%;6.3V;0201 C151 1.0UF;20%;6.3V;0201 C152 1.0UF;20%;6.3V;0201 Changed from 22uf 0603 B AVDDQ_EMI0_1 AVDDQ_EMI0_2 AVDDQ_EMI1_1 AVDDQ_EMI1_2 Changed from 10uf 0603 H10 H13 H17 H20 AVDD2_EMI1 AVDD2_EMI2 AVDD2_EMI3 AVDD2_EMI4 GND GND MT6762V/W B A A Title 01_BB_ POWER_PDN REV: V10 DOCUMENT NO.: Design Name Size DEPARTMENT: WINGTECH-SH Date: 5 4 3 2 Monday, April 08, 2019 1 DESIGNER: Sheet A2 LIUFENGLEI 2 of 53 5 4 VA12_PMU U101F 2 1 C201 MT6762-SBS GND 3 [3,15] 0.1uF;20%;6.3V;0201 AVDD & MD_A GND AVDD12_MD A11 A13 A15 B3 B21 C2 C6 C12 C16 C20 C23 D3 D9 D13 D23 D27 E4 E24 E25 F2 F4 F5 F6 F7 F8 F10 F11 F12 F14 F17 F19 F20 F21 F22 F23 G4 G6 G11 G12 G13 G14 G15 G21 G22 G26 H14 H15 H22 H25 J22 J23 J24 K9 K11 K12 K15 K16 K18 L8 L11 L15 L16 L21 L22 L26 M6 M7 M12 M16 M22 M24 M28 N6 N7 N11 N15 N21 N22 P7 P12 P16 P21 P22 R11 R15 R21 R22 T8 T12 T22 U11 V8 V16 V17 V19 V21 W17 W19 W21 AA9 AA11 AA13 AB10 AB12 AD7 AD11 AD14 AE8 AE11 AE14 AF8 AF11 AF14 AF17 AF28 AG26 D C B DVSS1 DVSS2 DVSS3 DVSS4 DVSS5 DVSS6 DVSS7 DVSS8 DVSS9 DVSS10 DVSS11 DVSS12 DVSS13 DVSS14 DVSS15 DVSS16 DVSS17 DVSS18 DVSS19 DVSS20 DVSS21 DVSS22 DVSS23 DVSS24 DVSS25 DVSS26 DVSS27 DVSS28 DVSS29 DVSS30 DVSS31 DVSS32 DVSS33 DVSS34 DVSS35 DVSS36 DVSS37 DVSS38 DVSS39 DVSS40 DVSS41 DVSS42 DVSS43 DVSS44 DVSS45 DVSS46 DVSS47 DVSS48 DVSS49 DVSS50 DVSS51 DVSS52 DVSS53 DVSS54 DVSS55 DVSS56 DVSS57 DVSS58 DVSS59 DVSS60 DVSS61 DVSS62 DVSS63 DVSS64 DVSS65 DVSS66 DVSS67 DVSS68 DVSS69 DVSS70 DVSS71 DVSS72 DVSS73 DVSS74 DVSS75 DVSS76 DVSS77 DVSS78 DVSS79 DVSS80 DVSS81 DVSS82 DVSS83 DVSS84 DVSS85 DVSS86 DVSS87 DVSS88 DVSS89 DVSS90 DVSS91 DVSS92 DVSS93 DVSS94 DVSS95 DVSS96 DVSS97 DVSS98 DVSS99 DVSS100 DVSS101 DVSS102 DVSS103 DVSS104 DVSS105 DVSS106 DVSS107 DVSS108 DVSS109 DVSS110 DVSS111 DVSS112 DVSS113 DVSS114 DVSS115 DVSS116 AVDD18_MD AVDD18_AP AVDD18_CPU AG21 AG19 AG18 AC18 C202 C203 C204 1.0UF;20%;6.3V;0201 1.0UF;20%;6.3V;0201 1.0UF;20%;6.3V;0201 AVDD18_SOC [3,9] AVDD18_SOC [3,9] AVDD18_SOC [3,9] PLL GND AVDD18_DDR GND GND H21 EMI_VDD1 C205 [9,16] C206 D 0.1uF;20%;6.3V;0201 AVDD12_PLLGP AVDD18_PLLGP T14 VA12_PMU AVDD18_SOC C207 C208 0.1uF;20%;6.3V;0201 0.1uF;20%;6.3V;0201 GND DVDD18_IOBL DVDD18_IORB1 DVDD18_IORB2 DVDD18_IORT DVDD_VQPS DVDD18_MSDC0 DVDD28_MSDC1 DVDD28_SIM1 DVDD28_SIM2 DVDD18_MSDC1 DVDD18_SIM GND R201 U1 AG6 J1 AD18 C209 C0201_NC GND C210 C211 C0201_NC GND C212 C0201_NC GND VIO18_PMU [4,5,7,9,11,16,17,21,24,25,26,28,32,35,41] C213 0.1uF;20%;6.3V;0201 0.1uF;20%;6.3V;0201 GND GND VEFUSE_PMU [9] A27 AD28 VMC_PMU AE28 VSIM1_PMU [9,26] AC28 VSIM2_PMU [9,26] AA28 C214 0.1uF;20%;6.3V;0201 AB28 C215 1.0UF;20%;6.3V;0201 GND Note: 11-1 C216 0.1uF;20%;6.3V;0201 C217 0.1uF;20%;6.3V;0201 GND GND C C218 0.1uF;20%;6.3V;0201 C219 0.1uF;20%;6.3V;0201 GND GND U2 R28 C220 C221 1.0UF;20%;6.3V;0201 1.0UF;20%;6.3V;0201 GND [9] Note: 11-2 Note: 11-3 AVDD04_DSI 0;1A;0402 AG27 PERI_A AVDD12_DSI [3,9] G28 W28 GND AVDD12_CSI GND T16 PERI_D DVDD18_IOLT DVDD18_IOLM GND [3,15] 1.0UF;20%;6.3V;0201 VA12_PMU [3,15] VA12_PMU [3,15] GND T28 DVDD_CORE [2,8] C222 1.0UF;20%;6.3V;0201 GND AVDD18_USB AVDD12_USB AVDD33_USB D28 AVDD18_SOC E28 VA12_PMU B28 VUSB_PMU [3,9] Schematic design notice of "11_BB_POWER_IO" page. C223 GND Note 11-1: C214 closed DVDD18_MSDC0 150mil [9] B C225 C224 1.0UF;20%;6.3V;0201 [3,15] 0.1uF;20%;6.3V;0201 Note 11-2: C215 closed DVDD28_MSDC1 150mil 1.0UF;20%;6.3V;0201 GND GND Note 11-3: C218 closed DVDD18_MSDC1 150mil GND AVDD18_WBG AVDD12_WBG H2 AVDD18_SOC C3 VA12_PMU C227 [3,15] [3,9] C226 0.1uF;20%;6.3V;0201 0.1uF;20%;6.3V;0201 GND GND MT6762V/WB A A Title 02_BB_POWER_IO DOCUMENT NO.: Design Name DEPARTMENT: WINGTECH-SH Date: 5 4 3 2 Monday, April 08, 2019 1 REV: V10 Size DESIGNER: Sheet D LIUFENGLEI 3 of 53 5 4 3 2 1 U101A MT6762-SBS PMU_IF SRCLKENA1 [10] RTC32K_CK M25 D H26 K27 L27 M27 K28 [10] PWRAP_SPI0_CSN [10] PWRAP_SPI0_CK [10] PWRAP_SPI0_MO [10] PWRAP_SPI0_MI [11] [11] [11] [11] AUD_DAT_MISO0 AUD_DAT_MISO1 [11] [11] AUD_DAT_MOSI0 AUD_DAT_MOSI1 [11] [11] J25 G27 AUD_CLK_MOSI AUD_CLK_MISO J27 J28 K26 K25 H27 J26 AUD_SYNC_MISO AUD_SYNC_MOSI U101B WATCHDOG MT6762-SBS SRCLKENA0 SIM SRCLKENA1 [26] [26] [26] RTC32K_CK [26] [26] [26] PWRAP_SPI0_CSN PWRAP_SPI0_CK PWRAP_SPI0_MO PWRAP_SPI0_MI SIM1_SCLK SIM1_SIO SIM1_SRST SIM2_SCLK SIM2_SIO SIM2_SRST AA25 Y25 AA26 AC25 AB25 AC26 [32] RFIC0_BSI_EN [32] RFIC0_BSI_CK [32] RFIC0_BSI_D0 [32] RFIC0_BSI_D1 AUD_DAT_MISO0 AUD_DAT_MISO1 AE21 AF22 AE20 AF21 AG22 W13 W12 TX_BB_IP0 TX_BB_IN0 TX_BB_QP0 TX_BB_QN0 SIM2_SCLK SIM2_SIO SIM2_SRST PRX_BB_I0P PRX_BB_I0N PRX_BB_I1 PRX_BB_Q0P PRX_BB_Q0N PRX_BB_Q1 RFIC0_BSI_EN RFIC0_BSI_CK RFIC0_BSI_D0 RFIC0_BSI_D1 RFIC0_BSI_D2 RF MIPI AUD_SYNC_MISO AUD_SYNC_MOSI [41] [41] MIPI0_SCLK MIPI0_SDATA [36] [36] MIPI1_SCLK MIPI1_SDATA AG7 AF7 AF5 AF6 TESTMODE AE5 AD5 DRX_BB_I0P DRX_BB_I0N DRX_BB_I1 DRX_BB_Q0P DRX_BB_Q0N DRX_BB_Q1 MISC_BSI_CK_0 MISC_BSI_DO_0 A1 A28 AG1 AG28 D [10] LTE_TX_BB0_IP [32] LTE_TX_BB0_IN [32] LTE_TX_BB0_QP [32] LTE_TX_BB0_QN [32] AF13 AG13 AF15 AF12 AG12 AG15 6177_i0 AD13 AE13 AG16 AD12 AE12 AF16 6177_i0 6177_i1 6177_q0 6177m_iP 6177m_iN LTE_PRX_BB0_IP LTE_PRX_BB0_IN 6177m_qP 6177m_qN LTE_PRX_BB0_QP LTE_PRX_BB0_QN 6177m_iP 6177m_iN LTE_DRX_BB0_IP LTE_DRX_BB0_IN 6177m_qP 6177m_qN LTE_DRX_BB0_QP LTE_DRX_BB0_QN 6177_q1 [32] [32] [32] [32] 6177_i1 6177_q0 6177_q1 [32] [32] [32] [32] MISC_BSI_CK_2 MISC_BSI_DO_2 DET_IP0 DET_IN0 DET_QP0 DET_QN0 MISC_BSI_CK_3 MISC_BSI_DO_3 AG9 AF9 AF10 AG10 Note: 12-5 LTE_DET_BB0_IP [32] LTE_DET_BB0_IN [32] LTE_DET_BB0_QP [32] LTE_DET_BB0_QN [32] TP_PLLGP TN_PLLGP BPI AE2 AD3 AB6 PMIC_CLK_BB AE9 AD9 AE10 AD10 MISC_BSI_CK_1 MISC_BSI_DO_1 RFIC_ET0_P RFIC_ET0_N C AC5 AB13 AUD_DAT_MOSI0 AUD_DAT_MOSI1 AE6 AD6 GND MAIN_X26M_IN RFIC_Ctrl AUD_CLK_MOSI AUD_CLK_MISO Test Pin F27 ABB_IF SIM1_SCLK SIM1_SIO SIM1_SRST CDM3P5A [44] [38] CDM5P5A NC1 NC2 NC3 NC4 BPI_BUS14 BPI_BUS13 [41] [44] BPI_BUS12 BPI_BUS11 [35] [29] [38] [43] [43] [46] [44] [43] [38] [29] [29] BPI_BUS10 BPI_BUS9 BPI_BUS8 BPI_BUS7 BPI_BUS6 BPI_BUS5 BPI_BUS4 BPI_BUS3 BPI_BUS2 BPI_BUS1 BPI_BUS0 AF24 AE3 AE25 AE24 AD4 AF25 AF26 AD25 AC6 AG4 AG3 AG2 AF4 AF3 AF2 AE4 APC BPI_PA_VM1 BPI_PA_VM0 AD8 AC9 AC10 APC1 C [36] AUX IN BPI_BUS15_ANT2 BPI_BUS14_ANT1 BPI_BUS13_ANT0 AUXIN4 BPI_BUS12_OLAT1 BPI_BUS11_OLAT0 AUXIN3 AUXIN2 BPI_BUS10 BPI_BUS9 BPI_BUS8 BPI_BUS7 BPI_BUS6 BPI_BUS5 BPI_BUS4 BPI_BUS3 BPI_BUS2 BPI_BUS1 BPI_BUS0 AUXIN1 AUXIN0 AE17 BOARD_ID3 AE18 BAT_ID AE19 AUXIN2 AF19 AF20 C308 REF POWER REFP AF18 C307 REFP C303 0.1uF;20%;6.3V;0201 C318 C301 [5] [17] [5] AUX_IN1_NTC [41] AUX_IN0_NTC [7] C302 1.0UF;20%;6.3V;0201 SRCLKENA0 SYSRSTB 1.0UF;20%;6.3V;0201 [10] [10,32] L25 1.0UF;20%;6.3V;0201 K24 1.0UF;20%;6.3V;0201 E27 SYSRSTB WATCHDOG 1.0UF;20%;6.3V;0201 [10] [10] Note: 12-2 GND MT6762V/W B GND GND GND GND GND Note: 12-1 B B [3,5,7,9,11,16,17,21,24,25,26,28,32,35,41] VIO18_PMU R301 MT6762V/W B Schematic design notice of "12_BB_1" page. DEL R303=12K LO=LPDDR3 AUD_DAT_MOSI0 Note 12-1: The de-coupling cap. for REFP (AF18 ball) have to be placed as close to BB as possible. "PWRAP_SPI0_CSN" and "AUD_DAT_MOSI0" are bootstrap pin to select which interface will be the JTAG pin out. PWRAP_SPI0_CSN AUD_DAT_MOSI0 JTAG Function default=PU default=PD AP_JTAG MD_JTAG N/A N/A HI LO SPI0+EINT8 SPI1+SPI3 HI HI (by ext. PU) SPI0+EINT8 N/A LO (by ext. PD) LO MSDC1 N/A LO (by ext. PD) HI (by ext. PU) Note 12-4: PWRAP_SPI0_MI is DDR type feature in bootstrap A PWRAP_SPI0_MI default=PU LO (by ext. PD) HI PWRAP_SPI0_CSN PWRAP_SPI0_MI R305 R0201_NC Note 12-2: To shunt a 1uF capacitor in the AUXIN ADC input to prevent noise coupling. It should be placed as close to BB as possible. Connect the unused AUX ADC input to GND. Note 12-3: R0201_NC R306 12K;5%;0201 GND Note: 12-3 Note: 12-4 Note 12-5: Please set unused IQ pins in NC Booting interface DDR MSDC0 pin mux LPDDR3 follow LP3 Ref SCH. LPDDR4X follow LP4X Ref SCH. A Title 03_BB_1_RF&SIM_IF REV: V10 DOCUMENT NO.: Design Name Size DEPARTMENT: WINGTECH-SH Date: 5 4 3 2 Monday, April 08, 2019 1 DESIGNER: Sheet A2 LIUFENGLEI 4 of 53 5 4 3 2 1 U101D MT6762-SBS Note 13-2: MIPI CSI unused pin can be floating, but need correct SW setting USB U101C MT6762-SBS CSI-0 [17] [17] C27 B27 USB_DP USB_DM [22] [22] RDP2 RDN2 [22] [22] RDP0 RDN0 [22] [22] RCP RCN [22] [22] RDP1 RDN1 [22] [22] RDP3 RDN3 N1 N2 P1 P2 P3 P4 R3 R4 N5 P5 CSI0A_L0P CSI0A_L0N DSI0_CKP DSI0_CKN CSI0A_L1P CSI0A_L1N DSI0_D0P DSI0_D0N CSI0A_L2P CSI0A_L2N DSI0_D1P DSI0_D1N CSI0B_L0P CSI0B_L0N DSI0_D2P DSI0_D2N CSI0B_L1P CSI0B_L1N DSI0_D3P DSI0_D3N CSI0B_L2P CSI0B_L2N LCM_RST DSI_TE GND CSI-1 L3 L4 [22] [22] RDP0_D RDN0_D [22] [22] RCP_D RCN_D GND L1 L2 M1 M2 CSI1A_L0P CSI1A_L0N DISP_PWM P25 P26 N25 N26 N28 N27 R25 R26 P27 R27 AD26 AE27 AD27 DSI0_CKP DSI0_CKN [21] [21] DSI0_D0P DSI0_D0N [21] [21] DSI0_D1P DSI0_D1N [21] [21] DSI0_D2P DSI0_D2N [21] [21] DSI0_D3P DSI0_D3N [21] [21] LCM_RST DSI_TE [17] AB27 AB26 IDDIG D26 E26 CHD_DP CHD_DM JTAG SPI0_CSB SPI0_MO CSI1A_L2P CSI1A_L2N SPI0_CLK [53] AA1 AB1 GPIO_GPS_LNA_EN [28] [27] [21] DISP_PWM AB3 AB2 KPCOL0 KPCOL1 KPROW0 KPROW1 XIN_WBG ANT_SEL0 ANT_SEL1 ANT_SEL2 GPS_I GPS_Q WF_IP WF_IN WF_QP WF_QN I2C [21] SCL0 SDA0 Touch SCL1 SDA1 Sensors BT_IP BT_IN BT_QP BT_QN M3 M4 [22] [22] R1 R2 RDP2_B RDN2_B CSI1B_L1P CSI1B_L1N SPI1_MI SPI1_CSB FP SPI1_MO SPI1_CLK CSI-2 GND C CSI1B_L0P CSI1B_L0N CSI2A_L0P CSI2A_L0N SPI2_MI SPI2_CSB [22] [22] RDP0_B RDN0_B [22] [22] RCP_B RCN_B [22] [22] RDP1_B RDN1_B [22] [22] RDP3_B RDN3_B T1 T2 CSI2A_L1P CSI2A_L1N SPI2_MO SPI2_CLK T3 T4 U3 U4 [25] [25] [28] AE1 AF1 SCL1 SDA1 GPIO_EXT0 GPIO_EXT1 R5 T5 SPI3_MI Touch V2 CAM_RST0 W6 [22] V1 CAM_RST1 Y2 [22] CAM_RST2 [22] CAM_PDN2 K3 K2 AF23 L24 SPI3_CSB SPI3_MO CSI2B_L1P CSI2B_L1N SPI3_CLK CSI Ctrl [22] CAM_RST0 SPI4_MI A-SENSOR SPI4_CSB SPI4_MO CAM_PDN0 [22] CAM_CLK0 L401 120nH;5%;0201 [22] CAM_CLK1 L402 120nH;5%;0201 W2 [22] CAM_CLK2 L403 J2 120nH;5%;0201 AG24 B C404 C405 C406 C0201_NC C0201_NC C0201_NC C407 C408 C0201_NC C0201_NC U23 [24] SPI1_CSB Y24 [22] [22] SCL2 SDA2 [21,35] [21,35] SCL3 SDA3 [24] SPI1_MO V24 SPI4_CLK SCL2 SDA2 GPIO_EXT4 GPIO_EXT5 GPIO_EXT6 U24 AC21 AC22 GPIO_EXT7 SCL3 SDA3 LCD_BIAS& SAR1 T26 GPIO_EXT8 GPIO_EXT9 T25 GPIO_EXT10 [22] [22] T24 U25 U6 V6 SCL4 SDA4 SCL4 SDA4 DepthCam GPIO_EXT11 SPI3_LCM_MISO U26 [21] SPI3_LCM_CSB V26 [21] SPI3_LCM_MOSI V25 SPI4_MI V28 SPI4_MO V27 SPI4_CLK AB23 AC23 SCL5 SDA5 SCL5 SDA5 Sub PMIC [21] GPIO_EXT14 GPIO_EXT15 SRCLKENAI [18] [18] [25] SPI4_CSB T27 [13] [13] [21] SPI3_LCM_CLK U27 GPIO_EXT13 J3 J4 SCL6 SDA6 PWM0 SCL6 SDA6 Audio PA [25] INT_SIM1 INT_SIM2 [25] UART [25] [28] URXD0 [28] UTXD0 AA3 AA2 EINT0 EINT1 URXD0 EINT2 UTXD0 GPO EINT4 PERIPHERAL_EN0 CAM_RST3 PERIPHERAL_EN1 CAM_PDN3 PERIPHERAL_EN3 CAM_CLK0 PERIPHERAL_EN4 CAM_CLK1 PERIPHERAL_EN5 AD22 AD24 AD23 AC24 AE23 AE22 GPIO_LCM_BIAS_EN GPIO_LCM_BIAS_EN2 TORCH_EN FLASH_EN [21] SD (MSDC1) [21] AUDIO_PA_RST GPIO_CHG_EN_0 EINT5 EINT6 [23] W26 [26] MSDC1_CLK [26] MSDC1_CMD [26] [26] [26] [26] MSDC1_DAT3 MSDC1_DAT2 MSDC1_DAT1 MSDC1_DAT0 [23] W27 MSDC1_CLK MSDC1_CMD [18] [13] CAM_CLK2 CAM_CLK3 W25 AA27 Y26 Y27 EINT7 EINT8 EINT9 MSDC1_DAT3 MSDC1_DAT2 MSDC1_DAT1 MSDC1_DAT0 Note: 13-1 C0201_NC GPIO_EXT3 EINT3 CAM_PDN2 C409 Rear Cam&Front [24] CAM_PDN1 CAM_RST2 V4 V3 [24] SPI1_CLK CAM_RST1 PERIPHERAL_EN2 W5 SPI1_MI GPIO_EXT12 CSI2A_L2P CSI2A_L2N CSI2B_L0P CSI2B_L0N W24 H5 H4 H3 G2 G3 G7 CONN_TOP_CLK [51] CONN_TOP_DATA [51] BT_CLK [51] BT_DATA [51] WF_CTRL0 WF_CTRL1 WF_CTRL2 D [51] [51] [51] CONN_WB_PTA CONN_HRST_B [51] [51] CONN_XO_IN_BB [51] K5 K6 K4 F1 G1 A3 A2 B1 B2 D2 D1 E3 F3 GPS_I [51] GPS_Q [51] WF_IP [51] WF_IN [51] WF_QP [51] WF_QN [51] BT_IP [51] BT_IN [51] BT_QP [51] BT_QN [51] GPIO [28] SPI0_CLK GPIO_EXT2 L5 M5 J5 K8 CONN_IQ KPCOL0 KPCOL1 [28] SPI0_MO AD2 CONN_WB_PTA CONN_HRST_B CHD_DP CHD_DM J6 K7 [28] SPI0_CSB AC2 CONN_WF_CTRL0 CONN_WF_CTRL1 CONN_WF_CTRL2 [21] SPI0_MI AC1 IDDIG DRVBUS KEYPAD AB5 AC4 AD1 CONN_BT_CLK CONN_BT_DATA BC [10] [10] GPIO SPI0_MI CSI1A_L1P CSI1A_L1N CONN_TOP_CLK CONN_TOP_DATA DSI-0 D N3 N4 CONN_Dig. USB_DP USB_DM EINT10 EINT11 EINT12 G23 BOARD_ID0 F25 [5] BOARD_ID1 F24 BOARD_ID2 [5] [5] G24 F26 G25 H23 H24 LCD_ID1 [21] LCD_ID0 [21] FP_LDO_EN [24] C AA24 GPIO_FP_RST_N Y23 LCD_ID2 [24] [21] AA23 AD21 GPIO_CTP_RSTB AD20 [21] FRONT_CAM_DVDD_EN [22] AD19 AC20 PWDN_VCM AC19 PWSEQ_ID [22] [22] Y1 AC3 AE26 AF27 AB4 AA7 AA5 EINT_SIM_SD [5,26] EINT_SIM_SD [5,26] EINT_CTP [21] EINT_SIM_SD [5,26] EINT_RAMDUMP [28] AA4 CONF_0 [28] Y6 CONF_1 [28] Y7 Y4 Y3 AA6 W4 W3 W7 M26 EINT_FP_N EINT_ALS [24] [25] MOUDLE_ID1 EINT8 [22] [28] SAR_EINT_N EINT_PS [35] [25] EINT_CHG_0 EINT_ACC [13] B [25] MT6762V/WB MT6762V/WB GND VIO18_PMU GND R411 R413 R415 [3,4,7,9,11,16,17,21,24,25,26,28,32,35,41] R417 R450 100K;1%;0201 BOARD_ID R0201_NC R0201_NC R0201_NCR0201_NC R412 R414 R416 R418 R451 [5] BOARD_ID0 [5] BOARD_ID1 [5] BOARD_ID2 [4] BOARD_ID3 [4] AUXIN2 BOARD_ID3为AUXIN4，AUXIN2电源域为0~1.45V 分压电阻选择请注意要在0~1.45V范围内 10K;1%;0201 10K;1%;0201 10K;1%;0201 10K;1%;0201 Schematic design notice of "13_BB_2" page. Note 13-1: The enable pin of acoustic or optoelectronic devices (e.g. SPK AMP/Backlight/Charger OCP/OVP) suggest to use Peripheral_EN[0:5] If use other GPIOs as enable pin, suggest to reserve 0201 NC to GND R0201_NC A A Title 04_BB_2_MIPI&GPIO DOCUMENT NO.: Design Name DEPARTMENT: WINGTECH-SH Date: 5 4 3 2 Monday, April 08, 2019 1 REV: V10 Size DESIGNER: Sheet D LIUFENGLEI 5 of 53 5 4 3 2 1 U101G MT6762-SBS D D EMI_DDR C [16] EMI0_DQ0 [16] EMI0_DQ1 [16] EMI0_DQ2 [16] EMI0_DQ3 [16] EMI0_DQ4 [16] EMI0_DQ5 [16] EMI0_DQ6 [16] EMI0_DQ7 [16] EMI0_DQ8 [16] EMI0_DQ9 [16] EMI0_DQ10 [16] EMI0_DQ11 [16] EMI0_DQ12 [16] EMI0_DQ13 [16] EMI0_DQ14 [16] EMI0_DQ15 [16] EMI0_DQ16 [16] EMI0_DQ17 [16] EMI0_DQ18 [16] EMI0_DQ19 [16] EMI0_DQ20 [16] EMI0_DQ21 [16] EMI0_DQ22 [16] EMI0_DQ23 [16] EMI0_DQ24 [16] EMI0_DQ25 [16] EMI0_DQ26 [16] C13 C15 C14 E15 B15 D15 E16 B17 A17 E18 F18 C18 D19 E19 C19 A19 D10 C11 C10 D12 B13 B11 B12 E11 D20 E20 E21 D21 EMI0_DQ27 [16] EMI0_DQ28 [16] EMI0_DQ29 [16] EMI0_DQ30 [16] EMI0_DQ31 B20 C22 C21 A21 EMI0_DQ0 EMI0_CS0_n EMI0_DQ1 EMI0_CS1_n EMI0_DQ3 EMI0_CKE0 EMI0_DQ4 EVREF G16 E23 Note: 14-1 EMI0_CKE1 EMI0_DQ6 EMI0_DM0 EMI0_DQ7 EMI0_DM1 EMI0_DQ8 EMI0_DM2 EMI0_DQ9 B4 D8 EMI0_CS1 [16] E7 EMI0_CKE0 [16] EMI0_CKE1 EMI0_DM3 B16 [16] EMI0_DMI0 [16] C17 E10 B19 EMI0_DMI1 [16] EMI0_DMI2 [16] EMI0_DMI3 [16] EMI0_CK_T [16] EMI0_CK_C [16] EMI0_DQ10 EMI0_DQ11 EMI0_CK_T EMI0_DQ12 EMI0_CK_C F9 E9 EMI0_DQ13 EMI0_DQ14 EMI0_DQS0_C EMI0_DQ15 EMI0_DQS0_T E14 D14 EMI0_DQS0_C [16] EMI0_DQS0_T [16] EMI0_DQ16 EMI0_DQ17 EMI0_DQS1_C EMI0_DQ18 EMI0_DQS1_T D17 E17 EMI0_DQS1_C [16] EMI0_DQS1_T [16] C EMI0_DQ19 EMI0_DQS2_C EMI0_DQ20 EMI0_DQS2_T E13 F13 EMI0_DQS2_C [16] EMI0_DQS2_T [16] EMI0_DQ21 EMI0_DQ22 EMI0_DQS3_C EMI0_DQ23 EMI0_DQS3_T E22 D22 EMI0_DQS3_C [16] EMI0_DQS3_T [16] EMI0_DQ24 EMI0_DQ25 EMI0_DQ26 EMI0_CA0 EMI0_DQ27 EMI0_CA1 EMI0_DQ28 EMI0_CA2 EMI0_DQ29 EMI0_CA3 EMI0_DQ30 EMI0_CA4 EMI0_DQ31 EMI0_CA5 VREF_EMI EMI0_CA8 NC1 EMI0_CA9 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9 NC10 B EMI_EXTR [16] EMI0_DQ5 EMI0_CA7 [16] E8 EMI0_CS0 EMI0_DQ2 EMI0_CA6 F16 A9 EMI_EXTR R501 B8 B7 C7 D6 B5 D5 C5 E6 E5 A5 EMI0_CA0 [16] EMI0_CA1 [16] EMI0_CA2 [16] EMI0_CA3 [16] EMI0_CA4 [16] EMI0_CA5 [16] EMI0_CA6 [16] EMI0_CA7 [16] EMI0_CA8 [16] EMI0_CA9 [16] A7 B9 C4 C9 D4 D7 D11 D18 B TP502 34.8;1%;0201 1 Note: 14-2 eMMC (MSDC0) GND [16] [16] [16] [16] [16] [16] [16] [16] A26 B24 B23 A23 C24 A25 D24 C26 MSDC0_DAT7 MSDC0_DAT6 MSDC0_DAT5 MSDC0_DAT4 MSDC0_DAT3 MSDC0_DAT2 MSDC0_DAT1 MSDC0_DAT0 MSDC0_DAT7 MSDC0_DAT6 MSDC0_DAT5 MSDC0_DAT4 MSDC0_DAT3 MSDC0_DAT2 MSDC0_DAT1 MSDC0_DAT0 MSDC0_RSTB MSDC0_CMD MSDC0_CLK MSDC0_DSL 12x15MIL C25 MSDC0_RSTB B25 D25 B26 TP506 1 TP501 1 [16] MSDC0_CMD [16] MSDC0_CLK [16] MSDC0_DSL [16] Note: Place R502 close to U101.D25 MT6762V/W B Note: Place12x15MIL TP501 Close to U101 12x15MIL TP507 1 12x15MIL Schematic design notice of "14_BB_3" page. A Note 14-1: R501 please select 34.8 ohm (1%) resistor A Note 14-2: Please check eMCP LP3 and eMCP LP4X pin mux Title 05_BB_3_EMMC REV: V10 DOCUMENT NO.: Design Name Size DEPARTMENT: WINGTECH-SH Date: 5 4 3 2 Monday, April 08, 2019 1 DESIGNER: Sheet A2 LIUFENGLEI 6 of 53 5 4 3 2 1 The pull up ressister need to be 1% accuracy NTC=100K D D [3,4,5,9,11,16,17,21,24,25,26,28,32,35,41] VIO18_PMU R602 390K;1%;0201 AUX_IN0_NTC [4] AUX_IN0_NTC RT604 100K;1%;0402 GND Thermistor to sense CHARGER temperature Huawei NOTE:1. NTC606 must keep a distance about 3~5 mm away from Charger IC and far from Thermistor to sense AP temperature other heat sources 5~10 mm at least. 1. RT604must keep a distance about 6~8 mm away from AP and far from other heat sources 10 mm at least. 2. The distance is the shortest distance from package edge to edge. C C B B A A Title 06_BB_AUXADC_Thermal DOCUMENT NO.: Design Name DEPARTMENT: WINGTECH-SH Date: 5 4 3 2 Monday, April 08, 2019 1 REV: V10 Size DESIGNER: Sheet D LIUFENGLEI 7 of 53 5 4 3 2 1 Note: 20-2 U701A MT6357 23,24,25,28,41] R701 VBAT VSYS_SMPS 1;5%;0201 VBUCK CTRL B2 VSYS_SMPS C702 1 SG701 1.0UF;20%;6.3V;0201 GND_SMPS B1 GND_SMPS Set power inductor close to PMIC TVS701 D C737 VPROC IN A4 B4 C4 2 4.7uF;20%;6.3V;0402 NF_PTVSHC3D4V5U VPROC VSYS_VPROC1 VSYS_VPROC2 VSYS_VPROC3 VPROC1 VPROC2 VPROC3 VPROC4 VPROC5 VPROC6 C703 A6 A7 B6 B7 C6 C7 VPROC_FB GND SG702 GND_VPROC A5 B5 C5 GND_VPROC_FB SG703 A8 B8 C8 C0201_NC 10uF;20%;6.3V;0402 GND_VCORE C9 B9 DVDD_DVFS_6357_FB 4mil D2 [2] DVDD_DVFS_6357_GND 4mil GND [2] Set power inductor close to PMIC VCORE VSYS_VCORE1 VSYS_VCORE2 VSYS_VCORE3 VCORE1 VCORE2 VCORE3 VCORE4 GND_VCORE1 GND_VCORE2 VCORE_FB GND_VCORE_FB A9 A10 B10 C10 D DVDD_DVFS Differential and shielded with GND C2 GND_VPROC1 GND_VPROC2 GND_VPROC3 VCORE IN C704 [2] 0.47uH;20%;2016 C760 10uF;20%;6.3V;0402 FOR EOS L701 VPROC VCORE L702 [2,3] DVDD_CORE 0.47uH;20%;2016 C761 Differential and shielded with GND D3 DVDD_CORE_6357_FB 4mil E3 C0201_NC [2] DVDD_CORE_6357_GND 4mil [2] GND VMODEM IN A13 B13 C705 C VMODEM1 VMODEM2 4.7uF;20%;6.3V;0402 SG704 GND_MODEM A12 B12 C12 VMODEM_FB GND_VMODEM1 GND_VMODEM2 GND_VMODEM3 VPA IN A2 A3 C706 10uF;20%;6.3V;0402 GND_VPA SG705 B3 Set power inductor close to PMIC VMODEM VSYS_VMODEM1 VSYS_VMODEM2 GND_VMODEM_FB B11 C11 L703 VMODEM C762 DVDD_MODEM_6357_FB 4mil D14 DVDD_MODEM_6357_GND 4mil C [2] C0201_NC [2] Set power inductor close to PMIC VPA A1 DVDD_MODEM Differential and shielded with GND E13 VPA VSYS_VPA1 VSYS_VPA2 [2] 1.0uH;20%;2016 VPA L704 [8,41] GND VPA_PMU 1.0uH;20%;2016 Note: 20-1 Note:VPA_PMU cout >10V C721 VPA_FB E4 VPA_PMU C763 [8,41] GND_VPA 2.2uF;20%;6.3V;0402 C0201_NC GND VS1 IN B14 A14 C708 VS1 VSYS_VS1_1 VSYS_VS1_2 GND VS1_1 VS1_2 A16 B16 Set cap. C707 close to VPA power inductor Set power inductor close to PMIC VS1 L705 1.0uH;20%;2016 VS1_PMU [8,9,15,22] 4.7uF;20%;6.3V;0402 SG706 GND_VS1 A15 B15 C764 GND_VS1_1 GND_VS1_2 VS1_FB E14 VS1_PMU [8,9,15,22] C0201_NC VS1 Input/output CAP >=10V GND MT6357CRV/A B B Schematic design notice of "20_POWER_MT6357_Buck" Note 20-1: C707, please choose 0402 size Note 20-2: For MT6765/62/61 platform, please only use MT6357CRV A A Title 07_POWER_MT6357_Buck DOCUMENT NO.: Design Name DEPARTMENT: WINGTECH-SH Date: 5 4 3 2 Monday, April 08, 2019 1 REV: V10 Size DESIGNER: Sheet D LIUFENGLEI 8 of 53 5 4 1.46V EXT_VS2 VS2_PMU U701B 2 Set cap. close to PMIC MT6357 Note: 21-3 HT-COPPER LDO IN C17 VS1_PMU LDO VS1_LDO1 VFE28 VXO22 C801 10uF;20%;6.3V;0402 D C802 22uF;20%;6.3V;0603 C803 4.7uF;20%;6.3V;0402 VCN28 Note: 21-5 VCAMA GND GND GND F15 F17 VAUD28 VS2_LDO2 VFE28_PMU T4 H16 T5 L7 ALDO [51,53] VCAMA_PMU [22] VAUX18_PMU [10] VAUD28_PMU [11] D C805 C806 2.2uF;20%;6.3V;0201 1.0UF;20%;6.3V;0201 GND VSYS_LDO2 VLDO28 VSYS_LDO3 VIO28 VMC F13 G8 G7 G9 G12 H6 G10 G11 H7 H8 H9 H10 H11 F12 F11 F10 F9 H12 J6 D7 D8 D6 D9 F5 J7 D10 D11 D12 D13 F6 J8 K12 E6 E7 E8 F7 J9 E11 E9 E10 E12 F8 J11 VBAT C812 C811 10uF;20%;6.3V;0402 GND C813 2.2uF;20%;6.3V;0201 10uF;20%;6.3V;0402 GND GND Set cap. close to PMIC C D_GND1 D_GND2 D_GND3 D_GND4 D_GND5 D_GND6 D_GND7 D_GND8 D_GND9 D_GND10 D_GND11 D_GND12 D_GND13 D_GND14 D_GND15 D_GND16 D_GND17 D_GND18 D_GND19 D_GND20 D_GND21 D_GND22 D_GND23 D_GND24 D_GND25 D_GND26 D_GND27 D_GND28 D_GND29 D_GND30 D_GND31 D_GND32 D_GND33 D_GND34 D_GND35 D_GND36 D_GND37 D_GND38 D_GND39 D_GND40 D_GND41 D_GND42 D_GND43 VMCH VEMC VSIM1 VSIM2 VIBR VUSB VEFUSE GND_VREF 1 T13 K10 DVDD18_DIG SINGLE-GND-L2 J17 J14 H15 L10 [25] [3] VMCH_PMU [26] VEMC_PMU [16] VSIM1_PMU C815 C818 C819 [3,26] VSIM2_PMU [3,26] VIBR_PMU [29] VUSB_PMU [3] VEFUSE_PMU [3] C820 C824 C816 1.0UF;20%;6.3V;0201 VRF18 D16 GND GND GND GND GND GND GND GND VCN18 VCAMD VCAMIO VIO18 E15 E17 VRF18_PMU [32] VCN18_PMU [51] VCAMD_PMU A17 VCAMIO_PMU B17 VIO18_PMU C825 C826 R803 0;0.5A;0201 [22] C [22] [3,4,5,7,9,11,16,17,21,24,25,26,28,32,35,41] AVDD18_SOC [3] 4.7uF;20%;6.3V;0402 4.7uF;20%;6.3V;0402 SLDO1 SH888 GND VRF12 EMI_VDD1 [3,16] GND E16 Note: 21-4 VRF12_PMU G15 G16 [2] VSRAM_OTHERS_PMU [2] [2,16] H17 C831 VREF C832 C833 C834 4.7uF;20%;6.3V;0402 2.2uF;20%;6.3V;0402 2.2uF;20%;6.3V;0201 4.7uF;20%;6.3V;0402 SLDO2 GND_VREF TREF [32] DVDD_SRAM_DVFS VDRAM_PMU VDRAM DIG Power 2 L17 VREF SH805 VIO18_PMU VMC_PMU N16 M16 [22] VIO28_PMU L15 K16 [51] VLDO28_PMU K15 C817 VSRAM_OTHERS T14 C830 0.1uF;20%;6.3V;0201 VCN33_PMU L16 C814 GND VREF SG804 1.0UF;20%;6.3V;0201 GND DLDO VSRAM_PROC Set cap. and shortpad close to PMIC GND P17 1.0UF;20%;6.3V;0201 K7 VCN33 1.0UF;20%;6.3V;0201 N17 GND For EOS VSYS_LDO1 1.0UF;20%;6.3V;0201 G14 1.0UF;20%;6.3V;0201 C810 2.2uF;20%;6.3V;0201 ,26,28,32,35,41] VCN28_PMU C804 VS2_PMU 8,21,22,23,24,25,28,41] [41] VXO22_PMU K13 1.0UF;20%;6.3V;0201 [9,15] VAUX18 VS2_LDO1 L14 1.0UF;20%;6.3V;0201 [8,15,22] 1 [9,15] SH801 1 1.0UF;20%;6.3V;0201 [15] EXT_VS2_FB 2 1. "Typical Cap" defined in design notice is the minimum cap. to LDO Cout. 2. NC cap can move to application, if (PCB L<20nH, PCB R<0.2 ohm) => value and placement of Cap, please refer design notice Suggest trace width > 40 mil [15] 3 R9 GND GND GND Note: 21-1 C832 C833 need SMT 2.2UF GND DVDD18_IO DVDD18_DIG TREF_PMU [17] C835 C836 1.0UF;20%;6.3V;0201 1.0UF;20%;6.3V;0201 GND SG806 C837 0.1uF;20%;6.3V;0201 DVSS18_IO J10 DVSS18_IO Power Switch Note: 21-2 MT6357CRV/A B B Schematic design notice of "21_POWER_MT6357_LDO" Note 21-1: If these power trace can meet LDO layout constraint, these CAP can be NC or removed. Please refer to MT6357 design notice. Note 21-2: Output cap range please follow MT6357CRV LDO design notice Note 21-3: Ext Buck BOM option C801 Ext. buck option w/ EXT VS2 Buck w/o EXT VS2 Buck 10uF 22uF Note 21-4: Please set R803 and R803 close to C826, making star connection among VIO18_PMU, AVDD18_SOC, and EMI_VDD1 near to LDO cap. C826 Please also refer to MT6357 design notice for further detail design information Note 21-5: Please connect VS2_LDO1(F15) to VS1_PMU if voltage applied to VCAMD(E17) >= 1.3 V A A Title 08_POWER_MT6357_LDO DOCUMENT NO.: Design Name DEPARTMENT: WINGTECH-SH Date: 5 4 3 2 Monday, April 08, 2019 1 REV: V10 Size DESIGNER: Sheet D LIUFENGLEI 9 of 53 5 4 3 2 1 U701C Schottky diode (VF <0.3V @ 1mA) MUST be for PWRKEY ESD protection and to avoid inverse current from MT6371. MT6357 Control I/F Note: 22-3 [27] [27] PWRKEY_PMIC PWRKEY R4 N4 HOMEKEY TP902 [4] 1 [4] 12x15MIL D R5 SYSRSTB T8 WATCHDOG R902 GND [4] SRCLKENA0 [4,32] SRCLKENA1 UVLO_VTH 200K;1%;0201 N3 N7 N8 VRTC28 RTC Set cap. close to chip PWRKEY VRTC28 FCHR_ENB C901 RESETB SG910 1 WDTRSTB_IN RTC32K_1V8_0 SRCLKEN_IN0 RTC32K_1V8_1 SRCLKEN_IN1 TP901 [15] M5 N5 12x15MIL EXT_PMIC_EN2 M6 [4] R8 PWRAP_SPI0_CSN [4] PWRAP_SPI0_CK [4] PWRAP_SPI0_MO [4] PWRAP_SPI0_MI M8 M7 M9 P5 P9 Set cap. close to PMIC GND N13 BATON VBUS_USB_IN GND [10,13] C904 0.1uF;20%;6.3V;0201 C905 0.1uF;20%;6.3V;0201 VCDT R13 T11 CHRLDO R11 P13 GND EXT_PMIC_EN2 EXT_PMIC_PG DCXO Note: 22-2 SPI_CSN AVSS22_XO SPI_CLK AVSS22_XOBUF1 AVSS22_XOBUF2 SPI_MOSI R908 [17] PMU_TESTMODE SG905 P1 R1 AVSS22_XOBUF SG906 N2 P2 AVSS22_XO_ISO R3 XO_SOC T1 XO_CEL P3 XO_WCN AVSS22_XO AVSS22_XOBUF AVSS22_XO_ISO1 AVSS22_XO_ISO2 SG907 AVSS22_XO_ISO FSOURCE VSYSSNS Note: 22-5 XO_CEL BATSNS ISENSE XO_WCN BATON XO_NFC R903 0;0.5A;0201 R904 0;0.5A;0201 R905 0;0.5A;0201 [10,13] CHRLDO R909 7.5K;1%;0201 C910 1.0UF;20%;6.3V;0201 CHD_DM [5] CHD_DP M10 M11 XO_EXT CHG_DM M1 XTAL1 N1 XTAL2 N12 CS_P CS_N T10 R10 C907 C0201_NC C0201_NC C908 XTAL2 [10] 3mil trace width GND C0201_NC GND GND Note: 22-4 C VAUX18_PMU [9] 1000ohm;250mA;0402 PCHR_LED Gauge [17] C906 AUXADC AVSS18_AUXADC [17] XTAL1 [10] CHG_DP AVDD18_AUXADC GND [51] T2 B910 GND Set resistor and cap. close to PMIC [32] PMIC_CLK_WCN R2 Differential [5] [4] PMIC_CLK_RF VDRV XTAL1 VBUS_USB_IN PMIC_CLK_BB VCDT BATON 39K;1%;0201 VCDT rating: 1.268V AVSS22_XO SPI_MISO XTAL2 C M2 3mil trace width 330K;1%;0201 D 1 GND R907 [4] TP903 P11 12x15MIL XO_SOC N9 M13 JP903 RTC32K_CK R15 Charger I/F VBAT JP902 [8,9,10,13,15,17,18,21,22,23,24,25,28,41] VBAT C903 1.0UF;20%;6.3V;0201 [13] ISENSE P14 EXT_PMIC_EN1 JP901 3,24,25,28,41] 0.1uF;20%;6.3V;0201 2 SINGLE-GND-L4 GND UVLO_VTH RTC32K_2V8 1 R12 AUXADC_VIN R7 P7 T7 C911 1.0UF;20%;6.3V;0201 SG904 C912 0.1uF;20%;6.3V;0201 CS_P Set cap. close to PMIC CS_N Differential AVSS18_AUXADC ISINK L12 ISINK1 AUXADC_VIN 3mil trace width AVDD18_AUXADC 3mil trace width 3mil trace width X901 R911 100K;1%;0201 4 SENSOR HOT2 3 XTAL2 XTAL2 [10] 3mil trace width [10] XTAL1 XTAL1 1 3mil trace width HOT1 AVSS18_AUXADC 26MHz GND 2 3mil trace width MT6357CRV/A B Note: 22-1 Schematic design notice of "22_POWER_MT6357-IF" B Route AVDD18_AUXADC, AUXADC_VIN, and AVSS18_AUXADC with 3mils width traces and well GND shielding Note 22-1: Please implement 2520 & 2016 Size TMS PCB co-layout. Please refer to MT6762_MT6357 Co-Clock Design Notice for co-layout guide Note 22-2: 1. Please Connect P1 and R1 ball first and then to GND 2. Please Connect P2 and N2 ball first and then to GND 3. Please connect DCXO GND to main GND by independent L1-2 GND via.; DO NOT connect it through L1 GND Note 22-3: Let floating if disable HOMEKEY function Note 22-4: Please follow MT6762_MT6357 Co-Clock Design Notice for Layout guide of VAUX18, Please connect to battery connector Note 22-5: then R8101 can use 0 ohm to replace BEAD. Please route VAUX18_PMU with well-ground sheilding if using 0 ohm to replace BEAD for AVDD18_AUXADC A A Title 09_POWER_MT6357_IF DOCUMENT NO.: Design Name DEPARTMENT: WINGTECH-SH Date: 5 4 3 2 Monday, April 08, 2019 1 REV: V10 Size DESIGNER: Sheet D LIUFENGLEI 10 of 53 5 4 3 2 1 U701D MT6357 D AUDIO IF [4] R16 AUD_CLK_MISO [4] AUD_DAT_MISO0 [4] AUD_DAT_MISO1 [4] AUD_SYNC_MISO T17 R17 T16 AUD_CLK_MISO D UL POWER AVDD28_AUD AUD_DAT_MISO1 AVSS28_AUD P16 AUD_CLK_MOSI [4] AUD_DAT_MOSI0 [4] AUD_DAT_MOSI1 [4] AUD_SYNC_MOSI P15 N14 M14 [29] [19] AU_VIN0_P AU_VIN0_N [20] AU_VIN1_P [20] AU_VIN1_N AUD_CLK_MOSI AU_MICBIAS1 [19] AU_VIN2_P AU_VIN2_N K3 K4 K5 L5 J4 J5 AUD_SYNC_MOSI [20] HP_EINT 10K;5%;0201 J1 - AU_HPL and AU_HPR should be routed as single end signal, and be guarded by GND, up and down, left and right respectively - The suggested layout pattern of AU_HPL/ AU_HPR/ AU_REFN is " GND AU_HPL AU_REFN AU_HPR GND" [20] [29] [20] [19,29] AU_MICBIAS1 [20] CHARGE PUMP AU_VIN0_P AU_VIN0_N AVDD18_AUD G2 VIO18_PMU AU_VIN1_P AU_VIN1_N AVSS18_AUD AU_V18N AVSS_AUD C1004 2.2uF;20%;6.3V;0402 D1 AU_V18N C1005 4.7uF;20%;6.3V;0402 F1 FLYP E2 FLYN F2 [3,4,5,7,9,16,17,21,24,25,26,28,32,35,41] SH1002 AU_VIN2_P AU_VIN2_N FLYP M4 ACCDET R1077 AU_MICBIAS0 Set cap. and shortpad close to PMIC FLYN ACCDET [29] C1002 C1003 1.0UF;20%;6.3V;0201 1.0UF;20%;6.3V;0201 M3 AUD_DAT_MOSI1 P-N pair should be differential pair & shielded with GND C [9] AUD_DAT_MOSI0 P-N pair should be differential pair & shielded with GND [19] AVSS28_AUD L3 VAUD28_PMU SH1001 AUDIO INPUT P-N pair should be differential pair & shielded with GND [19] C1001 1.0UF;20%;6.3V;0201 H5 AUD_SYNC_MISO AU_MICBIAS0 [4] K1 AUD_DAT_MISO0 C1006 4.7uF;20%;6.3V;0402 Set cap. close to PMIC ACCDET C 1. AVSS18_AUD is connected to GND in very short trace 2. AVSS18_AUD is connected to de-couple cap of AVDD18_AUD and AU_V18N with 6mil trace respectively HP_EINT AUDIO OUTPUT J2 AU_HPL H3 AU_REFN G3 AU_HPR [18] AU_LOLP [18] 1000pF;20%;50V;0201 AU_LOLN C1007 GND [18] AU_HSP [18] AU_HSN F4 F3 G6 G5 AU_HPL AU_REFN AU_HPR AU_LOLP AU_LOLN AU_HSP AU_HSN Set cap. close to PMIC R1088 470;5%;0201 B R1089 MT6357CRV/A 470;5%;0201 B GND A A Title 10_POWER_MT6357_Audio DOCUMENT NO.: Design Name DEPARTMENT: WINGTECH-SH Date: 5 4 3 2 Monday, April 08, 2019 1 REV: V10 Size DESIGNER: Sheet D LIUFENGLEI 11 of 53 5 4 3 2 1 D D C C B B A A Title REV: 11_POWER_SubPMIC-General DOCUMENT NO.: Design Name DEPARTMENT: WINGTECH-SH Date: 5 4 3 2 Monday, April 08, 2019 1 Size DESIGNER: Sheet V10 D LIUFENGLEI 12 of 53 5 4 3 2 1 D D OVP U1202 B3 C2 C3 VBUS_USB_IN_CON VBUSIN1 VBUSIN2 VBUSIN3 R1207 VBUSOUT1 VBUSOUT2 VBUSOUT3 A2 A3 B2 [10,13] C1211 R1215 C1210 C1260 C1288 D1201 C1 511K;1%;0201 VBUS_USB_IN 2 [28,29] OVPAD 0.1uF;20%;25V;0201 33pf;30%;50V;0201 NF_ESD5411N-2/TR A4 B4 C4 R1208 120K;1%;0201 1 0.1uF;20%;25V;0201 33pf;30%;50V;0201 47K;5%;0201 GND3 GND2 GND1 A1 nACOK B1 nEN SM5328 Surge VBUS: ±100V Vovp=6.3V with Overvoltage Protection up to 29V DC when R1207=511K R1208=120K +-3% C C 807400000171 [10,13] VBUS_USB_IN C1203 TI BQ24157 should be 33nf/ ETA6973 Should be 10nf ISENSE [10] U1201 L1201 Huawei request DRC<30m Ω C1201 2.2uF;20%;16V;0402 TP1204 12x15MIL TP1205 12x15MIL PMID [5] [5] B1 B2 B3 A4 B4 SCL5 SDA5 [5] [8,9,10,13,15,17,18,21,22,23,24,25,28,41] C1202 VBAT [5] C4 EINT_CHG_0 R1214 VBUS1 VBUS2 SW1 SW2 SW3 PMID1 PMID2 PMID3 BOOT C1 C2 C3 C1203 A3 0.033uF;20%;16V;0201 D4 R0201_NC E2 GPIO_CHG_EN_0 SCL SDA PGND1 PGND2 PGND3 STAT OTG CSIN CSOUT CD VREF D1 D2 D3 1.0uH;20%;2520 R1218 [13] 0.056;1%;0805 VBAT [8,9,10,13,15,17,18,21,22,23,24,25,28,41] C1265 10uF;20%;6.3V;0402 10uF;20%;6.3V;0402 PGND SH1260 PGND E1 E4 E3 C1215 C1207 C1206 0.1uF;20%;6.3V;0201 0.1uF;20%;6.3V;0201 1 BQ24157YFFR 1 L1201 C1205 2.2uF;20%;16V;0402 2.2uF;20%;16V;0402 PGND [13] 1 1 C1222 A1 A2 R1236 10K;1%;0201 1.0uF;10%;10V;0402 Comptable with other Charger IC ETA6937CSU TP1201 TP1202 12x15MIL 12x15MIL B B Schematic design notice of "26_POWER_SubPMIC-Charger + PP" page. Note 26-1: For better ESD or surge performance we need choose suitable device for system protection. Please refer to [Surge device selection guide V2.0] provide by MTK. A A Title REV: V10 12_POWER_SubPMIC-Charger + PP DOCUMENT NO.: Design Name DEPARTMENT: WINGTECH-SH Date: 5 4 3 2 Monday, April 08, 2019 1 Size DESIGNER: Sheet D LIUFENGLEI 13 of 53 5 4 3 2 1 D D C C B B A A Title 13_POWER_SubPMIC-HV powers DOCUMENT NO.: Design Name DEPARTMENT: WINGTECH-SH Date: 5 4 3 2 Monday, April 08, 2019 1 REV: V10 Size DESIGNER: Sheet D LIUFENGLEI 14 of 53 5 4 3 2 1 D D LDO for VA12 [8,9,10,13,15,17,18,21,22,23,24,25,28,41] Note: 28-1 Suggest trace width > 12 mil R1401 1K;5%;0201 VBAT VA12_PMU C1401 1.0UF;20%;6.3V;0201 C2 C1402 U1401 BIAS A1 VOUT C1488 [3] 1.2V R1402 10uF;20%;6.3V;0402 28K;1%;0201 33pf;30%;50V;0201 GND [9] A2 VS2_PMU EN C1403 4.7uF;20%;6.3V;0402 Suggest trace width > 12 mil B1 ADJ VIN GND GND 0.5V x (1+R1402/R1403)=1.2V C GND B2 EXT_PMIC_EN2 C1 [10] C R1403 20K;1%;0201 MT6680P/A GND GND GND Ext. Bulk for VS2 Suggest trace width > 25 mil 7 VBAT C1406 C1407 12x15MIL 8 1 5 GND GND VIN LX PGOOD FB 6 1.0uH;20%;2016 TP1401 1 0.1uF;20%;6.3V;0201 10uF;20%;6.3V;0402 Note: 28-2 L1401 U1402 [8,9,10,13,15,17,18,21,22,23,24,25,28,41] VS1_PMU 1.46V EN VOUT PGND AGND 4 3 GND R1405 180K;1%;0201 GND EXT_VS2_FB GND [9] 0.6V x (1+R1404/R1405) NOTE: Do not use VCAMD 1.3/1.5/1.8 when VS2 BUCK B EXT_VS2 [9] R1404 C1404 270K;1%;0201 22uF;20%;6.3V;0603 2 MT6690N/A [8,9,22] Suggest trace width > 40 mil applied B Schematic design notice of "28_POWER_ThirdParty-Power" Note 28-1: VA12 Layout placement please close to AP Note 28-2: VS2 Buck Layout placement please close to PMIC MT6357 Note 28-3: VCN33 LDO Layout placement please close to MT6631 A A Title Design Name DEPARTMENT: WINGTECH-SH Date: 5 4 3 2 REV: V10 14_POWER_ThirdParty_Powers DOCUMENT NO.: Monday, April 08, 2019 1 Size DESIGNER: Sheet D LIUFENGLEI 15 of 53 5 4 3 2 1 LPDDR3 U1501 Note: 44-2 R1501 R1502 240;1%;0201 240;1%;0201 ZQ0 ZQ1 G2 G3 F13 G11 H10 J8 J13 K8 K9 L10 L12 M8 N13 P9 R13 T8 U10 U12 V8 V9 W8 W13 Y10 AA11 GND C F2 G4 G8 H3 H5 L4 M3 M4 N4 N8 P4 P12 R3 R4 R8 T4 Y4 Y5 AA2 AA4 AA8 H4 J4 K4 P2 U4 V4 W4 A3 A8 A12 B2 B7 B11 C3 C5 C8 C10 C12 C13 D7 B GND A2 A13 B1 B14 D2 D3 D4 D5 D6 ZQ0 ZQ1 VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9 VSSQ10 VSSQ11 VSSQ12 VSSQ13 VSSQ14 VSSQ15 VSSQ16 VSSQ17 VSSQ18 VSSQ19 VSSQ20 VSSQ21 VSSQ22 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VDDCA_1 VDDCA_2 VDDCA_3 VDDCA_4 VCC1 VCC2 VCC3 VCC4 VCC5 VCCQ1 VCCQ2 VCCQ3 VCCQ4 VCCQ5 VDDI eMMC DS CLK RST_N CMD DAT7 DAT6 DAT5 DAT4 DAT3 DAT2 DAT1 DAT0 LP-DDR3 VSSCA1 VSSCA2 VSSCA3 VSSCA4 VSSCA5 VSSCA6 VSSCA7 VSSm1 VSSm2 VSSm3 VSSm4 VSSm5 VSSm6 VSSm7 VSSm8 VSSm9 VSSm10 VSSm11 VSSm12 VSSm13 NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9 CS0_N CS1_N CKE0 CKE1 CK_T CK_C DQS0_T DQS0_C DQS1_T DQS1_C DQS2_T DQS2_C DQS3_T DQS3_C DM0 DM1 DM2 DM3 VREFCA VREFDQ DNU1 DNU2 DNU3 DNU4 DNU5 DNU6 DNU7 DNU8 ODT GND D F5 F8 J5 K5 L2 L5 M5 N5 P5 P8 P11 R5 T5 U5 V5 W5 AB5 AB8 VDRAM_PMU C1531 C1503 C1504 C1505 C1506 B4 A5 A10 C9 B5 C6 B10 A9 U3 T3 T2 R2 P3 N3 T9 R9 M9 N9 Y9 W9 H9 J9 R10 N10 W10 J10 [2,9,16] C1508 22uF;20%;6.3V;0603 C1530 GND Note: 44-3 K2 N2 U2 V2 A7 B8 C2 A6 Note: 44-1 Note: 44-4 G9 H8 H12 J11 K10 K12 L8 L9 M10 M12 N11 R11 T10 T12 U8 U9 V10 V12 W11 Y8 Y12 AA9 B3 B12 B13 C4 D8 A4 B6 B9 C7 C11 A11 [3,9] C1502 2.2uF;20%;6.3V;0402 0.1uF;20%;6.3V;0201 Power VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18 VDDQ19 VDDQ20 VDDQ21 VDDQ22 EMI_VDD1 C1501 0.1uF;20%;6.3V;0201 0.1uF;20%;6.3V;0201 VDD2_1 VDD2_2 VDD2_3 VDD2_4 VDD2_5 VDD2_6 VDD2_7 VDD2_8 VDD2_9 VDD2_10 VDD2_11 VDD2_12 VDD2_13 VDD2_14 VDD2_15 VDD2_16 VDD2_17 VDD2_18 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 F3 F4 F9 G5 AA3 AA5 AB3 AB4 AB9 0.1uF;20%;6.3V;0201 W12 V11 V13 U11 U13 T11 T13 R12 N12 M13 M11 L13 L11 K11 K13 J12 AB12 AB11 AB10 AA13 AA12 AA10 Y13 Y11 H11 H13 G10 G12 G13 F10 F11 F12 EMI0_DQ0 EMI0_DQ1 EMI0_DQ2 EMI0_DQ3 EMI0_DQ4 EMI0_DQ5 EMI0_DQ6 EMI0_DQ7 EMI0_DQ8 EMI0_DQ9 EMI0_DQ10 EMI0_DQ11 EMI0_DQ12 EMI0_DQ13 EMI0_DQ14 EMI0_DQ15 EMI0_DQ16 EMI0_DQ17 EMI0_DQ18 EMI0_DQ19 EMI0_DQ20 EMI0_DQ21 EMI0_DQ22 EMI0_DQ23 EMI0_DQ24 EMI0_DQ25 EMI0_DQ26 EMI0_DQ27 EMI0_DQ28 EMI0_DQ29 EMI0_DQ30 EMI0_DQ31 VDD1_1 VDD1_2 VDD1_3 VDD1_4 VDD1_5 VDD1_6 VDD1_7 VDD1_8 VDD1_9 C0201_NC [6] [6] [6] [6] [6] [6] [6] [6] [6] [6] [6] [6] [6] [6] [6] [6] [6] [6] [6] [6] [6] [6] [6] [6] [6] [6] [6] [6] [6] [6] [6] [6] CA0 CA1 CA2 CA3 CA4 CA5 CA6 CA7 CA8 CA9 0.1uF;20%;6.3V;0201 D Y2 Y3 W2 W3 V3 L3 K3 J3 J2 H2 EMI0_CA0 EMI0_CA1 EMI0_CA2 EMI0_CA3 EMI0_CA4 EMI0_CA5 EMI0_CA6 EMI0_CA7 EMI0_CA8 EMI0_CA9 C0201_NC [6] [6] [6] [6] [6] [6] [6] [6] [6] [6] C1509 0.1uF;20%;6.3V;0201 GND C1510 0.1uF;20%;6.3V;0201 VEMC_PMU [9] VIO18_PMU [3,4,5,7,9,11,17,21,24,25,26,28,32,35,41] C1511 4.7uF;20%;6.3V;0402 GND GND C C1512 0.1uF;20%;6.3V;0201 eMMC_VDDI MSDC0_DSL [6] MSDC0_CLK [6] MSDC0_RSTB [6] MSDC0_CMD [6] MSDC0_DAT7 MSDC0_DAT6 MSDC0_DAT5 MSDC0_DAT4 MSDC0_DAT3 MSDC0_DAT2 MSDC0_DAT1 MSDC0_DAT0 EMI0_CS0 EMI0_CS1 [6] [6] [6] [6] [6] [6] [6] [6] C1516 GND C1513 0.1uF;20%;6.3V;0201 C1514 2.2uF;20%;6.3V;0402 GND GND 1.0UF;20%;6.3V;0201 GND Close to Memory Note: 44-3 [6] [6] EMI0_CKE0 EMI0_CKE1 [6] [6] EMI0_CK_T EMI0_CK_C [6] [6] EMI0_DQS0_T EMI0_DQS0_C EMI0_DQS1_T EMI0_DQS1_C EMI0_DQS2_T EMI0_DQS2_C EMI0_DQS3_T EMI0_DQS3_C EMI0_DMI0 EMI0_DMI1 EMI0_DMI2 EMI0_DMI3 C1515 0.1uF;20%;6.3V;0201 [6] [6] [6] [6] [6] [6] [6][2,9,16] [6] [6] [6] [6] [6] Note: 44-5 Schematic design notice of "44_Memory_eMMC_LPDDR3" VDRAM_PMU Note 44-1: Please refer to power supply related page select VDRAM1 output voltage properly for LPDDR3 C1517 2.2uF;20%;6.3V;0201 M2 P13 EVREF EVREF AB14 AB13 AB2 AB1 AA14 AA1 A14 A1 [6,16] [6,16] C1518 1.0UF;20%;6.3V;0201 GND P10 Note 44-2: DRAM ZQx resistor = 240ohm (1%) that must be connected to GND B Note 44-3: Please refer to eMCP vendor's datasheet or MTK common design notice to get the recommendation bypass cap. value for VCC/VCCQ/VDDI power domains of eMMC. Note 44-4: VDD2 VDDQ VDDCA decoupling cap: closed to DRAM ball. For other cap for PMIC [>10uF, at PMIC page]: please also refer to MMD and layout guide for placement. Note 44-5: Please check MT6765, MT6762 and MT6761's capacitor value. 32EMCP16-EL3DTA28 Project MT6765 MT6762 MT6761 C1517 2.2uF 2.2uF 0.1uF C1518 1uF 1uF 0.1uF A A Title 15_Memory_eMMC_LPDDR3REV: DOCUMENT NO.: Design Name DEPARTMENT: WINGTECH-SH Date: 5 4 3 2 Monday, April 08, 2019 1 Size DESIGNER: Sheet V10 D YANGSHAOYUN 16 of 53 5 4 3 2 1 BATTERY CONNECTOR D D [8,9,10,13,15,17,18,21,22,23,24,25,28,41] VBAT VBAT [8,9,10,13,15,17,18,21,22,23,24,25,28,41] [5] R3608 IDDIG 1K;5%;0201 1 1 TVS3602 [28,29] USB_ID TVS3606 2 C3632 PTVSHC3D4V5U 10uF;20%;6.3V;0402 C3629 1.0UF;20%;6.3V;0201 C3630 33pf;30%;50V;0201 2 SDA PESD5V0L1BSF Rfg > 0.5W R3607 0.01;1%;0603 SG3601 VBAT- [8,9,10,13,15,17,18,21,22,23,24,25,28,41] [17] GND VBAT SG3602 J3601 [17,28] CS_N [10] CS_P [10] BAT_ID_CONN 1 6 2 5 3 4 BATON_CONN VBAT- [17,28] [17] C C 7 9 11 GND8PIN 13 8 10 12 14 CPBA206-0102E R3631 USB_DP_1 2 R3605 BATON_CONN 1K;1%;0201 BATON 16.9k;1%;0201 TVS3604 R3624 24K;1%;0201 TVS3605 R3632 NF_ICMF052P900MFR R3633 6.8;1%;0201 USB_DM [5] R3634 6.8;1%;0201 USB_DP [5] 0;0.5A;0201 [10] TREF_PMU [9] 2 2 R3606 4 EMI3601 PSED5V0H1BSF TVS3603 2 [17,28] 0;0.5A;0201 3 1 1 USB_DM_1 [28,29] 1 [28,29] PSED5V0H1BSF 1 PESD3V3V1BCSF Battery pack is considered not present if BAT_ON is above 0.944*TREF B B [3,4,5,7,9,11,16,21,24,25,26,28,32,35,41] R3601 VIO18_PMU BAT_ID R3602 100K;1%;0201 5.1K;1%;0201 BAT_ID_CONN [17,28] 2 [4] TVS3601 PESD3V3V1BCSF 300K;1%;0201 1 ADC 0.05-1.45 with 0.3 gap R3623 A A Title 36_Battery/USB IF DOCUMENT NO.: Design Name DEPARTMENT: WINGTECH-SH Date: 5 4 3 2 Monday, April 08, 2019 1 REV: V10 Size DESIGNER: Sheet D LIUFENGLEI 17 of 53 5 4 3 2 1 D D SPK [8,9,10,13,15,17,21,22,23,24,25,28,41] 0.1uF;20%;6.3V;0201 Receiver VBAT L3701 C3727 1.0uH;20%;2520 J3701 C3726 C3725 AW87319 D4 PIN should connect BATTERY 3mil Close to BB 10uF;20%;6.3V;0402 0.1uF;20%;6.3V;0201 [11] AU_HSN 6mil Close to connector R3702 REC_N 0;1A;0402 1 6mil 2 C C [5] E4 D2 A4 SW SW1 VDD SCL PVDD2 C3718 B2 10uF;20%;16V;0603 10uF;20%;16V;0603 C2 AD1 A1 VOP C3717 C3716 B3703 AU_HSP 6mil 6mil R3703 REC_P 0;1A;0402 C3721 120ohm;1300mA;0402 SPKR_OUT_P [29] SPKR_OUT_N [29] 1 2 C3722 TVS3701 100pF;30%;50V;0201 100pF;30%;50V;0201 10uF;20%;16V;0603 TVS3702 4-00-451008 12x15MIL C1 VON B3704 120ohm;1300mA;0402 PGND C0201_NC Connect to one GND C3711 NF_ESD5431Z-2/TR NF_ESD5431Z-2/TR SG3702 C0201_NC 2 C3 AW87319CSR C3712 B1 INP BGND1 INN BGND E1 GND E2 0.1uF;20%;6.3V;0201 AD2 0.1uF;20%;6.3V;0201 C3724 B4 C3723 AU_LOLP C4 AU_LOLN [11] D1 [11] 1 TP3705 12x15MIL TP3706 PVDD1 [11] A2 PVDD SDA 1 1 SCL6 100pF;30%;50V;0201 RSTN 2 E3 C3706 2 SDA6 B3 U3701 D3 1 AUDIO_PA_RST [5] 1 [5] D4 4-00-451008 J3702 TP3707 12x15MIL SG3701 HT-COPPER 1 Connecting the GNDs together and then to main GND through signle via B B A A Title 37_SPK/Receiver/Vibrator DOCUMENT NO.: Design Name DEPARTMENT: WINGTECH-SH Date: 5 4 3 2 Monday, April 08, 2019 1 REV: V10 Size DESIGNER: Sheet D LIUFENGLEI 18 of 53 5 4 3 2 1 D D MAIN MIC main GND SG3802 Close to PMIC C3802 68pF;30%;50V;0201 [29] C3821 1.0UF;20%;6.3V;0201AU_VIN0_P AU_VIN0_P_CONN [11] C3813 33pf;30%;50V;0201 [29] C3812 1.0UF;20%;6.3V;0201AU_VIN0_N AU_VIN0_N_CONN [11] C3818 68pF;30%;50V;0201 TO CODEC C C main GND AU_MICBIAS0 [11,29] R3801 0;0.5A;0201 TOP MIC C3801 C8225 0.1uF;20%;6.3V;0201 SG3805 33pf;30%;50V;0201 U3801 SPV0842LR5H-1 1 2 VDD OUT Close to BB C3809 1.0UF;20%;6.3V;0201 [11] AU_VIN2_P B GND B C3808 3 100pF;30%;50V;0201 C3810 C3803 C3804 C0201_NC C0201_NC 1.0UF;20%;6.3V;0201 [11] AU_VIN2_N SG3801 A A Title 38_MIC DOCUMENT NO.: Design Name DEPARTMENT: WINGTECH-SH Date: 5 4 3 2 Monday, April 08, 2019 1 REV: V10 Size DESIGNER: Sheet D LIUFENGLEI 19 of 53 5 4 3 2 1 D D Earphone AU_HPL [11] AU_HPL [11] AU_HPR AU_HPR R3911 0;1A;0402 R3912 R3901 0;1A;0402 R3902 20;1%;0201 20;1%;0201 AU_HPL_IN [29] AU_HPR_IN [29] Earphone UL NOTE: 63-1 C3908 C3907 C0201_NC C0201_NC GND GND main GND C C [11] AU_MICBIAS1 C3988 SG3902 C0201_NC R3903 1K;5%;0201 [11] AU_VIN1_N C3905 EAR_MIC_N 1.0UF;20%;6.3V;0201 AU_VIN1_N_MIC [29] AU_VIN1_P_MIC [29] C3903 R3905 C0201_NC SG3901 C3904 33pf;30%;50V;0201 C3909 [11] AU_VIN1_P C3906 1.0UF;20%;6.3V;0201 [11] ACCDET R3904 1.5K;5%;0201 C0201_NC EAR_MIC_P Connecting the GNDs together and then to main GND through signle via 1K;5%;0201 C3910 C0201_NC GND NOTE:62-2 B A B NOTE:62-1 R3911 R3912, BEAD6203, BEAD6204 and BEAD6205 needs changed to "BLM18BD102SN1" for high THD performance (-90dB) but this BOM change will results in FM RSSI 10dB degraded . Note 62-2: Reserved Cap for CS/RS test, please double check multi-key function when used A Title 39_Earphone DOCUMENT NO.: Design Name DEPARTMENT: WINGTECH-SH Date: 5 4 Note 62-1: Part # of BEAD6202, BEAD6203, BEAD6204 and BEAD6205 needs changed to "BLM18BD102SN1" for high THD performance (-90dB) but this BOM change will results in FM RSSI 10dB degraded . Note 62-2: Reserved Cap for CS/RS test, please double check multi-key function when used Note 62-3: R6513 Earphone Jack @ Main board Earphone Jack @ Sub board 0 ohm 100nF Note 62-4: Please Select ACC Mode for Operator Project to Pass Electrical MOS Test; 3 2 Monday, April 08, 2019 1 REV: V10 Size DESIGNER: Sheet D LIUFENGLEI 20 of 53 5 4 3 2 1 Common Mode Filter [21] LCM_LEDA [21] LCM_AVEE [21] LCM_AVDD [3,4,5,7,9,11,16,17,21,24,25,26,28,32,35,41] TP4031 12x15MIL VIO18_PMU MIPI_DSI1_LANE3_P_CON [21] 2 MIPI_DSI1_LANE3_N_CON [21] 1 EMI4001 3 [5] DSI0_D3P ICMF052P900MFR [5] DSI0_D3N 4 D D 1 R4016 [5,21] [21] [21] LCM_RST [5,21] VIO18_PMU GPIO_CTP_RSTB [5,21] EINT_CTP [3,4,5,7,9,11,16,17,21,24,25,26,28,32,35,41] [21] LCM_AVDD LCM_AVEE 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 41 42 GND4PIN 44 43 MIPI_DSI1_LANE3_N_CON MIPI_DSI1_LANE3_P_CON [21] [21] MIPI_DSI1_LANE0_N_CON MIPI_DSI1_LANE0_P_CON [21] [21] MIPI_DSI1_CLK_N_CON MIPI_DSI1_CLK_P_CON R4032 R4031 R4030 MIPI_DSI1_LANE1_N_CON MIPI_DSI1_LANE1_P_CON [21] [21] MIPI_DSI1_LANE2_N_CON MIPI_DSI1_LANE2_P_CON [21] [21] 1K;5%;0201 [5] 1K;5%;0201 [5] 1K;5%;0201 [5] C4010 C4011 C4085 C4086 C4089 MIPI_DSI1_LANE2_N_CON [21] 1 MIPI_DSI1_LANE2_P_CON [21] 2 EMI4002 4 [5] DSI0_D2N ICMF052P900MFR [5] DSI0_D2P 3 [21] [21] LCD_ID2 LCD_ID1 LCD_ID0 MIPI_DSI1_CLK_P_CON [21] 2 MIPI_DSI1_CLK_N_CON [21] 1 MIPI_DSI1_LANE1_P_CON [21] 2 MIPI_DSI1_LANE1_N_CON [21] 1 MIPI_DSI1_LANE0_P_CON [21] 2 MIPI_DSI1_LANE0_N_CON [21] 1 EMI4003 3 [5] DSI0_CKP ICMF052P900MFR [5] DSI0_CKN 4 EMI4004 3 [5] DSI0_D1P ICMF052P900MFR [5] DSI0_D1N 4 C4088 C0201_NC C4008 C0201_NC C4061 C0201_NC C4021 C0201_NC C4007 C0201_NC C4006 C0201_NC 33pf;30%;50V;0201 C4031 33pf;30%;50V;0201 SPI3_LCM_MISO 1.0UF;20%;6.3V;0201 [5,21] 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 OK-23GF040-04(005A) 68pF;30%;50V;0201 SPI3_LCM_MOSI VIO18_PMU [21] SPI3_LCM_CSB [5,21] 1000pF;20%;50V;0201 [5,21] SPI3_LCM_CLK 68pF;30%;50V;0201 [5,21] LCM_LEDA [21] LCM_LEDK [21] LCM_LEDK [5,21] SPI3_LCM_CLK [5,21] SPI3_LCM_CSB [5,21] SPI3_LCM_MOSI [5,21] SPI3_LCM_MISO [5,21] EINT_CTP [5,21] GPIO_CTP_RSTB [5,21] LCM_RST [21] LCD_CABC [5] DSI_TE LCD_CABC R0201_NC [3,4,5,7,9,11,16,17,21,24,25,26,28,32,35,41] J4001 EMI4005 3 [5] DSI0_D0P ICMF052P900MFR [5] DSI0_D0N 4 C C LCD Gate Drive LCD Backlight LED Driver LCD Gate Driver I2C address: 0X3E (Write:0x7C, Read:0x7D) SM5109&OCP2131WPAD Rating : 50V 20mil 0;1A;0603 U4003 GND R0201_NC [5] [5] R0201_NC [5,35] SCL3 [5,35] SDA3 B2 C2 GPIO_LCM_BIAS_EN B1 A1 GPIO_LCM_BIAS_EN2 B3 E1 D2 TP4001 1 TP4002 12x15MIL 1 REG1 REG2 SCL SDA D1 E3 R4002 0;1A;0402 LCM_AVDD [21] D3 E2 [5] DISP_PWM OUTN PGND1 PGND2 AGND CFLY1 CFLY2 A2 C3 GND R0201_NC R4001 0;1A;0402 LCM_AVEE [21] [21] GND LCD_CABC R4008 GND C4024 4.7uF;10%;10V;0603 C4025 10uF;20%;10V;0603 10uF;20%;10V;0603 [21] 1.0uF;10%;50V;0603 33pf;30%;50V;0201 FB GND 1 R4005 0;1A;0402 LCM_LEDK [21] C4084 4.99 33pf;30%;50V;0201 4.99;1%;0402 GND GND AW9962E&SGM3756 SM5109&OCP2131WPAD 12x15MIL CTRL C4087 C4023 A3 SM5109 LCM_LEDA B C4027 GND 5 0;0.5A;0201 R4007 R4008 Share PAD 15mil C4028 R4003 C4026 10uF;20%;10V;0603 ENP ENN R4007 U4010 GND2 SW OUTP 600oHM;300mA;0402 7 VIN GND1 C1 2 R4018 C0201_NC R4017 R4004 1 4 10uF;20%;6.3V;0402 NC VIO18_PMU 2 C4032 33pf;30%;50V;0201 [3,4,5,7,9,11,16,17,21,24,25,26,28,32,35,41] 10uH;20%;2520 LMBR140ET1G C4029 C4022 D4001 L4002 SW R4006 6 VBAT VIN [8,9,10,13,15,17,18,21,22,23,24,25,28,41] 3 B 4.7UH;20%;2016 L4001 VBAT 10uF;20%;6.3V;0402 [8,9,10,13,15,17,18,21,22,23,24,25,28,41] I LED=VFB(200mv)/Rset 4.99@ 40mA GND GND GND GND GND A A Title Design Name DEPARTMENT: WINGTECH-SH Date: 5 4 3 2 REV: V10 40_LCD/CTP IF DOCUMENT NO.: Monday, April 08, 2019 1 Size DESIGNER: Sheet D LIUFENGLEI 21 of 53 5 4 3 2 Main Camera 13M 1 TP4100 1 TP4101 [5,22] 1 12x15MIL [5,22] RCP_B RCN_B 12x15MIL TP4102 [5,22] 1 RDP0_B C4101 1.0UF;20%;6.3V;0201 VCM [9] VLDO28_PMU [5] PWDN_VCM [5,22] SCL2 [5,22] RDN1_B [5,22] RDP1_B D [5,22] [5,22] [5,22] [5,22] RCN_B RCP_B RDN3_B RDP3_B [5,22] SDA2 [22] FSYNC VCAMIO_PMU [9,22] IOVDD 1.8V CAM AVDD 2P8 FOR FRONT AND REAR AVDD C4106 [9,22] [8,9,10,13,15,17,18,21,23,24,25,28,41] VCAMA_PMU R4190 0;0.5A;0201 C4185 C0201_NC C4186 C0201_NC TP4103 12x15MIL J4101 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 31 32 GND4PIN 33 34 1.0UF;20%;6.3V;0201 1 R4132 0;0.5A;0201 CAM_CLK0 RDN0_B RDP0_B 1K;5%;0201 [5] C4104 2.2uF;20%;6.3V;0201 2.2uF;20%;6.3V;020115pF;10%;50V;0201C0201_NC C0201_NC 4.7uF;20%;6.3V;0402 YXT-BB1B-30S-02 MOUDLE_ID1 VBAT RDP1_B [5,22] RDN1_B CAM_RST0 [5] VCAMD_PMU [9] CAM_AVDD_2P8 [22] AVDD 2.8V C4103 C4105 [5,22] D R4150 C4187 RDN0_B [5,22] [5,22] RDN2_B [5,22] RDP2_B [5,22] R4133 0;0.5A;0201 C4102C4162 [5,22] 12x15MIL [5] [5,22] RDP2_B [5,22] RDN2_B C4166 C0201_NC U4102 4 C4118 C0201_NC [9,22] 3 VCAMA_PMU IN OUT EN GND1 GND2 1 CAM_AVDD_2P8 2 5 [22] R4139 C4120 NF_ETA5053V280DF1E C0201_NC 10K;5%;0201 C4139 [5,22] RDP3_B [5,22] RDN3_B C0201_NC SAMSUNG NEED FAST DISCHARGE TYPE LDO GND Depth Camera 2M TP4104 C 1 TP4105 [5,22] RCP_D 1 12x15MIL [5,22] RCN_D C SG4101 12x15MIL BOM change to 813100001781 [9,22] VCAMIO_PMU C4141 C0201_NC [22] R4144 CAM_AVDD_2P8 0;0.5A;0201 J4102 AGND1 2 3 4 5 6 7 8 9 10 11 12 C4107 4.7uF;20%;6.3V;0402 [9,22] VCAMIO_PMU CAM_PDN2 CAM_RST2 R0201_NC R0201_NC [5] [5] [5] DOVDD 1P8 R4134 R4152 0;0.5A;0201 1K;5%;0201 R4171 0;0.5A;0201 SDA4 [5,22] NF_0;0.5A;0201AVDD 2.8V [9,22] PWSEQ_ID [5,22] SDA4 [5,22] SCL4 [22] FSYNC [5,22] R4141 VCAMA_PMU R4103 R4104 SCL4 C4188 C4189 C0201_NC C0201_NC C4136 C0201_NC 24 23 22 21 20 19 18 17 16 15 14 13 25 26 GND-4PIN C4108 C4109 C0201_NC 2.2uF;20%;6.3V;0402 R4135 [5,22] [5,22] [5,22] [5,22] 0;0.5A;0201 [5] CAM_CLK2 TP4106 RCN_D RCP_D C4111 1 TP4107 [5,22] RDP0_D 15pF;10%;50V;0201 1 12x15MIL [5,22] RDN0_D 12x15MIL RDN0_D RDP0_D 28 27 OK-23GF024-04 Front Camera B 8M B TP4108 1 12x15MIL BOM change to 813100001781 [5,22] RCP [5,22] RCN TP4109 1 TP4110 12x15MIL 1 J4103 [22] FCAM_DVDD [9,22] VCAMIO_PMU [5] [5] [5,22] R4136 CAM_CLK1 0;0.5A;0201 R4137 CAM_RST1 0;0.5A;0201 [22] CAM_RST1_CON [22] SDA2 SDA2 [5,22] CAM_CLK1_CON SCL2 SCL2 [5,22] [5,22] RCN RCP [22] CAM_CLK1_CON [22] CAM_RST1_CON [5,22] SDA2 [5,22] SCL2 [22] FAGND [22] CAM_AVDD_2P8_CON [5,22] [5,22] 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 25 26 GND-4PIN 28 27 RDN0 RDP0 [5,22] [5,22] RDN1 RDP1 [5] [5] RDN3 RDP3 [5] [5] RDP2 RDN2 [5] [5] 12x15MIL [5,22] RDP0 [5,22] RDN0 TP4111 1 12x15MIL OK-23GF024-04 C4142 C4143 C0201_NC [22] C0201_NC C4114 C0201_NC C4144 C0201_NC FCAM_DVDD [9,22] VCAMIO_PMU [9,22] VCAMA_PMU FCAM_DVDD VCAMIO_PMU R4175 [22] [9,22] R0201_NC [8,9,15] CAM_AVDD_2P8 R4173 0;0.5A;0201 CAM_AVDD_2P8_CON R4165 VCAMD_PMU 0;0.5A;0201 A [22] C4140 C4113 [8,9,15] C4163 VS1_PMU C0201_NC [22] 2.2uF;20%;6.3V;0201 [22] 2.2uF;20%;6.3V;0201 A U4103 C4116 C4115 1.0UF;20%;6.3V;0201 2.2uF;20%;6.3V;0201 4 C4130 C0201_NF FRONT_CAM_DVDD_EN TP4155 [5] 3 IN EN OUT GND1 GND2 [22] 1 2 5 C4131 C0201_NF FCAM_DVDD C4132 C0402_NF ETA5053V120DF1E_NF Title 41_Camera IF DOCUMENT NO.: Design Name DEPARTMENT: WINGTECH-SH 1 FAGND 12x15MIL REV: V10 Size DESIGNER: D LIUFENGLEI SG4102 Date: 5 4 3 2 Tuesday, April 09, 2019 1 Sheet 22 of 53 5 4 3 2 1 D D L4201 1.0uH;20%;2016 VBAT OUT2 LED4201 A-SL689W1D-QA6-4T ENM RM PGND ENF AGND2 11 RF 1 12 2 14 1 2 I LED1=6800/Rset I LED2=6800/Rset FLASH 1.0A/ TORCH 200mA 13k;1%;0201 7 3 13 R4202 OCP8132AVAD TVS4202 TVS4203 C4201 R4201 1 LED1 10 AGND1 TORCH_EN 1 1 [5] FLASH_EN C 9 VIN TP4201 12x15MIL LED2 [5] 8 2 OUT1 SW2 NF_PSED5V0H1BSF 4 TP4202 12x15MIL BOM Change to A-SL689W1D-QA6-4T SW1 2 6 GND U4201 5 C 1 1.0UF;20%;6.3V;0201 NF_PSED5V0H1BSF 4.7uF;20%;6.3V;0402 4.7uF;20%;6.3V;0402 C4204 68.1K;1%;0201 C4203 EP [8,9,10,13,15,17,18,21,22,24,25,28,41] B B A A Title Design Name DEPARTMENT: WINGTECH-SH Date: 5 4 3 2 REV: V10 42_Flash/RGB DOCUMENT NO.: Monday, April 08, 2019 1 Size DESIGNER: Sheet D LIUFENGLEI 23 of 53 5 4 3 2 1 D D [8,9,10,13,15,17,18,21,22,23,25,28,41] VBAT U4301 4 [5] 3 FP_LDO_EN C4301 IN EN OUT GND1 GND2 1 2 5 R4301 C4302 0;0.5A;0201 FP_3V3 [24] C4303 C4304 ETA5053V330DF1E 33pf;30%;50V;0201 1.0UF;20%;6.3V;0201 Need change to 807100001163 1.0UF;20%;6.3V;0201 100pF;30%;50V;0201 Fingerprint C C J4301 C4305 C4306 C0201_NC C0201_NC C4307 C4308 C4309 C0201_NC C0201_NC C0201_NC TVS4303 TVS4304 2 14 13 OK-23GF010-04 2 11 12 GND-4PIN TVS4305 NF_AZ5A23-01F C0201_NC C0201_NC 1.0UF;20%;6.3V;0201 1 0.1uF;20%;6.3V;0201 NF_AZ5A23-01F 1 NF_AZ5A23-01F C4310 C4311 C4312 C4313 1 TVS4302 PESD3V3V1BCSF TVS4301 2 0;0.5A;0201 1 FP_3V3 R4302 GPIO_FP_RST_N SPI1_MO [5] SPI1_MI [5] SPI1_CSB [5] SPI1_CLK [5] 1 [24] 10 9 8 7 6 NF_AZ5A23-01F VIO18_PMU 2 [3,4,5,7,9,11,16,17,21,25,26,28,32,35,41] 1 2 3 4 5 EINT_FP_N 2 [5] [5] B B Fingerprint A A Title 43.Fingerprint DOCUMENT NO.: S96116-1-13_MB_20190409-1317 DEPARTMENT: Wingtech-SZ Date: 5 4 3 2 Monday, April 08, 2019 1 REV: V10 DESIGNER: Sheet Size D DESIGNER 24 of 53 5 4 3 2 1 ALP-Sensor Accerometer TP4401 12x15MIL TP4402 12x15MIL TP4403 12x15MIL TP4404 12x15MIL 1 1 BMA253 [5,25] [5,25] [3,4,5,7,9,11,16,17,21,24,25,26,28,32,35,41] SPI4_MI 1 SPI4_MO 2 3 VIO18_PMU 4 SDO CSB SDX GND VDDIO NC C4402 GNDIO BMA253 5 1.0UF;20%;6.3V;0201 SPI4_CLK [5,25] SPI4_CSB [5,25] 11 12 SCX U4412 INT2 SPI4_CLK SPI4_CSB PS SPI4_MO [5,25] [5,25] INT1 [5,25] SPI4_MI 6 [5,25] 1 D 1 D VDD 10 9 U4416 8 1 R4460 7 0;0.5A;0201 VIO28_PMU [5,25] [9,25] [5,25] SCL1 2 3 4 C4461 C0201_NC EINT_ALS [5,25] C4411 1.0UF;20%;6.3V;0201 VIO28_PMU_CON [9,25] [25] SDA1 VIO28_PMU 5 GND1 INTB 10 NA4 9 GND2 SCL NA3 SDA NA2 VDD NA1 8 7 6 MN26005UKDN [5] EINT_ACC 8 7 EINT_PS SDA /INT LEDA LDR 3 [5,25] SCL GND 2 SCL1 SDA1 VDD 1 U4417 [5,25] [5,25] NC 4 VBAT [8,9,10,13,15,17,18,21,22,23,24,25,28,41] 5 6 STK3332 C C FOR SAR sensor [3,4,5,7,9,11,16,17,21,24,25,26,28,32,35,41] ALS/PROXIMITY SENSOR VIO18_PMU R4420 R4422 R4423 R4425 R0201_NC R0201_NC R0201_NC 821400000421 [9,25] [8,9,10,13,15,17,18,21,22,23,24,25,28,41] VIO28_PMU R4461 0;0.5A;0201 R0201_NC VBAT [5,25] U4450 C4452 4 C0201_NC [9,25] 3 VIO28_PMU IN EN OUT GND1 GND2 [35] 1 2 5 [5,25] VDD2V8_SAR I2C Address [5,25] C0201_NC [5,25] VIO28_PMU_CON 22;5%;0201 1.7V---3.0V VIO28_PMU [9,25] R4424 C4404 SCL1 2.2uF;20%;6.3V;0402 SDA1 C4450 NF_SGM2036-1.2YUDH4G/TR [25] 0x47H [8,9,10,13,15,17,18,21,22,23,24,25,28,41] EINT_PS VBAT VBAT [8,9,10,13,15,17,18,21,22,23,24,25,28,41] C4410 EINT_ALS 2.2uF;20%;6.3V;0402 C4453 C0201_NC B B [9,25] VIO28_PMU VIO28_PMU C4405 C4406 1.0UF;20%;6.3V;0201 0.1uF;20%;6.3V;0201 [9,25] A A Title Design Name DEPARTMENT: WINGTECH-SH Date: 5 4 3 2 REV: V10 44_Sensor DOCUMENT NO.: Monday, April 08, 2019 1 Size DESIGNER: Sheet D LIUFENGLEI 25 of 53 5 4 3 2 1 Change to 813300002141 SIM1 D D J4501 R4504 100;5%;0201 VCC1 VCC2 VCC3 IO1 IO2 IO3 RST1 RST2 RST3 VPP1 VPP2 VPP3 CLK1 CLK2 CLK3 GND1 GND2 GND3 S7 S7A S7B R4505 2 SIM1_SRST R4501 2.2;1%;0201 VSIM1_PMU 2 [3,9] S1 S1A S1B 47;5%;0201 TVS4521 S2 S2A S2B TVS4522 S3 S3B S3A TVS4511 PESD5V0S1UL 1 2 1.0UF;20%;6.3V;0201 1 C4501 100;5%;0201 SIM1_SIO [4] TVS4523 S6 S6A S6B S5 S5A S5B 1 [4] R4503 2 SIM1_SCLK NF_ESD5451Z-2/TR 1 [4] NF_ESD5451Z-2/TR S186-1B01F13F NF_ESD5451Z-2/TR SIM2 C C J4502 100;5%;0201 IO1 IO2 IO3 RST1 RST2 RST3 VPP1 VPP2 VPP3 CLK1 CLK2 CLK3 GND1 GND2 GND3 R4508 S7 S7A S7B SIM2_SIO [4] 100;5%;0201 2.2;1%;0201 TVS4525 S3 S3B S3A S6 S6A S6B TVS4526 S5 S5A S5B 1 TVS4524 NF_ESD5451Z-2/TR S2 S2A S2B 2 C4502 PESD5V0S1BL 1 NF_ESD5451Z-2/TR NF_ESD5451Z-2/TR S186-1B01F13F [3,4,5,7,9,11,16,17,21,24,25,26,28,32,35,41] VMCH_PMU [9,26] VIO18_PMU VMCH_PMU [9,26] 1 1 N1 N2 TVS4503 2 R4502 VSIM2_PMU VCC1 VCC2 VCC3 2 R4516 SIM2_SRST 2 [3,9] S1 S1A S1B 47;5%;0201 1 [4] R4506 SIM2_SCLK 1.0UF;20%;6.3V;0201 [4] R4525 1 2 1 R4526 100K 2 1 CJ2101 Q4502 47K EINT_SIM_SD 2 0 1 2 R4527 R0402_NC 3 3 Q4501 2SK3541 2 2 [5,26] R4583 1 [26] 1 VDD_SD 2 R4528 47K B B TF CARD Change to-813300002241 J4503 MSDC1_DAT3 [5] MSDC1_CMD [26] [5] R4510 R4511 33;5%;0201 P1 PA1 33;5%;0201 P2 PA2 P3 PA3 33;5%;0201 P4 PA4 VDD_SD MSDC1_CLK R4512 P5 PA5 33;5%;0201 P6 PA6 P8 PA8 TVS4513 C4570 C0201_NC TVS4515 TVS4512 SH4505 G1 G2 G3 G4 G5 G6 G7 Change to813300002131 屏蔽罩 CMD2 CMD1 VDD2 VDD1 GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 GND9 GND10 GND11 GND12 GND13 VIO18_PMU G8 G9 G10 G11 G12 G13 [3,4,5,7,9,11,16,17,21,24,25,26,28,32,35,41] R4521 100K;1%;0201 SC18042-W007 CLK2 CLK1 SWITCH VSS2 VSS1 G14 R4515 S186-1B21F13B 1K;5%;0201 EINT_SIM_SD [5,26] TVS4501 Switch S186-1B21F13B DAT0_2 DAT0_1 TRAY IN TRAY OUT H L NF_ESD5431Z-2/TR DAT1_2 DAT1_1 S186-1B02F13F TVS4508 NF 1 1 1 NF NF NF 1 N1 PESD5V0S1BL C4511 2.2uF;20%;6.3V;0402 NF 1 2 TVS4514 2 TVS4516 N2 2 2 TVS4517 2 33;5%;0201 1 R4514 1 MSDC1_DAT1 P7 PA7 2 MSDC1_DAT0 [5] 33;5%;0201 2 [5] R4513 CD_DAT3_2 CD_DAT3_1 J4504 Scratch resistant steel sheet DAT2_2 DAT2_1 2 MSDC1_DAT2 [5] 1 [5] Shielding connect to ground 1 R4509 NF A A 5 4 3 2 Title 45_SIM/TF IF DOCUMENT NO.: Design Name DEPARTMENT: WINGTECH-SH Date: 1 Monday, April 08, 2019 REV: V10 Size DESIGNER: Sheet D LIUFENGLEI 26 of 53 5 4 3 2 1 Power Key / Key Pad D D DO NOT put pull-up resistor on PWRKEY [28] [28] [28] J4601 HOMEKEY_TP PWRKEY_CONN_TP KPCOL1_TP J4602 ANT-AT21-110001-02 AT14-110001-04 1 1 2 2 VOLUME DOWN::HOMEKEY+GND J4603 Note: 75-1 ANT-AT21-110001-02 1 J4605 AT14-110001-04 POWKEY：PWR+GND R4601 1K;5%;0201 PWRKEY [10] 2 2 1 J4604 2 AT14-110001-04 1 TVS4601 PESD5V0X1BCSF 5V C4601 C0201_NC VOLUME UP:KPCOL1+GND 2 C 1 C KPCOL1 R4602 1K;5%;0201 GND 2 [5] TVS4604 Note: 75-3 Note: 75-3 1 PESD5V0X1BCSF HOMEKEY R4603 1K;5%;0201 2 [10] TVS4602 Note: 75-3 1 PESD5V0X1BCSF SIDEKEY VOLUME DOWN: HOMEKEY+GND POWERON: VOLUME UP: PWRKEY+GND KPCOL1+GND B B Note 75-1:DO NOT put pull-up resistor on PWRKEY Note 75-2: Volume Up:HOME KEY+GND Volume Down:KPCOL1+GND A A 5 4 3 2 Title 46_Sidekey DOCUMENT NO.: Design Name DEPARTMENT: WINGTECH-SH DESIGNER: April 11, 2019 Sheet Date: 1Thursday, REV: V10 Size D LIUFENGLEI 27 of 53 5 4 3 2 Fixture Test point 1 Grounding DEVICE MODE CONF USB TP-1MM TP4713 TP4765 TP4714 TP4716 TP4717 TP-1MM TP-1MM TP-1MM TP-1MM TP-1MM TP-1MM PTH 1 1 TP-1MM [17,29] TP4721 TP-1MM USB_DM_1 [17,29] USB_DP_1 [13,29] 1 TP4731 1 TP4730 HOLE4701 HOLE4702 PTH-1.6MM PTH-1.6MM D HOLE4703 PTH-1.6MM HOLE4704 PTH-1.6MM HOLE4705 PTH-1.6MM HOLE4706 1.4-1.6 VBUS_USB_IN_CON TP-1MM USB_ID [17,29] 1 1 1 TP4720 1 1 BAT_ID_CONN BATON_CONN 1 [17] [17] 1 D 1 TP4712 1 TP4722 1 1 1 VBAT 1 CT BT [8,9,10,13,15,17,18,21,22,23,24,25,41] TP-1MM BAT GND place near the connect KEYS [27] PWRKEY_CONN_TP POWER_ON 1 [27] VOL_UP 1 VOL_DOWN 1 HOMEKEY_TP [27] [5] KPCOL1_TP FORCE DOWNLOAD KPCOL0 1K;5%;02011 R4718 TP4703 TP4705 TP4706 TP4766 TP-1MM TP-1MM TP-1MM TOP TP-1MM J4701 Spring Grounding AT14-110001-04 1 2 J4702 AT14-110001-04 C Debug C 1 2 J4703 AT14-110001-04 UART JTAG 1 2 CON4701 [5] EINT8 [5] SPI0_CSB 12 11 10 9 8 7 14 16 12 11 10 9 8 7 1 2 3 4 5 6 GND4PIN 14 13 16 15 1 2 3 4 5 6 VIO18_PMU [3,4,5,7,9,11,16,17,21,24,25,26,28,32,35,41] SPI0_MO [5] SPI0_CLK [5] SPI0_MI [5] UTXD0_TP [5,28] URXD0_TP [5,28] [5,28] UTXD0 [5,28] URXD0 R4716 R4717 UTXD0_TP 1K;5%;0201 URXD0_TP TP4761 1 TP-0.5MM TP4762 1 TP-0.5MM [3,4,5,7,9,11,16,17,21,24,25,26,28,32,35,41] 13 15 1K;5%;0201 VIO18_PMU R4727 AXE612124 TP4727 [5] EINT_RAMDUMP NF_10K;5%;0201 1 12x15MIL B B SHIELDING TOP SH4702 SH4701 MARK SH4703 屏蔽罩屏蔽罩屏蔽罩 Waterproof SN Label J4711 SN 1 1 1 PMI_SH 1 WCN BM4701 BAD Mark BB_SH BM4702 BAD Mark BB_SH PMI_SH 1 WCN 1 SN-4x4mm A 1 BOT BM4704 BAD Mark 1 BM4703 BAD Mark BAD MARK SH4706 SH4705 PMU_SH PANEL 屏蔽罩 RF_SH PCB A Mylar 1 1 1 屏蔽罩 MIC MYLAR MY4702 BAD MARK ON PMU_SH Change to 817000003431 4*7*0.08 Title 47_Testpoint/Shielding/GNDREV: DOCUMENT NO.: Design Name DEPARTMENT: WINGTECH-SH Date: 5 Size V10 D RF_SH 4 3 2 Monday, April 08, 2019 1 DESIGNER: Sheet LIUFENGLEI 28 of 53 5 4 3 2 1 D D C C J4801 [11] HP_EINT [51] FM_ANT_P [51] FM_ANT_N [11,19] AU_MICBIAS0 [19] AU_VIN0_P_CONN [19] AU_VIN0_N_CONN [20] AU_VIN1_P_MIC [20] AU_VIN1_N_MIC [20] AU_HPL_IN [20] AU_HPR_IN [11] AU_REFN [11] AVSS28_AUD [18,29] SPKR_OUT_P [18,29] SPKR_OUT_N C4801 C4802 C4803 C4804 C4805 C4806 C0201_NC C0201_NC C0201_NC C0201_NC C0201_NC C0201_NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 31 32 GND4PIN 33 34 LTE_VFE28 [38,41,43,44,46] BPI_BUS0 [4] BPI_BUS9 [4] BPI_BUS1 [4] ANT_SAR_CS1 [35] ANT_SAR_CS0_REF [35] USB_ID [17,28] USB_DP_1 USB_DM_1 [17,28] [17,28] VIBR_PMU [9] VIBR_GND [29] SPKR_OUT_P [18,29] SPKR_OUT_N [18,29] WP27D-S030VA3 [13,28] VBUS_USB_IN_CON [29] VIBR_GND R4803 0;0.5A;0201 B B A A Title 48_Sub PCB IF DOCUMENT NO.: Design Name DEPARTMENT: WINGTECH-SH Date: 5 4 3 2 Monday, April 08, 2019 1 REV: V10 Size DESIGNER: Sheet D LIUFENGLEI 29 of 53 5 4 3 2 1 D D C C B B A A Title <Title> Size A1 Date: Document Number <Doc> Monday, April 08, 2019 Rev 1.0 Sheet 31 of 53 5 4 3 2 1 MT6177MV/A MT6177MV/B K2 C3 D3 F3 G3 H3 C4 D4 E4 F4 H4 C5 D5 E5 F5 G5 H5 C6 D6 E6 F6 G6 H6 C7 D7 E7 F7 G7 H7 J7 C8 D8 E8 F8 G8 H8 J8 B9 C9 D9 E9 F9 G9 H9 J9 E10 G10 H10 K10 L10 E11 F11 G11 H11 J11 K11 E12 G12 D RF_B40B41_PRX_RFIC [38] RF_B5_PRX_RFIC [38] RF_B8_PRX_RFIC [38] RF_B20_PRX_RFIC [39] RF_B1_PRX_RFIC [39] RF_B3_PRX_RFIC [39] RF_B7_PRX_RFIC [39] RF_B4_PRX_RFIC [39] RF_B2_PRX_RFIC [38] RF_B28_PRX_RFIC [46] RF_B20_DRX_RFIC [46] RF_B28_DRX_RFIC [47] RF_B7_DRX_RFIC [46] RF_B2_DRX_RFIC [46] RF_B5_DRX_RFIC [46] RF_B3_DRX_RFIC [47] RF_B38/41_DRX_RFIC [46] RF_B1/4_DRX_RFIC [46] RF_B8_DRX_RFIC [47] RF_B40_DRX_RFIC [41] RF_LTE_HB_TX_RFIC [41] RF_LTE_MB_TX_RFIC [36] RF_2G_HB_TX_RFIC [36] RF_2G_LB_TX_RFIC [41] RF_LTE_LB_TX_RFIC RF_B40B41_PRX_RFIC RF_B5_PRX_RFIC B8 A8 RF_B8_PRX_RFIC B7 RF_B20_PRX_RFIC A7 RF_B1_PRX_RFIC B6 RF_B3_PRX_RFIC A5 RF_B7_PRX_RFIC B5 RF_B4_PRX_RFIC A4 RF_B2_PRX_RFIC B4 RF_B28_PRX_RFIC B3 RF_B20_DRX_RFIC A2 RF_B28_DRX_RFIC RF_B7_DRX_RFIC A1 B2 RF_B2_DRX_RFIC B1 RF_B5_DRX_RFIC C2 RF_B3_DRX_RFIC D1 RF_B38/41_DRX_RFIC D2 RF_B1/4_DRX_RFIC E1 RF_B8_DRX_RFIC E2 RF_B40_DRX_RFIC F2 GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 GND9 GND10 GND11 GND12 GND13 GND14 GND15 GND16 GND17 GND18 GND19 GND20 GND21 GND22 GND23 GND24 GND25 GND26 GND27 GND28 GND29 GND30 GND31 GND32 GND33 GND34 GND35 GND36 GND37 GND38 GND39 GND40 GND41 GND42 GND43 GND44 GND45 GND46 GND47 GND48 GND49 GND50 GND51 GND52 GND53 GND54 GND55 GND56 GND57 GND58 [41] PRX1 PRX2 VDD_TXHF PRX3 VDD_STXLV PRX5 PRX VDD_STXHF PRX6 VDD_RXLV PRX8 VDD_RXHF DRX2 BSI_D2 BSI_D1 DRX3 DRX5 BSI_D0 BSI DRX4 BSI_CLK DRX BSI_EN DRX8 TXDET1 DRX10 TXO1 J2 J1 RFIC0_BSI_D1 H2 RFIC0_BSI_D0 K1 RFIC0_BSI_CK H1 RFIC0_BSI_EN RFIC0_BSI_D1 [4] RFIC0_BSI_D0 [4] RFIC0_BSI_CK [4] RFIC0_BSI_EN [4] The linear detection range is 0~-39dBm, coupling factor is 22~27dB. 3dB Attenuator R5822 15;5%;0201 L7 RF_TXDET EN_BB VIO SRCLKENA1 SRCLKENA1 [36] R5820 300;5%;0201 C [4,10] VIO18_RFIC [32] PMIC_CLK_CELL STX_MON DET_QN DET_QP DET_IN L2 PMIC_CLK_RF [10] C5845 0.1uF;20%;6.3V;0201 F10 K8 DET_IP L9 K9 K7 TX_BBQN TX_BBIN TX_BBIP TX_BBQP K12 J12 L12 H12 L1 DET(I/Q) XO_IN RX1_BBQN RX1_BBQP RX1_BBIN RX1_BBIP K5 TX(I/Q) J5 RX2_BBQN L5 RX2_BBIP RX2_BBIN J4 L4 TX_GND5 PRX(I/Q) K4 J3 TX_GND4 TXO4(2G) RX2_BBQP DRX(I/Q) J6 TXO3(2G) TXO TXO5 G1 G4 R5821 300;5%;0201 R5819 2K;1%;0201 XO TXO2 D11 C11 [32] C5848 0.1uF;20%;6.3V;0201 [32] C5847 0.1uF;20%;6.3V;0201 DRX9 TX_GND3 A10 RF_LTE_LB_TX_RFIC VRF18_RFIC DRX7 B10 RF_2G_LB_TX_RFIC VRF12_RFIC G2 [32] C5850 0.1uF;20%;6.3V;0201 DRX6 TX_GND2 A12 [32] [32] C5849 0.1uF;20%;6.3V;0201 C5846 0.1uF;20%;6.3V;0201 MT6177M DRX1 TX_GND1 RF_2G_HB_TX_RFIC VRF18_RFIC E3 SWLB B12 C12 VRF12_RFIC J10 SWHB D10 D12 RF_LTE_MB_TX_RFIC VRF18_RFIC L11 PRX7 C10 RF_LTE_HB_TX_RFIC F12 PRX4 RCAL C D U5801 MT6177MV/A For phone, remove 0R to avoid low slew rate. For EVB, put test point. LTE_DET_BB0_QN [4] [4] [4] Put LC filter (default L=0R, C=NC) close to PMIC output due to harmonic rejection. [4] LTE_DET_BB0_QN LTE_DET_BB0_IN LTE_DET_BB0_QP LTE_DET_BB0_IP LTE_DET_BB0_IP [4] LTE_DET_BB0_IN [4] LTE_DET_BB0_QP [4] LTE_TX_BB0_QP LTE_TX_BB0_IN LTE_TX_BB0_QN [4] LTE_TX_BB0_QN [4] LTE_TX_BB0_IP [4] LTE_TX_BB0_IN [4] LTE_TX_BB0_QP [4] LTE_TX_BB0_IP LTE_PRX_BB0_QN LTE_PRX_BB0_QP LTE_PRX_BB0_IN LTE_PRX_BB0_IP [4] LTE_PRX_BB0_IN [4] LTE_PRX_BB0_QP LTE_PRX_BB0_QN LTE_PRX_BB0_IP [4] [4] LTE_DRX_BB0_QP LTE_DRX_BB0_IN LTE_DRX_BB0_QN LTE_DRX_BB0_QN LTE_DRX_BB0_IP LTE_DRX_BB0_IN LTE_DRX_BB0_QP LTE_DRX_BB0_IP No Connection, for PN test B B Power domain of MT6177M SH5803 [32] VIO18_PMU VIO18_RFIC [3,4,5,7,9,11,16,17,21,24,25,26,28,35,41] SH5804 [32] VRF18_RFIC VRF18_PMU [9] VRF12_PMU [9] C5851 4.7uF;20%;6.3V;0402 SH5805 [32] VRF12_RFIC C5852 4.7uF;20%;6.3V;0402 4.7uF close to RFIC for better Ripple Performance A A Title REV: Page Name = 58_Transceiver-1 DOCUMENT NO.: Size D Design Name = S96116-1-13_MB_20190409-1317 DEPARTMENT: DEPARTMENT = W INGTECH-SZDESIGNER: Date: 5 4 3 2 Page Modify Date = Monday, April 08, 2019 Sheet 1 V10 DESIGNER = LIUFENGLEI 32 of 53 5 4 3 2 1 D D C C B B A A Title Reserved DOCUMENT NO.: Design Name DEPARTMENT: WINGTECH-SH Date: Monday, April 08, 2019 REV: V10 Size DESIGNER: Sheet A1 LIUFENGLEI 33 of 53 5 4 3 2 1 D D C C B B A A Title Reserved DOCUMENT NO.: Design Name DEPARTMENT: WINGTECH-SH Date: Monday, April 08, 2019 REV: V10 Size DESIGNER: Sheet A1 LIUFENGLEI 34 of 53 5 4 3 2 1 D D 818011998 MM8030-2610RK0 3.2.08.0113 J6101 33pf;30%;50V;0201 0;0.5A;0201 C6133 OUT IN C6146 RF_Ant_TRX_carkit 1 RF_Ant_TRX_DPDT GND1 GND2 2 [36] 33pf;30%;50V;0201 33pf;30%;50V;0201 3 4 3.2.08.0113 J6102 818011998 C6130 2 3 4 1 GND1 GND2 GND3 R6103 I/O L6132 NF_82nH;3%;0201 L6130 82nH;3%;0201 R6126 10K;5%;0201 BPI_BUS10 R6127 100K;5%;0201 C6131 [4] R6125 1M;5%;0201 100pF;30%;50V;0201 L6131 VIO18_PMU 68nH;5%;0201 [3,4,5,7,9,11,16,17,21,24,25,26,28,32,35,41] 参考summer C6132 100pF;30%;50V;0201 C C 选用:A96T346 VDD2V8_SAR [25] 待确认 R6188 R6144 0;0.5A;0201 R0201_NC 选用:SX9324 VIO18_PMU [3,4,5,7,9,11,16,17,21,24,25,26,28,32,35,41] ABOV: 560R B B 0.1uF;20%;6.3V;0201 A96T346HW [29] ANT_SAR_CS0_REF R6177 [29] C6141 U6102 560;5%;0201 ANT_SAR_CS1 R6176 560;5%;0201 VDD A3 B4 B3 A2 C6142 1.0UF;20%;6.3V;0201 R6145 2.2K;5%;0201 CS0 CS1 CS2 都要求上拉1.8V R6161 SCL3 A4 GND SCL SDA NIRQ A1 B1 B2 [5,21] 0;0.5A;0201 R6162 A96T346HW SDA3 [5,21] 0;0.5A;0201 SAR_EINT_N C6143 C6144 [5] C6145 NF_100pF;30%;50V;0201 NF_100pF;30%;50V;0201 NF_100pF;30%;50V;0201 A A Title REV: V10 DOCUMENT NO.:Design Name = S96116-1-13_MB_20190409-1317 Size DEPARTMENT: Date: 5 4 3 2 DEPARTMENT = W INGTECH-SZDESIGNER: Page Modify Date = Monday, April 08, 2019 Sheet 1 D DESIGNER = LIUFENGLEI 35 of 53 5 4 3 2 1 D D [32] RF_TXDET1 RF_TXDET close to TXM [8,9,10,13,15,17,18,21,22,23,24,25,28,41] 1000pF;20%;50V;0201 C6222 C6205 C6210 10uF;20%;6.3V;0402 NC C6207 100pF;30%;50V;0201 RF_Ant_TRX_ASM [35] 22 RF_Ant_TRX_DPDT 38 23 21 20 18 16 15 14 13 12 11 VBAT ANT VCC VRAMP L6201 NF_1.2nH;0.1nH;0201 VIO 29 RF_B7_TRX_TXM 30 TRX11 TX_HB_IN TRX10 TX_LB_IN TRX9 [38] RF_B8_TRX_TXM [38] RF_B20_TRX_TXM [38] RF_B5_TRX_TXM [41] RF_B40_TRX_TXM B [41] RF_B1_TRX_TXM RF_B1_TRX_TXM RF_B38/41_TRX_TXM APC1 C [4] Reserved Shunt C for MIPI C-load Tuning Control the Total Capacitance to 25pF+-3pF 9 8 7 C6211 LTE_VMIPI [41] R62040;0.5A;0201 MIPI1_SDATA 6 5 R6205 0;0.5A;0201 1000pF;20%;50V;0201 MIPI1_SDATA MIPI1_SCLK MIPI1_SCLK [4] [4] 4 3 C6212 C0201_NC RF_MB2_TX_TXM C6213 C0201_NC 2 1 TRX8 31 [39] GND 10 L6225 RF_LB1_TX_TXM 28 RF_B3_TRX_TXM APC1 6.98k;1%;0201 C6209 220pF;20%;50V;0201 GNDP GNDP GNDP GNDP GNDP GNDP GNDP GNDP GNDP RF_B4_TRX_TXM TRX7 RF_B7_TRX_TXM TRX1 RF_B3_TRX_TXM VRAMP_1 39 40 41 42 43 44 45 46 47 RF_B4_TRX_TXM [39] GND1 TRX2 [39] SCLK TRX12 37 [39] SDATA TRX13 36 27 TRX14 TRX3 26 TRX4 25 RF_B2_TRX_TXM TRX5 24 RF_B28B_TRX_TXM 35 RF_B28A_TRX_TXM TRX6 RF_B28B_TRX_TXM RF_B2_TRX_TXM 34 RF_B28A_TRX_TXM [38] 33 [38] [39] 32 L6203 NF_1.2nH;0.1nH;0201 Reserved RC filter layout, in default 0 ohm is used R6202 U6201 VC7916-53 GND12 GND11 GND10 GND9 GND8 GND7 GND6 GND5 GND4 GND3 GND2 19 AP6716M-71 待更新 CPL TO_HMLB_Primary-ANT C 17 1 1000pF;20%;50V;0201 TVS6201 PESDHC2FD4V5BH N1 N2 2 VBAT 100pF;30%;50V;0201 C6221 C6204 22pF;30%;50V;0201 RF_B8_TRX_TXM C6214 MT6177 33pf;30%;50V;0201 4.3NH;3%;0201 C6227 C6228 1.8pF;0.05pF;50V;0201 1.8pF;0.05pF;50V;0201 TX Ouput need a DC block RF_2G_HB_TX_RFIC RF_2G_HB_TX_RFIC [32] 2G_PAIN_HB RF_B20_TRX_TXM RF_B5_TRX_TXM L6220 RF_B40_TRX_TXM C6216 33pf;30%;50V;0201 RF_2G_LB_TX_RFIC RF_2G_LB_TX_RFIC [32] 2G_PAIN_LB 9.1NH;3%;0201 B RF_B38/41_TRX_TXM C6225 C6226 3.3pF;0.25pF;50V;0201 3.3pF;0.25pF;50V;0201 High pass filter for G8 Tx in G7 Rx band noise rejection A A Title Size D Design Name = S96116-1-13_MB_20190409-1317 DEPARTMENT: DEPARTMENT = W INGTECH-SZDESIGNER: Date: 5 4 3 2 REV: V10 Page Name = 62_Primary_ASM DOCUMENT NO.: Page Modify Date = Monday, April 08, 2019 Sheet 1 DESIGNER = LIUFENGLEI 36 of 53 5 4 3 2 1 D D C C B B A A Title <Title> Size A1 Date: Document Number <Doc> Monday, April 08, 2019 Rev 1.0 Sheet 37 of 53 4 3 2 R6401 RF_B5_TRX_TXM RF_B5_TRX_DPX SAYEY836MBA0F0A ANT TX GND1 GND2 GND3 GND4 GND5 RX 6 EN RF_B5_PRX_LNA_IN 5 RFIN 3.3NH;0.1nH;0201 4 GND2 1000pF;20%;50V;0201 C6481 RF_B5_PRX_RF_IN 1 2 4 5 7 8 L6402 NF_12NH;3%;0201 3 L6499 GND1 VDD [29,38,41,43,44,46] SAFFB881MAN0F0A SFH881AA002 RFOUT C6462 100pF;30%;50V;0201 1 SAFFB881MAN0F0A U6405 2 R6498 L6404 RF_B5_PRX_LNA_OUT 3 RF_B5_PRX_SAW_IN 1 UNBL1 0;0.5A;0201 U6415 L6490 NF_4.3nH;0.1nH;0201 D LTE_VFE28 MXD8015LC 100pF;30%;50V;0201 6 4.3NH;3%;0201 L6403 NF_15NH;3%;0201 MXD8921L 带建库 C6463 2 L6498 NF_4.3nH;0.1nH;0201 UNBL2 RF_B5_PRX_DPX_RFIP1 4 RF_B5_PRX_RFIC 2.4NH;0.1nH;0201 GND3 L6401 RF_B5_TRX_TXM NF_0;0.5A;0201 BPI_BUS8 GND2 SAYEY836MBA0F0A SFX836EYJ02 GND1 [4] FL6405 [36] R6402 NF_0;0.5A;0201 RF_B5_PA_DPX 1 L6405 NF_1.2nH;0.1nH;0201 5 [41] 3 5 RF_B5_PRX_RFIC [32] C6401 33pf;30%;50V;0201 L6406 1.2nH;0.1nH;0201 D B5 PRX R6496 [41] D5DA942M5K2G6 SFX897EYT02 R6497 NF_0;0.5A;0201 RF_B8_PA_DPX [4] FL6408 NF_0;0.5A;0201 MXD8921L 带建库 BPI_BUS13 D5DA942M5K2G6 100pF;30%;50V;0201 C6453 MXD8015LC C6402 [36] RF_B8_TRX_TXM RF_B8_TRX_TXM RF_B8_TRX_DPX 6 L6407 NF_8.2NH;3%;0201 C6482 1 RX 6 L6477 RF_B8_PRX_RF_IN RF_B8_PRX_LNA_IN 5 3.3NH;0.1nH;0201 1000pF;20%;50V;0201 4 L6496 NF_4.3nH;0.1nH;0201 2 4 5 7 8 L6408 NF_6.8NH;3%;0201 3 TX GND1 GND2 GND3 GND4 GND5 18pF;10%;50V;0201 ANT EN GND1 RFIN VDD GND2 RFOUT 1 2 LTE_VFE28 3 [29,38,41,43,44,46] SFH942AA002 SAFFB942MAN0F0A C6452 100pF;30%;50V;0201 U6418 U6408 SFH942AA002 B8 PRX UNBL2 GND1 L6495 NF_4.3nH;0.1nH;0201 2 C UNBL1 4 RF_B8_PRX_DPX_RFIP1 C6450 C6471 5.6pF;0.25pF;50V;0201 33pf;30%;50V;0201 RF_B8_PRX_RFIC GND3 1 C6475 NF_2.4pF;0.25pF;25V;0201 5 RF_B8_PRX_SAW_IN 0;0.5A;0201 3 RF_B8_PRX_LNA_OUT GND2 R6495 RF_B8_PRX_RFIC [32] L6472 8.2NH;3%;0201 C R6420 [41] RF_B20_PA_DPX R0201_NC B20：SAYEY806MBC0F0A B39851B8622P810 U6420 L6421 NF_4.3NH;3%;0201 RFLPF10050G9DM1T76 R6421 RF_B20_PRX_SAW_IN 1 C6473 RF_B20_PRX_LPF_IN 6 0;0.5A;0201 EMEA: B20 LATAM/APAC: B28A INPUT L6424 NF_2.7NH;0.1nH;0201 OUTPUT GND1 GND2 RX 3 NC1 NC2 TX 2 5 ANT GND1 GND2 GND3 GND4 GND5 L6420 NF_6.8NH;3%;0201 RFLPF10050G9DM1T76 SAYEY806MBC0F0A 6 1 3 C6472 33pf;30%;50V;0201 RF_B20_TRX_DPX RF_B20_TRX_TXM RF_B20_TRX_TXM 2 4 5 7 8 [36] FL6420 4 C6474 RF_B20_PRX_DPX_RFIP1 RF_B20_PRX_RFIC RF_B20_PRX_RFIC [32] 3.6NH;0.1nH;0201 18pF;10%;50V;0201 EMEA: LPF LATAM/APAC: 0R L6422 NF_6.8NH;3%;0201 L6423 6.8NH;3%;0201 B12/17/20 PRX [41] B RF_B28B_PA_DPX B28B：SAYEY733MBC0F0A B39791B8539P810 B FL6428 SAYEY733MBC0F0A [36] RF_B28B_TRX_TXM RF_B28B_TRX_TXM RF_B28B_TRX_DPX 6 ANT L6410 NF_6.8NH;3%;0201 TX RX 3 1 C6480 33pf;30%;50V;0201 L6433 NF_6.2NH;3%;0201 2 4 5 7 8 L6411 NF_6.8NH;3%;0201 GND1 GND2 GND3 GND4 GND5 C6407 33pf;30%;50V;0201 BPI_BUS2 C6477 B28B PRX U6401 1 2 3 [41] [4] 100pF;30%;50V;0201 SPDT:代招标 RF_B28A_PA_DPX RF2 V1 GND ANT RF1 VDD 6 RF_B28_PRX_RFIC 5 4 RF_B28A_TRX_TXM SAYEY718MBC0F0A L6430 NF_6.8NH;3%;0201 ANT GND1 GND2 GND3 GND4 GND5 C6478 33pf;30%;50V;0201 L6431 NF_6.8NH;3%;0201 TX RX LTE_VFE28 3 [29,38,41,43,44,46] C6476 100pF;30%;50V;0201 1 2 4 5 7 8 [36] RF_B28A_TRX_DPX 6 A [32] L6413 NF_6.8NH;3%;0201 FL6429 B28A：SAYEY718MBC0F0A B39771B8538P810 RF_B28A_TRX_TXM RF_B28_PRX_RFIC C6408 C6410 1.8pF;0.05pF;50V;0201 33pf;30%;50V;0201 L6412 6.2NH;3%;0201 MXD8621C A C6479 1.8pF;0.05pF;50V;0201 L6432 NF_6.8NH;3%;0201 B28A PRX Title Page Name = 64_TRX_LB DOCUMENT NO.: Size D Design Name = S96116-1-13_MB_20190409-1317 DEPARTMENT: DEPARTMENT = W INGTECH-SZDESIGNER: Date: 5 4 3 2 Page Modify Date = Monday, April 08, 2019 Sheet 1 REV: V10 DESIGNER = LIUFENGLEI 38 of 53 5 4 3 2 [41] [41] RF_B4_PA_DPX RF_B1_PA_DPX SAYRH1G95BA0F0AR00 二供EPCOS新料，待确认 SFXG33PY702 要建SCH/PCB库 SAYEY1G73BA0F0A FL6501 RF_B1_TRX_TXM C6518 33pf;30%;50V;0201 RF_B1_TRX_DPX SAYEY1G73BA0F0A 6 ANT L6521 NF_10NH;3%;0201 1 RX RF_B1_PRX_DPX_RFIP1 C6519 33pf;30%;50V;0201 C6520 RF_B1_PRX_RFIC RF_B1_PRX_RFIC [36] [32] RF_B4_TRX_TXM RF_B4_TRX_TXM C6523 33pf;30%;50V;0201 RF_B4_TRX_DPX 6 L6523 2.7NH;0.1nH;0201 L6543 NF_4.3nH;0.1nH;0201 L6544 NF_10NH;3%;0201 B1 PRX [41] C6501 3.0pF;0.25pF;25V;0201 RF_B2_PRX_LPF L6501 NF_6.2NH;3%;0201 C6525 RF_B4_PRX_RFIC RF_B4_PRX_RFIC [32] 18pF;10%;50V;0201 L6541 NF_4.3nH;0.1nH;0201 L6542 2.7NH;0.1nH;0201 FL6502 SAYEY1G88BA0B0A 6 ANT GND1 GND2 GND3 GND4 GND5 RF_B2_TRX_TXM RF_B2_TRX_TXM C6524 33pf;30%;50V;0201 RF_B4_PRX_DPX_RFIP1 1 B4 PRX L6502 NF_4.3nH;0.1nH;0201 [41] 3 TX RF_B2_PRX_LPF_RFIP1 1 RX 2 4 5 7 8 [36] 3 TX RX RF_B2_PA_DPX SAYEY1G88BA0B0A D6DA1G960K2B2 C ANT 18pF;10%;50V;0201 L6522 NF_4.3nH;0.1nH;0201 2 4 5 7 8 L6520 NF_4.3nH;0.1nH;0201 3 TX GND1 GND2 GND3 GND4 GND5 RF_B1_TRX_TXM GND1 GND2 GND3 GND4 GND5 [36] D FL6504 SAYRH1G95BA0F0AR00 2 4 5 7 8 D 1 EMEA/LATAM C6502 3.3pF;0.25pF;50V;0201 L6503 NF_2.2NH;0.1nH;0201 C6503 33pf;30%;50V;0201 RF_B2_PRX_RFIC RF_B7_PA_DPX C RF_B2_PRX_RFIC [32] L6504 2.0NH;0.1nH;0201 D6HQ2G655DP02 SAYEY2G53BA0F0A FL6507 D6HQ2G655DP02 L6509 [36] RF_B7_TRX_TXM RF_B7_TRX_TXM RF_B7_TRX_DPX 6 ANT TX L6511 NF_3.3NH;0.1nH;0201 RX 2 4 5 7 8 B2 PRX L6510 NF_4.3nH;0.1nH;0201 GND1 GND2 GND3 GND4 GND5 0.6nH;0.1nH;0201 3 1 RF_B7_PRX_DPX_RFIP1 C6509 3.3pF;0.25pF;50V;0201 L6540 NF_4.3nH;0.1nH;0201 RF_B7_PRX_RFIC RF_B7_PRX_RFIC [32] C6510 L6513 8.2pF;0.25pF;50V;0201 2.0NH;0.1nH;0201 B7 PRX [41] RF_B3_PA_DPX B B B39182B1239P810 SAYEY1G74BC0B0A FL6503 B1239 L6526 [36] RF_B3_TRX_TXM RF_B3_TRX_TXM RF_B3_TRX_DPX 6 ANT TX RX 3 RF_B3_PRX_DPX_RFIP1 1 2 4 5 7 8 L6528 NF_4.3nH;0.1nH;0201 GND1 GND2 GND3 GND4 GND5 1.0NH;0.1nH;0201 L6527 NF_4.3nH;0.1nH;0201 C6521 2.7pF;0.25pF;50V;0201 L6524 NF_2.7NH;0.1nH;0201 C6522 22pF;30%;50V;0201 RF_B3_PRX_RFIC RF_B3_PRX_RFIC [32] L6525 1.8NH;0.1nH;0201 B3 PRX A A Title 4 3 2 REV: V10 Size D Design Name = S96116-1-13_MB_20190409-1317 DEPARTMENT: DEPARTMENT = W INGTECH-SZDESIGNER: Date: 5 Page Name = 65_TRX_MHB DOCUMENT NO.: Page Modify Date = Monday, April 08, 2019 Sheet 1 DESIGNER = LIUFENGLEI 39 of 53 5 4 3 2 1 D D C C B B A A Title <Title> Size A1 Date: Document Number <Doc> Monday, April 08, 2019 Rev 1.0 Sheet 40 of 53 5 4 3 2 1 B28B TX R6797 RF_B28B_PA_PA RF_B28B_PA_DPX [38] 0;0.5A;0201 [3,4,5,7,9,11,16,17,21,24,25,26,28,32,35,41] C6782 NF_2.4pF;0.25pF;25V;0201 B2 TX R6783 390K;1%;0201 C6706 12pF;10%;50V;0201 L6710 NF_7.5NH;3%;0201 VIO18_PMU L6709 NF_4.3nH;0.1nH;0201 C6781 RF_B2_PA_PA [39] RF_B2_PA_DPX B28A TX 12pF;10%;50V;0201 AUX_IN1_NTC [4] D L6707 NF_4.3nH;0.1nH;0201 AUX_IN1_NTC L6708 NF_7.5NH;3%;0201 R6798 RF_B28A_PA_PA RF_B28A_PA_DPX D [38] 0;0.5A;0201 RT6701 100K;1%;0201 L6740 NF_7.5NH;3%;0201 C6784 NF_2.4pF;0.25pF;25V;0201 C6783 12pF;10%;50V;0201 GND B1 TX L6741 NF_4.3nH;0.1nH;0201 R6707 RF_B1_PA_PA [39] B8 TX RF_B1_PA_DPX C6704 0;0.5A;0201 Thermistor to sense RF PA temperature L6716 NF_2.0NH;0.1nH;0201 RF_B8_PA_PA L6717 NF_4.3nH;0.1nH;0201 RF_B8_PA_DPX [38] 12pF;10%;50V;0201 L6706 L6705 NF_7.5NH;3%;0201 NF_4.3nH;0.1nH;0201 1. RT603 must close to LTE Band 7 PA or the hottest PA <2mm. 2. The distance is the shortest distance from package edge to edge. R6771 B5 TX R6702 RF_B5_PA_PA RF_B5_PA_DPX 0;0.5A;0201 Power Net Connection B3 TX [39] C6771 NF_2.4pF;0.25pF;25V;0201 R6709 B20 TX L6720 NF_4.3nH;0.1nH;0201 R6781 LTE_VMIPI VIO18_PMU [3,4,5,7,9,11,16,17,21,24,25,26,28,32,35,41] C6707 R6705 RF_B20_PA_DPX RF_B20_PA_PA SH6713 [36,41] C6702 C6701 NF_2.4pF;0.25pF;25V;0201NF_2.4pF;0.25pF;25V;0201 RF_B3_PA_PA RF_B3_PA_DPX L67190;0.5A;0201 NF_2.0NH;0.1nH;0201 C [38] 0;0.5A;0201 [38] 0;0.5A;0201 0;0.5A;0201 L6714 NF_4.3nH;0.1nH;0201 C NF_2.0NH;0.1nH;0201 L6713 C6773 NF_2.4pF;0.25pF;25V;0201 1.0UF;20%;6.3V;0201 V28 to FEM 4G PA input need LPF for harmonic rejection SH6714 [9] L6715 RF_B4_PA_PA 23 24 25 26 27 28 VPA_VCC2 29 C6716 1.0UF;20%;6.3V;0201 C6717 100pF;30%;50V;0201 30 SH6701 10mil 31 VPA_VCC1 32 VPA_VCC1 60mil 33 60mil 60milSH6702 VPA_VCC2 VPA_PMU C6725 1.0UF;20%;6.3V;0201 C6726 100pF;30%;50V;0201 34 35 36 N2 VPA_VCC2 37 38 39 F6FC2G595H4PD 1 16 17 RFIN_M MB4 NC3 GND7 NC2 VCC2_2 NC1 VCC1 VBATT VCC2 VIO GND8 SCLK MB5 SDATA HB1 GND3 GND9 RFIN_H HB2 GND2 GND10 GND1 HB3 GND11 HB4 GND_P14 GND_P13 GND_P12 40 41 42 GND1 UNBL1 GND2 GND3 L6736 NF_1.8nH;0.1nH;0201 5 L6730 NF_2.7NH;0.1nH;0201 UNBL2 18 MB3 14 13 L6718 RF_MB1_TX_PA 12 10 L6725 NF_1.8nH;0.1nH;0201 1 VBAT C6721 1000pF;20%;50V;0201 6 100pF;30%;50V;0201 C6718 C6719 0.1uF;20%;6.3V;0201 R6712 5 0;0.5A;0201 4 3 C6720 2 C6722 C0201_NC C0201_NC 1 MIPI0_SCLK [4] MIPI0_SDATA [4] Reserved Shunt C for MIPI C-load Tuning Control the Total Capacitance to 25pF+-3pF B 56 55 54 3/4G_PAIN_HB C6728 8.2pF;0.25pF;50V;0201 RF_LTE_HB_TX_RFIC RF_LTE_HB_TX_RFIC [32] LPF for more margin on Tx spurious [4] C6748 100pF;30%;50V;0201 RF_B40_TRX_PA 2.4pF;0.25pF;25V;0201 L6726 NF_1.8nH;0.1nH;0201 MXD8015HC L6727 NF_2.2NH;0.1nH;0201 6 EN RF_B40B41_PRX_LNA_IN 5 RFIN 3.3NH;0.1nH;0201 4 GND2 L6728 C6740 GND1 VDD RFOUT LTE_VFE28 1 2 [29,38,41,43,44,46] C6746 100pF;30%;50V;0201 3 U6704 RF_B40B41_PRX_LNA_OUT MXD8015HC RTC8606M C6742 C6761 33pf;30%;50V;0201 1.8pF;0.05pF;50V;0201 C6762 33pf;30%;50V;0201 RF_B40B41_PRX_RFIC [32] A C6760 C6759 NF_2.4pF;0.25pF;25V;0201 NF_2.4pF;0.25pF;25V;0201 C6749 RF_B7_PA_PA RF_B7_PA_DPX B38/40/41 PRX 1.8pF;0.05pF;50V;0201 L6734 NF_1.8nH;0.1nH;0201 L6735 NF_1.8NH;0.1nH;0201 Title REV: Page Name = 67_RF_MMPA-1 DOCUMENT NO.: Size D Design Name = S96116-1-13_MB_20190409-1317 DEPARTMENT: DEPARTMENT = W INGTECH-SZDESIGNER: Date: 5 10;5%;0201 TVS6704 PESDHC2FD4V5BH C6730 C6731 1.0pF;0.05pF;50V;02011.0pF;0.05pF;50V;0201 C0201_NC [39] [36,41] RF_B38/41_TRX_PA A B7 TX LTE_VMIPI 3.3NH;0.1nH;0201 RF_B40_PA_SAW_IN GND1 UNBL1 GND2 UNBL2 GND3 0;0.5A;0201 L6724 NF_1.8NH;0.1nH;0201 [8,9,10,13,15,17,18,21,22,23,24,25,28,36,41] R6796 7 C6736 2 0;0.5A;0201 L6723 NF_1.8nH;0.1nH;0201 3 RF_B40_PA_SAW_OUT 4 RF_B40_TRX_TXM 5 [36] [32] 8 1.8pF;0.05pF;50V;0201 L6733 L6737 NF_1.8NH;0.1nH;0201 NF_1.8nH;0.1nH;0201 U6740 885075 R6718 3/4G_PAIN_MB RF_LTE_MB_TX_RFIC U6701 C6745 27pF;10%;50V;0201 885075 R6717 C6712 33pf;30%;50V;0201 C6713 C6714 1.8pF;0.05pF;50V;0201 1.8pF;0.05pF;50V;0201 9 BPI_BUS12 B40 TRX RF_MB1_TX_1 4.3NH;3%;0201 11 L6721 C6744 RF_B38/41_PA_SAW_IN 2 0;0.5A;0201 3 RF_B38/41_PA_SAW_OUT 4 RF_B38/41_TRX_TXM [32] 15 U6741 R6720 [36] LB4 RFIN_L1 F6FC2G595H4PD B39262B8870L210 B38/41(120M)TRX 19 RFIN_L2 GND6 1 Note: Refer to design notice Note: Reserve at least one tuning cap. For PMIC VPA total cap requirement, the total cap at RF side should be in 6.2uF +7/-5%. GND4 MB2 GND12 TRX1 TRX2 N1 TVS6710 NF_PESD3V3V1BCSF C6729 1.0UF;20%;6.3V;0201 4.7uF;20%;6.3V;0402 C6727 C6724 100pF;30%;50V;0201 [8] 2 B C6723 1.0UF;20%;6.3V;0201 GND5 2 80mil [8,9,10,13,15,17,18,21,22,23,24,25,28,36,41] C6715 4.7uF;20%;6.3V;0402 From PMIC RF_LTE_LB_TX_RFIC C6709 C6710 3.3pF;0.25pF;50V;0201 3.3pF;0.25pF;50V;0201 AP7219M-71 N2 VBAT 80mil LB3 22 VBAT VBAT 3/4G_PAIN_LB C6708 33pf;30%;50V;0201 N1 80mil L6738 NF_4.3nH;0.1nH;0201 MB1 VBAT to TXM 9,10,13,15,17,18,21,22,23,24,25,28,36,41] 21 0;0.5A;0201 20 AP7219M-71 L6739 NF_2.0NH;0.1nH;0201 RF_LB2_TX_1 9.1NH;3%;0201 RF_B4_PA_DPX LB2 [39] RF_LB2_TX_PA R6721 1 B4 TX LB1 8mil LB5 VFE28_PMU C6711 1.0UF;20%;6.3V;0201 GND_P1 GND_P2 GND_P3 GND_P4 GND_P5 GND_P6 GND_P7 GND_P8 GND_P9 GND_P10 GND_P11 LTE_VFE28 43 44 45 46 47 48 49 50 51 52 53 [29,38,41,43,44,46] 8mil 4 3 2 Page Modify Date = Monday, April 08, 2019 Sheet 1 V10 DESIGNER = LIUFENGLEI 41 of 53 5 4 3 2 1 D D C C B B A A Title <Title> Size A1 Date: Document Number <Doc> Monday, April 08, 2019 Rev 1.0 Sheet 42 of 53 5 4 3 2 1 D D J6902 4-00-45979 818011998 MM8030-2610RK0 1 R6901 J6901 818011998 R6910 2 4-00-45979 OUT 0;0.5A;0201 L6902 L0201_NC L6974 L0201_NC IN 1 RF_Ant_DRX_carkit [44] 3 4 0;0.5A;0201 L6901 L0201_NC GND1 GND2 2 C C J6904 4-00-45979 1 2 27pF;10%;50V;0201 C6906 ANT_DIV_1_50R B B L6951 NF_100nH;3%;0201 4-00-45979 R6911 R6960 MXD8544A 10 RF1_50R U6901 1 2 RF1 RF2 RF3 RF4 MXD8544A 5 6 3 9 8 NF_0;0.5A;0201 R6961 RF4_50R 7 NF_0;0.5A;0201 VDD V1 V2 V3 GND 4 NF_0;0.5A;0201 [4] RF3_50R ANT NF_0;0.5A;0201 R6908 RF2_50R LTE_VFE28 BPI_BUS3 C6990 100pF;30%;50V;0201 [4] BPI_BUS6 [4] BPI_BUS7 C6917 100pF;30%;50V;0201 [29,38,41,44,46] 参考summer R6962 A A 0;0.5A;0201 C6921 100pF;30%;50V;0201 C6922 100pF;30%;50V;0201 Title REV: V10 Page Name = 69_Diversity_ANT DOCUMENT NO.:Design Name = S96116-1-13_MB_20190409-1317 Size 5 4 3 2 D DEPARTMENT: DEPARTMENT = W INGTECH-SZ DESIGNER: DESIGNER = LIUFENGLEI Date:Page Modify Date = Monday, April 08, 2019 Sheet 1 43 of 53 5 4 3 2 1 D D RF_B20/28_DRX_ASM RF_B20/28_DRX_ASM [46] RF_B2_DRX_ASM RF_B2_DRX_ASM [46] RF_B7_DRX_ASM [47] RF_B5_DRX_ASM [46] RF_B7_DRX_ASM RF_B5_DRX_ASM 8 9 C MXD8680 NZ5708S,新料待确认 NC 10 U7001 MXD8680 V1 ANT V2 7 BPI_BUS4 6 [4] BPI_BUS11 [4] BPI_BUS14 [4] 4 1 RF3 RF1 3 RF5 GND L7002 NF_1.8nH;0.1nH;0201 VDD RF7 15 L7001 NF_1.8nH;0.1nH;0201 RF2 RF8 13 14 15pF;10%;50V;0201 2 RF_Ant_DRX_ASM RF_Ant_DRX_carkit RF4 12 C7007 [43] RF6 11 C V3 5 C7005 C7004 18pF;10%;50V;0201 C7006 18pF;10%;50V;0201 LTE_VFE28 18pF;10%;50V;0201 [29,38,41,43,46] VREG_2P7 C7001 0.01uF;20%;25V;0201 RF_B38/41_DRX_ASM RF_B38/41_DRX_ASM [47] RF_B1/3/4_DRX_ASM [46] RF_B1/3/4_DRX_ASM RF_B8_DRX_ASM RF_B8_DRX_ASM [46] RF_B40_DRX_ASM RF_B40_DRX_ASM [47] B B A A Title REV: Page Name = 70_Diversity ASM DOCUMENT NO.: Size D Design Name = S96116-1-13_MB_20190409-1317 DEPARTMENT: DEPARTMENT = W INGTECH-SZDESIGNER: Date: 5 4 3 2 Page Modify Date = Monday, April 08, 2019 Sheet 1 V10 DESIGNER = LIUFENGLEI 44 of 53 5 4 3 2 1 D D C C B B A A Title Reserved DOCUMENT NO.: Design Name DEPARTMENT: WINGTECH-SH Date: Monday, April 08, 2019 REV: V10 Size DESIGNER: Sheet A1 LIUFENGLEI 45 of 53 5 4 3 2 1 Band1/4 C7207 C7206 RF_B1/4_DRX_SAW_OUT RF_B1/4_DRX_RFIC RF_B1/4_DRX_RFIC [32] 10pF;10%;50V;0201 3.6pF;0.25pF;25V;0201 L7212 NF_1.8nH;0.1nH;0201 L7211 2.7NH;0.1nH;0201 SAWFD1G84AA0F0A SFWG42CBB02 U7201 SAFFB881MAN0F0A SFH881AA002 SAWFD1G84AA0F0A U7205 SAFFB881MAN0F0A D 3 4 5 RF_B3_DRX_RFIC C7209 NF_1.0pF;0.05pF;50V;0201 [32] D C7208 RF_B5_DRX_SAW_OUT 4 UNBL2 RF_B5_DRX_RFIC RF_B5_DRX_RFIC [32] 8.2NH;3%;0201 GND3 C7204 8.2pF;0.25pF;50V;0201 RF_B3_DRX_RFIC L7206 RF_B3_DRX_SAW_OUT 9 Unbalance Port-Lch 2 L7214 UNBL1 3.9NH;0.1nH;0201 GND2 Unbalance Port-Hch ?MHZ L7210 NF_3.9NH;0.1nH;0201 RF_B5_DRX_ASM GND1 Unbalance Port-Lch / Hch 1.2NH;0.1nH;0201 C7205 NF_0.5pF;0.1pF;50V;0201 [44] 6 15pF;10%;50V;0201 L7216 NF_15nH;3%;0201 5 1 1 2 RF_B1B3B4_DRX_SAW_IN RF_B1/3/4_DRX_ASM RF_B5_DRX_SAW_IN 3 Band3 L7209 [44] L7213 RF_B5_DRX_ASM L7217 15nH;3%;0201 1.8NH;0.1nH;0201 GND1 GND2 GND5 GND3 GND6 GND4 GND7 7 L7207 2.4NH;0.1nH;0201 L7208 NF_15NH;3%;0201 8 B5 DRX 10 B1/3/4 DRX SFH942AA002 SAFFB942MAN0F0A SFH942AA002 U7208 C7201 2 L7270 NF_2.7NH;0.1nH;0201 RF_B2_DRX_SAW_OUT RF_B2_DRX_RFIC RF_B2_DRX_RFIC C7202 RF_B8_DRX_SAW_OUT 4 RF_B8_DRX_RFIC RF_B8_DRX_RFIC C [32] 7.5NH;3%;0201 GND3 L7203 NF_1.8nH;0.1nH;0201 GND2 C7213 UNBL2 L7204 NF_1.8nH;0.1nH;0201 5 4 UNBL2 L7205 12NH;3%;0201 27pF;10%;50V;0201 [32] 10NH;3%;0201 GND3 GND2 UNBL1 GND1 1 L7226 NF_2.7NH;0.1nH;0201 5 RF_B2_DRX_SAW_IN 0;0.5A;0201 3 RF_B2_DRX_ASM L7220 2 R7260 RF_B2_DRX_ASM UNBL1 39pF;10%;50V;0201 U7202 SAFFB1G96AB0F0A [44] L7201 RF_B8_DRX_ASM 1 3 [44] RF_B8_DRX_SAW_IN GND1 SAFFB1G96AB0F0A SFHG60CA002 C L722733pf;30%;50V;0201 15NH;3%;0201 B8 DRX B2 DRX B28： SFH780AA402 SAFFB780MAA0F0A U7228 SFH780AA402 R7203 L7221 UNBL2 2 C7220 RF_B28_DRX_SAW_OUT 4 RF_B28_DRX_RFIC RF_B28_DRX_RFIC [32] 10NH;3%;0201 GND3 UNBL1 0;0.5A;0201 GND2 1 GND1 C7222 L7222 NF_12NH;3%;0201 B 33pf;30%;50V;0201 L7223 15nH;3%;0201 5 100pF;30%;50V;0201 B RF_B20/28_DRX_SAW_IN BPI_BUS5 3 [4] C7221 NF_100pF;30%;50V;0201 SPDT:代招标 U7204 6 R7202 [44] RF_B20/28_DRX_ASM RF_B20/28_DRX_ASM RF_B20/28_DRX_LPF_IN 5 4 0;0.5A;0201 V1 RF2 ANT GND VDD RF1 1 B28 DRX 2 3 MXD8621C R7294 C7225 100pF;30%;50V;0201 R0201_NC FL7220 RFLPF10050G9DM1T76 C7224 NF_100pF;30%;50V;0201 U7220 SAFFB806MAA0F0A L7281 RF_B20_DRX_SAW_IN 0;0.5A;0201 EMEA: LPF LATAM/APAC: 0R 1 UNBL1 UNBL2 C7261 NF_100pF;30%;50V;0201 4 C7278 RF_B20_DRX_SAW_OUT GND3 RF_B20_DRX_LPF_OUT GND2 4 GND1 OUTPUT RF_B20_DRX_RFIC RF_B20_DRX_RFIC [32] 10NH;3%;0201 L7250 NF_12NH;3%;0201 33pf;30%;50V;0201 L7282 15nH;3%;0201 5 INPUT 1 3 0;0.5A;0201 R7261 2 C7223 100pF;30%;50V;0201 NC1 NC2 6 LTE_VFE28 GND1 GND2 R7201 2 5 [29,38,41,43,44] B20： SAFFB806MAA0F0A SFH806BA002 RFLPF10050G9DM1T76 0;0.5A;0201 3 R7904 EMEA: B20 LATAM/APAC: B28A A A B12/17/20 DRX Title Page Name = 72_DRX_LMB DOCUMENT NO.: Size D Design Name = S96116-1-13_MB_20190409-1317 DEPARTMENT: DEPARTMENT = W INGTECH-SZDESIGNER: Date: 5 4 3 2 Page Modify Date = Monday, April 08, 2019 Sheet 1 REV: V10 DESIGNER = LIUFENGLEI 46 of 53 5 4 3 2 1 D D SAFFB2G65AA0F0A SFHG56BA002 U7307 C7304 L7305 2 SAFFB2G65AA0F0A L7307 NF_5.6nH;0.1nH;0201 C7305 RF_B7_DRX_SAW_OUT 4 RF_B7_DRX_RFIC RF_B7_DRX_RFIC [32] 1.2NH;0.1nH;0201 GND3 GND2 UNBL2 GND1 UNBL1 10pF;10%;50V;0201 8.2pF;0.25pF;50V;0201 L7308 NF_5.6nH;0.1nH;0201 5 RF_B7_DRX_ASM RF_B7_DRX_SAW_IN 1 3 [44] RF_B7_DRX_ASM C7312 2.2pF;0.25pF;50V;0201 B7 DRX C C SFHG96AA402 SAFFB2G53AA1F0A SFHG96AA402 U7341 C7320 RF_B38/41_DRX_SAW_IN 1 4 UNBL2 L7318 RF_B38/41_DRX_SAW_OUT C7310 5.6pF;0.25pF;50V;0201 RF_B38/41_DRX_RFIC RF_B38/41_DRX_RFIC [32] GND3 2.7NH;0.1nH;0201 5 GND2 UNBL1 L7322 NF_5.1NH;3%;0201 2 10pF;10%;50V;0201 GND1 RF_B38/41_DRX_ASM 3 RF_B38/41_DRX_ASM [44] C7311 NF_2.2pF;0.25pF;50V;0201 L7319 5.6nH;0.1nH;0201 B38/41 DRX B B SFHG52AA002 SAFFB2G35AA0F0A U7340 SFHG52AA002 C7321 UNBL2 4 C7322 RF_B40_DRX_SAW_OUT GND3 UNBL1 C7314 NF_0.5pF;0.1pF;50V;0201 GND2 1 GND1 RF_B40_DRX_SAW_IN 2.4NH;0.1nH;0201 RF_B40_DRX_RFIC 8.2pF;0.25pF;50V;0201 L7311 NF_3.9NH;0.1nH;0201 5 RF_B40_DRX_ASM 3 RF_B40_DRX_ASM 2 L7309 [44] RF_B40_DRX_RFIC [32] 8.2pF;0.25pF;50V;0201 L7312 2.7NH;0.1nH;0201 B40 DRX A A Title DEPARTMENT: Date: 5 4 3 2 REV: V10 Page Name = 73_DRX_HB Size D Design Name = S96116-1-13_MB_20190409-1317 DOCUMENT NO.: DEPARTMENT = W INGTECH-SZ DESIGNER: Page Modify Date = Monday, April 08, 2019 Sheet 1 DESIGNER = LIUFENGLEI 47 of 53 5 4 3 2 1 D D C C B B A A Title <Title> Size A1 Date: Document Number <Doc> Monday, April 08, 2019 Rev 1.0 Sheet 48 of 53 5 4 3 2 1 D D C C B B A A Title Reserved DOCUMENT NO.: Design Name DEPARTMENT: WINGTECH-SH Date: Monday, April 08, 2019 REV: V10 Size DESIGNER: Sheet A1 LIUFENGLEI 49 of 53 5 4 3 2 1 D D C C B B A A Title Reserved DOCUMENT NO.: Design Name DEPARTMENT: WINGTECH-SH Date: Monday, April 08, 2019 REV: V10 Size DESIGNER: Sheet A1 LIUFENGLEI 50 of 53 5 4 3 2 1 AVDD18_WBT Close to Antenna BT_DATA C7701 0.1uF;20%;6.3V;0201 BT_DATA BT_CLK D MT6631N/A [5] BT_CLK [5] D C7702 WF_CTRL0 WF_CTRL1 100pF;30%;50V;0201 WF_CTRL2 WF_CTRL0 [5] WF_CTRL1 [5] WF_CTRL2 [5] [52] 32 AVDD33_WBT Close to MT6631 C7703 4.7uF;20%;6.3V;0402 33 C7704 100pF;30%;50V;0201 34 22 23 24 21 WF_CTRL2 WF_CTRL1 WF_CTRL0 25 BT_DATA BT_CLK 26 27 AVDD18_WBT1 28 AVDD18_WBT2 29 WIFI_VDET_5G 31 WB_ANT_2G WB_VDET_2G WIFI_AUX_2G 30 U7702 WB_RF_2G WF_IP NC1 WF_IN AVDD33_WBT WF_QP WF_RF_5G WF_QN 20 WF_IP 19 WF_IN 18 WF_QP 17 WF_QN 16 BT_IP 15 BT_IN 14 BT_QP 13 BT_QN 12 GPS_I WF_IP [5] WF_IN [5] WF_QP [5] WF_QN [5] Note: 51-3 35 C7707 WF_AUX_5G AVDD28_FM 37 FM_ANT_N [29] FM_ANT_P BT_IN BT_IP [5] BT_IN [5] Note: 51-4 0.01uF;20%;25V;0201 [29] MT6631N FM_AVDD28 36 BT_IP MT6631N/A FM_LANT_N BT_QP FM_LANT_P BT_QN L7709 38 BT_QP BT_QN [5] [5] 9.1NH;3%;0201 C C 39 GPS_RFIN GPS_IP AVDD18_GPS GPS_IN [5] 11 GPS_QP 10 GPS_QN 9 XO_IN 8 7 NC2 CEXT 6 5 WB_PTA CONN_TOP_CLK CONN_HRST_B CONN_TOP_DATA 4 1 GPS_RFIN 3 40 C7711 4700pF;20%;6.3V;0201 41 DVSS [53] GPS_I AVDD18_GPS AVDD28_FSOURCE L7705 L0201_NC 2 L7704 L0201_NC MT6631 GPS_Q [5] [5] CONN_HRST_B CONN_TOP_DATA [5] CONN_TOP_CLK [5] CONN_WB_PTA GPS_Q [5] CONN_HRST_B C7713 CONN_TOP_DATA C7714 1.0UF;20%;6.3V;0201 100pF;30%;50V;0201 CONN_TOP_CLK CONN_WB_PTA [5] CONN_XO_IN_BB [10] PMIC_CLK_WCN R7708 0;0.5A;0201 0;0.5A;0201 PMIC R5016/R5017 NC, R5003/R8005 0ohm TCXO R5016/R5017 0ohm, R5003/R8005 NC R7713 L7712 120oHM;500mA;0402 FM_AVDD28 B VCN28_PMU [9,53] B C7718 1.0UF;20%;6.3V;0201 R7711 AVDD18_GPS VCN18_PMU 0;0.5A;0201 R7712 [9] C7719 1.0UF;20%;6.3V;0201 AVDD18_WBT Schematic design notice of "51_CONNECTIVITY_CONSYS_MT6631" Note 51-1: 0;0.5A;0201 For R5015 size, please select 0402 size or larger one R7768 AVDD33_WBT Note 51-2: VCN33_PMU [9] 0;1A;0402 Please refer to MT6762 Baseband design notice for VCN33 LDO selection guide Note: 51-5 Note 51-3: If WiFi 5G not support, connect pin 34(WF_RF_5G) to GND Note 51-4: Pin 36 (AVDD28_FM) must be connected to VCN28 even if FM not support Note 51-5: If WiFi 5G were no need, VCN33 could be chosen from PMIC output (VCN33_PMU) A A Title REV: Page Name = 77_WCN_MT6631 DOCUMENT NO.: Size D Design Name = S96116-1-13_MB_20190409-1317 DEPARTMENT: DEPARTMENT = W INGTECH-SZDESIGNER: Date: 5 4 3 2 Page Modify Date = Monday, April 08, 2019 Sheet 1 V10 DESIGNER = LIUFENGLEI 51 of 53 5 4 3 2 1 F6HG2G441EG65 靠近MT6331 F6HG2G441EG65 U7801 R7803 R7804 GND1 UNBL1 GND2 GND3 UNBL2 5 L7805 NF_1.8nH;0.1nH;0201 L7806 NF_8.2NH;3%;0201 2 4 0;0.5A;0201 3 D 1 50 Ohm L7807 0;0.5A;0201 NF_9.1NH;3%;0201 WB_ANT_2G WB_ANT_2G D [51] L7808 NF_1.8nH;0.1nH;0201 ANT7801 4-00-45979 DP1608-V1524CAT 1 R7806 FL7802 DP1608-V1524CAT R7802 50 Ohm 2 R7801 5 COMMON H_PORT 1 L7809 L0201_NC L7804 NF_1.8nH;0.1nH;0201 L7812 NF_1.8nH;0.1nH;0201 L_PORT 3 GPS_IN [53] 2 4 6 0;0.5A;0201 L7811 L0201_NC GND1 GND2 GND3 0;0.5A;0201 0;0.5A;0201 L7810 L0201_NC 4-00-45979 C C ANT7803 4-00-45979 1 2 4-00-45979 B B A A Title Design Name DEPARTMENT: WINGTECH-SH Date: 5 4 3 2 REV: V10 Reserved DOCUMENT NO.: Monday, April 08, 2019 1 Size DESIGNER: Sheet D LIUFENGLEI 52 of 53 5 4 3 2 1 D D 靠近MT6331 GPS xLNA Close to ANT AW5005DNRZ MXDLN16G matching value depends on LNA selected R7905 0;0.5A;0201 U7901 U7903 SAFFB1G56KB0F0A R7907 GND3 GND2 GND1 GND1 RFOUT GND2 RFIN EN VCC 6 1 50 Ohm 5 4 0;0.5A;0201 Co_Pad UNBL1 UNBL2 4 GND3 3 GND2 L7902 50 Ohm 2 UNBL2 5 C7905 NF_1.0pF;0.05pF;50V;0201 UNBL1 3 C GPS_IN 2 [52] 4 GND1 2 C7902 1 50 Ohm GPS_RFIN [51] 0;0.5A;0201 Co_Pad C7910 NF_1.0pF;0.05pF;50V;0201 5 1 U7902 SAFFB1G56KB0F0A 18pF;10%;50V;0201 3 SAFFB1G56KB0F0A C7901 50 Ohm R7902 5.6nH;0.1nH;0201 18pF;10%;50V;0201 C AW5005DNRZ C7906 NF_1.0pF;0.05pF;50V;0201 [9,51] R7903 VCN28_PMU R7901 0;0.5A;0201 C7907 GPIO_GPS_LNA_EN GPIO_GPS_LNA_EN [5] 0;0.5A;0201 C7908 NF_1.0pF;0.05pF;50V;0201 0.01uF;20%;25V;0201 B B A A Title Design Name DEPARTMENT: WINGTECH-SH Date: 5 4 3 2 REV: V10 Reserved DOCUMENT NO.: Monday, April 08, 2019 1 Size DESIGNER: Sheet D LIUFENGLEI 53 of 53

SM-A107F SVC SCHEMATIC (مخطط صيانة) HALABTECH

Products

Support

SM-A107F SVC SCHEMATIC (مخطط صيانة) HALABTECH

Add this document to collection(s)

Add this document to saved

Suggest us how to improve StudyLib