3.45 GHz to 6.25 GHz,
Tunable Band-Pass Filter
HMC892ALP5E
Data Sheet
FUNCTIONAL BLOCK DIAGRAM
Amplitude settling time: 200 ns
Excellent wideband rejection: ≥30 dB
Single-chip replacement for mechanically tuned designs
32-lead, 5 mm × 5 mm, RoHS compliant LFCSP package
APPLICATIONS
HMC892ALP5E
GND
GND
RFIN
RFOUT
VFCTL VBWCTL
Test and measurement equipment
Military radar and electronic warfare (EW)/electronic
countermeasures (ECM)
Satellite communications (SATCOM) and space
Industrial and medical equipment
16963-001
FEATURES
Figure 1.
GENERAL DESCRIPTION
The HMC892ALP5E is a tunable band-pass filter that features a
user selectable pass-band frequency. The 3 dB filter bandwidth is
approximately 8.7%. The 20 dB filter bandwidth is approximately
23.8%. The center frequency can be varied between 3.45 GHz
and 6.25 GHz by applying an analog tuning voltage between 0 V
and 14 V.
Rev. 0
This tunable filter can be used as a smaller alternative to
physically large switched filter banks and cavity tuned filters.
The HMC892ALP5E has excellent microphonics due to the
monolithic design and provides a dynamically adjustable
solution in advanced communications applications.
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rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2018 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
HMC892ALP5E
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Typical Performance Characteristics ..............................................6
Applications ....................................................................................... 1
Theory of Operation .........................................................................9
Functional Block Diagram .............................................................. 1
Applications Information .............................................................. 10
General Description ......................................................................... 1
Typical Application Circuit ....................................................... 10
Revision History ............................................................................... 2
Evaluation PCB Information .................................................... 10
Specifications..................................................................................... 3
Outline Dimensions ....................................................................... 11
Absolute Maximum Ratings ............................................................ 4
Ordering Guide............................................................................... 11
ESD Caution .................................................................................. 4
Pin Configuration and Function Descriptions ............................. 5
REVISION HISTORY
9/2018—Revision 0: Initial Version
Rev. 0 | Page 2 of 11
Data Sheet
HMC892ALP5E
SPECIFICATIONS
TA = 25°C, VFCTL = VBWCTL, unless otherwise noted.
Table 1.
Parameter
FREQUENCY RANGE
Center (fCENTER)
BANDWIDTH
3 dB
3 dB Bandwidth Control, VBWCTL
Min
3.45
REJECTION
Low-Side
High-Side
Re-Entry
LOSS
Insertion
Return
DYNAMIC PERFORMANCE
Maximum Input Power for Linear Operation
Input Third-Order Intercept (IP3)
Group Delay
Phase Sensitivity
Amplitude Settling
Drift Rate
RESIDUAL PHASE NOISE
1 MHz Offset
TUNING
Voltages (VFCTL, VBWCTL)
Currents (IFCTL, IBWCTL)
Typ
Max
Unit
6.25
GHz
8.7
3
%
%
0.89 × fCENTER
1.13 × fCENTER
5.70 × fCENTER
GHz
GHz
GHz
9.5
9.6
dB
dB
10
0
32
1.55
3.5
200
dBm
dBm
ns
Radian/V
ns
0.5
MHz/°C
−165
dBc/Hz
14
±1
Rev. 0 | Page 3 of 11
V
µA
Test Conditions/Comments
Percent change of bandwidth over fCENTER, as
VBWCTL changes
≥20 dB
≥20 dB
≤30 dB
Input power (PIN) = 20 dBm per tone
Time to settle to minimum insertion loss,
within ≤0.5 dB of static insertion loss
Each pin can be driven independently
Rated current for each pin
HMC892ALP5E
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
Tuning
Voltages (VFCTL, VBWCTL)
Currents (IFCTL, IBWCTL)
RF Input Power
Temperature
Operating
Storage
Junction for 1,000,000 Mean Time to
Failure (MTTF)
Nominal Junction (Paddle
Temperature (TPADDLE) = 85°C, PIN =
10 dBm)
Electrostatic Discharge (ESD)Sensitivity
Rating
Human Body Model (HBM)
Field Induced Charged Device Model
(FICDM)
Moisture Sensitivity Level (MSL) Rating
Rating
−0.5 V to +15 V
±1 mA
27 dBm
−40°C to +85°C
−65°C to +150°C
175°C
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
ESD CAUTION
90°C
1500 V
1250 V
MSL3
Rev. 0 | Page 4 of 11
Data Sheet
HMC892ALP5E
32
31
30
29
28
27
26
25
NIC
NIC
NIC
NIC
NIC
NIC
NIC
NIC
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
1
2
3
4
5
6
7
8
HMC892ALP5E
TOP VIEW
(Not to Scale)
24
23
22
21
20
19
18
17
NIC
NIC
NIC
NIC
GND
RFOUT
NIC
NIC
NOTES
1. NIC = NOT INTERNALLY CONNECTED. THESE PINS ARE NOT CONNECTED INTERNALLY.
ALL DATA SHOW IN THIS DATA SHEET WAS MEASURED WITH THESE PINS CONNECTED TO
RF OR DC GROUND EXTERNALLY.
2. EXPOSED PAD. THE PACKAGE BOTTOM HAS AN EXPOSED METAL PAD THAT MUST BE CONNECTED
TO RF AND DC GROUND.
16963-002
NIC 9
NIC 10
NIC 11
VFCTL 12
NIC 13
VBWCTL 14
NIC 15
NIC 16
NIC
NIC
NIC
NIC
GND
RFIN
NIC
NIC
Figure 2. Pin Configuration
Table 3. Pin Function Descriptions
Pin No.
1 to 4, 7 to 11, 13, 15
to 18, 21 to 32
5, 20
Mnemonic
NIC
6
RFIN
12
14
19
VFCTL
VBWCTL
RFOUT
Description
Not Internally Connected. These pins are not connected internally. All data shown in this data sheet was
measured with these pins connected to RF or dc ground externally.
Ground. These pins and exposed paddle must be connected to RF or dc ground. See Figure 5 for the
interface schematic.
Radio Frequency Input. This pin is dc-coupled and is matched to 50 Ω. Do not apply external voltage
to this pin. See Figure 3 for the interface schematic.
Center Frequency Control Voltage. See Figure 4 for the interface schematic.
Bandwidth Control Voltage. See Figure 7 for the interface schematic.
Radio Frequency Output. This pin is dc-coupled and is matched to 50 Ω. Do not apply external voltage
to this pin. See Figure 6 for the interface schematic.
Exposed Pad. The package bottom has an exposed metal pad that must be connected to RF and dc
ground.
GND
EPAD
INTERFACE SCHEMATICS
RFIN
RFOUT
250Ω
17nH
16963-003
Figure 6. RFOUT Interface Schematic
Figure 3. RFIN Interface Schematic
8.5nH
250Ω
V BWCTL
10pF
31.8pF
42.4pF
16963-004
8.5nH
V FCTL
38pF
Figure 7. VBWCTL Interface Schematic
16963-005
Figure 4. VFCTL Interface Schematic
GND
250Ω
16963-007
17nH
16963-006
250Ω
Figure 5. GND Interface Schematic
Rev. 0 | Page 5 of 11
HMC892ALP5E
Data Sheet
TYPICAL PERFORMANCE CHARACTERISTICS
0
0
14V
7V
0V
–5
–20
–30
–40
–50
–10
–15
S22,
S11,
S22,
S11,
S22,
S11,
–60
–20
–70
0
5
10
15
20
25
30
BROADBAND RF FREQUENCY (GHz)
–25
16963-008
–80
Figure 8. Insertion Loss vs. Broadband RF Frequency at Various Voltages,
VFCTL = VBWCTL
0
20
25
30
0
–4
–6
–8
–12
RETURN LOSS (dB)
–14
–16
–18
–20
–10
–12
–14
–16
–18
–20
–22
–24
–22
–26
–24
S22,
S11,
S22,
S11,
S22,
S11,
14V
14V
7V
7V
0V
0V
3.5
4.0
–28
3.0
3.5
4.0
4.5
5.0
5.5
6.0
6.5
7.0
7.5
8.0
RF FREQUENCY (GHz)
–30
2.0
16963-009
2.5
Figure 9. Insertion Loss vs. RF Frequency at Various Voltages, VFCTL = VBWCTL
2.5
3.0
4.5
5.0
5.5
6.0
6.5
7.0
7.5
8.0
RF FREQUENCY (GHz)
16963-012
INSERTION LOSS (dB)
15
–2
–10
Figure 12. Return Loss vs. RF Frequency at Various Voltages, VFCTL = VBWCTL
0
0
–4
10
Figure 11. Return Loss (S11 and S22) vs. Broadband RF Frequency at Various
Voltages, VFCTL = VBWCTL
14V
7V
0V
–8
–2
5
BROADBAND RF FREQUENCY (GHz)
–6
–26
2.0
14V
14V
7V
7V
0V
0V
16963-011
RETURN LOSS (dB)
INSERTION LOSS (dB)
–10
+85°C
+25°C
–40°C
–2
–4
–6
–10
–12
–14
–16
–18
–8
–10
–12
–14
–16
–20
–18
–22
–20
–24
4.0
4.5
5.0
5.5
RF FREQUENCY (GHz)
6.0
6.5
–22
3.5
16963-010
–26
3.5
Figure 10. Insertion Loss vs. RF Frequency at Various Temperatures, VFCTL =
VBWCTL = 7 V
S22,
S11,
S22,
S11,
S22,
S11,
4.0
+85°C
+85°C
+25°C
+25°C
–40°C
–40°C
4.5
5.0
5.5
RF FREQUENCY (GHz)
6.0
6.5
16963-013
–8
RETURN LOSS (dB)
INSERTION LOSS (dB)
–6
Figure 13. Return Loss vs. RF Frequency at Various Temperatures, VFCTL =
VBWCTL = 7 V
Rev. 0 | Page 6 of 11
Data Sheet
HMC892ALP5E
0
7.0
+85°C
+25°C
–40°C
+85°C
+25°C
–40°C
–2
6.0
INSERTION LOSS (dB)
5.5
5.0
4.5
4.0
–4
–6
–8
–10
–12
3.5
–14
3.0
0
2
4
6
8
10
12
14
VFCTL = VBWCTL (V)
–16
16963-014
2.5
0
2
6
8
10
12
14
VFCTL = VBWCTL (V)
Figure 17. Insertion Loss vs. VFCTL = VBWCTL at Various Temperatures
Figure 14. Center Frequency vs. VFCTL = VBWCTL at Various Temperatures
0
12
11
+85°C
+25°C
–40°C
–2
MAXIMUM RETURN LOSS (dB)
10
9
3dB BANDWIDTH (%)
4
16963-017
CENTER FREQUENCY (GHz)
6.5
8
7
6
5
+85°C
+25°C
–40°C
4
3
–4
–6
–8
–10
–12
2
–14
0
2
4
6
8
10
12
14
VFCTL = VBWCTL (V)
–16
16963-015
0
0
6
8
10
12
14
VFCTL = VBWCTL (V)
Figure 18. Maximum Return Loss vs. VFCTL = VBWCTL at Various Temperatures,
2 dB Bandwidth
Figure 15. 3 dB Bandwidth vs. VFCTL = VBWCTL at Various Temperatures
1.30
HIGH-SIDE REJECTION RATIO
+85°C
+25°C
–40°C
0.95
0.90
0.85
0.80
0.70
0
2
4
6
8
VFCTL = VBWCTL (V)
10
12
14
16963-016
REJECTION RATIO IS DEFINED AS THE RATIO
OF THE FREQUENCY AT WHICH THE RELATIVE
INSERTION LOSS IS 20dB TO fCENTER
0.75
Figure 16. Low-Side Rejection Ratio vs. VFCTL = VBWCTL at Various Temperatures
Rev. 0 | Page 7 of 11
+85°C
+25°C
–40°C
1.25
1.20
1.15
1.10
REJECTION RATIO IS DEFINED AS THE RATIO
OF THE FREQUENCY AT WHICH THE RELATIVE
INSERTION LOSS IS 20dB TO fCENTER
1.05
0
2
4
6
8
10
12
14
VFCTL = VBWCTL (V)
Figure 19. High-Side Rejection Ratio vs. VFCTL = VBWCTL at Various
Temperatures
16963-019
1.00
LOW-SIDE REJECTION RATIO
4
2
16963-018
1
HMC892ALP5E
Data Sheet
400
3
14V
7V
0V
300
GROUP DELAY (ns)
TUNING SENSITIVITY (MHz/V)
350
250
200
+85°C
+25°C
–40°C
150
2
1
100
0
2
4
6
8
10
12
14
VFCTL = VBWCTL (V)
0
2.0
16963-020
0
Figure 20. Tuning Sensitivity vs. VFCTL = VBWCTL at Various Temperatures
3.0
3.5
4.0
4.5
5.0
5.5
6.0
6.5
7.0
7.5
8.0
RF FREQUENCY (GHz)
Figure 23. Group Delay vs. RF Frequency at Various Voltages, VFCTL = VBWCTL
40
2.5
35
+85°C
+25°C
–40°C
30
INPUT IP3 (dBm)
2.0
GROUP DELAY (ns)
2.5
16963-023
50
1.5
1.0
25
20
15
+85°C
+25°C
–40°C
10
0.5
2
4
6
8
10
12
14
VFCTL = VBWCTL (V)
0
Figure 21. Group Delay vs. VFCTL = VBWCTL at Various Temperatures
10
12
14
Figure 24. Input IP3 vs. VFCTL = VBWCTL at Various Temperatures with an Input
Power of 20 dBm
15
10
14V
7V
1V
5
PHASE SHIFT (Degrees)
–120
–130
–140
–150
0
–5
–10
–15
14V
10V
7V
3V
1V
0V
–20
–160
–25
100
1k
10k
100k
OFFSET FREQUENCY
1M
10M
100M
–30
16963-022
–170
10
8
6
VFCTL = VBWCTL (V)
–110
PHASE NOISE (dBc/Hz)
4
2
0
Figure 22. Phase Noise vs. Offset Frequency at Various Voltages, VFCTL = VBWCTL
0
2
4
6
8
10
12
14
16
INPUT POWER (dBm)
18
20
22
24
16963-025
0
16963-021
0
16963-024
5
Figure 25. Phase Shift vs. Input Power at Various Voltages, VFCTL = VBWCTL
Rev. 0 | Page 8 of 11
Data Sheet
HMC892ALP5E
THEORY OF OPERATION
The HMC892ALP5E is a tunable band-pass filter that features a
user selectable pass-band frequency. Varying the applied analog
tuning voltage between 0 V and 14 V at the VFCTL pin varies the
center frequency between 3.45 GHz and 6.25 GHz. The bandwidth
of the filter is adjustable by using the VBWCTL control voltage,
which varies from 0 V to 14 V. Typical operation is to tie both
VFCTL and VBWCTL control voltages together.
Rev. 0 | Page 9 of 11
HMC892ALP5E
Data Sheet
APPLICATIONS INFORMATION
PRIMARY SILKSCREEN
TYPICAL APPLICATION CIRCUIT
PRIMARY SOLDER MASK
18
8
17
(LAYER 2)
(LAYER 3)
SECONDARY SIDE (LAYER 4)
Figure 27. 4-Layer Stackup
RFOUT
C2
100pF
OUT
J2
GND
16963-026
PACKAGE
BASE
VBWCTL
J3
0.5oz Cu
L2_GND PLANE
PREPREG AS REQUIRED
0.5oz Cu
L3_GND PLANE
370HR
16963-027
19
7
0.5oz Cu
PRIMARY SIDE
(LAYER 1)
ARLON OR ROGERS CORE 10MILS ±1MIL (CRITICAL)
0.5oz Cu
16
6
15
20
14
21
5
13
22
4
VFCTL
J4
NOMINAL
FINISHED
BOARD
THICKNESS 0.062"
±10%
25
26
27
28
29
30
3
12
23
11
RFIN
24
2
9
C1
100pF
1
10
IN
J1
31
32
Figure 26 shows the typical application circuit for the
HMC892ALP5E. RFIN and RFOUT are dc-coupled and require
external 100 pF series capacitors (C1 and C2).
Figure 26. Typical Application Circuit
EVALUATION PCB INFORMATION
The printed circuit board (PCB) used in the application uses
radio frequency (RF) circuit design techniques. Signal lines
must have a 50 Ω impedance while the package ground leads
and exposed pad must be connected directly to the ground
plane (see Figure 28). Use a sufficient number of via holes to
connect the top and bottom ground planes. The evaluation PCB
shown in Figure 28 is available from Analog Devices, Inc., upon
request. The HMC890ALP5E evaluation board in Figure 28 is
used to evaluate the HMC892ALP5E device.
Table 4. Bill of Materials
Item
J1 to J2
J3 to J4
C1, C2
U1
PCB1
1
2
Description
PCB mounts SRI, SMA connector
PCB mounts, Johnson SMA connector
100 pF capacitors, 0402 package
HMC892ALP5E
08-0495982 evaluation PCB
Circuit board material is Arlon 25FR or Rogers 25FR.
08-049598 is the raw bare PCB identifier. Reference EV1HMC891ALP5 when
ordering the complete evaluation PCB.
16963-028
All RF traces are routed on Layer 1 (primary side), and all other
layers are ground planes that provide a solid ground for RF
transmission lines, as shown in Figure 27. The top dielectric
material is Rogers 4350, offering low loss performance. The
preimpregnated (PREPREG) material in Layer 2 sticks the
Isola 370HR with copper trace layers above and below together.
Both the PREPREG material and the Isola 370HR core layer are
used to achieve required board finish thickness.
Figure 28. Evaluation PCB Top Layer
Rev. 0 | Page 10 of 11
Data Sheet
HMC892ALP5E
OUTLINE DIMENSIONS
DETAIL A
(JEDEC 95)
5.10
5.00 SQ
4.90
1
0.50
BSC
3.75
3.60 SQ
3.55
EXPOSED
PAD
8
17
TOP VIEW
0.80
0.75
0.70
TOP VIEW
PKG-004570
SEATING
PLANE
PIN 1
INDIC ATOR AREA OPTIONS
(SEE DETAIL A)
32
25
24
0.50
0.40
0.30
9
16
BOTTOM VIEW
0.05 MAX
0.02 NOM
COPLANARITY
0.08
0.20 REF
0.20 MIN
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
COMPLIANT TO JEDEC STANDARDS MO-220-WHHD-5
10-20-2017-C
PIN 1
INDICATOR
0.30
0.25
0.18
Figure 29. 32-Lead Lead Frame Chip Scale Package [LFCSP]
5 mm × 5 mm Body and 0.75 mm Package Height
(CP-32-12)
Dimensions shown in millimeters
ORDERING GUIDE
Model 1
HMC892ALP5E
HMC892ALP5ETR
EV1HMC892ALP5
1
Temperature Range
−40°C to +85°C
−40°C to +85°C
Package Description
32-Lead Lead Frame Chip Scale Package [LFCSP]
32-Lead Lead Frame Chip Scale Package [LFCSP]
Evaluation PCB
All models are RoHS compliant parts.
©2018 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D16963-0-9/18(0)
Rev. 0 | Page 11 of 11
Package Option
CP-32-12
CP-32-12