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Comcas 2021 phononics Shapira final

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Performance Enhancement of Integrated Circuits and Power Devices
via Embedded Diamond Heat Management
Shye Shapira
Phononics, Hataasiya 51 Nesher, Israel email: shye@phononicstech.com
Abstract We report the manufacturing and integration of lab
grown microcrystaline diamond in the wafer and package of
advanced silicon integrated circuits and compound
semiconductor processes. Diamond which has a thermal
conductivity of 1500-2200 W/(m*K), four times higher than
copper and fifteen time higher than silicon, significantly
reduces the thermal spreading resistance and the junction /
core temperature. We present perfomance stress test results
performed on a state of the art processor with embedded
diamond heat spreader showing a marked increase in processor
speed and reduced core temperature when compared to a the
same processor in a standard package. A marked reduction in
cores temperature spread is also displayed by the diamond
embedded processor. Results for power device performance
improvement are also described.
Index Terms —Thermal management of electronics;
Diamond; Electronic packaging thermal management;
Monolithic integrated circuits; Digital integrated circuits;
Microwave integrated circuits; High Power Devices.
I. INTRODUCTION
The continuous reduction of transistor feature sizes
allowing a doubling of device density every eighteen months
(“Moore’s Law”) has been progressing for decades, bringing
with it added technical benefits such as an increase in
transistor cutoff frequencies and increased processor clock
speeds. However, since the beginning of the century,
processor clock speeds have hardly increased from several
GHz to this day. This is while single transistor cutoff
frequencies have grown by over sixfold. The main reason for
the suppression of clock frequency increase with advancing
in technology nodes was thermal management. [1], [2]
During the progression of Moore’s law all integrated circuit
platforms have been silicon and silicon on insulator based.
The thermal conductivity of silicon is around 130 W/ (m*K).
However, with the increase of transistor density, the power
intensity generated by circuit operation increases and
nowadays can reach 1-4 W/ mm^2 for integrated circuits and
well over 10 fold of that for power devices in saturation
mode. Consequently, without further engineering, this would
result in an ever-growing chip operating temperature. Chip
architects have addressed this problem partially since the
beginning of the century by switching to multicore design
and limiting the processor clock frequencies to prevent chip
overheating. [1] Physical solutions such as in-chip
microfluidic channels have not caught on for the general
industry due to operation, yield and reliability
complications. Thus some chip performance boost which
nowadays is achieved through new architecture, and scaling
to more aggressive technology nodes may be achieved by
better practical cooling solutions.
II. PASSIVE COOLING BY DIAMOND INTEGRATION IN
PACKAGE
Diamond has a heat conductivity which is the highest in
nature, ranging from 1000 W/ (m*K) to 2200 W/ (m*K). It
is between 10 to twenty times higher than silicon and up to
five times higher than copper. Hence it can be used
effectively as a heatspreader when placed in proximity to hot
spots generated in electrical circuits. Such use has been
reported in GaN amplifiers where diamond layers were
integrated into the substrate of a GaN wafer in close
proximity to the active hot spot formed at the transistor gate
edge on the drain side [3]. The reduction of the spreading
resistance led to a reduction in the junction temperature and
hence a higher reliability lifetime and higher output power
[1].
In advanced silicon integrated circuits (ICs) thermal
hotspots appear in two scales. At the transistor level, heat is
generated at the drain edge due to dissipation of excess
carrier energy at the drain edge. The dimensions of such
hotspot patterns (size and pitch) for state of the art digital
technology, are on nanometer scale. To mitigate the excess
heat would require integrating heat spreaders that are in a
nanometer scale proximity to the hotspots. Hotspots or “hot
operation areas” generated by processor cores which are of
millimeter dimensions, (Fig. 1) generate in operation, excess
heat that can be addressed by diamond-based heat spreaders
that are further removed from the heat source.
Silicon Chip
Hot Operation Areas
Fig. 1. Multicore processors generate hotspots on the
dimensions of millimeter scale. The figure shows two cores. These
are addressed by adding an integrated diamond heatspreader.
III. STATE OF THE ART PROCESSOR DEMO
We used a commercially available state of the art 8 core
processor, released in 2021 with a clock speed of 5 GHz. We
compared the performance of lidded processors before and
after the integration of diamond heatspreaders by running a
AIDA64 stress test while mounting the chip on a highperformance motherboard. A powerful fan cooling system
with a heat pipe link between the heatsink and the cooling
fins was used. The diamond heatspreaders were processed
from a multicrystaline diamond wafer (Fig. 2) which is best
suited for such integration as it is less brittle than single
crystal diamond.
83 degrees C to 68 degrees C. The spread of the core
temperature (between the 8 cores) is also significantly
reduced from a standard deviation of 4.8 degrees C to 1.2
degrees C.
The change of temperature is also accompanied by a
performance increase. During stress the clock frequency is
slightly reduced but is higher at stress by 7 % for the
processor after diamond embedding. Accordingly, the core
operation power is increased by 5%.
Fig. 3. Core temperatures in processor at stress. Six of the 8 cores
in the processor are displayed. Upon stress diamond packaged
devices exhibit an operating temperature lower by 15 degrees C
and smaller temperatures differences between cores, which is an
important performance enabler.
IV DISCUSSION OF THE OPERATION RESULTS
The improvement of chip performance by diamond
integration has been clearly demonstrated above.
Fig. 2. Top: 100 mm CVD grown microcrystalline diamond
wafer after polishing. Heat spreaders are processed from this
starting material.
III. PROCESSOR TEST AND RESULTS
For an accurate comparison, the results described here are
measurements of the same sample before and after the
diamond integration. As there are many compensation
mechanisms, the BIOS and stress program were prepared so
that most parameters such as the fan speed and operation
voltage were fixed. The operation voltage was selected so
that for the original processor it was on the verge of
initiating “throttling”. Throttling or dynamic frequency
scaling [4] is a name for a dynamic control on short time
scales of the chip clock speed when its temperature exceeds
a set upper limit, normally no more than 100 degrees
centigrade ( C ).
The tests were performed in an environment with ambient
temperature of 24 degrees C.
Fig. 3 displays the temperatures of 5 (out of 8) cores as the
stress test is initiated. The data is time averaged over a
window of several seconds to reduce the noise in readings.
As the figure shows, the inclusion of diamond heatspreaders
reduces the temperature at full stress by 15 degrees C , from
While only 15% of the temperature drop from the integrates
is due to the packaged chip, the inclusion of diamond may
affect the overall system performance by several
mechanisms:
1. Spreading resistance reduction: The placement of a
diamond layer in close proximity to a small
dimension heat source reduces the thermal
spreading resistance and hence the temperature.
2. Reduction of power below the critical power flux
the heat pipe can handle: Heatpipes are physically
limited by the thermal flux density they can
dissipate. Current computing cores may generate a
heat flux higher than the critical limit a heatpipe
can handle, and hence an efficient heatspreader is
required to reduce this flux below the critical value.
3. The variation of core temperature both in time and
between cores reduces the processor performance.
A diamond heatsprerader reduces both these
variation.
Another aspect of the thermal management yet to be
demonstrated is the short time response on the scale of
milliseconds. The inclusion of diamond, which has the
highest speed of sound in nature ( 15 to 20 Kilometers/
Second) also affects the short term thermal management of
the chip. The performance of processors are all affected by
these factors described above and therefore display a
performance enhancement well beyond the “long time” data
displayed here.
V DIAMOND BASED THERMAL MANAGEMENT
FOR POWER DEVICES
The power generated by modern IC is on the order of 1-4
W/ mm^2 . Power devices in silicon or compound
semiconductor structures can reach power intensities well
over tenfold of that figure. Thus, power devices need a more
aggressive approach for thermal management. In a previous
presentation [5] we described a thermal management solution
including in wafer diamond integration that reduces a power
devices operating temperature over ambient by close to
30%.
REFERENCES
[1] Lasse Natvig et al in “Multi- and many-cores, architectural
overview for programmers “ in Programming multi‐core and
many‐core computing systems Wiley 2017.
[2] S. H. Fuller and L. I. Millett. Computing performance: game
over or next level? Computer, 44(1):31–38, January 2011.
[3] J.D. Blevins et al, “Recent Progress in GaN-on-Diamond
Device Technology” Proceeding CS MANTECH Conference,
May 19th - 22nd, 2014, Denver, Colorado, USA.
[4] K. Moiseev, A. Kolodny and S. Wimer (September 2008).
"Timing-aware power-optimal ordering of signals". ACM
Transactions on Design Automation of Electronic Systems. 13
(4): 1–17
[5] S. Shapira, “Diamond Based Cooling Technologies for
Electronic Systems” Chipex 2020
https://youtu.be/o1ez4O5sD_w
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