Republic of the Philippines BATANGAS STATE UNIVERSITY Alangilan, Batangas City, Philippines 4200 ECE 405 - DIGITAL PRINCIPLES AND LOGIC DESIGN College of Engineering, Architecture and Fine Arts Laboratory Activity no.1 Submitted by: Abaja, Noeleen Claire ECE-2201 Submitted to: Engr. Cyrus Peter M. Lim Instructor A.Y. 2021-2022 1|P age OBJECTIVES: 1. Verify the truth table of the NOT gate. 2. Verify the truth table of the two-input AND gate. 3. Verify the truth table of the two-input OR gate. 4. Know and be familiar with the different characteristic of a TTL (TransistorTransistor-Logic) gate. MATERIALS: 1. Voltmeter/voltage probe 2. Ammeter/current probe 3. DC Power Source 4. Ground 5. Oscilloscope 6. 7404 Inverter (not gate) 7. 7408 2 input AND gate 8. 7432 2 input OR gate 9. LED 10. 47 Ohm resistor Figure A: Components for Circuit Simulation Figure B: Voltage and Current Probes 2|P age PROCEDURE: Part I: Verifying the truth table of the NOT gate (7404) 1. Connect a LED with a 47 ohm resistor in series at the 7404’s output. 2. Connect the 7404’s input to ground. 3. Measure the output voltage of the 7404 using the voltmeter. 4. Record in Table 1. Figure 1.1: NOT Gate Input Connected to Ground 5. Connect the 7404’s input to the +5V dc power source 6. Measure the output voltage of the 7404 using the voltmeter. 7. Record in Table 1. Figure 1.2: NOT Gate Input Connected to +5V DC Power source 3|P age Table 1: Record of Measurements of the NOT Gate Circuits Input Connection GND +5V Logic Value Output Voltage 0 5V Logic Value of the Output 1 1 0V 0 Part II: Verifying the truth table of the AND gate (7408) 1. Connect a LED with a 47 ohm resistor in series at the 7408’s output. 2. Connect both inputs of the 7408 to ground. 3. Measure the output voltage of the 7408 using the voltmeter. 4. Record in Table 2. Figure 2.1: AND Gate Input 1 and 2 Connected to Ground 5. Connect input 2 to ground and input 1 to the +5V source 6. Measure the output voltage of the 7408 using the voltmeter. 7. Record in Table 2. 4|P age Figure 2.2: AND Gate Input 2 Connected to Ground and Input 1 Connected to +5V DC Power source 8. Connect input 1 to ground and input 2 to +5V source 9. Measure the output voltage of the 7408 using the voltmeter. 10. Record in Table 2. Figure 2.3: AND Gate Input 1 Connected to Ground and Input 2 Connected to +5V DC Power source 11. Connect both inputs of the 7408 to the +5V source 12. Measure the output voltage of the 7408 using the voltmeter. 13. Record in Table 2. 5|P age Figure 2.4: AND Gate Input 1 and 2 Connected to +5V DC Power source Table 2: Record of Measurements of the AND Gate Circuits I1 I2 Logic Value of I1 GND GND 0 0 0V Logic Value of the Output 0 GND +5V +5V GND 0 1 1 0 0V 0V 0 0 +5V +5V 1 1 5V 1 Logic Value of I2 Output Voltage Part III: Verifying the truth table of the OR gate (7432) 1. Connect a LED with a 47 ohm resistor in series at the 7432’s output. 2. Connect both inputs of the 7432 to ground. 3. Measure the output voltage of the 7432 using the oscilloscope. 4. Record in Table 3. 6|P age Figure 3.1: OR Gate Input 1 and 2 Connected to Ground 5. Connect input 2 to ground and input 1 to the +5V source 6. Measure the output voltage of the 7432 using the oscilloscope. 7. Record in Table 3. Figure 3.2: OR Gate Input 2 Connected to Ground and Input 1 Connected to +5V DC Power source 8. Connect input 1 to ground and input 2 to +5V source 9. Measure the output voltage of the 7432 using the oscilloscope. 10. Record in Table 3. 7|P age Figure 3.3: OR Gate Input 1 Connected to Ground and Input 2 Connected to +5V DC Power source 11. Connect both inputs of the 7432 to the +5V source 12. Measure the output voltage of the 7432 using the oscilloscope. 13. Record in Table 3. Figure 3.4: OR Gate Input 1 and 2 Connected to +5V DC Power source 8|P age Table 3: Record of Measurements of the OR Gate Circuits Logic Value of I2 Output Voltage Logic Value of the Output I1 I2 Logic Value of I1 GND GND GND +5V 0 0 0 1 0V 5V 0 1 +5V GND 1 0 5V 1 +5V +5V 1 1 5V 1 Part IV: Familiarizing the TTL parameters of the Logic Gates 1. Search for the datasheet of each logic gate mentioned in Table 4. 2. Record each parameter (with units) in Table 4. Table 4: TTL parameters of the Logic Gates Logic Gate NOT VOH 2.4 V VOL 0.4 V VIL 0.8 V VIH 2V IOL 16mA IOH -0.4mA IIL -1.6mA IIH 40µA OR 2.7 V 0.5 V 0.8 V 2V 8mA -0.4mA -0.36mA 20µA AND 2.4 V 0.4 V 0.8 V 2V 16mA -0.8mA -1.6mA 40µA DISCUSSION OF RESULTS: The results of this laboratory activity were recorded in assigned tables shown after each procedure: The record of measurements and values for the 7404 NOT logic gate is shown in Table 1. This includes the input and output voltage with its logical values. The results show that when the input of the NOT gate was connected to the ground, the measured output voltage by the voltmeter is 5V which indicates a logic value of 1. On the other hand, when the input was connected to the +5V DC source, the output voltage reading changed to 0V which indicates a logic value of 0. The record of measurements and values for the 7408 AND logic gate is shown in Table 2. This includes the input and output voltage with its logical values. The results show that when one of either inputs of the AND gate was connected to the ground, the measured output voltage by the voltmeter is 0V which indicates a logic value of 0. 9|P age However, when both inputs were connected to the +5V DC source, it is only then that the output voltage reading changed to 5V which indicates a logic value of 1. The record of measurements and values for the 7432 OR logic gate is shown in Table 3. This includes the input and output voltage with its logical values. The results show that when one of either inputs of the OR gate was connected to the 5V DC source, the measured output voltage by the voltmeter is 5V which indicates a logic value of 1. However, when both inputs were connected to the ground, it is only then that the output voltage reading changed to 0V which indicates a logic value of 0. The TTL Parameters of the three simulated logic gates were shown in Table 4. Based on the researched values, it is reflected that 7404 NOT gate and 7408 AND gate were almost identical across all parameters except the source current (IOH). On the other hand, the 7432 OR gate has the same values with the NOT gate in 3 parameters only which were the voltage input low (VIL), voltage input high (VIH), and the source current (IOH). CONCLUSION: This laboratory experiment has verified through Multisim simulations of circuit designs, the truth tables of the 3 basic logic gates which are NOT, OR, and AND gates. In simulation, the 7404 component was used for the NOT gate which exhibits that the output voltage yields to be the inverse voltage of the input. Meanwhile, the 7408 AND gate automatically resulted to a logic output of 0 if one of either inputs were connected to the ground and only yielded output voltage with logic value of 1 if both the inputs were connected to the voltage source. On the other hand, the 7432 OR gate automatically resulted to a logic output of 1 if one of either inputs were connected to the voltage source and only yielded output voltage with logic value of 0 if both the inputs were connected to the ground. Lastly, the TTL parameters recorded for the discussed logic gates were based on research provided by pioneers of electronics. 10 | P a g e