MIMORPH (MIMO Radio Platform for
Heterogeneous Wireless Systems)
Prepared by: David Hunt
Date: February 15th, 2022
Presentation Overview
• Presentation is divided into the following sections:
•
•
•
•
•
•
Introduction and Problem Overview
MIMORPH Architecture
Hardware Accelerators
Validation and Experimentation
Closing Remarks
Discussion
• References are cited on the final chart
Introduction and Problem
Overview
Introduction: Review of Current Wireless
Standards
• Current IEEE802.11 wifi standards are a combination of mmWave and
sub-6 GHz implementations, with both implementations having
MIMO capability
• 5G-NR also operates with similar frequencies, bandwidths, data rates
and MIMO capabilities
Wifi Standard
Channel Frequency
Bandwidth
Link Rate
MIMO Capacity
IEEE 802.11ac
5GHz channels
Up to 160 MHz
Up to 6.9 Gbps
8x8
IEEE 802.11ax
2.4 GHz and 5GHz channels
Up to 160 MHz
Up to 9.6 Gbps
8x8
IEEE 802.11ad
60 GHz
Up to 2 GHz
Up to 6.7 Gbps
SISO
IEEE 802.11ay
60 GHz
Up to 8 GHz
Up to 40 Gbps
8x8
Common IEEE802.11 Standards [2]
Introduction: Currently Available Wireless
Research Platforms
• Many of the available platforms either are only capable of only cater
to a specific wireless standard or are incredibly expensive
[1]
Introduction: Currently Available Wireless
Research Platforms
• There are several platforms available for wireless research, but each
has its compromises
Option
Pros
Cons
COTS
Hardware
• Full standard
compliant
• Cheap
• Limited flexibility
• Limited physical layer
information
SDR, FPGA,
and converters
• Flexible
• Affordable
• For sub-6 GHz and only
narrowband mm-wave
General Options for Wireless Research [1]
Introduction: MIMORPH
• MIMORPH (MIMO Radio Platform for Heterogeneous Wireless
Systems)[1]
•
•
•
•
Memory Based Design for platform flexibility
Hardware Accelerators for closed loop experimentation
Support for 8x8 sub-6 GHz and 4x4 mm-Wave MIMO based implementations
Open Source
MIMORPH Architecture [2]
MIMORPH Architecture
MIMORPH Architecture: Overview
• MIMORPH uses a flexible memory-based architecture with macrochannel data paths and efficient memory management to implement
the following configurations[1]
• 8x8 sub-6 GHz MIMO
• 4x4 mm-Wave MIMO
• Combinations of the two
MIMORPH Architecture: Transmit Side
• DMA (Direct Memory Access): sends
IQ samples from processor to LBM’s
• LBM (Loop Back Memory): FIFO
buffers to continuously transmit IQ
samples
• Tx Channelizer: distributes IQ
samples from LBM’s to DACs
• 8 14-bit DAC’s sample at 4.096 GSPS
• All IQ samples stored in on-chip
memory block, not in DDR4 RAM
MIMORPH Transmit [1]
MIMORPH Architecture: Transmit
Configurations
• 3 potential implementations featured
4x4 mm-Wave MIMO [1]
8x8 sub-6 GHz MIMO [1]
2x2 mm-Wave MIMO with 4x4 sub-6 GHz MIMO
[1]
MIMORPH Architecture: Receive Side
• Implementation similar to transmit side, but uses 4 macro channels
instead of 8 macro channels
• Channel multiplexer sequentially writes I/Q samples from each macro
channel for efficient memory usage
4x4 mm-Wave MIMO [1]
8x8 sub-6 GHz MIMO [1]
2x2 mm-Wave MIMO with 4x4 sub-6 GHz MIMO
[1]
MIMORPH Architecture: Receive Memory
Setup
• Maximum DDR write speed is 148 Gbps[1]
• One IEEE802.11ad/ay stream with “sampling frequency of 3.25 GHz
(1.75 GSPS x 2 samples per symbol), and 16-bit I/Q samples” requires
a DDR memory write speed of 112 Gbps[1]
• 2 Streams: 225 Gbps [1]
• 4 Streams: 450 Gbps [1]
• Memory write speed reduced using two ways
• Reduced sample resolution
• Inter-Frame Spacing
MIMORPH Architecture: Receive Memory
Setup
• Reduce Sample Resolution
• Remove N- least significant bits from each sample[1]
• 4 mm-Wave MIMO streams – 5 bits[1]
• 3 mm-Wave MIMO streams – 7 bits[1]
• 2 mm-Wave MIMO streams – 10 bits[1]
[1]
[1]
MIMPORPH Architecture: Receive Memory
Setup
• Inter-Frame Spacing
• Add a set amount of space between packets for each LBM cycle[1]
• Requires additional packet detection block in the receiver[1]
[1]
Hardware Accelerators
Hardware Accelerators: Overview
• The memory-based approach is flexible and adequate for open-loop
designs
• Too much latency for closed loop designs
• MIMORPH implements hardware accelerators to add the following
functions[1]
•
•
•
•
•
•
Packet preamble and training field (TRN) generation
Antenna Wave Vector (AWV) control
Packet detection
Boundary detection
Channel estimation
Closed-loop operation
Hardware Accelerators: Review of Wireless
Packets
802.11 ad/ay packet structure [3]
• Preamble: “Short Training Field (STF) and Channel Estimation Field [CEF] for
packet detection, automatic gain control, and frequency/timing offsets”[3]
• Payload: header and data
• TRN: training field used for beamforming[3]
• MIMORPH uses hardware accelerators to handle much of the preamble
and TRN fields
Hardware Accelerators: Transmit Side
• LBM only stores the payload part of
the packet[1]
• Short Training Field (STF), Channel
Estimation Field (CEF), and Training
Fields (TRN) handled by hardware
accelerators[1]
• TRN fields appended to end of packet
• Antenna Wave Vector (AWV) control
used to configure different beam
patterns [1]
[1]
Hardware Accelerators: Receiver Side
• DDR4 only stores actual data[1]
• Packet Detector: detects packet
preambles and triggers rest of signal
processing blocks[1]
• Boundary Detection: detects last
sample of preamble and provides some
synchronization[1]
• Channel Estimation: measures metrics
like Channel Impulse Response[1]
• AWV Control: selects optimal AWV
configuration[1]
[1]
Validation and Experimentation
Validation: Overview
• 3 different experiments were performed using the MIMORPH
platform
• 4x4 mm-Wave MIMO
• 2x2 mm-Wave MIMO with 4x4 sub-6 GHz MIMO
• Real-time closed-loop evaluation
Validation: 4x4 mm-Wave MIMO Setup
• Key parameters
• 2 nodes with four 60 GHz RF
antennas on the front end
• 15 cm separation between
antennas
• I/Q frames generated in MATLAB
• Inter-frame separation of 2.1
[1]
[1]
Validation: 4x4 mm-Wave MIMO Results
[1]
[1]
Validation: 2x2 mm-Wave MIMO with 4x4
sub-6 GHz MIMO
[1]
[1]
[1]
Validation: Closed Loop Setup
• Performed experiment with a
closed loop mm-Wave system
with dynamic beam alignment[1]
• N1 sends packet with TRN fields
every 250 ms
• N2 processes the received frame
and determines best AWV
configuration
• N2 transmits an acknowledge
packet that includes the ideal AWV
frame
• N1 updates its AWV configuration
and the process repeats
[1]
Validation: Closed Loop Results
• Figure c shows that MIMORPH nodes
dynamically adjusting ideal angle as
the physical platform is moved to
different angles
• Figure d shows power level remaining
the same indicating that the ideal AWV
configuration is being used
[1]
[1]
Closing Remarks
Closing Remarks
• MIMORPH (MIMO Radio Platform for Heterogeneous Wireless
Systems) provides a cost effective and flexible platform that enables
wireless communications researchers to perform research on both
mm-Wave and sub-6 GHz wireless standard implementations
Discussion
Refrences
References
[1] Jesus O. Lacruz, Rafael Ruiz Ortiz, and Joerg Widmer. 2021. A Real-Time
Experimentation Platform for sub-6 GHz and Millimeter-Wave MIMO
Systems. In The 19th Annual International Conference on Mobile Systems,
Applications, and Services (MobiSys ’21), June 24-July 2, 2021, Virtual, WI,
USA. ACM, New York, NY, USA, 13 pages.
https://doi.org/10.1145/3458864.3466868
[2] “Mobisys 2021 - a Real-Time Experimentation Platform for Sub-6 Ghz and
Millimeter-Wave MIMO Systems.” YouTube, 23 June 2021,
https://youtu.be/ExuFbq6QroM.
[3] Hintersteiner, Jason D. What You Need to Know About 802.11ad and
802.11ay. WLPC 2019, https://d2cpnw0u24fjm4.cloudfront.net/wpcontent/uploads/WLPC2019_60-GHz-802.11ad-802.11ay-Overview_JasonHintersteiner.pdf.