CS230 Midterm
1. INTRO
- Program translation (pre-processor – compiler – assembler – linker)
- Hardware (read command from keyboard – load executable from disk to memory – write from memory to display)
- Cache used to improve performance
- Memory hierarchy (words, cache lines, cache lines, disk blocks, files)
- OS protect & hardware interface
- Process (OS’ abstraction for a running program, multiple process run concurrently, each process has exclusive use of hardware)
- Process context switching
- Virtual memory makes process think it own whole memory space
- 32-bit machine… 4GB address space given to single process (virtually)
- machine instructions, printf (“hello world”), global variables, subroutine, printf, download?
- Kernel virtual memory (OS code, initial program calls. Invisible to user code)
- Networks
- GPU
- Android S/W (System apps, Java API framework, Native C/C++ libraries, Android runtime,)
- ARM (Advanced RISC Machines - Application, Real time, Micro, SecurCore. 37 registers 32-bit)
- Bootloader U-boot (RAM data lost when turn off, need to store in Flash memory. When boot copy itself to
SDRAM and take control of it. It initializes most hardware)
- Linux (Process management, Memory management, File systems, Device control, Networking)
- Android 101 (Activity – screen, Service – background, Content provider – data)
- Dalvik (Virtual machine on Android, .dex, register-based architecture)
- Android internals (WebKit – internet, SQLite – database, SGL/OpenGL-ES – graphics, OpenCORE – media)
2. BIT & INT
- why bits, byte, data size
- binary Adder (should be in 4. logic design)
- boolean algebra, logical operations
- shift
- byte ordering (big/little endian)
- unsigned, 2’s complement
- umax, umin, tmax, tmin
- mapping
- sign extension
- addition, overflow
3. FLOAT
- IEEE Standard 754
- encoding (sign bit, exp field, frac field)
- single 1 8 23, double 1 11 52
- normalized E = exp – Bias, M = 1.xxxxxx
- denormalized E = 1 – Bias, M = 0.xxxxxx, why?
- special (Inf, NaN)
- rounding
4. LOGIC DESIGN
- logic gates (and, or, not)
- bit equality, word equality
- bit-level multiplexor, word multiplexor
- ALU, + - & ^, OF ZF CF
- bistable element, R-S latch, 1-bit latch, edge-triggered latch, registers
- state machine (accumulator circuit)
- RAM
5. MU0
- ISA
- processor (a finite-state automation that executes instructions held in a memory)
- MU0 (PC, ACC, ALU, IR, control logic)
- ISA (16-bit machine, 12-bit address, instruction format, instruction set)
- instruction execution sequence (Fetch 2, Decode 1, Execute 3)
- logic design (datapath… RTL design, control logic… FSM approach)
- Datapath operation (2 stage… execution & initialization, “reset”. ALU output 00016 to PC)
- Control logic (Simple FSM, 2 state ‘fetch’ ‘execute’, 1 bit of state Ex/ft)
- Control logic table
- ALU Design (A+B A-B B B+1 0, 5 inst - 2 signal, 0 implemented by ‘reset’)
6. Machine I (Basics)
- IA-32 Intel 64, CISC (Complex Instruction Set Computer), RISC (Reduced), 1503 inst in x86
- ISA, microarchitecture
- CPU (PC, registers, condition codes), Memory (code, data, stack)
- registers
- operations
7. Machine II (Control)
8. Machine III (Procedures)
9. Machine IV (Data)
-