DIGITAL LOGIC DESIGN
EEE-241
Lab Report No. 1
Name
MUHAMMAD AYAZ
Registration
Number
FA18-BEE-085
Class
Instructor’s Name
BEE-2B
Sir.Adnan Qureshi
1
LAB 01
Introduction to Basic Logic Gate ICs on Digital Logic Trainer
and Proteus Simulation
Objective


To know about the basic logic gates, their truth tables, input-output characteristics and
analysing their functionality. Introduction to logic gate ICs, Integrated Circuits pin
configurations and their use.
Learn to use Proteus Software for Simulation of Digital Logic Circuits.
In-lab Task 1
Verify all gates using their ICs on KL-31001 Digital Logic Lab trainer
Input
Output
A
B
AND
OR
NAND
NOR
XOR
XNOR
0
0
0
0
1
1
0
1
0
1
0
1
1
0
1
0
1
0
0
1
1
0
1
0
1
1
1
1
0
0
0
1
NOT Gate Truth Table
Input
Output
0
1
1
0
2
In-Lab Task 2
Verify all the basic logic gates using the Proteus simulation tool and note down the values in
the Tables with the corresponding logic symbol and Boolean function.
AND Gate
U1
1
1
D1
AND
LED-GREEN
AND Gate
Truth Table
A
B
F = A. B
0
0
0
0
1
0
1
0
0
1
1
1
OR Gate
U2
0
1
D2
OR
LED-GREEN
U3
0
Truth Table
OR Gate
NOT
3
A
B
F=A+B
0
0
0
0
1
1
1
0
1
1
1
1
NAND Gate
U4
0
1
D4
NAND
LED-GREEN
NAND Gate
Truth Table
A
B
Output
0
0
1
0
1
1
1
0
1
1
1
0
NOR Gate
4
U5
0
0
D5
NOR
LED-GREEN
NOR Gate
Truth Table
A
B
Output
0
0
1
0
1
0
1
0
0
1
1
0
XOR Gate
U6
0
1
D6
XOR
LED-GREEN
XOR Gate
Truth Table
5
A
B
Output
0
0
0
0
1
1
1
0
1
1
1
0
XNOR Gate
U7:A
0
0
1
3
2
D7
4077
LED-GREEN
XNOR Gate
Truth Table
A
B
Output
0
0
1
0
1
0
1
0
0
1
1
1
NOT Gate
6
U3
0
D3
NOT
LED-GREEN
U6
NOT Gate
Truth Table
XOR
Input
Output
0
1
1
0
Post-Lab Task
Make a list of logic gate ICs of TTL family and CMOS family along with the ICs
names.
List of TTL Series
Series
Name
7400
quad 2-input NAND gate
741G00
single 2-input NAND gate
7401
quad 2-input NAND gate with open collector outputs
741G01
single 2-input NAND gate with open drain output
7402
quad 2-input NOR gate
741G02
single 2-input NOR gate
7
7403
quad 2-input NAND gate with open collector outputs
741G03
single 2-input NAND gate with open drain output
7404
hex inverter
741G04
single inverter
7405
hex inverter with open collector outputs
741G05
single inverter with open drain output
7406
741G06
hex inverter buffer/driver with 30 V open collector
outputs
single inverting buffer/driver with open drain output
7407
hex buffer/driver with 30 V open collector outputs
741G07
single non-inverting buffer/driver with open drain
output
quad 2-input AND gate
7408
List of CMOS Series
Series
Names
4000
Dual 3-input NOR gate + 1 Inverter
4001
Quad 2-input NOR gate
4002
Dual 4-input NOR gate
4006
18 stage Shift register
4007
Dual Complementary Pair Plus Inverter
4008
4 bit adder
4009
Hex inverting buffer
4010
Hex non-inverting buffer
8
4011
Buffered Quad 2-Input NAND gate
4012
Dual 4-input NAND gate
4013
Dual D-type flip-flop
4014
8-stage shift register
4015
Dual 4-stage shift register
4016
Quad bilateral switch
4017
Divide-by-10 counter (5-stage Johnson counter)
4018
Preset table divide-by-n counter
4019
Quad AND-OR Select Gate
Conclusion:
In this lab we learnt about the logic gate, truth table, logic diagram and also use Proteus
Software for Simulation of Digital Logic Circuits. In the first task of this lab we performed it
on the Digital Logic Lab trainer.we take switches as an input and LED as an output. We
observed the results with the help of LED and also verify the results with the truth table. In the
second task of this lab we performed the task 1 on the Proteus. In this software we made the
basic gates and verify the results.
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