EEE241
Digital Logic Design
CHAPTER NO. 3
DR. RIAZ HUSSAIN
ASSISTANT PROFESSOR
DEPARTMENT OF ELECTRICAL & COMPUTER ENGINEERING
COMSATS UNIVERSITY ISLAMABAD
Review

2
Define the following:

Closure, Associative law, Commutative law, Identity element, Inverse and Distributive

What is the difference between ordinary algebra and Boolean algebra w.r.t.
distributive law

What is a postulate?

What is “Duality” and what is its utility?

What is involution?

What is operator precedence rule for Boolean algebra?

How can you convert a Boolean expression in SoP canonical form to PoS canonical
form?

What are the standard SoP and PoS forms?

What is the truth table for XOR and XNOR gates

What are the digital logic families?

Define “fan out” and “propagation delay”?
Outline

Introduction to gate-level minimization

The map method

Four variable K-Map

PoS simplification

Don’t care condition

NAND and NOR implementation

Other two level implementations

XOR function

HDL
3
Must Reading
 Chapter
4
No. 3: Gate-Level Minimization
Introduction
5
“Gate-level minimization is the design task of finding an
optimal gate-level implementation of the Boolean functions
describing a digital circuit”

Manually difficult for several inputs

Logic synthesis tools can do it very efficiently and quickly,
BUT

Designer must understand underlying mathematical
description
“will enable you to execute a manual design of simple circuits,
preparing you for skilled use of modern design tools”
The Map Method
6

Truth table is unique, but algebraic expressions can be many

Rules for simplification of an algebraic expressions are intuitive and not
straight forward

Karnaugh map or K-map:


simple, straightforward procedure for minimizing Boolean functions

Diagram made of square

Each square represents one (1) min term

Enables visualize all possible ways of expressing a Boolean algebraic
function

Can give simplest expression
Simplest expression?

Minimum number of terms and with the smallest possible number of
literals in each term

expression produces a circuit diagram with a minimum number of gates
and the minimum number of inputs to each gate
Karnaugh Map

7
Adjacent Squares
 Number
 Each
of squares = number of combinations
square represents a minterm
 2 Variables 
4 squares
 3 Variables 
8 squares
 4 Variables 
16 squares
 Each
two adjacent squares differ in one variable
 Two
adjacent minterms can be combined together
Note: adjacent squares horizontally and vertically NOT diagonally
Example: F = x y + x y’
= x ( y + y’ )
=x
Two Variable K-Map

8
Example
x y
F
Minterm
0
0 0
0
m0
1
0 1
0
m1
2
1 0
0
m2
3
1 1
1
m3
xy
xy
xy
xy
m0
m1
m2
m3
0
1
y
y
x
x
0
0
0 xy
xy
0
1
1 xy
xy
… continued 2
Two Variable K-Map

9
Example
x y
F
Minterm
0
0 0
0
m0
1
0 1
1
m1
2
1 0
1
m2
3
1 1
1
m3
xy
xy
xy
xy
m0
m1
m2
m3
y
y
x
0
1
1
1
F  x yxyxy
( x  x) y x ( y  y )
x
0
1
0 xy
xy
1 xy
xy
Three-variable Map
x y z
Minterm
0
0 0 0
m0 x y z
1
0 0 1
m1
xyz
2
0 1 0
m2
3
0 1 1
m3
4
1 0 0
m4
5
1 0 1
m5
6
1 1 0
m6
x yz
x yz
xyz
xyz
xyz
7
1 1 1
m7
10
m0
m1
m3
m2
m4
m5
m7
m6
00
01
11
10
yz
x
0 x yz x yz x yz x yz
1 xyz xyz xyz xyz
Three-variable Map
• Example
x y z
F Minterm
11
m0
m4
m1
m5
m3
m7
m2
m6
00
01
11
10
yz
0 0 0 0
0 m0 x y z
1 0 0 1
0 m1 x y z
0 x yz x yz x yz x yz
2 0 1 0
1 m2 x y z
3 0 1 1
1 m3 x y z
1 xyz xyz xyz xyz
4 1 0 0
1 m4 x y z
5 1 0 1
1 m5 x y z
6 1 1 0
0 m6 x y z
7 1 1 1
0 m7 x y z
x
y
x
0
0
1
1
1
1
0
0
z
F  xy  xy
Three-variable Map
• Example
x y z
F Minterm
12
m0
m4
m1
m5
m3
m7
m2
m6
00
01
11
10
yz
0 0 0 0
0 m0 x y z
1 0 0 1
0 m1 x y z
0 x yz x yz x yz x yz
2 0 1 0
0 m2 x y z
3 0 1 1
1 m3 x y z
1 xyz xyz xyz xyz
4 1 0 0
1 m4 x y z
5 1 0 1
0 m5 x y z
6 1 1 0
1 m6 x y z
7 1 1 1
1 m7 x y z
x
y
x
0
0
1
0
1
0
1
1
z
F  xz  yz xy
Extra
Three-variable Map
• Example
x y z
F Minterm
0 0 0 0
0 m0 x y z
1 0 0 1
1 m1 x y z
2 0 1 0
0 m2 x y z
3 0 1 1
1 m3 x y z
4 1 0 0
0 m4 x y z
5 1 0 1
1 m5 x y z
6 1 1 0
0 m6 x y z
7 1 1 1
1 m7 x y z
x
13
y
0
1
1
0
0
1
1
0
z
F  x yzx yzxyzxyz
x z ( y  y)
xz
x z ( y  y)
xz
z
x
y
0
1
1
0
0
1
1
0
z
Three-variable Map
• Example
x y z
F Minterm
14
m0
m4
m1
m5
m3
m7
m2
m6
00
01
11
10
yz
0 0 0 0
1 m0 x y z
1 0 0 1
0 m1 x y z
0 x yz x yz x yz x yz
2 0 1 0
1 m2 x y z
3 0 1 1
0 m3 x y z
1 xyz xyz xyz xyz
4 1 0 0
1 m4 x y z
5 1 0 1
1 m5 x y z
6 1 1 0
1 m6 x y z
7 1 1 1
0 m7 x y z
x
y
x
1
0
0
1
1
1
0
1
z
F  z  xy
Four-variable Map
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
w
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
x
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
y
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
z
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
m0 m1 m 3 m2
m4 m5 m 7 m6
m12 m13 m15 m14
m8 m9 m11 m10
Minterm
m0
m1
m2
m3
m4
m5
m6
m7
m8
m9
m10
m11
m12
m13
m14
m15
wxyz
wxyz
wx yz
wx yz
wxyz
wxyz
wxyz
wxyz
wx y z
wx y z
wx y z
wx y z
wx y z
wx y z
wx y z
wx yz
15
yz
wx
00
01
11
10
00 w x yz w x yz w x yz w x yz
01 w xyz w xyz w xyz w xyz
11 wxyz wxyz wxyz wxyz
10 wx yz wx yz wxyz wx yz
Four-variable
Map
yz
• Example
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
w
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
x
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
y
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
z
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
wx
F
1
1
1
0
1
1
1
0
1
1
0
0
1
1
1
0
Minterm
m0
m1
m2
m3
m4
m5
m6
m7
m8
m9
m10
m11
m12
m13
m14
m15
wxyz
wxyz
wx yz
wx yz
wxyz
wxyz
wxyz
wxyz
wx y z
wx y z
wx y z
wx y z
wx y z
wx y z
wx y z
wx yz
00
01
11
10
16
00
01
11
10
w x yz
w xyz
wxyz
wx y z
w x yz
w xyz
wxyz
wx y z
w x yz
w xyz
wxyz
wxyz
w x yz
w xyz
wxyz
wx yz
y
w
1
1
1
1
1
1
1
1
0
0
0
0
z
F  y  wz  xz
1
1
1
0
x
Four-variable Map
17
•Example
Simplify: F = A’ B’ C’ + B’ C D’ + A’ B C D’ + A B’ C’
C
B
A
D
Four-variable Map
18
•Example
Simplify: F = A’ B’C’ + B’ C D’ + A’ B C D’ + A B’ C’
C
1
1
B
A
D
Four-variable Map
19
•Example
Simplify: F = A’ B’ C’ + B’ C D’ + A’ B C D’ + A B’ C’
C
1
B
A
1
D
Four-variable Map
20
•Example
Simplify: F = A’ B’ C’ + B’ C D’ + A’ B C D’ + A B’ C’
C
1
A
D
B
Four-variable Map
21
•Example
Simplify: F = A’ B’ C’ + B’ C D’ + A’ B C D’ + A B’ C’
C
B
A
1
1
D
Four-variable Map
22
•Example
Simplify: F = A’ B’ C’ + B’ C D’ + A’ B C D’ +
A B’ C’
C
1
A
1
1
1
1
1
1
D
F  B D  B C  A CD
B
Five-variable Map
DE
BC
00
01
11
10
00 m0
m1
m3
m2
00 m16 m17 m19 m18
01 m4
m5
m7
m6
01 m20 m21 m23 m22
11 m12 m13 m15
m14
10 m8
m10
B
D
m9
m11
DE
BC
00
23
C
B
D
01
11
10
11 m28 m29 m31 m30
10 m24 m25 m27 m26
E
E
A=0
A=1
C
Five-variable Map
A=0
A=1
24
Implicants
Implicant:
Gives F = 1
25
C
1
1
1
1
B
1
1
A
1
D
1
Prime Implicants
Prime Implicant:
Can’t grow beyond
this size
C
1
1
1
1
B
1
1
A
1
D
1
26
Essential Prime Implicants27
8 Implicants,
5 Prime implicants, 4 Essential prime implicants
Not essential
Essential Prime
Implicant:
No other choice
C
1
1
1
1
B
1
1
1
A
1
D
To ensure that a minimum solution is found, select essential prime
implicants first. Then find a minimum set of prime implicants that
cover the remaining 1's on the map.
28
Product of Sums Simplification
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
w
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
x
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
y
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
z
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
y
F F
1
1
1
0
1
1
1
0
1
1
0
0
1
1
1
0
0
0
0
1
0
0
0
1
0
0
1
1
0
0
0
1
w
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
0
z
y
w
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
0
z
F  ( y  z )  (w  x  y )
x
y
w
z
x
z
F
F  y w z x z
F  y z w x y
x F  y z  wx y
y
z
w
x
y
F
•Example
Don’t-Care Condition 29
1 if a quarter is deposited
A {
0 otherwise
1 if a dime is deposited
{0
1
C {
0
B
A
0
0
0
0
1
1
1
1
B
0
0
1
1
0
0
1
1
C
0
1
0
1
0
1
0
1
otherwise
if a nicle is deposited
otherwise
$ Value
$ 0.00
$ 0.05
$ 0.10
Not possible
$ 0.25
Not possible
Not possible
Not possible
You can only
drop one coin at
a time.
Used as
“don’t care”
Don’t-Care Condition
•Example
30
A
B
Logic
Circuit
F
C
A
0
0
0
0
1
1
1
1
B
0
0
1
1
0
0
1
1
C
0
1
0
1
0
1
0
1
F
0
1
0
x
1
x
x
x
F ( A, B, C )   (1, 4)
d ( A, B, C )   (3, 5, 6, 7)
Don’t care
what value F
may take
Don’t-Care Condition
•Example
A
F
B
C
B
A
0
1
x
0
1
x
x
x
C
F  A B C  AB C
F  AC
31
Don’t-Care Condition
• Example
F (w, x, y, z) = ∑(1, 3, 7, 11, 15)
d (w, x, y, z) = ∑(0, 2, 5)
x=0
x=1
x=1
y
x
32
1
1
x
1
x
y
x
0
x=0
x
x
0
x
x
1
w
0
0
0
0
0
0
w
1
z
F  yzwz
z
F  zwy
Tabulation Method
Input: f as a set of minterms
Output: f on as a set of
on
1.
2.
33
All Essential Prime Implicants
As Few Prime Implicants as Possible
Finding as few Prime Implicants as Possible
is an NP-Hard Problem!!!!!
•
•
Reduces to the “Set Covering” Problem for Unate Functions
Unate function – a constant or is represented by a SOP using
either uncomplemented or complemented literals for each
variable
Reduces to the “Minimum Cost Assignment” Problem for Binate
Functions (ex. EXOR)
This is 2-Level (SOP) Optimization (Minimization)
Tabulation Method
•
STEP 1:
–
•
Convert Minterm List (specifying f on) to Prime Implicant List
STEP 2:
–
–
•
34
Choose All Essential Prime Implicants
If all minterms are covered
HALT
Else
GO To STEP 3
STEP 3:
–
–
–
Formulate the Reduced Cover Table Omitting the rows/cols of EPI
If Cover Table can be Reduced using Dominance Properties, Go To Step 2
Else Must Solve the “Cyclic Cover” Problem
1) Use Exact Method (exponentially complex)
2) Use Heuristic Method (possibly non-optimal result)
NOTE: “Quine-McCluskey” Refers to Using a “Branch and Bound” Heuristic
NOTE: “Petrick’s Method” is Exact Technique – Generates all Solutions
Allowing the Best to be Used
Tabulation Method – STEP 1
35
1.
Partition Prime Implicants (or minterms) According to Number of 1’s
2.
Check Adjacent Classes for Cube Merging Building a New List
3.
If Entry in New List Covers Entry in Current List – Disregard Current
List Entry
4.
If Current List = New List
HALT
Else
Current List  New List
New List  NULL
Go To Step 1
STEP 1 - EXAMPLE
36
f on = {m0, m1, m2, m3, m5, m8, m10, m11, m13, m15} =  (0, 1, 2, 3, 5, 8, 10,
11, 13, 15)
Minterm
0
1
2
8
3
5
10
11
13
15
0
0
0
1
0
0
1
1
1
1
Cube
0 0
0 0
0 1
0 0
0 1
1 0
0 1
0 1
1 0
1 1
0
1
0
0
1
1
0
1
1
1
STEP 1 - EXAMPLE
37
f on = {m0, m1, m2, m3, m5, m8, m10, m11, m13, m15} =  (0, 1, 2, 3, 5, 8, 10,
11, 13, 15)
Minterm
0
1
2
8
3
5
10
11
13
15
0
0
0
1
0
0
1
1
1
1
Cube
0 0
0 0
0 1
0 0
0 1
1 0
0 1
0 1
1 0
1 1
0
1
0
0
1
1
0
1
1
1










Minterm
0,1
0,2
0,8
1,3
1,5
2,3
2,10
8,10
3,11
5,13
10,11
11,15
13,15
0
0
0
0
0
1
1
1
1
Cube
0 0
0 0 0
0 - 0
0 1
0 1
0 0 1
1 0
0 1
- 1
1 -
0
0
1
1
0
0
1
1
1
1
STEP 1 - EXAMPLE
38
f on = {m0, m1, m2, m3, m5, m8, m10, m11, m13, m15} =  (0, 1, 2, 3, 5, 8, 10,
11, 13, 15)
Minterm
0
1
2
8
3
5
10
11
13
15
0
0
0
1
0
0
1
1
1
1
Cube
0 0
0 0
0 1
0 0
0 1
1 0
0 1
0 1
1 0
1 1
0
1
0
0
1
1
0
1
1
1










Minterm
0,1
0,2
0,8
1,3
1,5
2,3
2,10
8,10
3,11
5,13
10,11
11,15
13,15
0
0
0
0
0
1
1
1
1
Cube
0 0
0 0 0
0 - 0
0 1
0 1
0 0 1
1 0
0 1
- 1
1 -
0
0
1
1
0
0
1
1
1
1









Minterm
0,1,2,3
0,8,2,10
2,3,10,11
0
-
Cube
0 0 0 1
0
-
STEP 1 - EXAMPLE
39
f on = {m0, m1, m2, m3, m5, m8, m10, m11, m13, m15} =  (0, 1, 2, 3, 5, 8, 10,
11, 13, 15)
Minterm
0
1
2
8
3
5
10
11
13
15
0
0
0
1
0
0
1
1
1
1
Cube
0 0
0 0
0 1
0 0
0 1
1 0
0 1
0 1
1 0
1 1
0
1
0
0
1
1
0
1
1
1










Minterm
0,1
0,2
0,8
1,3
1,5
2,3
2,10
8,10
3,11
5,13
10,11
11,15
13,15
0
0
0
0
0
1
1
1
1
Cube
0 0
0 0 0
0 - 0
0 1
0 1
0 0 1
1 0
0 1
- 1
1 -
0
0
1
1
0
0
1
1
1
1




PI=D




PI=E

PI=F
PI=G
Minterm
0,1,2,3
0,8,2,10
2,3,10,11
0
-
Cube
0 0 0 1
0
-
PI=A
PI=C
PI=B
Question: Can
this be done on a
CCM? How
modified?
f on = {A,B,C,D,E,F,G} = {00--, -01-, -0-0, 0-01, -101, 1-11, 11-1}
STEP 2 – Construct Cover Table
•
PIs Along Vertical Axis (in order of # of literals)
•
Minterms Along Horizontal Axis
A
B
C
D
E
F
G
0
x
1
x
x
x
2
x
x
x
3
x
x
5
8
10
11
x
x
x
x
x
x
NOTE: Table 4.2 in book is incomplete
13
15
x
x
x
x
x
40
STEP 2 – Finding the Minimum Cover
41
•
Extract All Essential Prime Implicants, EPI
•
EPIs are the PI for which a Single x Appears in a Column
A
B
C
D
E
F
G
0
x
1
x
x
x
2
x
x
x
3
x
x
5
8
10
11
x
x
x
x
13
x
x
15
x
x
x
x
x
•
C is an EPI so: f on={C, ...}
•
Row C and Columns 0, 2, 8, and 10 can be Eliminated
Giving Reduced Cover Table
•
Examine Reduced Table for New EPIs
STEP 2 – Reduced Table
42
Distinguished Column
A
B
C
D
E
F
G
A
B
D
E
F
G
0
x
1
x
2
x
x
x
x
3
x
x
x
5
8
10
11
x
x
x
x
x
x
13
Essential row
x
x
x
1
x
x
3
x
x
5
11
13
15
x
x
x
x
x
x
15
x
x
x
x
•The Row of an EPI is an
Essential row
•The Column of the Single x in
the Essential Row is a
Distinguished Column
Row and Column Dominance
43
•
If Row P has x’s Everywhere Row Q Does
Then Q Dominates P if P has fewer x’s
•
If Column i has x’s Everywhere j Does
Then j Dominates i if i has fewer x’s
•
If Row P is equal to Row Q and Row Q does not cost more than Row
P, eliminate Row P, or if Row P is dominated by Row Q and Row Q
Does not cost more than Row P, eliminate Row P
•
If Column i is equal to Column j, eliminate Column i or if Column i
dominates Column j, eliminate Column i
STEP 3 – The Reduced Cover Table
•
Initially, Columns 0, 2, 8 and 10 Removed
A
B
D
E
F
G
1
x
x
3
x
x
5
11
13
15
x
x
x
x
x
x
x
x
•
No EPIs are Present
•
No Row Dominance Exists
•
No Column Dominance Exists
•
This is Cyclic Cover Table
•
Must Solve Exactly OR Use a Heuristic
44
The Cyclic Cover Table
45
•
•
For now, we Arbitrarily Choose a PI
Later we will Study Exact and Heuristic Methods
A
B
D
E
F
G
1
x
x
3
x
x
5
11
13
15
x
x
x
x
x
x
x
x
•
Arbitrarily Choose F so: fon={C, F, ...}
This Choice May Lead to a Non-Optimal Result!!!!
•
Form Reduced Cover and Go To Step 2
STEP 3 – Dominance
•
Initially, Reduced Table has Columns 11 and 15
Removed
1 3 5 13
A x x
B
x
D x
x
E
x x
G
x
•
G is Dominated by E
•
B is Dominated by A
•
Form Reduced Cover Table and Go To Step 2
46
STEP 2 – The Reduced Cover
•
Initially, Table has Rows G and B Removed
A
D
E
1
x
x
3
x
•
Secondary EPIs – A and E
•
All Columns Covered
•
Eliminate D
•
fon={C, F, A, E}
5
13
x
x
x
47
Result Check
cd
ab
00
cd
00
01
11
10
1
1
1
1
01
1
11
1
10
48
1
1
1
1
ab
00
00
01
11
10
1
1
1
1
01
1
11
1
10
Initial Minterm List
fon = {m0, m1, m2, m3, m5, m8, m10, m11, m13, m15}
=  (0, 1, 2, 3, 5, 8, 10, 11, 13, 15)
1
1
1
1
Final Result
f on={A, C, E, F}
• One Type
Universal Gates
49
– Use as many as you need (quantity), but one type only.
• Perform Basic Operations
– AND, OR, and NOT
• NAND Gate
– NOT-AND functions
– OR function can be obtained from AND by Demorgan’s
• NOR Gate
– NOT-OR functions (AND by Demorgan’s)
Digital circuits are frequently constructed with NAND or NOR gates rather
than with AND and OR gates.
NAND and NOR gates are easier to fabricate with electronic components and
are the basic gates used in all IC digital logic families.
Universal Gates
50
• NAND Gate
– NOT:
A
F=A
– AND: A
F=A•B
B
– OR:
DeMorgan’s
A
F=A+B
B
Universal Gates
51
• NOR Gate
– NOT: A
– OR:
– AND:
F=A
A
B
F=A+B
DeMorgan’s
A
F=A•B
B
52
NAND & NOR Implementation
• Two-Level Implementation
A
B
A
B
A
B
F
C
D
F
C
D
A
B
F
C
D
A
B
F
F
C
D
C
D
A
B
F
C
D
53
NAND & NOR Implementation
• Two-Level Implementation
A
B
A
B
A
B
F
C
D
F
C
D
A
B
F
C
D
A
B
F
F
C
D
C
D
A
B
F
C
D
54
NAND & NOR Implementation
• Multilevel NAND Implementation
C
D
B
A
B
C
F
C
D
B
A
B
C
C
D
B
A
B
C
F
F
55
NAND & NOR Implementation
• Multilevel NOR Implementation
A
B
A
B
C
D
F
A
B
A
B
F
C
D
A
B
A
B
C
D
F
Gate Shapes
• AND
• OR
• NAND
• NOR
56
Other Implementations
57
NAND and NOR logic implementations are the most
important from a practical point of view
• Some (but not all) NAND or NOR gates allow the
possibility of a wire connection between the outputs
of two gates to provide a specific logic function,
Wired Logic
• e.g.
1. OR-OR
OR
With
AND, OR, NAND and NOR gates how many two
58
1. OR-AND

2.
3. OR-NOR
NOR
levels
implementations are possible?
24 = 16
AND-OR-Invert
2. OR-NAND

4.
OR-NAND
Other Implementations
•
3.

5.
6.
4.

7.
8.
•
AND-OR
AND-AND
AND
AND-NOR
AND-NOR
AND-NAND
NAND
5. NOR-OR

9.
NOR-OR
OR-AND-Invert
10. NOR-AND
NOR
6. NOR-NOR

11.
12. NOR-NAND
OR
13. NAND-OR
NAND
7. NAND-AND

14.
NAND-AND
15. NAND-NOR
AND
8. NAND-NAND

16.
The remaining
--Those
reduced to 8 a are
single
 NAND-AND
and
Nondegenerate
forms
operation
are AND-NOR
called are
--equivalent
• SoP form
or
Degenerate

OR-NAND
and
NOR-OR are
 F = (AB+CD+E)’
• PoS
equivalent
 AND-OR-INVERT
 F = [(A+B)(C+D)E)]’
 OR-AND-INVERT
Implementations Summary59
• Sum Of Products:
– AND-OR
– AND-OR-Invert = AND-NOR = NAND-AND
• Products Of Sums
– OR-AND
– OR-AND-Invert = OR-NAND = NOR--OR
Exclusive-OR
60
• XOR
F=xy=xy+xy
x
x
F
F
y
y
• XNOR
F = x  y = x y = x y + x y
x
x
F
y
F
y
Exclusive-OR
61
• Identities
–x0=x
–x1=x
–xx=0
–xx=1
–xy=xy=xy
x
0
0
1
1
• Commutative & Associative
–xy=yx
–(xy)z=x(yz)=xyz
y
0
1
0
1
XOR
0
1
1
0
Exclusive-OR Functions 62
• Odd Function
F=xyz
F = ∑(1, 2, 4, 7)
x
y
z
F
• Even Function
F=xyz
F = ∑(0, 3, 5, 6)
x
y
z
x
y
z
XOR
XNOR
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
1
0
1
0
0
1
1
0
0
1
0
1
1
0
yz
x
F
00
01
11
10
0
0
1
0
1
1
1
0
1
0
Parity
1
0
1
0
1
0
0
0
1
0
1
0
1
Parity
Generator
63
1
0
0
0
1

Parity
Checker
Parity Generator
• 1 Odd Parity
64
1
0
1
0
0
1
0
1
• Even Parity
Odd number of
‘1’s
1
0
1
0
1
0
1
0
0
Even number of ‘1’s
Parity Checker
65
• 1 Odd Parity
0
1
0
1
• Even Parity
Error
Check
1
0
1
0
0
Error
Check
66
Practice Problems

3.1, 3.3, 3.5, 3.7, 3.9, 3.15, 3.16, 3.18,
3.22, 3.28

Convert the logic diagram of the circuit
shown in Fig. 4-4 into a multiple-level
NAND circuit.
z
D
C
y
B
x
A
w
Recommended Reading

Acknowledgement and References:

Chapter No. 3 Digital Design with Verilog By M. Mano and Ciletti

These slides are obtained from Princess Sumaya University, Computer
Engineering Department Course 4241-Digital Logic Design
67