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ECE 401 Notes
Power Electronics
Part A
Chapters 1 - 17
John Salmon and Ali Khajehoddin
Fall 2015
Copyright © August 2015 by the University of Alberta
All rights reserved. No part of this publication may be reproduced, stored in a retrieval
system, or transmitted, in any form or by any means, electronic, mechanical, photocopying,
recording or otherwise, without the prior permission of the University of Alberta.
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Contents
Exam Formulas ........................................................................................................................................................5
1
Power Semiconductors ........................................................................................................................................16
1.1 Technical specifications of the main power semiconductor types ........................................................16
1.2 V-I-F ratings of the main power semiconductors.....................................................................................17
1.3 SiC and GaN Devices ......................................................................................................................................18
2
Diodes.......................................................................................................................................................................19
2.1 Diode Model......................................................................................................................................................19
2.2 Series Connection of Diodes .......................................................................................................................20
2.3 Parallel Connection of Diodes ......................................................................................................................21
2.4 Examples ..........................................................................................................................................................22
3
Thyristor ................................................................................................................................................................24
3.1 Power Semiconductor Structure ................................................................................................................24
3.2 Power Semiconductor Switching Characteristics..................................................................................25
3.3 Power Semiconductor V-I Characteristics .............................................................................................25
3.4 Gate-Drives .....................................................................................................................................................27
3.5 Examples ..........................................................................................................................................................29
4
BJT and MOSFET ...............................................................................................................................................30
4.1 BJT Transistor ................................................................................................................................................31
4.2 MOSFET Power Semiconductor .................................................................................................................34
4.3 Summary ..........................................................................................................................................................37
5
MOSFET & BJT Input Drivers & Snubbers ...............................................................................................39
5.1 BJT ....................................................................................................................................................................39
5.2 MOSFET ..........................................................................................................................................................42
6
IGBT ........................................................................................................................................................................48
6.1 Semiconductor Device...................................................................................................................................49
6.2 Gate Drive ........................................................................................................................................................51
6.3 Miller-Effect ..................................................................................................................................................52
6.4 Short-circuit Behaviour ...............................................................................................................................53
6.5 Problems associated with the high switching speeds of IGBTs ........................................................55
7
SiC and GaN ..........................................................................................................................................................57
7.1 General characteristics of the new devices ....................................................................................................57
7.2 Timelines for the introduction of the new technologies ................................................................................59
7.3 Market for the new devices .............................................................................................................................................................61
7.4 Application Examples ..........................................................................................................................................................................63
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7.5 Predictions of the future for the new devices ......................................................................................65
8
AC/DC/RMS of Waveforms .............................................................................................................................66
8.1 RMS of a repetitive voltage waveform v(t) .............................................................................................66
8.2 RMS of a repetitive current waveform i(t) ............................................................................................67
8.3 RMS components of a repetitive voltage waveform v(t) .....................................................................68
8.4 AC/DC and RMS components of a repetitive current waveform i(t)................................................69
8.5 RMS/DC/AC of a general periodic pulse current waveform ..............................................................70
8.6 Examples ..........................................................................................................................................................72
9
Steady-State Properties of Power, L & C .................................................................................................76
9.1 Power Dissipation and Power Flow ..............................................................................................................76
9.2 Power Absorbed in a DC Voltage Source .................................................................................................76
9.3 Power drawn from a Sinusoidal Voltage Source .....................................................................................77
9.4 Inductor ...........................................................................................................................................................79
9.5 Capacitor ..........................................................................................................................................................79
10 1-phase Diode Rectifiers with R-loads ........................................................................................................81
10.1 Half-Wave With an R-Load ........................................................................................................................81
10.2 1-phase Full-Wave Diode Rectifier: R-load ...........................................................................................82
10.3 R-load Vs is small (e.g. 5-30 V, VDon taken into account, θc < 180°) ..................................................84
10.4 R-load Vs is large (Vs >> VDon, say Vs > 30V, and assume θc = 180°, α = 0°) .......................................85
10.5 R-E load (conduction angle = θc , zero current angle α) .....................................................................87
10.6 Examples ........................................................................................................................................................89
11 1-phase Full-Wave Diode Rectifiers ............................................................................................................94
11.1 Full-Wave with an R-L load .........................................................................................................................94
11.2 Full-Wave with an LC output filter ..........................................................................................................94
11.3 Full-Wave with an R-L output filter and a dc voltage .........................................................................94
11.4 Examples .........................................................................................................................................................95
12 1-phase Diode Rectifier with a C-Filter ...................................................................................................101
12.1 Circuit Operation.........................................................................................................................................101
12.2 Analysis Assumptions ................................................................................................................................102
12.3 Capacitor peak-peak ripple voltage and rms of the ripple voltage ...............................................103
12.4 Rectifier Average Output Voltage ........................................................................................................104
12.5 Diode Conduction Angle ............................................................................................................................105
12.6 Peak Charging Current .............................................................................................................................106
12.7 Peak Capacitor Charging Current and the average rectifier output current..............................106
12.8 Supply rms current and capacitor rms current ..................................................................................107
12.9 Example of the Process for Circuit Design .........................................................................................107
12.10 Commonly used Rectifier Configurations ...........................................................................................108
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13 Design Examples: 1-ph Diode Rectifier with a C Filter ......................................................................109
Examples ...............................................................................................................................................................109
14 Power Quality Definitions for Utility Rectifiers .....................................................................................115
14.1 Concept of steady-state power quality .................................................................................................115
14.2 Power Factor ................................................................................................................................................116
14.3 Harmonic Distortion...................................................................................................................................117
14.4 1-phase Rectifier Example .......................................................................................................................118
14.5 Examples ......................................................................................................................................................120
15 3-phase diode rectifiers .................................................................................................................................124
15.1 Definitions of waveforms used in the 3-phase voltage supply ........................................................124
15.2 Operation of the basic 3-phase dido rectifier ..................................................................................125
15.3 Analysis of the Output voltage Waveform ..........................................................................................127
15.4 Ideal performance of the 3-phase diode rectifier with an LC output filter & L→∞ ...............128
16 3-phase diode rectifier with an LC DC filter ..........................................................................................131
Examples ................................................................................................................................................................131
17 3-phase diode rectifiers using ac reactors .............................................................................................136
17.1 Operation with no ac reactors (Ls = 0, Ldc = 0) ....................................................................................136
17.2 Operation when using ac reactors (Ldc = 0) .........................................................................................137
17.3 Performance when using ac reactors and assuming Ldc = 0..............................................................138
17.4 Performance when using ac reactors and assuming Ldc = ∞ .............................................................140
17.5 Examples ......................................................................................................................................................142
Sample Mid-Term ....................................................................................................................................................145
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Exam Formulas
Waveforms Calculations and Power Quality
(a) 1-phase ac supply harmonics and power quality
Power Factor: PF =
P I1
= cosφ1 = CDF × DPF
S Is
⎛ E + VDon ⎞
α = a sin ⎜
, θc = π − 2α, θoc = (180 − 2α ) °
⎝ 2Vs ⎟⎠
Vs2
2 2
α⎞
2 ⎛1
sin 2α −
Vs ( E + VDon ) cosα + ⎡Vs2 + ( E + VDon ) ⎤ ⎜ − ⎟
⎣
⎦⎝ 2 π ⎠
2π
π
Io,rms =
1
R + rD
Apparent Power: S = Vs Is
Io,dc =
Is = I12 + I22 + I23 + I24 + I25 + .... , Is = I12 + I2H , IH = I22 + I23 + I24 + ....
I
Current Distortion Factor: CDF = 1
Is
I
Displacement Power Factor: DPF = FPF = cosφ1 = 1r
I1
IH
IH
% , THD F = 100
%
ac supply current: THD R = 100
IS
I1
1 ⎡ 2
⎛ 1 α⎞ ⎤
Vs cosα − [ E + VDon ] ⎜ − ⎟ ⎥
⎢
⎝ 2 π⎠⎦
R + rD ⎣ π
(ii) Full-wave R/E load (R-load has E = 0) (4 diodes)
Real Power Flow: P = Vs Is1r = Vs I1 cosφ1
THD F
THD R =
CDF =
1+ THD 2F
1
1+ THD 2F
, THD F =
THD R
1− THD 2R
, CDF = 1− THD
2
R
(b) Basic Waveform Calculation
Harmonics of a square-wave of voltage magnitude Vo:
Vn,pk = Vo
4
2 2
, n = 1, 3,5, 7,9,11,13 etc... , Vn,rms = Vo
nπ
nπ
Power drawn from a dc source Vdc: P = Vdc × Idc
Power drawn from an ac source V1: P = V1 × I1 × cosφ1
Power dissipated in a resistor V1: PR = I2rms × R
RMS of a voltage with 2 components V1(t), V2(t):
2
2
Vrms = V1,rms
+ V2,rms
= V12 + V22
2
+ I22,rms + I23,rms + ...
In general: Irms = I2dc + I1,rms
⎛ E + 2VDon ⎞
α = a sin ⎜
, θc = π − 2α, θoc = (180 − 2α ) °
2Vs ⎟⎠
⎝
Vs2
4 2
2α ⎞
2 ⎛
sin 2α −
Vs ( E + 2VDon ) cosα + ⎡Vs2 + ( E + 2VDon ) ⎤ ⎜ 1−
⎟
⎣
⎦⎝
π
π
π ⎠
Io,rms =
1
R + 2rD
Io,dc =
1 ⎡2 2
⎛ 2α ⎞ ⎤
Vs cosα − [ E + 2VDon ] ⎜ 1−
⎢
⎟⎥
⎝
R + 2rD ⎣ π
π ⎠⎦
(iii) Half-Wave Approx Approach R-Load
Vo,dc ≈ 0.45Vs − δ cVDon , Vo,rms ≈ Vs
2 − δ c VDon
(iv) Full-Wave Approx Approach R-Load
Vo,dc ≈ 0.9Vs − 4δ cVDon , Vo,rms ≈ Vs − 2δ c × 2VDon
(b) R-Load neglecting θc and α
Io,rms =
Vo.rms
V
, Io,dc = o.dc
R
R
(i) Half-Wave R-Load: Vo,dc ≈
2
V − VDon
Vs − 0.5VDon , Vo,rms ≈ s
π
2
(ii) Full-Wave R-Load: Vo,dc ≈
2 2
Vs − 2VDon = 0.9Vs − 2VDon ,
π
Vo,rms ≈ Vs − 2VDon
1-Phase diode rectifier continuous conduction
Irms = I2dc + I12 + I22 + I23 + ... = I2dc + I12 + I2H
For simplicity, the equations given neglect VDon
IH = I22 + I23 + I24 + ... , Iac = I12 + I22 + I23 + ... = I2rms − I2dc
Z = R 2 + ( ωL ) , tanφ =
A current ramping between Ip and Im has an rms/dc/ac:
(a) Full-Wave R/L Load continuous conduction
Irms =
I +I
1 2
Ip + Ip Im + I2m , Idc = p m , Iac = I2rms − I2dc
3
2
(
)
A current lasting for δ of a cycle has an rms/dc/ac of:
Irms =
⎛I +I ⎞
δ 2
Ip + Ip Im + I2m , Idc = δ ⎜ p m ⎟ , Iac = I2rms − I2dc
⎝ 2 ⎠
3
(
)
2
2 2
VS = 0.9VS , VO,rms = VS ,
π
4
VOn
VOn = 2
VS n = 2, 4,6,8.... IOn =
n = 2, 4,6,.... ,
2
2
n −1 π
R + ( nωL )
VO,dc =
(
IO,ac ≈
1-phase diode rectifier: R and R-E load
(a) Including the effect of θc and α
(i) Full-wave R/E load (R-load has E = 0) (2 diodes)
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ωL
R
)
VO2
R 2 + ( 2ωL )
2
(b) Full-Wave LC filter, R load, continuous conduction
! VO,dc =
2 2
VS = 0.9VS ,! VO,rms = VS
π
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! VOn =
(
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(e) Commutation Overlap
4
V
VS n = 2, 4,6,8.... , ! IOn = On n = 2, 4,6,8....
nωL
n −1 π
2
)
4
V
VS ≈ 0.424VS , ! IO,ac ≈ IO2 = O2
3π
2ωL
(c) Full-Wave R./L Load, cont. cond., ripple free
FPF = cos Φ1 = cos α
⎛
2IDC Xs ⎞
! µ = a cos ⎜ 1−
, VO,dc = 1.35VLL − 0.955IDC XS
VLL: ⎟⎠
⎝
! VO2 =
! Pin =
! DPF =
1+ cosµ
, PF ≈ 0.955 × DPF
2
SCR Snubber
2 2
VSIDC , IS = IDC , S = VSIDC
π
! ωo =
Pin 2 2
2 2
=
, CDF =
, DPF = 1
S
π
π
2 2
8
! IS1 =
IDC , IH = IDC 1− 2
π
π
THDF = 0.48, THDR = 0.44
! PF =
!ω =
1
R
, α=
,τ = RC
2L
LC
1
R2
α R C
− 2 = ω o 1− δ 2 , δ =
=
=
LC 4L
ωo 2 L
R
L
2
C
(d) Full-Wave Capacitor Smoothed
I ⎛ θ ⎞
V
! VR = DC ⎜ 1− c ⎟ , ! VR,rms = R
2fSC ⎝
π⎠
2 3
When the damping constant has ẟ < 0.5 (underdamped):
dv
/dt = maximum when cos ωt = ẟ( 3 - 4ẟ2 )
⎛ −δ ⎞
VR
⎛
V ⎞
− 2VDon , ! Vm = 2VS ,
θc = 2 × a cos ⎜ 1− R ⎟
2
2VS ⎠
⎝
⎛ 180 ⎞
2θ
! Im = 1.57 ⎜ o ⎟ Idc , ! IO,dc = 2c Im , ! IO,dc = IDC
π
⎝ θc ⎠
⎜
⎟ a cos ⎡⎣δ( 3−4δ ) ⎤⎦
2
dVo
(max) = E × ω o × e ⎝ 1−δ ⎠
dt
When ẟ > 0.5 (critically or over-damped):
dVo
4δ 2
E×R
1
(max) = E × ω o × 2δ =
E=
, δ≥
dt
τ
L
3
4δ 2 E
L × Smax
δ ≥ 0.5 : C =
, R=
R × Smax
VS
! VDC = Vm −
⎛ 180 ⎞
⎛ 180 ⎞
! IO,rms = IS = IDC 1.234 ⎜ o ⎟ , ! IC = IS = IDC 1.234 ⎜ o ⎟ − 1
θ
⎝ c ⎠
⎝ θc ⎠
Ip =
⎛ −δ ⎞
⎟ a cos[ δ ]
1−δ 2 ⎠
⎜
E
× 2δ × e ⎝
R
⎛
Vo,max = E × ⎜ 1+ e
⎝
3-phase diode rectifier
2δ
1−δ 2
2
, For δ ≤ 1, Ip ≈
a cos ⎡⎣ 2δ 2 −1⎤⎦
E
2δ
×
R
1− δ 2
⎞
2
⎟ , PR = CVpk fs
⎠
(a) Performance when the output current is ripple-free
3
! S = 2VLL IDC , ! PF = , ! Vo,dc = 1.35VLL − 2VDon
π
2
6
IDC , ! IH = 0.24IDC , ! IS =
IDC
! In =
nπ
3
! THD F = 31% , ! THD R = 31%
(b) Continuous Conduction Operation
3 2
3 3
VLL − 2VDon , ! Vo,rms = VLL 1+
− 2VDon
π
2π
6
6
5.5
! Von = 2
VLL ,n = 6, 12, 18,... ,! Vo6 =
VLL ≈
VLL
35π
100
n −1 π
! Vo,dc =
(
)
(c) half-wave
3
VLL − VDon
! Vo,dc =
2π
(d) definition of base values for using per-unit
! Vbase = VLL , fbase = 60 Hz, Pbase = rectifier input power
! Ibase =
Pbase
VLL
V2
, X base = R base =
= LL
3VLL
3Ibase Pbase
! L base =
2
VLL
L
, L pu =
2πfs Pbase
L base
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!
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1-phase full-wave regulator
R-load: Vo,rms = VS
π−α+
π
sin 2α
2
Inr =
Ib ⎛ sin ( n + 1) α sin ( n − 1) α ⎞
+
n = 3, 5, 7,...
π ⎜⎝
n +1
n − 1 ⎟⎠
Ini =
Ib ⎛ 1− cos ( n − 1) α 1− cos ( n + 1) α ⎞
−
⎟⎠ n = 3, 5, 7,...
π ⎜⎝
n −1
n +1
I1r =
Ib ⎛
sin 2α ⎞
Ib ⎛ cos 2α − 1 ⎞
VS
⎜π−α+
⎟ , I1i = ⎜⎝
⎟⎠ , Ib =
π⎝
2 ⎠
π
2
R
R-L Load: VO,rms = VS
β − α sin 2β − sin 2α
−
π
2π
solve for β where: sin (β − φ ) − sin ( α − φ ) e
(α−β)
tanφ
=0
⎛ ωL ⎞
φ = a tan ⎜
⎝ R ⎟⎠
3-phase ac regulators: Y connected R-load
pu
VO,rms
= 1−
VOpu
3α 3
+
sin 2α,0 ≤ α ≤ 60°
2π 4π
pu
VO,rms
=
1 9
3 3
+
sin 2α +
cos 2α, 60° ≤ α ≤ 90°
2 8π
8π
pu
VO,rms
=
5 3α 3
3 3
−
+
sin 2α +
cos 2α, 90° ≤ α ≤ 150°
4 2π 8π
8π
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Thyristor Firing angle - α
Heatsinks
t j − t a = PD × ⎡⎣ R jc + R ca / / ( R ch + R ha ) ⎤⎦
tj = junction temperature: °C, tc = case temperature: °C
th = heatsink temperature: °C, ta = ambient temperature:
Rjc = junction to case thermal resistance °C/W
Rca = case to ambient thermal resistance °C/W
Rch = case to heatsink thermal resistance °C/W
Rha = heatsink to ambient thermal resistance °C/W
PD = power semiconductor power loss - W
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Performance of 1-phase AC regulator with an R-L Load
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Firing Angle -
α
Firing Angle -
α
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Power Semiconductor Losses
Ip = Io +
ΔIo
ΔI
, Im = Io − o
2
2
(b) diode: PD = I2diode,rms rD + Idiode,dcVDon
1-phase H-bridge PWM Inverter
ΔIo
ΔI
, Im = Io − o
2
2
E
×
I
E × Im
p
P1 =
× t1 × fc watts, P2 =
× t 2 × fc watts
2
2
E × IO
Psw =
fc ( t1 + t 2 ) watts, if Ip = Im = IO
2
conduction losses
I +I
Pon = Von × Idevice,dc , Idevice,dc = δ p m
2
ma = maximum amplitude modulation depth = vs,pk/vc,pk
ma = maximum amplitude modulation depth= vs,pk / vc,pk
Vs,pk = peak of the sinusoidal reference signal
Vc,pk = peak of the triangular carrier signal
E = bridge dc-link voltage
VO = bridge output voltage
VO,1 = fundamental of VO
IO = bridge output current
DIO= pk-pk ripple current of IO L= bridge output inductance
mf = frequency modulation ratio= fc/f1
fc = freq. of the carrier f1 = freq. of the ref. signal
⎛ I2 + I I + I2 ⎞
Pon = I2device,rms × R on , Idevice,rms = δ ⎜ p p m m ⎟
3
⎝
⎠
fundamental output voltage: VO1 =
switching losses: Ip = Io +
(a) Unipolar pwm switching: 0,±E
Motoring: VO,dc = E a + Ia R a
ma
m
Vdc , VAN,1 = a Vdc
2
2 2
V
output pk-pk current ripple with an L filter: ΔIO = dc
8fc L
Regenerating: VO,dc = E a − Ia R a
Normalized rms voltage harmonics: Vbase = E
DC Choppers
E a = K × Φ f × ω r if the field flux Φ f varies
ma | n=
E a = K1 × ω r if the field flux Φ f is constant
Motor output torque: Te = K1 × Ia
Motor output power: Pe = E a × Ia = Te × ω r
Unipolar PWM: VO,dc
V
= δVDC , ΔIa = DC × δ (1− δ )
fc L a
Bipolar PWM: VO,dc = ( 2δ − 1) VDC , ΔIa =
VDC
× 2δ (1− δ )
fc L a
Discontinuous conduction with unipolar pwm
critical conduction has: ΔIa = 2IO,dc
V
=> ΔIa = δ (1− δ ) dc
fc L a
IfL
condition for always continuous conduction; 2 a c a ≥ 0.25
Vdc
range of ẟ for disc. cond., solve for ẟ in: δ 2 − δ + 2
load current: IO,ac =
Ia fc L a
=0
Vdc
ΔIa
2 3
switch currents:
Irms =
I +I
δ 2
Ip + Ip Im + I2m , Idc = p m , Iac = I2rms − I2dc
3
2
(
)
Assume: Ia = Imotor,dc = IO,dc
ΔI
ΔI
Ip = Ia + a , Im = Ia − a
2
2
(a) motor
PRa = I2motor,rms R a , PEa = Pe = E a × Ia
E a = VO,dc − Ia R a = δVdc − Ia R a , Te =
Pe
, Pin = PRa + PEa
ωr
2
R DSon BJT: PBJT = Iswitch,dc × VCE,on
(a) mosfet: Pmos = Iswitch,rms
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1
2mf± 1
2mf ± 3 2mf ± 5
0.1
0.07
0.069
0.001
0
0.2
0.142
0.135
0.002
0
0.3
0.212
0.189
0.007
0
0.4
0.283
0.231
0.017
0
0.5
0.354
0.255
0.031
0.001
0.6
0.425
0.262
0.05
0.003
0.7
0.495
0.25
0.073
0.005
0.8
0.566
0.222
0.098
0.009
0.9
0.636
0.18
0.125
0.015
1
0.707
0.128
0.15
0.024
(b) Bipolar pwm switching: ± E
ma
m
Vdc , VAN,1 = a Vdc
2
2 2
Vdc
pk-pk current ripple with an L filter ΔIO =
2fc L
fundamental output voltage: VO1 =
Normalized rms voltage harmonics (Vbase
= E)
ma | n=
1
mf
mf ± 2
mf ± 4
2mf ± 1 2mf ± 3 2mf ± 5
0.1
0.071
0.895
0.002
0
0.07
0.001
0
0.2
0.141
0.878
0.011
0
0.135
0.002
0
0.3
0.212
0.851
0.025
0
0.19
0.008
0
0.4
0.283
0.814
0.043
0
0.231
0.017
0
0.5
0.354
0.767
0.066
0.001
0.255
0.031
0.001
0.6
0.424
0.711
0.093
0.002
0.262
0.05
0.003
0.7
0.496
0.648
0.123
0.003
0.25
0.073
0.005
0.8
0.565
0.579
0.156
0.005
0.222
0.099
0.009
0.9
0.637
0.504
0.19
0.008
0.18
0.125
0.015
1
0.707
0.425
0.224
0.013
0.129
0.15
0.025
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DC DC Converters: Continuous Conduction: IO > IOB
I O ≥ I OB
G dc =
fc =
Vo
δ=
Vi
1
Tc
t ON
Tc
Buck
I base
pu
Boost
VO
2
2fcL
27
I OB
1 − G dc
G dc
δ
δ
G dc
ΔI L
Ip Im
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4
fcL
Im = IO −
VO
fcL
2fcL
G 3dc
ΔI L
2
ΔI L
2
)
(G
1
+1
dc
1
δ
1−δ
1−δ
1
G dc
1−
o
Ip = IO +
VO
27 G dc − 1
(V − V ) δ
i
(
×
Buck-Boost
G dc
Vi
fcL
Im = Ii −
2
G dc + 1
Vi
δ
Ip = Ii +
)
fcL
ΔI L
2
ΔI L
2
δ
Ip = Ii + IO +
Im = Ii + IO −
ΔI L
2
ΔI L
2
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DC DC Converters: Discontinuous Conduction: IO < IOB
I o < I oB
G dc =
Vo
Tc =
Vi
1
δ=
fc
tz = zero current period in discontinuous conduction
t ON
Tc
t1 = conduction period of the inductor current
t2 = current fall time
δ| =
δ
Δ1
=
δ
1−
tZ
Δ1 =
t1
Tc
=1−
tz
Δ2 =
T
t2
Tc
= Δ1 − δ
Tc
Buck
Boost
I base
VO
2
2fcL
27
Ipu
OB
1 − G dc
G dc
δ
I p = ΔI L
Δ1
Δ2
Ipu
O
ECE Dept. University of Alberta
δ
δ′ =
tz
1−
=
(
4
δ
1
Δ1
1 − δ′
1 − G dc
4
27
G dc
δ
=
Δ
(G
Δ1
Δ2
)
fcL
δ
G dc
2
1
Vi
δ
−δ
δ2
G dc
)
(
fcL
1 − G dc
2fcL
G dc G dc − 1 Ipu
O
o
δ
fcL
1−
(V − V ) δ
G dc
VO
3
=
T
i
VO
27 G dc − 1
Ipu
O
G dc
×
Buck-Boost
27
1 − δ′
=
+1
dc
Δ1 − δ
fcL
δ
G dc − 1
δ
)
Δ1
G dc
G dc
(
δ
G dc + 1
δ
G dc G dc − 1
=
δ
G dc − 1
δ2
2
δ
Vi
G dc
)
G dc Ipu
O
δ
1
4
δ′
1
1
G2dc
δ2
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1-Phase H-Bridge Performance Curves with Square-Wave Switching
Overlap Angle - α
E = dc-link voltage
VO = bridge output voltage VO,n = nth harmonic
α = overlap angle in deg./rad. VO,1 = fund. harmonic of VO
Vo,rms = rms of VO
n = nth harmonic
VO,n =
⎛ α⎞
Vdc cos ⎜ n ⎟ , n = 3, 5, 7, ...
n
⎝ 2⎠
0.9
⎛ α⎞
VO,1 = 0.9Vdc cos ⎜ ⎟
⎝ 2⎠
harmonics of a square-wave voltage magnitude Vo
assume perfect square wave, α = 0° , Vo = Vdc
Vn =
4
π
VO , n = 1, 3, 5, 7, 9, 11, 13, etc..
ΔI O,max =
⎛ V ⎞
Vdc ⎛
8⎞
dc
⎟
⎜ 1 − 2 ⎟ = 0.189 ⎜⎜
2fsL ⎝
π ⎠
2f
⎝ sL ⎟⎠
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Chapter 1: Power Semiconductors
1.1 Technical specifications of the main power semiconductor types
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1.2 V-I-F ratings of the main power semiconductors (source wikipedia power semiconductor page)
Fig. 1.1 power semiconductor with heatsink and electrical isolation
Fig. 2 Typical V-I-F switching ratings of the main power semiconductors
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1.3 SiC and GaN Devices (source IEEE APEC 2013 plenary session)
FOM is a Figure of Merit with consideration of power device conduction and switching losses,
thermal characteristics, and package. FOM is derived based on device theory.
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Chapter 2: Power Semiconductor Diodes
Diodes can be used in utility rectifiers to rectify mains ac voltage into dc, Part I of the class notes,
and in a huge variety of switch-mode power converters such as dc-dc converters and dc-ac converters,
see Part II of the class notes. The fundamental characteristics of power semiconductor diodes are
described in this chapter, with characteristics for switch-mode power supplies described in Part II.
The main application for a 1-phase diode rectifier is to provide a dc voltage supply for many electronicbased equipment. The most common 1-phase diode rectifier is the capacitor-smoothed full-wave diode
rectifier. The biggest application for 3-phase diode rectifiers are industrial drive systems. Several LC
filter combinations can be used in both the 1-phase and 3-phase diode rectifiers, primarily to reduce
device rms currents and also to improve the power quality of the rectifiers at its input terminals.
Understanding the operational characteristics of the power semiconductor diode is
necessary for understanding how the different types of diodes are used in different
circuits. Note that this section makes use of the current/voltage and power definitions
described in chapters 8 and 9 for the purpose of estimating the power losses in diodes.
2.1 Diode Model
The diode has an exponential V-I characteristic when conducting in the forward direction and
essentially does not conduct current in the reverse direction, until it reaches the breakdown region: the
latter is often considered a destructive operating region, see Fig. 2.1.
(a) forward bias
To understand the basic operation of the diode, consider the diode as being off unless a voltage
source tries to place a positive voltage drop across its terminals (Anode to Cathode).
(a) Actual Diode Characteristics
(b) Approximate Diode Characteristics
Fig. 2.1 Diode V-I Curve Characteristics
With a forward bias voltage greater than, VDon, the diode will conduct current as it is unable to hold
a forward voltage of more than 0.5 to 2.5 V (= typical values for power semiconductor diodes). The
exponential characteristic in the forward bias region means that the diode can be considered as
approximately having a constant forward conducting voltage of VDon, independent of the magnitude of
the current, see Figs. 2.1 and 2.2, as well as an “ohmic characteristic” r, where the forward bias voltage
can be approximately modeled as increasing linearly with the voltage, see r in Fig. 2.1 and 2.2
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Thus the approximate forward biased operating model of a diode may be considered as consisting of
a perfect diode (infinite reverse blocking voltage and a zero forward conducting voltage) with a dc
voltage source VDon (around 0.7 to 1.2 V) together with a series resistance r (around 0.01 to 0.1 ohms),
see Fig. 2.2. This model is sufficient for analyzing utility diode rectifiers and for estimating power
losses in the diode.
(b) Reverse Bias
If a diode is exposed to a reverse bias, or negative voltage, that is
trying to force current to flow through the device in the reverse
direction, then the diode “blocks” the voltage from reaching the
load or output, and no current flows, see Fig. 2.2. In reality a small
“leakage current” IL, Fig. 2.1. This current can be a few mA in a
large diode, but is often regarded as being very small and negligible
when it comes to diode power loss calculations. In diodes with large
voltage and current ratings, this “reverse bias leakage current” can
contribute to power losses, but is more significant when considering
diodes connected in series and determining the reverse bias voltage
dropped across each diode. The reverse bias leakage current is
represented in a simplified model by a perfect diode connected in
series with a large resistance RL, see Fig. 2.2. Lastly, all diodes have
a voltage rating based upon their “reverse bias breakdown voltage”. If a circuit attempts to expose a
diode to a voltage larger than this voltage, a large reverse current will flow through the branch
containing the “perfect diode” in series with a voltage source representing VB. As a result of a large
energy dissipation in the device, this condition is often associated with the destruction of the device.
The breakdown voltage can be modeled using a voltage source VB and a perfect diode, see Fig.2.2.
2.2 Series Connection of Diodes
In high power applications ( > kV ), several diodes can be connected in series to behave functionally
as one diode with a higher reverse bias breakdown voltage than for an individual diode, see Fig. 2.3(a).
However, the reverse bias V-I curves for each diode may be slightly different, see Fig. 2.3(b) (slightly
exaggerated for illustrative purposes). Since the leakage currents of all the diodes must be the same,
then the voltage drop across each diode may differ from the expected: in Fig. 2.3, E/3 might have been
expected but actually vD1 >> vD3.
One solution to this problem is to individually test each diode, and place together diodes with similar
characteristics. This is frequently done in high power applications where the cost of testing each diode
is justified. Another solution is to place a resistor in parallel with each diode. The resistor values
are chosen so that their currents may be 5 five times greater than the reverse bias leakage
currents through the diodes. Since resistors can be manufactured with very small tolerances, then the
voltage drops across each of the reverse bias diodes will be determined largely by the resistor values,
rather than then diode characteristics, and hence forced to be very similar.
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(a) 3 diodes in series
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(b) reverse bias characteristics
(c) circuit solution for V sharing
Fig. 2.3 Series connection of Diodes
Since resistors are inductive, this voltage balancing technique is not very effective during transient
voltage changes, e.g. when the diodes are turning off and the reverse bias voltage is building up. Note
that the device capacitances can also vary from one device to the next and the dv/dt of each diode may
vary as a result. Hence, separate capacitors are often used, see Fig. 2.3(c), to keep the dv/dt across each
diode similar during this turn off transient. Again the capacitors must be chosen so that their values
are a few orders higher than the natural capacitance of each diode.
Finally, a complete solution would be to have both resistors and capacitors, see Fig. 2.3(c).
2.3 Parallel Connection of Diodes
Diodes may be connected in parallel in order to increase the current rating of one functional diode,
see Fig. 2.4. If three diodes are connected in parallel, the expectation is that the current through each
diode will divide equally: e.g. one third through each diode. This may not happen in reality because the
forward bias V-I characteristics of each diode may be different, see Fig. 2.4 (b). Since the diode
voltage drops are the same, their currents may be unequal e.g. iD1 > iD2. This can cause current crowding
and one diode may heat up higher than the others and fail as a result.
A solution in the steady-state is to place resistors in series with each diode. The resistor values can
be made to be very similar and large enough to guarantee equal current sharing (to within a few
percent), but small enough so as to minimize their power losses.
During device turn-on, currents may rise more rapidly in one diode than the other. The di/dt through
each diode can be made to be similar to guarantee current sharing, if similar inductors are placed in
series with each diode. Since wire-wound resistors are naturally inductive, then the resistance and
inductance can be merged into one component.
Lastly, to avoid saturation effects in the inductors, coupled inductors can be used, see Fig. 2.4(c). If
the currents increase at the same rate in each diode, the flux in the core is zero. If the currents rise
differently in each diode, a flux is created in the inductor core that produces a voltage to counterbalance the unequal di/dt. A low cost toroid transformer can be used for this purpose that is small but
has a large inductance for controlling the di/dt.
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(a) parallel
(b) forward bias characteristics
(c) circuit solutions for I sharing
Fig. 2.4 Parallel connection of Diodes
2.4 Examples
Example 1: A current pulse flows through a diode with a 50% duty cycle of magnitude Id.
Determine the average & rms of the current pulse. The diode has a forward conducting resistance
of 0.02 Ω & a junction voltage of 0.7 V. Determine the power loss in the diode if Id = 10A.
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Example 2: A repetitive pulsed current of 8 A magnitude and 60% duty cycle is passed through
two diodes connected in parallel. A series resistor of value 0.1 Ω is placed in series with each diode
to help the current share more equally between the two components. If the on-state junction
voltage of one diode is 0.7 V & the other is 0.8 V, determine: the total rms, dc & ac components of
the currents flowing through each diode, the power dissipated in each of the 4 components.
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Chapter 3: Thyristor
The Silicon Controlled Rectifier (SCR), or also referred to as the thyristor, is the oldest known
power semiconductor switch. For many decades, it was the only power semiconductor that could handle
large voltages and currents, ( > 1,000V, > 1,000 amps). Its multi-junction structure, see Fig. 3.1, and
vertical flow of current, allow the device to handle large current ratings together with a large forward
and reverse voltage blocking capabilities. Note: mosfets can have the current flowing parallel with the
surface and hence have low current and voltage ratings.The main applications for thyristors range from
low cost electronics, e.g. light dimmers, up to very high power 3-phase rectifiers and cycloconverters.
This section summarizes the main characteristics of the thyristor and associated control circuitry.
3.1 Power Semiconductor Structure
A cross section of the thyristor semiconductor is shown in Fig. 3.1 in simplified form, and then in
more detailed for an actual device structure. Essentially the device consists of four layers of
semiconductor doped material: P-N-P-N sequence of doping. The device behaves like a controlled diode
with current flowing into the anode terminal, A, and flowing out the cathode terminal C. The on-off
state of this diode can be controlled by applying a low power short duration pulse to the gate terminal
G. The circuitry supplying this pulse is referred to as the gate-drive and passes current into the device
gate terminal G and returning via the cathode terminal C. A thyristor normally has large leads for
connecting to the A and C terminals to conduct large currents, and separate small leads for passing low
current gate signals to the G and C terminals. The differences in lead size between these two
connection types can be very striking: the device main terminals are designed to conduct hundreds if
not thousands of amps, and the small gate terminals are designed to conduct milli-amps!
(a) simplified
(b) more detailed
Fig. 3.1 SCR Power Semiconductor X-section
Starting from the anode terminals, the first sequence of doped silicon: P2-N2-P1 behaves like a PNP
BJT transistor, the sequence of doped layers N2-P1-N1 connected to the cathode terminal behaves like
a NPN BJT transistor. This simplified way of looking at the thyristor produces a device based circuit
model with transistors as shown in Fig. 3.2(a), with the associated thyristor symbol in Fig. 3.2(b).
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3.2 Power Semiconductor Switching Characteristics
The two transistor model for the thyristor can be used to explain fundamental characteristicd of
the device, namely:
(a) A small short duration pulse is all that is required to turn
on the thyristor, after which the thyristor remains in the
on-state until the current flow through the device is
reduced to zero by external factors.
(b) Once in the on-state the thyristor behaves identical to
a diode, i.e. the device conducts current in the forward
direction, and blocks voltage/current in the reverse
direction.
(c) It is not required to have a continuous gate current to
keep the device on.
(d)A thyristor cannot be turned off at the gate by
discontinuing the gate current or by impinging a reverse or
(a) model using BJTs
(b) symbol negative gate current.
Fig. 3.2 SCR Symbol and circuit model
off-state: When forward biased, A is more positive than C. The base-emitter junctions of the two
transistors can not provide a voltage blocking capability. However, from the two transistor equivalent
circuit, the junction that can block, or hold voltage in the forward direction, is the C-B junction of
transistor T1. When a reverse biased voltage is dropped across the thyristor, C is more positive than A
and the collector base junction of T2 can hold the voltage to provide reverse bias. voltage blocking
turn-on process: When a gate current iG is applied, see Fig. 3.2(a), a base current iB1 is applied to the
transistor T1. This means that the gate current flows in the terminal G and out the terminal C. T1 is
hence turned on and its C-B junction voltage drops and the C-E voltage of T1 drops. With T1 turning on,
base current iB2 is drawn from T2 into C1, hence iC1. iB2 flows from the emitter of T2 as long as there is a
load current providing current into the terminal A of the device. With T2 turning on, collector current
iC2 flows into the base of T1, thus providing iB1.Thus with T2 on, T2 provides the base current for T1, and
T1 provides the base current for T2. Hence with both transistors turned on due to the presence of a
load current and current is flowing from terminals A to C, there is no need for a gate current iG to
provide the base current iB1 for T1. Typically the duration of the gate current can be a pulse of duration
10 to 200 mS and then it can be discontinued. The action of T1 AND T2 PROVIDING EACH OTHERS
BASE CURRENT, IS A POSITIVE FEEDBACK MECHANISM, and ONCE THE DEVICE IS ON,
IT STAYS ON!
turn-off process: Once on, the device behaves as a diode. i.e. the current will continue to flow
through the diode until external factors reduce the device current to zero and it turns it off.
3.3 Power Semiconductor V-I Characteristics
When forward biased, unlike the diode, the device will hold voltage and no current will flow. In fact
a small “forward leakage current” will flow similar to the reverse bias leakage current of a diode, see
Fig. 3.3. If the voltage is increased sufficiently enough, then this leakage current, which will flow into
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the base of T1, and may be sufficient to turn the device on. This is not the normal turn-on process and
could be harmful for the device.
A specially designed thyristor, know as the SIDAC, uses this forward bias leakage current to turn
the device on at some specific voltage threshold level. This device is used quite often in the gate driver
circuitry of thyristors used in provide pulse power supplies such as gaseous discharge lamps like the
metal halide HID lamp and high pressure sodium lamps.
However, a standard thyristor will not normally be placed in circuits where the voltage reaches a
high enough level in the forward direction such as to turn on the device: the forward breakdown voltage
level. For reliability purposes, the maximum forward bias voltage experienced by a thyristor in a circuit
would normally be around 50% relative to the device voltage rating or breakdown voltage.
The normal turn-on process has the device forward biased with a gate current, so the device goes
from an the off-state with a high forward bias voltage, curve 1 in Fig. 3.3, to an on-state with a low onstate voltage drop and a high forward conducting current, curve 2. The forward biased voltage scales
are exaggerated Fig. 3.3 so that the device on-state voltage can be observed.
Fig. 3.3 SCR V-I Operational Curves
Applying a gate current with the device forward biased is not the only condition required for the
device to turn-on. The device anode to cathode current must also increase above a threshold level for
the device to actually turn on and stay on after the gate pulse had been removed. This device current
level is referred to as the latching current. IL, This current level for a device is normally fairly small
when compared with the device rated current: a device might have a latching current level of say 20mA
but a rated current of say 200 A..
After the gate pulse is removed, once the device is on it stays on until the device current drops
below a threshold level known as the holding current, IH: IH < IL.
In the reverse bias condition, see Fig. 3.3, the device will hold a negative voltage VAC = -ve, and only a
small current will flow, similar to a diode characteristic, known as the reverse leakage current. This
current is a function of voltage, but the maximum expected current is normally used in calculations
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involving power dissipation and the design of external circuits. The device will start conducting a large
reverse current when it is exposed to a voltage that exceeds its reverse breakdown voltage limit. This
operating condition is normally destructive and is not allowed to occur in normal circumstances.
Normally, device ratings are chosen so that the device voltage is 50% relative to its reverse breakdown
level.
3.4 Gate-Drives
The circuitry that delivers the pulses to the thyristor to turn it on is referred to as the gatedrive. This circuit is required to deliver a pulsed current of the required size and duration so as to turn
on the device when required under all the expected operating conditions for the thyristor. The 0V or
gate drive GND terminal is connected to the thyristor cathode terminal. A three-phase thyristor
rectifier is shown in Fig. 3.4, and it should be noted that the thyristors connected to the dc output
positive terminals have their cathodes all connected together, whilst the cathodes of the thyristors
connected to the rectifier negative output terminals are connected to different phase voltages. This
means that their cathodes are at a different potential relative to one another and also at a different
potential relative to the cathodes of the +ve group of thyristors
Fig. 3.4 Gating Circuitry for a 3-phase SCR Rectifier
This is an important observation to make regarding thyristor gate-drive circuits in the same power
circuit: the gate drive GND terminals cannot be assumed to be at the same potential as each
other and also are not at the same potential as the controller GND. This means that thyristor gate
drives have to provide electrical isolation, and the pulses provide to the thyristor gate inputs are often
delivered using isolating pulse transformers, see Fig. 3.4. However, the input signals to each of the
pulsed transformer circuitry can be supplied from the same controller and GND potential. The output
of the pulsed transformers may also use circuitry for waveshaping the pulses as required.
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A sample range of gate drive circuits are shown in Fig. 3.5. Gate drive (a) uses a photo-sensitive high
voltage signal thyristor to deliver pulsed currents to the gate of the thyristor whose magnitude is
controlled via the resistor RG. The voltage for the gate driver output circuitry can often be the forward
conducting voltage across the main the thyristor itself and the photo-thyristor is turned on via a photodiode. Sometimes these light signals are delivered to the thyristor gate drive via fibre optic cables
using a transmitter and receiver circuit. This is done in order to locate the power electronics remotely
from the controller itself inside am industrial drive cabinet. This is done, because the power electronics
uses switching circuitry that can be a source of emi and rfi emissions, that in turn can interfere with
the sensitive digital controllers. So it is quite often desirable to locate power electronic equipment in
cabinets with emi/rfi shielding remote from the main controller.
Fig. 3.5 Sample of SCR Gate Drive Types
Gate drive circuit (b) is an example of using a pulse transformer who’s circuitry directly feeds the
gate of the thyristor. The transformer primary is supplied from a buffer transistor that receives a
pulse base current from an RC network. The diode connected across the transformer primary is
designed to take the transformer magnetizing current when the transistor is turned off. Quite often a
resistor is placed in series with this diode to allow the transformer magnetizing current to decay
rapidly after the pulse is removed and the transistor is turned off.
Gate drive circuit (c) is an example of a pulse transformer gate drive where a digital controller is
used to control the frequency and duration of the pulses to the thyristor, and extensive pulse
waveshaping circuitry is used at the thyristor input terminals.
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3.5 Examples
Example 1: Differentiate between the latching current and the holding current of a thyristor.
What maximum value of R must not be exceeded in the circuit below in order to ensure an R/L load
current when a 50 µS trigger pulse is employed. The SCR has a latching current of 50 mA and a
holding current of 10 mA. The freewheel diode Dm, has a reverse leakage current of 1mA at 100V
reverse bias, Sketch the waveforms.
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Chapter 4: BJT & MOSFET
The fundamental characteristics and electrical ratings of the power semiconductor transistors
determine many aspects regarding the nature of a switchmode power supply. For instance, a device
switching frequency is limited by its switching speed, e.g. 10nS for mosfets (metal oxide semiconductor
field effect transistor), 100nS for igbt (insulated gate bipolar transistor), 1.5 µS for bjt (bipolar
junction transistor), 20 mS for a gto (gate turn off thyristor). In turn, the device switching frequency
determines the size of the LC filtering requirements. Obviously the higher the switching frequency, the
smaller the size of the filter.
Several important transistor characteristics are as follows:
(a) switching speeds and switching frequency
(b) on-state voltage drop
(c) current and voltage ratings
(d) gate drive requirements: high power vs low power, current vs voltage signal, isolation.
The voltage/current ratings and gate drive design for a transistor should be considered in
conjunction with its switching speed. For instance, the fastest device, hence most desirable, is the
mosfet. Its gate drive is also very low power and only requires a voltage signal around 5 to 15V
depending upon the device. These characteristics are far superior for the mosfet as compared with any
other device, so the mosfet is generally the preferred device. However, the mosfet voltage and current
ratings maximize at around 500V and 100A (with recent increases up to 1,000 V). With higher voltage
ratings the device’s on-state resistance rise exponentially and hence it currents ratings fall
dramatically. Generally, the bjt has higher voltage and current ratings suitable for high power
applications, but its high base current makes the device have a high power gate drive circuit and it has a
much lower switching speed. So in high power, hence high voltage applications, the bjt is the preferred
device, but in low power the mosfet superior electrical characteristics make it the preferred device.
This section describes the nature of two power semiconductors: bjt and the mosfet. The igbt is a
very special device in high power industrial applications and can be considered as being a hybrid of the
mosfet with the bjt devices. This device should be treated separately and is described in another
section. This section summarizes the electrical characteristics of the mosfet and bjt from a user
perspective, and is not intended as a detailed description on the details of semiconductor physics.
4.1 BJT Transistor
This device has specialized applications and its characteristics and operation are useful for
comparison with other devices.
(a) device
A simplified vertical X-section of a power semiconductor bjt is shown in Fig. 4.1(a) together with its
circuit symbol in Fig. 4.1(b)(i). The device main feature is that its emitter terminal is at the top of the
silicon slice and the collector terminal is at the bottom. This means that the main current flow direction
is in the vertical direction. Many microelectronic devices are very low power and the current flows from
one contact at the top to another contact at the top, i.e. the main current flow is horizontal. Many
power semiconductors have gone through many design changes and improvements to maximize the main
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current flow in the vertical direction rather than the horizontal to maximize the current density and to
increase the current ratings of the device. The current density of a silicon transistor is lowered if the
main current flows horizontally at the top surface.
Fig. 4.1(c) shows that typical bjt emitter metallization contacts can consists of a mesh or lattice of
fingers covering the top surface of the silicon. This increases the current rating of the device.
Although the base is the input to the device, its connections are not small. This leads us to the second
major point regarding the bjt device. The device is current driven with the base current being the
controlling signal for turning the device on and off. Due to the fact that the base width has to be large
to give the device a high voltage rating, e.g. 1400V. A large base width also results in a low current gain
β. A low β means that the bjt has a large base current (amps) and its gate drive is large.
(d) npn darlington transistor X-section
(e) npn transistor V- Characteristics
Fig. 4.1 BJT power semiconductor
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A bjt can have a β as low as 5!. Thus a 100A β requires a base current of at least 20A!. Thus the
base connections for a transistor are required to be large.
High voltage bjts, = 1400V, require large base widths, so devices were invented to lower the input
current. Fig. 4.1 (b)(ii) and 4.1(d) show the darlington device where a second transistor, is used to
supply the base current of the main transistor. If the main transistor has a β of 5, and the second 20,
then the overall current gain is 100, so a 100A transistor needs a minimum base current of 1 A. This is
an improvement but is still considered large by Today’s standards. Consider that the device input
electrical characteristics consists of two series connected base-emitter junctions of 0.7 V, and a 1A
input current. This produces a base drive power requirement of 1.7 W. This current of 1A has to be
supplied from a dc voltage supply of 10 to 15 V, so the actual power required is closer to 12W. A three
transistor device was invented, the triple darlington, to lower the input current even further.
bjt base drives are noted for being large in size with large power requirements. The resultant
device driver circuits can be compared to mosfet and igbts where the inputs to the device can be
obtained using a 100 Ω resistor connected directly to a low power logic chip!
(b) V-I characteristics
The V-I operating characteristics of the bjt have many features, see Fig. 4.1(c). Note that power
semiconductors are operated in switchmode: when they are off their current is close to zero, when
they are on, their voltage is close to zero. These observations refer to the power terminals which are
the device collector and emitter terminals.
(i) hard saturation: This operating condition, see Fig. 4.1(e) is associated with a low on-state voltage
drop, hence low conduction losses, and is achieved by supplying a base current much larger than that
given by β and IC. A VCE as low as 0.2 V can be achieved even in very high power devices. In many
applications such as electronic ballasts, this cannot be beaten even by mosfets. So in some applications
the low cost, high efficiency of a bjt switchmode circuit can be the most feasible. Hard saturation is
associated with a large charge concentration in the devices base region, see Fig. 4.2 (b). This charge has
to be removed before the device can turn off, so the turn-off times of a b operated in hard saturation
can be very slow, tens of mS. This is undesirable since it means a low switching frequency, high turn-off
losses, higher power base drive, and poor short circuit protection.
(ii) quasi-saturation: In some applications, e.g. industrial drive systems, circuitry can be used to
increase the device on-state voltage drop and so put it in the quasi-saturation mode, see Figs. 4.1(e) and
4.2(b). This increases the on-state losses, but is also lowers the charge stored in the bjt device during
its on-time. Hence the devices turn-off time can be reduced drastically, e.g. 1-2 mS, and the device
switching frequency increased. The short-circuit protection of the device is also improved due to faster
turn-off times.
(iii) primary breakdown: This is caused by the avalanche breakdown of the collector base junction, see
Fig. 4.1 (e), due to excessive device current and voltage. Operation in this region is considered
destructive.
(iv) secondary breakdown: See Fig. 4.1 (e) and Fig. 4.2(c). This is caused by excessive current
concentration in specific regions of the device producing localized hot spots and is different to the
primary breakdown.
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Fig. 4.2 BJT power semiconductor characteristic
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4.2 MOSFET Power Semiconductor
The mosfet is the main device used in all low power and low voltage switchmode power supply
applications. This is primarily because of its very high switching speeds, and associated, high switching
frequencies, as well as its very low power gate drive requirements. Of course, the device itself is
relatively inexpensive to manufacture!
(a) device
The main characteristic of the mosfet are its input control terminals being consider as being
largely capacitive, see Figs. 4.3(a) and 4.3(b). The input terminals (gate-source) are separated by a
silicon oxide layer which provides electrical insulation and makes the terminals look capacitive. This
capacitance is small and can be charged and discharged rapidly to turn the device on and off. Unlike the
bjt, there is no need for a large continuous input gate current to keep the device on: the device gate
current is of the order of pA! The device is therefore said to be voltage activated, and unlike the
thyristor, can be turned on and off at the gate.
The main current flow is from drain to source, iDS, and flows in the vertical direction through the
silicon wafer as shown in Figs. 4.3(e), (f). A vertical current flow has the effect of increasing the
current density of the device as there is no need for large currents to flow into and back out of the
upper surface. However, the device works by forward biasing the device input terminals, VGS, which
induces a charge concentration in the channel region immediately beneath the gate, see Fig. 4.3(c). This
channel is essentially a surface phenomenon, placing limits on the current capability of the device.
To increase the device current ratings, a fairly complex web of metallization and gate-source
connections are used, see Fig. 4.3(d). International Rectifier has an historically famous device known as
the HEXFET, see Fig. 4.3(e), whose name comes from the hexagonal shape of its gate connections. This
device structure was to used maximize the combination of gate regions, hence channel regions, as well
as the source regions which carry the main current. For instance, there is no point having a large
percentage of the surface designated for the source regions and main current flow, if the channel
regions are compromised resulting in a large drain to source resistance.
The larger the gate voltage, the larger the concentration of charge in the channel regions and the
lower is the drain to source resistance, see Figs. 4.3(c), 4.3(f) and 4.3(g). Typical gate-to-source
voltages for low conduction losses can lie between 10 to 15 V. Fig. 4.4(b) identifies regions in the silicon
X-section that contribute to the device on-state resistance. A mosfet on-state characteristic can be
described as being resistive. Fig. 4.4(c) shows how the device resistance increases with the junction
temperature, the device is described as having a positive temperature coefficient of resistivity.
(b) on-state characteristic is resistive
The device on-state resistive characteristic allows the device to be connected in parallel with other
devices in order to get a total switch with a higher current rating. This is done on a regular basis inside
a semiconductor package: several mosfet cells and silicon die are connected in parallel inside the
package. The positive temp coefficient of resistivity also means that if current tends to crowd into one
of the devices, its temperature will increase and thus its resistance will increase so the current
eventually reduces. This shift in temprerature tends to offset the unbalance in currents between
parallel connected devices. In addition, the positive temperature coefficient of resistivity means that a
device conducting more current than expected, will increase in temperature as a result of the higher
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current and power losses. This temperature increase will increase the devices resistance, and so offset
the current unbalance.
Fig. 4.3
(c) device V-I characteristic.
The device is resistive when on. This can be seen in Fig. 4.3(g) when VDS is low. At high VDS, the ID vs
VDS characteristics are flat. Unlike the bjt, the device does not have a primary and secondary
breakdown characteristic, but has a square V-I operating range. This is more useful for maximizing the
voltage ratings of the device: in switchmode power supplies, the device can be exposed to the maximum
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voltage and current at the same time. The fbsoa characteristic shown in Fig. 4.4(d) shows the maximum
V and I values that can be withstood at the same time for a fixed duration. During normal pwm
switching, the device is exposed to the maximum V-I only for very short periods of time (nS), see Fig.
4.5, so the device can operate safely. The bjt secondary breakdown characteristics do not allow
maximum V and I to be withstood at the same time, so the bjt has more restrictions on its voltage
ratings. i.e. if the device is rated at 1400V, then it should only be considered in applications only up to
700 V, unless specialized snubber circuitry are used. A mosfet rated at 450 V, could be used in
applications with say 350 V. However, the mosfet has the characteristic that is turns off exceptionally
fast. Stray lead inductance can cause the device voltage to overshoot the supply dc rail voltage by a
larger amount than a similar bjt switching at lower speeds, see Fig. 4.5. This means that the design of a
mosfet switchmode circuit has to pay more attention on the lead lengths and the determination of lead
inductance. Even the leads within the mosfet package can result in a significant device voltage
overshoot that cannot be seen at the device output terminals!
During fault conditions, the fbsoa curves illustrate how long the device can survive for, and so are
useful when designing the over-current fault protection circuitry
Fig. 4.4 MOSFET power semiconductor characteristics
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Fig. 4.5 Typical device V-I trajectories during switching
4.3 Summary
(a) BJT
1 Can be turned on and off at its input base terminal and is essentially current controlled.
2 High voltage bjts have low β values, so the device driver circuitry is high power/expensive. The
device driver circuitry requires relatively large floating power supplies as a result.
3 Voltage ratings maximize at around 1400V and current ratings maximize at 200-400 A
4 Limited to some specialized applications where its very low on-state voltage is useful.
5 Medium switching speeds typically in the range 1 to 3 mS, with switching frequencies commonly in
the range 1 to 10 kHz, and in lower power up to around 30 kHz.
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(b) MOSFET
1
2
3
4
5
Can be turned on and off at its input gate terminal and is essentially voltage controlled, with its input
terminals characterized as being capacitive.
The device driver circuitry is very low power. Surface mount control ICs can be used as the gate
drivers have very low power ratings.
Voltage ratings maximize at around 450 V and current ratings maximize at a 100-200 A, but more
commonly used in the 1 to 50 A range.
A wide range of applications in low voltage and power switchmode power supplies, where the device’s
very high switching frequencies, and resulting small compact LC filters, cannot be beaten.
Very low switching speeds typically in the range 10 to 50 nS, with very high switching frequencies
typically in the range 20 kHz to 1MHz.
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Chapter 5: MOSFET & BJT Input Drivers & Snubbers
The bjt transistor is a current driven device and has a limited current gain β. The mosfet transistor
is a voltage driven device with a capacitive input control terminal and an on-state voltage VGS, typically
being in the region of 5 to 15 V. The bjt has a constant on-state voltage drop which can be as low as its
saturation voltage, VCEsat (0.2 V). The mosfet has a resistive on-state voltage drop that is a function of
its VGS and also temperature, and can be of the order of mΩ. This section describes some circuitry
that can be used for both devices to improve their operation and switching characteristics. Some of
the circuitry described for the bjt are also linked to their use for both mosfet and igbt devices.
A generic name for the driver circuitry of a power semiconductor device is a ”gate drive”. This
can be also be used for the bjt, though the more correct name for the bjt would be “base drive’.
5.1 BJT
The current gain of the bjt, β, can be as low as » 5-10 because of a large base width, which has to be
relatively large in order to increase the device’s voltage ratings. But a low β also means that the
transistor has a relatively large input control current (=base current). Classically, IC = β IB, but the base
current has to be made even larger than that given by this equation in order to force the device onstate voltage drop down: putting the device into saturation when it is on. This is done to lower the
devices conduction losses. This results in a large base current and a high power gate drive circuit.
(a) Darlington transistors
The darlington transistor, see Fig. 5.1(a) is used so that a secondary transistor T2 supplies the base
current of the primary transistor, and the driver circuitry for the complete switch only has to supply
the base current of T2. The resultant VCE1 can be given by VCE1 = VBE1+VCE2,sat . If VBE = 0.8V, VCEsat = 0.2
V, then the primary transistor VCE1 = 1V. This places this transistor out of saturation and into the quasisaturation region. This has the effect of increasing the on-state conduction losses, but also improves,
i.e. lowers, the turn-off switching time. This results in a higher device switching frequency.
(a) darlington
(b) triple darlington
(c) RD for switching
Fig. 5.1 bjt power semiconductor
The darlington is a device that can be manufactured on a single piece of silicon as can the triple
darlington, see Fig. 5.1(b). The latter device was produced in order to reduce the switch input control
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current even further, IB3 in this case. Both switch arrangements would not be implemented as shown
because of problems associated with slow switching speeds and the likely hood that all the devices will
turn-off at the same time. For instance, if T1 turns off first, the switch is in the quasi-saturation mode,
then the load current, I2, would flow into T2 and may even flow into the driver circuitry and destroy it.
Diodes and resistors are often placed across the base emitter junctions of the transistors as shown
in Fig. 5.1(c). When the transistors are on and their base-emitter junctions are forward biased, the
diodes and resistors have no effect. When the transistors are turned off, the driver circuitry would
normally draw a large negative pulse out of the base terminal of T2. This has the effect of drawing a
large negative current through the base-emitter junctions of the two transistors. This draws out base
region stored charge and reduces the storage time and device turn-off time. However, the junctions
can snap off very quickly and the large negative base currents have nowhere to flow. This can expose
these junctions to a large negative reverse voltage and destroy the devices. The negative reverse bias
voltage ratings of transistor base-emitter junctions can be in the region of 5 to 10 V. The reverse
connected diodes, D1 and D2 in Fig. 5.1(c), provide a path for these large negative base currents to flow.
The resistors are included for damping effects and also to help in the removal of charge from the
transistors when they are turning off.
mosfet/igbt: Diodes and resistors, and in some cases zener diodes, are often connected across the
gate source terminals of mosfets and igbt devices to improve the device switching speeds at turn off
and to protect the gate source from experiencing excessive voltages.
(b) Anti-saturation clamps
The turn-off switching action of the bjt device can be very slow if, during its on-state, it is
operated in the saturation mode to lower its conduction losses. This is due to the large charge stored in
the device base region when saturated, and is associated with a very low on-state voltage drop. It
should be stressed that when operating in saturation, the storage time (representing a delay in the turn
-off process) can be very large, e.g. 10-20 mS, as opposed to 1-2 mS when operating in the quasisaturation mode during the on-state.
To place the device in quasi-saturation, the device base current should be restricted so that VCE is
held above VCEsat (1 V as opposed to VCEsat which could be 0.2 V). Anti-saturation clamps are used see Fig.
5.2(a), by diverting base current into the transistor collector using a diode.
(a) anti-saturation clamp
(b) gate-drive GND connection
(c) simple base-drive
Fig. 5.2 bjt power semiconductor
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With the three diodes conduction base current and the transistor on, then the voltage VB relative
to the transistor emitter terminals is VB = 3VX + VBE1. If all junction voltages are at 0.7 V, then VB is at
2.1 V higher than the transistor emitter. If the forward conduction voltage of DD is 0.7 V, then the
collector emitter voltage cannot fall lower than VB - VD = 1.4 V. Fig. 5.2(b) shows a similar anti-saturation
clamp where the diode DD is incorporated with a transistor driver stage: a part of which is shown with
T2. The more complete driver circuit and anti-saturation clamp diode Das are shown in Fig. 5.2(c).
mosfet/igbt: Diode DD can be used with mosfet/igbt switches in order to sense the voltage at the
drain of the device. When a fault occurs at the power supply output, the high device currents cause the
drain-source voltage to increase. The gate drive senses this voltage increase via DD, and can turn off
the device very fast and avoid damage to the switch and protect the device against over-currents and
output short circuits. This short-circuit protection mechanism is particularly effective in a high voltage
and current igbt and is one reason for the successful implementation of the device in industrial variable
speed drives.
(c) Device driver circuits (or gate drive / base drive)
A basic bjt device driver, or base-drive, is shown in Fig. 5.2(c). TB+ and TB- form the output power
stage of the base drive circuit for the power transistor. TB+ connects the base drive to the driver
circuit +ve rail in order to supply positive base current. The size of this current is controlled by the size
of the resistor RB. TB- connects the power transistor base to a negative potential relative to its emitter,
and so reverse biases the base-emitter junction. This reverse bias is highly desirable and it can increase
the voltage blocking capability of the transistor, VCE, when off. Das is the anti-saturation clamp diode
that diverts current from the base of TB+ in order to limit the base current to the main transistor and
keep the device in the quasi-saturation mode. Das can also be used to protect the device against output
over-currents or short circuits.
A more sophisticated base drive is shown in Fig. 5.3. T2 and T3 form the power output stage of the
base drive similar to TB+ and TB- in Fig. 5.2(c). During the device on-time, R1 controls the transistor base
current magnitude and C1 provides a +ve pulsed base current during turn on. This lowers the device
turn-on time. R3 controls the magnitude of the transistor base current when turned off and provides a
current to turn on the zener diode D2. The zener diode controls the transistor reverse bias baseemitter voltage so that it does not get too large, and also to maintain a reasonably large reverse bias to
improve the transistor voltage blocking rating. R2 helps control the current through D2 when the
transistor is off. L1 provides a controlled increase in the transistor reverse base current when turning
off, and helps to speed the transistor turn-off time. T4, R4 and R5 act together to control the on and
off states of T2 and T3 and also to provide control of the base currents of T2 and T3. D3 and D4 control
the collector base voltage of T4 when it is on. This keeps this transistor out of saturation and helps
speed the turn off time of T4. T3 is the open-collector output of the optocoupler which provides signal
isolation. D6 is the input to the optocoupler, and when forward biased with a current, light emitted from
this diode turns on T5. T4 in turn, turns-on T4, which in turn turns on T2, which in turn turns on T1. So
when the optocoupler is activated, the main transistor is turned on, when not activated T1 is off.
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Fig. 5.3 bjt actual base drive circuit
5.2 MOSFET
The input control terminals for a mosfet power semiconductor can be said to be capacitive: if
charged up to full voltage, say 10 to 15 V, the device is on, and when discharged to zero voltage the
device is off. There is no need to reverse bias the gate-source input voltage when the device is off:
immunity to noise can be obtained because the mosfet gate voltage needs to be raised to a threshold
voltage, say 4 V, before it can turn-on. However, in higher power applications where the device output
voltage and currents are, a negative gate-source voltage is desirable to provide immunity to noise and
false turn-on.
Since the gate is essentially capacitive in nature, there is no need to provide a continuous current to
keep the device on, though some leakage occurs and the gate discharges if the gate were left on open
circuit when on. The main essential features of the device gate terminal is that it needs a positive pulse
current to charge up the gate source voltage to turn the device on, and a negative pulse current to
discharge the gate source voltage to zero and turn the device off. Unlike the bjt transistor, the
average net power required by the gate driver circuitry is very minimal, under 1 W. Control of the
charging and discharging of the mosfet gate-source voltage is often achieved using small resistors of
the order to 10 to 250 Ω.
(a) parallel connection
mosfets are connected in parallel to increase the overall current rating of the switch. The device is
resistive with a positive temperature coefficient of resistivity. These characteristics, unlike the bjt,
make the device very suitable for connecting in parallel. e.g. current hogging in one of the devices
connected in parallel is offset by the resistive nature of the device and its positive temperature
coefficient. However, it would be a mistake to connect the gate and sources of several devices directly
together. All leads have inductance and the mosfet gate source terminals are capacitive and prone to
parasitic oscillations or ringing. This ringing can be caused by the nature of the pulsed currents required
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to turn the device on and off, or by voltages induced in the source leads of the devices as the devices
turn on and off. To dampen these possible ringing effects, the gate resistance, or some of the
resistance see Fig. 5.4(a), can be inserted in series with the gate connection of each mosfet. This
resistance also equalizes the charging and discharging of the gate-source capacitors when switching.
(a) Parallel Connection of MOSFETs
(b) spongy clamp
Fig. 5.4 Some basic mosfet circuits
(b) spongy clamp
The effect of lead inductance on the switching action of the mosfet is not restricted to the device
gate drive. Lead inductance in the power circuit, see Fig. 5.5(a) can cause the device voltage to
overshoot the dc supply rail, see Fig. 5.5(b) and (c). Note that the overshoot in current when the device
turns on is due to the reverse recovery of the diode, and in this respect the natural lead inductance in
the switchmode power supply can be advantageous. It should also be noted that the mosfet switching
speeds, << 50 nS, is often considered much too fast for the circuit inductance and the diode switching
speeds.
One solution to lowering both the device voltage overshoot at turn-off, and the reverse recovery
current at turn-on, is to slow the device switching by increasing the gate resistance. This may have
undesirable side-effects of increased switching losses, but may be considered more desirable than
adding switching aid circuits which can cause problems themselves or be considered to expensive to
include.
Should a switching aid circuit be considered desirable, then the most often circuit considered is the
spongy clamp, see Fig. 5.4(b). The clamp consists of a capacitor Cs connected across the main dc-link
voltage supply E via a resistor Rs. Rs charges Cs to the dc link voltage E. When the switch turns-off, the
load current flows through the device capacitance and charges up VDS to the supply voltage E in an
almost linear ramp: waveforms for the clamp are illustrated in Fig. 5.5(d). When VDS reaches the supply
voltage level, the freewheel diode Dm cannot turn on instantaneously as the natural lead inductance
resists this increase. see Fig. 5.5(a): the switch voltage over-swings E. If the spongy clamp diode were
not included this voltage over-swing could be very large (100%) and cause ringing. Either feature could
be destructive. However, with the presence of the spongy clamp diode, the capacitance physically
located very close to the mosfet temporarily conducts the switch current and restricts the device
voltage over-swing, see Fig. 5.5(d) and (c). Since VDS does exceed E, then the load current has a
controlled transfer into the freewheel diode. When this currents stops flowing through the spongy
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clamp, the capacitor then discharges into the dc supply voltage via Rs and its voltage drops down to E
again in preparation for the next switch turn off
Fig. 5.5 Spongy clamp for a mosfet
Circuit analysis shows that the maximum possible overshoot in the capacitor voltage, Vos, is obtained
by equating the energy increase in the capacitor during the voltage overshoot, with the energy
associated with the load current flowing through the lead inductance: 1/2CsVos2 = 1/2LaIo2. The energy
dissipated in the resistor is given by: 1/2LaIo2fc.
where Io = load current, La = natural lead inductance, fc = device switching frequency, Vos = capacitor
voltage overshoot, Cs = snubber capacitor. Obviously the capacitor should discharge before the next
device turn-off time, so as a rough guide, the time constant of the snubber capacitor can be set to
three times smaller than the pwm switching period, e.g. 3×Rs Cs = 1/fc
(c) device driver circuits or gate-drives
The driver circuit for a mosfet, gate drive, is much smaller than for a bjt as the gate of the device
does not require any current other than the pulsed currents required to charge and discharge its input
capacitance.
Example 1: Fig. 5.6(a) shows one of the simplest driver circuits using a comparator with an open
collector output stage. With the input signal high, the comparator output transistor is turned on
and the resistor R2 is connected to the gate drive ground. This turns the mosfet off. With the
input signal made negative, the comparator output transistor turns off, and the resistor R1 and R2
pull the mosfet gate high and turns the device on. This gate drive consumes a lot of power,
relatively speaking, and has the problem that in the case of a lack of input signal or, the
comparator not working, the mosfet gate is tied high and the mosfet is turned on. This is generally
considered poor logic to use: e.g. the default state for the circuit should have the mosfet OFF. The
open collector output for the comparator is also used in optocouplers, and it is more common in
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both cases to have the mosfet ON when this transistor is turned on. e.g. the open collector input to
a gate drive, pulls its output terminal low when it is required for the mosfet to be on. Summarizing,
a logic 0 is often used in gate drives to turn-on the mosfet and a logic 1, considered the default
level turn the mosfet OFF.
Fig. 5.6 mosfet gate drives
Example 2: This gate drive see Fig. 5.6(b), is identical in nature to example 1 with the exception
that a driver npn/pnp output stage is used so that the mosfet can receive high pulse currents to
switch faster, and to lower the power dissipation in the resistors.
Example 3: This gate drive, see Fig. 5.6(c), uses an optocoupler for signal isolation. The mosfet
source connection is not necessarily at the same potential as the ground for the control circuit. Fig.
6.7(a) show a situation with a two mosfet inverter leg where the upper transistor is definitely not
at the same potential as the signal ground (gnd) and the ground for the upper transistor gate drive
(gndb) switches high and low by very large voltages relative to the signal ground. It is generally
assumed that the ground for the mosfet gate drive is not the same as the control ground, so a
signal isolator is necessary to deliver the required switching signals into the gate drive circuitry
whose localized ground is often the source connection to the mosfet. Optocouplers are very useful
for signal isolation as the input is a diode that when activated, passes a light signal to the output
stage, illustrated here as being a NAND gate. When the diode is activated, the NAND gate output
goes low. This signal produces a high state at the output terminals of the DS0026 buffer stage. A
resistor is again used to feed the gate of the mosfet. This gate drive has the desired logic, a logic
low activates the optocoupler diode, which then turns on the mosfet.
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Example 4: This gate drive, see Fig. 5.6(d) illustrates the use of an optocoupler for signal isolation
and a driver stage to drive the mosfet gate for fast switching. In this case, a logic low turns on the
optocoupler and turns off the device, but the circuit can be re-arranged to reverse this logic. The
main feature highlighted in this circuit, is that it is quite often the case that the signal isolator, an
optocoupler with an open collector output, is unsuitable for driving the mosfet gate directly. The
two transistor driver stage illustrated in the figure is often contained inside a mosfet (and igbt)
driver chip.
(a) gate-drive power supplies (b) dc supply for both drivers (c) charging path for upper gate drive
Fig. 5.7 mosfet date drives
(d) gate drive power supplies
When the signal ground is at the same potential as the gate drive ground (gnd and gnda in Fig. 5.7(a)
respectively), then there is no need to provide signal isolation or to use a separate power supply for the
gate drive, e.g. +15Va is the positive supply for the lower gate drive and could be connected directly to
+15V, which is associated with the control circuit. However, some care has to be taken in making this
connection, to immunize noise feedback from the switchmode converter into the control circuitry.
The 15Vb power supply for the upper mosfet gate drive shown in Fig. 5.7(c) is not the same as for
the lower gate drive mosfet as gndb jumps high and low relative to gnda depending on the switching
states of the output mosfets. The gate drive for the upper mosfet can be supplied from a floating
power supply, that could be as simple as a 60Hz transformer with an output regulator. However, it is not
sufficient to have voltage isolation in the transformer but also dv/dt isolation. All isolators, including the
primary and secondary windings of a transformer, have capacitor coupling between the input and output
windings. If these windings are wound physically close together, bifilar windings, then there is a large
capacitive coupling between the primary and secondary. As the output mosfets switch, the potential of
gndb rises and falls with the switching speeds of the mosfets. This can cause a large dv/dt across the
transformer winding capacitance, causing pulsed currents to be injected into the control circuitry.
Some transformers have low coupling capacitors, but in general, especially for low power mosfet gate
drives, these transformers are regarded as being large and expensive.
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An alternative way of powering the dc voltage for the upper gate drive is to use the diode Db as
shown in Fig. 5.7(a). This arrangement is often referred to as a “charge pump” and can be incorporated
as part of a chip designed to provide gate drives for circuits where the mosfets are connected as part
of an inverter bridge. When the lower mosfet is turned on, the output terminal of the inverter leg is
connected to GND, see Fig. 5.7(c). This connects gndb of the upper gate drive to gnd. A charging path
for the 15Vb dc rail smoothing capacitor is set up as shown in Fig. 5.7(c). When the upper mosfet is
turned on and lower turned off, the output terminal, hence gndb, is now connected to the +E voltage,
which could be several hundred volts. This reverse biases Db, and the capacitor across the upper gate
drive partly discharges as it provides the current necessary to power the upper gate drive. As long as
the converter operates in pwm mode with continuous switching of both transistors, then the
discharging of this capacitor is not a problem, as it can often be designed to have a µF size so that it
does not discharge much before the upper transistor is turned off again when it can receive a recharging path as shown in Fig. 6.7(c). Gate drives can have fault protection, so that if this upper gate
drive dc supply voltage droops too much, then the power mosfets are turned off until a signal reset
signal is received.
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Chapter 6:
IGBT
The main application for the Insulated Gate Bipolar Transistor (igbt) is an industrial drive system
where it has been successfully deployed at power levels ranging from 1kW to MW, and in voltage
supplies ranging from 208, 460, 600 and up to 4160 V. This section summarizes some of the main
characteristics of the igbt from the user perspective, as well as describing some of the issues arising
from its implementation in industrial drive systems.
The igbt may be regarded in many senses as a high power mosfet. The main difference between an
igbt and the power mosfet lies in an additional p zone in the igbt, compare Fig. 6.1(a) and (b). Due to this
layer, holes are injected into the highly resistive middle n- layer and a carrier overflow is created. This
increase in conductivity of this n-layer reduces the on-state voltage of the igbt, see Figs. 6.1(c) and (d)
Fig. 6.1 IGBT Power Semiconductor
The RDson of the mosfet is mainly influenced by a low doped center region which is essential for the
voltage blocking capability. The additional p-layer of the igbt causes a carrier overflow in the center
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region. In spite of the threshold voltage, which is created by the open junction at the collector side, a
1000V igbt has an on-state resistance which is reduced by over a factor of 5 when compared to a
mosfet with similar blocking characteristics and identical chip area. This results in a device with a
higher current rating than an equivalent mosfet, see Figs. 6.1 (c) and (d).
The igbt may often be regarded as a high power version of the mosfet. The device can be turned on
and off at its control input terminals, gate and source, with characteristics looking like a capacitor,
similar to the mosfet. The device can have voltage ratings at 6 kV together with currents ratings >
1,000A. This compares with say 500V and 100 A for the mosfet. The switching speed of the device can
be around 100-300nS with switching frequencies around 5 to 20kHz. THis compares with the mosfet
switching speeds of around 5-50nS and switching frequencies 20kHz to 1MHz.
6.1 Semiconductor Device
A X-section of an igbt semiconductor is shown in Figs. 6.2(a) and 6.2(d). When comparing the igbt
with the BJT, the name of the “drain” terminal is equivalent to the bjt “collector”, and the “source”
equivalent to the “emitter”. This emphasizes the dual nature of the igbt having both bjt and mosfet like
characteristics
(a) simplified X-section
(b) device symbol
(d) X-section with surface detail
(c) device parasitic elements
(e) V-I Curves
Fig. 6.2 IGBT power semiconductor
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These X-sections reveal that the igbt has a mosfet like gate input terminal with silicon oxide
forming the gate input over a channel region, where charge can be induced if the gate is forward biased
with a positive voltage. Similar to the mosfet, this channel is an induced n-channel region consisting of
negative charge. Similar to the mosfet, this “enhanced” n-channel essentially shorts a p doped region
connecting between two n+ regions and allows conduction to take place if the n+ regions have a forward
bias. Similar to the mosfet, the n-channel device has the superior device characteristics with fast
switching speeds and low on-state resistance when conducting.
However, this device differs from the mosfet in that the drain n-region for the mosfet is buried
inside the silicon and another p+ region separates this mosfet drain from the outside connection. This p
+ region at the drain (or collector) connects to an n-regions which is in turn connected to another p
region at the source connection terminal (or emitter). This can be recognized as a pnp transistor device,
see Fig. 6.2(a). So the n-channel mosfet can be viewed as having its drain connected to the base region
of an npn transistor, see Fig. 6.2(c). One symbol for the device, there are many, is shown in Fig. 6.2(b).
The structure is very similar to that of a vertically diffused mosfet featuring a double diffusion of
a p-type region and an n-type region. An inversion layer can be formed under the gate by applying the
correct voltage to the gate contact as with a mosfet. The main difference is the use of a p+ substrate
layer for the drain. The effect is to change this into a bipolar device as this p-type region injects holes
into the n-type drift region.
(a) Blocking Operation
The on/off state of the device is controlled, as in a mosfet, by the gate voltage VG. If the voltage
applied to the gate contact, with respect to the emitter, is less than the threshold voltage Vth then no
mosfet inversion layer is created and the device is turned off. When this is the case, any applied
forward voltage will fall across the reversed biased junction J2. The only current to flow will be a small
leakage current.
The device forward breakdown voltage is determined by the breakdown voltage of junction J2. This
is an important factor, particularly for power devices where large voltages and currents are being dealt
with. The breakdown voltage of the one-sided junction is dependent on the doping of the lower-doped
side of the junction, i.e. the n- side. This is because the lower doping results in a wider depletion region
and thus a lower maximum electric field in the depletion region. Therefore the n- drift region is doped
lighter than the p-type body region.
The n+ buffer layer is often present to prevent the depletion region of junction J2 from extending
right to the pnp bipolar collector. The inclusion of this layer however drastically reduces the reverse
blocking capability of the device as this is dependent on the breakdown voltage of junction J3, which is
reverse biased under reverse voltage conditions. The benefit of this buffer layer is that it allows the
thickness of the drift region to be reduced, thus reducing on-state losses.The operation of the device
can be understood with reference to Fig. 6.2(c) and recognizing that transistors T1 and T2 are the main
devices, and that transistor T3 is a parasitic element inside the device. When the device is off, both the
mosfet and npn transistors block a forward bias positive voltage applied drain to source. Similar to a
single transistor, neither device can hold a negative voltage: negative from drain to source.
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(b) On-state Operation
The turning on of the device is achieved by increasing the gate voltage VG so that it is greater than
the threshold voltage Vth. This results in an inversion layer forming under the gate which provides a
channel linking the source to the drift region of the device. Electrons are then injected from the
source into the drift region while at the same time junction J3, which is forward biased, injects holes
into the n- doped drift region.
This injection causes conductivity modulation of the drift region where both the electron and hole
densities are several orders of magnitude higher than the original n- doping. It is this conductivity
modulation which gives the igbt its low on-state voltage because of the reduced resistance of the drift
region. Some of the injected holes will recombine in the drift region, while others will cross the region
via drift and diffusion and will reach the junction with the p-type region where they will be collected.
The operation of the igbt can therefore be considered like a wide-base pnp transistor whose base drive
current is supplied by the mosfet current through the channel.
When the gate source terminal of the mosfet T2 is forward biased, a channel is induced between its
drain-to-source terminals, and essentially forms a low resistance conduction path, identical to a normal
single device mosfet. Since the base emitter junction of the pnp transistor T1 cannot hold a large
voltage, current is drawn from the base of T2 into the mosfet. This has the result of both turning on T2
and also shorting the device drain-to-source terminals. The load current flows through into the emitter
of T2. Some current is drawn into the mosfet via the base of T2, and some current flows into the
collector of T2 and out of the source terminal of the whole device.
The unique feature of the igbt is that the current and voltage ratings of the device far exceed the
ratings of a single mosfet or a single pnp transistor. So the simplified model shown in Fig. 6.2(c) is useful
to understand the basic operation of the device, similar to the two transistor model of the SCR, but the
overall characteristics of the device cannot be appreciated by merely considering the characteristics
of two separated transistors T1 and T2. The model is a simplified model and in fact the two devices are
integrated inside each other, for instance the drain of the mosfet is the same region as the base of the
pnp transistor.
Fig. 6.2(c) shows a more complete equivalent circuit which includes the parasitic npn transistor, T3,
formed by the n+-type mosfet source, the p-type body region and the n--type drift region. Also shown is
the lateral resistance of the p-type region. If the current flowing through this resistance is high
enough it will produce a voltage drop that will forward bias the junction with the n+ region turning on the
parasitic transistor which forms part of a parasitic thyristor. Once this happens there is a high
injection of electrons from the n+ region into the p region and all gate control is lost. This is known as
latch up and usually leads to device destruction.
6.2 Gate Drive
The gate drive for an igbt can be very similar to that for the mosfet, with the exception that in
high power applications, the devices might be exposed to high voltages and low power low voltage circuit
techniques such as the “charge-pump” circuit used to supply power to the gate drive cannot be used. A
sample gate-drive circuit is shown in Fig. 6.3, where T1 supplies the positive forward bias for the
transistor gate input and the discharging and charging of the gate capacitance is controlled via R1. D1
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stops T1 from operating in saturation mode when on. This speeds the turn-off time of T1. The bias
current for T1 is obtained from R2. T2 controls the on-time of T1, and resistors R4, R3 and C1 control the
turn-on and turn off of T2. Finally R5 and C2 are included across the gate of the main transistor to
dampen any oscillations that may occur between the transistor input (gate-source) capacitance and the
lead inductance of the signal wire delivering signals to the device. The gate source input connections are
shown as a twisted pair wire, as it is very common to have the gate-drive located remotely from the
device. This is because the power circuit associated with the main transistor are often large with large
packaging, and also to shield the control circuitry from noise generated in the power converter as a
result of pwm switching noise of the power transistors. The power circuit associated with the igbt are
normally several hundred if not in the thousands of volts and the currents can be several hundred amps.
So shielding of the control circuitry from the power circuitry is a common occurrence.
Fig. 6.3 IGBT Gate Drive
6.3 Miller-Effect
The Miller-effect occurs in mosfets but is described here for the igbt. The effect is associated
with the feedback of the collector-emitter voltage VCE via the gate-collector capacitance CGC on the
gate. This means a change of VCE has the same effect as an internal current source into the bias circuit,
where the current is given by the expression ig = CGC (VCE) x dVCE/dt. As the collector voltage rises for
instance, so does the voltage VGC. This represents a charging of the gate-collector capacitance and
current can be injected into the gate circuitry from the drain side when the device is turning off. If
the gate drive design is not done appropriately, this gate charging current can charge up the device
gate-emitter voltage and turn the device on again. Unfortunately CGC is not constant, but it changes its
value with VCE The strongest change of CGC results at a small VCE.
This explains that:
During turning-on (starting with: VCE high, VGE zero or negative) with a constant gate charging
current, a linear increase of the gate voltage results, see Fig. 6.4(a). With falling collector-emitter
voltage VCE the gate bias current is used for changing the charge of CGC (CGC x dVCE/dt) and the gate
voltage remains constant. Later, when the collector-emitter voltage has come down, CGC becomes larger
so that even if the slope of the VCE voltage becomes smaller, the input gate bias current is used up in
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discharging CGC. Only when finally the current needed for charging CGC becomes smaller than the bias
supplied current, then the gate voltage starts to rise again, see Fig. 6.4(a).
At turn-off: (starting with: VCE low, VGE positive or greater than threshold voltage Vth) the gate
voltage first decreases nearly linearly (assuming a constant gate discharge current). With a still low
collector-emitter voltage VCE, and with only a moderate increase, there is a significant change in the
magnitude of CGC (decrease). A decreasing CGC with a constant gate input discharging current, means VGC
increases in voltage. As there is a bias source which is drawing current out of the gate, the gateemitter voltage VGE remains constant. Subsequently VCE increases and most of the gate discharge
current is used up for CGC dVCE/dt; the gate voltage further remains constant. The turn-off process
finishes when VCE roughly reaches the operating voltage. Now a further decrease of the gate voltage
VGE is possible.
(a) turn-on
(b) turn-off
Fig. 6.4 Miller effect in the igbt
6.4 Short Circuit Behaviour
The negative temperature coefficient of the short-circuit current causes a negative thermal
feedback in the device. This is the most important condition allowing for igbt to be easily connected in
parallel.
(a) Short-circuit Type I
This short-circuit type is associated with the turn-on of an igbt during an existing short-circuit in
the output circuit. In short-circuit mode, the igbt limits the maximum collector current according to its
output characteristics. Due to the high voltage while the short-circuit current flows through the igbt,
the device has to withstand extremely high power loss. In this case the igbt has to be turned off in
around 5 to 1O µs
(b) Short-circuit Type II
Short-circuit type II exists when a short-circuit in the output circuit occurs during the “on phase”,
of the igbt. Limited by natural circuit inductance, the current in the output circuit increases. The
collector-emitter-voltage increases just when the output current reaches the level corresponding to
the gate-emitter-voltage. The increase of the collector emitter voltage results in a large decrease of
the gate-collector-capacitance. This causes an internal current which charges up the gate-emittercapacitance hence VGC rises. (see the Miller-Effect). In some cases the gate emitter-voltage increases
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far above the allowed level, e.g. 30 V. With this higher gate-emitter-voltage, there is a dynamic shortcircuit current peak. It's value is higher than the stationary short-circuit current depending on the
actual gate-voltage. Similar situations appear also in short-circuit type I when there is a slow increase
of current due to circuit inductance, and the IGBT nearly turns on for a short period of time, which
means that the collector-emitter-voltage breaks down to some 10 V
(c) Clamping in Short-circuit Type II
Due to the Miller-Effect, the increase of the collector-emitter-voltage causes a current that
elevates the gate-voltage if the gate cannot be discharged fast enough. This is especially critical when
the igbt is controlled by a source with a series gate resistor. Therefore it is very important to use a
gate clamping circuit to help protect the device when this short-circuit type occurs, see Fig. 6.5(a). If a
fast acting diode is used in the clamp, active clamping is the best method for limiting the gate emitter
voltage. Active clamping has advantages compared to Zener clamping between the gate and emitter,
because the voltage clamping is much faster and more accurate than using a zener. A fast diode allows
the charge caused by the Miller Effect to be removed very fast. The dynamic short-circuit peak
current can be kept much lower compared to a bias supply without active clamping, see Fig. 6.5(b)
(a) Active clamp circuit for S/C
(b) SCSOA
Fig. 6.5 IGBT S/C SOA and active clamp circuit
(d) Short-Circuit Safe Operating Area (SCSOA)
The level of the short-circuit current is determined by the gate voltage of the igbt. But under
normal on-state conditions, a low gate-emitter voltage causes an increase of VCE(sat) and higher forward
loss. The resulting short-circuit current is lower than ten times the nominal current. The short-circuit
can safely be turned-off in less than 1O µs up to the full breakdown voltage of the igbt. Therefore the
protection circuitry can be kept relatively small. But the inductive voltage peak (V = La × di/dt} caused by
natural circuit inductance must be taken into account.
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6.5 Problems associated with the high switching speeds of IGBTs
The introduction of igbt devices into pwm voltage source inverter industrial drive systems
introduced many application difficulties. Their benefits were higher switching frequencies (5-20 kHz
rather than 2 kHz with bipolar), lower filter sizes, more compact and economic driver circuits, lower
switching losses and conduction losses in high power, better short circuit protection. However the
switching speeds of the devices (e.g. 100-300nS rather than 1 - 2 µS) introduced many problems. This
section briefly describes some of the issues and their remedies.
(a) dc bus inductance
Higher switching speeds, meant that the dc supply to the pwm dc to ac converters or inverters,
experienced currents not only of higher frequencies but also with a higher di/dt. These high rates of
change of currents cause voltage overshoots across the switches when they turn off, and are typically
associated also with ringing between the device capacitance, lead inductance (associated with the dc
link or dc bus) and the dc link capacitance. A partial remedy for this problem was to include snubber
capacitance across the dc input terminals to the power semiconductor modules. New module designs
were introduced with lower internal inductance. Finally, to lower the natural inductance of the dc bus,
new bus systems were developed to connect the power modules to their dc-link capacitance. Typical dc
bus designs include parallel conducting plates for the positive and negative rail, with wide conducting
plains and a small distance between the two rails. This has the effect of increasing the magnetic paths
of flux created by current flowing through the dc bus. This increase, decreases the inductance. So
drive designers talk in terms of say, a 200 nH dc bus, a 350 nH etc... The distance between the two dc
rails must be large enough to cope with any expected voltage between the two rails and to cope with
thermal contraction and expansion. Techniques were developed where the insulation was sprayed on to
the conducting plates often made of copper.
(b) voltage spikes
The higher switching speeds associated with igbts increased the dv/dt’s associated with the pwm
waveforms delivered to the motor. This pwm waveform has to be passed to the motor via a cable which
in turn can be characterized as a distributed LC network. The increase in the dv/dt above that
associated with bjt’s, introduced more ringing effects which resulted in spiked voltages at the motor
side of the cable. These spikes were observed as destroying the motor windings within 15 minutes of
connecting the new drive systems. The problem is more serious the longer the cable connecting the
drive to the motor, cable lengths over 100 ft is regarded as when the problems become severe. Other
side-effects of this ringing and the high frequency pwm waveforms, was the creation of radiated emi/
rfi noise that could interfere with a wide range of electronic equipment and instrumentation.
A simple solution to this problem, is the inclusion of a 3-5% inductance at the output of the drive.
This tends to place an impedance in the path of any ringing and lower their magnitude. More drastic
measures include RC snubbers that can be incorporated at the output of the drive together with the
inductance. Other solutions include improving the motor winding insulation. Shielded cable can be used,
which are slightly more expensive, to lower emi/rfi emissions.
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(c) motor bearing currents
The pwm switching action at the output of a variable speed drive introduces dv/dt not only between
the wires in a 3-phase cable, but also between the 3 phase wires and ground. At high frequencies the
input impedance of a motor changes from inductive to capacitive and so can represent a short for these
high frequency voltage waveforms being delivered to the motor. The resultant currents quite often find
a path to the ground of the motor casing via the motor bearings. The high frequency currents can in
turn, burn the oil in the motor bearings and cause their destruction. Solutions can include: better
grounding techniques, such as connecting a the cable ground lead to ground at the drive and also at the
motor terminals; using isolating bearing such as ceramic bearings.
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Chapter 7: SiC and GaN
The last few years has seen a shift to two new power semiconductor technologies: Silicon Carbide
(SiC) and Gallium Nitride. These devices are presently more expensive to produce with lower yield rates
than pure silicon devices such as mosfet and igbt, but hold promise in most areas of interest when it
comes to desirable characteristics of power semiconductors. The device technologies are in their early
stages of development, but already are being used in applications requiring higher performances where
the higher cost justifies their use. A review of some of the electrical features of these devices is given
in this chapter together with predictions of where these devices are expected to impact the world of
power electronics. Illustrations are included primarily from a keynote speech given at APEC 2013 plus
literature available on the network and recent IEEE papers.
7.1 General characteristics of the new devices
The new devices have significantly improved electrical characteristics as compared with the
traditional mosfet and igbt devices.
(a) Benefits of SiC and GaN devices
•
•
•
•
•
•
•
•
lower losses
higher switching frequencies
higher operating temperatures
robust and reliable
high breakdown voltage
GaN prices near to Si
GaN has no body diode
Device integration on Si
(b) Disadvantages of SiC and GaN devices
• high SiC material cost
• design inertia - reluctance to change
• not drop-in swap
• normally on switches
• proof of reliability
• SiC mosfet gate oxide
• availability: no 2nd source
• GaN defects
• GaN Si material mismatch
(c) SiC and GaN devices come in a variety of device technologies
• SiC - established in the market as high performance diodes, released as JFETs and
MOSFETs (target application space 1200 V).
• GaN on Si - high performance solution with a roadmap to low cost for diodes and
transistors
• GaN on SiC - higher cost solution for applications demanding higher performance with
reduced sensitivity to cost
• GaN on GaN - early stage of development.
• Gallium Oxide - very early stage
• Diamond - out there ?!
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(d) summary of benefits
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7.2 Timelines for the introduction of the new technologies
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7.3 Market for the new devices
Introduction of new technology is market driven. The new devices have significantly improved
electrical characteristics as compared with the traditional mosfet and igbt devices. Higher energy
conversion efficiency and renewable energy sources are creating a demand for better power
semiconductor devices.
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7.4 Application Examples
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7.5 Predictions of the future for the new devices
•
•
•
•
•
•
•
•
SiC dominates at 1200 V and above
Prices are the biggest barrier preventing adoption
SiC module revenue to overtake discretes
Will 1200 V GaN threaten SiC? or when....?
GaN will dominate up to 900 V
GaN prices should match silicon equivalents in 2018
Most 600 V SiC Schottky will move to GaN
Must prove reliability before industrial applications will adopt
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Chapter 8: AC/DC/RMS of Waveforms
Defining the different components present in voltage and current waveforms is an important
procedure for obtaining the performance of switchmode power converters. The percentage presence
of the dc (average or mean) component, the ac component and the total rms of a current waveform, for
example, can determine the power dissipation in a resistor or a power semiconductor, the power flow to
and from a dc voltage source, a capacitor smoothed dc-link voltage, or an ac voltage source etc.
For instance, determining the power dissipation in a device, which is important for designing
heatsinks and controlling the device maximum temperature, may be related either to the total rms of
the device current, or alternatively its average current. A power semiconductor device average power
loss may be found to be within the device’s specifications, but problems may occur if it has a high peak
current and a low peak-to-rms ratio; e.g. a thyristor can have a 20:1 peak-to-rms ratio rating, but the
same rating for a mosfet could be only 3. Lastly, power semiconductors have limited voltage ratings, and
are often classified in groups depending upon not only their current ratings but also their rated peak
voltage ratings, e.g. for an igbt, typical values are 600V, 1200 V, 3.3kV, 6.6 kV etc.
Waveforms can come in many different forms and, in power electronics, the important components
of these waveforms for both voltage and current, can be summarized as being;
(a) peak (or maximum)
(b) peak-to-peak, e.g. peak-to-peak current ripple
(c) total rms (or rms for short)
(d) dc component, or otherwise referred to as the average or mean
(e) ac component, or otherwise referred to as the total rms of all the harmonic components excluding
the dc component
To begin the understanding of the nature of these different waveform components, lets start by
looking at the nature of a voltage waveform.
8.1 RMS of a repetitive voltage waveform v(t)
A device voltage is defined as the voltage drop across the component. The nature of a voltage
waveform is defined as the potential difference between two nodes in an electrical circuit and hence
can be the voltage drop across a component or device. The application of a voltage across a component
causes current to flow through the component.
The effective value of a periodic voltage waveform can be defined as its rms and, from base
principles, can be defined as being related to the effective value of the power delivered to a
resistor....IF.... that same voltage waveform were dropped across a resistor instead.
Hence, if a voltage Veff is applied to a resistor, R, the power, P, dissipated in that resistor is given by:
P=
2
Veff
2
Vrms
⇒P=
........................................................................................................................................................................8.1
R
R
Veff = Vrms = rms value of the voltage waveform ...........................................................................................................8.2
The power dissipated in a resistor, as a result of current i(t) flowing through it, can be defined as
being the average rate of energy flow to the resistor over time. Note that the resistor power
dissipation in watts due to the current i(t) flowing through the component, represents the average
rate of flow of energy, or power dissipation, due to the resistor power waveform p(t) ( = v(t)×i(t) ) as
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a function of time. The energy dissipated in the resistor over a fixed time period, i.e. such as a
pulsed current, has the unit of Joules.
The average power P dissipated in a resistor over time associated with p(t) (power or power flow
can also be said to have a waveform that is a function of time) is normally the result of repetitive
waveforms (current, voltage and power), that repeat over a periodic cycle T, so:
1
T
∫ p(t) dt ..............................................................................................................................................................................8.3
T 0
The instantaneous power dissipated in a resistor: p(t) = v(t) × i(t) ...........................................................................8.4
Also using the characteristic of a resistor where i(t) ∝ v(t), or i(t) × R = v(t)......................................................8.5
P=
⎡ v2 (t) ⎤
∫
∫0 ⎢⎢ R ⎥⎥ dt .........................................................................................................8.6
T 0
⎣
⎦
⎤
1 ⎡1 T
Re-arranging; and bringing out the constant R: P = ⎢ ∫ v2 (t) dt ⎥ .................................................................8.7
R ⎢⎣ T 0
⎥⎦
Then: P =
1
T
⎡v(t) × i(t) ⎤ dt = 1
⎣
⎦
T
Substituting in for P =
2
Vrms
R
=
1 ⎡1
⎢
R ⎢⎣ T
The following is obtained: Vrms =
1
T
∫
T
0
∫
T
⎤
v2 (t) dt ⎥ ...........................................................................................................8.8
⎥⎦
T
0
v2 (t) dt ..........................................................................................................8.9
This delivers the important result: Vrms =
1
∫
T
T
0
v2 (t) dt .....................................................................................8.10
The rms of a voltage waveform v(t) is the-root-of-the-mean-of-the-voltage-waveform squared. This
is an important definition as it defines the rms of a voltage waveform as a mathematical function of the
voltage waveform irrespective of whether the voltage is dropped across a resistor, a capacitor,
inductor or a power semiconductor.
8.2 RMS of a repetitive current waveform i(t)
Similarly for current: the effective value, Ieff, of a periodic current waveform, i(t), is based upon
the effective value of the power, P, delivered to a resistor, R,....IF... that current waveform was
flowing through the resistor. The same approach used in section 8.1 to obtain the rms of a voltage
waveform, can also be used to obtain the rms of a current waveform:
P = I2effR ⇒ P = I2rmsR ...............................................................................................................................................................8.11
Using the result obtained in equation 8.10 and applying to a current waveform:
I rms =
1
∫
T
T
0
i2 (t) dt ...............................................................................................................................................................8.12
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8.3 RMS components of a repetitive voltage waveform v(t)
What is the RMS of a voltage waveform with two components ?: v(t) = v2(t) + v1(t) .....................................8.13
where v2(t) and v1(t) are sinusoidal voltage harmonics that have an harmonic index that are an
integer number of the fundamental harmonic associated with a cyclic period T.
Vrms =
1
T
∫
T
0
(v(t) )
2
1
dt =
T
∫
Expanding the brackets: Vrms =
T
0
(v (t) + v (t) )
2
1
1
2
∫
T
T
0
(v(t) )
2
dt ................................................................................................8.14
dt =
1
∫
T
T
0
(v (t) + 2v (t)v (t) + v (t) ) dt ................8.15
2
1
2
1
2
2
The integral can now be applied to the terms individually:
Vrms =
1
∫
T
T
0
v21 (t) dt +
1
∫
T
T
0
2v 1 (t)v 2 (t) dt +
1
∫
T
T
0
v22 (t) dt ..............................................................................8.16
*** A VERY IMPORTANT NOTE!
An important aspect associated with the two voltage waveforms v1(t) and v2(t) is that they have a
different frequency, and the integral of v1(t) × v2(t) = 0, and the two terms can be said to be
orthogonal: v1(t) could also be dc and v2(t) a sinusoid. This result is true even if the harmonic
frequencies of v1(t) and v2(t) do not have harmonic integer numbers relative to the fundamental
frequency. However, the integral should be taken over a time period where the harmonic waveforms
patterns either repeat themselves, could be over several fundamental cycles, or having an integral range
from t = 0 to ∞.
Eliminating the term v1(t)⨉v2(t) and simplifying the expression equation 8.16 reveals a very
important result:
2
2
Vrms = V1,rms
+ V2,rms
.................................................................................................................................................................8.17
The rms of a voltage waveform having two sinusoidal harmonic components defined by V1 and
V2, is the square-root of the sum of the rms of the individual harmonics.
Example 1
If a voltage waveform has two harmonic voltages, V1 and V2, at frequencies of 60 Hz and 120 Hz
with magnitudes of 3V and 4V, respectively, then the total rms of the voltage waveform:
is NOT given by: Vrms ≠ 3 + 4 = 7 V ....................................................................................................................................8.18
but is instead given by: Vrms = 32 + 43 = 5 V ..............................................................................................................8.19
If this voltage is applied to a resistor of 1 Ω, then the power dissipated in the resistor would be:
P =
2
Vrms
52
= 25 W ..............................................................................................................................................................8.20
R
1
The resistor power can also be obtained by determining separately the power dissipated in the
resistor by each harmonic:
P =
2
V1,rms
R
=
+
2
V2,rms
R
=
32
1
+
42
1
= 9 + 16 = 25 W ................................................................................................................8.21
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Equation 8.17 can be written in short by stating V1 = rms of the fundamental harmonic (= V1,rms) and
V2 = rms of the second harmonic (= V2,rms)
Vrms = V12 + V22 ...........................................................................................................................................................................8.22
The result in equations 8.17 and 8.22, can also be applied to a current waveform i(t) with two
harmonic current components i1(t) and i2(t), or I1, I2:
I rms = I21,rms + I22,rms = I21 + I22 ........................................................................................................................................8.23
8.4 AC/DC and RMS components of a repetitive current waveform i(t)
Now that the total rms, or in short just rms, of a waveform has been established as being the
root-of-sum-of-squares of the separate harmonic components. Then a more general division of the
waveform into its DC and AC components can be defined. The analysis presented in this section for a
current waveform can be equally applied to a voltage waveform.
Consider the waveform: i(t) = Idc + i1(t) + i2(t) + i3(t) + i4(t) + i5(t) + ... ...............................................................8.24
Idc = dc component of current, I1 = rms of the fundamental harmonic, I2,.... = harmonics etc.
The total rms of the current can be defined as the root-of-sum-of-squares of the separate
harmonic components:
I rms = I2dc + I21,rms + I22,rms + I23,rms + I24,rms + ...... .........................................................................................................8.25
The additional component brought in here, as well as the harmonics, is the dc component Idc.
In short form: I rms = I2dc + I21 + I22 + I23 + I24 + ...... .................................................................................................8.26
IH can be defined as the total rms of all the currents excluding the dc component and the
fundamental. In this course, the fundamental is separated from the rest of the harmonics owing
to its special nature in many rectifier and inverter systems where the main power flow is
associated with the fundamental harmonic and is the most desired component. The harmonics IH
are often parasitic currents which are undesirable, cause power losses in the system and are filtered
wherever possible.
IH = rms of the current excluding the dc and fundamental:
I H = I22 + I23 + I24 + ...... ........................................................................................................................................................8.27
This means that the total rms of the current, Irms, can be written:
I rms = I2dc + I21 + I2H ................................................................................................................................................................8.28
The AC component of the current is defined as:
I ac = I21 + I22 + I23 + ...... = I21 + I2H ................................................................................................................................8.29
Iac is effectively the rms of all the sinusoidal harmonic currents including the fundamental, or it
can be considered as the rms of the current with the dc extracted:
I ac = I2rms − I2dc ........................................................................................................................................................................8.30
When a current is drawn by a rectifier, such as a diode rectifier, the current is referred to as the
supply current. The rms of this current, Irms, can be designated Is and is defined:
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1
2π
()
2
∫ i dθ .......................................................................................................................................................8.31
2π 0 s
In many cases, the supply current has no dc component, which is not a desirable current to have
anyway because of its zero net power flow and its effect on transformers.
I ac = I s =
Hence: I s = I21 + I2H ...............................................................................................................................................................8.32
8.5 RMS/DC/AC of a general periodic pulse current waveform
The average component of a load current ia, Io,dc , can be subtracted and the ripple component is
left, see Fig. 8.1. The load current ripple (= ac component of the load current) is a triangular waveshape
with the peak-to-peak ripple of ∆Ia, see Fig. 8.1(a).
The load current ripple (= ac component of the load current) is a triangular waveshape with the
peak-to-peak ripple of ∆Ia, see Fig. 8.1(a). This triangular waveshape can be said to have a peak-to-peak
ripple of ΔIa. The rms of this ac component can be determined using the rms equivalent waveform
shown in 8.1(b) below: changing the polarity of the negative portion does not affect the rms of the
waveform. With this transformation, a triangular waveform of magnitude ∆Ia/2 is obtained. The RMS
of a triangle waveform is I rms =
Ip
3
=
ΔI
2 3
the triangular equivalent waveform has: Ip = ∆Ia/2
(a) ac component of the load current
(b) ac component transformed for analysis
Fig. 8.1 Triangular current waveform: ripple of the load current
In general, for a switchmode circuit a switch current takes
the shown in this figure.
The current i(t) ramps from Im to Ip over the time period
within a pwm switching cycle, tc, defined by t = t1 and t = t2:
()
i t
⎛ t−t ⎞
1
= Im + ⎜
⎟ × I p − I m ..........................................................8.33
⎜⎝ t − t ⎟⎠
2
1
(
)
The validity of this equation can be verified by
considering: i(t=t1) = Im, i(t=t2) = Ip.
The rms, Irms, of this current waveshape is given by:
I rms =
ECE Dept. University of Alberta
1
tc
∫
t2
t1
⎛
⎛ t−t ⎞
1
⎜ Im + ⎜
⎟ × Ip − Im
⎜⎝ t − t ⎟⎠
⎜⎝
2
1
(
2
⎞
⎟ dt ....................................8.34
⎟⎠
)
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Using ẟtc = t2 - t1 & integrating this equation between the two limits, results in the following:
I rms =
(I + I I
3
δ
2
p
p
m
)
+ I2m ....................................................................................................................................................8.35
⎛I +I ⎞
p
m
⎟ .........................................................................................8.36
The dc component of this current is: I dc = δ ⎜
⎜⎝ 2 ⎟⎠
The ac component of this current is: I ac = I2rms − I2dc ............................................................................................8.37
Examining the waveform in Fig. 8.1 again:
Using: I rms =
(I + I I
3
δ
2
p
p
m
)
+ I2m waveform (b) has: Ip = ΔI/2, Im = 0, ẟ=1:
making the substitution in 8.35, results in: I rms =
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ΔI
2 3
= rms of the inductor current ripple ...............8.38
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1
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Chapter 9: Steady-State Properties of Power, L & C
The analysis of power flow and device power dissipation are very important in power electronics to
assess the switchmode power supply performance, e.g. efficiency determination, and also to design the
cooling mechanisms. Power losses in particular have many implications on the overall design of the power
supply as it determines the operating temperature of the power semiconductor, cooling requirements
(in the form of heatsinks) and also the maximum allowable device switching frequency. The device
switching frequency, in turn, has many implications on the size of LC filters used in the circuit and emi/
rfi emissions. The heatsink size and LC component size are the largest portions of the power converter
in terms of size, weight and cost.
The analysis of power begins here with the basic definitions of power flow in a circuit.
9.1 Power Dissipation and Power Flow
The basic definition of instantaneous power flow to a device or circuit is given by:
Instantaneous power: p(t) = v(t) * i(t) .....................................................................................................................................9.1
v(t) is the instantaneous voltage into the device or circuit
i(t) is the instantaneous current flowing into the device or circuit
This analysis assumes a 2-port network where there are two input terminals and the current flows
into one terminal and returns via the second terminal. The energy, E, delivered to the device or circuit
in Joules over the time period t1 to t2 is given by:
E =
∫
t2
t1
()
p t dt
Joules ............................................................................................................................................................9.2
If the voltage and current waveforms are assumed to be periodic and repetitive over a cycle of T
seconds in duration, then the average power P in watts delivered to the network is:
P =
1
∫
T
T
0
()
p t dt
Watts =
1
∫
T
T
0
( )( )
⎡ v t i t ⎤ dt Watts ..........................................................................................9.3
⎢⎣
⎥⎦
Alternatively, since the waveforms are assumed to have a repetitive cycle then the cycle can be said
to be composed of 360° degrees and the voltage and current waveforms can be defined relative to the
phase position within the periodic cycle, v(θ) and i(θ), so the average power equation becomes:
or P =
1
∫
2π
2π
0
( )( )
⎡ v θ i θ ⎤ dθ
⎢⎣
⎥⎦
Watts ..................................................................................................................................9.4
()
Where the instantaneous power flow can be defined as: p θ
() ()
= v θ × i θ ....................................................9.5
9.2 Power Absorbed in a DC Voltage Source
A dc voltage source could be a battery or even the voltage drop across a capacitor smoothed dc-link
at the output terminals of a simple 1-phase diode rectifier. Quite often the size of the capacitor in
such an application is so large as to make its ripple voltage, = ac component, very small and the capacitor
voltage may be assumed to be almost purely dc. Power flow analysis on the effect of current flowing
into this dc voltage source is identical to considering the situation when current is being drawn from the
dc voltage source. The only difference in the later case is that there is a net average power drawn from
the terminals with the dc voltage source.
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Consider a current i(θ) in steady-state that repeats over a cycle of duration 2π (or 360°), and that
flows into a dc voltage source Vdc [=v(θ)]. The power P delivered to the dc voltage can be obtained from:
P =
1
∫
2π
2π
0
( )( )
⎡ v θ i θ ⎤ dθ
⎢⎣
⎥⎦
W ................................................................................................................................................9.6
v(θ) can be replaced with Vdc: P =
Re-arranging: P =
Vdc
2π
∫
2π
0
1
∫
2π
2π
0
()
⎡ v × i θ ⎤ dθ ..........................................................................................9.7
⎢⎣ dc
⎥⎦
()
i θ dθ ...........................................................................................................................................9.8
()
()
If i(θ) has a dc component and a sinusoidal component (= ac component): i θ = I dc + i1 θ ........................9.9
P =
Vdc
∫
2π
2π
0
()
⎡ I + i θ ⎤ dθ .....................................................................................................................................................9.10
⎢⎣ dc 1 ⎥⎦
Expanding the terms in brackets and integrating separately:
Vdc
2π
Vdc
2π
()
∫
∫ i θ dθ ....................................................................................................................................9.11
2π 0
2π 0 1
The average component of any sinusoidal waveform at any frequency is zero:
P =
∫
2π
0
I dc dθ +
()
i1 θ dθ = 0 ...............................................................................................................................................................................9.12
If the sinusoid has an harmonic frequency that is not an integer number of the fundamental
frequency associated with cyclic period 2π, then the integral should be taken over the cycle of the
harmonic frequency or integrated from zero to ∞. Either way, the integration still results in zero.
Hence the integration in equation 9.11 can eliminate the last term, giving:
Vdc
2π
∫ I dθ ........................................................................................................................................................................9.13
2π 0 dc
Hence: P = Vdc I dc W ...............................................................................................................................................................9.14
P =
Significance
This is a very important result in utility rectifier circuits as it basically says that the output power
of the rectifier is given by the product of the rectifier output dc voltage with its average dc output
current. Any ripple components present in the rectifier output current, = ac components, do not
contribute to the rectifier output power, ideally!
Similarly, a power semiconductor which can be said to have a constant on-state dc voltage, e.g. a
BJT, has a conduction power loss given by the product of the device on-state dc voltage multiplied by
the average dc current. THIS IS TRUE EVEN IF THE DEVICE IS OPERATING IN
SWITCHMODE AND HAS A LARGE AC COMPONENT IN ITS CURRENT WAVEFORM.
9.3 Power drawn from a Sinusoidal Voltage Source
A frequent situation that occurs in power electronics, is a power converter drawing current from a
sinusoidal ac voltage source, e.g. a single phase utility rectifier connected to the 60Hz ac supply voltage.
Note that the analysis of 3-phase systems is an extension of the single phase situation. In such
systems, the rectifier draws current from the ac supply, and is often considered to be in steady-state
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with the supply current waveform repeating the same waveshape every cycle of the 60Hz mains cycle.
Since the rectifier in considered to be a non-linear load, then the current waveform normally is
considered to have a fundamental component together with harmonics with frequencies that are an
integer number of the fundamental frequency.
Assume a current i(θ) is being drawn from a sinusoidal voltage source v1(θ). The subscript 1 refers to
the fundamental harmonic, and 2 refers to the second harmonic, etc.
1
( )( )
( )( )
⎡ v θ i θ ⎤ dθ = 1 2π ⎡ v θ i θ ⎤ dθ ....................................................................................................9.15
∫
∫
⎥⎦
⎥⎦
2π 0 ⎢⎣
2π 0 ⎢⎣ 1
Assume i(θ) has a dc component, Idc, and two sinusoids, one at the same frequency as the sinusoid
voltage, i1(θ), and one at a different frequency, i2(θ)
=> i(t) = Idc + i1(θ)+ i2(θ)................................................................................................................................................................9.16
The average power associated with a dc current flowing from an ac voltage is zero.
P =
2π
=> Pdc =
1
∫
2π
2π
0
()
⎡ v θ I ⎤ dθ = 0 ......................................................................................................................................9.17
dc ⎥
⎢⎣ 1
⎦
This means that a dc current drawn from a sinusoidal voltage source has no net power flow
- The average of the product of two sinusoids at different frequencies is zero.
P2 =
1
∫
2π
2π
0
() ()
⎡ v θ i θ ⎤ dθ = 0 ........................................................................................................................................9.18
2
⎥⎦
⎣⎢ 1
This means that any harmonic current at a frequency other than the fundamental frequency, will not
draw any net power from the ac voltage source. Since the harmonic current has a real rms value, I2,
then the harmonic current can be said to contribute to the apparent power of the rectifier:
S 2 = V1 I 2 VA ..............................................................................................................................................................................9.19
So the equation defining power can have the Idc and I2(θ) terms eliminated:
P =
1
∫
2π
2π
0
()
() ()
v ( θ ) i ( θ ) dθ ............................................................................................................................................9.21
V1 θ ⎡⎢ I dc + i1 θ + i2 θ ⎤⎥ dθ .........................................................................................................................9.20
⎣
⎦
giving: P =
1
∫
2π
1
2π 0 1
The fundamental current has two components a real, Ip, and an imaginary component, Iq. Since the
imaginary component is phase shifted by 90° relative to V1, it has no net average power flow, and the
real component of current Ip can be defined as Ip = I1 cos ɸ1.................................................................................9.22
P = V1I 1 cos φ1 ...............................................................................................................................................................................9.23
Significance
Consider a current flowing from the 60Hz ac supply with a fundamental component, dc component
and lots of harmonics. The only real net (or average) power flow is associated with the real
component of the fundamental harmonic current.
** dc current has no net power flow
** 2,3,4,5 etc. harmonics have no net real power flow.
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Example: A 60Hz square-wave current of magnitude 10 A is drawn from a 120 V 60Hz sinusoidal
voltage source with a phase angle lag of 30°, determine the average power and the apparent
power drawn from the ac voltage source.
9.4 Inductor
In steady state operation, the average power absorbed by an inductor is zero. If an inductor
absorbed power, this would represent the current increasing cycle by cycle, E = 1/2 L i2, which would not
be considered steady state but a transient.
In steady state operation => i(θ=0) = i(θ=2π) => no net change in 1/2 L i2
()
( ) dθ ..............................................................................................................................................................9.24
1
where
∫ v (θ) dθ represents the change in the inductor current over a cycle.
L
1
For steady-state operation: => i( θ = 0 ) = i( θ = 2π ) => ∫ v ( θ ) dθ = 0 ....................................................9.25
L
iθ
=
1
L
∫
2π
vL θ
0
2π
0
L
2π
0
L
But the definition of the average inductor voltage is also:
()
()
1 2π
average ⎡⎢v L θ ⎤⎥ =
∫ v θ dθ .................................................................................................................................9.26
⎣
⎦
2π 0 L
=> average [VL(θ)] = 0 or otherwise stated: VL,DC = 0 ....................................................................................................9.27
Significance: for periodic currents, the average voltage across an inductor is zero.
9.5 Capacitor
Similar arguments can be used for a capacitor. The average power absorbed by a capacitor is zero
for steady state operation. E = 1/2 C.V2
(
) (
)
i.e. v θ = 0 = v θ = 2π ............................................................................................................................................................9.28
Hence we can deduce;
()
()
1 2π
average ⎡⎢iC θ ⎤⎥ =
∫ i θ dθ = 0 ...........................................................................................................................9.29
⎣
⎦
2π 0 C
Otherwise the capacitor voltage would rise or fall over time and would represent a transient
operation as opposed to a steady-state operation.
Significance: for periodic waveforms that repeat every cycle of duration T, i.e. the circuit is
operating in the steady-state, the average current through a capacitor is zero.
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Chapter 10: 1-phase Diode Rectifiers with R-loads
The most common application for diodes is the utility rectifier. The operation of both half-wave and
full-wave 1-phase diode rectifiers are described in this section, using resistive loads to get familiar with
the rectifiers. Then more realistic situations are described that take into account (a) the effect of the
diode forward conduction voltage drop in low voltage rectifiers, and (b) the effect of an inductive dclink filter. The latter includes the load combinations: R-L load, L-C output filter and an R-L-E load.
10.1 Half-Wave With an R-Load {Analysis neglects VDon}
The basic half-wave diode rectifier is so-called because only half the supply ac voltage gets
transferred to the load.
(a) Circuit Operation
During the positive cycle, see Fig. 10.1, when the ac voltage exceeds the diode forward conduction
voltage, the diode is forward biased and conducts current. At the end of the positive ac cycle, when the
ac voltage drops below the diode forward conducting voltage, the diode turns off and no load current
flows. In the negative ac voltage negative half-cycle, the supply is attempting to force current to flow in
the negative direction. The diode blocks this voltage, and reverse bias current is so small that the
device may be considered as being off and having no current flow. Thus the supply voltage is dropped
across the diode, no load current flows and the resistive load voltage is effectively zero.
Fig. 10.1 half-wave diode rectifier with an R-L load
(b) Analysis (ignoring device voltage drops)
The load voltage, see Fig. 10.1, consists of the positive half of the ac supply voltage. The rms of the
supply voltage is designated as being Vs, so the peak of supply voltage is √2Vs.
()
= 2Vs ⋅ sinθ, 0 ≤ θ ≤ π otherwise 0 ...........................................10.1
()
=
The output voltage waveform: v o θ
The output current waveform: io θ
2Vs
⋅ sinθ, 0 ≤ θ ≤ π otherwise 0 ..........................................10.2
R
The average output voltage, or load resistor voltage, can be obtained by integrating the load voltage
waveform over the positive half cycle, 0 to π radians:
VO,dc =
1
∫
2π
2π
0
()
v o θ dθ =
1
∫
2π
π
0
ECE Dept. University of Alberta
⎡ 2V ⋅ Sinθ ⎤dθ ...........................................................................................................10.3
S
⎣⎢
⎦⎥
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Simplifying we get: VO,dc =
2
V ≈ 0.45VS ...................................................................................................................10.4
π S
For an ac supply voltage of 120 V rms: the average load voltage is 0.45 × 120 = 54 V. With a load
resistance of 10 Ω, the av. load current is 54/10 = 5.4 A, pk. value of √2 ×120/10 = 17.0 A
The rms of the load voltage is obtained by taking the root of the average of the load voltage
waveform squared. This integration needs only to be done over the positive cycle:
VO,rms =
1
2π
VO,rms = VS
∫
2π
0
1
⎡1 − cos2θ ⎤
2
⎦ dθ
⎡v θ ⎤ dθ = V 1 π sin2 θ dθ = V 1 π ⎣
∫
∫
S
S
⎢⎣ O ⎥⎦
0
0
π
π
2
()
π
1
sin2θ
⎡1 − cos2θ ⎤ dθ = V
θ−
S
⎦
0 ⎣
2π
2π
∫
2π
π
= VS
0
V
π − 0 ) − ( 0 − 0 )) =
.................10.5
(
(
2π
2
1
s
Vo,dc = 0.45×120 = 54 V, Io,dc = Vo,dc/R = 54/10 = 5.4 A
{VDon = 0) =>Vo,pk = Vs,pk = √2×Vs = 169.7 V, Io,pk = Vo,pk/R = 169.7/10 = 16.97 A » 17.0 A
{VDon = 0) => Vo,rms = Vs/√2 = 84.9 A, Io,rms = Vo,rms/R = 84.9/10 = 8.49 A
Load ac current= I R,ac = I2R,rms − I2R,dc = 8.492 − 5.42 = 6.55 A ....................................................................10.6
The load power dissipation can be given by: PR == I2R,rmsR = 8.492 × 10 = 721 W ......................................10.7
or PR = I2R,acR + I2R,dcR = 6.552 × 10 + 5.42 × 10 = 429 + 292 = 721 W ............................................................10.8
10.2 1-phase Full-Wave Diode Rectifier: R-load {** Analysis neglects VDon **}
A full-wave diode rectifier is shown in two forms in Fig. 10.2, non-isolating, circuit 1, and isolating,
circuit 2.
(a) Circuit Operation
In the positive cycle, when the ac supply voltage Vs exceeds the forward conducting voltage of two
diode drops, D1 and D3 in Fig. 10.2 circuit 1, the two diodes become forward biased and conduct current.
Neglecting device voltage drops, then Vs is dropped across the load output resistance and current flows
in proportional to the ac voltage magnitude, (v = i × r). In the negative cycle, the two diodes D2 and D4 in
circuit 2 Fig. 10.2, receive a forward biased voltage drop. The ac supply voltage is then applied to the
load resistance, but the voltage applied to the load is positive, see the load voltage and current
waveforms.
The main difference between circuit 2 and circuit 1, is that the supply voltage only has to forward
bias one diode voltage drop before the supply voltage, the transformer output secondary voltage in this
case, is applied to the load. Using natural sign convention, the upper winding W1 conducts the load
current in the positive cycle, and the lower winding, W2, conducts the load current in the negative cycle.
The load voltage and current are identical for both circuits, providing the transformer output voltages
are the same as the supply voltage in circuit 1.
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Fig. 10.2 Full-wave diode rectifier with an R-load
(b) Analysis (ignoring device voltage drops)
The output voltage is obtained by integrating the Vs over half a cycle and multiplying by 2.
VO,dc =
1
∫
2π
2π
0
()
v o θ dθ =
1
∫
π
⎡ 2V sinθ ⎤ dθ ............................................................................................................10.9
s
⎢⎣
⎥⎦
π
0
2 2
V = 0.9Vs ...........................................................................................................................................................10.10
π s
For an ac supply voltage of 120 V rms, the average load voltage Vo,dc= 108 V. For a load resistance of
10 Ω, the average load current Io,dc= 10.8 A, with a peak Io,pk= √2×120/10 = 17.0 A
The rms of the load voltage is obtained by taking the root of the average of the load voltage
waveform squared. The integrations needs only to be done over the positive cycle:
VO,dc =
VO,rms =
1
2π
∫
2π
0
()
v o θ dθ =
2
1
()
2
⎡ 2V sin θ ⎤ dθ .............................................................................................10.11
∫
s
⎥⎦
0 ⎢
π ⎣
π
Vo,rms = Vs ......................................................................................................................................................................................10.12
The load rms current for Vs = 120 V, R = 10 Ω, is 12 A.
The load ac current = I R,ac = I2R,rms − I2R,dc = 122 − 10.82 = 5.23 A ............................................................10.13
The load power dissipation can be given by:
PR == I2R,rmsR = 122 × 10 = 1440 W ..................................................................................................................................10.14
alternatively: PR = I2R,acR + I2R,dcR = 5.232 × 10 + 10.82 × 10 = 274 + 1166 = 1440 W .............................10.15
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(c) Output Voltage Harmonics: n=2,4,6
A Fourier Analysis of both rectifier output voltage waveforms yield the following results:
Fig. 10.3 Fourier series of 1-phase diode rectifier output voltage harmonics
Note that the coefficients given in Fig. 10.3 refer to the peak of the harmonic voltages, and so, for
the full-wave diode rectifier the rms of the rectifier output voltage harmonic, hence load resistance
voltage harmonics are:
Vo,n =
4
( n − 1) π
2
Vs for n = 2,4,6,8, etc...............................................................................................................................10.16
The dominant and lowest frequency harmonic occurs at n = 2: Vo,2 =
4
3π
Vs = 0.424Vs
10.3 R-load Vs is small (e.g. 5-30 V, VDon taken into account, θc < 180°)
The general output voltage waveform for a 4 diode full-wave rectifier looks like:
Fig. 10.4 R-load voltage taking into account the effect of the diode voltage drops
At the beginning of each half cycle, the supply voltage (=
2Vs sinθ )
has to increase up to a voltage
greater than the diode voltage drops (2VDon) for current to start flowing through the resistor load. The
current starts to flow at the angle a when the diodes are forward biased 2Vs sinα = 2VDon , and the load
voltage increases up from zero at this angle. Conversely at the end of each half cycle, the current stops
flowing at 180° - a. The effect of a, hence the diode conduction angle θc, is to lower the load voltage and
is more significant the smaller the supply voltage becomes: e.g. Vs » 5 to 30 V (assuming VDon is around
0.7 to 1.2 V). The diode conduction angle θc and associated angle α can be calculated using:
⎛ V ⎞
α = a sin ⎜ Don ⎟ for half-wave diode rectifier, and full-wave using a 2 diode bridge. ...........................10.17
⎜ 2V ⎟
⎝
s⎠
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⎛ 2V ⎞
α = a sin ⎜ Don ⎟ for a full-wave diode rectifier using a 4 diode bridge. ........................................................10.18
⎜ 2V ⎟
⎝
s⎠
θc = 180° -2α,........ and expressed as a duty cycle δc𝛿= θc° / 360° = 0.5 - α/180°..........................................10.19
Vo,dc is almost equal to the ideal (0.45 Vs for half-wave and 0.9Vs for full-wave). The effect of the
diode conduction voltage drop VDon on Vo,dc is then subtracted from this ideal taking into account that
either one or two diodes may be conducting in series and that their conduction period θc expressed as
a duty cycle is δc. Then the diode on-state voltage drop VDon acts as a voltage pulse with a duty cycle δc
(see chapter 8 examples), that lowers the average output voltage by VDon:
(a) Half-WaveVo,dc =
2
π
Vs − δcVDon = 0.45Vs − δc × VDon .......................................................................................10.20
(b) Full-Wave 2 diode bridge: Vo,dc =
2 2
π
Vs − 2δcVDon = 0.9Vs − 2δc × VDon ...................................................10.21
2 2
V − 2δc ⎡2VDon ⎤ = 0.9Vs − 4δc × VDon .........................................10.22
⎣
⎦
π s
Vo,rms: Considering the VDon acts as a voltage pulse with a duty cycle δc (see chapter 8 examples),
that lowers the rms output voltage is approximately reduced by √ δc VDon
(c) Full-Wave 4 diode Bridge: Vo,dc =
(a) Half-Wave:Vo,rms ≈
Vs
2
− δc × VDon ............................................................................................................................10.23
(b) Full-Wave 2 diode bridge: Vo,rms ≈ Vs − 2δc × VDon ............................................................................................10.24
(c) Full-Wave 4 diode Bridge: Vo,rms ≈ Vs − 2δc × 2VDon ..........................................................................................10.25
10.4 R-load Vs is large (Vs >> VDon, say Vs > 30V, and assume θc = 180°, δc = 0.5)
Vs is assumed large relative to VDon, (VDon = 0.7-1.2 V << Vs). => α is very small (assumed 0) & δc is
assumed to be 0.5. This analysis is also useful for diode rectifiers with continuous conduction dc output
currents, e.g when a dc inductor filter is used. Here VDon is assumed very small relative to Vs and E = 0:
=> α is very small θc almost 180° and δc = 0.5, α = 0.
Vo,dc: the effect of the diode in the half-wave is to reduce the dc voltage output by 0.5*VDon; in the
full-wave with two diodes conducting, the output dc voltage is reduced by 2*VDon.(when one diode
conducts in a 2 diode bridge, the average output is reduced by VDon.
(a) Half-Wave: Vo,dc ≈ 0.45Vs − 0.5VDon ..........................................................................................................................10.26
(b) Full-Wave 2 diode bridge: Vo,dc ≈ 0.9Vs − VDon ......................................................................................................10.27
(c) Full-Wave 4 diode Bridge: Vo,dc ≈ 0.9Vs − 2VDon ....................................................................................................10.28
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Vo,rms
(a) Half-Wave: Vo,rms ≈
Vs
2
−
1
2
VDon
(b) Full-Wave 2 diode bridge: Vo,rms
10.29
................................................................................................................................
≈ Vs − VDon
10.30
............................................................................................................
(c) Full-Wave 4 diode Bridge: Vo,rms ≈ Vs − 2VDon
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..........................................................................................................
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10.5 R-E load (conduction angle = θc , zero current angle α)
(a) Half-Wave
At the beginning of each half cycle, the supply voltage (=Vs) has to increase up to a voltage greater
than the load dc voltage (E) and the diode voltage drops (2VDon) for the diodes to become forward
biased and for current to start flowing through the resistor load. Before reaching this point, the diodes
are reversed biased, no current flows and the output voltage Vo is E as no voltage drop occurs the
resistor R, see Fog. 10.5. The current starts to flow at the angle α when the diodes are forward biased ,
and the load voltage increases up from zero at this angle. Conversely at the end of each half cycle, the
current stops flowing at 180° - α.
Fig. 10.5 Half-Wave Diode Rectifier with an R/E Load
The diode conduction angle θc and associated angle α can be calculated using: 2VS sinα = E + VDon
⎛E+V ⎞
Don ⎟
α = a sin ⎜
⎜ 2V ⎟
⎝
S ⎠
giving:
, giving: θc = 180° -2α....................................................................................................................10.32
Ideally, the circuit waveforms can be integrated to obtain exact equations for the dc and rms load
currents and voltages. However, circuit parameters such as transformer winding resistance and diode
resistance should also be taken into account where appropriate.
1
∫
2π
I O,rms =
α
()
⎡ v2 θ ⎤
⎢ R
⎥ dθ =
⎢R + r ⎥
d⎥
⎢⎣
⎦
Vs2
1
I O,rms =
I O,dc =
π−α
R + rD 2π
1
∫
π
π
2
α
sin2α −
2⎤
⎡⎛
⎡ v2 θ ⎤
2VS sinθ − VDon − E⎞ ⎥
π⎢
⎠ ⎥
1 2⎢ R
⎥ dθ = 1 2 ⎢ ⎝
dθ
∫
∫
⎥
π α ⎢ R + rd ⎥
2π α ⎢
R + rd
⎢⎣
⎥⎦
⎢
⎥
⎣
⎦
π
()
2⎤⎛ 1
⎡
α⎞
Vs E + VDon cos α + ⎢Vs2 + E + VDon ⎥ ⎜ − ⎟
π
⎣
⎦⎝ 2 π ⎠
2 2
(
)
()
VO1,rms = E 0.5 +
1
π
)
⎡v θ ⎤
⎤
π⎡
⎢ R
⎥ dθ = 1 2 ⎢ 2VS sinθ − VDon − E ⎥ dθ = 1
∫
⎢R + r ⎥
⎥
π α ⎢⎢
R + rd
R + rD
d⎥
⎥⎦
⎢⎣
⎣
⎦
Neglecting rd of the diodes: VO,rms =
VO2,rms =
(
∫
π
2
α
α
π
2
2
VO1,rms
+ VO2,rms
..............................................................10.33
...............................................................................10.34
⎡ 2
⎛ 1 α⎞ ⎤
⎢
Vs cos α − ⎡E + VDon ⎤ ⎜ − ⎟ ⎥
⎣
⎦⎝ 2 π ⎠ ⎥
⎢ π
⎣
⎦
............................................10.35
..........................................................................................................10.36
, ...........................................................................................................................................................................10.37
2
2
⎛ 2V sinθ − V ⎞ dθ = ⎡V 2 − V 2 ⎤ ⎛ 0.5 − α ⎞ + Vs sin2α − 2 2 V V cos α
⎜
⎟
s
Don ⎠
Don ⎦
⎣ s
⎝
π ⎠ 2π
π Don s
⎝
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(b) Full-Wave
Fig. 10.5 Full-Wave Diode Rectifier with an R/E Load
I O,rms =
I O,dc =
1
Vs2
R + 2rD
π
sin2α −
2⎤⎛
⎡
2α ⎞
Vs E + 2VDon cos α + ⎢Vs2 + E + 2VDon ⎥ ⎜ 1 −
⎟ ..........................................................10.39
π
π ⎠
⎣
⎦⎝
4 2
(
)
(
)
⎡2 2
⎛
2α ⎞ ⎤
⎢
Vs cos α − ⎡E + 2VDon ⎤ ⎜ 1 −
⎟ ⎥ ...............................................................................................................10.40
⎣
⎦⎝
R + 2rD ⎢⎣ π
π ⎠ ⎥⎦
1
2
2
VO,rms = VO1,rms
+ VO2,rms
..................................................................................................................................................................10.41
VO1,rms = E
VO2,rms
2α
π
, ...............................................................................................................................................................................10.42
2
2⎤⎛
⎡ 2
2α ⎞ Vs
8 2
= ⎢Vs − 2VDon ⎥ ⎜ 1 −
sin2α −
V V cos α ..........................................................................................10.43
⎟+
π ⎠ π
π Don s
⎣
⎦⎝
(
)
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10.6 Examples
Example 1: A full-wave diode rectifier is operated from a 120V 50Hz ac supply voltage source.
The load consists of a 20W resistive load and dc voltage source of 50V,VDon= 0 V.
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Example 2: A single phase half-wave diode rectifier is supplied from a 60Hz 120 V ac supply. The
diode has a forward conduction voltage of 1.0 V and the load consists of a 50 W resistor.
Determine: (a) the load peak, average and rms voltage, (b) the diode conduction angle, (c) the load
peak, average and rms current, (d) power dissipated in the diode, (e) rectifier input power factor.
With VDon = 1.0 V, VS = 120 V: conditions match those described in section 10.4 (Vs >> VDon =>
assume θc = 180°, a = 0°)
Example 3: A single phase half-wave diode rectifier is supplied from a 60Hz 7 V ac supply. The
diode has a forward conduction voltage of 1.0 V and the load consists of a 100 Ω resistor.
Determine: (a) the load peak, average and rms voltage, (b) the diode conduction angle, (c) the load
peak, average and rms current, (d) power dissipated in the diode, (e) the rectifier input power
factor.
The conditions match the approach described in section 10.3 (small Vs and no dc voltage)
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Example 4: A half-wave diode rectifier with a 12 Ω load resistance has a sinusoidal supply voltage
defined by the equation: Vs(t) = 170 Sin[377 t]. Determine: (a) the average load current, (b) the
rms load current, (b) the apparent power supplied by the source, (d) the power factor of the
circuit. The effect of the diode on-state voltage drop VDon may be ignored.
VDon is ignored, Vs large, no E => analysis in section 10.2 is suitable.
Note: Vs = 170/ sqrt(2)
Example 5: A half-wave diode rectifier with a 20Ω load is supplied from a 240V 60Hz ac source
via an isolating transformer. Determine: (a) the required transformer turns ratio such that the
average load current is 10 A, (b) the average and rms current in the primary winding of the
transformer. The effect of the diode on-state voltage drop VDon may be ignored.
VDon is ignored, Vs large, so analysis in section 10.2 is suitable.
Example 6: 1Ø half-wave with an R-load
A single phase half-wave diode rectifier, see below, is used to supply power to a 20Ω resistor load
from a 120 V 60 Hz ac supply. When conducting in the forward direction, the diode has a junction
voltage of 0.8 V and an effective resistance of 0.1 Ω. Determine: (a) the average, total rms and ac
components of the load current, (b) power dissipated in the diode.
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Example 7: A single phase full-wave diode rectifier is supplied from a 60Hz 120 V ac supply. The
diode has a forward conduction voltage of 1.0 V and the load consists of a 50 Ω resistor.
Determine: (a) the load peak, average and rms voltage, (b) the diode conduction angle, (c) the load
peak, average and rms current, (d) power dissipated in the diode bridge, (e) the rectifier power
factor.
Vs = 120, R = 50, VDon = 1, E = 0 => use the approach described in section 10.4
(a) Vo,pk = √2×Vs - 2×VDon = 106 V. Note that two diodes are always in series with the load when the current is flowing:
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Example 8: A single phase full-wave diode rectifier is supplied from a 60Hz 17 V ac supply. The
diode has a forward conduction voltage of 1.0 V and the load consists of a 10 Ω resistor.
Determine: (a) the diode conduction angle and duty cycle, (b) the load peak, average and rms
voltage, (c) the load peak, average and rms current, (d) power dissipated in the diode bridge, (e)
the rectifier input power factor.
Conditions match the approach described in section 10.3 => Take don into account by assuming that
2 diodes are in series with the load for 2×δon of the fundamental cycle.
(a) α = asin(2×VDon/(√2×Vs) = 4.77°, θc° = 180°-2*a° = 170.46°, δon = θc°/360 = 0.4735
(b) Vo,pk = √2×Vs -2 ×VDon = 22.04V
(c) Io,pk = (√2×Vs -2 ×VDon)/R = 2.20 A
Io,dc= Vo,dc /R = 1.34A, Io,rms = Vo,rms /R = 1.505A
(d) Pdiodes = 4×(VDon×Idiode,dc) = 4×(VDon×0.5×Io,dc)......................Note: Idiode,dc = Io,dc/2
Pdiodes =2×(VDon×Io,dc) = 2×(1×1.34) = 2.68 W
(e) PR= R×Io,rms2 = 10×1.5052 = 22.65 W, Pin = =22.65 + 2.68 = 25.33 W
S = Vs × Is = 17´1.505 = 25.59 VA, PF = Pin / S = 25.33 /25.59 = 0.990 » 1.0
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Chapter 11: 1-phase Full-Wave Diode Rectifiers
This section summarizes the analysis of rectifiers with different loads in order to determine the
rms, dc, pk current ripple in the rectifier output current io. The basic assumption is that the rectifier is
in continuous conduction mode, i.e., the rectifier output current or inductor current never goes to zero,
and that the dominant load current harmonic is due to the second harmonic current. => Io,ac = Io2. Hence
the harmonic currents greater than 2 are ignored in the following analysis. The diode forward
conducting voltage drop is given by VDon
Vo,n =
4
( n − 1) π
2
Vs => Vo,2 =
4
3π
Vs , ω = 377 for fs = 60 Hz. For continuous conduction, Io,dc > √2Io211.1
11.1 Full-Wave with an R-L load.
11.2 Full-Wave with an LC output filter
11.3 Full-Wave with an RL output filter and a dc voltage
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11.4 Examples
Example 1: A full-wave diode rectifier is operated from a 120V 50Hz ac supply voltage source.
Neglecting the diode voltage drops, for the following load types, determine
(i) the dc/ac and rms of the rectifier output current.
(ii) power dissipated in all the dc side circuit elements.
(iii) rms of the supply current.
(iv) ac/dc and rms of a diode current.
(v) rectifier input power factor.
(a) 20 Ω resistive load (since Vs is large neglect d and use approx analysis).
(b) 20 Ω resistive load with a 50mH inductor.
(c) 20 Ω resistive load with a 50V dc voltage source and a series connected inductor L = 100mH
(prove that the current is always continuous).
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Example 2
A 1-phase full-wave diode rectifier uses an output LC dc filter and is supplied from a 60Hz 115V ac
supply: you may neglect the forward conduction voltage drop of the rectifier diodes. If the average
inductor current is 10A, with an rms ac current ripple of 7A dominated by the second harmonic,
determine:
(a) dc filter inductor value
For this analysis you may ignore the effect of the capacitor ripple voltage and you may assume that
its voltage is purely dc with no ac components, C -> ¥.
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Since the capacitor ripple voltage is assumed to be small, = load voltage, then the second harmonic
current flowing through the load is assumed to be very small and most of the inductor second harmonic
current is assumed to flow through the capacitor. The capacitor is effectively assumed to be an ac
short but a dc open circuit. Then we can deduce that the SMALL capacitor ripple voltage is produced by
this second harmonic current flowing through the capacitor. Higher order harmonics are neglected in
this analysis.
step 1
Example 3: A single phase full wave diode rectifier is operated from a 60Hz 115V ac supply and
has a 50 Ω inductive load. The diodes have a forward conducting voltage drop of 0.9 V. (a)
Determine the load inductance required so as to make the load peak to peak current ripple 100%
relative to the load average current. You may neglect the effects of all harmonic currents in the
load greater than the second harmonic. Determine: (b) supply rms current, (c) rms and average of a
diode current, (d) rectifier input power and power factor.
Before tackling this problem, consider sketching the load current waveform and supply current
waveform assuming that the load pk-to-pk current ripple is 100% relative to the load average
current.
R = 50 Vs = 115 VDon = 0.9 fs = 60 ws = 2*p*fs
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Answers
(a) L = 60.9 mH, (b) Is = 2.16 A, (c) ID,rms = 1.53 A, ID,dc = 1.02 A, Pin = 236.4 W, PF = 0.953.
Example 4: A full-wave diode rectifier operated from a 60Hz 115V ac supply has a two load types:
(i) 10Ω resistive load with a 13.26mH series connected inductor, (ii) same load but with a capacitor
connected across it where its voltage may be considered ripple free. For both load types: (a)
Sketch the rectifier output voltage and current waveforms, (b) the inductor average current, (c)
the second harmonic component of the inductor current, and hence, estimate the rms of the
inductor current, (d) power dissipated in the load resistance.
(i) 10Ω resistive load with a 13.26mH series connected inductor
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Example 5: A 1Ø full-bridge diode rectifier has a load R=15Ω, L=45mH with a 120V 60Hz ac
supply. Determine: (a) the average load current., (b) the power absorbed by the load., (c) the
rectifier input power factor.
Example 6: A 1Ø full-bridge diode rectifier with an LC output filter has an 8 Ω output resistance,
Vs =120V, 60Hz. The dc inductor is 10mH & the capacitor is large enough as to make the output
voltage ripple-free. Determine the average output voltage, the peak, average and rms of the diode
currents and determine the rectifier input power factor.
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Example 7: A 1-phase full-wave diode rectifier has an R/L/E load where L = 6.5mH, R = 2.5 Ω and
E = 10V. The input ac voltage is 120V at 60Hz. Estimate the rms of the load current ripple and
hence determine (a) if the load current is continuous or discontinuous, (b) the average and rms of
the load current and a diode current.
Example 8: 1Ø full-wave diode rectifier, LC dc filter for critical conduction
The rectifier has an average inductor current of 1.06A and is operated from a 115V 60Hz ac
supply, estimate the size of inductance required for continuous conduction.
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Chapter 12: 1-phase Diode Rectifier with a C-Filter
The capacitor smoothed 1-phase diode rectifier is a widely used power converter. Its popularity
comes about because the combination of the diodes and capacitor is relatively inexpensive, small and
compact. Conversely, the circuit has several undesirable performance factors such as large peak and
rms device currents relative to the load average current, and the input current has large harmonics
resulting in the rectifier having a very low power factor.
The capacitor filtered diode rectifier can be used to rectify the utility 60Hz voltage directly, nonisolated, or with electrical isolation using a transformer. Either way, this rectifier is often considered
as being only the first step in creating a regulated dc voltage source for dc loads, e.g. analogue and
digital circuitry. More converters are often connected to the rectifier output because the ac supply
voltage naturally fluctuates; changes is magnitude from one location to the next; and also the voltage
drop across the capacitor normally has a 120Hz ripple. In the latter case, the capacitor required to
obtain a good dc voltage source with a very low 120 Hz ripple, e.g. ±1%, would be considered to be very
large and expensive.
If a transformer is used for both isolation purposes and also to step down the voltage, it is very
common to use linear regulators at the output of the rectifier to obtain a truly regulated ±5, ±12, ±15
volt supply. Sometimes in low voltage high power applications (e.g. 50 W plus), and frequently in the nonisolating situation with high output voltages, a switchmode power supply is connected to the output of
this rectifier to obtain a truly regulated dc voltage with a low peak-to-peak ripple.
This section presents analysis to allow the designer to select diodes and capacitors with suitable
voltage and current ratings. The analysis presented allows the rms, average and peak currents od
devices to be estimated. The rectifier input power factor and supply transformer VA rating can also be
determined.
12.1 Circuit Operation
A full-wave non-isolating diode rectifier is shown in Fig. 12.1 with the 4 diodes drawn, together with
a second circuit diagram that uses a simplified symbol for the diode rectifier.
The circuit is shown with a resistive load which is intended to mimic the average current that would
be drawn by a real load. A “load” could actually be a switchmode power converter, linear regulator, or a
multitude of other circuitry that requires a dc voltage source as a supply. As such, the resistor will draw
an average current, see Fig. 12.1(d), from the dc-source that is formed at the output terminals of the
rectifier by using a large electrolytic capacitor. The average current together with the capacitor size
determines the 120 Hz ripple voltage ripple that is present across the capacitor terminals. The kind of
capacitor type normally used is electrolytic and polarized, i.e. has a plus and a minus terminal, and are
used because they are inexpensive and can obtain large capacitor values in a relatively small package.
The rectifier output terminals is the voltage drop across the terminals of the capacitor and, even
though the ac supply voltage is alternating, the rectifier output voltage stays relatively constant, see
Fig. 12.1(c), at the peak of the ac supply voltage. This is because when the supply voltage drops from its
peak value, the capacitor discharges to supply the load current. If the capacitor is large, the droop in
output voltage can be made to be small over half a cycle.
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Fig. 12.1 Capacitor Smoothed Diode Rectifier with Operational Waveforms
When the ac supply voltage rises to its peak, see Fig. 12.1(c), the rectifier diodes get forward
biased, and the capacitor voltage, having drooped from the supply peak voltage, receives a charging
current form the ac supply, see Figs. 12.1(c) and 12.1(e). This charging current only lasts for a short
period and the peak to rms ratio of the diode and supply current can be very large, e.g. 10:1. The large
pulsed currents in the capacitor current waveform, see Fig. 12.1(f), are the charging currents centered
on the maximum and minimum of the sinusoidal supply voltage, whilst the long duration small flat
currents, represent the discharging currents that supply the load current whilst the rectifier diodes
are off: reversed biased because the capacitor holds the rectifier output terminal high whilst the
rectifier input terminals fall due to the sinusoidal supply voltage.
12.2 Analysis Assumptions
An expanded waveform of the “standard full-wave rectified voltage” (=Vrect) is shown in Fig. 12.2
together with the capacitor voltage, VC. When the capacitor voltage is rising, during the conduction
period qc, Vc is shown as not quite following the exact profile of the rectified ac voltage waveform. This
linear ramping voltage is close to reality and is caused by the presence of natural ac supply inductance.
The capacitor voltage is also assumed to be ramping linearly in the long discharging periods designated
as p-qc. Since the capacitor is considered large and the load current is relatively constant, then the
capacitor discharge is also considered linear.
With the charging and discharging of the capacitor voltage considered to be linear, the average of
the capacitor voltage lies half-way between the peak and the minimum values. This is a useful feature
when simplifying the analysis. The difference between the maximum and the minimum of the capacitor
voltage is designated as VR, see Fig. 12.2, and is referred to as the capacitor peak-to-peak (pk-pk) ripple
voltage.
During the charging period, conduction angle θc and between t1 and t2, the current drawn from the
output terminals of the diode rectifier is shown as being a flat pulsed current. This is meant to be an
initial approximation in order to simplify the analysis
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Fig. 12.2 Capacitor voltage together with the rectifier output charging currents
Many textbooks present analysis of this circuit assuming that the capacitor discharge period is T/2.
This approximation ignores the charging period designated θc. The analysis presented here takes into
account the capacitor charging period as in reality the natural inductance, plus any inserted inductance
(such as an input transformer or input inductive filter) spread- out the capacitor charging period, e.g.
20° to 50° degrees may common. The determination of this capacitor charging period, or diode
conduction time, (define in degrees/radians as θc) is very important when estimating the rms of the
device currents and the peak of the charging current. During this period, charge is transferred to the
capacitor by a current drawn from the ac supply. This ac supply current pulse also supplies current to
the load. When the capacitor feeds the load current, this is referred to as the discharging period
(define in degrees/radians as (180°- θc°) or (π - θc), and the rectifier diodes are reversed biased and
turned off.
In order to lower the complexity of the subscripts/superscripts used on parameters, assume that
the load draws an average current IDC and the that load voltage (= capacitor voltage = rectifier output
voltage) has a dc value given by VDC.
Let I DC = I L,DC ,VDC = VO,dc ..........................................................................................................................................................12.1
12.3 Capacitor peak-peak ripple voltage, VR, and rms of the ripple voltage,
The charge transferred to the capacitor every half cycle during the charging period, is matched by
the charge transferred to the load from the capacitor during the discharging period. The change in the
capacitor voltage during the discharging period is ΔVC = VR (=peak-peak ripple voltage), see Fig. 12.2.
⎛
θc ⎞ T
During the discharging period π - θc, = Q = I DC ⎜ 1 − ⎟ = CVR .......................................................................12.2
⎜⎝
π ⎟⎠ 2
Re-arranging, an expression for the capacitor peak-peak ripple voltage, VR, is obtained that relates
the capacitor ripple voltage to the load current and the diode conduction angle θc:
I ⎛
θ ⎞
VR = DC ⎜ 1 − c ⎟ ........................................................................................................................................................................12.3
2fsC ⎜⎝
π ⎟⎠
fS = 1/T supply frequency (= 60Hz in North America).
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The capacitor ripple voltage is assumed to be triangular in waveshape and represents the capacitor
ac voltage component. The peak of this ac voltage component is VR/2, so its rms value is its peak
magnitude divided by √3, see section Example 2 section 1:
VR,rms =
VR
2 3
= VC,ac .....................................................................................................................................................................12.4
VR,rms is the rms of the capacitor ripple voltage, (= rms of the load ac voltage component).
12.4 Rectifier Average Output Voltage
The analysis for defining the rectifier output dc voltage should take into account the diode forward
conducting voltage drops, especially if the output voltage is low, say, in the region of tens of volts. In a
full-bridge diode rectifier two diodes are always on, in series with the output terminals, and the
rectifier output dc voltage is lowered by two diode voltage drops.
VDon = diode forward conduction voltage
Vm is the peak of the sinusoidal supply voltage Vm = √2Vs. If there is no drop on the output voltage
due to the capacitor ripple voltage, light load or a large capacitor is used, then the rectifier average
output voltage, VDC, is at the peak of the ac supply voltage minus the diode conducting voltage, this is
defined as Vpk.
Neglecting the capacitor ripple voltage: VO,dc = Vpk = Vm − 2VDon ...........................................................................12.5
Since the capacitor voltage is assumed to ramp linearly upwards during charging, and linearly
downwards during discharging, then the drop in the rectifier output dc voltage due to the
capacitor voltage ripple is given by: VR/2
VO,dc = VDC = 2VS −
using eq. 12.3: VR =
VR
2
− 2VDon = Vpk −
VDC
R
which gives: VDC =
2
......................................................................................................................12.6
I DC ⎛
θ ⎞
I ⎛
θ ⎞
⎜ 1 − c ⎟ ,gives:VDC = 2VS − DC ⎜ 1 − c ⎟ − 2VDon ...................................................12.7
2fsC ⎜⎝
π ⎟⎠
4fsC ⎜⎝
π ⎟⎠
Alternatively: VDC = Vpk −
putting I DC =
VR
VR
2
= Vpk −
I DC ⎛
θ ⎞
⎜ 1 − c ⎟ .......................................................................................................12.8
4fsC ⎜⎝
π ⎟⎠
, in 12.8 gives: VDC = Vpk −
Vpk
θc ⎞
1 ⎛
1−
1
−
⎜
⎟
4fsCR ⎜⎝
π ⎟⎠
ECE Dept. University of Alberta
VDC ⎛
θ ⎞
⎜ 1 − c ⎟ ...................................................................................12.9
4fsCR ⎜⎝
π ⎟⎠
...............................................................................................................................12.10
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Equation 12.8 is useful if the load average current is known. Equation 12.10 is useful if the load
resistance is known, . Alternatively, if the load power P is known, I DC =
P
VDC
could be substituted in for
IDC in 12.8, and solved. However, it is probably best to estimate IDC given the known power level, and use
Equation 12.9, in a recursive loop where IDC, VDC and θc are used to home in on a solution.
12.5 Diode Conduction Angle θc
The diode conduction angle θc is a vital parameter for estimating the average output voltage and,
more importantly, for estimating the rms of the various circuit current waveforms. θc depends upon
many factors including the capacitor internal resistance esr (effective-series resistance), e.g., could
0.25 Ω in a 1 mF 400V electrolytic capacitor), and the supply and lead inductance; including the leakage
inductance of the input transformer if present. Performance curves have been produced to predict qc
as a function of many of these factors, but here an approximate analysis is presented based upon the
ideal circuit operation, no parasitic effects), and experience gained in experiments.
Expressing the diode conduction angle in radians, then the capacitor charging period can represent a
linear ramp from when the ac supply voltage reaches the capacitor voltage level, ignoring the diode
forward conduction voltage, up to the peak of the supply voltage:
Fig. 12.3 Capacitor linear charging period ignoring diode on-state voltage drops
charging of C stops at the peak of the supply voltage, and using:
Vm − VR = Vm cos θc ......................................................................................................................................................................12.11
⎛
V ⎞
gives: θc ≈ a cos ⎜ 1 − R ⎟ ........................................................................................................................................................12.12
⎜⎝
Vm ⎟⎠
where: t 2 − t 1 =
θc
⋅ T .............................................................................................................................................................12.13
2π
This analysis ignores the current pulse spreading effect of the capacitor esr and the supply
inductor, so a more realistic estimate on qc is to double the value obtained in equation 12.13:
⎛
VR ⎞
θc ≈ 2 × a cos ⎜ 1 −
⎟ ..............................................................................................................................................................12.14
⎜⎝
Vm ⎟⎠
Given that θc can be estimated, then the rectifier dc output voltage can be estimated, say using
equation 12.7.
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12.6 Peak Charging Current Im
Given that θc can be estimated, then some assumption regarding the nature of the pulse charging
current needs to be assumed in order to determine the peak of this pulse current and the rms of the
rectifier output current. The pulsed square-wave current shown in Fig. 12.2 would underestimate the
rms of the pulsed currents and peak currents. A more realistic rectifier output current pulse, based
upon waveforms observed on oscilloscopes from real rectifiers, is a half sinewave current pulse of
duration θc°, see Fig. 12.4 for the rectifier output currents and the resultant capacitor current
waveform.
The analysis for determining the rms of these currents waveforms should start by determining the
average of a rectified sinewave current that repeats every half cycle where the peak of that sinewave
current is Im.
The average of a rectified current waveform of rms
magnitude Irms is given by (see the analysis on the average
of a full-wave rectified voltage in chapter 10):
I av =
2 2
I .....................................................................................12.15
π rms
The average of a rectified current waveform relative to the
peak magnitude Im (Im = √2Irms):
I av =
2 2
Im
2
I m ..................................................................12.16
2 π
The average of a half-cycle sinusoid of duration θc, repeating
every π radians (= diode rectifier output current, IO,dc):
Fig. 12.4 Diode rectifier output current &
π
=> I O,dc =
×
θc 2
π π
=
I m ⇒ I O,dc =
2θc
π2
× I m ....................................12.17
12.7 Peak Capacitor Charging Current, Im and average
rectifier output current IO,dc.
Assuming steady-state operation & equating the capacitor charge & discharge
Qcharge = Qdischarge...............................................................................................................................................................12.18
and taking into account that when a current pulse is drawn from the supply, this both charges the
capacitor & supplies the load current. then the average of a half sinusoidal current pulse, equation 12.16,
minus the dc-link current, IDC, lasting for a duration θc every half cycle is given by:
⎡2
⎤ ⎡ θc T ⎤
I
−
I
⎢
⎥ × ⎢ ⋅ ⎥ .............................................................................................................................................................12.19
m
DC
⎢⎣ π
⎥⎦ ⎢⎣ π 2 ⎥⎦
This average of the capacitor charging current is equal to the average of the capacitor discharging
⎡ θ ⎤ T
current: I DC ⎢1 − c ⎥ × .........................................................................................................................................................12.20
⎢⎣
π ⎥⎦ 2
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⎡ θ ⎤ T
⎡2
⎤ ⎡ θc T ⎤
⎢
⎥
hence: ⎢ I m − I DC ⎥ ×
⋅
= I DC ⎢1 − c ⎥ × .......................................................................................................12.21
⎢⎣
π ⎥⎦ 2
⎢⎣ π
⎥⎦ ⎢⎣ π 2 ⎥⎦
⎛ 180 ⎞
π2
re-arranging 12.21 to get Im: I m =
× I DC = 1.57 ⎜ o ⎟ I DC , where I C,pk = I m − I DC ........................12.22
⎜⎝ θ ⎟⎠
2θc
c
Substituting for Im in 12.17: I O,dc =
2θc
× I m gives: I O,dc = I DC .......................................................................12.23
π2
as expected, the average of the diode rectifier output current must be the same as the average of
the load current, as there can be no net average current flowing through the capacitor in the
steady-state, see chapter 9.
12.8 Supply rms current, IS and capacitor rms current, IC
The rms of a rectified sinusoidal current of magnitude Im: I rms =
Im
...........................................................12.24
2
The rms of a rectified sinusoid current, of duration θc rad., repeating every π rad.:
I O,rms = I S =
Im
2
×
θc
π
..........................................................................................................................................................12.25
Given from equation 12.22, I m =
π2
2θc
× I DC then I O,rms = I S = I DC
π3
8θc
= I DC
⎛ 180 ⎞
1.234 ⎜ o ⎟ ............12.26
⎜⎝ θ ⎟⎠
c
The capacitor rms current can be defined: I C = I2O,rms − I2DC ............................................................................12.27
next, substituting in for IO,rms from equation 12.26: I C = I DC
⎛ 180 ⎞
− 1 = I DC 1.234 ⎜ o ⎟ − 1 .....12.28
⎜⎝ θ ⎟⎠
8θc
c
π3
In summary, the peak of the diode rectifier current, Im, is defined relative to the average load
current, IDC. The rms of the diode rectifier output current, IO,rms, and capacitor current, IC, have also
been defined relative to the average load current, IDC. Since a diode only passes one current pulse per
cycle, the rms and average of a diode current is given by:
I D,rms =
I O,rms
2
, I D,dc =
I O,dc
2
=
I DC
2
....................................................................................................................................12.29
12.9 Example of the Process for Circuit Design
The output ripple voltage may be expressed in percentage relative to the average output voltage e.g.
a pk-pk ripple of 2%: = VR = 0.02 VO,dc. The task is then to pick a desirable capacitor. θc is not known,
neither is VO,dc The following equation can be used:
VDC = Vm −
VR
2
− 2VDon ..............................................................................................................................................................12.30
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re-arranging we get: VDC =
1
(V − 2VDon ) , because: VR = 0.02*VDC ............................................................12.31
1.01 m
This requirement may be for a certain load current IDC, or power P.
In the later case: IDC = P / VDC ..........................................................................................................................................12.32
The diode conduction angle can be determined from:
Note the use of “rule-of-thumb”
⎛
V ⎞
θc ≈ 2 × a cos ⎜ 1 − R ⎟
⎜⎝
Vm ⎟⎠
⎛
V ⎞
θc ≈ 2 × a cos ⎜ 1 − R ⎟
⎜⎝
Vm ⎟⎠
.........................................................12.33
, to take into account the spreading of the supply
current due to supply natural inductance.
Hence use to get the capacitance
C=
and the rms currents then follow, e.g.
I DC ⎛
θ ⎞
⎜1 − c ⎟
2fsVR ⎜⎝
π ⎟⎠
.......................................................................................................12.34
I O,rms = I S = I DC 1.234 ×
180
θco
............................................................................12.35
12.10 Commonly used Rectifier Configurations
Fig. 12.5 shows how a split dc rail voltage can be achieved using an isolating transformer with two low
voltage secondary windings, e.g. 17 V rms secondaries, together with only one full-wave dido rectifier, as
opposed to two as might be assumed to obtain two dc voltage rails. At the output of the diode rectifier,
two 15 V regulators are used, a positive and a negative regulator to get the accurate generation of ±15V
Fig. 12.5 Achieving ±15V dc supply
Fig. 12.6 Voltage doubler rectifier
Fig. 12.6 shows how with a 115 V ac supply voltage a switch to the diode rectifier is turned on to
obtain two full-wave diode rectifiers and a high output voltage. the output capacitors form two dc
voltage sources connected in series. When a 230 V supply is used, the switch is opened and the ac
supply is full-wave rectified to control the voltage across two capacitors connected in series. This
operation guarantees that whether 115 or 230 V is used, the output voltage is the same at roughly
√2*230 V. This circuit is useful for designing electronic equipment to operate off two voltages, 230 V
that may be used in Europe, and the 115 V that may be used in North America. Suitable sizing of the dclink capacitors may also allow the rectifier to operate satisfactorily from both 50 Hz (Europe) & 60 Hz
supplies (North America).
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Chapter 13: Design Examples: 1-ph Diode Rectifier with a C-Filter
Example 1: The full-wave diode rectifier shown has a
capacitor output filter, C = 10,000 µF, and a resistor
load, R = 5 Ω. The transformer is supplied from a 120V
60Hz ac supply with the secondary windings rated at
10 V. Assume that the diodes have an on-state voltage
drop VDon = 0.7V. You may neglect the effects of the
transformer magnetizing current & use the approx.
technique described in the course for estimating the
diode conduction angle θc. Determine: (a) diode
conduction angle, θc, and the average and peak-peak
ripple of the resistor load voltage (VOdc,VR), (b) rms of:
the diode rectifier output current, IO, transformer
winding
(b) IOrms, Iw1rms, IS.
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Example 2: A standard full-wave 4 diode rectifier, C dc filter and an input transformer with 1
secondary winding
Parameters: Vs = 115V, 60Hz
Vsecondary = 17V
C = 2mF
Pload = 10 W VDon = 0.8V
Determine:
(i) diode conduction angle, capacitor pk-to-pk ripple voltage, the average load current & voltage
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Example 3: A 1-phase full-wave diode rectifier with an electrolytic capacitor dc output filter is
supplied from a 60Hz 120V ac supply. The rectifier load may be modeled by assuming it is a 100 Ω
resistive load. The forward conducting voltage of the rectifier diodes may be assumed to be 1 V.
The capacitor is 1 mF with a negligible esr (effective series resistance). Estimate the following:, (a)
ac, dc and total rms of the rectifier output voltage, (b) rms of the capacitor current, (e) rms of
the supply current, (d) ac, dc and total rms of the diode rectifier output current, (5) ac, dc and
total rms of the current flowing through a diode in the rectifier bridge, (f) Power delivered to the
rectifier load, (g) rectifier input Volt-Amperes. (h) rectifier input power factor
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Example 4: The input current to a 1-phase 120 V 60Hz full-wave diode rectifier with a capacitor
dc output filter, consists of symmetric pulses, one in each half cycle, of 60˚ duration and an rms
value of 10 A. Neglecting the effects of the diode voltage drops. Estimate: (a) average and peak of
the current pulses, (b) average load current, (c) average voltage and power delivered to the load,
(d) rectifier input power factor.
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Example 5: A 1Ø full-wave diode rectifier with a capacitor dc output filter (esr = 0 Ω) is supplied
from a 60Hz 115V ac supply and is required to supply to a dc load with a peak power rating of
150 W. The forward conducting voltage of the rectifier diodes may be assumed to be 1V and a
maximum peak to peak ripple of the load voltage should not exceed 10% of VDC at full-load. Design a
suitable power supply and specify the component ratings.
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Example 6
A full-wave diode rectifier, using an input transformer with a two winding secondary and a two
diode rectifier bridge, has a capacitor output filter with a 50 Ω load. The transformer is supplied
from a 120V 60Hz ac supply with the secondary windings rated at 7 V each. Assume that the
diodes have an on-state voltage drop VDon = 0.6V. The capacitor is to be chosen so as to give an
output voltage peak-peak ripple of 10%. You may use the approximate technique described in the
course for estimating the diode conduction angle θc. Determine: (a) rectifier average output
voltage, (b) diode conduction angle, θc, (c) ac/dc/rms and peak of the rectifier bridge output
current, (d) ac/dc/rms and peak of a diode current, (e) supply current crest factor (= ratio of the
supply peak current divide by its rms), (f) rectifier bridge power losses, rectifier bridge input
power/apparent power and input power factor, (g) transformer VA rating.
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Chapter 14: Power Quality Definitions for Utility Rectifiers
Rectification of the utility voltage using diode rectifiers normally produces highly distorted acsupply currents. These currents normally have a fundamental component of current with harmonics that
are often multiple integers of he fundamental. These harmonics do not contribute to power flow but
increase the rms of the supply current. As a result, the power factor of diode rectifiers can be low
even though the current is in phase with the supply voltage! This section clarifies the nature of supply
harmonics and illustrates how the power factor of a load is lowered not only by a lagging/leading current
relative to the voltage, but it also lowered by the effect of harmonics other than the fundamental. So
the definition of power factor must have both a component relating the lagging/leading component,
Displacement Power Factor (DPF), but also a component due to the presence of harmonics, Current
Distortion factor (CDF). Lastly, this section also introduces factors that measures the presence of
harmonics in a waveform, Total Harmonic Distortion Factor (THD).
14.1 Concept of steady-state power quality
If the ac supply voltage is sinusoidal at a fundamental frequency, e.g. 60Hz, then the lowest rms
current required for a given power level is the current drawn by a purely resistive load & dissipating the
same power. This current would also be sinusoidal and in phase with the supply voltage and with the
same frequency. In general, this current is considered to be the real component of the fundamental
harmonic current. Diode rectifiers can produce highly distorted currents with various harmonic current
components and with phase shifts, see Fig. 14.1
Fig. 14.1 A highly distorted ac supply current
The resultant rms current is higher than that required to pass the same power flow if the
load were purely resistive. This is because the fundamental current may have a phase shift, ɸ1, and
the current may have harmonics. In general, the average of the product of the harmonic current and
the supply voltage is zero, and all harmonic currents can be said to have no net power flow associated
with them.
One form of power quality measurement is Power Factor, which is defined as the ratio of the
average real power flow divided by the apparent power (= product of Vrms × Irms). When the supply
voltage is considered to be sinusoidal at 60 Hz, the power factor definition can be reduced to the ratio
of the minimum current required for the power level, divided by the total rms of the supply current.
Ideally, power factor is unity, in reality, especially for utility rectifiers, the power factor is less than
unity due to the presence of both:
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(a) a lagging fundamental current (=traditional form of power factor).
(b) presence of harmonic currents that have no net power flow associated with them.
Both components of current increase the rms of the supply current above the minimum level
required for that power level of operation.
A second form of power quality measurement is to measure the percentage of the harmonic
currents present in a particular waveform. Harmonic currents not only lower power factor, but also
interfere with other utility loads and also produce emi/rfi emission that can interfere with electronic
equipment, and wireless communications. The total harmonic distortion of a current waveform is a
measure of the percentage presence of harmonics in a current.
This section derives the relevant equations associated with power factor and harmonic distortion.
14.2 Power Factor
Consider a current waveform is being drawn from the utility 1Ø ac supply who’s voltage may be
considered to be sinusoidal with no harmonic distortion, see Fig. 8.1.
The rms, IS, of the supply current is is defined as being: I S =
For a quarter-wave symmetric waveform: I S =
2
∫
π
π 2
0
1
∫
2π
2π
0
i2S dθ ..................................................14.1
i2S dθ .................................................................................14.2
The average “real” power flow, P, from a sinusoidal ac voltage source vs, as a a result of a current is
being drawn is given by:
1
2π
( )
∫ i v dθ .....................................................................................................................................................................14.3
2π 0 S s
For a sinusoidal ac supply voltage, equation 14.3 reduces to the form:
PS =
PS = VSI S1 cos φ1 ............................................................................................................................................................................14.4
ɸ1 = phase displacement of the fundamental harmonic current relative to the supply voltage. Is1 = rms of
the fundamental current, e.g. Is1 cos ɸ1 = I1r, the real component of the fundamental current, or
sometimes designated Ip.
In a 3-phase system equation 14.4 takes the form: Ps = 3VLL I S1 cos φ1 ...........................................................14.5
[VLL = rms of the 3-phase line-line voltage]
Note: Equation 8.4 implies that real power flow is associated only with the real component of the
fundamental and no power is associated with the harmonics, see section 1 sub-section 1.3.
e.g.for n = 2, 3, 4, 5, 6, 7,. Pn =
1
∫
2π
2π
0
(i V ) dθ
n
s
for n =2,3, 4,5,... .......................................................................14.6
Apparent power, S, associate with a current being drawn from a voltage source is defined as the
product of the rms voltage times the rms of the current drawn:
apparent power: S = VS,rms I S,rms or in short, just: S = VSI S ....................................................................................14.7
Assume Vs = rms of the supply voltage, Is = rms of the supply current.
or in a balanced 3 phase system this becomes:S = 3VLL I S ....................................................................................14.8
Power factor is the ratio of the net real power flow divided by the apparent power flow:
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PF =
PF =
P
S
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=
I S1
IS
VS × I S1 × cos φ1
VS × I S
........................................................................................................................................................14.9
cos φ1 ..............................................................................................................................................................................14.10
PF = CDF × DPF , if CDF =
I S1
, DPF = cos φ1 .............................................................................................................14.11
IS
CDF is defined as the Current Distortion Factor and DPF as the Displacement Power Factor (or
otherwise also defined as FPF = fundamental power factor).
14.3 Harmonic Distortion
The total rms of all the harmonics (excluding the fundamental) = IH is given by:
n→∞
∑
I H = I2S − I2S1 =
n=2,3,4
I2Sn ..................................................................................................................................................14.12
Note: This assumes only integer harmonics are present and there is no dc component
Current Distortion Factor: CDF =
I S1
IS
.............................................................................................................................14.13
Fundamental Power Factor, FPF, or Displacement Power Factor, DPF:
DPF = FPF = cos φ1 .....................................................................................................................................................................14.14
The Total Harmonic Distortion Factor (of the current!), has two forms:
Firstly: THDF =
re-arranging:
IH
I S1
THD F =
.................................................................................................................................................................14.15
I2S − I2S1
I S1
2
⎛I ⎞
= ⎜ S ⎟ −1
⎜⎝ I ⎟⎠
S1
...........................................................................................................................14.16
This can be related to the CDF as: or: THDF =
Secondly: THD R =
re-arranging:
IH
IS
THD R =
I2S − I2S1
I S1
=
1
CDF 2
−1
.........................................................................14.17
....................................................................................................................................................................14.18
I2S − I2S1
IS
⎛I ⎞
= 1 − ⎜ S1 ⎟
⎜⎝ I ⎟⎠
S
2
...........................................................................................................................14.19
This can be related to the CDF as: THD R = 1 − CDF2 or: CDF = 1 + THD2R ...........................................14.20
lastly the two THD’s can be related to one another:
1
THD R =
1+
1
THD2F
, or
THD F =
1
1
THD2R
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..................................................................................................................................14.21
−1
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14.4 1-phase Rectifier Example
Consider a 1-phase diode rectifier using a large dc-link inductor so as to make its current to be
considered continuous, ripple free and designated IDC. If the supply to the rectifier has a negligible
inductance, then the rise and fall of the rectifier input current is instantaneous at the beginning and
end of each half-cycle. The supply current would then be a square-wave current in phase with the supply
voltage.
(a) Power Factor
Let Ø1 be the angle between the fundamental component of the rectifier input current and the ac
supply voltage. For this rectifier and its “ideal” operating conditions: Ø1 = 0°, as the square-wave current
is in phase with the supply voltage
=> fundamental power factor, FPF = cos Ø1 = 1..............................................................................................................14.22
With a simple linear resistive load, then the load power factor would be unity. In this case, the
rectifier is considered to be a non-linear load, the load current differs from the applied voltage, and
the load power factor is less than one due to the presence of harmonics.
To determine a mathematical expression for the load power factor, the definition PF = P/S can be
used, by determining the mathematical expressions defining power and apparent power for this
rectifier under these operating conditions.
The power drawn from the ac supply, = rectifier input power, and is the integral, = average, of the
product of the supply voltage times by the current drawn:
The rectifier real input power: Pin =
1
2π
∫ (V I
2π
0
S
S
) dθ ...............................................................................................14.23
Since the waveform is quarter-wave symmetric, this integral can be reduced to an integral over 90°,
the supply voltage is a sinewave and the current is a constant at IDC.
=> Pin =
Pin =
2
π
π 2
⎛ 2V sinθ × I ⎞ dθ ....................................................................................................................................14.24
S
DC ⎠
∫⎝
0
2 2
V I ...........................................................................................................................................................................14.25
π S DC
The rms of the supply current can be obtained by taking the square-root of the integral of the current
waveshape squared:
I S = I DC ..........................................................................................................................................................................................14.26
Intuitively, by noting that whatever the position in the ac supply cycle, the magnitude of the current
drawn is always IDC, => Is = IDC.
The rectifier apparent input power is the product of the rms of the supply voltage times by the rms
of the current drawn:
S = VSI S = VSI DC ........................................................................................................................................................................14.27
Thus, the rectifier input power factor is obtained by using: PF =
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Pin
S
=
2 2
π
.................................................14.28
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This means that the rectifier power factor is 0.9 even though the current, and more importantly
the fundamental component of the current, is in phase with the supply voltage. Under these conditions,
the displacement power factor, DPF or FPF, is unity. The power factor is less than unity because of the
presence of harmonics in the square-wave current waveshape. These harmonics contribute to the rms
of the supply current, but do not contribute to the flow of real power.
Recalling the definition of power factor: PF = CDF × FPF .....................................................................................14.29
and noting that DPF = 1, => CDF =
2 2
= 0.9 ...............................................................................................................14.30
π
The rectifier input current is a square-wave current of magnitude IDC
(b) Harmonics and THD
The fundamental harmonic fourier coefficient for a square-wave of magnitude IDC is:
I S1,pk =
4
π
I DC = 1.27I DC ...........................................................................................................................................................14.31
The RMS of the fundamental harmonic current:
The Current Distortion Factor:
CDF =
I S1
IS
=
2 2
π
I S1 =
= 0.9
⎞ 2 2
1 ⎛4
I = 0.9I DC
⎜ I DC ⎟ =
π DC
⎠
2⎝π
..........................................14.32
..................................................................................................14.33
as deduced in 14.30.
The RMS of the supply current harmonics: I H = I2S − I2S1 = I DC 1 −
Total Harmonic Distortion, rel. to the fund.: THDF =
Total Harmonic Distortion, rel. to the rms current:
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π2
8
THD R =
8
π2
= 0.44I DC .............................14.33
− 1 = 0.48 .............................................................14.34
IH
IS
= 1−
8
π2
= 0.44 ..................................................14.35
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14.5 Examples (review chapter 15 in order to solve 3 phase problems)
Example 1: The input power to a 3-phase diode rectifier with a capacitor dc filter is measured at
5kW with an electronic wattmeter. The line current has a total rms of 8A with a fundamental
harmonic of 6.1A. The 60Hz 480 V 3Ø ac supply may be assumed to be sinusoidal & balanced.
Determine the following:
(a) Rectifier input power factor: PF
Example 2: The input power to a 3-phase diode rectifier with a capacitor dc filter is measured at
7.5kW with an high bandwidth electronic wattmeter. The line current has a total rms of 15A with a
fundamental harmonic of 10A. The 60Hz 440 V 3-phase ac supply may be assumed pure sinusoidal,
balanced and the output dc-link capacitors have a negligible ripple voltage. Neglect the effect of
diode on-state voltage drops.
Determine:
(a)
The fundamental power factor, FPF, current distortion factor, CDF, power factor, PF, and
total harmonic distortion factor (THDF) associated with the rectifier input current.
(b)
The rectifier apparent input power and rms of the input harmonic currents.
rms line current, Is = 15 A, fundamental of the input current, I1 = 10 A
Example 3: The input power to a 3-phase diode rectifier with an LC dc filter is measured at 7.5kW
with an high bandwidth electronic wattmeter. The 60Hz 440 V 3-phase ac supply may be assumed
pure sinusoidal, balanced and the output dc-link current may be assumed to have a negligible ripple.
Neglect the effect of diode on-state voltage drops and inductor resistance.
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Determine:
(a)
The fundamental power factor, FPF, current distortion factor, CDF, power factor, PF, and
total harmonic distortion factor associated with the rectifier input current.
(b)
The total rms and fundamental harmonic of the rectifier input current.
The rectifier is assumed to have ideal waveforms with a ripple-free dc output current.
(a) The rectifier output current is ripple free and continuous => an ideal case as described in the
notes.
FPF = 1: as the line current are in phase with the line - neutral voltages
Example 4: The input current to a 3-phase rectifier has a THDf of 25% and a fundamental
displacement factor angle of 15 °. Determine: (a) CDF, FPF, PF. (b) I1 and IH as a percentage of
the total rms input current
(a) Since the fundamental displacement factor angle, Ø1 =15 ° = FPF = cos Ø1 = cos 15° = 0.966
Example 5: The input power to a 3-phase diode rectifier with a capacitor dc filter is measured at
5kW with an electronic wattmeter. The line current has a total rms of 8A with a fundamental
harmonic of 6.1A. The 60Hz 480 V 3Ø ac supply may be assumed to be sinusoidal & balanced.
Determine the following:
(a) Rectifier input power factor: PF
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Example 6: A 1-phase diode rectifier draws a current of 0.9 A rms at a power level of 90W from
a 115V ac supply. If the fundamental current leads the supply voltage by 5°, determine the CDF,
DPF and THDf associated with the rectifier input current.
Example 7
The input power to a 3-phase diode rectifier with a capacitor dc filter is measured at 50kW with an
high bandwidth electronic wattmeter. The line current has a total rms of 68A with a fundamental
harmonic of 51 A. The 60Hz 575 V. The 3-phase ac supply may be assumed to be purely sinusoidal,
balanced and the output dc-link capacitors have a negligible ripple voltage.
Determine:
(a).The total rms of the harmonic currents other than the fundamental. If all current harmonics other
than the fifth and seventh are negligible, and these two harmonics are equal in magnitude, determine
the rms of the each of these harmonics.
(b) The fundamental power factor, FPF, current distortion factor, CDF, power factor, PF, and ........total
harmonic distortion factors of the supply current (THDF, THDR).
(c)The magnitude of the imaginary component of the fundamental harmonic current and hence
determine the phase angle displacement of the fundamental current.
(d) Determine the apparent power associated with the fundamental harmonic current. Determine also
the apparent power associated with the harmonic currents.
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Chapter 15: 3-phase Diode Rectifiers
At standard industrial power levels, ranging from 1kW to MW, loads requiring dc voltage sources are
normally supplied using a 3-phase rectifier systems. The power transmission is based upon 3-phase, so a
balanced 3-phase power is desired for many reasons, and 3-phases in general is used because the
current drawn in a single wire or cable is lower than would be drawn from a single phase system. In
addition, the higher the power flow the higher the voltages that are used. This is done to lower the
current in each conductor and hence to limit the thickness of the power cables, e.g. 208,460,480,
575,600, 4kV are typical industrial voltages.
The 3-phase diode rectifier, see Fig. 15.1, is by far the most common and widely used rectifier in
high power applications because of its very low cost, size and weight. Any rectifier using a power
semiconductor switch is generally regarded as less reliable and more expensive.
Fig. 15.1 3-phase full-wave diode rectifier
This section and the next one, describes the basic operation of this rectifier using (a) a resistive
load, (b) a capacitor dc filter, (c) an inductor and capacitor dc filter, (d) a capacitor dc filter with an
input 3-phase ac inductor.
The capacitor filter, option (c) above, is largely used at lower power levels because of its low cost,
but this is counteracted by its poorer performance regarding harmonic currents and lower power
factor. The rectifier operated with an LC filter, option (c), is used because of lower harmonics and a
higher power factor relatively to option (b). This filter, is often used in high power applications to
balance the currents between phases when the 3-phase voltage supply is unbalanced. Option (d) is often
used because it allows the power converter to be enclosed into a single box and the inductors can be
located outside the drive. In addition 3-phase ac inductors can be relatively small Other reasons also
come into play including lower emi/rfi emissions and reducing interference with other loads.
15.1 Definitions of waveforms used in the 3-phase voltage supply
The rectifier shown in Fig. 15.1 is supplied from a three-phase ac supply with a Y-connected 3-phase
voltage system Va, Vb, Vc, represent the line-neutral voltages in a standard 3-phase system. The system
neutral is labelled N and is different from ground because it may carry current in unbalanced systems.
The dc output terminals are labelled X for the positive output terminals and Y for the negative output
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terminals. A 3-phase ac voltage supply is shown in Fig. 15.2, illustrating the phase sequence between the
phase voltages and the resultant line-line voltages. e.g. phase-b lags phase-a by 120° phase-c lags phaseb by 120° degrees, etc.
a
Fig. 15.2 Definitions for the 3-phase voltage system
15.2 Operation of the basic 3-phase diode rectifier
Having defined the 3-phase voltage system some basic operational details, or guidelines, of the 3phase diode rectifier should be noted. Firstly, initially it is assumed that the rectifier output current is
continuous, i.e. there is always a dc output current.
(a) The 3Ø diode bridge can be considered as two separate half-wave diode rectifiers
Consider the diode rectifier as consisting of an upper and lower half-wave rectifier. This assumption
is basically saying that the positive terminal at the diode rectifier output X-terminal, is connected to
either of the three supply voltages, see Fig. 15.1, and that the conduction of the diodes to this terminal
is independent of what happens at the Y-terminal and the diodes connected to this negative terminal.
Similarly, the negative terminal at the diode rectifier output Y-terminal is connected to either of the
three supply voltages, see Fig. 15.1, and that the conduction of the diodes to this terminal is
independent of what happens at the X-terminal and the didoes connected to the positive terminal.
* Da+, Db+, Dc+ may be considered as a separate power converter consisting of a 3-phase half-wave
diode rectifier and may be referred to as the positive group of diodes.
* Da-, Db-, Dc- may be considered as a separate power converter consisting of a 3-phase half-wave
diode rectifier and may be referred to as the negative group of diodes.
(b) Diode conduction in the positive group of diodes
The phase with the most positive voltage conducts the dc output current to the X terminal &
the diodes in the other two phases get reversed biased. Fig. 15.3(a) shows when phase-a is the most
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positive voltage. If Da+ conducts, then the dc-link current io flows as shown in state (i). The other two
diodes, Db+ and Dc+ get reversed biased. This represents a satisfactory operating condition. If, when
phase-a has the most positive voltage, Db+ conducted the load current (= most -ve phase voltage in state
(ii)), then Da+ and Dc+ would be forward biased by a large voltage and would also turn on. This disobeys
the exponential relationship between current and voltage for a diode and so cannot happen.
THE RECTIFIER POSITIVE OUTPUT TERMINAL IS ALWAYS CONNECTED TO THE
PHASE WITH THE MOST POSITIVE LINE-NEUTRAL VOLTAGE
15.3(a) +ve group of diodes: phase-a most +ve voltage
15.3(b) -ve group of diodes: phase-a most -ve voltage
Fig. 15.3 Which diode conducts the dc-link current?
(c) Diode conduction in the negative group of diodes
The phase with the most negative voltage conducts the dc output current to the Y terminal &
the diodes in the other two phases get reversed biased. Fig. 15.3(b) shows when phase-a has the most
negative voltage. If Da- conducts the dc-link current io, as shown in state (iii), then the other two diodes,
Db- and Dc- get reversed biased. This represents a satisfactory operating condition. If, when phase-a is
the most negative, Db- conducted the load current (= most +ve phase voltage), state (iv), then Da- and Dcwould be forward biased by a large voltage and would also turn on. This operating condition disobeys the
operational characteristics of the diodes and so cannot happen.
THE RECTIFIER NEGATIVE TERMINAL IS ALWAYS CONNECTED TO THE PHASE WITH
THE MOST NEGATIVE LINE-NEUTRAL VOLTAGE.
(d) Rectifier output voltage VXY.
The result of the circuit operation described in parts (b) and (c) is to say that the X terminal to
neutral voltage VXN is always the most positive of the phase voltage, and the Y terminal to neutral
voltage VYN is the most negative of the phase voltages, see Fig. 15.4 together with the diode conduction
periods. The figure illustrates that the diode conduction angle is 120°, each diode conducts for 1/3 of a
cycle and the conduction periods of the positive group of diodes overlap with the lower group of diodes
by 60°.
The resultant rectifier output voltage, VXY, is a line-line voltage that represents the difference
between the most positive phase voltage and the most negative phase voltage, vXN and vYN respectively.
The rectifier output voltage waveform, VO = VXY in Fig. 15.4, takes the form of the most positive lineline voltage, and as such, repeats its waveshape every 60°. If this voltage is applied to a resistive load,
or more commonly, an LC filter, then the output current of the rectifier must have a dc component
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together with a 360Hz ripple (=6th harmonic frequency if the supply frequency is 60Hz), see io in Fig.
15.4.
Fig. 15.4 Basic operation of the 3-phase diode bridge
15.3 Analysis of the Output voltage Waveform
The rectifier output voltage is shown over a typical 60° period, assuming that the ac supply voltage
is sinusoidal, balanced and undistorted. Note that in this analysis, the effect of ac supply inductance and
commutation overlap is being ignored. The peak of Vo is √2VLL, where VLL is the rms of the line-line
voltage.
Fig. 15.5 Rectifier output voltage over a 60° period
The rectifier output voltage waveform repeats every π/3 radians (60°), so the average rectifier
output voltage can be obtained from the integration:
VO,dc =
VO,dc =
3
30°
∫
π −30°
6 2
π
()
VO θ dθ =
3
30°
∫
π −30°
()
⎛ 2V cos θ ⎞ dθ .........................................................................................................15.1
LL
⎝
⎠
VLL sin30° ...............................................................................................................................................................15.2
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resulting in: VO,dc =
VO,dc
3 2
V = 1.3506 × VLL .....................................................................................................................15.3
π LL
≈ 1.35VLL ................................................................................................................................................................................15.4
Thus, ignoring diode voltage drops & the effects of supply inductance, the following dc output
voltages are obtained
Table 15.1: 3-phase rectifier ideal dc-link output voltages
VLL
208
460
480
575
600
LC dc filter
VO,dc(=1.35VLL)
281
621
648
776
810
C dc filter
VO,dc(=1.41VLL)
294
650
679
813
848
The rms of the output voltage is obtained from the integration:
VO,rms =
3
30°
∫
π −30°
2
⎛ 2V cos θ⎞ dθ ..........................................................................................................................................15.5
LL
⎝
⎠
resulting in: VO,rms = VLL 1 +
3 3
= 1.3517 × VLL .........................................................................................................15.6
2π
This is numerically very close to 1.35.
Finally, with the fundamental cycle of the ac supply defining the fundamental frequency at say
60Hz, then the output voltage harmonic spectrum can be obtained through Fourier analysis and shown
to be integer numbers of the sixth harmonic frequency:
VO,n =
(
6
)
n2 − 1 π
VLL , n = 6,12,18,... ........................................................................................................................................15.7
so the dominant harmonic occurs at n = 6 and is given by: VO6 =
6
35π
VLL =
5.5
100
VLL ......................................15.8
Example 1 A 3-phase diode rectifier fed from a 60Hz 208 V ac supply has a resistive load of
20ohm. Neglecting diode voltage drops, determine the power dissipated in the load resistor and
the rms of the supply current.
Vo,rms = √[1 + 3√3/2π)] × VLL, PR = V2o,rms/R
Io,rms =Vo,rms / R, Is = √(2/3)×Io,rms
Answers: VO,rms = 281.15V, PR = 3,952W, IO,rms = 14.06A, Is = 11.48A
15.4 Ideal performance of the 3-phase diode rectifier with an LC output filter & L → ∞
The rectifier input current is highly distorted but in phase with the supply voltage. The situation is
ideal in that the dc inductor is assumed to be large enough as to make the dc-link current continuous
and ripple-free. The rectifier output current is assumed to be pure dc with the value IO,dc = IDC. The
circuit and the ideal supply current waveforms are shown in Fig. 15.6.
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Fig. 15.6 Rectifier Operation with an LC output filter where L → ∞
The supply current is made up of current blocks of 120° duration and magnitude IDC. The waveform
is symmetrical in each half of the voltage cycle so the rms of the waveform, using the waveform sketch
shown in Fig. 15.6, can be derived from the equation:
1
IS =
π
150o
∫
30o
I2DC dθ .......................................................................................................................................................................15.9
2
IS =
I = 0.816I DC ...........................................................................................................................................................15.10
3 DC
A short approach for estimating the rms of the ac supply current is to say that a current of magnitude
IDC only flows for a fraction d of a cycle: I S = δI DC .............................................................................................15.11
Since the current flows for ẟ = 2/3 of a cycle: I S =
2
I ..................................................................................15.12
3 DC
If the diode on-state conduction voltages are given by: VDon = 0, then the rectifier input power, Ps, is
the same as the output power, Po, and is associated with only the dc component of output voltage and
current: PS ≈ PDC = VO,dc I DC .....................................................................................................................................................15.13
Substituting in for the ideal output voltage expressed relative to VLL:
PS = 1.35VLL I DC .............................................................................................................................................................................15.14
The effect of two diode voltage drops in lowering the average rectifier output voltage can now be taken
into account:
(
)
PDC = 1.35VLL − 2VDon I DC ......................................................................................................................................................15.15
Neglecting diode voltage drops, the Power Factor: PF =
Simplifying: PF =
3
π
PS
S
3 2
=
π
VLL I DC
2V LL I DC
....................................................15.16
= 0.955 .................................................................................................................................................15.17
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In general: PF =
PF =
I1
IS
3 × VS × I 1r
3 × VS × I S
=
I 1 × cos φ1
IS
.....................................................................................................................15.18
cos φ1 = CDF × DPF ..................................................................................................................................................15.19
Since the DPF is 1, then the CDF is 0.955.
Apparent Power: S = 3VLL I S ...............................................................................................................................................15.20
But since the average dc current is IDC, the rms of the supply current is: I S =
2
3
I DC ..........................15.21
Then S can be reduced to: S = 2VLL I DC ........................................................................................................................15.22
Fourier analysis of the current waveshape in Fig. 15.6 reveals the rms of the current harmonics:
In =
6 I DC
n=1,5, 7,11,13,... or more simplified: I n = 0.78
I DC
..................................................................15.23
π n
n
From which the fundamental harmonic is defined as being: I 1 = 0.78 × I DC .................................................15.24
2
I H = I2S − I21 = I DC
THDF =
THDF =
IH
I S1
π2
9
=
I DC
3
2
3
I DC
−
−
6
π2
= 0.24I DC .........................................................................................................................15.25
6
π2 .................................................................................................................................................15.26
6
π
− 1 = 31 % ........................................................................................................................................................15.27
Example 2 The rectifier described in Example 1 now is operated with an out LC filter where the
capacitor and inductor may be considered large enough as to make their current and voltages ripple
free, respectively. Determine the load power and the rms of the supply current.
VLL = 208, R 20
Vo,dc = 1.35 × VLL, Pload = V2o,dc/R
Io,dc= Vo,dc/R, Is = √(2/3) × Io,dc
Vo,dc = 280.8V, PR = 3942W, Io,dc = 14.04 A, Is = 11.46A
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Chapter 16: 3-phase diode rectifier with an LC DC filter
Example 1: A 3-phase diode rectifier, using diodes with a 0.9 V on-state voltage drop, is operated
from a 60Hz 600V ac supply with an LC dc-link filter. If the rectifier has a load power of 100kW,
determine:
(a) average inductor current if its current is continuous
(b) inductor size required to make its pk-pk current ripple 40% relative to its average current
(c) rms and average of the inductor current
(d) rms of the supply current
(e) rectifier input power factor
(f) capacitor size required to obtain a pk-pk ripple voltage of approximately 1%
Example 1 Answers
Example 2: A 3-phase full-wave diode rectifier with an L/C filter supplies an R load from a 208V
60Hz ac supply. The dc filter inductance is 2.5mH, the dc link capacitance is 1mF & the load
resistance is 40 Ω. The diode on-state voltage drops may be assumed to be 1.2 V. Determine the
following:
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Example 3: Capacitor dc-link filter
The input power to a 3-phase diode rectifier with a capacitor dc filter is measured at 7.5kW with an
high bandwidth electronic wattmeter. The line current has a total rms of 15A with a fundamental
harmonic of 10A. The 60Hz 440 V 3-phase ac supply may be assumed pure sinusoidal, balanced and the
output dc-link capacitors have a negligible ripple voltage. Neglect the effect of diode on-state voltage
drops. Determine:
(a)
The fundamental power factor, FPF, current distortion factor, CDF, power factor, PF, and
total harmonic distortion factor associated with the rectifier input current.
(b)
The rectifier apparent input power and rms of the input harmonic currents.
(c)
The average and rms of the rectifier output current.
(d)
The average and rms of a diode current.
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Example 4: A 3-phase diode rectifier, VDon = 1V, is operated from a 60Hz 208V ac supply. The
rectifier has an LC output filter, L 1mH, C= 950 µF, with a resistive load, R = 25Ω. Determine: (a)
ac/dc/rms of the rectifier output voltage, (b) ac/dc/rms of the rectifier output current,
neglecting harmonic currents greater than the sixth, (c) inductor current waveform, (d) rms of the
supply current, (e) rectifier input power, apparent power, (f) input current harmonics, (f) supply
current FPF, CDF, PF
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Chapter 17: 3-phase diode rectifiers using ac ac reactors
3-phase diode rectifiers can be implemented with a variety of different filter types where the main
goal of the filter is to produce a low ripple output dc voltage and to lower the rectifier input current
harmonics. A typical rectifier load is a 3 phase pwm inverter used within an industrial drive system. This
section describes the use of (a) a capacitor dc filter and (b) supply inductors.
17.1 Operation with no ac reactors (Ls = 0, Ldc = 0)
A 3-phase diode rectifier with a dc capacitor filter, operates similar to that of a single phase
rectifier with the exception that the dc capacitor receives current charging pulses 6 times a cycle, as
opposed to twice in the single phase rectifier. This means that the rectifier bridge output current has
six pulsed currents per cycle, see io Fig. 17.1(a). This also means that the rectifier can obtain a more
“pure dc” voltage, see vo in Fig. 17.1(c), than a single phase rectifier, and the size of the dc capacitor
required for a given voltage ripple can be made to be smaller, e.g. the capacitor discharge period is
shorter: = 60°-θc, see Fig. 17.1(d). The rectifier phase input currents have two distinct current pulses
per half cycle, see Fig. 17.1(b). This current waveshape is rich in harmonics, typically the fifth & seventh
harmonics are as large as the fundamental. The rectifier input power factor, though still regarded as
low at 0.6 to 0.7, is much better than with a single phase rectifier.
(c) rectifier output dc voltage
(d) expanded output voltage & current
Fig. 17.1 Rectifier Operation with an C output dc filter
Analysis can be conducted on the operation of this rectifier similar to that conducted on the single
phase rectifier. However, the rectifier performance is very sensitive to the size of the natural ac
supply inductance, capacitor esr, and also imbalances in the 3-phase supply voltages. Typical supply
current waveforms are shown in Fig. 17.2, in a 208V 3-phase rectifier using 0.1mH and 0.5mH inductors.
Notice that the size of the current pulses are roughly 15 A in one case, and 25 A in the other,
depending upon the natural inductance in the 3-phase supply. The power factor of such waveforms are
around 0.6. The DPF is close to 1 as the currents are very close to being in phase with the supply
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voltages. With a small supply inductance, the current is slightly leading and with slightly large supply
inductance the current becomes slightly lagging. The largest contributor to the PF is the CDF due to
the presence of large fifth and seventh harmonics.
(a) 0.5 mH supply inductance
(b) 0.1 mH supply inductance
Fig. 17.2 208V rectifier with a C output dc filter with different ac supply inductance
The output dc-link voltage lies very close to the peak of the line voltages:
VO,dc ≈ 2VLL = 1.41VLL
17.1
................................................................................................................................................................
....with a slight droop due to the forward conduction voltages of two diodes, the capacitor ripple
voltage, and the natural supply inductance (typically around 1%). This equation should be compared
to 1.35VLL obtained with an LC dc-link filter.
17.2 Operation when using ac reactors (Ldc = 0)
The operation of the capacitor smoothed rectifier is affected very largely by the size of the ac
supply inductance, so inductors are often placed at the rectifier input terminals. This can have the
effect of lowering the input harmonics and improving the rectifier power factor.
Fig. 17.3 3-phase rectifier with a C output dc filter and supply inductance inserted
This inductance takes the form of a 3 limb magnetic core and is often specified in per-unit at
around 0.03 p.u.to 0.05 p.u. (or 3 to 5%), based upon the power rating of the rectifier, or variable speed
drive unit using the rectifier.
Vbase = VLL , fbase = 60Hz, Pbase = rectifier input power ...........................................................................................17.2
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I base =
L base =
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Pbase
3VLL
, X base = R base =
2
VLL
2πfsPbase
and so L pu =
VLL
3I base
=
2
VLL
Pbase
................................................................................................................17.3
, for f = 60Hz this becomes: L base =
L
L base
2
VLL
377Pbase
..............................................................................17.4
..........................................................................................................................................................................17.5
Lastly, a 0.05 p.u. inductance is often referred to in% as a 5% inductance.
In a 208V, 60Hz, 5kW system, a 5% inductance is 1.1 mH. (5.5mH at 1kW)
As a result of inserting an input reactor, the rectifier input current waveshape is changed from that
shown in Fig. 17.2 to that shown in Fig. 17.4(a). The power factor of the rectifier can be increased to
0.92 and the fifth and seventh harmonics specifically can be reduced. Hence the CDF associated with
the current waveforms can be increased up to around 0.98.
(a) phase-a current
(b) expanded current waveforms: phase-a, phase-c
Fig. 17.4 208V rectifier with a C output dc filter with a 5mH ac supply inductance
Another feature associated with using input reactors is shown in Fig. 17.4(b). The rectifier input
currents no longer increase and fall quickly between phases. Fig. 17.4(b) shows the region where the
current is falling in phase-c and increasing in phase-c. This transfer of current, or commutation overlap,
takes roughly 1.1 mS in the example shown and causes the current to lag the voltage and hence lowers
the DPF of the rectifier.
17.3 Performance when using ac reactors and assuming Ldc = 0
Analysis for the rectifier using no dc-link inductance (Ldc = 0) is complicated and the commutation
overlap angle is harder to predict exactly because of the high ripple in the ac current waveform, see
Fig. 17.4 So the results of simulation studies are given overleaf under constant power conditions
and for the case where there is a capacitor dc-link filter and an ac supply inductance (or ac reactor).
The simulations assumed that the capacitor voltage was smooth and ripple free. The significance of
the various curves are discussed in class, but you should be able to justify the characteristics of
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all the curves based upon how the ac reactor affects the supply current waveforms as illustrated
in Fig. 17.2 for a low inductance.
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17.4 Performance when using ac reactors and assuming Ldc = ∞
The commutation overlap angle can be more easily determined when the rectifier output current has
no ripple, i.e. ideally a ripple-free output current assumes that there is a dc filter inductor with Ldc =
infinity. Fig. 17.5 shows input current waveforms where Ldc = 100mH and when using small and
large ac inductors (0.1mH and 5mH respectively). The commutation overlap in mS is roughly
0.2mS (=2°) for the 0.1mH case, and 1.1 mS (=24°) for the 5mH case.
(a) 0.1 mH supply inductance
(b) 5 mH ac inductance
(c) 0.1 mH supply inductance
(d) 5 mH ac inductance
Fig. 17.5 208V rectifier with an LC, (Ldc=100mH) dc filter & different ac supply inductances
Analysis shows that this commutation overlap period m is given by:
⎛
2I DCX S ⎞
⎟ ...........................................................................................................................................................17.6
µ = a cos ⎜ 1 −
⎜
⎟
V
LL
⎝
⎠
where XS is the total ac supply reactance. The average rectifier output voltage is given by:
VO,dc
3
I X ..........................................................................................................................................................17.7
π DC S
= 1.35VLL − 0.955I DCX S ................................................................................................................................................17.8
VO,dc = 1.35VLL −
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This shows that the average rectifier output voltage decreases as the supply inductance increases.The
rectifier input power factor can be estimated using:
FPF =
1 + cos µ
2
, PF ≈ 0.955 × DPF ....................................................................................................................................17.9
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17.5 Examples
Example 1: A 400HP industrial drive system uses a three phase diode rectifier input stage with a
480V 60Hz ac supply. Using the drive power rating to define per-unit values, a 0.03 p.u. 3-phase
inductor is placed at the rectifier input terminals to improve the drive input performance. What is
the value of this inductance in mH?
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Example 2: 3ɸ diode rectifier with a 3ɸ supply inductor & a dc capacitor with no ripple voltage.
Parameters:
VLL = 480V,60Hz
Pinput = 50kW
Lsupply = 1.1mH
VDon = 0V
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ECE 401 Power Electronics
Sample Mid-Term
Duration 1 hr. 20 min.
Last Name:
First Name:
ID Number:
Instructions:
1
2
3
4
5
6
Fill name and ID number
Do not begin until instructed to do so
Please stop writing when instructed & remain seated until your exam is collected
Attempt ALL questions
Box or underline final answers and the results of each stage of your calculations
If you run out of space to write, use the back of the answer sheets
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Q1 ac/dc/rms and power calculations
(11 marks)
1(a) Determine the rms and dc components of the following waveforms that repeat every 6ms.
rms = δ ×
dc = δ ×
10
2
1
rms1 =
6
10
3
=
5
6
=
×
5
6
10
2
10
×
=
3
50
12
= 5.27 A
= 4.17 A
× 10 = 4.08 A , rms2 =
3
6
× 5 = 3.54 A
rms = rms12 + rms22 = 3.542 + 4.082 = 5.40 A
dc = δ1 × 10 − δ2 × 5 =
1
6
× 10 −
3
6
× 5 = −0.833 A
1(b) Consider a current waveform defined by the following equation:
i(ωt) = 10 + 20 Sin (ω t) + 20 Sin (2ω t), where ω = 377
Determine the component power dissipation if this current were to flow through each of the
following:
- 50 V dc voltage
Power = E × I DC = 50 × 10 = 500 W
- 5 Ω resistor
2
I rms
2
⎛ 20 ⎞ ⎛ 20 ⎞
= I2DC + I21 + I22 = 102 + ⎜
⎟ +⎜
⎟ = 22.36 A
⎝ 2⎠ ⎝ 2⎠
Power = R × I2rms = 5 × 22.362 = 2500 W ac voltage
()
(
- ac voltage: V θ = 60 × sin ω t + 30
Power = Vs × I 1 × cos φ1 =
ECE Dept. University of Alberta
60
2
×
)
20
2
× 0.866 = 518.6W
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Q2 1-phase Diode Rectifiers with an R or R/E load
A full-wave 4 diode rectifier is used to energize a resistive dc solenoid coil. Using the following
data, determine the coil resistance required to obtain an average current of 1 A:
Vs = 5 V
fs = 60Hz
VDon = 0.8V rd = 0.1 (assume Lcoil = 0)
Approx approach
⎛ 2V ⎞
⎛ 1.6 ⎞
α = a sin ⎜ Don ⎟ = a sin ⎜
⎟ = 13.1°
⎜ 2V ⎟
⎝ 2 × 5⎠
⎝
⎠
S
⎛
1 ⎛
2α ⎞ ⎞
I DC =
⎜ 0.9VS cos α − 2VDon ⎜ 1 −
⎟⎟
R + rd ⎝
180 ⎠ ⎠
⎝
R=
R=
VDC = 0.9VS − 2VDon
VDC = 4.5 − 1.6
VDC = 2.9 V
⎛
1 ⎛
2α ⎞ ⎞
⎜ 0.9VS cos α − 2VDon ⎜ 1 −
⎟ ⎟ − 2rd
I DC ⎝
180 ⎠ ⎠
⎝
1
1
R=
( 0.9 × 5 × cos13.1° − 1.6(1 − 26.2°)) − 0.2
VDC
− 2rd
I DC
R = 2.9 − 0.2
R = 3.016 − 0.2
R = 2.7 Ω
R = 2.82 Ω
Q3 1-phase diode rectifiers with a dc side filter
3(a) A full-wave 4 diode rectifier is used to supply a dc machine using a dc filter inductor to
smooth the motor current. Using the following data, determine the average load current and the
power dissipated in the motor back emf, Edc, & the dc resistance Rdc.
Vs = 120 V
fs = 60Hz
VDon = 0.9V
VDC = 0.9VS − 2VDon
VDC = 0.9 × 120 − 1.8
VDC = 106.2 V
I DC =
I DC =
VDC − E
R + 2rd
106.2 − 100
1.2
I DC = 5.17 A
rd = 0.1 Ω
Ldc = 20 mH
Vo2 = 0.424 × 120
Vo2 = 50.88 V
X 2 = 2 × 377 × 0.02
X 2 = 15.08 Ω
Rdc = 1 Ω
Edc = + 100 V
PR = I2rms × R
PR = 6.272 × 1
PR = 38.1 W
R = 1 + 2rd = 1.2 Ω
PE = I DC × E
Z 2 = R2 + X2
PE = 5.17 × 100
Z 2 = 1.22 + 15.082
PE = 516.7 W
Z 2 = 15.13 Ω
I O2 =
50.88
15.13
= 3.36 A
I O2 = 5.172 + 3.362 = 6.17 A
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Q3 contd. 1-phase diode rectifiers with a dc side filter
3(b) Several measured data are available for a power supply using a 4 diode full-wave diode
rectifier with a capacitor dc filter (neglect the diode voltage drops)
Vs = 120 V
fs = 60Hz
Is = 5 A
Pin = 320 W VDC = 160 V
Determine:
(i) average value of the current at the diode rectifier output terminals.
I DC =
P
=
VDC
320
160
=2A
(ii) conduction period in degrees associated with the diode currents
I S = I DC
⎛
VR ⎞
⎜
⎟
θc = 2a cos 1 −
⎜
2Vs ⎟⎠
⎝
π3
8θc
2
⎛I ⎞
π3
θc = ⎜ DC ⎟ ×
⎜⎝ I ⎟⎠
8
S
2
⎛ 2⎞
π3
θc = ⎜ ⎟ ×
8
⎝ 5⎠
θc = 35.5° = 0.62 rad.
(iii) peak value of the diode currents.
I M = I DC
IM = 2
π2
2θc
π2
2 × 0.62
I M = 15.9 A
(iv) peak-peak ripple of the capacitor voltage
VDC = 2VS −
VR
2
VR = 2 ⎛ 2 × 120 − 160⎞
⎝
⎠
VR = 19.4 V
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Q4 Power Quality and Utility Harmonics
(7 marks)
The current drawn from a 60Hz 120 V ac supply by a single phase diode rectifier has the following
most significant spectral harmonic components:
I1 = 10 ∠-30°
I3 = 6 ∠-20°
I5 = 4 ∠ +30°
I7 = 2 ∠-80°
The currents are given in amps rms, with the phase specified relative to the supply voltage.
Determine:
4(a) total harmonic distortion THDF and THDR of the current
I rms = 10 + 6 + 4 + 2
2
2
2
2
I rms = 12.49 A
I H = 62 + 42 + 22
I rms = 7.48 A
THD R =
THDF =
IH
IS
7.48
10
THDF = 74.8 %
THDF =
IH
THD R =
I1
7.48
12.49
THD R = 60.0 %
4(b) supply current distortion factor & displacement power factor (CDF, DPF)
CDF =
CDF =
I1
IS
10
12.49
DPF = cos φ1
DPF = cos30°
DPF = 0.866
CDF = 0.800
4(c) rectifier input power factor
PF = CDF × DPF
PF = 0.8 × 0.866
PF = 0.693
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Q5 3-phase diode rectifiers
(12 marks)
5(a) A 3-phase diode rectifier is operated with an LC dc output filter where the output capacitor
voltage may be considered ripple free. The effect of diode voltage drops may also be neglected.
The rectifier is required to be operated under the following maximum power conditions:
VLL = 480 V fs = 60Hz Pin = 20 kW
Determine:
(i) the minimum ac inductor in mH required to obtain a continuous dc inductor current
VDC = 1.35VLL
VDC = 1.35 × 480 = 684V
I DC =
P
VDC
=
20, 000
648
I DC = 30.85 A
VO6 =
VO6
5.5
VLL = 0.055 × 480
100
= 26.4V
I O6 =
I DC
2
=
30.86
2
L=
L=
VO6
6 × 377 × I O6
VO6
6 × 377 × 21.8
L = 0.535 mH
I O6 = 21.8 A
(ii) rms current rating of the inductor when operating with the minimum dc inductor size.
I O,rms = I2DC + I2O6 = 3.862 + 21.82
I O,rms = 37.8 A
5(b) A 3-phase diode rectifier is operated with a 3-phase ac input inductor and capacitor dc output
filter where the output capacitor voltage may be considered ripple free. The rectifier is required to be
operated with a maximum 30% input current THDF under the following operating conditions:
VLL = 460 V, fs = 60Hz Pin = 20 kW Lsupply,natural = 0.33 mH
Determine:
(i) the minimum ac inductor in mH required to be inserted to obtain these conditions.
L base =
2
VLL
For: THDF = 30 %, Lpu = 0.061 p.u.
460
Ls,total = 0.061 × 28.1 = 1.71 mH
L base =
377 × 20, 000
Ls,inserted = 1.71 - 0.33
L base = 28.1 mH
Ls,inserted = =1.38 mH
(ii) rms current rating of the ac inductor when using the minimum ac inductor size.
377 × P
2
I base =
I base =
P
3VLL
20, 000
For THDF = 30 %, from the plot:
Is,pu = 1.09
=> IS = 1.09* 25.1 = 27.4 A
3 × 460
I base = 25.1 A
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