Uploaded by RAUL MARTIN

059fdc39-1064-4890-a955-ac5d2501da67

advertisement
EECS 105 Fall 2003, Lecture 17
Lecture 17:
Common Source/Gate/Drain
Amplifiers
Prof. Niknejad
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 17
Prof. A. Niknejad
Lecture Outline




Department of EECS
MOS Common Source Amp
Current Source Active Load
Common Gate Amp
Common Drain Amp
University of California, Berkeley
EECS 105 Fall 2003, Lecture 17
Prof. A. Niknejad
Common-Source Amplifier
Isolate DC level
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 17
Prof. A. Niknejad
Load-Line Analysis to find Q
I RD 
VDD  Vout
RD
Q
slope 
5V
ID 
10k
1
10k
0V
ID 
10k
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 17
Prof. A. Niknejad
Small-Signal Analysis
Rin  
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 17
Prof. A. Niknejad
Two-Port Parameters:
Generic Transconductance Amp
Rs

vs
vin
Rin
Gmvin
Rout
RL

Find Rin, Rout, Gm
Rin  
Gm  gm Rout  ro || RD
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 17
Prof. A. Niknejad
Two-Port CS Model
Reattach source and load one-ports:
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 17
Prof. A. Niknejad
Maximize Gain of CS Amp
Av   gm RD || ro



Increase the gm (more current)
Increase RD (free? Don’t need to dissipate extra
power)
Limit: Must keep the device in saturation
VDS  VDD  I D RD  VDS ,sat


For a fixed current, the load resistor can only be
chosen so large
To have good swing we’d also like to avoid getting
to close to saturation
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 17
Prof. A. Niknejad
Current Source Supply


Department of EECS
Solution: Use a
current source!
Current independent
of voltage for ideal
source
University of California, Berkeley
EECS 105 Fall 2003, Lecture 17
Prof. A. Niknejad
CS Amp with Current Source Supply
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 17
Prof. A. Niknejad
Load Line for DC Biasing
Both the I-source and the transistor are idealized for DC bias
analysis
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 17
Prof. A. Niknejad
Two-Port Parameters
From current
source supply
Rin  
Gm  gm
Rout  ro || roc
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 17
Prof. A. Niknejad
P-Channel CS Amplifier
DC bias: VSG = VDD – VBIAS sets drain current –IDp = ISUP
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 17
Prof. A. Niknejad
Two-Port Model Parameters
Small-signal model for PMOS and for rest of circuit
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 17
Prof. A. Niknejad
Common Gate Amplifier
DC bias:
I SUP  I BIAS  I DS
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 17
Prof. A. Niknejad
CG as a Current Amplifier: Find Ai
iout  id  it
Ai  1
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 17
Prof. A. Niknejad
CG Input Resistance
vgs  vt
 vt  vout 
it   gm vgs  gmb vt  

r
o


Output voltage: v  i (r || R )  i (r || R )
out
d oc
L
t oc
L
At input:
 vt   roc || RL  it 
it  g m vt  g mb vt  

r
o


Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 17
Prof. A. Niknejad
Approximations…

We have this messy result
g m  g mb 
1
ro
it
1
 
r || RL
Rin vt
1  oc
ro

But we don’t need that much precision. Let’s start
approximating:
g m  g mb
1

ro
roc || RL  RL
R in 
Department of EECS
RL
0
ro
1
g m  g mb
University of California, Berkeley
EECS 105 Fall 2003, Lecture 17
Prof. A. Niknejad
CG Output Resistance
vs
vs  vt
 g m vgs  ( g mb vs ) 
0
RS
ro
 1
1  vt
vs 
 gm  gmb   
ro  ro
 RS
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 17
Prof. A. Niknejad
CG Output Resistance
Substituting vs = itRS
 1
1  vt
it RS 
 gm  gmb   
ro  ro
 RS
The output resistance is (vt / it)|| roc
Rout
Department of EECS
  ro

 roc ||  RS 
 g m ro  g mb ro  1 



  RS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 17
Prof. A. Niknejad
Approximating the CG Rout
Rout  roc || [ro  g m ro RS  g mb ro RS  RS ]
The exact result is complicated, so let’s try to
make it simpler:
g m  500S
g mb  50S
ro  200k
Rout  roc || [ro  g m ro RS  RS ]
Assuming the source resistance is less than ro,
Rout  roc || [ro  g m ro RS ]  roc || [ro (1  g m RS )]
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 17
Prof. A. Niknejad
CG Two-Port Model
Function: a current buffer
• Low Input Impedance
• High Output Impedance
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 17
Prof. A. Niknejad
Common-Drain Amplifier
I DS
VGS
Department of EECS
W 1
  Cox
(VGS  VT ) 2
L 2
2 I DS
 VT 
W
Cox
L
Weak IDS dependence
University of California, Berkeley
EECS 105 Fall 2003, Lecture 17
Prof. A. Niknejad
CD Voltage Gain
Note vgs = vt – vout
vout
 g m vgs  g mb vout
roc || ro
vout
 g m  vt  vout   g mb vout
roc || ro
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 17
Prof. A. Niknejad
CD Voltage Gain (Cont.)
vout
 g m  vt  vout   g mb vout
roc || ro
KCL at source node:
 1

 gmb  gm  vout  g mvt

 roc || ro

Voltage gain (for vSB not zero):
vout

vin
gm
1
 g mb  g m
roc || ro
vout
gm

1
vin
g mb  g m
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 17
Prof. A. Niknejad
CD Output Resistance
Sum currents at output (source) node:
Rout
vt
 ro || roc ||
it
Rout
Department of EECS
it  gmvt  g mb vt
1

g m  g mb
University of California, Berkeley
EECS 105 Fall 2003, Lecture 17
Prof. A. Niknejad
CD Output Resistance (Cont.)
ro || roc is much larger than the inverses of the
transconductances  ignore
Rout 
1
g m  g mb
Function: a voltage buffer
• High Input Impedance
• Low Output Impedance
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 17
Department of EECS
Prof. A. Niknejad
University of California, Berkeley
Download