Laboratory Notes for the course of Logic Circuits
Spring Semester 2020/2021
Name
Sec. No.
Experiment Mark
Experiment 1
Experiment 2
Experiment 3
Experiment 4
Experiment 5
Experiment 6
Experiment 7
Experiment 8
Lab Exam
Total
Notes
Experiment 1: Verification of the operation of the basic logic
gates
Objective
-
Obtain the truth table of the basic logic gates
The required Components:
123456-
A chip of 7408 – AND Logic Gate
A chip of 7432 – OR Logic Gate
A chip of 7404 – NOT Logic Gate / Inverter
A chip of 7400 – NAND Logic Gate
A chip of 7402 – NOR Logic Gate
A chip of 7486 – Exclusive OR (XOR) Logic Gate
1- AND Logic Gate:
Pin Description of IC 7408:
Pin 1: is the 1st input of 1st AND Gate.
Pin 2: is the 2nd input of 1st AND Gate.
Pin 3: is the output of the 1st AND Gate.
Pin 4: is the 1st input of 2nd AND Gate.
Pin 5: is the 2nd input of 2nd AND Gate.
Pin 6: is the output of the 2nd AND Gate.
Pin 7: is the ground pin.
Pin 8: is the output of the 3rd AND Gate.
Pin 9: is the 2nd input of 3rd AND Gate.
Pin 10: is the 1st input of 3rd AND Gate.
Pin 11: is the output of the 4th AND Gate.
Pin 12: is the 2nd input of 4th AND Gate.
Pin 13: is the 1st input of 4th AND Gate.
Pin 14: is the Vcc terminal of the IC, it is used to provide the power supply to the IC chip.
Connect the AND gate and complete the following truth table
1st Input (X)
0
0
1
1
2nd Input (Y)
0
1
0
1
F = X . Y = XY
Note:
- Logic (0) means zero voltage (Ground).
- Logic (1) means 5 voltage (Vcc).
- Inputs should be connected to the D I/O pins in the Elvis board.
- Outputs should be connected to the LEDs.
Output(F)
2- OR Logic Gate:
Pin Description of IC 7432:
Pin 1: is the 1st input of 1st OR Gate.
Pin 2: is the 2nd input of 1st OR Gate.
Pin 3: is the output of the 1st OR Gate.
Pin 4: is the 1st input of 2nd OR Gate.
Pin 5: is the 2nd input of 2nd OR Gate.
Pin 6: is the output of the 2nd OR Gate.
Pin 7: is the ground pin.
Pin 8: is the output of the 3rd OR Gate.
Pin 9: is the 2nd input of 3rd OR Gate.
Pin 10: is the 1st input of 3rd OR Gate.
Pin 11: is the output of the 4th OR Gate.
Pin 12: is the 2nd input of 4th OR Gate.
Pin 13: is the 1st input of 4th OR Gate.
Pin 14: is the Vcc terminal of the IC, it is used to provide the power supply to the IC chip.
Connect the OR gate and complete the following truth table
1st Input (X)
0
0
1
1
F=X+Y
2nd Input (Y)
0
1
0
1
Output (F)
3- NOT Logic Gate:
Pin Description of IC 7404:
Pin 1: is the input of 1st NOT Gate.
Pin 2: is the output of the 1st NOT Gate.
Pin 3: is the input of 2nd NOT Gate.
Pin 4: is the output of the 2nd NOT Gate.
Pin 5: is the input of 3rd NOT Gate.
Pin 6: is the output of the 3rd NOT Gate.
Pin 7: is the ground pin.
Pin 8: is the output of the 4th NOT Gate.
Pin 9: is the input of 4th NOT Gate.
Pin 10: is the output of the 5th NOT Gate.
Pin 11: is the input of 5th NOT Gate.
Pin 12: is the output of the 6th NOT Gate.
Pin 13: is the input of 6th NOT Gate.
Pin 14: is the Vcc terminal of the IC, it is used to provide the power supply to the IC chip.
Connect the NOT gate and complete the following truth table
Input (X)
0
1
F=X
Output (F)
4- NAND Logic Gate:
Pin Description of IC 7400:
Pin 1: is the 1st input of 1st NAND Gate.
Pin 2: is the 2nd input of 1st NAND Gate.
Pin 3: is the output of the 1st NAND Gate.
Pin 4: is the 1st input of 2nd NAND Gate.
Pin 5: is the 2nd input of 2nd NAND Gate.
Pin 6: is the output of the 2nd NAND Gate.
Pin 7: is the ground pin.
Pin 8: is the output of the 3rd NAND Gate.
Pin 9: is the 2nd input of 3rd NAND Gate.
Pin 10: is the 1st input of 3rd NAND Gate.
Pin 11: is the output of the 4th NAND Gate.
Pin 12: is the 2nd input of 4th NAND Gate.
Pin 13: is the 1st input of 4th NAND Gate.
Pin 14: is the Vcc terminal of the IC, it is used to provide the power supply to the IC chip.
Connect the NAND gate and complete the following truth table
1st Input (X)
0
0
1
1
F = XY
2nd Input (Y)
0
1
0
1
Output (F)
5- NOR Logic Gate:
Pin Description of IC 7402:
Pin 1: is the output of the 1st NOR Gate.
Pin 2: is the 1st input of 1st NOR Gate.
Pin 3: is the 2nd input of 1st NOR Gate.
Pin 4: is the output of the 2nd NOR Gate.
Pin 5: is the 1st input of 2nd NOR Gate.
Pin 6: is the 2nd input of 2nd NOR Gate.
Pin 7: is the ground pin.
Pin 8: is the 2nd input of 3rd NOR Gate.
Pin 9: is the 1st input of 3rd NOR Gate.
Pin 10: is the output of the 3rd NOR Gate.
Pin 11: is the 2nd input of 4th NOR Gate.
Pin 12: is the 1st input of 4th NOR Gate.
Pin 13: is the output of the 4th NOR Gate.
Pin 14: is the Vcc terminal of the IC, it is used to provide the power supply to the IC chip.
Connect the NOR gate and complete the following truth table
1st Input (X)
0
0
1
1
F=X+Y
2nd Input (Y)
0
1
0
1
Output (F)
6- XOR Logic Gate:
Pin Description of IC 7486:
Pin 1: is the 1st input of 1st XOR Gate.
Pin 2: is the 2nd input of 1st XOR Gate.
Pin 3: is the output of the 1st XOR Gate.
Pin 4: is the 1st input of 2nd XOR Gate.
Pin 5: is the 2nd input of 2nd XOR Gate.
Pin 6: is the output of the 2nd XOR Gate.
Pin 7: is the ground pin.
Pin 8: is the output of the 3rd XOR Gate.
Pin 9: is the 2nd input of 3rd XOR Gate.
Pin 10: is the 1st input of 3rd XOR Gate.
Pin 11: is the output of the 4th XOR Gate.
Pin 12: is the 2nd input of 4th XOR Gate.
Pin 13: is the 1st input of 4th XOR Gate.
Pin 14: is the Vcc terminal of the IC, it is used to provide the power supply to the IC chip.
Connect the XOR gate and complete the following truth table
1st Input (X)
0
0
1
1
F=X+Y
2nd Input (Y)
0
1
0
1
Output (F)
Experiment 2: Implementation of the logic functions
Objective
-
Implement a logic function using AND, OR gates.
The required Components:
12345-
A chip of 7408 – AND Logic Gate
A chip of 7432 – OR Logic Gate
A chip of 7404 – Inverter (NOT Logic gate)
A chip of 7400 – NAND Logic gate
2 chips of 7402 – NOR Logic gate
Example 1:
-
Implement the following function, and complete the following truth table
F = AB + CD
Diagram of the circuit using AND gates and OR gate.
A
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
B
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
C
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
D
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
F
To implement the circuit using NAND gates only
)))))
)))))
(A
F = AB + CD = &&&&&&&&&&&
AB + CD = ))))))))))))))))
B) . (C
D)
Diagram of the circuit using NAND gates only.
To implement using NOR gates only
))))))))
&&&&&&
,+ B
, + ))))))))
,
F = A.B + C.D = &&&&&&
A .B + C
.D = A
C) + D
Example 2:
-
Implement the following function, and complete the following truth table.
F2 = xy’ + x’z
1st Input (X)
0
0
0
0
1
1
1
1
2nd Input (Y)
0
0
1
1
0
0
1
1
3rd Input (Z)
0
1
0
1
0
1
0
1
Output (F2)
Experiment 3: Binary Addition
(Half Adder and Full Adder)
Objective
-
Implement Half Adder, and Full Adder using AND, XOR, NOT and OR gates, then
obtain the truth table for each circuit.
The required Components:
1- A chip of 7408 – AND Logic Gate
2- A chip of 7404 – NOT Logic Gate / Inverter
3- A chip of 7486 – Exclusive OR (XOR) Logic Gate
1- Half Adder
-
Implement the Half Adder Circuit and obtain its truth table.
S=X+Y
C = XY
1st Input (X)
0
0
1
1
2nd Input (Y)
0
1
0
1
Carry (C)
Sum (S)
2- Full Adder
Requirements:
1234-
A chip of 7408 – AND Logic Gate
A chip of 7432 – OR Logic Gate
A chip of 7404 – NOT Logic Gate / Inverter
A chip of 7486 – Exclusive OR (XOR) Logic Gate
-
Implement the Full Adder Circuit and obtain its truth table.
S = (X + Y) + Cin
Cout = ((X + Y) . Cin) + (X . Y)
1st Input (X)
0
0
0
0
1
1
1
1
2nd Input (Y)
0
0
1
1
0
0
1
1
3rd Input (Cin)
0
1
0
1
0
1
0
1
Cout
S
Experiment 4: 4-bit parallel adder/subtractor
Objective
-
Obtain the working of 4-bit parallel adder chip, and how it can perform a
subtraction.
The required Components:
1- A chip of 7486 – Exclusive OR (XOR) Logic Gate
2- A chip of 7483 – 4-bit adder IC.
Pin Description of IC 7404:
Pin 1: is the 3rd input of number A.
Pin 2: is the 2nd output, must be connected to LED2.
Pin 3: is the 2nd input of number A.
Pin 4: is the 2nd input of number B.
Pin 5: is the Vcc terminal of the IC, it is used to provide the power supply to the IC chip.
Pin 6: is the 1st output, must be connected to LED1.
Pin 7: is the 1st input of number B.
Pin 8: is the 1st input of number A.
Pin 9: is the 0th output, must be connected to LED0.
Pin 10: is the 0th input of number A.
Pin 11: is the 0th input of number B.
Pin 12: is the ground pin.
Pin 13: is the carry input.
Pin 14: is the carry output, must be connected to LED4.
Pin 15: is the 3rd output, must be connected to LED3.
Pin 16: is the 3rd input of number B.
Please implement the following adder/subtractor circuit using 4-bit adder IC and XOR IC:
Note:
- If M = 0 è S = A+B
- If M = 1 è S = A-B and drop the carry in case of subtraction.
Experiment 5: Flip Flops
Objective
-
Obtain the truth table of JK-flip flop, T-flip flop and D-flip flop.
The required Components:
1. A chip of 7476.
2. A chip of 7404.
Pin Description of IC 7476:
Pin 1: The clock input of 1st J-K Flip-Flop (Negative trigger), must be connected to pulse
switch with bar.
Pin 2: The preset input of 1st J-K Flip-Flop, when connected to GND it forces the output
of J-K Flip-Flop (Q) to be on Logic (1). “Must be not connected if there is no need
for it”.
Pin 3: The clear input of 1st J-K Flip-Flop, when connected to GND it forces the output of
J-K Flip-Flop (Q) to be on Logic (0). “Must be not connected if there is no need for
it”.
Pin 4: The K input of 1st J-K Flip-Flop, must be connected to (D I/O1).
Pin 5: The Vcc terminal of the IC, it is used to provide the power supply to the IC chip.
Pin 6: The clock input of 2nd J-K Flip-Flop (Negative trigger), must be connected to pulse
switch with bar.
Pin 7: The preset input of 2nd J-K Flip-Flop, when connected to GND it forces the output
of J-K Flip-Flop (Q) to be on Logic (1). “Must be not connected if there is no need
for it”.
Pin 8: The clear input of 2nd J-K Flip-Flop, when connected to GND it forces the output
of J-K Flip-Flop (Q) to be on Logic (0). “Must be not connected if there is no need
for it”.
Pin 9: The J input of 2nd J-K Flip-Flop.
Pin 10: The Q inverting output of 2nd J-K Flip-Flop.
Pin 11: The Q output of 2nd J-K Flip-Flop.
Pin 12: The K input of 2nd J-K Flip-Flop.
Pin 13: is the ground pin.
Pin 14: The Q output of 1st J-K Flip-Flop, must be connected to (LED0).
Pin 15: The Q inverting output of 1st J-K Flip-Flop, must be connected to (LED1).
Pin 16: The J input of 1st J-K Flip-Flop, must be connected to (D I/O0).
J (D I/O0)
0
0
1
1
K(D I/O1)
0
1
0
1
Q(t+1)(LED0)
Q(t+1)(LED1)
Note:
-
To perform D Flip-Flop using J-K Flip-Flop just put an inverter between the two
inputs J and K.
To perform T Flip-Flop using J-K Flip-Flop just connect the two inputs J and K to the
same switch.
Perform the required connections and complete the following truth table of D FlipFlop:
D
0
1
Q(t+1)
Perform the required connections and complete the following truth table of T FlipFlop:
T
0
1
Q(t+1)
Experiment 6 – part 1: Priority Encoder
Objective
-
Verify the truth table of the active low output priority encoder with active low input.
The required Components:
1. A chip of 74147
Pin Description of IC 74147:
Pin 1: is 4th input of the encoder, must be connected to (D I/O3).
Pin 2: is 5th input of the encoder, must be connected to (D I/O4).
Pin 3: is 6th input of the encoder, must be connected to (D I/O5).
Pin 4: is 7th input of the encoder, must be connected to (D I/O6).
Pin 5: is 8th input of the encoder, must be connected to (D I/O7).
Pin 6: is the 3rd output of the encoder, must be connected to (LED2).
Pin 7: is the 2nd output of the encoder, must be connected to (LED1).
Pin 8: is the ground pin.
Pin 9: is the 1st output of the encoder, must be connected to (LED0).
Pin 10: is 9th input of the encoder, must be connected to (SW9).
Pin 11: is 1st input of the encoder, must be connected to (D I/O0).
Pin 12: is 2nd input of the encoder, must be connected to (D I/O1).
Pin 13: is 3rd input of the encoder, must be connected to (D I/O2).
Pin 14: is the 4th output of the encoder, must be connected to (LED3).
Pin 15: Not Connected (Floating)
Pin 16: is the Vcc terminal of the IC, it is used to provide the power supply to the IC chip.
Inputs
Outputs
1st I/P
2nd I/P
3rd I/P
4th I/P
5th I/P
6th I/P
7th I/P
8th I/P
9th I/P
(1/NC)
X
X
X
X
X
X
X
X
0
(1/NC)
X
X
X
X
X
X
X
0
(1/NC)
(1/NC)
X
X
X
X
X
X
0
(1/NC)
(1/NC)
(1/NC)
X
X
X
X
X
0
(1/NC)
(1/NC)
(1/NC)
(1/NC)
X
X
X
X
0
(1/NC)
(1/NC)
(1/NC)
(1/NC)
(1/NC)
X
X
X
0
(1/NC)
(1/NC)
(1/NC)
(1/NC)
(1/NC)
(1/NC)
X
X
0
(1/NC)
(1/NC)
(1/NC)
(1/NC)
(1/NC)
(1/NC)
(1/NC)
X
0
(1/NC)
(1/NC)
(1/NC)
(1/NC)
(1/NC)
(1/NC)
(1/NC)
(1/NC)
0
(1/NC)
(1/NC)
(1/NC)
(1/NC)
(1/NC)
(1/NC)
(1/NC)
(1/NC)
X: Don’t Care (Connected to Logic (1) or Logic (0)).
NC: Not Connected.
D
(MSB)
1
0
0
1
1
1
1
1
1
1
C
B
1
1
1
0
0
0
0
1
1
1
1
1
1
0
0
1
1
0
0
1
A
(LSB)
1
0
1
0
1
0
1
0
1
0
Experiment 6 – part 2: Decoder
Objective
-
Verify the truth table of the 3-to-8 active low output line Decoder.
The required Components:
1. A chip of 74138.
Pin Description of IC 74138:
Pin 1: Connected to (D I/O0).
Pin 2: Connected to (D I/O1).
Pin 3: Connected to (D I/O2).
Pin 4: Connected to GND.
Pin 5: Connected to GND.
Pin 6: Connected to (D I/O3).
Pin 7: Connected to (LED7).
Pin 8: is the ground pin.
Pin 9: Connected to (LED6).
Pin 10: Connected to (LED5).
Pin 11: Connected to (LED4).
Pin 12: Connected to (LED3).
Pin 13: Connected to (LED2).
Pin 14: Connected to (LED1).
Pin 15: Connected to (LED0).
Pin 16: is the Vcc terminal of the IC, it is used to provide the power supply to the IC chip.
G1
0
1
1
1
1
1
1
1
1
Inputs
C
B
X
X
0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
A
X
0
1
0
1
0
1
0
1
LED7
1
1
1
1
1
1
1
1
0
LED6
1
1
1
1
1
1
1
0
1
LED5
1
1
1
1
1
1
0
1
1
Outputs
LED4 LED3
1
1
1
1
1
1
1
1
1
0
0
1
1
1
1
1
1
1
LED2
1
1
1
0
1
1
1
1
1
LED1
1
1
0
1
1
1
1
1
1
LED0
1
0
1
1
1
1
1
1
1
Experiment 7 – part 1: Multiplexer
Objective
-
Verify the truth table of the 8-to-1 Multiplexer.
The required Components:
1. A chip of 74151.
Pin Description of IC 74151:
Pin 1: is 3rd input of the mux, must be connected to (D I/O3).
Pin 2: is 2nd input of the mux, must be connected to (D I/O2).
Pin 3: is 1st input of the mux, must be connected to (D I/O1).
Pin 4: is 0th input of the mux, must be connected to (D I/O0).
Pin 5: is output of the mux, must be connected to (LED0).
Pin 6: is inverting output of the mux, no need to be connected.
Pin 7: is the chip active low enable, must be connected to (GND).
Pin 8: is the ground pin.
Pin 9: is the 2nd selection line of the mux, must be connected to (D I/O10).
Pin 10: is the 1st selection line of the mux, must be connected to (D I/O9).
Pin 11: is the 0th selection line of the mux, must be connected to (D I/O8).
Pin 12: is 7th input of the mux, must be connected to (D I/O7).
Pin 13: is 6th input of the mux, must be connected to (D I/O6).
Pin 14: is 5th input of the mux, must be connected to (D I/O5).
Pin 15: is 4th input of the mux, must be connected to (D I/O4).
Pin 16: is the Vcc terminal of the IC, it is used to provide the power supply to the IC chip.
S2 (D I/O10)
0
0
0
0
1
1
1
1
Selection Lines
S1 (D I/O9)
0
0
1
1
0
0
1
1
S0 (D I/O8)
0
1
0
1
0
1
0
1
Output (Y)
LED0
D I/O0
D I/O1
D I/O2
D I/O3
D I/O4
D I/O5
D I/O6
D I/O07
Experiment 7 – part 2: Demultiplexer
Objective
-
Verify the truth table of the 1 – 8 Demultiplexer.
The required Components:
1. A chip of 74138.
Pin Description of IC 74138:
Pin 1: Connected to (D I/O0).
Pin 2: Connected to (D I/O1).
Pin 3: Connected to (D I/O2).
Pin 4: Connected to GND.
Pin 5: Connected to GND.
Pin 6: Connected to (D I/O3).
Pin 7: Connected to (LED7).
Pin 8: is the ground pin.
Pin 9: Connected to (LED6).
Pin 10: Connected to (LED5).
Pin 11: Connected to (LED4).
Pin 12: Connected to (LED3).
Pin 13: Connected to (LED2).
Pin 14: Connected to (LED1).
Pin 15: Connected to (LED0).
Pin 16: is the Vcc terminal of the IC, it is used to provide the power supply to the IC chip.
G1
0
1
1
1
1
1
1
1
1
Inputs
C
B
X
X
0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
A
X
0
1
0
1
0
1
0
1
LED7
1
1
1
1
1
1
1
1
0
LED6
1
1
1
1
1
1
1
0
1
LED5
1
1
1
1
1
1
0
1
1
Outputs
LED4 LED3
1
1
1
1
1
1
1
1
1
0
0
1
1
1
1
1
1
1
LED2
1
1
1
0
1
1
1
1
1
LED1
1
1
0
1
1
1
1
1
1
LED0
1
0
1
1
1
1
1
1
1
Experiment 8 – part one: Up Counter
Objective
-
Using J-K Flip-Flop Design a counter to count from (0 à 3)10.
The required Components:
1. A chip of 7476.
Procedures:
- Perform the below circuit.
clk
Q2(LED1)
0
Q1 (LED0)
0
Experiment 8 – part two: Down Counter
Objective
-
Using J-K Flip-Flop Design a counter to count from (3 à 0)10.
The required Components:
1. A chip of 7476.
Procedures:
- Perform the below circuit.
clk
Q2(LED1)
0
Q1 (LED0)
0